main.c 146 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/thermal.h>
  20. #include <linux/version.h>
  21. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  22. #include <linux/panic_notifier.h>
  23. #endif
  24. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  25. #include <soc/qcom/minidump.h>
  26. #endif
  27. #include "cnss_plat_ipc_qmi.h"
  28. #include "cnss_utils.h"
  29. #include "main.h"
  30. #include "bus.h"
  31. #include "debug.h"
  32. #include "genl.h"
  33. #include "reg.h"
  34. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  35. #ifdef CONFIG_CNSS_HW_SECURE_SMEM
  36. #include <linux/soc/qcom/smem.h>
  37. #define PERISEC_SMEM_ID 651
  38. #define HW_WIFI_UID 0x508
  39. #else
  40. #include "smcinvoke.h"
  41. #include "smcinvoke_object.h"
  42. #include "IClientEnv.h"
  43. #define HW_STATE_UID 0x108
  44. #define HW_OP_GET_STATE 1
  45. #define HW_WIFI_UID 0x508
  46. #define FEATURE_NOT_SUPPORTED 12
  47. #define PERIPHERAL_NOT_FOUND 10
  48. #endif
  49. #endif
  50. #define CNSS_DUMP_FORMAT_VER 0x11
  51. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  52. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  53. #define CNSS_DUMP_NAME "CNSS_WLAN"
  54. #define CNSS_DUMP_DESC_SIZE 0x1000
  55. #define CNSS_DUMP_SEG_VER 0x1
  56. #define FILE_SYSTEM_READY 1
  57. #define FW_READY_TIMEOUT 20000
  58. #define FW_ASSERT_TIMEOUT 5000
  59. #define CNSS_EVENT_PENDING 2989
  60. #define POWER_RESET_MIN_DELAY_MS 100
  61. #define CNSS_QUIRKS_DEFAULT 0
  62. #ifdef CONFIG_CNSS_EMULATION
  63. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  64. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  65. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  66. #else
  67. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  68. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  69. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  70. #endif
  71. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  72. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  73. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  74. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  75. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  76. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  77. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  78. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  79. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  80. #define CNSS_TIME_SYNC_PERIOD_INVALID 0xFFFFFFFF
  81. enum cnss_cal_db_op {
  82. CNSS_CAL_DB_UPLOAD,
  83. CNSS_CAL_DB_DOWNLOAD,
  84. CNSS_CAL_DB_INVALID_OP,
  85. };
  86. enum cnss_recovery_type {
  87. CNSS_WLAN_RECOVERY = 0x1,
  88. CNSS_PCSS_RECOVERY = 0x2,
  89. };
  90. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  91. #define CNSS_MAX_DEV_NUM 2
  92. static struct cnss_plat_data *plat_env[CNSS_MAX_DEV_NUM];
  93. static int plat_env_count;
  94. #else
  95. static struct cnss_plat_data *plat_env;
  96. #endif
  97. static bool cnss_allow_driver_loading;
  98. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  99. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  100. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  101. };
  102. static struct cnss_fw_files FW_FILES_DEFAULT = {
  103. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  104. "utfbd.bin", "epping.bin", "evicted.bin"
  105. };
  106. struct cnss_driver_event {
  107. struct list_head list;
  108. enum cnss_driver_event_type type;
  109. bool sync;
  110. struct completion complete;
  111. int ret;
  112. void *data;
  113. };
  114. bool cnss_check_driver_loading_allowed(void)
  115. {
  116. return cnss_allow_driver_loading;
  117. }
  118. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  119. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  120. struct cnss_plat_data *plat_priv)
  121. {
  122. cnss_pr_dbg("Set plat_priv at %d", plat_env_count);
  123. if (plat_priv) {
  124. plat_priv->plat_idx = plat_env_count;
  125. plat_env[plat_priv->plat_idx] = plat_priv;
  126. plat_env_count++;
  127. }
  128. }
  129. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device
  130. *plat_dev)
  131. {
  132. int i;
  133. if (!plat_dev)
  134. return NULL;
  135. for (i = 0; i < plat_env_count; i++) {
  136. if (plat_env[i]->plat_dev == plat_dev)
  137. return plat_env[i];
  138. }
  139. return NULL;
  140. }
  141. struct cnss_plat_data *cnss_get_first_plat_priv(struct platform_device
  142. *plat_dev)
  143. {
  144. int i;
  145. if (!plat_dev) {
  146. for (i = 0; i < plat_env_count; i++) {
  147. if (plat_env[i])
  148. return plat_env[i];
  149. }
  150. }
  151. return NULL;
  152. }
  153. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  154. {
  155. cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx);
  156. plat_env[plat_priv->plat_idx] = NULL;
  157. plat_env_count--;
  158. }
  159. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  160. {
  161. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  162. "wlan_%d", plat_priv->plat_idx);
  163. return 0;
  164. }
  165. static int cnss_plat_env_available(void)
  166. {
  167. int ret = 0;
  168. if (plat_env_count >= CNSS_MAX_DEV_NUM) {
  169. cnss_pr_err("ERROR: No space to store plat_priv\n");
  170. ret = -ENOMEM;
  171. }
  172. return ret;
  173. }
  174. int cnss_get_plat_env_count(void)
  175. {
  176. return plat_env_count;
  177. }
  178. struct cnss_plat_data *cnss_get_plat_env(int index)
  179. {
  180. return plat_env[index];
  181. }
  182. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  183. {
  184. int i;
  185. for (i = 0; i < plat_env_count; i++) {
  186. if (plat_env[i]->rc_num == rc_num)
  187. return plat_env[i];
  188. }
  189. return NULL;
  190. }
  191. static inline int
  192. cnss_get_qrtr_node_id(struct cnss_plat_data *plat_priv)
  193. {
  194. return of_property_read_u32(plat_priv->dev_node,
  195. "qcom,qrtr_node_id", &plat_priv->qrtr_node_id);
  196. }
  197. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  198. {
  199. int ret = 0;
  200. ret = cnss_get_qrtr_node_id(plat_priv);
  201. if (ret) {
  202. cnss_pr_warn("Failed to find qrtr_node_id err=%d\n", ret);
  203. plat_priv->qrtr_node_id = 0;
  204. plat_priv->wlfw_service_instance_id = 0;
  205. } else {
  206. plat_priv->wlfw_service_instance_id = plat_priv->qrtr_node_id +
  207. QRTR_NODE_FW_ID_BASE;
  208. cnss_pr_dbg("service_instance_id=0x%x\n",
  209. plat_priv->wlfw_service_instance_id);
  210. }
  211. }
  212. static inline int
  213. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  214. {
  215. return of_property_read_string(plat_priv->plat_dev->dev.of_node,
  216. "qcom,pld_bus_ops_name",
  217. &plat_priv->pld_bus_ops_name);
  218. }
  219. #else
  220. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  221. struct cnss_plat_data *plat_priv)
  222. {
  223. plat_env = plat_priv;
  224. }
  225. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  226. {
  227. return plat_env;
  228. }
  229. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  230. {
  231. plat_env = NULL;
  232. }
  233. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  234. {
  235. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  236. "wlan");
  237. return 0;
  238. }
  239. static int cnss_plat_env_available(void)
  240. {
  241. return 0;
  242. }
  243. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  244. {
  245. return cnss_bus_dev_to_plat_priv(NULL);
  246. }
  247. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  248. {
  249. }
  250. static int
  251. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  252. {
  253. return 0;
  254. }
  255. #endif
  256. void cnss_get_sleep_clk_supported(struct cnss_plat_data *plat_priv)
  257. {
  258. plat_priv->sleep_clk = of_property_read_bool(plat_priv->dev_node,
  259. "qcom,sleep-clk-support");
  260. cnss_pr_dbg("qcom,sleep-clk-support is %d\n",
  261. plat_priv->sleep_clk);
  262. }
  263. void cnss_get_bwscal_info(struct cnss_plat_data *plat_priv)
  264. {
  265. plat_priv->no_bwscale = of_property_read_bool(plat_priv->dev_node,
  266. "qcom,no-bwscale");
  267. }
  268. static inline int
  269. cnss_get_rc_num(struct cnss_plat_data *plat_priv)
  270. {
  271. return of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  272. "qcom,wlan-rc-num", &plat_priv->rc_num);
  273. }
  274. bool cnss_is_dual_wlan_enabled(void)
  275. {
  276. return IS_ENABLED(CONFIG_CNSS_SUPPORT_DUAL_DEV);
  277. }
  278. /**
  279. * cnss_get_mem_seg_count - Get segment count of memory
  280. * @type: memory type
  281. * @seg: segment count
  282. *
  283. * Return: 0 on success, negative value on failure
  284. */
  285. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  286. {
  287. struct cnss_plat_data *plat_priv;
  288. plat_priv = cnss_get_plat_priv(NULL);
  289. if (!plat_priv)
  290. return -ENODEV;
  291. switch (type) {
  292. case CNSS_REMOTE_MEM_TYPE_FW:
  293. *seg = plat_priv->fw_mem_seg_len;
  294. break;
  295. case CNSS_REMOTE_MEM_TYPE_QDSS:
  296. *seg = plat_priv->qdss_mem_seg_len;
  297. break;
  298. default:
  299. return -EINVAL;
  300. }
  301. return 0;
  302. }
  303. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  304. /**
  305. * cnss_get_wifi_kobject -return wifi kobject
  306. * Return: Null, to maintain driver comnpatibilty
  307. */
  308. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  309. {
  310. struct cnss_plat_data *plat_priv;
  311. plat_priv = cnss_get_plat_priv(NULL);
  312. if (!plat_priv)
  313. return NULL;
  314. return plat_priv->wifi_kobj;
  315. }
  316. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  317. /**
  318. * cnss_get_mem_segment_info - Get memory info of different type
  319. * @type: memory type
  320. * @segment: array to save the segment info
  321. * @seg: segment count
  322. *
  323. * Return: 0 on success, negative value on failure
  324. */
  325. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  326. struct cnss_mem_segment segment[],
  327. u32 segment_count)
  328. {
  329. struct cnss_plat_data *plat_priv;
  330. u32 i;
  331. plat_priv = cnss_get_plat_priv(NULL);
  332. if (!plat_priv)
  333. return -ENODEV;
  334. switch (type) {
  335. case CNSS_REMOTE_MEM_TYPE_FW:
  336. if (segment_count > plat_priv->fw_mem_seg_len)
  337. segment_count = plat_priv->fw_mem_seg_len;
  338. for (i = 0; i < segment_count; i++) {
  339. segment[i].size = plat_priv->fw_mem[i].size;
  340. segment[i].va = plat_priv->fw_mem[i].va;
  341. segment[i].pa = plat_priv->fw_mem[i].pa;
  342. }
  343. break;
  344. case CNSS_REMOTE_MEM_TYPE_QDSS:
  345. if (segment_count > plat_priv->qdss_mem_seg_len)
  346. segment_count = plat_priv->qdss_mem_seg_len;
  347. for (i = 0; i < segment_count; i++) {
  348. segment[i].size = plat_priv->qdss_mem[i].size;
  349. segment[i].va = plat_priv->qdss_mem[i].va;
  350. segment[i].pa = plat_priv->qdss_mem[i].pa;
  351. }
  352. break;
  353. default:
  354. return -EINVAL;
  355. }
  356. return 0;
  357. }
  358. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  359. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  360. {
  361. struct device_node *audio_ion_node;
  362. struct platform_device *audio_ion_pdev;
  363. audio_ion_node = of_find_compatible_node(NULL, NULL,
  364. "qcom,msm-audio-ion");
  365. if (!audio_ion_node) {
  366. cnss_pr_err("Unable to get Audio ion node");
  367. return -EINVAL;
  368. }
  369. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  370. of_node_put(audio_ion_node);
  371. if (!audio_ion_pdev) {
  372. cnss_pr_err("Unable to get Audio ion platform device");
  373. return -EINVAL;
  374. }
  375. plat_priv->audio_iommu_domain =
  376. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  377. put_device(&audio_ion_pdev->dev);
  378. if (!plat_priv->audio_iommu_domain) {
  379. cnss_pr_err("Unable to get Audio ion iommu domain");
  380. return -EINVAL;
  381. }
  382. return 0;
  383. }
  384. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  385. enum cnss_feature_v01 feature)
  386. {
  387. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  388. return -EINVAL;
  389. plat_priv->feature_list |= 1 << feature;
  390. return 0;
  391. }
  392. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  393. enum cnss_feature_v01 feature)
  394. {
  395. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  396. return -EINVAL;
  397. plat_priv->feature_list &= ~(1 << feature);
  398. return 0;
  399. }
  400. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  401. u64 *feature_list)
  402. {
  403. if (unlikely(!plat_priv))
  404. return -EINVAL;
  405. *feature_list = plat_priv->feature_list;
  406. return 0;
  407. }
  408. size_t cnss_get_platform_name(struct cnss_plat_data *plat_priv,
  409. char *buf, const size_t buf_len)
  410. {
  411. if (unlikely(!plat_priv || !buf || !buf_len))
  412. return 0;
  413. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  414. "platform-name-required")) {
  415. struct device_node *root;
  416. root = of_find_node_by_path("/");
  417. if (root) {
  418. const char *model;
  419. size_t model_len;
  420. model = of_get_property(root, "model", NULL);
  421. if (model) {
  422. model_len = strlcpy(buf, model, buf_len);
  423. cnss_pr_dbg("Platform name: %s (%zu)\n",
  424. buf, model_len);
  425. return model_len;
  426. }
  427. }
  428. }
  429. return 0;
  430. }
  431. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  432. {
  433. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  434. return;
  435. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  436. plat_priv->driver_state,
  437. atomic_read(&plat_priv->pm_count));
  438. pm_stay_awake(&plat_priv->plat_dev->dev);
  439. }
  440. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  441. {
  442. int r = atomic_dec_return(&plat_priv->pm_count);
  443. WARN_ON(r < 0);
  444. if (r != 0)
  445. return;
  446. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  447. plat_priv->driver_state,
  448. atomic_read(&plat_priv->pm_count));
  449. pm_relax(&plat_priv->plat_dev->dev);
  450. }
  451. int cnss_get_fw_files_for_target(struct device *dev,
  452. struct cnss_fw_files *pfw_files,
  453. u32 target_type, u32 target_version)
  454. {
  455. if (!pfw_files)
  456. return -ENODEV;
  457. switch (target_version) {
  458. case QCA6174_REV3_VERSION:
  459. case QCA6174_REV3_2_VERSION:
  460. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  461. break;
  462. default:
  463. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  464. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  465. target_type, target_version);
  466. break;
  467. }
  468. return 0;
  469. }
  470. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  471. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  472. {
  473. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  474. if (!plat_priv)
  475. return -ENODEV;
  476. if (!cap)
  477. return -EINVAL;
  478. *cap = plat_priv->cap;
  479. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  480. return 0;
  481. }
  482. EXPORT_SYMBOL(cnss_get_platform_cap);
  483. /**
  484. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  485. * @dev: Device
  486. * @fw_cap: FW Capability which needs to be checked
  487. *
  488. * Return: TRUE if supported, FALSE on failure or if not supported
  489. */
  490. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  491. {
  492. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  493. bool is_supported = false;
  494. if (!plat_priv)
  495. return is_supported;
  496. if (!plat_priv->fw_caps)
  497. return is_supported;
  498. switch (fw_cap) {
  499. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  500. is_supported = !!(plat_priv->fw_caps &
  501. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  502. if (is_supported && cnss_get_audio_iommu_domain(plat_priv))
  503. is_supported = false;
  504. break;
  505. default:
  506. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  507. }
  508. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  509. is_supported ? "supported" : "not supported");
  510. return is_supported;
  511. }
  512. EXPORT_SYMBOL(cnss_get_fw_cap);
  513. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  514. {
  515. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  516. if (!plat_priv)
  517. return;
  518. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  519. }
  520. EXPORT_SYMBOL(cnss_request_pm_qos);
  521. void cnss_remove_pm_qos(struct device *dev)
  522. {
  523. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  524. if (!plat_priv)
  525. return;
  526. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  527. }
  528. EXPORT_SYMBOL(cnss_remove_pm_qos);
  529. int cnss_wlan_enable(struct device *dev,
  530. struct cnss_wlan_enable_cfg *config,
  531. enum cnss_driver_mode mode,
  532. const char *host_version)
  533. {
  534. int ret = 0;
  535. struct cnss_plat_data *plat_priv;
  536. if (!dev) {
  537. cnss_pr_err("Invalid dev pointer\n");
  538. return -EINVAL;
  539. }
  540. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  541. if (!plat_priv)
  542. return -ENODEV;
  543. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  544. return 0;
  545. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  546. return 0;
  547. if (!config || !host_version) {
  548. cnss_pr_err("Invalid config or host_version pointer\n");
  549. return -EINVAL;
  550. }
  551. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  552. mode, config, host_version);
  553. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  554. goto skip_cfg;
  555. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  556. config->send_msi_ce = true;
  557. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  558. if (ret)
  559. goto out;
  560. skip_cfg:
  561. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  562. out:
  563. return ret;
  564. }
  565. EXPORT_SYMBOL(cnss_wlan_enable);
  566. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  567. {
  568. int ret = 0;
  569. struct cnss_plat_data *plat_priv;
  570. if (!dev) {
  571. cnss_pr_err("Invalid dev pointer\n");
  572. return -EINVAL;
  573. }
  574. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  575. if (!plat_priv)
  576. return -ENODEV;
  577. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  578. return 0;
  579. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  580. return 0;
  581. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  582. cnss_bus_free_qdss_mem(plat_priv);
  583. return ret;
  584. }
  585. EXPORT_SYMBOL(cnss_wlan_disable);
  586. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  587. int cnss_iommu_map(struct iommu_domain *domain,
  588. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  589. {
  590. return iommu_map(domain, iova, paddr, size, prot);
  591. }
  592. #else
  593. int cnss_iommu_map(struct iommu_domain *domain,
  594. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  595. {
  596. return iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL);
  597. }
  598. #endif
  599. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  600. dma_addr_t iova, size_t size)
  601. {
  602. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  603. uint32_t page_offset;
  604. if (!plat_priv)
  605. return -ENODEV;
  606. if (!plat_priv->audio_iommu_domain)
  607. return -EINVAL;
  608. page_offset = iova & (PAGE_SIZE - 1);
  609. if (page_offset + size > PAGE_SIZE)
  610. size += PAGE_SIZE;
  611. iova -= page_offset;
  612. paddr -= page_offset;
  613. return cnss_iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  614. roundup(size, PAGE_SIZE), IOMMU_READ |
  615. IOMMU_WRITE | IOMMU_CACHE);
  616. }
  617. EXPORT_SYMBOL(cnss_audio_smmu_map);
  618. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  619. {
  620. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  621. uint32_t page_offset;
  622. if (!plat_priv)
  623. return;
  624. if (!plat_priv->audio_iommu_domain)
  625. return;
  626. page_offset = iova & (PAGE_SIZE - 1);
  627. if (page_offset + size > PAGE_SIZE)
  628. size += PAGE_SIZE;
  629. iova -= page_offset;
  630. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  631. roundup(size, PAGE_SIZE));
  632. }
  633. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  634. int cnss_get_fw_lpass_shared_mem(struct device *dev, dma_addr_t *iova,
  635. size_t *size)
  636. {
  637. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  638. uint8_t i;
  639. if (!plat_priv)
  640. return -EINVAL;
  641. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  642. if (plat_priv->fw_mem[i].type ==
  643. QMI_WLFW_MEM_LPASS_SHARED_V01) {
  644. *iova = plat_priv->fw_mem[i].pa;
  645. *size = plat_priv->fw_mem[i].size;
  646. return 0;
  647. }
  648. }
  649. return -EINVAL;
  650. }
  651. EXPORT_SYMBOL(cnss_get_fw_lpass_shared_mem);
  652. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  653. u32 data_len, u8 *output)
  654. {
  655. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  656. int ret = 0;
  657. if (!plat_priv) {
  658. cnss_pr_err("plat_priv is NULL!\n");
  659. return -EINVAL;
  660. }
  661. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  662. return 0;
  663. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  664. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  665. plat_priv->driver_state);
  666. ret = -EINVAL;
  667. goto out;
  668. }
  669. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  670. data_len, output);
  671. out:
  672. return ret;
  673. }
  674. EXPORT_SYMBOL(cnss_athdiag_read);
  675. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  676. u32 data_len, u8 *input)
  677. {
  678. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  679. int ret = 0;
  680. if (!plat_priv) {
  681. cnss_pr_err("plat_priv is NULL!\n");
  682. return -EINVAL;
  683. }
  684. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  685. return 0;
  686. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  687. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  688. plat_priv->driver_state);
  689. ret = -EINVAL;
  690. goto out;
  691. }
  692. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  693. data_len, input);
  694. out:
  695. return ret;
  696. }
  697. EXPORT_SYMBOL(cnss_athdiag_write);
  698. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  699. {
  700. struct cnss_plat_data *plat_priv;
  701. if (!dev) {
  702. cnss_pr_err("Invalid dev pointer\n");
  703. return -EINVAL;
  704. }
  705. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  706. if (!plat_priv)
  707. return -ENODEV;
  708. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  709. return 0;
  710. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  711. }
  712. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  713. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  714. {
  715. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  716. if (!plat_priv)
  717. return -EINVAL;
  718. if (!plat_priv->fw_pcie_gen_switch) {
  719. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  720. return -EOPNOTSUPP;
  721. }
  722. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  723. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  724. return -EINVAL;
  725. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  726. plat_priv->pcie_gen_speed = pcie_gen_speed;
  727. return 0;
  728. }
  729. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  730. static bool cnss_is_aux_support_enabled(struct cnss_plat_data *plat_priv)
  731. {
  732. switch (plat_priv->device_id) {
  733. case PEACH_DEVICE_ID:
  734. if (!plat_priv->fw_aux_uc_support) {
  735. cnss_pr_dbg("FW does not support aux uc capability\n");
  736. return false;
  737. }
  738. break;
  739. default:
  740. cnss_pr_dbg("Host does not support aux uc capability\n");
  741. return false;
  742. }
  743. return true;
  744. }
  745. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  746. {
  747. int ret = 0;
  748. if (!plat_priv)
  749. return -ENODEV;
  750. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  751. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  752. if (ret)
  753. goto out;
  754. cnss_bus_load_tme_patch(plat_priv);
  755. cnss_wlfw_tme_patch_dnld_send_sync(plat_priv,
  756. WLFW_TME_LITE_PATCH_FILE_V01);
  757. if (plat_priv->hds_enabled)
  758. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  759. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  760. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  761. plat_priv->ctrl_params.bdf_type = CNSS_BDF_BIN;
  762. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  763. plat_priv->ctrl_params.bdf_type);
  764. if (ret)
  765. goto out;
  766. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  767. return 0;
  768. ret = cnss_bus_load_m3(plat_priv);
  769. if (ret)
  770. goto out;
  771. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  772. if (ret)
  773. goto out;
  774. if (cnss_is_aux_support_enabled(plat_priv)) {
  775. ret = cnss_bus_load_aux(plat_priv);
  776. if (ret)
  777. goto out;
  778. ret = cnss_wlfw_aux_dnld_send_sync(plat_priv);
  779. if (ret)
  780. goto out;
  781. }
  782. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  783. return 0;
  784. out:
  785. return ret;
  786. }
  787. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  788. {
  789. int ret = 0;
  790. if (!plat_priv->antenna) {
  791. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  792. if (ret)
  793. goto out;
  794. }
  795. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  796. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  797. if (ret)
  798. goto out;
  799. }
  800. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  801. if (ret)
  802. goto out;
  803. return 0;
  804. out:
  805. return ret;
  806. }
  807. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  808. {
  809. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  810. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  811. }
  812. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  813. {
  814. u32 i;
  815. int ret = 0;
  816. struct cnss_plat_ipc_daemon_config *cfg;
  817. ret = cnss_qmi_get_dms_mac(plat_priv);
  818. if (ret == 0 && plat_priv->dms.mac_valid)
  819. goto qmi_send;
  820. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  821. * Thus assert on failure to get MAC from DMS even after retries
  822. */
  823. if (plat_priv->use_nv_mac) {
  824. /* Check if Daemon says platform support DMS MAC provisioning */
  825. cfg = cnss_plat_ipc_qmi_daemon_config();
  826. if (cfg) {
  827. if (!cfg->dms_mac_addr_supported) {
  828. cnss_pr_err("DMS MAC address not supported\n");
  829. CNSS_ASSERT(0);
  830. return -EINVAL;
  831. }
  832. }
  833. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  834. if (plat_priv->dms.mac_valid)
  835. break;
  836. ret = cnss_qmi_get_dms_mac(plat_priv);
  837. if (ret == 0)
  838. break;
  839. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  840. }
  841. if (!plat_priv->dms.mac_valid) {
  842. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  843. CNSS_ASSERT(0);
  844. return -EINVAL;
  845. }
  846. }
  847. qmi_send:
  848. if (plat_priv->dms.mac_valid)
  849. ret =
  850. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  851. ARRAY_SIZE(plat_priv->dms.mac));
  852. return ret;
  853. }
  854. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  855. enum cnss_cal_db_op op, u32 *size)
  856. {
  857. int ret = 0;
  858. u32 timeout = cnss_get_timeout(plat_priv,
  859. CNSS_TIMEOUT_DAEMON_CONNECTION);
  860. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  861. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  862. if (op >= CNSS_CAL_DB_INVALID_OP)
  863. return -EINVAL;
  864. if (!plat_priv->cbc_file_download) {
  865. cnss_pr_info("CAL DB file not required as per BDF\n");
  866. return 0;
  867. }
  868. if (*size == 0) {
  869. cnss_pr_err("Invalid cal file size\n");
  870. return -EINVAL;
  871. }
  872. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  873. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  874. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  875. msecs_to_jiffies(timeout));
  876. if (!ret) {
  877. cnss_pr_err("Daemon not yet connected\n");
  878. CNSS_ASSERT(0);
  879. return ret;
  880. }
  881. }
  882. if (!plat_priv->cal_mem->va) {
  883. cnss_pr_err("CAL DB Memory not setup for FW\n");
  884. return -EINVAL;
  885. }
  886. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  887. if (op == CNSS_CAL_DB_DOWNLOAD) {
  888. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  889. ret = cnss_plat_ipc_qmi_file_download(client_id,
  890. CNSS_CAL_DB_FILE_NAME,
  891. plat_priv->cal_mem->va,
  892. size);
  893. } else {
  894. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  895. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  896. CNSS_CAL_DB_FILE_NAME,
  897. plat_priv->cal_mem->va,
  898. *size);
  899. }
  900. if (ret)
  901. cnss_pr_err("Cal DB file %s %s failure\n",
  902. CNSS_CAL_DB_FILE_NAME,
  903. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  904. else
  905. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  906. CNSS_CAL_DB_FILE_NAME,
  907. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  908. *size);
  909. return ret;
  910. }
  911. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  912. {
  913. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  914. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  915. return -EINVAL;
  916. }
  917. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  918. &plat_priv->cal_file_size);
  919. }
  920. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  921. u32 *cal_file_size)
  922. {
  923. /* To download pass the total size of cal DB mem allocated.
  924. * After cal file is download to mem, its size is updated in
  925. * return pointer
  926. */
  927. *cal_file_size = plat_priv->cal_mem->size;
  928. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  929. cal_file_size);
  930. }
  931. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  932. {
  933. int ret = 0;
  934. u32 cal_file_size = 0;
  935. if (!plat_priv)
  936. return -ENODEV;
  937. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  938. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  939. return -EINVAL;
  940. }
  941. cnss_pr_dbg("Processing FW Init Done..\n");
  942. del_timer(&plat_priv->fw_boot_timer);
  943. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  944. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  945. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  946. cnss_send_subsys_restart_level_msg(plat_priv);
  947. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  948. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  949. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  950. }
  951. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  952. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  953. CNSS_WALTEST);
  954. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  955. cnss_request_antenna_sharing(plat_priv);
  956. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  957. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  958. plat_priv->cal_time = jiffies;
  959. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  960. CNSS_CALIBRATION);
  961. } else {
  962. ret = cnss_setup_dms_mac(plat_priv);
  963. ret = cnss_bus_call_driver_probe(plat_priv);
  964. }
  965. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  966. goto out;
  967. else if (ret)
  968. goto shutdown;
  969. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  970. return 0;
  971. shutdown:
  972. cnss_bus_dev_shutdown(plat_priv);
  973. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  974. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  975. out:
  976. return ret;
  977. }
  978. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  979. {
  980. switch (type) {
  981. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  982. return "SERVER_ARRIVE";
  983. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  984. return "SERVER_EXIT";
  985. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  986. return "REQUEST_MEM";
  987. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  988. return "FW_MEM_READY";
  989. case CNSS_DRIVER_EVENT_FW_READY:
  990. return "FW_READY";
  991. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  992. return "COLD_BOOT_CAL_START";
  993. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  994. return "COLD_BOOT_CAL_DONE";
  995. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  996. return "REGISTER_DRIVER";
  997. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  998. return "UNREGISTER_DRIVER";
  999. case CNSS_DRIVER_EVENT_RECOVERY:
  1000. return "RECOVERY";
  1001. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1002. return "FORCE_FW_ASSERT";
  1003. case CNSS_DRIVER_EVENT_POWER_UP:
  1004. return "POWER_UP";
  1005. case CNSS_DRIVER_EVENT_POWER_DOWN:
  1006. return "POWER_DOWN";
  1007. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1008. return "IDLE_RESTART";
  1009. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1010. return "IDLE_SHUTDOWN";
  1011. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1012. return "IMS_WFC_CALL_IND";
  1013. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1014. return "WLFW_TWC_CFG_IND";
  1015. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1016. return "QDSS_TRACE_REQ_MEM";
  1017. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1018. return "FW_MEM_FILE_SAVE";
  1019. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1020. return "QDSS_TRACE_FREE";
  1021. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1022. return "QDSS_TRACE_REQ_DATA";
  1023. case CNSS_DRIVER_EVENT_MAX:
  1024. return "EVENT_MAX";
  1025. }
  1026. return "UNKNOWN";
  1027. };
  1028. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  1029. enum cnss_driver_event_type type,
  1030. u32 flags, void *data)
  1031. {
  1032. struct cnss_driver_event *event;
  1033. unsigned long irq_flags;
  1034. int gfp = GFP_KERNEL;
  1035. int ret = 0;
  1036. if (!plat_priv)
  1037. return -ENODEV;
  1038. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  1039. cnss_driver_event_to_str(type), type,
  1040. flags ? "-sync" : "", plat_priv->driver_state, flags);
  1041. if (type >= CNSS_DRIVER_EVENT_MAX) {
  1042. cnss_pr_err("Invalid Event type: %d, can't post", type);
  1043. return -EINVAL;
  1044. }
  1045. if (in_interrupt() || irqs_disabled())
  1046. gfp = GFP_ATOMIC;
  1047. event = kzalloc(sizeof(*event), gfp);
  1048. if (!event)
  1049. return -ENOMEM;
  1050. cnss_pm_stay_awake(plat_priv);
  1051. event->type = type;
  1052. event->data = data;
  1053. init_completion(&event->complete);
  1054. event->ret = CNSS_EVENT_PENDING;
  1055. event->sync = !!(flags & CNSS_EVENT_SYNC);
  1056. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1057. list_add_tail(&event->list, &plat_priv->event_list);
  1058. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1059. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  1060. if (!(flags & CNSS_EVENT_SYNC))
  1061. goto out;
  1062. if (flags & CNSS_EVENT_UNKILLABLE)
  1063. wait_for_completion(&event->complete);
  1064. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  1065. ret = wait_for_completion_killable(&event->complete);
  1066. else
  1067. ret = wait_for_completion_interruptible(&event->complete);
  1068. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  1069. cnss_driver_event_to_str(type), type,
  1070. plat_priv->driver_state, ret, event->ret);
  1071. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1072. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  1073. event->sync = false;
  1074. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1075. ret = -EINTR;
  1076. goto out;
  1077. }
  1078. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1079. ret = event->ret;
  1080. kfree(event);
  1081. out:
  1082. cnss_pm_relax(plat_priv);
  1083. return ret;
  1084. }
  1085. /**
  1086. * cnss_get_timeout - Get timeout for corresponding type.
  1087. * @plat_priv: Pointer to platform driver context.
  1088. * @cnss_timeout_type: Timeout type.
  1089. *
  1090. * Return: Timeout in milliseconds.
  1091. */
  1092. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  1093. enum cnss_timeout_type timeout_type)
  1094. {
  1095. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  1096. switch (timeout_type) {
  1097. case CNSS_TIMEOUT_QMI:
  1098. return qmi_timeout;
  1099. case CNSS_TIMEOUT_POWER_UP:
  1100. return (qmi_timeout << 2);
  1101. case CNSS_TIMEOUT_IDLE_RESTART:
  1102. /* In idle restart power up sequence, we have fw_boot_timer to
  1103. * handle FW initialization failure.
  1104. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  1105. * account for FW dump collection and FW re-initialization on
  1106. * retry.
  1107. */
  1108. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  1109. case CNSS_TIMEOUT_CALIBRATION:
  1110. /* Similar to mission mode, in CBC if FW init fails
  1111. * fw recovery is tried. Thus return 2x the CBC timeout.
  1112. */
  1113. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  1114. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  1115. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  1116. case CNSS_TIMEOUT_RDDM:
  1117. return CNSS_RDDM_TIMEOUT_MS;
  1118. case CNSS_TIMEOUT_RECOVERY:
  1119. return RECOVERY_TIMEOUT;
  1120. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  1121. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  1122. default:
  1123. return qmi_timeout;
  1124. }
  1125. }
  1126. unsigned int cnss_get_boot_timeout(struct device *dev)
  1127. {
  1128. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1129. if (!plat_priv) {
  1130. cnss_pr_err("plat_priv is NULL\n");
  1131. return 0;
  1132. }
  1133. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  1134. }
  1135. EXPORT_SYMBOL(cnss_get_boot_timeout);
  1136. int cnss_power_up(struct device *dev)
  1137. {
  1138. int ret = 0;
  1139. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1140. unsigned int timeout;
  1141. if (!plat_priv) {
  1142. cnss_pr_err("plat_priv is NULL\n");
  1143. return -ENODEV;
  1144. }
  1145. cnss_pr_dbg("Powering up device\n");
  1146. ret = cnss_driver_event_post(plat_priv,
  1147. CNSS_DRIVER_EVENT_POWER_UP,
  1148. CNSS_EVENT_SYNC, NULL);
  1149. if (ret)
  1150. goto out;
  1151. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1152. goto out;
  1153. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  1154. reinit_completion(&plat_priv->power_up_complete);
  1155. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1156. msecs_to_jiffies(timeout));
  1157. if (!ret) {
  1158. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  1159. timeout);
  1160. ret = -EAGAIN;
  1161. goto out;
  1162. }
  1163. return 0;
  1164. out:
  1165. return ret;
  1166. }
  1167. EXPORT_SYMBOL(cnss_power_up);
  1168. int cnss_power_down(struct device *dev)
  1169. {
  1170. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1171. if (!plat_priv) {
  1172. cnss_pr_err("plat_priv is NULL\n");
  1173. return -ENODEV;
  1174. }
  1175. cnss_pr_dbg("Powering down device\n");
  1176. return cnss_driver_event_post(plat_priv,
  1177. CNSS_DRIVER_EVENT_POWER_DOWN,
  1178. CNSS_EVENT_SYNC, NULL);
  1179. }
  1180. EXPORT_SYMBOL(cnss_power_down);
  1181. int cnss_idle_restart(struct device *dev)
  1182. {
  1183. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1184. unsigned int timeout;
  1185. int ret = 0;
  1186. if (!plat_priv) {
  1187. cnss_pr_err("plat_priv is NULL\n");
  1188. return -ENODEV;
  1189. }
  1190. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  1191. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  1192. return -EBUSY;
  1193. }
  1194. cnss_pr_dbg("Doing idle restart\n");
  1195. reinit_completion(&plat_priv->power_up_complete);
  1196. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1197. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1198. ret = -EINVAL;
  1199. goto out;
  1200. }
  1201. ret = cnss_driver_event_post(plat_priv,
  1202. CNSS_DRIVER_EVENT_IDLE_RESTART,
  1203. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1204. if (ret == -EINTR && plat_priv->device_id != QCA6174_DEVICE_ID)
  1205. cnss_pr_err("Idle restart has been interrupted but device power up is still in progress");
  1206. else if (ret)
  1207. goto out;
  1208. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1209. ret = cnss_bus_call_driver_probe(plat_priv);
  1210. goto out;
  1211. }
  1212. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  1213. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1214. msecs_to_jiffies(timeout));
  1215. if (plat_priv->power_up_error) {
  1216. ret = plat_priv->power_up_error;
  1217. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1218. cnss_pr_dbg("Power up error:%d, exiting\n",
  1219. plat_priv->power_up_error);
  1220. goto out;
  1221. }
  1222. if (!ret) {
  1223. /* This exception occurs after attempting retry of FW recovery.
  1224. * Thus we can safely power off the device.
  1225. */
  1226. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  1227. timeout);
  1228. ret = -ETIMEDOUT;
  1229. cnss_power_down(dev);
  1230. CNSS_ASSERT(0);
  1231. goto out;
  1232. }
  1233. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1234. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1235. del_timer(&plat_priv->fw_boot_timer);
  1236. ret = -EINVAL;
  1237. goto out;
  1238. }
  1239. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  1240. * non-DRV is supported only once after device reboots and before wifi
  1241. * is turned on. We do not allow switching back to DRV.
  1242. * To bring device back into DRV, user needs to reboot device.
  1243. */
  1244. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  1245. cnss_pr_dbg("DRV is disabled\n");
  1246. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  1247. }
  1248. mutex_unlock(&plat_priv->driver_ops_lock);
  1249. return 0;
  1250. out:
  1251. mutex_unlock(&plat_priv->driver_ops_lock);
  1252. return ret;
  1253. }
  1254. EXPORT_SYMBOL(cnss_idle_restart);
  1255. int cnss_idle_shutdown(struct device *dev)
  1256. {
  1257. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1258. if (!plat_priv) {
  1259. cnss_pr_err("plat_priv is NULL\n");
  1260. return -ENODEV;
  1261. }
  1262. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1263. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1264. return -EAGAIN;
  1265. }
  1266. cnss_pr_dbg("Doing idle shutdown\n");
  1267. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) ||
  1268. test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state)) {
  1269. cnss_pr_dbg("Recovery in progress. Ignore IDLE Shutdown\n");
  1270. return -EBUSY;
  1271. }
  1272. return cnss_driver_event_post(plat_priv,
  1273. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1274. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1275. }
  1276. EXPORT_SYMBOL(cnss_idle_shutdown);
  1277. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1278. {
  1279. int ret = 0;
  1280. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1281. if (ret < 0) {
  1282. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1283. goto out;
  1284. }
  1285. ret = cnss_get_clk(plat_priv);
  1286. if (ret) {
  1287. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1288. goto put_vreg;
  1289. }
  1290. ret = cnss_get_pinctrl(plat_priv);
  1291. if (ret) {
  1292. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1293. goto put_clk;
  1294. }
  1295. return 0;
  1296. put_clk:
  1297. cnss_put_clk(plat_priv);
  1298. put_vreg:
  1299. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1300. out:
  1301. return ret;
  1302. }
  1303. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1304. {
  1305. cnss_put_clk(plat_priv);
  1306. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1307. }
  1308. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1309. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1310. unsigned long code,
  1311. void *ss_handle)
  1312. {
  1313. struct cnss_plat_data *plat_priv =
  1314. container_of(nb, struct cnss_plat_data, modem_nb);
  1315. struct cnss_esoc_info *esoc_info;
  1316. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1317. if (!plat_priv)
  1318. return NOTIFY_DONE;
  1319. esoc_info = &plat_priv->esoc_info;
  1320. if (code == SUBSYS_AFTER_POWERUP)
  1321. esoc_info->modem_current_status = 1;
  1322. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1323. esoc_info->modem_current_status = 0;
  1324. else
  1325. return NOTIFY_DONE;
  1326. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1327. esoc_info->modem_current_status))
  1328. return NOTIFY_DONE;
  1329. return NOTIFY_OK;
  1330. }
  1331. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1332. {
  1333. int ret = 0;
  1334. struct device *dev;
  1335. struct cnss_esoc_info *esoc_info;
  1336. struct esoc_desc *esoc_desc;
  1337. const char *client_desc;
  1338. dev = &plat_priv->plat_dev->dev;
  1339. esoc_info = &plat_priv->esoc_info;
  1340. esoc_info->notify_modem_status =
  1341. of_property_read_bool(dev->of_node,
  1342. "qcom,notify-modem-status");
  1343. if (!esoc_info->notify_modem_status)
  1344. goto out;
  1345. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1346. &client_desc);
  1347. if (ret) {
  1348. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1349. } else {
  1350. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1351. if (IS_ERR_OR_NULL(esoc_desc)) {
  1352. ret = PTR_RET(esoc_desc);
  1353. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1354. ret);
  1355. goto out;
  1356. }
  1357. esoc_info->esoc_desc = esoc_desc;
  1358. }
  1359. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1360. esoc_info->modem_current_status = 0;
  1361. esoc_info->modem_notify_handler =
  1362. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1363. esoc_info->esoc_desc->name :
  1364. "modem", &plat_priv->modem_nb);
  1365. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1366. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1367. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1368. ret);
  1369. goto unreg_esoc;
  1370. }
  1371. return 0;
  1372. unreg_esoc:
  1373. if (esoc_info->esoc_desc)
  1374. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1375. out:
  1376. return ret;
  1377. }
  1378. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1379. {
  1380. struct device *dev;
  1381. struct cnss_esoc_info *esoc_info;
  1382. dev = &plat_priv->plat_dev->dev;
  1383. esoc_info = &plat_priv->esoc_info;
  1384. if (esoc_info->notify_modem_status)
  1385. subsys_notif_unregister_notifier
  1386. (esoc_info->modem_notify_handler,
  1387. &plat_priv->modem_nb);
  1388. if (esoc_info->esoc_desc)
  1389. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1390. }
  1391. #else
  1392. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1393. {
  1394. return 0;
  1395. }
  1396. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1397. #endif
  1398. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1399. {
  1400. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1401. int ret = 0;
  1402. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1403. return 0;
  1404. enable_irq(sol_gpio->dev_sol_irq);
  1405. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1406. if (ret)
  1407. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1408. ret);
  1409. return ret;
  1410. }
  1411. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1412. {
  1413. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1414. int ret = 0;
  1415. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1416. return 0;
  1417. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1418. if (ret)
  1419. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1420. ret);
  1421. disable_irq(sol_gpio->dev_sol_irq);
  1422. return ret;
  1423. }
  1424. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1425. {
  1426. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1427. if (sol_gpio->dev_sol_gpio < 0)
  1428. return -EINVAL;
  1429. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1430. }
  1431. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1432. {
  1433. struct cnss_plat_data *plat_priv = data;
  1434. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1435. sol_gpio->dev_sol_counter++;
  1436. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u\n",
  1437. irq, sol_gpio->dev_sol_counter);
  1438. /* Make sure abort current suspend */
  1439. cnss_pm_stay_awake(plat_priv);
  1440. cnss_pm_relax(plat_priv);
  1441. pm_system_wakeup();
  1442. cnss_bus_handle_dev_sol_irq(plat_priv);
  1443. return IRQ_HANDLED;
  1444. }
  1445. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1446. {
  1447. struct device *dev = &plat_priv->plat_dev->dev;
  1448. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1449. int ret = 0;
  1450. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1451. "wlan-dev-sol-gpio", 0);
  1452. if (sol_gpio->dev_sol_gpio < 0)
  1453. goto out;
  1454. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1455. sol_gpio->dev_sol_gpio);
  1456. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1457. if (ret) {
  1458. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1459. ret);
  1460. goto out;
  1461. }
  1462. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1463. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1464. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1465. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1466. if (ret) {
  1467. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1468. goto free_gpio;
  1469. }
  1470. return 0;
  1471. free_gpio:
  1472. gpio_free(sol_gpio->dev_sol_gpio);
  1473. out:
  1474. return ret;
  1475. }
  1476. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1477. {
  1478. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1479. if (sol_gpio->dev_sol_gpio < 0)
  1480. return;
  1481. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1482. gpio_free(sol_gpio->dev_sol_gpio);
  1483. }
  1484. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1485. {
  1486. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1487. if (sol_gpio->host_sol_gpio < 0)
  1488. return -EINVAL;
  1489. if (value)
  1490. cnss_pr_dbg("Assert host SOL GPIO\n");
  1491. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1492. return 0;
  1493. }
  1494. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1495. {
  1496. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1497. if (sol_gpio->host_sol_gpio < 0)
  1498. return -EINVAL;
  1499. return gpio_get_value(sol_gpio->host_sol_gpio);
  1500. }
  1501. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1502. {
  1503. struct device *dev = &plat_priv->plat_dev->dev;
  1504. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1505. int ret = 0;
  1506. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1507. "wlan-host-sol-gpio", 0);
  1508. if (sol_gpio->host_sol_gpio < 0)
  1509. goto out;
  1510. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1511. sol_gpio->host_sol_gpio);
  1512. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1513. if (ret) {
  1514. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1515. ret);
  1516. goto out;
  1517. }
  1518. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1519. return 0;
  1520. out:
  1521. return ret;
  1522. }
  1523. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1524. {
  1525. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1526. if (sol_gpio->host_sol_gpio < 0)
  1527. return;
  1528. gpio_free(sol_gpio->host_sol_gpio);
  1529. }
  1530. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1531. {
  1532. int ret;
  1533. ret = cnss_init_dev_sol_gpio(plat_priv);
  1534. if (ret)
  1535. goto out;
  1536. ret = cnss_init_host_sol_gpio(plat_priv);
  1537. if (ret)
  1538. goto deinit_dev_sol;
  1539. return 0;
  1540. deinit_dev_sol:
  1541. cnss_deinit_dev_sol_gpio(plat_priv);
  1542. out:
  1543. return ret;
  1544. }
  1545. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1546. {
  1547. cnss_deinit_host_sol_gpio(plat_priv);
  1548. cnss_deinit_dev_sol_gpio(plat_priv);
  1549. }
  1550. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1551. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1552. {
  1553. struct cnss_plat_data *plat_priv;
  1554. int ret = 0;
  1555. if (!subsys_desc->dev) {
  1556. cnss_pr_err("dev from subsys_desc is NULL\n");
  1557. return -ENODEV;
  1558. }
  1559. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1560. if (!plat_priv) {
  1561. cnss_pr_err("plat_priv is NULL\n");
  1562. return -ENODEV;
  1563. }
  1564. if (!plat_priv->driver_state) {
  1565. cnss_pr_dbg("subsys powerup is ignored\n");
  1566. return 0;
  1567. }
  1568. ret = cnss_bus_dev_powerup(plat_priv);
  1569. if (ret)
  1570. __pm_relax(plat_priv->recovery_ws);
  1571. return ret;
  1572. }
  1573. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1574. bool force_stop)
  1575. {
  1576. struct cnss_plat_data *plat_priv;
  1577. if (!subsys_desc->dev) {
  1578. cnss_pr_err("dev from subsys_desc is NULL\n");
  1579. return -ENODEV;
  1580. }
  1581. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1582. if (!plat_priv) {
  1583. cnss_pr_err("plat_priv is NULL\n");
  1584. return -ENODEV;
  1585. }
  1586. if (!plat_priv->driver_state) {
  1587. cnss_pr_dbg("subsys shutdown is ignored\n");
  1588. return 0;
  1589. }
  1590. return cnss_bus_dev_shutdown(plat_priv);
  1591. }
  1592. void cnss_device_crashed(struct device *dev)
  1593. {
  1594. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1595. struct cnss_subsys_info *subsys_info;
  1596. if (!plat_priv)
  1597. return;
  1598. subsys_info = &plat_priv->subsys_info;
  1599. if (subsys_info->subsys_device) {
  1600. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1601. subsys_set_crash_status(subsys_info->subsys_device, true);
  1602. subsystem_restart_dev(subsys_info->subsys_device);
  1603. }
  1604. }
  1605. EXPORT_SYMBOL(cnss_device_crashed);
  1606. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1607. {
  1608. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1609. if (!plat_priv) {
  1610. cnss_pr_err("plat_priv is NULL\n");
  1611. return;
  1612. }
  1613. cnss_bus_dev_crash_shutdown(plat_priv);
  1614. }
  1615. static int cnss_subsys_ramdump(int enable,
  1616. const struct subsys_desc *subsys_desc)
  1617. {
  1618. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1619. if (!plat_priv) {
  1620. cnss_pr_err("plat_priv is NULL\n");
  1621. return -ENODEV;
  1622. }
  1623. if (!enable)
  1624. return 0;
  1625. return cnss_bus_dev_ramdump(plat_priv);
  1626. }
  1627. static void cnss_recovery_work_handler(struct work_struct *work)
  1628. {
  1629. }
  1630. #else
  1631. void cnss_recovery_handler(struct cnss_plat_data *plat_priv)
  1632. {
  1633. int ret;
  1634. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1635. if (!plat_priv->recovery_enabled)
  1636. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1637. cnss_bus_dev_shutdown(plat_priv);
  1638. cnss_bus_dev_ramdump(plat_priv);
  1639. /* If recovery is triggered before Host driver registration,
  1640. * avoid device power up because eventually device will be
  1641. * power up as part of driver registration.
  1642. */
  1643. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1644. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1645. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1646. plat_priv->driver_state);
  1647. return;
  1648. }
  1649. msleep(POWER_RESET_MIN_DELAY_MS);
  1650. ret = cnss_bus_dev_powerup(plat_priv);
  1651. if (ret) {
  1652. __pm_relax(plat_priv->recovery_ws);
  1653. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1654. }
  1655. return;
  1656. }
  1657. static void cnss_recovery_work_handler(struct work_struct *work)
  1658. {
  1659. struct cnss_plat_data *plat_priv =
  1660. container_of(work, struct cnss_plat_data, recovery_work);
  1661. cnss_recovery_handler(plat_priv);
  1662. }
  1663. void cnss_device_crashed(struct device *dev)
  1664. {
  1665. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1666. if (!plat_priv)
  1667. return;
  1668. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1669. schedule_work(&plat_priv->recovery_work);
  1670. }
  1671. EXPORT_SYMBOL(cnss_device_crashed);
  1672. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1673. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1674. {
  1675. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1676. struct cnss_ramdump_info *ramdump_info;
  1677. if (!plat_priv)
  1678. return NULL;
  1679. ramdump_info = &plat_priv->ramdump_info;
  1680. *size = ramdump_info->ramdump_size;
  1681. return ramdump_info->ramdump_va;
  1682. }
  1683. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1684. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1685. {
  1686. switch (reason) {
  1687. case CNSS_REASON_DEFAULT:
  1688. return "DEFAULT";
  1689. case CNSS_REASON_LINK_DOWN:
  1690. return "LINK_DOWN";
  1691. case CNSS_REASON_RDDM:
  1692. return "RDDM";
  1693. case CNSS_REASON_TIMEOUT:
  1694. return "TIMEOUT";
  1695. }
  1696. return "UNKNOWN";
  1697. };
  1698. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1699. enum cnss_recovery_reason reason)
  1700. {
  1701. int ret;
  1702. plat_priv->recovery_count++;
  1703. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1704. goto self_recovery;
  1705. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1706. cnss_pr_dbg("Skip device recovery\n");
  1707. return 0;
  1708. }
  1709. /* FW recovery sequence has multiple steps and firmware load requires
  1710. * linux PM in awake state. Thus hold the cnss wake source until
  1711. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1712. * time taken in this process.
  1713. */
  1714. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1715. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1716. true);
  1717. switch (reason) {
  1718. case CNSS_REASON_LINK_DOWN:
  1719. if (!cnss_bus_check_link_status(plat_priv)) {
  1720. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1721. return 0;
  1722. }
  1723. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1724. &plat_priv->ctrl_params.quirks))
  1725. goto self_recovery;
  1726. if (!cnss_bus_recover_link_down(plat_priv)) {
  1727. /* clear recovery bit here to avoid skipping
  1728. * the recovery work for RDDM later
  1729. */
  1730. clear_bit(CNSS_DRIVER_RECOVERY,
  1731. &plat_priv->driver_state);
  1732. return 0;
  1733. }
  1734. break;
  1735. case CNSS_REASON_RDDM:
  1736. cnss_bus_collect_dump_info(plat_priv, false);
  1737. break;
  1738. case CNSS_REASON_DEFAULT:
  1739. case CNSS_REASON_TIMEOUT:
  1740. break;
  1741. default:
  1742. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1743. cnss_recovery_reason_to_str(reason), reason);
  1744. break;
  1745. }
  1746. cnss_bus_device_crashed(plat_priv);
  1747. return 0;
  1748. self_recovery:
  1749. cnss_pr_dbg("Going for self recovery\n");
  1750. cnss_bus_dev_shutdown(plat_priv);
  1751. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1752. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1753. &plat_priv->ctrl_params.quirks);
  1754. /* If link down self recovery is triggered before Host driver
  1755. * registration, avoid device power up because eventually device
  1756. * will be power up as part of driver registration.
  1757. */
  1758. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1759. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1760. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1761. plat_priv->driver_state);
  1762. return 0;
  1763. }
  1764. ret = cnss_bus_dev_powerup(plat_priv);
  1765. if (ret)
  1766. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1767. return 0;
  1768. }
  1769. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1770. void *data)
  1771. {
  1772. struct cnss_recovery_data *recovery_data = data;
  1773. int ret = 0;
  1774. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1775. cnss_recovery_reason_to_str(recovery_data->reason),
  1776. recovery_data->reason);
  1777. if (!plat_priv->driver_state) {
  1778. cnss_pr_err("Improper driver state, ignore recovery\n");
  1779. ret = -EINVAL;
  1780. goto out;
  1781. }
  1782. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1783. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1784. ret = -EINVAL;
  1785. goto out;
  1786. }
  1787. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1788. cnss_pr_err("Recovery is already in progress\n");
  1789. CNSS_ASSERT(0);
  1790. ret = -EINVAL;
  1791. goto out;
  1792. }
  1793. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1794. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1795. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1796. ret = -EINVAL;
  1797. goto out;
  1798. }
  1799. switch (plat_priv->device_id) {
  1800. case QCA6174_DEVICE_ID:
  1801. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1802. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1803. &plat_priv->driver_state)) {
  1804. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1805. ret = -EINVAL;
  1806. goto out;
  1807. }
  1808. break;
  1809. default:
  1810. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1811. set_bit(CNSS_FW_BOOT_RECOVERY,
  1812. &plat_priv->driver_state);
  1813. }
  1814. break;
  1815. }
  1816. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1817. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1818. out:
  1819. kfree(data);
  1820. return ret;
  1821. }
  1822. int cnss_self_recovery(struct device *dev,
  1823. enum cnss_recovery_reason reason)
  1824. {
  1825. cnss_schedule_recovery(dev, reason);
  1826. return 0;
  1827. }
  1828. EXPORT_SYMBOL(cnss_self_recovery);
  1829. void cnss_schedule_recovery(struct device *dev,
  1830. enum cnss_recovery_reason reason)
  1831. {
  1832. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1833. struct cnss_recovery_data *data;
  1834. int gfp = GFP_KERNEL;
  1835. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1836. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1837. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1838. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1839. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1840. return;
  1841. }
  1842. if (in_interrupt() || irqs_disabled())
  1843. gfp = GFP_ATOMIC;
  1844. data = kzalloc(sizeof(*data), gfp);
  1845. if (!data)
  1846. return;
  1847. data->reason = reason;
  1848. cnss_driver_event_post(plat_priv,
  1849. CNSS_DRIVER_EVENT_RECOVERY,
  1850. 0, data);
  1851. }
  1852. EXPORT_SYMBOL(cnss_schedule_recovery);
  1853. int cnss_force_fw_assert(struct device *dev)
  1854. {
  1855. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1856. if (!plat_priv) {
  1857. cnss_pr_err("plat_priv is NULL\n");
  1858. return -ENODEV;
  1859. }
  1860. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1861. cnss_pr_info("Forced FW assert is not supported\n");
  1862. return -EOPNOTSUPP;
  1863. }
  1864. if (cnss_bus_is_device_down(plat_priv)) {
  1865. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1866. return 0;
  1867. }
  1868. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1869. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1870. return 0;
  1871. }
  1872. if (in_interrupt() || irqs_disabled())
  1873. cnss_driver_event_post(plat_priv,
  1874. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1875. 0, NULL);
  1876. else
  1877. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1878. return 0;
  1879. }
  1880. EXPORT_SYMBOL(cnss_force_fw_assert);
  1881. int cnss_force_collect_rddm(struct device *dev)
  1882. {
  1883. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1884. unsigned int timeout;
  1885. int ret = 0;
  1886. if (!plat_priv) {
  1887. cnss_pr_err("plat_priv is NULL\n");
  1888. return -ENODEV;
  1889. }
  1890. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1891. cnss_pr_info("Force collect rddm is not supported\n");
  1892. return -EOPNOTSUPP;
  1893. }
  1894. if (cnss_bus_is_device_down(plat_priv)) {
  1895. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1896. goto wait_rddm;
  1897. }
  1898. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1899. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1900. goto wait_rddm;
  1901. }
  1902. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1903. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1904. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1905. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1906. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1907. return 0;
  1908. }
  1909. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1910. if (ret)
  1911. return ret;
  1912. wait_rddm:
  1913. reinit_completion(&plat_priv->rddm_complete);
  1914. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1915. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1916. msecs_to_jiffies(timeout));
  1917. if (!ret) {
  1918. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1919. timeout);
  1920. ret = -ETIMEDOUT;
  1921. } else if (ret > 0) {
  1922. ret = 0;
  1923. }
  1924. return ret;
  1925. }
  1926. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1927. int cnss_qmi_send_get(struct device *dev)
  1928. {
  1929. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1930. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1931. return 0;
  1932. return cnss_bus_qmi_send_get(plat_priv);
  1933. }
  1934. EXPORT_SYMBOL(cnss_qmi_send_get);
  1935. int cnss_qmi_send_put(struct device *dev)
  1936. {
  1937. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1938. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1939. return 0;
  1940. return cnss_bus_qmi_send_put(plat_priv);
  1941. }
  1942. EXPORT_SYMBOL(cnss_qmi_send_put);
  1943. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  1944. int cmd_len, void *cb_ctx,
  1945. int (*cb)(void *ctx, void *event, int event_len))
  1946. {
  1947. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1948. int ret;
  1949. if (!plat_priv)
  1950. return -ENODEV;
  1951. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1952. return -EINVAL;
  1953. plat_priv->get_info_cb = cb;
  1954. plat_priv->get_info_cb_ctx = cb_ctx;
  1955. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  1956. if (ret) {
  1957. plat_priv->get_info_cb = NULL;
  1958. plat_priv->get_info_cb_ctx = NULL;
  1959. }
  1960. return ret;
  1961. }
  1962. EXPORT_SYMBOL(cnss_qmi_send);
  1963. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  1964. {
  1965. int ret = 0;
  1966. u32 retry = 0, timeout;
  1967. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  1968. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  1969. goto out;
  1970. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1971. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  1972. goto out;
  1973. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  1974. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  1975. goto out;
  1976. }
  1977. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1978. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  1979. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1980. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  1981. CNSS_ASSERT(0);
  1982. return -EINVAL;
  1983. }
  1984. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1985. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  1986. break;
  1987. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  1988. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  1989. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  1990. CNSS_ASSERT(0);
  1991. ret = -EINVAL;
  1992. goto mark_cal_fail;
  1993. }
  1994. }
  1995. switch (plat_priv->device_id) {
  1996. case QCA6290_DEVICE_ID:
  1997. case QCA6390_DEVICE_ID:
  1998. case QCA6490_DEVICE_ID:
  1999. case KIWI_DEVICE_ID:
  2000. case MANGO_DEVICE_ID:
  2001. case PEACH_DEVICE_ID:
  2002. break;
  2003. default:
  2004. cnss_pr_err("Not supported for device ID 0x%lx\n",
  2005. plat_priv->device_id);
  2006. ret = -EINVAL;
  2007. goto mark_cal_fail;
  2008. }
  2009. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2010. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  2011. timeout = cnss_get_timeout(plat_priv,
  2012. CNSS_TIMEOUT_CALIBRATION);
  2013. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  2014. timeout / 1000);
  2015. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2016. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2017. msecs_to_jiffies(timeout));
  2018. }
  2019. reinit_completion(&plat_priv->cal_complete);
  2020. ret = cnss_bus_dev_powerup(plat_priv);
  2021. mark_cal_fail:
  2022. if (ret) {
  2023. complete(&plat_priv->cal_complete);
  2024. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2025. /* Set CBC done in driver state to mark attempt and note error
  2026. * since calibration cannot be retried at boot.
  2027. */
  2028. plat_priv->cal_done = CNSS_CAL_FAILURE;
  2029. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2030. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  2031. plat_priv->device_id == QCN7605_DEVICE_ID) {
  2032. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2033. goto out;
  2034. cnss_pr_info("Schedule WLAN driver load\n");
  2035. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2036. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2037. 0);
  2038. }
  2039. }
  2040. out:
  2041. return ret;
  2042. }
  2043. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  2044. void *data)
  2045. {
  2046. struct cnss_cal_info *cal_info = data;
  2047. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  2048. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  2049. goto out;
  2050. switch (cal_info->cal_status) {
  2051. case CNSS_CAL_DONE:
  2052. cnss_pr_dbg("Calibration completed successfully\n");
  2053. plat_priv->cal_done = true;
  2054. break;
  2055. case CNSS_CAL_TIMEOUT:
  2056. case CNSS_CAL_FAILURE:
  2057. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  2058. cal_info->cal_status);
  2059. break;
  2060. default:
  2061. cnss_pr_err("Unknown calibration status: %u\n",
  2062. cal_info->cal_status);
  2063. break;
  2064. }
  2065. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  2066. cnss_bus_free_qdss_mem(plat_priv);
  2067. cnss_release_antenna_sharing(plat_priv);
  2068. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  2069. goto skip_shutdown;
  2070. cnss_bus_dev_shutdown(plat_priv);
  2071. msleep(POWER_RESET_MIN_DELAY_MS);
  2072. skip_shutdown:
  2073. complete(&plat_priv->cal_complete);
  2074. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2075. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2076. if (cal_info->cal_status == CNSS_CAL_DONE) {
  2077. cnss_cal_mem_upload_to_file(plat_priv);
  2078. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2079. goto out;
  2080. cnss_pr_dbg("Schedule WLAN driver load\n");
  2081. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2082. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2083. 0);
  2084. }
  2085. out:
  2086. kfree(data);
  2087. return 0;
  2088. }
  2089. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  2090. {
  2091. int ret;
  2092. ret = cnss_bus_dev_powerup(plat_priv);
  2093. if (ret)
  2094. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  2095. return ret;
  2096. }
  2097. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  2098. {
  2099. cnss_bus_dev_shutdown(plat_priv);
  2100. return 0;
  2101. }
  2102. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  2103. {
  2104. int ret = 0;
  2105. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  2106. if (ret < 0)
  2107. return ret;
  2108. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  2109. }
  2110. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  2111. u32 mem_seg_len, u64 pa, u32 size)
  2112. {
  2113. int i = 0;
  2114. u64 offset = 0;
  2115. void *va = NULL;
  2116. u64 local_pa;
  2117. u32 local_size;
  2118. for (i = 0; i < mem_seg_len; i++) {
  2119. if (i == QMI_WLFW_MEM_LPASS_SHARED_V01)
  2120. continue;
  2121. local_pa = (u64)fw_mem[i].pa;
  2122. local_size = (u32)fw_mem[i].size;
  2123. if (pa == local_pa && size <= local_size) {
  2124. va = fw_mem[i].va;
  2125. break;
  2126. }
  2127. if (pa > local_pa &&
  2128. pa < local_pa + local_size &&
  2129. pa + size <= local_pa + local_size) {
  2130. offset = pa - local_pa;
  2131. va = fw_mem[i].va + offset;
  2132. break;
  2133. }
  2134. }
  2135. return va;
  2136. }
  2137. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  2138. void *data)
  2139. {
  2140. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2141. struct cnss_fw_mem *fw_mem_seg;
  2142. int ret = 0L;
  2143. void *va = NULL;
  2144. u32 i, fw_mem_seg_len;
  2145. switch (event_data->mem_type) {
  2146. case QMI_WLFW_MEM_TYPE_DDR_V01:
  2147. if (!plat_priv->fw_mem_seg_len)
  2148. goto invalid_mem_save;
  2149. fw_mem_seg = plat_priv->fw_mem;
  2150. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  2151. break;
  2152. case QMI_WLFW_MEM_QDSS_V01:
  2153. if (!plat_priv->qdss_mem_seg_len)
  2154. goto invalid_mem_save;
  2155. fw_mem_seg = plat_priv->qdss_mem;
  2156. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  2157. break;
  2158. default:
  2159. goto invalid_mem_save;
  2160. }
  2161. for (i = 0; i < event_data->mem_seg_len; i++) {
  2162. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  2163. event_data->mem_seg[i].addr,
  2164. event_data->mem_seg[i].size);
  2165. if (!va) {
  2166. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  2167. &event_data->mem_seg[i].addr,
  2168. event_data->mem_type);
  2169. ret = -EINVAL;
  2170. break;
  2171. }
  2172. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  2173. event_data->file_name,
  2174. event_data->mem_seg[i].size);
  2175. if (ret < 0) {
  2176. cnss_pr_err("Fail to save fw mem data: %d\n",
  2177. ret);
  2178. break;
  2179. }
  2180. }
  2181. kfree(data);
  2182. return ret;
  2183. invalid_mem_save:
  2184. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  2185. event_data->mem_type);
  2186. kfree(data);
  2187. return -EINVAL;
  2188. }
  2189. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  2190. {
  2191. cnss_bus_free_qdss_mem(plat_priv);
  2192. return 0;
  2193. }
  2194. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  2195. void *data)
  2196. {
  2197. int ret = 0;
  2198. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2199. if (!plat_priv)
  2200. return -ENODEV;
  2201. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  2202. event_data->total_size);
  2203. kfree(data);
  2204. return ret;
  2205. }
  2206. static void cnss_driver_event_work(struct work_struct *work)
  2207. {
  2208. struct cnss_plat_data *plat_priv =
  2209. container_of(work, struct cnss_plat_data, event_work);
  2210. struct cnss_driver_event *event;
  2211. unsigned long flags;
  2212. int ret = 0;
  2213. if (!plat_priv) {
  2214. cnss_pr_err("plat_priv is NULL!\n");
  2215. return;
  2216. }
  2217. cnss_pm_stay_awake(plat_priv);
  2218. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2219. while (!list_empty(&plat_priv->event_list)) {
  2220. event = list_first_entry(&plat_priv->event_list,
  2221. struct cnss_driver_event, list);
  2222. list_del(&event->list);
  2223. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2224. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  2225. cnss_driver_event_to_str(event->type),
  2226. event->sync ? "-sync" : "", event->type,
  2227. plat_priv->driver_state);
  2228. switch (event->type) {
  2229. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  2230. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  2231. break;
  2232. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  2233. ret = cnss_wlfw_server_exit(plat_priv);
  2234. break;
  2235. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  2236. ret = cnss_bus_alloc_fw_mem(plat_priv);
  2237. if (ret)
  2238. break;
  2239. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  2240. break;
  2241. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  2242. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  2243. break;
  2244. case CNSS_DRIVER_EVENT_FW_READY:
  2245. ret = cnss_fw_ready_hdlr(plat_priv);
  2246. break;
  2247. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  2248. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  2249. break;
  2250. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  2251. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  2252. event->data);
  2253. break;
  2254. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  2255. ret = cnss_bus_register_driver_hdlr(plat_priv,
  2256. event->data);
  2257. break;
  2258. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  2259. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  2260. break;
  2261. case CNSS_DRIVER_EVENT_RECOVERY:
  2262. ret = cnss_driver_recovery_hdlr(plat_priv,
  2263. event->data);
  2264. break;
  2265. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  2266. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  2267. break;
  2268. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  2269. set_bit(CNSS_DRIVER_IDLE_RESTART,
  2270. &plat_priv->driver_state);
  2271. fallthrough;
  2272. case CNSS_DRIVER_EVENT_POWER_UP:
  2273. ret = cnss_power_up_hdlr(plat_priv);
  2274. break;
  2275. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  2276. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2277. &plat_priv->driver_state);
  2278. fallthrough;
  2279. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2280. ret = cnss_power_down_hdlr(plat_priv);
  2281. break;
  2282. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2283. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2284. event->data);
  2285. break;
  2286. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2287. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2288. event->data);
  2289. break;
  2290. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2291. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2292. break;
  2293. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2294. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2295. event->data);
  2296. break;
  2297. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2298. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2299. break;
  2300. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2301. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2302. event->data);
  2303. break;
  2304. default:
  2305. cnss_pr_err("Invalid driver event type: %d",
  2306. event->type);
  2307. kfree(event);
  2308. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2309. continue;
  2310. }
  2311. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2312. if (event->sync) {
  2313. event->ret = ret;
  2314. complete(&event->complete);
  2315. continue;
  2316. }
  2317. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2318. kfree(event);
  2319. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2320. }
  2321. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2322. cnss_pm_relax(plat_priv);
  2323. }
  2324. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2325. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2326. {
  2327. int ret = 0;
  2328. struct cnss_subsys_info *subsys_info;
  2329. subsys_info = &plat_priv->subsys_info;
  2330. subsys_info->subsys_desc.name = plat_priv->device_name;
  2331. subsys_info->subsys_desc.owner = THIS_MODULE;
  2332. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2333. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2334. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2335. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2336. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2337. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2338. if (IS_ERR(subsys_info->subsys_device)) {
  2339. ret = PTR_ERR(subsys_info->subsys_device);
  2340. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2341. goto out;
  2342. }
  2343. subsys_info->subsys_handle =
  2344. subsystem_get(subsys_info->subsys_desc.name);
  2345. if (!subsys_info->subsys_handle) {
  2346. cnss_pr_err("Failed to get subsys_handle!\n");
  2347. ret = -EINVAL;
  2348. goto unregister_subsys;
  2349. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2350. ret = PTR_ERR(subsys_info->subsys_handle);
  2351. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2352. goto unregister_subsys;
  2353. }
  2354. return 0;
  2355. unregister_subsys:
  2356. subsys_unregister(subsys_info->subsys_device);
  2357. out:
  2358. return ret;
  2359. }
  2360. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2361. {
  2362. struct cnss_subsys_info *subsys_info;
  2363. subsys_info = &plat_priv->subsys_info;
  2364. subsystem_put(subsys_info->subsys_handle);
  2365. subsys_unregister(subsys_info->subsys_device);
  2366. }
  2367. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2368. {
  2369. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2370. return create_ramdump_device(subsys_info->subsys_desc.name,
  2371. subsys_info->subsys_desc.dev);
  2372. }
  2373. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2374. void *ramdump_dev)
  2375. {
  2376. destroy_ramdump_device(ramdump_dev);
  2377. }
  2378. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2379. {
  2380. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2381. struct ramdump_segment segment;
  2382. memset(&segment, 0, sizeof(segment));
  2383. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2384. segment.size = ramdump_info->ramdump_size;
  2385. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2386. }
  2387. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2388. {
  2389. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2390. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2391. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2392. struct ramdump_segment *ramdump_segs, *s;
  2393. struct cnss_dump_meta_info meta_info = {0};
  2394. int i, ret = 0;
  2395. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2396. sizeof(*ramdump_segs),
  2397. GFP_KERNEL);
  2398. if (!ramdump_segs)
  2399. return -ENOMEM;
  2400. s = ramdump_segs + 1;
  2401. for (i = 0; i < dump_data->nentries; i++) {
  2402. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2403. cnss_pr_err("Unsupported dump type: %d",
  2404. dump_seg->type);
  2405. continue;
  2406. }
  2407. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2408. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2409. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2410. }
  2411. meta_info.entry[dump_seg->type].entry_num++;
  2412. s->address = dump_seg->address;
  2413. s->v_address = (void __iomem *)dump_seg->v_address;
  2414. s->size = dump_seg->size;
  2415. s++;
  2416. dump_seg++;
  2417. }
  2418. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2419. meta_info.version = CNSS_RAMDUMP_VERSION;
  2420. meta_info.chipset = plat_priv->device_id;
  2421. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2422. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2423. ramdump_segs->size = sizeof(meta_info);
  2424. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2425. dump_data->nentries + 1);
  2426. kfree(ramdump_segs);
  2427. return ret;
  2428. }
  2429. #else
  2430. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2431. void *data)
  2432. {
  2433. struct cnss_plat_data *plat_priv =
  2434. container_of(nb, struct cnss_plat_data, panic_nb);
  2435. cnss_bus_dev_crash_shutdown(plat_priv);
  2436. return NOTIFY_DONE;
  2437. }
  2438. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2439. {
  2440. int ret;
  2441. if (!plat_priv)
  2442. return -ENODEV;
  2443. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2444. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2445. &plat_priv->panic_nb);
  2446. if (ret) {
  2447. cnss_pr_err("Failed to register panic handler\n");
  2448. return -EINVAL;
  2449. }
  2450. return 0;
  2451. }
  2452. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2453. {
  2454. int ret;
  2455. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2456. &plat_priv->panic_nb);
  2457. if (ret)
  2458. cnss_pr_err("Failed to unregister panic handler\n");
  2459. }
  2460. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2461. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2462. {
  2463. return &plat_priv->plat_dev->dev;
  2464. }
  2465. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2466. void *ramdump_dev)
  2467. {
  2468. }
  2469. #endif
  2470. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2471. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2472. {
  2473. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2474. struct qcom_dump_segment segment;
  2475. struct list_head head;
  2476. INIT_LIST_HEAD(&head);
  2477. memset(&segment, 0, sizeof(segment));
  2478. segment.va = ramdump_info->ramdump_va;
  2479. segment.size = ramdump_info->ramdump_size;
  2480. list_add(&segment.node, &head);
  2481. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2482. }
  2483. #else
  2484. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2485. {
  2486. return 0;
  2487. }
  2488. /* Using completion event inside dynamically allocated ramdump_desc
  2489. * may result a race between freeing the event after setting it to
  2490. * complete inside dev coredump free callback and the thread that is
  2491. * waiting for completion.
  2492. */
  2493. DECLARE_COMPLETION(dump_done);
  2494. #define TIMEOUT_SAVE_DUMP_MS 30000
  2495. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2496. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2497. { \
  2498. if (class == ELFCLASS32) \
  2499. return sizeof(struct elf32_##__xhdr); \
  2500. else \
  2501. return sizeof(struct elf64_##__xhdr); \
  2502. }
  2503. SIZEOF_ELF_STRUCT(phdr)
  2504. SIZEOF_ELF_STRUCT(hdr)
  2505. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2506. do { \
  2507. if (class == ELFCLASS32) \
  2508. ((struct elf32_##__xhdr *)arg)->member = value; \
  2509. else \
  2510. ((struct elf64_##__xhdr *)arg)->member = value; \
  2511. } while (0)
  2512. #define set_ehdr_property(arg, class, member, value) \
  2513. set_xhdr_property(hdr, arg, class, member, value)
  2514. #define set_phdr_property(arg, class, member, value) \
  2515. set_xhdr_property(phdr, arg, class, member, value)
  2516. /* These replace qcom_ramdump driver APIs called from common API
  2517. * cnss_do_elf_dump() by the ones defined here.
  2518. */
  2519. #define qcom_dump_segment cnss_qcom_dump_segment
  2520. #define qcom_elf_dump cnss_qcom_elf_dump
  2521. #define dump_enabled cnss_dump_enabled
  2522. struct cnss_qcom_dump_segment {
  2523. struct list_head node;
  2524. dma_addr_t da;
  2525. void *va;
  2526. size_t size;
  2527. };
  2528. struct cnss_qcom_ramdump_desc {
  2529. void *data;
  2530. struct completion dump_done;
  2531. };
  2532. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2533. void *data, size_t datalen)
  2534. {
  2535. struct cnss_qcom_ramdump_desc *desc = data;
  2536. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2537. datalen);
  2538. }
  2539. static void cnss_qcom_devcd_freev(void *data)
  2540. {
  2541. struct cnss_qcom_ramdump_desc *desc = data;
  2542. cnss_pr_dbg("Free dump data for dev coredump\n");
  2543. complete(&dump_done);
  2544. vfree(desc->data);
  2545. kfree(desc);
  2546. }
  2547. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2548. gfp_t gfp)
  2549. {
  2550. struct cnss_qcom_ramdump_desc *desc;
  2551. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2552. int ret;
  2553. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2554. if (!desc)
  2555. return -ENOMEM;
  2556. desc->data = data;
  2557. reinit_completion(&dump_done);
  2558. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2559. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2560. ret = wait_for_completion_timeout(&dump_done,
  2561. msecs_to_jiffies(timeout));
  2562. if (!ret)
  2563. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2564. timeout);
  2565. return ret ? 0 : -ETIMEDOUT;
  2566. }
  2567. /* Since the elf32 and elf64 identification is identical apart from
  2568. * the class, use elf32 by default.
  2569. */
  2570. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2571. {
  2572. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2573. ehdr->e_ident[EI_CLASS] = class;
  2574. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2575. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2576. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2577. }
  2578. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2579. unsigned char class)
  2580. {
  2581. struct cnss_qcom_dump_segment *segment;
  2582. void *phdr, *ehdr;
  2583. size_t data_size, offset;
  2584. int phnum = 0;
  2585. void *data;
  2586. void __iomem *ptr;
  2587. if (!segs || list_empty(segs))
  2588. return -EINVAL;
  2589. data_size = sizeof_elf_hdr(class);
  2590. list_for_each_entry(segment, segs, node) {
  2591. data_size += sizeof_elf_phdr(class) + segment->size;
  2592. phnum++;
  2593. }
  2594. data = vmalloc(data_size);
  2595. if (!data)
  2596. return -ENOMEM;
  2597. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2598. ehdr = data;
  2599. memset(ehdr, 0, sizeof_elf_hdr(class));
  2600. init_elf_identification(ehdr, class);
  2601. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2602. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2603. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2604. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2605. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2606. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2607. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2608. phdr = data + sizeof_elf_hdr(class);
  2609. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2610. list_for_each_entry(segment, segs, node) {
  2611. memset(phdr, 0, sizeof_elf_phdr(class));
  2612. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2613. set_phdr_property(phdr, class, p_offset, offset);
  2614. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2615. set_phdr_property(phdr, class, p_paddr, segment->da);
  2616. set_phdr_property(phdr, class, p_filesz, segment->size);
  2617. set_phdr_property(phdr, class, p_memsz, segment->size);
  2618. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2619. set_phdr_property(phdr, class, p_align, 0);
  2620. if (segment->va) {
  2621. memcpy(data + offset, segment->va, segment->size);
  2622. } else {
  2623. ptr = devm_ioremap(dev, segment->da, segment->size);
  2624. if (!ptr) {
  2625. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2626. &segment->da, segment->size);
  2627. memset(data + offset, 0xff, segment->size);
  2628. } else {
  2629. memcpy_fromio(data + offset, ptr,
  2630. segment->size);
  2631. }
  2632. }
  2633. offset += segment->size;
  2634. phdr += sizeof_elf_phdr(class);
  2635. }
  2636. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2637. }
  2638. /* Saving dump to file system is always needed in this case. */
  2639. static bool cnss_dump_enabled(void)
  2640. {
  2641. return true;
  2642. }
  2643. #endif /* CONFIG_QCOM_RAMDUMP */
  2644. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2645. {
  2646. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2647. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2648. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2649. struct qcom_dump_segment *seg;
  2650. struct cnss_dump_meta_info meta_info = {0};
  2651. struct list_head head;
  2652. int i, ret = 0;
  2653. if (!dump_enabled()) {
  2654. cnss_pr_info("Dump collection is not enabled\n");
  2655. return ret;
  2656. }
  2657. INIT_LIST_HEAD(&head);
  2658. for (i = 0; i < dump_data->nentries; i++) {
  2659. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2660. cnss_pr_err("Unsupported dump type: %d",
  2661. dump_seg->type);
  2662. continue;
  2663. }
  2664. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2665. if (!seg) {
  2666. cnss_pr_err("%s: Failed to allocate mem for seg %d\n",
  2667. __func__, i);
  2668. continue;
  2669. }
  2670. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2671. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2672. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2673. }
  2674. meta_info.entry[dump_seg->type].entry_num++;
  2675. seg->da = dump_seg->address;
  2676. seg->va = dump_seg->v_address;
  2677. seg->size = dump_seg->size;
  2678. list_add_tail(&seg->node, &head);
  2679. dump_seg++;
  2680. }
  2681. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2682. if (!seg) {
  2683. cnss_pr_err("%s: Failed to allocate mem for elf ramdump seg\n",
  2684. __func__);
  2685. goto skip_elf_dump;
  2686. }
  2687. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2688. meta_info.version = CNSS_RAMDUMP_VERSION;
  2689. meta_info.chipset = plat_priv->device_id;
  2690. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2691. seg->va = &meta_info;
  2692. seg->size = sizeof(meta_info);
  2693. list_add(&seg->node, &head);
  2694. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2695. skip_elf_dump:
  2696. while (!list_empty(&head)) {
  2697. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2698. list_del(&seg->node);
  2699. kfree(seg);
  2700. }
  2701. return ret;
  2702. }
  2703. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2704. /**
  2705. * cnss_host_ramdump_dev_release() - callback function for device release
  2706. * @dev: device to be released
  2707. *
  2708. * Return: None
  2709. */
  2710. static void cnss_host_ramdump_dev_release(struct device *dev)
  2711. {
  2712. cnss_pr_dbg("free host ramdump device\n");
  2713. kfree(dev);
  2714. }
  2715. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2716. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2717. size_t num_entries_loaded)
  2718. {
  2719. struct qcom_dump_segment *seg;
  2720. struct cnss_host_dump_meta_info meta_info = {0};
  2721. struct list_head head;
  2722. int dev_ret = 0;
  2723. struct device *new_device;
  2724. static const char * const wlan_str[] = {
  2725. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2726. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2727. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2728. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2729. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2730. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2731. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2732. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2733. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2734. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2735. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2736. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2737. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2738. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2739. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx",
  2740. [CNSS_HOST_HIF_CE_DESC_HISTORY_BUFF] = "hif_ce_desc_history_buff",
  2741. [CNSS_HOST_HANG_EVENT_DATA] = "hang_event_data",
  2742. [CNSS_HOST_CE_DESC_HIST] = "hif_ce_desc_hist",
  2743. [CNSS_HOST_CE_COUNT_MAX] = "hif_ce_count_max",
  2744. [CNSS_HOST_CE_HISTORY_MAX] = "hif_ce_history_max",
  2745. [CNSS_HOST_ONLY_FOR_CRIT_CE] = "hif_ce_only_for_crit",
  2746. [CNSS_HOST_HIF_EVENT_HISTORY] = "hif_event_history",
  2747. [CNSS_HOST_HIF_EVENT_HIST_MAX] = "hif_event_hist_max",
  2748. [CNSS_HOST_DP_WBM_DESC_REL] = "wbm_desc_rel_ring",
  2749. [CNSS_HOST_DP_WBM_DESC_REL_HANDLE] = "wbm_desc_rel_ring_handle",
  2750. [CNSS_HOST_DP_TCL_CMD] = "tcl_cmd_ring",
  2751. [CNSS_HOST_DP_TCL_CMD_HANDLE] = "tcl_cmd_ring_handle",
  2752. [CNSS_HOST_DP_TCL_STATUS] = "tcl_status_ring",
  2753. [CNSS_HOST_DP_TCL_STATUS_HANDLE] = "tcl_status_ring_handle",
  2754. [CNSS_HOST_DP_REO_REINJ] = "reo_reinject_ring",
  2755. [CNSS_HOST_DP_REO_REINJ_HANDLE] = "reo_reinject_ring_handle",
  2756. [CNSS_HOST_DP_RX_REL] = "rx_rel_ring",
  2757. [CNSS_HOST_DP_RX_REL_HANDLE] = "rx_rel_ring_handle",
  2758. [CNSS_HOST_DP_REO_EXP] = "reo_exception_ring",
  2759. [CNSS_HOST_DP_REO_EXP_HANDLE] = "reo_exception_ring_handle",
  2760. [CNSS_HOST_DP_REO_CMD] = "reo_cmd_ring",
  2761. [CNSS_HOST_DP_REO_CMD_HANDLE] = "reo_cmd_ring_handle",
  2762. [CNSS_HOST_DP_REO_STATUS] = "reo_status_ring",
  2763. [CNSS_HOST_DP_REO_STATUS_HANDLE] = "reo_status_ring_handle",
  2764. [CNSS_HOST_DP_TCL_DATA_0] = "tcl_data_ring_0",
  2765. [CNSS_HOST_DP_TCL_DATA_0_HANDLE] = "tcl_data_ring_0_handle",
  2766. [CNSS_HOST_DP_TX_COMP_0] = "tx_comp_ring_0",
  2767. [CNSS_HOST_DP_TX_COMP_0_HANDLE] = "tx_comp_ring_0_handle",
  2768. [CNSS_HOST_DP_TCL_DATA_1] = "tcl_data_ring_1",
  2769. [CNSS_HOST_DP_TCL_DATA_1_HANDLE] = "tcl_data_ring_1_handle",
  2770. [CNSS_HOST_DP_TX_COMP_1] = "tx_comp_ring_1",
  2771. [CNSS_HOST_DP_TX_COMP_1_HANDLE] = "tx_comp_ring_1_handle",
  2772. [CNSS_HOST_DP_TCL_DATA_2] = "tcl_data_ring_2",
  2773. [CNSS_HOST_DP_TCL_DATA_2_HANDLE] = "tcl_data_ring_2_handle",
  2774. [CNSS_HOST_DP_TX_COMP_2] = "tx_comp_ring_2",
  2775. [CNSS_HOST_DP_TX_COMP_2_HANDLE] = "tx_comp_ring_2_handle",
  2776. [CNSS_HOST_DP_REO_DST_0] = "reo_dest_ring_0",
  2777. [CNSS_HOST_DP_REO_DST_0_HANDLE] = "reo_dest_ring_0_handle",
  2778. [CNSS_HOST_DP_REO_DST_1] = "reo_dest_ring_1",
  2779. [CNSS_HOST_DP_REO_DST_1_HANDLE] = "reo_dest_ring_1_handle",
  2780. [CNSS_HOST_DP_REO_DST_2] = "reo_dest_ring_2",
  2781. [CNSS_HOST_DP_REO_DST_2_HANDLE] = "reo_dest_ring_2_handle",
  2782. [CNSS_HOST_DP_REO_DST_3] = "reo_dest_ring_3",
  2783. [CNSS_HOST_DP_REO_DST_3_HANDLE] = "reo_dest_ring_3_handle",
  2784. [CNSS_HOST_DP_REO_DST_4] = "reo_dest_ring_4",
  2785. [CNSS_HOST_DP_REO_DST_4_HANDLE] = "reo_dest_ring_4_handle",
  2786. [CNSS_HOST_DP_REO_DST_5] = "reo_dest_ring_5",
  2787. [CNSS_HOST_DP_REO_DST_5_HANDLE] = "reo_dest_ring_5_handle",
  2788. [CNSS_HOST_DP_REO_DST_6] = "reo_dest_ring_6",
  2789. [CNSS_HOST_DP_REO_DST_6_HANDLE] = "reo_dest_ring_6_handle",
  2790. [CNSS_HOST_DP_REO_DST_7] = "reo_dest_ring_7",
  2791. [CNSS_HOST_DP_REO_DST_7_HANDLE] = "reo_dest_ring_7_handle",
  2792. [CNSS_HOST_DP_PDEV_0] = "dp_pdev_0",
  2793. [CNSS_HOST_DP_WLAN_CFG_CTX] = "wlan_cfg_ctx",
  2794. [CNSS_HOST_DP_SOC] = "dp_soc",
  2795. [CNSS_HOST_HAL_RX_FST] = "hal_rx_fst",
  2796. [CNSS_HOST_DP_FISA] = "dp_fisa",
  2797. [CNSS_HOST_DP_FISA_HW_FSE_TABLE] = "dp_fisa_hw_fse_table",
  2798. [CNSS_HOST_DP_FISA_SW_FSE_TABLE] = "dp_fisa_sw_fse_table",
  2799. [CNSS_HOST_HIF] = "hif",
  2800. [CNSS_HOST_QDF_NBUF_HIST] = "qdf_nbuf_history",
  2801. [CNSS_HOST_TCL_WBM_MAP] = "tcl_wbm_map_array",
  2802. [CNSS_HOST_RX_MAC_BUF_RING_0] = "rx_mac_buf_ring_0",
  2803. [CNSS_HOST_RX_MAC_BUF_RING_0_HANDLE] = "rx_mac_buf_ring_0_handle",
  2804. [CNSS_HOST_RX_MAC_BUF_RING_1] = "rx_mac_buf_ring_1",
  2805. [CNSS_HOST_RX_MAC_BUF_RING_1_HANDLE] = "rx_mac_buf_ring_1_handle",
  2806. [CNSS_HOST_RX_REFILL_0] = "rx_refill_buf_ring_0",
  2807. [CNSS_HOST_RX_REFILL_0_HANDLE] = "rx_refill_buf_ring_0_handle",
  2808. [CNSS_HOST_CE_0] = "ce_0",
  2809. [CNSS_HOST_CE_0_SRC_RING] = "ce_0_src_ring",
  2810. [CNSS_HOST_CE_0_SRC_RING_CTX] = "ce_0_src_ring_ctx",
  2811. [CNSS_HOST_CE_1] = "ce_1",
  2812. [CNSS_HOST_CE_1_STATUS_RING] = "ce_1_status_ring",
  2813. [CNSS_HOST_CE_1_STATUS_RING_CTX] = "ce_1_status_ring_ctx",
  2814. [CNSS_HOST_CE_1_DEST_RING] = "ce_1_dest_ring",
  2815. [CNSS_HOST_CE_1_DEST_RING_CTX] = "ce_1_dest_ring_ctx",
  2816. [CNSS_HOST_CE_2] = "ce_2",
  2817. [CNSS_HOST_CE_2_STATUS_RING] = "ce_2_status_ring",
  2818. [CNSS_HOST_CE_2_STATUS_RING_CTX] = "ce_2_status_ring_ctx",
  2819. [CNSS_HOST_CE_2_DEST_RING] = "ce_2_dest_ring",
  2820. [CNSS_HOST_CE_2_DEST_RING_CTX] = "ce_2_dest_ring_ctx",
  2821. [CNSS_HOST_CE_3] = "ce_3",
  2822. [CNSS_HOST_CE_3_SRC_RING] = "ce_3_src_ring",
  2823. [CNSS_HOST_CE_3_SRC_RING_CTX] = "ce_3_src_ring_ctx",
  2824. [CNSS_HOST_CE_4] = "ce_4",
  2825. [CNSS_HOST_CE_4_SRC_RING] = "ce_4_src_ring",
  2826. [CNSS_HOST_CE_4_SRC_RING_CTX] = "ce_4_src_ring_ctx",
  2827. [CNSS_HOST_CE_5] = "ce_5",
  2828. [CNSS_HOST_CE_6] = "ce_6",
  2829. [CNSS_HOST_CE_7] = "ce_7",
  2830. [CNSS_HOST_CE_7_STATUS_RING] = "ce_7_status_ring",
  2831. [CNSS_HOST_CE_7_STATUS_RING_CTX] = "ce_7_status_ring_ctx",
  2832. [CNSS_HOST_CE_7_DEST_RING] = "ce_7_dest_ring",
  2833. [CNSS_HOST_CE_7_DEST_RING_CTX] = "ce_7_dest_ring_ctx",
  2834. [CNSS_HOST_CE_8] = "ce_8",
  2835. [CNSS_HOST_DP_TCL_DATA_3] = "tcl_data_ring_3",
  2836. [CNSS_HOST_DP_TCL_DATA_3_HANDLE] = "tcl_data_ring_3_handle",
  2837. [CNSS_HOST_DP_TX_COMP_3] = "tx_comp_ring_3",
  2838. [CNSS_HOST_DP_TX_COMP_3_HANDLE] = "tx_comp_ring_3_handle"
  2839. };
  2840. int i;
  2841. int ret = 0;
  2842. enum cnss_host_dump_type j;
  2843. if (!dump_enabled()) {
  2844. cnss_pr_info("Dump collection is not enabled\n");
  2845. return ret;
  2846. }
  2847. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2848. if (!new_device) {
  2849. cnss_pr_err("Failed to alloc device mem\n");
  2850. return -ENOMEM;
  2851. }
  2852. new_device->release = cnss_host_ramdump_dev_release;
  2853. device_initialize(new_device);
  2854. dev_set_name(new_device, "wlan_driver");
  2855. dev_ret = device_add(new_device);
  2856. if (dev_ret) {
  2857. cnss_pr_err("Failed to add new device\n");
  2858. goto put_device;
  2859. }
  2860. INIT_LIST_HEAD(&head);
  2861. for (i = 0; i < num_entries_loaded; i++) {
  2862. /* If region name registered by driver is not present in
  2863. * wlan_str. type for that entry will not be set, but entry will
  2864. * be added. Which will result in entry type being 0. Currently
  2865. * entry type 0 is for wlan_logs, which will result in parsing
  2866. * issue for wlan_logs as parsing is done based upon type field.
  2867. * So initialize type with -1(Invalid) to avoid such issues.
  2868. */
  2869. meta_info.entry[i].type = -1;
  2870. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2871. if (!seg) {
  2872. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2873. continue;
  2874. }
  2875. seg->va = ssr_entry[i].buffer_pointer;
  2876. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2877. seg->size = ssr_entry[i].buffer_size;
  2878. for (j = 0; j < CNSS_HOST_DUMP_TYPE_MAX; j++) {
  2879. if (strcmp(ssr_entry[i].region_name, wlan_str[j]) == 0) {
  2880. meta_info.entry[i].type = j;
  2881. }
  2882. }
  2883. meta_info.entry[i].entry_start = i + 1;
  2884. meta_info.entry[i].entry_num++;
  2885. list_add_tail(&seg->node, &head);
  2886. }
  2887. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2888. if (!seg) {
  2889. cnss_pr_err("%s: Failed to allocate mem for host dump seg\n",
  2890. __func__);
  2891. goto skip_host_dump;
  2892. }
  2893. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2894. meta_info.version = CNSS_RAMDUMP_VERSION;
  2895. meta_info.chipset = plat_priv->device_id;
  2896. meta_info.total_entries = num_entries_loaded;
  2897. seg->va = &meta_info;
  2898. seg->da = (dma_addr_t)&meta_info;
  2899. seg->size = sizeof(meta_info);
  2900. list_add(&seg->node, &head);
  2901. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2902. skip_host_dump:
  2903. while (!list_empty(&head)) {
  2904. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2905. list_del(&seg->node);
  2906. kfree(seg);
  2907. }
  2908. device_del(new_device);
  2909. put_device:
  2910. put_device(new_device);
  2911. cnss_pr_dbg("host ramdump result %d\n", ret);
  2912. return ret;
  2913. }
  2914. #endif
  2915. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2916. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2917. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2918. {
  2919. struct cnss_ramdump_info *ramdump_info;
  2920. struct msm_dump_entry dump_entry;
  2921. ramdump_info = &plat_priv->ramdump_info;
  2922. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2923. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2924. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2925. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2926. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2927. sizeof(ramdump_info->dump_data.name));
  2928. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2929. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2930. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2931. &dump_entry);
  2932. }
  2933. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2934. {
  2935. int ret = 0;
  2936. struct device *dev;
  2937. struct cnss_ramdump_info *ramdump_info;
  2938. u32 ramdump_size = 0;
  2939. dev = &plat_priv->plat_dev->dev;
  2940. ramdump_info = &plat_priv->ramdump_info;
  2941. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  2942. /* dt type: legacy or converged */
  2943. ret = of_property_read_u32(dev->of_node,
  2944. "qcom,wlan-ramdump-dynamic",
  2945. &ramdump_size);
  2946. } else {
  2947. ret = of_property_read_u32(plat_priv->dev_node,
  2948. "qcom,wlan-ramdump-dynamic",
  2949. &ramdump_size);
  2950. }
  2951. if (ret == 0) {
  2952. ramdump_info->ramdump_va =
  2953. dma_alloc_coherent(dev, ramdump_size,
  2954. &ramdump_info->ramdump_pa,
  2955. GFP_KERNEL);
  2956. if (ramdump_info->ramdump_va)
  2957. ramdump_info->ramdump_size = ramdump_size;
  2958. }
  2959. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  2960. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  2961. if (ramdump_info->ramdump_size == 0) {
  2962. cnss_pr_info("Ramdump will not be collected");
  2963. goto out;
  2964. }
  2965. ret = cnss_init_dump_entry(plat_priv);
  2966. if (ret) {
  2967. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  2968. goto free_ramdump;
  2969. }
  2970. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  2971. if (!ramdump_info->ramdump_dev) {
  2972. cnss_pr_err("Failed to create ramdump device!");
  2973. ret = -ENOMEM;
  2974. goto free_ramdump;
  2975. }
  2976. return 0;
  2977. free_ramdump:
  2978. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2979. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  2980. out:
  2981. return ret;
  2982. }
  2983. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  2984. {
  2985. struct device *dev;
  2986. struct cnss_ramdump_info *ramdump_info;
  2987. dev = &plat_priv->plat_dev->dev;
  2988. ramdump_info = &plat_priv->ramdump_info;
  2989. if (ramdump_info->ramdump_dev)
  2990. cnss_destroy_ramdump_device(plat_priv,
  2991. ramdump_info->ramdump_dev);
  2992. if (ramdump_info->ramdump_va)
  2993. dma_free_coherent(dev, ramdump_info->ramdump_size,
  2994. ramdump_info->ramdump_va,
  2995. ramdump_info->ramdump_pa);
  2996. }
  2997. /**
  2998. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  2999. * @ret: Error returned by msm_dump_data_register_nominidump
  3000. *
  3001. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  3002. * ignore failure.
  3003. *
  3004. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  3005. */
  3006. static int cnss_ignore_dump_data_reg_fail(int ret)
  3007. {
  3008. return ret;
  3009. }
  3010. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  3011. {
  3012. int ret = 0;
  3013. struct cnss_ramdump_info_v2 *info_v2;
  3014. struct cnss_dump_data *dump_data;
  3015. struct msm_dump_entry dump_entry;
  3016. struct device *dev = &plat_priv->plat_dev->dev;
  3017. u32 ramdump_size = 0;
  3018. info_v2 = &plat_priv->ramdump_info_v2;
  3019. dump_data = &info_v2->dump_data;
  3020. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  3021. /* dt type: legacy or converged */
  3022. ret = of_property_read_u32(dev->of_node,
  3023. "qcom,wlan-ramdump-dynamic",
  3024. &ramdump_size);
  3025. } else {
  3026. ret = of_property_read_u32(plat_priv->dev_node,
  3027. "qcom,wlan-ramdump-dynamic",
  3028. &ramdump_size);
  3029. }
  3030. if (ret == 0)
  3031. info_v2->ramdump_size = ramdump_size;
  3032. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  3033. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  3034. if (!info_v2->dump_data_vaddr)
  3035. return -ENOMEM;
  3036. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  3037. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  3038. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  3039. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  3040. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  3041. sizeof(dump_data->name));
  3042. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3043. dump_entry.addr = virt_to_phys(dump_data);
  3044. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  3045. &dump_entry);
  3046. if (ret) {
  3047. ret = cnss_ignore_dump_data_reg_fail(ret);
  3048. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  3049. ret ? "Error" : "Ignoring", ret);
  3050. goto free_ramdump;
  3051. }
  3052. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  3053. if (!info_v2->ramdump_dev) {
  3054. cnss_pr_err("Failed to create ramdump device!\n");
  3055. ret = -ENOMEM;
  3056. goto free_ramdump;
  3057. }
  3058. return 0;
  3059. free_ramdump:
  3060. kfree(info_v2->dump_data_vaddr);
  3061. info_v2->dump_data_vaddr = NULL;
  3062. return ret;
  3063. }
  3064. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  3065. {
  3066. struct cnss_ramdump_info_v2 *info_v2;
  3067. info_v2 = &plat_priv->ramdump_info_v2;
  3068. if (info_v2->ramdump_dev)
  3069. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  3070. kfree(info_v2->dump_data_vaddr);
  3071. info_v2->dump_data_vaddr = NULL;
  3072. info_v2->dump_data_valid = false;
  3073. }
  3074. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  3075. {
  3076. int ret = 0;
  3077. switch (plat_priv->device_id) {
  3078. case QCA6174_DEVICE_ID:
  3079. ret = cnss_register_ramdump_v1(plat_priv);
  3080. break;
  3081. case QCA6290_DEVICE_ID:
  3082. case QCA6390_DEVICE_ID:
  3083. case QCN7605_DEVICE_ID:
  3084. case QCA6490_DEVICE_ID:
  3085. case KIWI_DEVICE_ID:
  3086. case MANGO_DEVICE_ID:
  3087. case PEACH_DEVICE_ID:
  3088. ret = cnss_register_ramdump_v2(plat_priv);
  3089. break;
  3090. default:
  3091. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  3092. ret = -ENODEV;
  3093. break;
  3094. }
  3095. return ret;
  3096. }
  3097. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  3098. {
  3099. switch (plat_priv->device_id) {
  3100. case QCA6174_DEVICE_ID:
  3101. cnss_unregister_ramdump_v1(plat_priv);
  3102. break;
  3103. case QCA6290_DEVICE_ID:
  3104. case QCA6390_DEVICE_ID:
  3105. case QCN7605_DEVICE_ID:
  3106. case QCA6490_DEVICE_ID:
  3107. case KIWI_DEVICE_ID:
  3108. case MANGO_DEVICE_ID:
  3109. case PEACH_DEVICE_ID:
  3110. cnss_unregister_ramdump_v2(plat_priv);
  3111. break;
  3112. default:
  3113. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  3114. break;
  3115. }
  3116. }
  3117. #else
  3118. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  3119. {
  3120. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  3121. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  3122. struct device *dev = &plat_priv->plat_dev->dev;
  3123. u32 ramdump_size = 0;
  3124. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  3125. &ramdump_size) == 0)
  3126. info_v2->ramdump_size = ramdump_size;
  3127. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  3128. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  3129. if (!info_v2->dump_data_vaddr)
  3130. return -ENOMEM;
  3131. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  3132. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  3133. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  3134. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  3135. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  3136. sizeof(dump_data->name));
  3137. info_v2->ramdump_dev = dev;
  3138. return 0;
  3139. }
  3140. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  3141. {
  3142. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  3143. info_v2->ramdump_dev = NULL;
  3144. kfree(info_v2->dump_data_vaddr);
  3145. info_v2->dump_data_vaddr = NULL;
  3146. info_v2->dump_data_valid = false;
  3147. }
  3148. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  3149. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  3150. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3151. phys_addr_t *pa, unsigned long attrs)
  3152. {
  3153. struct sg_table sgt;
  3154. int ret;
  3155. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  3156. if (ret) {
  3157. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  3158. va, &dma, size, attrs);
  3159. return -EINVAL;
  3160. }
  3161. *pa = page_to_phys(sg_page(sgt.sgl));
  3162. sg_free_table(&sgt);
  3163. return 0;
  3164. }
  3165. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3166. enum cnss_fw_dump_type type, int seg_no,
  3167. void *va, phys_addr_t pa, size_t size)
  3168. {
  3169. struct md_region md_entry;
  3170. int ret;
  3171. switch (type) {
  3172. case CNSS_FW_IMAGE:
  3173. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3174. seg_no);
  3175. break;
  3176. case CNSS_FW_RDDM:
  3177. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3178. seg_no);
  3179. break;
  3180. case CNSS_FW_REMOTE_HEAP:
  3181. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3182. seg_no);
  3183. break;
  3184. default:
  3185. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3186. return -EINVAL;
  3187. }
  3188. md_entry.phys_addr = pa;
  3189. md_entry.virt_addr = (uintptr_t)va;
  3190. md_entry.size = size;
  3191. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3192. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3193. md_entry.name, va, &pa, size);
  3194. ret = msm_minidump_add_region(&md_entry);
  3195. if (ret < 0)
  3196. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  3197. return ret;
  3198. }
  3199. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3200. enum cnss_fw_dump_type type, int seg_no,
  3201. void *va, phys_addr_t pa, size_t size)
  3202. {
  3203. struct md_region md_entry;
  3204. int ret;
  3205. switch (type) {
  3206. case CNSS_FW_IMAGE:
  3207. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3208. seg_no);
  3209. break;
  3210. case CNSS_FW_RDDM:
  3211. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3212. seg_no);
  3213. break;
  3214. case CNSS_FW_REMOTE_HEAP:
  3215. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3216. seg_no);
  3217. break;
  3218. default:
  3219. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3220. return -EINVAL;
  3221. }
  3222. md_entry.phys_addr = pa;
  3223. md_entry.virt_addr = (uintptr_t)va;
  3224. md_entry.size = size;
  3225. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3226. cnss_pr_vdbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3227. md_entry.name, va, &pa, size);
  3228. ret = msm_minidump_remove_region(&md_entry);
  3229. if (ret)
  3230. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  3231. ret);
  3232. return ret;
  3233. }
  3234. #else
  3235. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3236. phys_addr_t *pa, unsigned long attrs)
  3237. {
  3238. return 0;
  3239. }
  3240. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3241. enum cnss_fw_dump_type type, int seg_no,
  3242. void *va, phys_addr_t pa, size_t size)
  3243. {
  3244. return 0;
  3245. }
  3246. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3247. enum cnss_fw_dump_type type, int seg_no,
  3248. void *va, phys_addr_t pa, size_t size)
  3249. {
  3250. return 0;
  3251. }
  3252. #endif /* CONFIG_QCOM_MINIDUMP */
  3253. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  3254. const struct firmware **fw_entry,
  3255. const char *filename)
  3256. {
  3257. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  3258. return request_firmware_direct(fw_entry, filename,
  3259. &plat_priv->plat_dev->dev);
  3260. else
  3261. return firmware_request_nowarn(fw_entry, filename,
  3262. &plat_priv->plat_dev->dev);
  3263. }
  3264. #if IS_ENABLED(CONFIG_INTERCONNECT)
  3265. /**
  3266. * cnss_register_bus_scale() - Setup interconnect voting data
  3267. * @plat_priv: Platform data structure
  3268. *
  3269. * For different interconnect path configured in device tree setup voting data
  3270. * for list of bandwidth requirements.
  3271. *
  3272. * Result: 0 for success. -EINVAL if not configured
  3273. */
  3274. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3275. {
  3276. int ret = -EINVAL;
  3277. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  3278. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3279. struct device *dev = &plat_priv->plat_dev->dev;
  3280. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  3281. ret = of_property_read_u32(dev->of_node,
  3282. "qcom,icc-path-count",
  3283. &plat_priv->icc.path_count);
  3284. if (ret) {
  3285. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  3286. return 0;
  3287. }
  3288. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  3289. "qcom,bus-bw-cfg-count",
  3290. &plat_priv->icc.bus_bw_cfg_count);
  3291. if (ret) {
  3292. cnss_pr_err("Failed to get Bus BW Config table size\n");
  3293. goto cleanup;
  3294. }
  3295. cfg_arr_size = plat_priv->icc.path_count *
  3296. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  3297. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  3298. if (!cfg_arr) {
  3299. cnss_pr_err("Failed to alloc cfg table mem\n");
  3300. ret = -ENOMEM;
  3301. goto cleanup;
  3302. }
  3303. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  3304. "qcom,bus-bw-cfg", cfg_arr,
  3305. cfg_arr_size);
  3306. if (ret) {
  3307. cnss_pr_err("Invalid Bus BW Config Table\n");
  3308. goto cleanup;
  3309. }
  3310. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  3311. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  3312. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  3313. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  3314. GFP_KERNEL);
  3315. if (!bus_bw_info) {
  3316. ret = -ENOMEM;
  3317. goto out;
  3318. }
  3319. ret = of_property_read_string_index(dev->of_node,
  3320. "interconnect-names", idx,
  3321. &bus_bw_info->icc_name);
  3322. if (ret)
  3323. goto out;
  3324. bus_bw_info->icc_path =
  3325. of_icc_get(&plat_priv->plat_dev->dev,
  3326. bus_bw_info->icc_name);
  3327. if (IS_ERR(bus_bw_info->icc_path)) {
  3328. ret = PTR_ERR(bus_bw_info->icc_path);
  3329. if (ret != -EPROBE_DEFER) {
  3330. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  3331. bus_bw_info->icc_name, ret);
  3332. goto out;
  3333. }
  3334. }
  3335. bus_bw_info->cfg_table =
  3336. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  3337. sizeof(*bus_bw_info->cfg_table),
  3338. GFP_KERNEL);
  3339. if (!bus_bw_info->cfg_table) {
  3340. ret = -ENOMEM;
  3341. goto out;
  3342. }
  3343. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  3344. bus_bw_info->icc_name);
  3345. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  3346. CNSS_ICC_VOTE_MAX);
  3347. i < plat_priv->icc.bus_bw_cfg_count;
  3348. i++, j += 2) {
  3349. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  3350. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  3351. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  3352. i, bus_bw_info->cfg_table[i].avg_bw,
  3353. bus_bw_info->cfg_table[i].peak_bw);
  3354. }
  3355. list_add_tail(&bus_bw_info->list,
  3356. &plat_priv->icc.list_head);
  3357. }
  3358. kfree(cfg_arr);
  3359. return 0;
  3360. out:
  3361. list_for_each_entry_safe(bus_bw_info, tmp,
  3362. &plat_priv->icc.list_head, list) {
  3363. list_del(&bus_bw_info->list);
  3364. }
  3365. cleanup:
  3366. kfree(cfg_arr);
  3367. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3368. return ret;
  3369. }
  3370. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  3371. {
  3372. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3373. list_for_each_entry_safe(bus_bw_info, tmp,
  3374. &plat_priv->icc.list_head, list) {
  3375. list_del(&bus_bw_info->list);
  3376. if (bus_bw_info->icc_path)
  3377. icc_put(bus_bw_info->icc_path);
  3378. }
  3379. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3380. }
  3381. #else
  3382. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3383. {
  3384. return 0;
  3385. }
  3386. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  3387. #endif /* CONFIG_INTERCONNECT */
  3388. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  3389. {
  3390. struct cnss_plat_data *plat_priv = cb_ctx;
  3391. if (!plat_priv) {
  3392. cnss_pr_err("%s: Invalid context\n", __func__);
  3393. return;
  3394. }
  3395. if (status) {
  3396. cnss_pr_info("CNSS Daemon connected\n");
  3397. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3398. complete(&plat_priv->daemon_connected);
  3399. } else {
  3400. cnss_pr_info("CNSS Daemon disconnected\n");
  3401. reinit_completion(&plat_priv->daemon_connected);
  3402. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3403. }
  3404. }
  3405. static ssize_t enable_hds_store(struct device *dev,
  3406. struct device_attribute *attr,
  3407. const char *buf, size_t count)
  3408. {
  3409. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3410. unsigned int enable_hds = 0;
  3411. if (!plat_priv)
  3412. return -ENODEV;
  3413. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3414. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3415. return -EINVAL;
  3416. }
  3417. if (enable_hds)
  3418. plat_priv->hds_enabled = true;
  3419. else
  3420. plat_priv->hds_enabled = false;
  3421. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3422. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3423. return count;
  3424. }
  3425. static ssize_t recovery_show(struct device *dev,
  3426. struct device_attribute *attr,
  3427. char *buf)
  3428. {
  3429. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3430. u32 buf_size = PAGE_SIZE;
  3431. u32 curr_len = 0;
  3432. u32 buf_written = 0;
  3433. if (!plat_priv)
  3434. return -ENODEV;
  3435. buf_written = scnprintf(buf, buf_size,
  3436. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3437. "BIT0 -- wlan fw recovery\n"
  3438. "BIT1 -- wlan pcss recovery\n"
  3439. "---------------------------------\n");
  3440. curr_len += buf_written;
  3441. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3442. "WLAN recovery %s[%d]\n",
  3443. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3444. plat_priv->recovery_enabled);
  3445. curr_len += buf_written;
  3446. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3447. "WLAN PCSS recovery %s[%d]\n",
  3448. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3449. plat_priv->recovery_pcss_enabled);
  3450. curr_len += buf_written;
  3451. /*
  3452. * Now size of curr_len is not over page size for sure,
  3453. * later if new item or none-fixed size item added, need
  3454. * add check to make sure curr_len is not over page size.
  3455. */
  3456. return curr_len;
  3457. }
  3458. static ssize_t tme_opt_file_download_show(struct device *dev,
  3459. struct device_attribute *attr, char *buf)
  3460. {
  3461. u32 buf_size = PAGE_SIZE;
  3462. u32 curr_len = 0;
  3463. u32 buf_written = 0;
  3464. buf_written = scnprintf(buf, buf_size,
  3465. "Usage: echo [file_type] > /sys/kernel/cnss/tme_opt_file_download\n"
  3466. "file_type = sec -- For OEM_FUSE file\n"
  3467. "file_type = rpr -- For RPR file\n"
  3468. "file_type = dpr -- For DPR file\n");
  3469. curr_len += buf_written;
  3470. return curr_len;
  3471. }
  3472. static ssize_t time_sync_period_show(struct device *dev,
  3473. struct device_attribute *attr,
  3474. char *buf)
  3475. {
  3476. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3477. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3478. plat_priv->ctrl_params.time_sync_period);
  3479. }
  3480. /**
  3481. * cnss_get_min_time_sync_period_by_vote() - Get minimum time sync period
  3482. * @plat_priv: Platform data structure
  3483. *
  3484. * Result: return minimum time sync period present in vote from wlan and sys
  3485. */
  3486. uint32_t cnss_get_min_time_sync_period_by_vote(struct cnss_plat_data *plat_priv)
  3487. {
  3488. unsigned int i, min_time_sync_period = CNSS_TIME_SYNC_PERIOD_INVALID;
  3489. unsigned int time_sync_period;
  3490. for (i = 0; i < TIME_SYNC_VOTE_MAX; i++) {
  3491. time_sync_period = plat_priv->ctrl_params.time_sync_period_vote[i];
  3492. if (min_time_sync_period > time_sync_period)
  3493. min_time_sync_period = time_sync_period;
  3494. }
  3495. return min_time_sync_period;
  3496. }
  3497. static ssize_t time_sync_period_store(struct device *dev,
  3498. struct device_attribute *attr,
  3499. const char *buf, size_t count)
  3500. {
  3501. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3502. unsigned int time_sync_period = 0;
  3503. if (!plat_priv)
  3504. return -ENODEV;
  3505. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3506. cnss_pr_err("Invalid time sync sysfs command\n");
  3507. return -EINVAL;
  3508. }
  3509. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3510. cnss_pr_err("Invalid time sync value\n");
  3511. return -EINVAL;
  3512. }
  3513. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  3514. time_sync_period;
  3515. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3516. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3517. cnss_pr_err("Invalid min time sync value\n");
  3518. return -EINVAL;
  3519. }
  3520. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3521. return count;
  3522. }
  3523. /**
  3524. * cnss_update_time_sync_period() - Set time sync period given by driver
  3525. * @dev: device structure
  3526. * @time_sync_period: time sync period value
  3527. *
  3528. * Update time sync period vote of driver and set minimum of time sync period
  3529. * from stored vote through wlan and sys config
  3530. * Result: return 0 for success, error in case of invalid value and no dev
  3531. */
  3532. int cnss_update_time_sync_period(struct device *dev, uint32_t time_sync_period)
  3533. {
  3534. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3535. if (!plat_priv)
  3536. return -ENODEV;
  3537. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3538. cnss_pr_err("Invalid time sync value\n");
  3539. return -EINVAL;
  3540. }
  3541. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3542. time_sync_period;
  3543. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3544. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3545. cnss_pr_err("Invalid min time sync value\n");
  3546. return -EINVAL;
  3547. }
  3548. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3549. return 0;
  3550. }
  3551. EXPORT_SYMBOL(cnss_update_time_sync_period);
  3552. /**
  3553. * cnss_reset_time_sync_period() - Reset time sync period
  3554. * @dev: device structure
  3555. *
  3556. * Update time sync period vote of driver as invalid
  3557. * and reset minimum of time sync period from
  3558. * stored vote through wlan and sys config
  3559. * Result: return 0 for success, error in case of no dev
  3560. */
  3561. int cnss_reset_time_sync_period(struct device *dev)
  3562. {
  3563. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3564. unsigned int time_sync_period = 0;
  3565. if (!plat_priv)
  3566. return -ENODEV;
  3567. /* Driver vote is set to invalid in case of reset
  3568. * In this case, only vote valid to check is sys config
  3569. */
  3570. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3571. CNSS_TIME_SYNC_PERIOD_INVALID;
  3572. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3573. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3574. cnss_pr_err("Invalid min time sync value\n");
  3575. return -EINVAL;
  3576. }
  3577. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3578. return 0;
  3579. }
  3580. EXPORT_SYMBOL(cnss_reset_time_sync_period);
  3581. static ssize_t recovery_store(struct device *dev,
  3582. struct device_attribute *attr,
  3583. const char *buf, size_t count)
  3584. {
  3585. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3586. unsigned int recovery = 0;
  3587. if (!plat_priv)
  3588. return -ENODEV;
  3589. if (sscanf(buf, "%du", &recovery) != 1) {
  3590. cnss_pr_err("Invalid recovery sysfs command\n");
  3591. return -EINVAL;
  3592. }
  3593. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3594. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3595. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3596. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3597. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3598. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3599. cnss_send_subsys_restart_level_msg(plat_priv);
  3600. return count;
  3601. }
  3602. static ssize_t shutdown_store(struct device *dev,
  3603. struct device_attribute *attr,
  3604. const char *buf, size_t count)
  3605. {
  3606. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3607. cnss_pr_dbg("Received shutdown notification\n");
  3608. if (plat_priv) {
  3609. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3610. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3611. del_timer(&plat_priv->fw_boot_timer);
  3612. complete_all(&plat_priv->power_up_complete);
  3613. complete_all(&plat_priv->cal_complete);
  3614. cnss_pr_dbg("Shutdown notification handled\n");
  3615. }
  3616. return count;
  3617. }
  3618. static ssize_t fs_ready_store(struct device *dev,
  3619. struct device_attribute *attr,
  3620. const char *buf, size_t count)
  3621. {
  3622. int fs_ready = 0;
  3623. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3624. if (sscanf(buf, "%du", &fs_ready) != 1)
  3625. return -EINVAL;
  3626. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3627. fs_ready, count);
  3628. if (!plat_priv) {
  3629. cnss_pr_err("plat_priv is NULL\n");
  3630. return count;
  3631. }
  3632. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3633. cnss_pr_dbg("QMI is bypassed\n");
  3634. return count;
  3635. }
  3636. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3637. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3638. cnss_driver_event_post(plat_priv,
  3639. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3640. 0, NULL);
  3641. }
  3642. return count;
  3643. }
  3644. static ssize_t qdss_trace_start_store(struct device *dev,
  3645. struct device_attribute *attr,
  3646. const char *buf, size_t count)
  3647. {
  3648. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3649. wlfw_qdss_trace_start(plat_priv);
  3650. cnss_pr_dbg("Received QDSS start command\n");
  3651. return count;
  3652. }
  3653. static ssize_t qdss_trace_stop_store(struct device *dev,
  3654. struct device_attribute *attr,
  3655. const char *buf, size_t count)
  3656. {
  3657. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3658. u32 option = 0;
  3659. if (sscanf(buf, "%du", &option) != 1)
  3660. return -EINVAL;
  3661. wlfw_qdss_trace_stop(plat_priv, option);
  3662. cnss_pr_dbg("Received QDSS stop command\n");
  3663. return count;
  3664. }
  3665. static ssize_t qdss_conf_download_store(struct device *dev,
  3666. struct device_attribute *attr,
  3667. const char *buf, size_t count)
  3668. {
  3669. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3670. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3671. cnss_pr_dbg("Received QDSS download config command\n");
  3672. return count;
  3673. }
  3674. static ssize_t tme_opt_file_download_store(struct device *dev,
  3675. struct device_attribute *attr,
  3676. const char *buf, size_t count)
  3677. {
  3678. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3679. char cmd[5];
  3680. if (sscanf(buf, "%s", cmd) != 1)
  3681. return -EINVAL;
  3682. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  3683. cnss_pr_err("Firmware is not ready yet\n");
  3684. return 0;
  3685. }
  3686. if (plat_priv->device_id == PEACH_DEVICE_ID &&
  3687. cnss_bus_runtime_pm_get_sync(plat_priv) < 0)
  3688. goto runtime_pm_put;
  3689. if (strcmp(cmd, "sec") == 0) {
  3690. cnss_bus_load_tme_opt_file(plat_priv, WLFW_TME_LITE_OEM_FUSE_FILE_V01);
  3691. cnss_wlfw_tme_opt_file_dnld_send_sync(plat_priv, WLFW_TME_LITE_OEM_FUSE_FILE_V01);
  3692. } else if (strcmp(cmd, "rpr") == 0) {
  3693. cnss_bus_load_tme_opt_file(plat_priv, WLFW_TME_LITE_RPR_FILE_V01);
  3694. cnss_wlfw_tme_opt_file_dnld_send_sync(plat_priv, WLFW_TME_LITE_RPR_FILE_V01);
  3695. } else if (strcmp(cmd, "dpr") == 0) {
  3696. cnss_bus_load_tme_opt_file(plat_priv, WLFW_TME_LITE_DPR_FILE_V01);
  3697. cnss_wlfw_tme_opt_file_dnld_send_sync(plat_priv, WLFW_TME_LITE_DPR_FILE_V01);
  3698. }
  3699. cnss_pr_dbg("Received tme_opt_file_download indication cmd: %s\n", cmd);
  3700. runtime_pm_put:
  3701. if (plat_priv->device_id == PEACH_DEVICE_ID)
  3702. cnss_bus_runtime_pm_put(plat_priv);
  3703. return count;
  3704. }
  3705. static ssize_t hw_trace_override_store(struct device *dev,
  3706. struct device_attribute *attr,
  3707. const char *buf, size_t count)
  3708. {
  3709. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3710. int tmp = 0;
  3711. if (sscanf(buf, "%du", &tmp) != 1)
  3712. return -EINVAL;
  3713. plat_priv->hw_trc_override = tmp;
  3714. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3715. return count;
  3716. }
  3717. static ssize_t charger_mode_store(struct device *dev,
  3718. struct device_attribute *attr,
  3719. const char *buf, size_t count)
  3720. {
  3721. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3722. int tmp = 0;
  3723. if (sscanf(buf, "%du", &tmp) != 1)
  3724. return -EINVAL;
  3725. plat_priv->charger_mode = tmp;
  3726. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3727. return count;
  3728. }
  3729. static DEVICE_ATTR_WO(fs_ready);
  3730. static DEVICE_ATTR_WO(shutdown);
  3731. static DEVICE_ATTR_RW(recovery);
  3732. static DEVICE_ATTR_WO(enable_hds);
  3733. static DEVICE_ATTR_WO(qdss_trace_start);
  3734. static DEVICE_ATTR_WO(qdss_trace_stop);
  3735. static DEVICE_ATTR_WO(qdss_conf_download);
  3736. static DEVICE_ATTR_RW(tme_opt_file_download);
  3737. static DEVICE_ATTR_WO(hw_trace_override);
  3738. static DEVICE_ATTR_WO(charger_mode);
  3739. static DEVICE_ATTR_RW(time_sync_period);
  3740. static struct attribute *cnss_attrs[] = {
  3741. &dev_attr_fs_ready.attr,
  3742. &dev_attr_shutdown.attr,
  3743. &dev_attr_recovery.attr,
  3744. &dev_attr_enable_hds.attr,
  3745. &dev_attr_qdss_trace_start.attr,
  3746. &dev_attr_qdss_trace_stop.attr,
  3747. &dev_attr_qdss_conf_download.attr,
  3748. &dev_attr_tme_opt_file_download.attr,
  3749. &dev_attr_hw_trace_override.attr,
  3750. &dev_attr_charger_mode.attr,
  3751. &dev_attr_time_sync_period.attr,
  3752. NULL,
  3753. };
  3754. static struct attribute_group cnss_attr_group = {
  3755. .attrs = cnss_attrs,
  3756. };
  3757. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3758. {
  3759. struct device *dev = &plat_priv->plat_dev->dev;
  3760. int ret;
  3761. char cnss_name[CNSS_FS_NAME_SIZE];
  3762. char shutdown_name[32];
  3763. if (cnss_is_dual_wlan_enabled()) {
  3764. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3765. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3766. snprintf(shutdown_name, sizeof(shutdown_name),
  3767. "shutdown_wlan_%d", plat_priv->plat_idx);
  3768. } else {
  3769. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3770. snprintf(shutdown_name, sizeof(shutdown_name),
  3771. "shutdown_wlan");
  3772. }
  3773. ret = sysfs_create_link(kernel_kobj, &dev->kobj, cnss_name);
  3774. if (ret) {
  3775. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3776. ret);
  3777. goto out;
  3778. }
  3779. /* This is only for backward compatibility. */
  3780. ret = sysfs_create_link(kernel_kobj, &dev->kobj, shutdown_name);
  3781. if (ret) {
  3782. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3783. ret);
  3784. goto rm_cnss_link;
  3785. }
  3786. return 0;
  3787. rm_cnss_link:
  3788. sysfs_remove_link(kernel_kobj, cnss_name);
  3789. out:
  3790. return ret;
  3791. }
  3792. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3793. {
  3794. char cnss_name[CNSS_FS_NAME_SIZE];
  3795. char shutdown_name[32];
  3796. if (cnss_is_dual_wlan_enabled()) {
  3797. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3798. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3799. snprintf(shutdown_name, sizeof(shutdown_name),
  3800. "shutdown_wlan_%d", plat_priv->plat_idx);
  3801. } else {
  3802. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3803. snprintf(shutdown_name, sizeof(shutdown_name),
  3804. "shutdown_wlan");
  3805. }
  3806. sysfs_remove_link(kernel_kobj, shutdown_name);
  3807. sysfs_remove_link(kernel_kobj, cnss_name);
  3808. }
  3809. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3810. {
  3811. int ret = 0;
  3812. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3813. &cnss_attr_group);
  3814. if (ret) {
  3815. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3816. ret);
  3817. goto out;
  3818. }
  3819. cnss_create_sysfs_link(plat_priv);
  3820. return 0;
  3821. out:
  3822. return ret;
  3823. }
  3824. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0))
  3825. union cnss_device_group_devres {
  3826. const struct attribute_group *group;
  3827. };
  3828. static void devm_cnss_group_remove(struct device *dev, void *res)
  3829. {
  3830. union cnss_device_group_devres *devres = res;
  3831. const struct attribute_group *group = devres->group;
  3832. cnss_pr_dbg("%s: removing group %p\n", __func__, group);
  3833. sysfs_remove_group(&dev->kobj, group);
  3834. }
  3835. static int devm_cnss_group_match(struct device *dev, void *res, void *data)
  3836. {
  3837. return ((union cnss_device_group_devres *)res) == data;
  3838. }
  3839. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3840. {
  3841. cnss_remove_sysfs_link(plat_priv);
  3842. WARN_ON(devres_release(&plat_priv->plat_dev->dev,
  3843. devm_cnss_group_remove, devm_cnss_group_match,
  3844. (void *)&cnss_attr_group));
  3845. }
  3846. #else
  3847. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3848. {
  3849. cnss_remove_sysfs_link(plat_priv);
  3850. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3851. }
  3852. #endif
  3853. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3854. {
  3855. spin_lock_init(&plat_priv->event_lock);
  3856. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3857. WQ_UNBOUND, 1);
  3858. if (!plat_priv->event_wq) {
  3859. cnss_pr_err("Failed to create event workqueue!\n");
  3860. return -EFAULT;
  3861. }
  3862. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3863. INIT_LIST_HEAD(&plat_priv->event_list);
  3864. return 0;
  3865. }
  3866. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3867. {
  3868. destroy_workqueue(plat_priv->event_wq);
  3869. }
  3870. static int cnss_reboot_notifier(struct notifier_block *nb,
  3871. unsigned long action,
  3872. void *data)
  3873. {
  3874. struct cnss_plat_data *plat_priv =
  3875. container_of(nb, struct cnss_plat_data, reboot_nb);
  3876. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3877. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3878. del_timer(&plat_priv->fw_boot_timer);
  3879. complete_all(&plat_priv->power_up_complete);
  3880. complete_all(&plat_priv->cal_complete);
  3881. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3882. return NOTIFY_DONE;
  3883. }
  3884. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3885. #ifdef CONFIG_CNSS_HW_SECURE_SMEM
  3886. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3887. {
  3888. uint32_t *peripheralStateInfo = NULL;
  3889. size_t size = 0;
  3890. /* Once this flag is set, secure peripheral feature
  3891. * will not be supported till next reboot
  3892. */
  3893. if (plat_priv->sec_peri_feature_disable)
  3894. return 0;
  3895. peripheralStateInfo = qcom_smem_get(QCOM_SMEM_HOST_ANY, PERISEC_SMEM_ID, &size);
  3896. if (IS_ERR_OR_NULL(peripheralStateInfo)) {
  3897. if (PTR_ERR(peripheralStateInfo) != -ENOENT)
  3898. CNSS_ASSERT(0);
  3899. cnss_pr_dbg("Secure HW feature not enabled. ret = %d\n",
  3900. PTR_ERR(peripheralStateInfo));
  3901. plat_priv->sec_peri_feature_disable = true;
  3902. return 0;
  3903. }
  3904. cnss_pr_dbg("Secure HW state: %d\n", *peripheralStateInfo);
  3905. if ((*peripheralStateInfo >> (HW_WIFI_UID - 0x500)) & 0x1)
  3906. set_bit(CNSS_WLAN_HW_DISABLED,
  3907. &plat_priv->driver_state);
  3908. else
  3909. clear_bit(CNSS_WLAN_HW_DISABLED,
  3910. &plat_priv->driver_state);
  3911. return 0;
  3912. }
  3913. #else
  3914. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3915. {
  3916. struct Object client_env;
  3917. struct Object app_object;
  3918. u32 wifi_uid = HW_WIFI_UID;
  3919. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3920. int ret;
  3921. u8 state = 0;
  3922. /* Once this flag is set, secure peripheral feature
  3923. * will not be supported till next reboot
  3924. */
  3925. if (plat_priv->sec_peri_feature_disable)
  3926. return 0;
  3927. /* get rootObj */
  3928. ret = get_client_env_object(&client_env);
  3929. if (ret) {
  3930. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  3931. goto end;
  3932. }
  3933. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  3934. if (ret) {
  3935. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  3936. if (ret == FEATURE_NOT_SUPPORTED) {
  3937. ret = 0; /* Do not Assert */
  3938. plat_priv->sec_peri_feature_disable = true;
  3939. cnss_pr_dbg("Secure HW feature not supported\n");
  3940. }
  3941. goto exit_release_clientenv;
  3942. }
  3943. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  3944. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  3945. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  3946. ObjectCounts_pack(1, 1, 0, 0));
  3947. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  3948. if (ret) {
  3949. if (ret == PERIPHERAL_NOT_FOUND) {
  3950. ret = 0; /* Do not Assert */
  3951. plat_priv->sec_peri_feature_disable = true;
  3952. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  3953. }
  3954. goto exit_release_app_obj;
  3955. }
  3956. if (state == 1)
  3957. set_bit(CNSS_WLAN_HW_DISABLED,
  3958. &plat_priv->driver_state);
  3959. else
  3960. clear_bit(CNSS_WLAN_HW_DISABLED,
  3961. &plat_priv->driver_state);
  3962. exit_release_app_obj:
  3963. Object_release(app_object);
  3964. exit_release_clientenv:
  3965. Object_release(client_env);
  3966. end:
  3967. if (ret) {
  3968. cnss_pr_err("Unable to get HW disable status\n");
  3969. CNSS_ASSERT(0);
  3970. }
  3971. return ret;
  3972. }
  3973. #endif
  3974. #else
  3975. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3976. {
  3977. return 0;
  3978. }
  3979. #endif
  3980. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  3981. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3982. {
  3983. }
  3984. #else
  3985. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  3986. {
  3987. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  3988. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  3989. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  3990. }
  3991. #endif
  3992. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  3993. static void cnss_initialize_mem_pool(unsigned long device_id)
  3994. {
  3995. cnss_initialize_prealloc_pool(device_id);
  3996. }
  3997. static void cnss_deinitialize_mem_pool(void)
  3998. {
  3999. cnss_deinitialize_prealloc_pool();
  4000. }
  4001. #else
  4002. static void cnss_initialize_mem_pool(unsigned long device_id)
  4003. {
  4004. }
  4005. static void cnss_deinitialize_mem_pool(void)
  4006. {
  4007. }
  4008. #endif
  4009. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  4010. {
  4011. int ret;
  4012. ret = cnss_init_sol_gpio(plat_priv);
  4013. if (ret)
  4014. return ret;
  4015. timer_setup(&plat_priv->fw_boot_timer,
  4016. cnss_bus_fw_boot_timeout_hdlr, 0);
  4017. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  4018. if (ret)
  4019. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  4020. ret);
  4021. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  4022. init_completion(&plat_priv->power_up_complete);
  4023. init_completion(&plat_priv->cal_complete);
  4024. init_completion(&plat_priv->rddm_complete);
  4025. init_completion(&plat_priv->recovery_complete);
  4026. init_completion(&plat_priv->daemon_connected);
  4027. mutex_init(&plat_priv->dev_lock);
  4028. mutex_init(&plat_priv->driver_ops_lock);
  4029. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  4030. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  4031. if (ret)
  4032. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  4033. ret);
  4034. plat_priv->recovery_ws =
  4035. wakeup_source_register(&plat_priv->plat_dev->dev,
  4036. "CNSS_FW_RECOVERY");
  4037. if (!plat_priv->recovery_ws)
  4038. cnss_pr_err("Failed to setup FW recovery wake source\n");
  4039. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  4040. cnss_daemon_connection_update_cb,
  4041. plat_priv);
  4042. if (ret)
  4043. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  4044. ret);
  4045. cnss_sram_dump_init(plat_priv);
  4046. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4047. "qcom,rc-ep-short-channel"))
  4048. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  4049. if (plat_priv->device_id == PEACH_DEVICE_ID)
  4050. cnss_set_feature_list(plat_priv, CNSS_AUX_UC_SUPPORT_V01);
  4051. return 0;
  4052. }
  4053. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  4054. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  4055. {
  4056. }
  4057. #else
  4058. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  4059. {
  4060. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  4061. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  4062. kfree(plat_priv->sram_dump);
  4063. }
  4064. #endif
  4065. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  4066. {
  4067. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  4068. plat_priv);
  4069. complete_all(&plat_priv->recovery_complete);
  4070. complete_all(&plat_priv->rddm_complete);
  4071. complete_all(&plat_priv->cal_complete);
  4072. complete_all(&plat_priv->power_up_complete);
  4073. complete_all(&plat_priv->daemon_connected);
  4074. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  4075. unregister_reboot_notifier(&plat_priv->reboot_nb);
  4076. del_timer(&plat_priv->fw_boot_timer);
  4077. wakeup_source_unregister(plat_priv->recovery_ws);
  4078. cnss_deinit_sol_gpio(plat_priv);
  4079. cnss_sram_dump_deinit(plat_priv);
  4080. kfree(plat_priv->on_chip_pmic_board_ids);
  4081. }
  4082. static void cnss_init_time_sync_period_default(struct cnss_plat_data *plat_priv)
  4083. {
  4084. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  4085. CNSS_TIME_SYNC_PERIOD_INVALID;
  4086. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  4087. CNSS_TIME_SYNC_PERIOD_DEFAULT;
  4088. }
  4089. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  4090. {
  4091. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  4092. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  4093. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4094. "qcom,wlan-cbc-enabled");
  4095. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  4096. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  4097. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  4098. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  4099. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  4100. cnss_init_time_sync_period_default(plat_priv);
  4101. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  4102. * enabled by default
  4103. */
  4104. plat_priv->adsp_pc_enabled = true;
  4105. }
  4106. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  4107. {
  4108. struct device *dev = &plat_priv->plat_dev->dev;
  4109. plat_priv->use_pm_domain =
  4110. of_property_read_bool(dev->of_node, "use-pm-domain");
  4111. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  4112. }
  4113. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  4114. {
  4115. struct device *dev = &plat_priv->plat_dev->dev;
  4116. plat_priv->set_wlaon_pwr_ctrl =
  4117. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  4118. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  4119. plat_priv->set_wlaon_pwr_ctrl);
  4120. }
  4121. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  4122. {
  4123. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4124. "qcom,converged-dt") ||
  4125. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4126. "qcom,same-dt-multi-dev") ||
  4127. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4128. "qcom,multi-wlan-exchg"));
  4129. }
  4130. static const struct platform_device_id cnss_platform_id_table[] = {
  4131. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  4132. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  4133. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  4134. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  4135. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  4136. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  4137. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  4138. { .name = "qcaconv", .driver_data = 0, },
  4139. { },
  4140. };
  4141. static const struct of_device_id cnss_of_match_table[] = {
  4142. {
  4143. .compatible = "qcom,cnss",
  4144. .data = (void *)&cnss_platform_id_table[0]},
  4145. {
  4146. .compatible = "qcom,cnss-qca6290",
  4147. .data = (void *)&cnss_platform_id_table[1]},
  4148. {
  4149. .compatible = "qcom,cnss-qca6390",
  4150. .data = (void *)&cnss_platform_id_table[2]},
  4151. {
  4152. .compatible = "qcom,cnss-qca6490",
  4153. .data = (void *)&cnss_platform_id_table[3]},
  4154. {
  4155. .compatible = "qcom,cnss-kiwi",
  4156. .data = (void *)&cnss_platform_id_table[4]},
  4157. {
  4158. .compatible = "qcom,cnss-mango",
  4159. .data = (void *)&cnss_platform_id_table[5]},
  4160. {
  4161. .compatible = "qcom,cnss-peach",
  4162. .data = (void *)&cnss_platform_id_table[6]},
  4163. {
  4164. .compatible = "qcom,cnss-qca-converged",
  4165. .data = (void *)&cnss_platform_id_table[7]},
  4166. { },
  4167. };
  4168. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  4169. static inline bool
  4170. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  4171. {
  4172. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4173. "use-nv-mac");
  4174. }
  4175. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  4176. {
  4177. struct device_node *child;
  4178. u32 id, i;
  4179. int id_n, device_identifier_gpio, ret;
  4180. u8 gpio_value;
  4181. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  4182. return 0;
  4183. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  4184. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  4185. if (ret) {
  4186. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  4187. return ret;
  4188. }
  4189. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  4190. gpio_value = gpio_get_value(device_identifier_gpio);
  4191. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  4192. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  4193. child) {
  4194. if (strcmp(child->name, "chip_cfg"))
  4195. continue;
  4196. id_n = of_property_count_u32_elems(child, "supported-ids");
  4197. if (id_n <= 0) {
  4198. cnss_pr_err("Device id is NOT set\n");
  4199. return -EINVAL;
  4200. }
  4201. for (i = 0; i < id_n; i++) {
  4202. ret = of_property_read_u32_index(child,
  4203. "supported-ids",
  4204. i, &id);
  4205. if (ret) {
  4206. cnss_pr_err("Failed to read supported ids\n");
  4207. return -EINVAL;
  4208. }
  4209. if (gpio_value && id == QCA6490_DEVICE_ID) {
  4210. plat_priv->plat_dev->dev.of_node = child;
  4211. plat_priv->device_id = QCA6490_DEVICE_ID;
  4212. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  4213. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  4214. child->name, i, id);
  4215. return 0;
  4216. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  4217. plat_priv->plat_dev->dev.of_node = child;
  4218. plat_priv->device_id = KIWI_DEVICE_ID;
  4219. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  4220. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  4221. child->name, i, id);
  4222. return 0;
  4223. }
  4224. }
  4225. }
  4226. return -EINVAL;
  4227. }
  4228. static inline u32
  4229. cnss_dt_type(struct cnss_plat_data *plat_priv)
  4230. {
  4231. bool is_converged_dt = of_property_read_bool(
  4232. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  4233. bool is_multi_wlan_xchg;
  4234. if (is_converged_dt)
  4235. return CNSS_DTT_CONVERGED;
  4236. is_multi_wlan_xchg = of_property_read_bool(
  4237. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  4238. if (is_multi_wlan_xchg)
  4239. return CNSS_DTT_MULTIEXCHG;
  4240. return CNSS_DTT_LEGACY;
  4241. }
  4242. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  4243. {
  4244. int ret = 0;
  4245. int retry = 0;
  4246. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  4247. return 0;
  4248. retry:
  4249. ret = cnss_power_on_device(plat_priv, true);
  4250. if (ret)
  4251. goto end;
  4252. ret = cnss_bus_init(plat_priv);
  4253. if (ret) {
  4254. if ((ret != -EPROBE_DEFER) &&
  4255. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  4256. cnss_power_off_device(plat_priv);
  4257. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  4258. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  4259. goto retry;
  4260. }
  4261. goto power_off;
  4262. }
  4263. return 0;
  4264. power_off:
  4265. cnss_power_off_device(plat_priv);
  4266. end:
  4267. return ret;
  4268. }
  4269. int cnss_wlan_hw_enable(void)
  4270. {
  4271. struct cnss_plat_data *plat_priv;
  4272. int ret = 0;
  4273. if (cnss_is_dual_wlan_enabled())
  4274. plat_priv = cnss_get_first_plat_priv(NULL);
  4275. else
  4276. plat_priv = cnss_get_plat_priv(NULL);
  4277. if (!plat_priv)
  4278. return -ENODEV;
  4279. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  4280. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  4281. goto register_driver;
  4282. ret = cnss_wlan_device_init(plat_priv);
  4283. if (ret) {
  4284. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  4285. CNSS_ASSERT(0);
  4286. return ret;
  4287. }
  4288. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  4289. cnss_driver_event_post(plat_priv,
  4290. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  4291. 0, NULL);
  4292. register_driver:
  4293. if (plat_priv->driver_ops)
  4294. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  4295. return ret;
  4296. }
  4297. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  4298. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  4299. {
  4300. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  4301. int ret = 0;
  4302. if (!plat_priv)
  4303. return -ENODEV;
  4304. /* If IMS server is connected, return success without QMI send */
  4305. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  4306. cnss_pr_dbg("Ignore host request as IMS server is connected");
  4307. return ret;
  4308. }
  4309. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  4310. return ret;
  4311. }
  4312. EXPORT_SYMBOL(cnss_set_wfc_mode);
  4313. static int cnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  4314. unsigned long *thermal_state)
  4315. {
  4316. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4317. if (!tcdev || !tcdev->devdata) {
  4318. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4319. return -EINVAL;
  4320. }
  4321. cnss_tcdev = tcdev->devdata;
  4322. *thermal_state = cnss_tcdev->max_thermal_state;
  4323. return 0;
  4324. }
  4325. static int cnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  4326. unsigned long *thermal_state)
  4327. {
  4328. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4329. if (!tcdev || !tcdev->devdata) {
  4330. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4331. return -EINVAL;
  4332. }
  4333. cnss_tcdev = tcdev->devdata;
  4334. *thermal_state = cnss_tcdev->curr_thermal_state;
  4335. return 0;
  4336. }
  4337. static int cnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  4338. unsigned long thermal_state)
  4339. {
  4340. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4341. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  4342. int ret = 0;
  4343. if (!tcdev || !tcdev->devdata) {
  4344. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4345. return -EINVAL;
  4346. }
  4347. cnss_tcdev = tcdev->devdata;
  4348. if (thermal_state > cnss_tcdev->max_thermal_state)
  4349. return -EINVAL;
  4350. cnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  4351. thermal_state, cnss_tcdev->tcdev_id);
  4352. mutex_lock(&plat_priv->tcdev_lock);
  4353. ret = cnss_bus_set_therm_cdev_state(plat_priv,
  4354. thermal_state,
  4355. cnss_tcdev->tcdev_id);
  4356. if (!ret)
  4357. cnss_tcdev->curr_thermal_state = thermal_state;
  4358. mutex_unlock(&plat_priv->tcdev_lock);
  4359. if (ret) {
  4360. cnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  4361. ret, cnss_tcdev->tcdev_id);
  4362. return ret;
  4363. }
  4364. return 0;
  4365. }
  4366. static struct thermal_cooling_device_ops cnss_cooling_ops = {
  4367. .get_max_state = cnss_tcdev_get_max_state,
  4368. .get_cur_state = cnss_tcdev_get_cur_state,
  4369. .set_cur_state = cnss_tcdev_set_cur_state,
  4370. };
  4371. int cnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  4372. int tcdev_id)
  4373. {
  4374. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4375. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4376. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  4377. struct device_node *dev_node;
  4378. int ret = 0;
  4379. if (!priv) {
  4380. cnss_pr_err("Platform driver is not initialized!\n");
  4381. return -ENODEV;
  4382. }
  4383. cnss_tcdev = kzalloc(sizeof(*cnss_tcdev), GFP_KERNEL);
  4384. if (!cnss_tcdev) {
  4385. cnss_pr_err("Failed to allocate cnss_tcdev object!\n");
  4386. return -ENOMEM;
  4387. }
  4388. cnss_tcdev->tcdev_id = tcdev_id;
  4389. cnss_tcdev->max_thermal_state = max_state;
  4390. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  4391. "qcom,cnss_cdev%d", tcdev_id);
  4392. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  4393. if (!dev_node) {
  4394. cnss_pr_err("Failed to get cooling device node\n");
  4395. kfree(cnss_tcdev);
  4396. return -EINVAL;
  4397. }
  4398. cnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  4399. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  4400. cnss_tcdev->tcdev = thermal_of_cooling_device_register(dev_node,
  4401. cdev_node_name,
  4402. cnss_tcdev,
  4403. &cnss_cooling_ops);
  4404. if (IS_ERR_OR_NULL(cnss_tcdev->tcdev)) {
  4405. ret = PTR_ERR(cnss_tcdev->tcdev);
  4406. cnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  4407. ret, cnss_tcdev->tcdev_id);
  4408. kfree(cnss_tcdev);
  4409. } else {
  4410. cnss_pr_dbg("Cooling device registered for cdev id %d",
  4411. cnss_tcdev->tcdev_id);
  4412. mutex_lock(&priv->tcdev_lock);
  4413. list_add(&cnss_tcdev->tcdev_list,
  4414. &priv->cnss_tcdev_list);
  4415. mutex_unlock(&priv->tcdev_lock);
  4416. }
  4417. } else {
  4418. cnss_pr_dbg("Cooling device registration not supported");
  4419. kfree(cnss_tcdev);
  4420. ret = -EOPNOTSUPP;
  4421. }
  4422. return ret;
  4423. }
  4424. EXPORT_SYMBOL(cnss_thermal_cdev_register);
  4425. void cnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  4426. {
  4427. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4428. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4429. if (!priv) {
  4430. cnss_pr_err("Platform driver is not initialized!\n");
  4431. return;
  4432. }
  4433. mutex_lock(&priv->tcdev_lock);
  4434. while (!list_empty(&priv->cnss_tcdev_list)) {
  4435. cnss_tcdev = list_first_entry(&priv->cnss_tcdev_list,
  4436. struct cnss_thermal_cdev,
  4437. tcdev_list);
  4438. thermal_cooling_device_unregister(cnss_tcdev->tcdev);
  4439. list_del(&cnss_tcdev->tcdev_list);
  4440. kfree(cnss_tcdev);
  4441. }
  4442. mutex_unlock(&priv->tcdev_lock);
  4443. }
  4444. EXPORT_SYMBOL(cnss_thermal_cdev_unregister);
  4445. int cnss_get_curr_therm_cdev_state(struct device *dev,
  4446. unsigned long *thermal_state,
  4447. int tcdev_id)
  4448. {
  4449. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4450. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4451. if (!priv) {
  4452. cnss_pr_err("Platform driver is not initialized!\n");
  4453. return -ENODEV;
  4454. }
  4455. mutex_lock(&priv->tcdev_lock);
  4456. list_for_each_entry(cnss_tcdev, &priv->cnss_tcdev_list, tcdev_list) {
  4457. if (cnss_tcdev->tcdev_id != tcdev_id)
  4458. continue;
  4459. *thermal_state = cnss_tcdev->curr_thermal_state;
  4460. mutex_unlock(&priv->tcdev_lock);
  4461. cnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  4462. cnss_tcdev->curr_thermal_state, tcdev_id);
  4463. return 0;
  4464. }
  4465. mutex_unlock(&priv->tcdev_lock);
  4466. cnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  4467. return -EINVAL;
  4468. }
  4469. EXPORT_SYMBOL(cnss_get_curr_therm_cdev_state);
  4470. static int cnss_probe(struct platform_device *plat_dev)
  4471. {
  4472. int ret = 0;
  4473. struct cnss_plat_data *plat_priv;
  4474. const struct of_device_id *of_id;
  4475. const struct platform_device_id *device_id;
  4476. if (cnss_get_plat_priv(plat_dev)) {
  4477. cnss_pr_err("Driver is already initialized!\n");
  4478. ret = -EEXIST;
  4479. goto out;
  4480. }
  4481. ret = cnss_plat_env_available();
  4482. if (ret)
  4483. goto out;
  4484. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  4485. if (!of_id || !of_id->data) {
  4486. cnss_pr_err("Failed to find of match device!\n");
  4487. ret = -ENODEV;
  4488. goto out;
  4489. }
  4490. device_id = of_id->data;
  4491. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  4492. GFP_KERNEL);
  4493. if (!plat_priv) {
  4494. ret = -ENOMEM;
  4495. goto out;
  4496. }
  4497. plat_priv->plat_dev = plat_dev;
  4498. plat_priv->dev_node = NULL;
  4499. plat_priv->device_id = device_id->driver_data;
  4500. plat_priv->dt_type = cnss_dt_type(plat_priv);
  4501. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  4502. plat_priv->dt_type);
  4503. plat_priv->use_fw_path_with_prefix =
  4504. cnss_use_fw_path_with_prefix(plat_priv);
  4505. ret = cnss_get_dev_cfg_node(plat_priv);
  4506. if (ret) {
  4507. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  4508. goto reset_plat_dev;
  4509. }
  4510. cnss_initialize_mem_pool(plat_priv->device_id);
  4511. ret = cnss_get_pld_bus_ops_name(plat_priv);
  4512. if (ret)
  4513. cnss_pr_vdbg("Failed to find bus ops name, err = %d\n",
  4514. ret);
  4515. ret = cnss_get_rc_num(plat_priv);
  4516. if (ret)
  4517. cnss_pr_err("Failed to find PCIe RC number, err = %d\n", ret);
  4518. cnss_pr_dbg("rc_num=%d\n", plat_priv->rc_num);
  4519. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  4520. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  4521. plat_priv->driver_mode = CNSS_DRIVER_MODE_MAX;
  4522. cnss_set_plat_priv(plat_dev, plat_priv);
  4523. cnss_set_device_name(plat_priv);
  4524. platform_set_drvdata(plat_dev, plat_priv);
  4525. INIT_LIST_HEAD(&plat_priv->vreg_list);
  4526. INIT_LIST_HEAD(&plat_priv->clk_list);
  4527. cnss_get_pm_domain_info(plat_priv);
  4528. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  4529. cnss_power_misc_params_init(plat_priv);
  4530. cnss_get_tcs_info(plat_priv);
  4531. cnss_get_cpr_info(plat_priv);
  4532. cnss_aop_interface_init(plat_priv);
  4533. cnss_init_control_params(plat_priv);
  4534. ret = cnss_get_resources(plat_priv);
  4535. if (ret)
  4536. goto reset_ctx;
  4537. ret = cnss_register_esoc(plat_priv);
  4538. if (ret)
  4539. goto free_res;
  4540. ret = cnss_register_bus_scale(plat_priv);
  4541. if (ret)
  4542. goto unreg_esoc;
  4543. ret = cnss_create_sysfs(plat_priv);
  4544. if (ret)
  4545. goto unreg_bus_scale;
  4546. ret = cnss_event_work_init(plat_priv);
  4547. if (ret)
  4548. goto remove_sysfs;
  4549. ret = cnss_dms_init(plat_priv);
  4550. if (ret)
  4551. goto deinit_event_work;
  4552. ret = cnss_debugfs_create(plat_priv);
  4553. if (ret)
  4554. goto deinit_dms;
  4555. ret = cnss_misc_init(plat_priv);
  4556. if (ret)
  4557. goto destroy_debugfs;
  4558. ret = cnss_wlan_hw_disable_check(plat_priv);
  4559. if (ret)
  4560. goto deinit_misc;
  4561. /* Make sure all platform related init are done before
  4562. * device power on and bus init.
  4563. */
  4564. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  4565. ret = cnss_wlan_device_init(plat_priv);
  4566. if (ret)
  4567. goto deinit_misc;
  4568. } else {
  4569. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  4570. }
  4571. cnss_register_coex_service(plat_priv);
  4572. cnss_register_ims_service(plat_priv);
  4573. mutex_init(&plat_priv->tcdev_lock);
  4574. INIT_LIST_HEAD(&plat_priv->cnss_tcdev_list);
  4575. cnss_pr_info("Platform driver probed successfully.\n");
  4576. return 0;
  4577. deinit_misc:
  4578. cnss_misc_deinit(plat_priv);
  4579. destroy_debugfs:
  4580. cnss_debugfs_destroy(plat_priv);
  4581. deinit_dms:
  4582. cnss_dms_deinit(plat_priv);
  4583. deinit_event_work:
  4584. cnss_event_work_deinit(plat_priv);
  4585. remove_sysfs:
  4586. cnss_remove_sysfs(plat_priv);
  4587. unreg_bus_scale:
  4588. cnss_unregister_bus_scale(plat_priv);
  4589. unreg_esoc:
  4590. cnss_unregister_esoc(plat_priv);
  4591. free_res:
  4592. cnss_put_resources(plat_priv);
  4593. reset_ctx:
  4594. cnss_aop_interface_deinit(plat_priv);
  4595. platform_set_drvdata(plat_dev, NULL);
  4596. cnss_deinitialize_mem_pool();
  4597. reset_plat_dev:
  4598. cnss_clear_plat_priv(plat_priv);
  4599. out:
  4600. return ret;
  4601. }
  4602. static int cnss_remove(struct platform_device *plat_dev)
  4603. {
  4604. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  4605. plat_priv->audio_iommu_domain = NULL;
  4606. cnss_genl_exit();
  4607. cnss_unregister_ims_service(plat_priv);
  4608. cnss_unregister_coex_service(plat_priv);
  4609. cnss_bus_deinit(plat_priv);
  4610. cnss_misc_deinit(plat_priv);
  4611. cnss_debugfs_destroy(plat_priv);
  4612. cnss_dms_deinit(plat_priv);
  4613. cnss_qmi_deinit(plat_priv);
  4614. cnss_event_work_deinit(plat_priv);
  4615. cnss_cancel_dms_work();
  4616. cnss_remove_sysfs(plat_priv);
  4617. cnss_unregister_bus_scale(plat_priv);
  4618. cnss_unregister_esoc(plat_priv);
  4619. cnss_put_resources(plat_priv);
  4620. cnss_aop_interface_deinit(plat_priv);
  4621. cnss_deinitialize_mem_pool();
  4622. platform_set_drvdata(plat_dev, NULL);
  4623. cnss_clear_plat_priv(plat_priv);
  4624. return 0;
  4625. }
  4626. static struct platform_driver cnss_platform_driver = {
  4627. .probe = cnss_probe,
  4628. .remove = cnss_remove,
  4629. .driver = {
  4630. .name = "cnss2",
  4631. .of_match_table = cnss_of_match_table,
  4632. #ifdef CONFIG_CNSS_ASYNC
  4633. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4634. #endif
  4635. },
  4636. };
  4637. static bool cnss_check_compatible_node(void)
  4638. {
  4639. struct device_node *dn = NULL;
  4640. for_each_matching_node(dn, cnss_of_match_table) {
  4641. if (of_device_is_available(dn)) {
  4642. cnss_allow_driver_loading = true;
  4643. return true;
  4644. }
  4645. }
  4646. return false;
  4647. }
  4648. /**
  4649. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  4650. *
  4651. * Valid device tree node means a node with "compatible" property from the
  4652. * device match table and "status" property is not disabled.
  4653. *
  4654. * Return: true if valid device tree node found, false if not found
  4655. */
  4656. static bool cnss_is_valid_dt_node_found(void)
  4657. {
  4658. struct device_node *dn = NULL;
  4659. for_each_matching_node(dn, cnss_of_match_table) {
  4660. if (of_device_is_available(dn))
  4661. break;
  4662. }
  4663. if (dn)
  4664. return true;
  4665. return false;
  4666. }
  4667. static int __init cnss_initialize(void)
  4668. {
  4669. int ret = 0;
  4670. if (!cnss_is_valid_dt_node_found())
  4671. return -ENODEV;
  4672. if (!cnss_check_compatible_node())
  4673. return ret;
  4674. cnss_debug_init();
  4675. ret = platform_driver_register(&cnss_platform_driver);
  4676. if (ret)
  4677. cnss_debug_deinit();
  4678. ret = cnss_genl_init();
  4679. if (ret < 0)
  4680. cnss_pr_err("CNSS genl init failed %d\n", ret);
  4681. return ret;
  4682. }
  4683. static void __exit cnss_exit(void)
  4684. {
  4685. cnss_genl_exit();
  4686. platform_driver_unregister(&cnss_platform_driver);
  4687. cnss_debug_deinit();
  4688. }
  4689. module_init(cnss_initialize);
  4690. module_exit(cnss_exit);
  4691. MODULE_LICENSE("GPL v2");
  4692. MODULE_DESCRIPTION("CNSS2 Platform Driver");