dp_rx_err.c 39 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432
  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "dp_internal.h"
  22. #include "hal_api.h"
  23. #include "qdf_trace.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef CONFIG_MCL
  26. #include <cds_ieee80211_common.h>
  27. #else
  28. #include <linux/ieee80211.h>
  29. #endif
  30. #include "dp_rx_defrag.h"
  31. #include <enet.h> /* LLC_SNAP_HDR_LEN */
  32. #ifdef RX_DESC_DEBUG_CHECK
  33. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  34. {
  35. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC)) {
  36. return false;
  37. }
  38. rx_desc->magic = 0;
  39. return true;
  40. }
  41. #else
  42. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  43. {
  44. return true;
  45. }
  46. #endif
  47. /**
  48. * dp_rx_mcast_echo_check() - check if the mcast pkt is a loop
  49. * back on same vap or a different vap.
  50. *
  51. * @soc: core DP main context
  52. * @peer: dp peer handler
  53. * @rx_tlv_hdr: start of the rx TLV header
  54. * @nbuf: pkt buffer
  55. *
  56. * Return: bool (true if it is a looped back pkt else false)
  57. *
  58. */
  59. static inline bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  60. struct dp_peer *peer,
  61. uint8_t *rx_tlv_hdr,
  62. qdf_nbuf_t nbuf)
  63. {
  64. struct dp_vdev *vdev = peer->vdev;
  65. struct dp_ast_entry *ase;
  66. uint16_t sa_idx = 0;
  67. uint8_t *data;
  68. /*
  69. * Multicast Echo Check is required only if vdev is STA and
  70. * received pkt is a multicast/broadcast pkt. otherwise
  71. * skip the MEC check.
  72. */
  73. if (vdev->opmode != wlan_op_mode_sta)
  74. return false;
  75. if (!hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))
  76. return false;
  77. data = qdf_nbuf_data(nbuf);
  78. /*
  79. * if the received pkts src mac addr matches with vdev
  80. * mac address then drop the pkt as it is looped back
  81. */
  82. if (!(qdf_mem_cmp(&data[DP_MAC_ADDR_LEN],
  83. vdev->mac_addr.raw,
  84. DP_MAC_ADDR_LEN)))
  85. return true;
  86. /*
  87. * In case of qwrap isolation mode, donot drop loopback packets.
  88. * In isolation mode, all packets from the wired stations need to go
  89. * to rootap and loop back to reach the wireless stations and
  90. * vice-versa.
  91. */
  92. if (qdf_unlikely(vdev->isolation_vdev))
  93. return false;
  94. /* if the received pkts src mac addr matches with the
  95. * wired PCs MAC addr which is behind the STA or with
  96. * wireless STAs MAC addr which are behind the Repeater,
  97. * then drop the pkt as it is looped back
  98. */
  99. qdf_spin_lock_bh(&soc->ast_lock);
  100. if (hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr)) {
  101. sa_idx = hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr);
  102. if ((sa_idx < 0) ||
  103. (sa_idx >= (WLAN_UMAC_PSOC_MAX_PEERS * 2))) {
  104. qdf_spin_unlock_bh(&soc->ast_lock);
  105. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  106. "invalid sa_idx: %d", sa_idx);
  107. qdf_assert_always(0);
  108. }
  109. ase = soc->ast_table[sa_idx];
  110. if (!ase) {
  111. /* We do not get a peer map event for STA and without
  112. * this event we don't know what is STA's sa_idx.
  113. * For this reason the AST is still not associated to
  114. * any index postion in ast_table.
  115. * In these kind of scenarios where sa is valid but
  116. * ast is not in ast_table, we use the below API to get
  117. * AST entry for STA's own mac_address.
  118. */
  119. ase = dp_peer_ast_hash_find(soc,
  120. &data[DP_MAC_ADDR_LEN]);
  121. }
  122. } else
  123. ase = dp_peer_ast_hash_find(soc, &data[DP_MAC_ADDR_LEN]);
  124. if (ase) {
  125. ase->ast_idx = sa_idx;
  126. soc->ast_table[sa_idx] = ase;
  127. if (ase->pdev_id != vdev->pdev->pdev_id) {
  128. qdf_spin_unlock_bh(&soc->ast_lock);
  129. QDF_TRACE(QDF_MODULE_ID_DP,
  130. QDF_TRACE_LEVEL_INFO,
  131. "Detected DBDC Root AP %pM, %d %d",
  132. &data[DP_MAC_ADDR_LEN], vdev->pdev->pdev_id,
  133. ase->pdev_id);
  134. return false;
  135. }
  136. if ((ase->type == CDP_TXRX_AST_TYPE_MEC) ||
  137. (ase->peer != peer)) {
  138. qdf_spin_unlock_bh(&soc->ast_lock);
  139. QDF_TRACE(QDF_MODULE_ID_DP,
  140. QDF_TRACE_LEVEL_INFO,
  141. "received pkt with same src mac %pM",
  142. &data[DP_MAC_ADDR_LEN]);
  143. return true;
  144. }
  145. }
  146. qdf_spin_unlock_bh(&soc->ast_lock);
  147. return false;
  148. }
  149. /**
  150. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  151. * (WBM) by address
  152. *
  153. * @soc: core DP main context
  154. * @link_desc_addr: link descriptor addr
  155. *
  156. * Return: QDF_STATUS
  157. */
  158. QDF_STATUS
  159. dp_rx_link_desc_return_by_addr(struct dp_soc *soc, void *link_desc_addr,
  160. uint8_t bm_action)
  161. {
  162. struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
  163. void *wbm_rel_srng = wbm_desc_rel_ring->hal_srng;
  164. void *hal_soc = soc->hal_soc;
  165. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  166. void *src_srng_desc;
  167. if (!wbm_rel_srng) {
  168. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  169. "WBM RELEASE RING not initialized");
  170. return status;
  171. }
  172. if (qdf_unlikely(hal_srng_access_start(hal_soc, wbm_rel_srng))) {
  173. /* TODO */
  174. /*
  175. * Need API to convert from hal_ring pointer to
  176. * Ring Type / Ring Id combo
  177. */
  178. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  179. FL("HAL RING Access For WBM Release SRNG Failed - %pK"),
  180. wbm_rel_srng);
  181. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  182. goto done;
  183. }
  184. src_srng_desc = hal_srng_src_get_next(hal_soc, wbm_rel_srng);
  185. if (qdf_likely(src_srng_desc)) {
  186. /* Return link descriptor through WBM ring (SW2WBM)*/
  187. hal_rx_msdu_link_desc_set(hal_soc,
  188. src_srng_desc, link_desc_addr, bm_action);
  189. status = QDF_STATUS_SUCCESS;
  190. } else {
  191. struct hal_srng *srng = (struct hal_srng *)wbm_rel_srng;
  192. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  193. FL("WBM Release Ring (Id %d) Full"), srng->ring_id);
  194. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  195. "HP 0x%x Reap HP 0x%x TP 0x%x Cached TP 0x%x",
  196. *srng->u.src_ring.hp_addr, srng->u.src_ring.reap_hp,
  197. *srng->u.src_ring.tp_addr, srng->u.src_ring.cached_tp);
  198. }
  199. done:
  200. hal_srng_access_end(hal_soc, wbm_rel_srng);
  201. return status;
  202. }
  203. /**
  204. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  205. * (WBM), following error handling
  206. *
  207. * @soc: core DP main context
  208. * @ring_desc: opaque pointer to the REO error ring descriptor
  209. *
  210. * Return: QDF_STATUS
  211. */
  212. QDF_STATUS
  213. dp_rx_link_desc_return(struct dp_soc *soc, void *ring_desc, uint8_t bm_action)
  214. {
  215. void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
  216. return dp_rx_link_desc_return_by_addr(soc, buf_addr_info, bm_action);
  217. }
  218. /**
  219. * dp_rx_msdus_drop() - Drops all MSDU's per MPDU
  220. *
  221. * @soc: core txrx main context
  222. * @ring_desc: opaque pointer to the REO error ring descriptor
  223. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  224. * @head: head of the local descriptor free-list
  225. * @tail: tail of the local descriptor free-list
  226. * @quota: No. of units (packets) that can be serviced in one shot.
  227. *
  228. * This function is used to drop all MSDU in an MPDU
  229. *
  230. * Return: uint32_t: No. of elements processed
  231. */
  232. static uint32_t dp_rx_msdus_drop(struct dp_soc *soc, void *ring_desc,
  233. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  234. union dp_rx_desc_list_elem_t **head,
  235. union dp_rx_desc_list_elem_t **tail,
  236. uint32_t quota)
  237. {
  238. uint32_t rx_bufs_used = 0;
  239. void *link_desc_va;
  240. struct hal_buf_info buf_info;
  241. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  242. int i;
  243. uint8_t *rx_tlv_hdr;
  244. uint32_t tid;
  245. hal_rx_reo_buf_paddr_get(ring_desc, &buf_info);
  246. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  247. /* No UNMAP required -- this is "malloc_consistent" memory */
  248. hal_rx_msdu_list_get(link_desc_va, &msdu_list,
  249. &mpdu_desc_info->msdu_count);
  250. for (i = 0; (i < mpdu_desc_info->msdu_count) && quota--; i++) {
  251. struct dp_rx_desc *rx_desc =
  252. dp_rx_cookie_2_va_rxdma_buf(soc,
  253. msdu_list.sw_cookie[i]);
  254. qdf_assert(rx_desc);
  255. if (!dp_rx_desc_check_magic(rx_desc)) {
  256. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  257. FL("Invalid rx_desc cookie=%d"),
  258. msdu_list.sw_cookie[i]);
  259. return rx_bufs_used;
  260. }
  261. rx_bufs_used++;
  262. tid = hal_rx_mpdu_start_tid_get(rx_desc->rx_buf_start);
  263. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  264. "Packet received with PN error for tid :%d", tid);
  265. rx_tlv_hdr = qdf_nbuf_data(rx_desc->nbuf);
  266. if (hal_rx_encryption_info_valid(rx_tlv_hdr))
  267. hal_rx_print_pn(rx_tlv_hdr);
  268. /* Just free the buffers */
  269. qdf_nbuf_free(rx_desc->nbuf);
  270. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  271. }
  272. /* Return link descriptor through WBM ring (SW2WBM)*/
  273. dp_rx_link_desc_return(soc, ring_desc, HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  274. return rx_bufs_used;
  275. }
  276. /**
  277. * dp_rx_pn_error_handle() - Handles PN check errors
  278. *
  279. * @soc: core txrx main context
  280. * @ring_desc: opaque pointer to the REO error ring descriptor
  281. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  282. * @head: head of the local descriptor free-list
  283. * @tail: tail of the local descriptor free-list
  284. * @quota: No. of units (packets) that can be serviced in one shot.
  285. *
  286. * This function implements PN error handling
  287. * If the peer is configured to ignore the PN check errors
  288. * or if DP feels, that this frame is still OK, the frame can be
  289. * re-injected back to REO to use some of the other features
  290. * of REO e.g. duplicate detection/routing to other cores
  291. *
  292. * Return: uint32_t: No. of elements processed
  293. */
  294. static uint32_t
  295. dp_rx_pn_error_handle(struct dp_soc *soc, void *ring_desc,
  296. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  297. union dp_rx_desc_list_elem_t **head,
  298. union dp_rx_desc_list_elem_t **tail,
  299. uint32_t quota)
  300. {
  301. uint16_t peer_id;
  302. uint32_t rx_bufs_used = 0;
  303. struct dp_peer *peer;
  304. bool peer_pn_policy = false;
  305. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  306. mpdu_desc_info->peer_meta_data);
  307. peer = dp_peer_find_by_id(soc, peer_id);
  308. if (qdf_likely(peer)) {
  309. /*
  310. * TODO: Check for peer specific policies & set peer_pn_policy
  311. */
  312. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  313. "discard rx due to PN error for peer %pK "
  314. "(%02x:%02x:%02x:%02x:%02x:%02x)\n",
  315. peer,
  316. peer->mac_addr.raw[0], peer->mac_addr.raw[1],
  317. peer->mac_addr.raw[2], peer->mac_addr.raw[3],
  318. peer->mac_addr.raw[4], peer->mac_addr.raw[5]);
  319. }
  320. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  321. "Packet received with PN error");
  322. /* No peer PN policy -- definitely drop */
  323. if (!peer_pn_policy)
  324. rx_bufs_used = dp_rx_msdus_drop(soc, ring_desc,
  325. mpdu_desc_info,
  326. head, tail, quota);
  327. return rx_bufs_used;
  328. }
  329. /**
  330. * dp_rx_2k_jump_handle() - Handles Sequence Number Jump by 2K
  331. *
  332. * @soc: core txrx main context
  333. * @ring_desc: opaque pointer to the REO error ring descriptor
  334. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  335. * @head: head of the local descriptor free-list
  336. * @tail: tail of the local descriptor free-list
  337. * @quota: No. of units (packets) that can be serviced in one shot.
  338. *
  339. * This function implements the error handling when sequence number
  340. * of the MPDU jumps suddenly by 2K.Today there are 2 cases that
  341. * need to be handled:
  342. * A) CSN (Current Sequence Number) = Last Valid SN (LSN) + 2K
  343. * B) CSN = LSN + 2K, but falls within a "BA sized window" of the SSN
  344. * For case A) the protocol stack is invoked to generate DELBA/DEAUTH frame
  345. * For case B), the frame is normally dropped, no more action is taken
  346. *
  347. * Return: uint32_t: No. of elements processed
  348. */
  349. static uint32_t
  350. dp_rx_2k_jump_handle(struct dp_soc *soc, void *ring_desc,
  351. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  352. union dp_rx_desc_list_elem_t **head,
  353. union dp_rx_desc_list_elem_t **tail,
  354. uint32_t quota)
  355. {
  356. return dp_rx_msdus_drop(soc, ring_desc, mpdu_desc_info,
  357. head, tail, quota);
  358. }
  359. /**
  360. * dp_rx_chain_msdus() - Function to chain all msdus of a mpdu
  361. * to pdev invalid peer list
  362. *
  363. * @soc: core DP main context
  364. * @nbuf: Buffer pointer
  365. * @rx_tlv_hdr: start of rx tlv header
  366. * @mac_id: mac id
  367. *
  368. * Return: bool: true for last msdu of mpdu
  369. */
  370. static bool
  371. dp_rx_chain_msdus(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  372. uint8_t mac_id)
  373. {
  374. bool mpdu_done = false;
  375. qdf_nbuf_t curr_nbuf = NULL;
  376. qdf_nbuf_t tmp_nbuf = NULL;
  377. /* TODO: Currently only single radio is supported, hence
  378. * pdev hard coded to '0' index
  379. */
  380. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  381. if (!dp_pdev->first_nbuf) {
  382. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  383. dp_pdev->ppdu_id = HAL_RX_HW_DESC_GET_PPDUID_GET(rx_tlv_hdr);
  384. dp_pdev->first_nbuf = true;
  385. /* If the new nbuf received is the first msdu of the
  386. * amsdu and there are msdus in the invalid peer msdu
  387. * list, then let us free all the msdus of the invalid
  388. * peer msdu list.
  389. * This scenario can happen when we start receiving
  390. * new a-msdu even before the previous a-msdu is completely
  391. * received.
  392. */
  393. curr_nbuf = dp_pdev->invalid_peer_head_msdu;
  394. while (curr_nbuf) {
  395. tmp_nbuf = curr_nbuf->next;
  396. qdf_nbuf_free(curr_nbuf);
  397. curr_nbuf = tmp_nbuf;
  398. }
  399. dp_pdev->invalid_peer_head_msdu = NULL;
  400. dp_pdev->invalid_peer_tail_msdu = NULL;
  401. hal_rx_mon_hw_desc_get_mpdu_status(rx_tlv_hdr,
  402. &(dp_pdev->ppdu_info.rx_status));
  403. }
  404. if (dp_pdev->ppdu_id == hal_rx_attn_phy_ppdu_id_get(rx_tlv_hdr) &&
  405. hal_rx_attn_msdu_done_get(rx_tlv_hdr)) {
  406. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  407. qdf_assert_always(dp_pdev->first_nbuf == true);
  408. dp_pdev->first_nbuf = false;
  409. mpdu_done = true;
  410. }
  411. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  412. dp_pdev->invalid_peer_tail_msdu,
  413. nbuf);
  414. return mpdu_done;
  415. }
  416. /**
  417. * dp_rx_null_q_desc_handle() - Function to handle NULL Queue
  418. * descriptor violation on either a
  419. * REO or WBM ring
  420. *
  421. * @soc: core DP main context
  422. * @nbuf: buffer pointer
  423. * @rx_tlv_hdr: start of rx tlv header
  424. * @pool_id: mac id
  425. *
  426. * This function handles NULL queue descriptor violations arising out
  427. * a missing REO queue for a given peer or a given TID. This typically
  428. * may happen if a packet is received on a QOS enabled TID before the
  429. * ADDBA negotiation for that TID, when the TID queue is setup. Or
  430. * it may also happen for MC/BC frames if they are not routed to the
  431. * non-QOS TID queue, in the absence of any other default TID queue.
  432. * This error can show up both in a REO destination or WBM release ring.
  433. *
  434. */
  435. static void
  436. dp_rx_null_q_desc_handle(struct dp_soc *soc,
  437. qdf_nbuf_t nbuf,
  438. uint8_t *rx_tlv_hdr,
  439. uint8_t pool_id)
  440. {
  441. uint32_t pkt_len, l2_hdr_offset;
  442. uint16_t msdu_len;
  443. struct dp_vdev *vdev;
  444. uint16_t peer_id = 0xFFFF;
  445. struct dp_peer *peer = NULL;
  446. uint8_t tid;
  447. qdf_nbuf_set_rx_chfrag_start(nbuf,
  448. hal_rx_msdu_end_first_msdu_get(rx_tlv_hdr));
  449. qdf_nbuf_set_rx_chfrag_end(nbuf,
  450. hal_rx_msdu_end_last_msdu_get(rx_tlv_hdr));
  451. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  452. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  453. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  454. /* Set length in nbuf */
  455. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  456. /*
  457. * Check if DMA completed -- msdu_done is the last bit
  458. * to be written
  459. */
  460. if (!hal_rx_attn_msdu_done_get(rx_tlv_hdr)) {
  461. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  462. FL("MSDU DONE failure"));
  463. hal_rx_dump_pkt_tlvs(rx_tlv_hdr, QDF_TRACE_LEVEL_INFO);
  464. qdf_assert(0);
  465. }
  466. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_tlv_hdr);
  467. peer = dp_peer_find_by_id(soc, peer_id);
  468. if (!peer) {
  469. bool mpdu_done = false;
  470. struct dp_pdev *pdev = soc->pdev_list[pool_id];
  471. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_DP, "peer is NULL");
  472. mpdu_done = dp_rx_chain_msdus(soc, nbuf, rx_tlv_hdr, pool_id);
  473. /* Trigger invalid peer handler wrapper */
  474. dp_rx_process_invalid_peer_wrapper(soc, nbuf, mpdu_done);
  475. if (mpdu_done) {
  476. pdev->invalid_peer_head_msdu = NULL;
  477. pdev->invalid_peer_tail_msdu = NULL;
  478. }
  479. return;
  480. }
  481. vdev = peer->vdev;
  482. if (!vdev) {
  483. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  484. FL("INVALID vdev %pK OR osif_rx"), vdev);
  485. /* Drop & free packet */
  486. qdf_nbuf_free(nbuf);
  487. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  488. return;
  489. }
  490. /*
  491. * Advance the packet start pointer by total size of
  492. * pre-header TLV's
  493. */
  494. qdf_nbuf_pull_head(nbuf, (l2_hdr_offset + RX_PKT_TLVS_LEN));
  495. if (dp_rx_mcast_echo_check(soc, peer, rx_tlv_hdr, nbuf)) {
  496. /* this is a looped back MCBC pkt, drop it */
  497. qdf_nbuf_free(nbuf);
  498. return;
  499. }
  500. /*
  501. * In qwrap mode if the received packet matches with any of the vdev
  502. * mac addresses, drop it. Donot receive multicast packets originated
  503. * from any proxysta.
  504. */
  505. if (check_qwrap_multicast_loopback(vdev, nbuf)) {
  506. qdf_nbuf_free(nbuf);
  507. return;
  508. }
  509. if (qdf_unlikely((peer->nawds_enabled == true) &&
  510. hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  511. QDF_TRACE(QDF_MODULE_ID_DP,
  512. QDF_TRACE_LEVEL_DEBUG,
  513. "%s free buffer for multicast packet",
  514. __func__);
  515. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  516. qdf_nbuf_free(nbuf);
  517. return;
  518. }
  519. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer,
  520. hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  521. QDF_TRACE(QDF_MODULE_ID_DP,
  522. QDF_TRACE_LEVEL_ERROR,
  523. FL("mcast Policy Check Drop pkt"));
  524. /* Drop & free packet */
  525. qdf_nbuf_free(nbuf);
  526. return;
  527. }
  528. /* WDS Source Port Learning */
  529. if (qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet &&
  530. vdev->wds_enabled))
  531. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, peer, nbuf);
  532. if (hal_rx_mpdu_start_mpdu_qos_control_valid_get(rx_tlv_hdr)) {
  533. /* TODO: Assuming that qos_control_valid also indicates
  534. * unicast. Should we check this?
  535. */
  536. tid = hal_rx_mpdu_start_tid_get(rx_tlv_hdr);
  537. if (peer &&
  538. peer->rx_tid[tid].hw_qdesc_vaddr_unaligned == NULL) {
  539. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  540. dp_rx_tid_setup_wifi3(peer, tid, 1, IEEE80211_SEQ_MAX);
  541. }
  542. }
  543. #ifdef QCA_WIFI_NAPIER_EMULATION /* Debug code, remove later */
  544. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  545. "%s: p_id %d msdu_len %d hdr_off %d",
  546. __func__, peer_id, msdu_len, l2_hdr_offset);
  547. print_hex_dump(KERN_ERR, "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  548. qdf_nbuf_data(nbuf), 128, false);
  549. #endif /* NAPIER_EMULATION */
  550. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  551. qdf_nbuf_set_next(nbuf, NULL);
  552. dp_rx_deliver_raw(vdev, nbuf, peer);
  553. } else {
  554. if (qdf_unlikely(peer->bss_peer)) {
  555. QDF_TRACE(QDF_MODULE_ID_DP,
  556. QDF_TRACE_LEVEL_INFO,
  557. FL("received pkt with same src MAC"));
  558. /* Drop & free packet */
  559. qdf_nbuf_free(nbuf);
  560. return;
  561. }
  562. if (vdev->osif_rx) {
  563. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  564. FL("vdev %pK osif_rx %pK"), vdev,
  565. vdev->osif_rx);
  566. qdf_nbuf_set_next(nbuf, NULL);
  567. vdev->osif_rx(vdev->osif_vdev, nbuf);
  568. DP_STATS_INCC_PKT(vdev->pdev, rx.multicast, 1,
  569. qdf_nbuf_len(nbuf),
  570. hal_rx_msdu_end_da_is_mcbc_get(
  571. rx_tlv_hdr));
  572. DP_STATS_INC_PKT(vdev->pdev, rx.to_stack, 1,
  573. qdf_nbuf_len(nbuf));
  574. } else {
  575. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  576. FL("INVALID vdev %pK OR osif_rx"), vdev);
  577. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  578. }
  579. }
  580. return;
  581. }
  582. /**
  583. * dp_rx_err_deliver() - Function to deliver error frames to OS
  584. *
  585. * @soc: core DP main context
  586. * @rx_desc : pointer to the sw rx descriptor
  587. * @head: pointer to head of rx descriptors to be added to free list
  588. * @tail: pointer to tail of rx descriptors to be added to free list
  589. * quota: upper limit of descriptors that can be reaped
  590. *
  591. * Return: uint32_t: No. of Rx buffers reaped
  592. */
  593. static void
  594. dp_rx_err_deliver(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  595. {
  596. uint32_t pkt_len, l2_hdr_offset;
  597. uint16_t msdu_len;
  598. struct dp_vdev *vdev;
  599. uint16_t peer_id = 0xFFFF;
  600. struct dp_peer *peer = NULL;
  601. struct ether_header *eh;
  602. bool isBroadcast;
  603. /*
  604. * Check if DMA completed -- msdu_done is the last bit
  605. * to be written
  606. */
  607. if (!hal_rx_attn_msdu_done_get(rx_tlv_hdr)) {
  608. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  609. FL("MSDU DONE failure"));
  610. hal_rx_dump_pkt_tlvs(rx_tlv_hdr, QDF_TRACE_LEVEL_INFO);
  611. qdf_assert(0);
  612. }
  613. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_tlv_hdr);
  614. peer = dp_peer_find_by_id(soc, peer_id);
  615. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  616. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  617. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  618. /* Set length in nbuf */
  619. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  620. qdf_nbuf_set_next(nbuf, NULL);
  621. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  622. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  623. if (!peer) {
  624. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  625. FL("peer is NULL"));
  626. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  627. qdf_nbuf_len(nbuf));
  628. /* Trigger invalid peer handler wrapper */
  629. dp_rx_process_invalid_peer_wrapper(soc, nbuf, true);
  630. return;
  631. }
  632. vdev = peer->vdev;
  633. if (!vdev) {
  634. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  635. FL("INVALID vdev %pK OR osif_rx"), vdev);
  636. /* Drop & free packet */
  637. qdf_nbuf_free(nbuf);
  638. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  639. return;
  640. }
  641. /* Drop & free packet if mesh mode not enabled */
  642. if (!vdev->mesh_vdev) {
  643. qdf_nbuf_free(nbuf);
  644. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  645. return;
  646. }
  647. /*
  648. * Advance the packet start pointer by total size of
  649. * pre-header TLV's
  650. */
  651. qdf_nbuf_pull_head(nbuf, (l2_hdr_offset + RX_PKT_TLVS_LEN));
  652. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  653. == QDF_STATUS_SUCCESS) {
  654. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_MED,
  655. FL("mesh pkt filtered"));
  656. DP_STATS_INC(vdev->pdev, dropped.mesh_filter, 1);
  657. qdf_nbuf_free(nbuf);
  658. return;
  659. }
  660. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  661. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr) &&
  662. (vdev->rx_decap_type ==
  663. htt_cmn_pkt_type_ethernet))) {
  664. eh = (struct ether_header *)qdf_nbuf_data(nbuf);
  665. isBroadcast = (IEEE80211_IS_BROADCAST
  666. (eh->ether_dhost)) ? 1 : 0 ;
  667. if (isBroadcast) {
  668. DP_STATS_INC_PKT(peer, rx.bcast, 1,
  669. qdf_nbuf_len(nbuf));
  670. }
  671. }
  672. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  673. dp_rx_deliver_raw(vdev, nbuf, peer);
  674. } else {
  675. DP_STATS_INC(vdev->pdev, rx.to_stack.num, 1);
  676. vdev->osif_rx(vdev->osif_vdev, nbuf);
  677. }
  678. return;
  679. }
  680. /**
  681. * dp_rx_process_mic_error(): Function to pass mic error indication to umac
  682. * @soc: DP SOC handle
  683. * @rx_desc : pointer to the sw rx descriptor
  684. * @head: pointer to head of rx descriptors to be added to free list
  685. * @tail: pointer to tail of rx descriptors to be added to free list
  686. *
  687. * return: void
  688. */
  689. void
  690. dp_rx_process_mic_error(struct dp_soc *soc,
  691. qdf_nbuf_t nbuf,
  692. uint8_t *rx_tlv_hdr)
  693. {
  694. struct dp_vdev *vdev = NULL;
  695. struct dp_pdev *pdev = NULL;
  696. struct ol_if_ops *tops = NULL;
  697. struct ieee80211_frame *wh;
  698. uint8_t *rx_pkt_hdr;
  699. struct dp_peer *peer;
  700. uint16_t peer_id, rx_seq, fragno;
  701. unsigned int tid;
  702. QDF_STATUS status;
  703. if (!hal_rx_msdu_end_first_msdu_get(rx_tlv_hdr))
  704. return;
  705. rx_pkt_hdr = hal_rx_pkt_hdr_get(qdf_nbuf_data(nbuf));
  706. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  707. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_tlv_hdr);
  708. peer = dp_peer_find_by_id(soc, peer_id);
  709. if (!peer) {
  710. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  711. "peer not found");
  712. goto fail;
  713. }
  714. vdev = peer->vdev;
  715. if (!vdev) {
  716. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  717. "VDEV not found");
  718. goto fail;
  719. }
  720. pdev = vdev->pdev;
  721. if (!pdev) {
  722. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  723. "PDEV not found");
  724. goto fail;
  725. }
  726. tid = hal_rx_mpdu_start_tid_get(qdf_nbuf_data(nbuf));
  727. rx_seq = (((*(uint16_t *)wh->i_seq) &
  728. IEEE80211_SEQ_SEQ_MASK) >>
  729. IEEE80211_SEQ_SEQ_SHIFT);
  730. fragno = dp_rx_frag_get_mpdu_frag_number(qdf_nbuf_data(nbuf));
  731. /* Can get only last fragment */
  732. if (fragno) {
  733. status = dp_rx_defrag_add_last_frag(soc, peer,
  734. tid, rx_seq, nbuf);
  735. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  736. "%s: Frag pkt seq# %d frag# %d consumed status %d !\n",
  737. __func__, rx_seq, fragno, status);
  738. return;
  739. }
  740. tops = pdev->soc->cdp_soc.ol_ops;
  741. if (tops->rx_mic_error)
  742. tops->rx_mic_error(pdev->osif_pdev, vdev->vdev_id, wh);
  743. fail:
  744. qdf_nbuf_free(nbuf);
  745. return;
  746. }
  747. /**
  748. * dp_rx_err_process() - Processes error frames routed to REO error ring
  749. *
  750. * @soc: core txrx main context
  751. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  752. * @quota: No. of units (packets) that can be serviced in one shot.
  753. *
  754. * This function implements error processing and top level demultiplexer
  755. * for all the frames routed to REO error ring.
  756. *
  757. * Return: uint32_t: No. of elements processed
  758. */
  759. uint32_t
  760. dp_rx_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  761. {
  762. void *hal_soc;
  763. void *ring_desc;
  764. union dp_rx_desc_list_elem_t *head = NULL;
  765. union dp_rx_desc_list_elem_t *tail = NULL;
  766. uint32_t rx_bufs_used = 0;
  767. uint8_t buf_type;
  768. uint8_t error, rbm;
  769. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  770. struct hal_buf_info hbi;
  771. struct dp_pdev *dp_pdev;
  772. struct dp_srng *dp_rxdma_srng;
  773. struct rx_desc_pool *rx_desc_pool;
  774. uint32_t cookie = 0;
  775. void *link_desc_va;
  776. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  777. uint16_t num_msdus;
  778. /* Debug -- Remove later */
  779. qdf_assert(soc && hal_ring);
  780. hal_soc = soc->hal_soc;
  781. /* Debug -- Remove later */
  782. qdf_assert(hal_soc);
  783. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  784. /* TODO */
  785. /*
  786. * Need API to convert from hal_ring pointer to
  787. * Ring Type / Ring Id combo
  788. */
  789. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  790. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  791. FL("HAL RING Access Failed -- %pK"), hal_ring);
  792. goto done;
  793. }
  794. while (qdf_likely(quota-- && (ring_desc =
  795. hal_srng_dst_get_next(hal_soc, hal_ring)))) {
  796. DP_STATS_INC(soc, rx.err_ring_pkts, 1);
  797. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  798. qdf_assert(error == HAL_REO_ERROR_DETECTED);
  799. buf_type = HAL_RX_REO_BUF_TYPE_GET(ring_desc);
  800. /*
  801. * For REO error ring, expect only MSDU LINK DESC
  802. */
  803. qdf_assert_always(buf_type == HAL_RX_REO_MSDU_LINK_DESC_TYPE);
  804. cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  805. /*
  806. * check for the magic number in the sw cookie
  807. */
  808. qdf_assert_always((cookie >> LINK_DESC_ID_SHIFT) &
  809. LINK_DESC_ID_START);
  810. /*
  811. * Check if the buffer is to be processed on this processor
  812. */
  813. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  814. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  815. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &hbi);
  816. hal_rx_msdu_list_get(link_desc_va, &msdu_list, &num_msdus);
  817. if (qdf_unlikely((msdu_list.rbm[0] != DP_WBM2SW_RBM) &&
  818. (msdu_list.rbm[0] !=
  819. HAL_RX_BUF_RBM_WBM_IDLE_DESC_LIST))) {
  820. /* TODO */
  821. /* Call appropriate handler */
  822. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  823. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  824. FL("Invalid RBM %d"), msdu_list.rbm[0]);
  825. /* Return link descriptor through WBM ring (SW2WBM)*/
  826. dp_rx_link_desc_return(soc, ring_desc,
  827. HAL_BM_ACTION_RELEASE_MSDU_LIST);
  828. continue;
  829. }
  830. /* Get the MPDU DESC info */
  831. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  832. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_FRAGMENT) {
  833. /* TODO */
  834. rx_bufs_used += dp_rx_frag_handle(soc,
  835. ring_desc, &mpdu_desc_info,
  836. &head, &tail, quota);
  837. DP_STATS_INC(soc, rx.rx_frags, 1);
  838. continue;
  839. }
  840. if (hal_rx_reo_is_pn_error(ring_desc)) {
  841. /* TOD0 */
  842. DP_STATS_INC(soc,
  843. rx.err.
  844. reo_error[HAL_REO_ERR_PN_CHECK_FAILED],
  845. 1);
  846. rx_bufs_used += dp_rx_pn_error_handle(soc,
  847. ring_desc, &mpdu_desc_info,
  848. &head, &tail, quota);
  849. continue;
  850. }
  851. if (hal_rx_reo_is_2k_jump(ring_desc)) {
  852. /* TOD0 */
  853. DP_STATS_INC(soc,
  854. rx.err.
  855. reo_error[HAL_REO_ERR_REGULAR_FRAME_2K_JUMP],
  856. 1);
  857. rx_bufs_used += dp_rx_2k_jump_handle(soc,
  858. ring_desc, &mpdu_desc_info,
  859. &head, &tail, quota);
  860. continue;
  861. }
  862. }
  863. done:
  864. hal_srng_access_end(hal_soc, hal_ring);
  865. if (soc->rx.flags.defrag_timeout_check)
  866. dp_rx_defrag_waitlist_flush(soc);
  867. /* Assume MAC id = 0, owner = 0 */
  868. if (rx_bufs_used) {
  869. dp_pdev = soc->pdev_list[0];
  870. dp_rxdma_srng = &dp_pdev->rx_refill_buf_ring;
  871. rx_desc_pool = &soc->rx_desc_buf[0];
  872. dp_rx_buffers_replenish(soc, 0, dp_rxdma_srng, rx_desc_pool,
  873. rx_bufs_used, &head, &tail);
  874. }
  875. return rx_bufs_used; /* Assume no scale factor for now */
  876. }
  877. /**
  878. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  879. *
  880. * @soc: core txrx main context
  881. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  882. * @quota: No. of units (packets) that can be serviced in one shot.
  883. *
  884. * This function implements error processing and top level demultiplexer
  885. * for all the frames routed to WBM2HOST sw release ring.
  886. *
  887. * Return: uint32_t: No. of elements processed
  888. */
  889. uint32_t
  890. dp_rx_wbm_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  891. {
  892. void *hal_soc;
  893. void *ring_desc;
  894. struct dp_rx_desc *rx_desc;
  895. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  896. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  897. uint32_t rx_bufs_used = 0;
  898. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  899. uint8_t buf_type, rbm;
  900. uint32_t rx_buf_cookie;
  901. uint8_t mac_id;
  902. struct dp_pdev *dp_pdev;
  903. struct dp_srng *dp_rxdma_srng;
  904. struct rx_desc_pool *rx_desc_pool;
  905. uint8_t *rx_tlv_hdr;
  906. qdf_nbuf_t nbuf_head = NULL;
  907. qdf_nbuf_t nbuf_tail = NULL;
  908. qdf_nbuf_t nbuf, next;
  909. struct hal_wbm_err_desc_info wbm_err_info = { 0 };
  910. uint8_t pool_id;
  911. /* Debug -- Remove later */
  912. qdf_assert(soc && hal_ring);
  913. hal_soc = soc->hal_soc;
  914. /* Debug -- Remove later */
  915. qdf_assert(hal_soc);
  916. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  917. /* TODO */
  918. /*
  919. * Need API to convert from hal_ring pointer to
  920. * Ring Type / Ring Id combo
  921. */
  922. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  923. FL("HAL RING Access Failed -- %pK"), hal_ring);
  924. goto done;
  925. }
  926. while (qdf_likely(quota-- && (ring_desc =
  927. hal_srng_dst_get_next(hal_soc, hal_ring)))) {
  928. /* XXX */
  929. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  930. /*
  931. * For WBM ring, expect only MSDU buffers
  932. */
  933. qdf_assert_always(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
  934. qdf_assert((HAL_RX_WBM_ERR_SRC_GET(ring_desc)
  935. == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  936. (HAL_RX_WBM_ERR_SRC_GET(ring_desc)
  937. == HAL_RX_WBM_ERR_SRC_REO));
  938. /*
  939. * Check if the buffer is to be processed on this processor
  940. */
  941. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  942. if (qdf_unlikely(rbm != HAL_RX_BUF_RBM_SW3_BM)) {
  943. /* TODO */
  944. /* Call appropriate handler */
  945. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  946. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  947. FL("Invalid RBM %d"), rbm);
  948. continue;
  949. }
  950. rx_buf_cookie = HAL_RX_WBM_BUF_COOKIE_GET(ring_desc);
  951. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  952. qdf_assert(rx_desc);
  953. if (!dp_rx_desc_check_magic(rx_desc)) {
  954. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  955. FL("Invalid rx_desc cookie=%d"),
  956. rx_buf_cookie);
  957. continue;
  958. }
  959. nbuf = rx_desc->nbuf;
  960. qdf_nbuf_unmap_single(soc->osdev, nbuf, QDF_DMA_BIDIRECTIONAL);
  961. /*
  962. * save the wbm desc info in nbuf TLV. We will need this
  963. * info when we do the actual nbuf processing
  964. */
  965. hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info);
  966. wbm_err_info.pool_id = rx_desc->pool_id;
  967. hal_rx_wbm_err_info_set_in_tlv(qdf_nbuf_data(nbuf),
  968. &wbm_err_info);
  969. rx_bufs_reaped[rx_desc->pool_id]++;
  970. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  971. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  972. &tail[rx_desc->pool_id],
  973. rx_desc);
  974. }
  975. done:
  976. hal_srng_access_end(hal_soc, hal_ring);
  977. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  978. if (rx_bufs_reaped[mac_id]) {
  979. dp_pdev = soc->pdev_list[mac_id];
  980. dp_rxdma_srng = &dp_pdev->rx_refill_buf_ring;
  981. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  982. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  983. rx_desc_pool, rx_bufs_reaped[mac_id],
  984. &head[mac_id], &tail[mac_id]);
  985. rx_bufs_used += rx_bufs_reaped[mac_id];
  986. }
  987. }
  988. nbuf = nbuf_head;
  989. while (nbuf) {
  990. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  991. /*
  992. * retrieve the wbm desc info from nbuf TLV, so we can
  993. * handle error cases appropriately
  994. */
  995. hal_rx_wbm_err_info_get_from_tlv(rx_tlv_hdr, &wbm_err_info);
  996. /* Set queue_mapping in nbuf to 0 */
  997. dp_set_rx_queue(nbuf, 0);
  998. next = nbuf->next;
  999. if (wbm_err_info.wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) {
  1000. if (wbm_err_info.reo_psh_rsn
  1001. == HAL_RX_WBM_REO_PSH_RSN_ERROR) {
  1002. DP_STATS_INC(soc,
  1003. rx.err.reo_error
  1004. [wbm_err_info.reo_err_code], 1);
  1005. switch (wbm_err_info.reo_err_code) {
  1006. /*
  1007. * Handling for packets which have NULL REO
  1008. * queue descriptor
  1009. */
  1010. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  1011. pool_id = wbm_err_info.pool_id;
  1012. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_DP,
  1013. "Got pkt with REO ERROR: %d",
  1014. wbm_err_info.reo_err_code);
  1015. dp_rx_null_q_desc_handle(soc,
  1016. nbuf,
  1017. rx_tlv_hdr,
  1018. pool_id);
  1019. nbuf = next;
  1020. continue;
  1021. /* TODO */
  1022. /* Add per error code accounting */
  1023. default:
  1024. QDF_TRACE(QDF_MODULE_ID_DP,
  1025. QDF_TRACE_LEVEL_DEBUG,
  1026. "REO error %d detected",
  1027. wbm_err_info.reo_err_code);
  1028. }
  1029. }
  1030. } else if (wbm_err_info.wbm_err_src ==
  1031. HAL_RX_WBM_ERR_SRC_RXDMA) {
  1032. if (wbm_err_info.rxdma_psh_rsn
  1033. == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  1034. struct dp_peer *peer = NULL;
  1035. uint16_t peer_id = 0xFFFF;
  1036. DP_STATS_INC(soc,
  1037. rx.err.rxdma_error
  1038. [wbm_err_info.rxdma_err_code], 1);
  1039. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_tlv_hdr);
  1040. peer = dp_peer_find_by_id(soc, peer_id);
  1041. switch (wbm_err_info.rxdma_err_code) {
  1042. case HAL_RXDMA_ERR_UNENCRYPTED:
  1043. dp_rx_err_deliver(soc,
  1044. nbuf,
  1045. rx_tlv_hdr);
  1046. nbuf = next;
  1047. continue;
  1048. case HAL_RXDMA_ERR_TKIP_MIC:
  1049. dp_rx_process_mic_error(soc,
  1050. nbuf,
  1051. rx_tlv_hdr);
  1052. nbuf = next;
  1053. if (peer)
  1054. DP_STATS_INC(peer, rx.err.mic_err, 1);
  1055. continue;
  1056. case HAL_RXDMA_ERR_DECRYPT:
  1057. if (peer)
  1058. DP_STATS_INC(peer, rx.err.decrypt_err, 1);
  1059. QDF_TRACE(QDF_MODULE_ID_DP,
  1060. QDF_TRACE_LEVEL_DEBUG,
  1061. "Packet received with Decrypt error");
  1062. break;
  1063. default:
  1064. QDF_TRACE(QDF_MODULE_ID_DP,
  1065. QDF_TRACE_LEVEL_DEBUG,
  1066. "RXDMA error %d",
  1067. wbm_err_info.
  1068. rxdma_err_code);
  1069. }
  1070. }
  1071. } else {
  1072. /* Should not come here */
  1073. qdf_assert(0);
  1074. }
  1075. hal_rx_dump_pkt_tlvs(rx_tlv_hdr, QDF_TRACE_LEVEL_DEBUG);
  1076. qdf_nbuf_free(nbuf);
  1077. nbuf = next;
  1078. }
  1079. return rx_bufs_used; /* Assume no scale factor for now */
  1080. }
  1081. /**
  1082. * dp_rx_err_mpdu_pop() - extract the MSDU's from link descs
  1083. *
  1084. * @soc: core DP main context
  1085. * @mac_id: mac id which is one of 3 mac_ids
  1086. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  1087. * @head: head of descs list to be freed
  1088. * @tail: tail of decs list to be freed
  1089. * Return: number of msdu in MPDU to be popped
  1090. */
  1091. static inline uint32_t
  1092. dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  1093. void *rxdma_dst_ring_desc,
  1094. union dp_rx_desc_list_elem_t **head,
  1095. union dp_rx_desc_list_elem_t **tail)
  1096. {
  1097. void *rx_msdu_link_desc;
  1098. qdf_nbuf_t msdu;
  1099. qdf_nbuf_t last;
  1100. struct hal_rx_msdu_list msdu_list;
  1101. uint16_t num_msdus;
  1102. struct hal_buf_info buf_info;
  1103. void *p_buf_addr_info;
  1104. void *p_last_buf_addr_info;
  1105. uint32_t rx_bufs_used = 0;
  1106. uint32_t msdu_cnt;
  1107. uint32_t i;
  1108. uint8_t push_reason;
  1109. uint8_t rxdma_error_code = 0;
  1110. uint8_t bm_action = HAL_BM_ACTION_PUT_IN_IDLE_LIST;
  1111. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  1112. msdu = 0;
  1113. last = NULL;
  1114. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  1115. &p_last_buf_addr_info, &msdu_cnt);
  1116. push_reason =
  1117. hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc);
  1118. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  1119. rxdma_error_code =
  1120. hal_rx_reo_ent_rxdma_error_code_get(rxdma_dst_ring_desc);
  1121. }
  1122. do {
  1123. rx_msdu_link_desc =
  1124. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  1125. qdf_assert(rx_msdu_link_desc);
  1126. hal_rx_msdu_list_get(rx_msdu_link_desc, &msdu_list, &num_msdus);
  1127. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  1128. /* if the msdus belongs to NSS offloaded radio &&
  1129. * the rbm is not SW1_BM then return the msdu_link
  1130. * descriptor without freeing the msdus (nbufs). let
  1131. * these buffers be given to NSS completion ring for
  1132. * NSS to free them.
  1133. * else iterate through the msdu link desc list and
  1134. * free each msdu in the list.
  1135. */
  1136. if (msdu_list.rbm[0] != HAL_RX_BUF_RBM_SW3_BM &&
  1137. wlan_cfg_get_dp_pdev_nss_enabled(
  1138. pdev->wlan_cfg_ctx))
  1139. bm_action = HAL_BM_ACTION_RELEASE_MSDU_LIST;
  1140. else {
  1141. for (i = 0; i < num_msdus; i++) {
  1142. struct dp_rx_desc *rx_desc =
  1143. dp_rx_cookie_2_va_rxdma_buf(soc,
  1144. msdu_list.sw_cookie[i]);
  1145. qdf_assert(rx_desc);
  1146. msdu = rx_desc->nbuf;
  1147. qdf_nbuf_unmap_single(soc->osdev, msdu,
  1148. QDF_DMA_FROM_DEVICE);
  1149. QDF_TRACE(QDF_MODULE_ID_DP,
  1150. QDF_TRACE_LEVEL_DEBUG,
  1151. "[%s][%d] msdu_nbuf=%pK \n",
  1152. __func__, __LINE__, msdu);
  1153. qdf_nbuf_free(msdu);
  1154. rx_bufs_used++;
  1155. dp_rx_add_to_free_desc_list(head,
  1156. tail, rx_desc);
  1157. }
  1158. }
  1159. } else {
  1160. rxdma_error_code = HAL_RXDMA_ERR_WAR;
  1161. }
  1162. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  1163. &p_buf_addr_info);
  1164. dp_rx_link_desc_return(soc, p_last_buf_addr_info, bm_action);
  1165. p_last_buf_addr_info = p_buf_addr_info;
  1166. } while (buf_info.paddr);
  1167. DP_STATS_INC(soc, rx.err.rxdma_error[rxdma_error_code], 1);
  1168. if (rxdma_error_code == HAL_RXDMA_ERR_DECRYPT) {
  1169. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1170. "Packet received with Decrypt error");
  1171. }
  1172. return rx_bufs_used;
  1173. }
  1174. /**
  1175. * dp_rxdma_err_process() - RxDMA error processing functionality
  1176. *
  1177. * @soc: core txrx main contex
  1178. * @mac_id: mac id which is one of 3 mac_ids
  1179. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1180. * @quota: No. of units (packets) that can be serviced in one shot.
  1181. * Return: num of buffers processed
  1182. */
  1183. uint32_t
  1184. dp_rxdma_err_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  1185. {
  1186. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  1187. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  1188. void *hal_soc;
  1189. void *rxdma_dst_ring_desc;
  1190. void *err_dst_srng;
  1191. union dp_rx_desc_list_elem_t *head = NULL;
  1192. union dp_rx_desc_list_elem_t *tail = NULL;
  1193. struct dp_srng *dp_rxdma_srng;
  1194. struct rx_desc_pool *rx_desc_pool;
  1195. uint32_t work_done = 0;
  1196. uint32_t rx_bufs_used = 0;
  1197. #ifdef DP_INTR_POLL_BASED
  1198. if (!pdev)
  1199. return 0;
  1200. #endif
  1201. err_dst_srng = pdev->rxdma_err_dst_ring[mac_for_pdev].hal_srng;
  1202. if (!err_dst_srng) {
  1203. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1204. "%s %d : HAL Monitor Destination Ring Init \
  1205. Failed -- %pK\n",
  1206. __func__, __LINE__, err_dst_srng);
  1207. return 0;
  1208. }
  1209. hal_soc = soc->hal_soc;
  1210. qdf_assert(hal_soc);
  1211. if (qdf_unlikely(hal_srng_access_start(hal_soc, err_dst_srng))) {
  1212. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1213. "%s %d : HAL Monitor Destination Ring Init \
  1214. Failed -- %pK\n",
  1215. __func__, __LINE__, err_dst_srng);
  1216. return 0;
  1217. }
  1218. while (qdf_likely(quota-- && (rxdma_dst_ring_desc =
  1219. hal_srng_dst_get_next(hal_soc, err_dst_srng)))) {
  1220. rx_bufs_used += dp_rx_err_mpdu_pop(soc, mac_id,
  1221. rxdma_dst_ring_desc,
  1222. &head, &tail);
  1223. }
  1224. hal_srng_access_end(hal_soc, err_dst_srng);
  1225. if (rx_bufs_used) {
  1226. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1227. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1228. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1229. rx_desc_pool, rx_bufs_used, &head, &tail);
  1230. work_done += rx_bufs_used;
  1231. }
  1232. return work_done;
  1233. }