dp_rx.c 71 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597
  1. /*
  2. * Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef FEATURE_WDS
  32. #include "dp_txrx_wds.h"
  33. #endif
  34. #ifdef ATH_RX_PRI_SAVE
  35. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  36. (qdf_nbuf_set_priority(_nbuf, _tid))
  37. #else
  38. #define DP_RX_TID_SAVE(_nbuf, _tid)
  39. #endif
  40. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  41. static inline
  42. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  43. {
  44. if (ta_peer->vdev->opmode == wlan_op_mode_ndi &&
  45. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  46. DP_STATS_INC(ta_peer, rx.intra_bss.mdns_no_fwd, 1);
  47. return false;
  48. }
  49. return true;
  50. }
  51. #else
  52. static inline
  53. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  54. {
  55. return true;
  56. }
  57. #endif
  58. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  59. {
  60. return vdev->ap_bridge_enabled;
  61. }
  62. #ifdef DUP_RX_DESC_WAR
  63. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  64. hal_ring_handle_t hal_ring,
  65. hal_ring_desc_t ring_desc,
  66. struct dp_rx_desc *rx_desc)
  67. {
  68. void *hal_soc = soc->hal_soc;
  69. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  70. dp_rx_desc_dump(rx_desc);
  71. }
  72. #else
  73. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  74. hal_ring_handle_t hal_ring_hdl,
  75. hal_ring_desc_t ring_desc,
  76. struct dp_rx_desc *rx_desc)
  77. {
  78. hal_soc_handle_t hal_soc = soc->hal_soc;
  79. dp_rx_desc_dump(rx_desc);
  80. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  81. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  82. qdf_assert_always(0);
  83. }
  84. #endif
  85. /*
  86. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  87. * called during dp rx initialization
  88. * and at the end of dp_rx_process.
  89. *
  90. * @soc: core txrx main context
  91. * @mac_id: mac_id which is one of 3 mac_ids
  92. * @dp_rxdma_srng: dp rxdma circular ring
  93. * @rx_desc_pool: Pointer to free Rx descriptor pool
  94. * @num_req_buffers: number of buffer to be replenished
  95. * @desc_list: list of descs if called from dp_rx_process
  96. * or NULL during dp rx initialization or out of buffer
  97. * interrupt.
  98. * @tail: tail of descs list
  99. * Return: return success or failure
  100. */
  101. QDF_STATUS dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  102. struct dp_srng *dp_rxdma_srng,
  103. struct rx_desc_pool *rx_desc_pool,
  104. uint32_t num_req_buffers,
  105. union dp_rx_desc_list_elem_t **desc_list,
  106. union dp_rx_desc_list_elem_t **tail)
  107. {
  108. uint32_t num_alloc_desc;
  109. uint16_t num_desc_to_free = 0;
  110. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  111. uint32_t num_entries_avail;
  112. uint32_t count;
  113. int sync_hw_ptr = 1;
  114. qdf_dma_addr_t paddr;
  115. qdf_nbuf_t rx_netbuf;
  116. void *rxdma_ring_entry;
  117. union dp_rx_desc_list_elem_t *next;
  118. QDF_STATUS ret;
  119. void *rxdma_srng;
  120. rxdma_srng = dp_rxdma_srng->hal_srng;
  121. if (!rxdma_srng) {
  122. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  123. "rxdma srng not initialized");
  124. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  125. return QDF_STATUS_E_FAILURE;
  126. }
  127. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  128. "requested %d buffers for replenish", num_req_buffers);
  129. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  130. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  131. rxdma_srng,
  132. sync_hw_ptr);
  133. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  134. "no of available entries in rxdma ring: %d",
  135. num_entries_avail);
  136. if (!(*desc_list) && (num_entries_avail >
  137. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  138. num_req_buffers = num_entries_avail;
  139. } else if (num_entries_avail < num_req_buffers) {
  140. num_desc_to_free = num_req_buffers - num_entries_avail;
  141. num_req_buffers = num_entries_avail;
  142. }
  143. if (qdf_unlikely(!num_req_buffers)) {
  144. num_desc_to_free = num_req_buffers;
  145. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  146. goto free_descs;
  147. }
  148. /*
  149. * if desc_list is NULL, allocate the descs from freelist
  150. */
  151. if (!(*desc_list)) {
  152. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  153. rx_desc_pool,
  154. num_req_buffers,
  155. desc_list,
  156. tail);
  157. if (!num_alloc_desc) {
  158. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  159. "no free rx_descs in freelist");
  160. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  161. num_req_buffers);
  162. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  163. return QDF_STATUS_E_NOMEM;
  164. }
  165. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  166. "%d rx desc allocated", num_alloc_desc);
  167. num_req_buffers = num_alloc_desc;
  168. }
  169. count = 0;
  170. while (count < num_req_buffers) {
  171. rx_netbuf = qdf_nbuf_alloc(dp_soc->osdev,
  172. RX_BUFFER_SIZE,
  173. RX_BUFFER_RESERVATION,
  174. RX_BUFFER_ALIGNMENT,
  175. FALSE);
  176. if (qdf_unlikely(!rx_netbuf)) {
  177. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  178. break;
  179. }
  180. ret = qdf_nbuf_map_single(dp_soc->osdev, rx_netbuf,
  181. QDF_DMA_FROM_DEVICE);
  182. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  183. qdf_nbuf_free(rx_netbuf);
  184. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  185. continue;
  186. }
  187. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  188. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, rx_netbuf, true);
  189. /*
  190. * check if the physical address of nbuf->data is
  191. * less then 0x50000000 then free the nbuf and try
  192. * allocating new nbuf. We can try for 100 times.
  193. * this is a temp WAR till we fix it properly.
  194. */
  195. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, dp_pdev);
  196. if (ret == QDF_STATUS_E_FAILURE) {
  197. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  198. break;
  199. }
  200. count++;
  201. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  202. rxdma_srng);
  203. qdf_assert_always(rxdma_ring_entry);
  204. next = (*desc_list)->next;
  205. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  206. /* rx_desc.in_use should be zero at this time*/
  207. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  208. (*desc_list)->rx_desc.in_use = 1;
  209. dp_verbose_debug("rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  210. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  211. (unsigned long long)paddr,
  212. (*desc_list)->rx_desc.cookie);
  213. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  214. (*desc_list)->rx_desc.cookie,
  215. rx_desc_pool->owner);
  216. *desc_list = next;
  217. }
  218. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  219. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  220. count, num_desc_to_free);
  221. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count,
  222. (RX_BUFFER_SIZE * count));
  223. free_descs:
  224. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  225. /*
  226. * add any available free desc back to the free list
  227. */
  228. if (*desc_list)
  229. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  230. mac_id, rx_desc_pool);
  231. return QDF_STATUS_SUCCESS;
  232. }
  233. /*
  234. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  235. * pkts to RAW mode simulation to
  236. * decapsulate the pkt.
  237. *
  238. * @vdev: vdev on which RAW mode is enabled
  239. * @nbuf_list: list of RAW pkts to process
  240. * @peer: peer object from which the pkt is rx
  241. *
  242. * Return: void
  243. */
  244. void
  245. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  246. struct dp_peer *peer)
  247. {
  248. qdf_nbuf_t deliver_list_head = NULL;
  249. qdf_nbuf_t deliver_list_tail = NULL;
  250. qdf_nbuf_t nbuf;
  251. nbuf = nbuf_list;
  252. while (nbuf) {
  253. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  254. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  255. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  256. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  257. /*
  258. * reset the chfrag_start and chfrag_end bits in nbuf cb
  259. * as this is a non-amsdu pkt and RAW mode simulation expects
  260. * these bit s to be 0 for non-amsdu pkt.
  261. */
  262. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  263. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  264. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  265. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  266. }
  267. nbuf = next;
  268. }
  269. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  270. &deliver_list_tail, (struct cdp_peer*) peer);
  271. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  272. }
  273. #ifdef DP_LFR
  274. /*
  275. * In case of LFR, data of a new peer might be sent up
  276. * even before peer is added.
  277. */
  278. static inline struct dp_vdev *
  279. dp_get_vdev_from_peer(struct dp_soc *soc,
  280. uint16_t peer_id,
  281. struct dp_peer *peer,
  282. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  283. {
  284. struct dp_vdev *vdev;
  285. uint8_t vdev_id;
  286. if (unlikely(!peer)) {
  287. if (peer_id != HTT_INVALID_PEER) {
  288. vdev_id = DP_PEER_METADATA_ID_GET(
  289. mpdu_desc_info.peer_meta_data);
  290. QDF_TRACE(QDF_MODULE_ID_DP,
  291. QDF_TRACE_LEVEL_DEBUG,
  292. FL("PeerID %d not found use vdevID %d"),
  293. peer_id, vdev_id);
  294. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  295. vdev_id);
  296. } else {
  297. QDF_TRACE(QDF_MODULE_ID_DP,
  298. QDF_TRACE_LEVEL_DEBUG,
  299. FL("Invalid PeerID %d"),
  300. peer_id);
  301. return NULL;
  302. }
  303. } else {
  304. vdev = peer->vdev;
  305. }
  306. return vdev;
  307. }
  308. #else
  309. static inline struct dp_vdev *
  310. dp_get_vdev_from_peer(struct dp_soc *soc,
  311. uint16_t peer_id,
  312. struct dp_peer *peer,
  313. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  314. {
  315. if (unlikely(!peer)) {
  316. QDF_TRACE(QDF_MODULE_ID_DP,
  317. QDF_TRACE_LEVEL_DEBUG,
  318. FL("Peer not found for peerID %d"),
  319. peer_id);
  320. return NULL;
  321. } else {
  322. return peer->vdev;
  323. }
  324. }
  325. #endif
  326. #ifndef FEATURE_WDS
  327. static void
  328. dp_rx_da_learn(struct dp_soc *soc,
  329. uint8_t *rx_tlv_hdr,
  330. struct dp_peer *ta_peer,
  331. qdf_nbuf_t nbuf)
  332. {
  333. }
  334. #endif
  335. /*
  336. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  337. *
  338. * @soc: core txrx main context
  339. * @ta_peer : source peer entry
  340. * @rx_tlv_hdr : start address of rx tlvs
  341. * @nbuf : nbuf that has to be intrabss forwarded
  342. *
  343. * Return: bool: true if it is forwarded else false
  344. */
  345. static bool
  346. dp_rx_intrabss_fwd(struct dp_soc *soc,
  347. struct dp_peer *ta_peer,
  348. uint8_t *rx_tlv_hdr,
  349. qdf_nbuf_t nbuf)
  350. {
  351. uint16_t da_idx;
  352. uint16_t len;
  353. uint8_t is_frag;
  354. struct dp_peer *da_peer;
  355. struct dp_ast_entry *ast_entry;
  356. qdf_nbuf_t nbuf_copy;
  357. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  358. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  359. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  360. tid_stats.tid_rx_stats[ring_id][tid];
  361. /* check if the destination peer is available in peer table
  362. * and also check if the source peer and destination peer
  363. * belong to the same vap and destination peer is not bss peer.
  364. */
  365. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  366. da_idx = hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr);
  367. ast_entry = soc->ast_table[da_idx];
  368. if (!ast_entry)
  369. return false;
  370. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  371. ast_entry->is_active = TRUE;
  372. return false;
  373. }
  374. da_peer = ast_entry->peer;
  375. if (!da_peer)
  376. return false;
  377. /* TA peer cannot be same as peer(DA) on which AST is present
  378. * this indicates a change in topology and that AST entries
  379. * are yet to be updated.
  380. */
  381. if (da_peer == ta_peer)
  382. return false;
  383. if (da_peer->vdev == ta_peer->vdev && !da_peer->bss_peer) {
  384. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  385. is_frag = qdf_nbuf_is_frag(nbuf);
  386. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  387. /* linearize the nbuf just before we send to
  388. * dp_tx_send()
  389. */
  390. if (qdf_unlikely(is_frag)) {
  391. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  392. return false;
  393. nbuf = qdf_nbuf_unshare(nbuf);
  394. if (!nbuf) {
  395. DP_STATS_INC_PKT(ta_peer,
  396. rx.intra_bss.fail,
  397. 1,
  398. len);
  399. /* return true even though the pkt is
  400. * not forwarded. Basically skb_unshare
  401. * failed and we want to continue with
  402. * next nbuf.
  403. */
  404. tid_stats->fail_cnt[INTRABSS_DROP]++;
  405. return true;
  406. }
  407. }
  408. if (!dp_tx_send(dp_vdev_to_cdp_vdev(ta_peer->vdev),
  409. nbuf)) {
  410. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  411. len);
  412. return true;
  413. } else {
  414. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  415. len);
  416. tid_stats->fail_cnt[INTRABSS_DROP]++;
  417. return false;
  418. }
  419. }
  420. }
  421. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  422. * source, then clone the pkt and send the cloned pkt for
  423. * intra BSS forwarding and original pkt up the network stack
  424. * Note: how do we handle multicast pkts. do we forward
  425. * all multicast pkts as is or let a higher layer module
  426. * like igmpsnoop decide whether to forward or not with
  427. * Mcast enhancement.
  428. */
  429. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  430. !ta_peer->bss_peer))) {
  431. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf))
  432. goto end;
  433. nbuf_copy = qdf_nbuf_copy(nbuf);
  434. if (!nbuf_copy)
  435. goto end;
  436. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  437. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  438. /* Set cb->ftype to intrabss FWD */
  439. qdf_nbuf_set_tx_ftype(nbuf_copy, CB_FTYPE_INTRABSS_FWD);
  440. if (dp_tx_send(dp_vdev_to_cdp_vdev(ta_peer->vdev), nbuf_copy)) {
  441. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  442. tid_stats->fail_cnt[INTRABSS_DROP]++;
  443. qdf_nbuf_free(nbuf_copy);
  444. } else {
  445. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  446. tid_stats->intrabss_cnt++;
  447. }
  448. }
  449. end:
  450. /* return false as we have to still send the original pkt
  451. * up the stack
  452. */
  453. return false;
  454. }
  455. #ifdef MESH_MODE_SUPPORT
  456. /**
  457. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  458. *
  459. * @vdev: DP Virtual device handle
  460. * @nbuf: Buffer pointer
  461. * @rx_tlv_hdr: start of rx tlv header
  462. * @peer: pointer to peer
  463. *
  464. * This function allocated memory for mesh receive stats and fill the
  465. * required stats. Stores the memory address in skb cb.
  466. *
  467. * Return: void
  468. */
  469. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  470. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  471. {
  472. struct mesh_recv_hdr_s *rx_info = NULL;
  473. uint32_t pkt_type;
  474. uint32_t nss;
  475. uint32_t rate_mcs;
  476. uint32_t bw;
  477. /* fill recv mesh stats */
  478. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  479. /* upper layers are resposible to free this memory */
  480. if (!rx_info) {
  481. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  482. "Memory allocation failed for mesh rx stats");
  483. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  484. return;
  485. }
  486. rx_info->rs_flags = MESH_RXHDR_VER1;
  487. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  488. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  489. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  490. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  491. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  492. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  493. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  494. if (vdev->osif_get_key)
  495. vdev->osif_get_key(vdev->osif_vdev,
  496. &rx_info->rs_decryptkey[0],
  497. &peer->mac_addr.raw[0],
  498. rx_info->rs_keyix);
  499. }
  500. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  501. rx_info->rs_channel = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  502. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  503. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  504. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  505. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  506. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  507. (bw << 24);
  508. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  509. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  510. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  511. rx_info->rs_flags,
  512. rx_info->rs_rssi,
  513. rx_info->rs_channel,
  514. rx_info->rs_ratephy1,
  515. rx_info->rs_keyix);
  516. }
  517. /**
  518. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  519. *
  520. * @vdev: DP Virtual device handle
  521. * @nbuf: Buffer pointer
  522. * @rx_tlv_hdr: start of rx tlv header
  523. *
  524. * This checks if the received packet is matching any filter out
  525. * catogery and and drop the packet if it matches.
  526. *
  527. * Return: status(0 indicates drop, 1 indicate to no drop)
  528. */
  529. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  530. uint8_t *rx_tlv_hdr)
  531. {
  532. union dp_align_mac_addr mac_addr;
  533. struct dp_soc *soc = vdev->pdev->soc;
  534. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  535. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  536. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  537. rx_tlv_hdr))
  538. return QDF_STATUS_SUCCESS;
  539. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  540. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  541. rx_tlv_hdr))
  542. return QDF_STATUS_SUCCESS;
  543. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  544. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  545. rx_tlv_hdr) &&
  546. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  547. rx_tlv_hdr))
  548. return QDF_STATUS_SUCCESS;
  549. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  550. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  551. rx_tlv_hdr,
  552. &mac_addr.raw[0]))
  553. return QDF_STATUS_E_FAILURE;
  554. if (!qdf_mem_cmp(&mac_addr.raw[0],
  555. &vdev->mac_addr.raw[0],
  556. QDF_MAC_ADDR_SIZE))
  557. return QDF_STATUS_SUCCESS;
  558. }
  559. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  560. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  561. rx_tlv_hdr,
  562. &mac_addr.raw[0]))
  563. return QDF_STATUS_E_FAILURE;
  564. if (!qdf_mem_cmp(&mac_addr.raw[0],
  565. &vdev->mac_addr.raw[0],
  566. QDF_MAC_ADDR_SIZE))
  567. return QDF_STATUS_SUCCESS;
  568. }
  569. }
  570. return QDF_STATUS_E_FAILURE;
  571. }
  572. #else
  573. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  574. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  575. {
  576. }
  577. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  578. uint8_t *rx_tlv_hdr)
  579. {
  580. return QDF_STATUS_E_FAILURE;
  581. }
  582. #endif
  583. #ifdef FEATURE_NAC_RSSI
  584. /**
  585. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  586. * clients
  587. * @pdev: DP pdev handle
  588. * @rx_pkt_hdr: Rx packet Header
  589. *
  590. * return: dp_vdev*
  591. */
  592. static
  593. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  594. uint8_t *rx_pkt_hdr)
  595. {
  596. struct ieee80211_frame *wh;
  597. struct dp_neighbour_peer *peer = NULL;
  598. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  599. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  600. return NULL;
  601. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  602. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  603. neighbour_peer_list_elem) {
  604. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  605. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  606. QDF_TRACE(
  607. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  608. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  609. peer->neighbour_peers_macaddr.raw[0],
  610. peer->neighbour_peers_macaddr.raw[1],
  611. peer->neighbour_peers_macaddr.raw[2],
  612. peer->neighbour_peers_macaddr.raw[3],
  613. peer->neighbour_peers_macaddr.raw[4],
  614. peer->neighbour_peers_macaddr.raw[5]);
  615. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  616. return pdev->monitor_vdev;
  617. }
  618. }
  619. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  620. return NULL;
  621. }
  622. /**
  623. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  624. * @soc: DP SOC handle
  625. * @mpdu: mpdu for which peer is invalid
  626. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  627. * pool_id has same mapping)
  628. *
  629. * return: integer type
  630. */
  631. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  632. uint8_t mac_id)
  633. {
  634. struct dp_invalid_peer_msg msg;
  635. struct dp_vdev *vdev = NULL;
  636. struct dp_pdev *pdev = NULL;
  637. struct ieee80211_frame *wh;
  638. qdf_nbuf_t curr_nbuf, next_nbuf;
  639. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  640. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  641. rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  642. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  643. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  644. "Drop decapped frames");
  645. goto free;
  646. }
  647. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  648. if (!DP_FRAME_IS_DATA(wh)) {
  649. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  650. "NAWDS valid only for data frames");
  651. goto free;
  652. }
  653. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  654. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  655. "Invalid nbuf length");
  656. goto free;
  657. }
  658. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  659. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  660. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  661. "PDEV %s", !pdev ? "not found" : "down");
  662. goto free;
  663. }
  664. if (pdev->filter_neighbour_peers) {
  665. /* Next Hop scenario not yet handle */
  666. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  667. if (vdev) {
  668. dp_rx_mon_deliver(soc, pdev->pdev_id,
  669. pdev->invalid_peer_head_msdu,
  670. pdev->invalid_peer_tail_msdu);
  671. pdev->invalid_peer_head_msdu = NULL;
  672. pdev->invalid_peer_tail_msdu = NULL;
  673. return 0;
  674. }
  675. }
  676. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  677. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  678. QDF_MAC_ADDR_SIZE) == 0) {
  679. goto out;
  680. }
  681. }
  682. if (!vdev) {
  683. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  684. "VDEV not found");
  685. goto free;
  686. }
  687. out:
  688. msg.wh = wh;
  689. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  690. msg.nbuf = mpdu;
  691. msg.vdev_id = vdev->vdev_id;
  692. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  693. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  694. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  695. pdev->pdev_id, &msg);
  696. free:
  697. /* Drop and free packet */
  698. curr_nbuf = mpdu;
  699. while (curr_nbuf) {
  700. next_nbuf = qdf_nbuf_next(curr_nbuf);
  701. qdf_nbuf_free(curr_nbuf);
  702. curr_nbuf = next_nbuf;
  703. }
  704. return 0;
  705. }
  706. /**
  707. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  708. * @soc: DP SOC handle
  709. * @mpdu: mpdu for which peer is invalid
  710. * @mpdu_done: if an mpdu is completed
  711. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  712. * pool_id has same mapping)
  713. *
  714. * return: integer type
  715. */
  716. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  717. qdf_nbuf_t mpdu, bool mpdu_done,
  718. uint8_t mac_id)
  719. {
  720. /* Only trigger the process when mpdu is completed */
  721. if (mpdu_done)
  722. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  723. }
  724. #else
  725. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  726. uint8_t mac_id)
  727. {
  728. qdf_nbuf_t curr_nbuf, next_nbuf;
  729. struct dp_pdev *pdev;
  730. struct dp_vdev *vdev = NULL;
  731. struct ieee80211_frame *wh;
  732. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  733. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  734. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  735. if (!DP_FRAME_IS_DATA(wh)) {
  736. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  737. "only for data frames");
  738. goto free;
  739. }
  740. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  741. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  742. "Invalid nbuf length");
  743. goto free;
  744. }
  745. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  746. if (!pdev) {
  747. QDF_TRACE(QDF_MODULE_ID_DP,
  748. QDF_TRACE_LEVEL_ERROR,
  749. "PDEV not found");
  750. goto free;
  751. }
  752. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  753. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  754. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  755. QDF_MAC_ADDR_SIZE) == 0) {
  756. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  757. goto out;
  758. }
  759. }
  760. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  761. if (!vdev) {
  762. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  763. "VDEV not found");
  764. goto free;
  765. }
  766. out:
  767. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  768. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  769. free:
  770. /* reset the head and tail pointers */
  771. pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  772. if (pdev) {
  773. pdev->invalid_peer_head_msdu = NULL;
  774. pdev->invalid_peer_tail_msdu = NULL;
  775. }
  776. /* Drop and free packet */
  777. curr_nbuf = mpdu;
  778. while (curr_nbuf) {
  779. next_nbuf = qdf_nbuf_next(curr_nbuf);
  780. qdf_nbuf_free(curr_nbuf);
  781. curr_nbuf = next_nbuf;
  782. }
  783. return 0;
  784. }
  785. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  786. qdf_nbuf_t mpdu, bool mpdu_done,
  787. uint8_t mac_id)
  788. {
  789. /* Process the nbuf */
  790. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  791. }
  792. #endif
  793. #ifdef RECEIVE_OFFLOAD
  794. /**
  795. * dp_rx_print_offload_info() - Print offload info from RX TLV
  796. * @soc: dp soc handle
  797. * @rx_tlv: RX TLV for which offload information is to be printed
  798. *
  799. * Return: None
  800. */
  801. static void dp_rx_print_offload_info(struct dp_soc *soc, uint8_t *rx_tlv)
  802. {
  803. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  804. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  805. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  806. dp_verbose_debug("chksum 0x%x", hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  807. rx_tlv));
  808. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  809. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  810. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  811. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  812. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  813. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  814. dp_verbose_debug("---------------------------------------------------------");
  815. }
  816. /**
  817. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  818. * @soc: DP SOC handle
  819. * @rx_tlv: RX TLV received for the msdu
  820. * @msdu: msdu for which GRO info needs to be filled
  821. * @rx_ol_pkt_cnt: counter to be incremented for GRO eligible packets
  822. *
  823. * Return: None
  824. */
  825. static
  826. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  827. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  828. {
  829. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  830. return;
  831. /* Filling up RX offload info only for TCP packets */
  832. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  833. return;
  834. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  835. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  836. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  837. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  838. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  839. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  840. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  841. rx_tlv);
  842. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  843. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  844. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  845. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  846. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  847. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  848. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  849. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  850. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  851. HAL_RX_TLV_GET_IPV6(rx_tlv);
  852. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  853. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  854. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  855. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  856. dp_rx_print_offload_info(soc, rx_tlv);
  857. }
  858. #else
  859. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  860. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  861. {
  862. }
  863. #endif /* RECEIVE_OFFLOAD */
  864. /**
  865. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  866. *
  867. * @nbuf: pointer to msdu.
  868. * @mpdu_len: mpdu length
  869. *
  870. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  871. */
  872. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  873. {
  874. bool last_nbuf;
  875. if (*mpdu_len > (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  876. qdf_nbuf_set_pktlen(nbuf, RX_BUFFER_SIZE);
  877. last_nbuf = false;
  878. } else {
  879. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  880. last_nbuf = true;
  881. }
  882. *mpdu_len -= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  883. return last_nbuf;
  884. }
  885. /**
  886. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  887. * multiple nbufs.
  888. * @nbuf: pointer to the first msdu of an amsdu.
  889. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  890. *
  891. *
  892. * This function implements the creation of RX frag_list for cases
  893. * where an MSDU is spread across multiple nbufs.
  894. *
  895. * Return: returns the head nbuf which contains complete frag_list.
  896. */
  897. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  898. {
  899. qdf_nbuf_t parent, frag_list, next = NULL;
  900. uint16_t frag_list_len = 0;
  901. uint16_t mpdu_len;
  902. bool last_nbuf;
  903. mpdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  904. /*
  905. * this is a case where the complete msdu fits in one single nbuf.
  906. * in this case HW sets both start and end bit and we only need to
  907. * reset these bits for RAW mode simulator to decap the pkt
  908. */
  909. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  910. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  911. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  912. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  913. return nbuf;
  914. }
  915. /*
  916. * This is a case where we have multiple msdus (A-MSDU) spread across
  917. * multiple nbufs. here we create a fraglist out of these nbufs.
  918. *
  919. * the moment we encounter a nbuf with continuation bit set we
  920. * know for sure we have an MSDU which is spread across multiple
  921. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  922. */
  923. parent = nbuf;
  924. frag_list = nbuf->next;
  925. nbuf = nbuf->next;
  926. /*
  927. * set the start bit in the first nbuf we encounter with continuation
  928. * bit set. This has the proper mpdu length set as it is the first
  929. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  930. * nbufs will form the frag_list of the parent nbuf.
  931. */
  932. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  933. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  934. /*
  935. * this is where we set the length of the fragments which are
  936. * associated to the parent nbuf. We iterate through the frag_list
  937. * till we hit the last_nbuf of the list.
  938. */
  939. do {
  940. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  941. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  942. frag_list_len += qdf_nbuf_len(nbuf);
  943. if (last_nbuf) {
  944. next = nbuf->next;
  945. nbuf->next = NULL;
  946. break;
  947. }
  948. nbuf = nbuf->next;
  949. } while (!last_nbuf);
  950. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  951. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  952. parent->next = next;
  953. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  954. return parent;
  955. }
  956. /**
  957. * dp_rx_compute_delay() - Compute and fill in all timestamps
  958. * to pass in correct fields
  959. *
  960. * @vdev: pdev handle
  961. * @tx_desc: tx descriptor
  962. * @tid: tid value
  963. * Return: none
  964. */
  965. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  966. {
  967. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  968. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  969. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  970. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  971. uint32_t interframe_delay =
  972. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  973. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  974. CDP_DELAY_STATS_REAP_STACK, ring_id);
  975. /*
  976. * Update interframe delay stats calculated at deliver_data_ol point.
  977. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  978. * interframe delay will not be calculate correctly for 1st frame.
  979. * On the other side, this will help in avoiding extra per packet check
  980. * of vdev->prev_rx_deliver_tstamp.
  981. */
  982. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  983. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  984. vdev->prev_rx_deliver_tstamp = current_ts;
  985. }
  986. /**
  987. * dp_rx_drop_nbuf_list() - drop an nbuf list
  988. * @pdev: dp pdev reference
  989. * @buf_list: buffer list to be dropepd
  990. *
  991. * Return: int (number of bufs dropped)
  992. */
  993. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  994. qdf_nbuf_t buf_list)
  995. {
  996. struct cdp_tid_rx_stats *stats = NULL;
  997. uint8_t tid = 0, ring_id = 0;
  998. int num_dropped = 0;
  999. qdf_nbuf_t buf, next_buf;
  1000. buf = buf_list;
  1001. while (buf) {
  1002. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1003. next_buf = qdf_nbuf_queue_next(buf);
  1004. tid = qdf_nbuf_get_tid_val(buf);
  1005. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1006. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1007. stats->delivered_to_stack--;
  1008. qdf_nbuf_free(buf);
  1009. buf = next_buf;
  1010. num_dropped++;
  1011. }
  1012. return num_dropped;
  1013. }
  1014. #ifdef PEER_CACHE_RX_PKTS
  1015. /**
  1016. * dp_rx_flush_rx_cached() - flush cached rx frames
  1017. * @peer: peer
  1018. * @drop: flag to drop frames or forward to net stack
  1019. *
  1020. * Return: None
  1021. */
  1022. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1023. {
  1024. struct dp_peer_cached_bufq *bufqi;
  1025. struct dp_rx_cached_buf *cache_buf = NULL;
  1026. ol_txrx_rx_fp data_rx = NULL;
  1027. int num_buff_elem;
  1028. QDF_STATUS status;
  1029. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  1030. qdf_atomic_dec(&peer->flush_in_progress);
  1031. return;
  1032. }
  1033. qdf_spin_lock_bh(&peer->peer_info_lock);
  1034. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1035. data_rx = peer->vdev->osif_rx;
  1036. else
  1037. drop = true;
  1038. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1039. bufqi = &peer->bufq_info;
  1040. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1041. qdf_list_remove_front(&bufqi->cached_bufq,
  1042. (qdf_list_node_t **)&cache_buf);
  1043. while (cache_buf) {
  1044. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1045. cache_buf->buf);
  1046. bufqi->entries -= num_buff_elem;
  1047. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1048. if (drop) {
  1049. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1050. cache_buf->buf);
  1051. } else {
  1052. /* Flush the cached frames to OSIF DEV */
  1053. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1054. if (status != QDF_STATUS_SUCCESS)
  1055. bufqi->dropped = dp_rx_drop_nbuf_list(
  1056. peer->vdev->pdev,
  1057. cache_buf->buf);
  1058. }
  1059. qdf_mem_free(cache_buf);
  1060. cache_buf = NULL;
  1061. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1062. qdf_list_remove_front(&bufqi->cached_bufq,
  1063. (qdf_list_node_t **)&cache_buf);
  1064. }
  1065. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1066. qdf_atomic_dec(&peer->flush_in_progress);
  1067. }
  1068. /**
  1069. * dp_rx_enqueue_rx() - cache rx frames
  1070. * @peer: peer
  1071. * @rx_buf_list: cache buffer list
  1072. *
  1073. * Return: None
  1074. */
  1075. static QDF_STATUS
  1076. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1077. {
  1078. struct dp_rx_cached_buf *cache_buf;
  1079. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1080. int num_buff_elem;
  1081. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_TXRX, "bufq->curr %d bufq->drops %d",
  1082. bufqi->entries, bufqi->dropped);
  1083. if (!peer->valid) {
  1084. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1085. rx_buf_list);
  1086. return QDF_STATUS_E_INVAL;
  1087. }
  1088. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1089. if (bufqi->entries >= bufqi->thresh) {
  1090. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1091. rx_buf_list);
  1092. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1093. return QDF_STATUS_E_RESOURCES;
  1094. }
  1095. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1096. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1097. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1098. if (!cache_buf) {
  1099. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1100. "Failed to allocate buf to cache rx frames");
  1101. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1102. rx_buf_list);
  1103. return QDF_STATUS_E_NOMEM;
  1104. }
  1105. cache_buf->buf = rx_buf_list;
  1106. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1107. qdf_list_insert_back(&bufqi->cached_bufq,
  1108. &cache_buf->node);
  1109. bufqi->entries += num_buff_elem;
  1110. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1111. return QDF_STATUS_SUCCESS;
  1112. }
  1113. static inline
  1114. bool dp_rx_is_peer_cache_bufq_supported(void)
  1115. {
  1116. return true;
  1117. }
  1118. #else
  1119. static inline
  1120. bool dp_rx_is_peer_cache_bufq_supported(void)
  1121. {
  1122. return false;
  1123. }
  1124. static inline QDF_STATUS
  1125. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1126. {
  1127. return QDF_STATUS_SUCCESS;
  1128. }
  1129. #endif
  1130. static inline void dp_rx_deliver_to_stack(struct dp_vdev *vdev,
  1131. struct dp_peer *peer,
  1132. qdf_nbuf_t nbuf_head,
  1133. qdf_nbuf_t nbuf_tail)
  1134. {
  1135. /*
  1136. * highly unlikely to have a vdev without a registered rx
  1137. * callback function. if so let us free the nbuf_list.
  1138. */
  1139. if (qdf_unlikely(!vdev->osif_rx)) {
  1140. if (dp_rx_is_peer_cache_bufq_supported())
  1141. dp_rx_enqueue_rx(peer, nbuf_head);
  1142. else
  1143. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1144. return;
  1145. }
  1146. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1147. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1148. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1149. &nbuf_tail, (struct cdp_peer *) peer);
  1150. }
  1151. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1152. }
  1153. /**
  1154. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1155. * @nbuf: pointer to the first msdu of an amsdu.
  1156. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1157. *
  1158. * The ipsumed field of the skb is set based on whether HW validated the
  1159. * IP/TCP/UDP checksum.
  1160. *
  1161. * Return: void
  1162. */
  1163. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1164. qdf_nbuf_t nbuf,
  1165. uint8_t *rx_tlv_hdr)
  1166. {
  1167. qdf_nbuf_rx_cksum_t cksum = {0};
  1168. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1169. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1170. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1171. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1172. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1173. } else {
  1174. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1175. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1176. }
  1177. }
  1178. /**
  1179. * dp_rx_msdu_stats_update() - update per msdu stats.
  1180. * @soc: core txrx main context
  1181. * @nbuf: pointer to the first msdu of an amsdu.
  1182. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1183. * @peer: pointer to the peer object.
  1184. * @ring_id: reo dest ring number on which pkt is reaped.
  1185. * @tid_stats: per tid rx stats.
  1186. *
  1187. * update all the per msdu stats for that nbuf.
  1188. * Return: void
  1189. */
  1190. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1191. qdf_nbuf_t nbuf,
  1192. uint8_t *rx_tlv_hdr,
  1193. struct dp_peer *peer,
  1194. uint8_t ring_id,
  1195. struct cdp_tid_rx_stats *tid_stats)
  1196. {
  1197. bool is_ampdu, is_not_amsdu;
  1198. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1199. struct dp_vdev *vdev = peer->vdev;
  1200. qdf_ether_header_t *eh;
  1201. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1202. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1203. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1204. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1205. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1206. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1207. DP_STATS_INCC(peer, rx.rx_retries, 1, qdf_nbuf_is_rx_retry_flag(nbuf));
  1208. tid_stats->msdu_cnt++;
  1209. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1210. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1211. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1212. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1213. tid_stats->mcast_msdu_cnt++;
  1214. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1215. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1216. tid_stats->bcast_msdu_cnt++;
  1217. }
  1218. }
  1219. /*
  1220. * currently we can return from here as we have similar stats
  1221. * updated at per ppdu level instead of msdu level
  1222. */
  1223. if (!soc->process_rx_status)
  1224. return;
  1225. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1226. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1227. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1228. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1229. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1230. tid = qdf_nbuf_get_tid_val(nbuf);
  1231. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1232. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1233. rx_tlv_hdr);
  1234. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1235. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1236. DP_STATS_INC(peer, rx.bw[bw], 1);
  1237. /*
  1238. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1239. * then increase index [nss - 1] in array counter.
  1240. */
  1241. if (nss > 0 && (pkt_type == DOT11_N ||
  1242. pkt_type == DOT11_AC ||
  1243. pkt_type == DOT11_AX))
  1244. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1245. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1246. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1247. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1248. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1249. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1250. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1251. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1252. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1253. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1254. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1255. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1256. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1257. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1258. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1259. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1260. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1261. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1262. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1263. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1264. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1265. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1266. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1267. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1268. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1269. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1270. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1271. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1272. if ((soc->process_rx_status) &&
  1273. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1274. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1275. if (!vdev->pdev)
  1276. return;
  1277. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1278. &peer->stats, peer->peer_ids[0],
  1279. UPDATE_PEER_STATS,
  1280. vdev->pdev->pdev_id);
  1281. #endif
  1282. }
  1283. }
  1284. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1285. uint8_t *rx_tlv_hdr,
  1286. qdf_nbuf_t nbuf)
  1287. {
  1288. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1289. (hal_rx_msdu_end_sa_idx_get(soc->hal_soc, rx_tlv_hdr) >
  1290. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1291. (!qdf_nbuf_is_da_mcbc(nbuf) &&
  1292. qdf_nbuf_is_da_valid(nbuf) &&
  1293. (hal_rx_msdu_end_da_idx_get(soc->hal_soc, rx_tlv_hdr) >
  1294. wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1295. return false;
  1296. return true;
  1297. }
  1298. #ifndef WDS_VENDOR_EXTENSION
  1299. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1300. struct dp_vdev *vdev,
  1301. struct dp_peer *peer)
  1302. {
  1303. return 1;
  1304. }
  1305. #endif
  1306. #ifdef RX_DESC_DEBUG_CHECK
  1307. /**
  1308. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1309. * corruption
  1310. *
  1311. * @ring_desc: REO ring descriptor
  1312. * @rx_desc: Rx descriptor
  1313. *
  1314. * Return: NONE
  1315. */
  1316. static inline
  1317. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1318. struct dp_rx_desc *rx_desc)
  1319. {
  1320. struct hal_buf_info hbi;
  1321. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1322. /* Sanity check for possible buffer paddr corruption */
  1323. qdf_assert_always((&hbi)->paddr ==
  1324. qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0));
  1325. }
  1326. #else
  1327. static inline
  1328. void dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1329. struct dp_rx_desc *rx_desc)
  1330. {
  1331. }
  1332. #endif
  1333. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1334. static inline
  1335. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1336. {
  1337. bool limit_hit = false;
  1338. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1339. limit_hit =
  1340. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1341. if (limit_hit)
  1342. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1343. return limit_hit;
  1344. }
  1345. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1346. {
  1347. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1348. }
  1349. #else
  1350. static inline
  1351. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1352. {
  1353. return false;
  1354. }
  1355. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1356. {
  1357. return false;
  1358. }
  1359. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1360. /**
  1361. * dp_is_special_data() - check is the pkt special like eapol, dhcp, etc
  1362. *
  1363. * @nbuf: pkt skb pointer
  1364. *
  1365. * Return: true if matched, false if not
  1366. */
  1367. static inline
  1368. bool dp_is_special_data(qdf_nbuf_t nbuf)
  1369. {
  1370. if (qdf_nbuf_is_ipv4_arp_pkt(nbuf) ||
  1371. qdf_nbuf_is_ipv4_dhcp_pkt(nbuf) ||
  1372. qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  1373. qdf_nbuf_is_ipv6_dhcp_pkt(nbuf))
  1374. return true;
  1375. else
  1376. return false;
  1377. }
  1378. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1379. /**
  1380. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1381. * no corresbonding peer found
  1382. * @soc: core txrx main context
  1383. * @nbuf: pkt skb pointer
  1384. *
  1385. * This function will try to deliver some RX special frames to stack
  1386. * even there is no peer matched found. for instance, LFR case, some
  1387. * eapol data will be sent to host before peer_map done.
  1388. *
  1389. * Return: None
  1390. */
  1391. static inline
  1392. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1393. {
  1394. uint32_t peer_mdata;
  1395. uint16_t peer_id;
  1396. uint8_t vdev_id;
  1397. struct dp_vdev *vdev;
  1398. uint32_t l2_hdr_offset = 0;
  1399. uint16_t msdu_len = 0;
  1400. uint32_t pkt_len = 0;
  1401. uint8_t *rx_tlv_hdr;
  1402. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1403. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1404. if (peer_id > soc->max_peers)
  1405. goto deliver_fail;
  1406. vdev_id = DP_PEER_METADATA_ID_GET(peer_mdata);
  1407. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc, vdev_id);
  1408. if (!vdev || !vdev->osif_rx)
  1409. goto deliver_fail;
  1410. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1411. l2_hdr_offset =
  1412. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  1413. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1414. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1415. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1416. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1417. } else {
  1418. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1419. qdf_nbuf_pull_head(nbuf,
  1420. RX_PKT_TLVS_LEN +
  1421. l2_hdr_offset);
  1422. }
  1423. /* only allow special frames */
  1424. if (!dp_is_special_data(nbuf))
  1425. goto deliver_fail;
  1426. vdev->osif_rx(vdev->osif_vdev, nbuf);
  1427. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1428. return;
  1429. deliver_fail:
  1430. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1431. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1432. qdf_nbuf_free(nbuf);
  1433. }
  1434. #else
  1435. static inline
  1436. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1437. {
  1438. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1439. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1440. qdf_nbuf_free(nbuf);
  1441. }
  1442. #endif
  1443. /**
  1444. * dp_rx_srng_get_num_pending() - get number of pending entries
  1445. * @hal_soc: hal soc opaque pointer
  1446. * @hal_ring: opaque pointer to the HAL Rx Ring
  1447. * @num_entries: number of entries in the hal_ring.
  1448. * @near_full: pointer to a boolean. This is set if ring is near full.
  1449. *
  1450. * The function returns the number of entries in a destination ring which are
  1451. * yet to be reaped. The function also checks if the ring is near full.
  1452. * If more than half of the ring needs to be reaped, the ring is considered
  1453. * approaching full.
  1454. * The function useses hal_srng_dst_num_valid_locked to get the number of valid
  1455. * entries. It should not be called within a SRNG lock. HW pointer value is
  1456. * synced into cached_hp.
  1457. *
  1458. * Return: Number of pending entries if any
  1459. */
  1460. static
  1461. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1462. hal_ring_handle_t hal_ring_hdl,
  1463. uint32_t num_entries,
  1464. bool *near_full)
  1465. {
  1466. uint32_t num_pending = 0;
  1467. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  1468. hal_ring_hdl,
  1469. true);
  1470. if (num_entries && (num_pending >= num_entries >> 1))
  1471. *near_full = true;
  1472. else
  1473. *near_full = false;
  1474. return num_pending;
  1475. }
  1476. /**
  1477. * dp_rx_process() - Brain of the Rx processing functionality
  1478. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1479. * @int_ctx: per interrupt context
  1480. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1481. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1482. * @quota: No. of units (packets) that can be serviced in one shot.
  1483. *
  1484. * This function implements the core of Rx functionality. This is
  1485. * expected to handle only non-error frames.
  1486. *
  1487. * Return: uint32_t: No. of elements processed
  1488. */
  1489. uint32_t dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  1490. uint8_t reo_ring_num, uint32_t quota)
  1491. {
  1492. hal_ring_desc_t ring_desc;
  1493. hal_soc_handle_t hal_soc;
  1494. struct dp_rx_desc *rx_desc = NULL;
  1495. qdf_nbuf_t nbuf, next;
  1496. bool near_full;
  1497. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1498. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1499. uint32_t num_pending;
  1500. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1501. uint32_t l2_hdr_offset = 0;
  1502. uint16_t msdu_len = 0;
  1503. uint16_t peer_id;
  1504. struct dp_peer *peer;
  1505. struct dp_vdev *vdev;
  1506. uint32_t pkt_len = 0;
  1507. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1508. struct hal_rx_msdu_desc_info msdu_desc_info;
  1509. enum hal_reo_error_status error;
  1510. uint32_t peer_mdata;
  1511. uint8_t *rx_tlv_hdr;
  1512. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1513. uint8_t mac_id = 0;
  1514. struct dp_pdev *pdev;
  1515. struct dp_pdev *rx_pdev;
  1516. struct dp_srng *dp_rxdma_srng;
  1517. struct rx_desc_pool *rx_desc_pool;
  1518. struct dp_soc *soc = int_ctx->soc;
  1519. uint8_t ring_id = 0;
  1520. uint8_t core_id = 0;
  1521. struct cdp_tid_rx_stats *tid_stats;
  1522. qdf_nbuf_t nbuf_head;
  1523. qdf_nbuf_t nbuf_tail;
  1524. qdf_nbuf_t deliver_list_head;
  1525. qdf_nbuf_t deliver_list_tail;
  1526. uint32_t num_rx_bufs_reaped = 0;
  1527. uint32_t intr_id;
  1528. struct hif_opaque_softc *scn;
  1529. int32_t tid = 0;
  1530. bool is_prev_msdu_last = true;
  1531. uint32_t num_entries_avail = 0;
  1532. uint32_t rx_ol_pkt_cnt = 0;
  1533. uint32_t num_entries = 0;
  1534. DP_HIST_INIT();
  1535. qdf_assert_always(soc && hal_ring_hdl);
  1536. hal_soc = soc->hal_soc;
  1537. qdf_assert_always(hal_soc);
  1538. scn = soc->hif_handle;
  1539. hif_pm_runtime_mark_dp_rx_busy(scn);
  1540. intr_id = int_ctx->dp_intr_id;
  1541. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  1542. more_data:
  1543. /* reset local variables here to be re-used in the function */
  1544. nbuf_head = NULL;
  1545. nbuf_tail = NULL;
  1546. deliver_list_head = NULL;
  1547. deliver_list_tail = NULL;
  1548. peer = NULL;
  1549. vdev = NULL;
  1550. num_rx_bufs_reaped = 0;
  1551. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  1552. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  1553. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  1554. qdf_mem_zero(head, sizeof(head));
  1555. qdf_mem_zero(tail, sizeof(tail));
  1556. if (qdf_unlikely(dp_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1557. /*
  1558. * Need API to convert from hal_ring pointer to
  1559. * Ring Type / Ring Id combo
  1560. */
  1561. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1562. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1563. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  1564. goto done;
  1565. }
  1566. /*
  1567. * start reaping the buffers from reo ring and queue
  1568. * them in per vdev queue.
  1569. * Process the received pkts in a different per vdev loop.
  1570. */
  1571. while (qdf_likely(quota &&
  1572. (ring_desc = hal_srng_dst_peek(hal_soc,
  1573. hal_ring_hdl)))) {
  1574. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1575. ring_id = hal_srng_ring_id_get(hal_ring_hdl);
  1576. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1577. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1578. FL("HAL RING 0x%pK:error %d"), hal_ring_hdl, error);
  1579. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1580. /* Don't know how to deal with this -- assert */
  1581. qdf_assert(0);
  1582. }
  1583. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1584. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1585. qdf_assert(rx_desc);
  1586. /*
  1587. * this is a unlikely scenario where the host is reaping
  1588. * a descriptor which it already reaped just a while ago
  1589. * but is yet to replenish it back to HW.
  1590. * In this case host will dump the last 128 descriptors
  1591. * including the software descriptor rx_desc and assert.
  1592. */
  1593. if (qdf_unlikely(!rx_desc->in_use)) {
  1594. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1595. dp_info_rl("Reaping rx_desc not in use!");
  1596. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1597. ring_desc, rx_desc);
  1598. /* ignore duplicate RX desc and continue to process */
  1599. /* Pop out the descriptor */
  1600. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1601. continue;
  1602. }
  1603. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  1604. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  1605. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  1606. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1607. ring_desc, rx_desc);
  1608. }
  1609. dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  1610. /* TODO */
  1611. /*
  1612. * Need a separate API for unmapping based on
  1613. * phyiscal address
  1614. */
  1615. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  1616. QDF_DMA_FROM_DEVICE);
  1617. rx_desc->unmapped = 1;
  1618. core_id = smp_processor_id();
  1619. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1620. /* Get MPDU DESC info */
  1621. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1622. /* Get MSDU DESC info */
  1623. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1624. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  1625. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  1626. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  1627. HAL_MPDU_F_RAW_AMPDU)) {
  1628. /* previous msdu has end bit set, so current one is
  1629. * the new MPDU
  1630. */
  1631. if (is_prev_msdu_last) {
  1632. is_prev_msdu_last = false;
  1633. /* Get number of entries available in HW ring */
  1634. num_entries_avail =
  1635. hal_srng_dst_num_valid(hal_soc,
  1636. hal_ring_hdl, 1);
  1637. /* For new MPDU check if we can read complete
  1638. * MPDU by comparing the number of buffers
  1639. * available and number of buffers needed to
  1640. * reap this MPDU
  1641. */
  1642. if (((msdu_desc_info.msdu_len /
  1643. (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN) + 1)) >
  1644. num_entries_avail)
  1645. break;
  1646. } else {
  1647. if (msdu_desc_info.msdu_flags &
  1648. HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1649. is_prev_msdu_last = true;
  1650. }
  1651. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  1652. }
  1653. /* Pop out the descriptor*/
  1654. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1655. rx_bufs_reaped[rx_desc->pool_id]++;
  1656. peer_mdata = mpdu_desc_info.peer_meta_data;
  1657. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  1658. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1659. /*
  1660. * save msdu flags first, last and continuation msdu in
  1661. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  1662. * length to nbuf->cb. This ensures the info required for
  1663. * per pkt processing is always in the same cache line.
  1664. * This helps in improving throughput for smaller pkt
  1665. * sizes.
  1666. */
  1667. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1668. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1669. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1670. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1671. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1672. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1673. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  1674. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  1675. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  1676. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  1677. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  1678. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  1679. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  1680. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  1681. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  1682. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1683. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  1684. /*
  1685. * if continuation bit is set then we have MSDU spread
  1686. * across multiple buffers, let us not decrement quota
  1687. * till we reap all buffers of that MSDU.
  1688. */
  1689. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1690. quota -= 1;
  1691. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1692. &tail[rx_desc->pool_id],
  1693. rx_desc);
  1694. num_rx_bufs_reaped++;
  1695. if (dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  1696. break;
  1697. }
  1698. done:
  1699. dp_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1700. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1701. /*
  1702. * continue with next mac_id if no pkts were reaped
  1703. * from that pool
  1704. */
  1705. if (!rx_bufs_reaped[mac_id])
  1706. continue;
  1707. pdev = soc->pdev_list[mac_id];
  1708. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1709. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1710. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  1711. rx_desc_pool, rx_bufs_reaped[mac_id],
  1712. &head[mac_id], &tail[mac_id]);
  1713. }
  1714. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  1715. /* Peer can be NULL is case of LFR */
  1716. if (qdf_likely(peer))
  1717. vdev = NULL;
  1718. /*
  1719. * BIG loop where each nbuf is dequeued from global queue,
  1720. * processed and queued back on a per vdev basis. These nbufs
  1721. * are sent to stack as and when we run out of nbufs
  1722. * or a new nbuf dequeued from global queue has a different
  1723. * vdev when compared to previous nbuf.
  1724. */
  1725. nbuf = nbuf_head;
  1726. while (nbuf) {
  1727. next = nbuf->next;
  1728. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1729. /* Get TID from struct cb->tid_val, save to tid */
  1730. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  1731. tid = qdf_nbuf_get_tid_val(nbuf);
  1732. peer_mdata = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1733. peer_id = DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1734. peer = dp_peer_find_by_id(soc, peer_id);
  1735. if (peer) {
  1736. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  1737. qdf_dp_trace_set_track(nbuf, QDF_RX);
  1738. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  1739. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  1740. QDF_NBUF_RX_PKT_DATA_TRACK;
  1741. }
  1742. rx_bufs_used++;
  1743. if (deliver_list_head && peer && (vdev != peer->vdev)) {
  1744. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1745. deliver_list_tail);
  1746. deliver_list_head = NULL;
  1747. deliver_list_tail = NULL;
  1748. }
  1749. if (qdf_likely(peer)) {
  1750. vdev = peer->vdev;
  1751. } else {
  1752. nbuf->next = NULL;
  1753. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  1754. nbuf = next;
  1755. continue;
  1756. }
  1757. if (qdf_unlikely(!vdev)) {
  1758. qdf_nbuf_free(nbuf);
  1759. nbuf = next;
  1760. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  1761. dp_peer_unref_del_find_by_id(peer);
  1762. continue;
  1763. }
  1764. rx_pdev = vdev->pdev;
  1765. DP_RX_TID_SAVE(nbuf, tid);
  1766. if (qdf_unlikely(rx_pdev->delay_stats_flag))
  1767. qdf_nbuf_set_timestamp(nbuf);
  1768. ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1769. tid_stats =
  1770. &rx_pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1771. /*
  1772. * Check if DMA completed -- msdu_done is the last bit
  1773. * to be written
  1774. */
  1775. if (qdf_unlikely(!qdf_nbuf_is_raw_frame(nbuf) &&
  1776. !hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  1777. dp_err("MSDU DONE failure");
  1778. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  1779. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  1780. QDF_TRACE_LEVEL_INFO);
  1781. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  1782. qdf_nbuf_free(nbuf);
  1783. qdf_assert(0);
  1784. nbuf = next;
  1785. continue;
  1786. }
  1787. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  1788. /*
  1789. * First IF condition:
  1790. * 802.11 Fragmented pkts are reinjected to REO
  1791. * HW block as SG pkts and for these pkts we only
  1792. * need to pull the RX TLVS header length.
  1793. * Second IF condition:
  1794. * The below condition happens when an MSDU is spread
  1795. * across multiple buffers. This can happen in two cases
  1796. * 1. The nbuf size is smaller then the received msdu.
  1797. * ex: we have set the nbuf size to 2048 during
  1798. * nbuf_alloc. but we received an msdu which is
  1799. * 2304 bytes in size then this msdu is spread
  1800. * across 2 nbufs.
  1801. *
  1802. * 2. AMSDUs when RAW mode is enabled.
  1803. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  1804. * across 1st nbuf and 2nd nbuf and last MSDU is
  1805. * spread across 2nd nbuf and 3rd nbuf.
  1806. *
  1807. * for these scenarios let us create a skb frag_list and
  1808. * append these buffers till the last MSDU of the AMSDU
  1809. * Third condition:
  1810. * This is the most likely case, we receive 802.3 pkts
  1811. * decapsulated by HW, here we need to set the pkt length.
  1812. */
  1813. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  1814. bool is_mcbc, is_sa_vld, is_da_vld;
  1815. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  1816. rx_tlv_hdr);
  1817. is_sa_vld =
  1818. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  1819. rx_tlv_hdr);
  1820. is_da_vld =
  1821. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  1822. rx_tlv_hdr);
  1823. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  1824. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  1825. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  1826. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1827. } else if (qdf_nbuf_is_raw_frame(nbuf)) {
  1828. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1829. nbuf = dp_rx_sg_create(nbuf, rx_tlv_hdr);
  1830. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  1831. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  1832. next = nbuf->next;
  1833. } else {
  1834. l2_hdr_offset =
  1835. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc,
  1836. rx_tlv_hdr);
  1837. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1838. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1839. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1840. qdf_nbuf_pull_head(nbuf,
  1841. RX_PKT_TLVS_LEN +
  1842. l2_hdr_offset);
  1843. }
  1844. /*
  1845. * process frame for mulitpass phrase processing
  1846. */
  1847. if (qdf_unlikely(vdev->multipass_en)) {
  1848. dp_rx_multipass_process(peer, nbuf, tid);
  1849. }
  1850. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  1851. QDF_TRACE(QDF_MODULE_ID_DP,
  1852. QDF_TRACE_LEVEL_ERROR,
  1853. FL("Policy Check Drop pkt"));
  1854. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  1855. /* Drop & free packet */
  1856. qdf_nbuf_free(nbuf);
  1857. /* Statistics */
  1858. nbuf = next;
  1859. dp_peer_unref_del_find_by_id(peer);
  1860. continue;
  1861. }
  1862. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  1863. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  1864. (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc,
  1865. rx_tlv_hdr) ==
  1866. false))) {
  1867. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  1868. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  1869. qdf_nbuf_free(nbuf);
  1870. nbuf = next;
  1871. dp_peer_unref_del_find_by_id(peer);
  1872. continue;
  1873. }
  1874. if (soc->process_rx_status)
  1875. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  1876. /* Update the protocol tag in SKB based on CCE metadata */
  1877. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  1878. reo_ring_num, false, true);
  1879. /* Update the flow tag in SKB based on FSE metadata */
  1880. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  1881. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  1882. ring_id, tid_stats);
  1883. if (qdf_unlikely(vdev->mesh_vdev)) {
  1884. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  1885. == QDF_STATUS_SUCCESS) {
  1886. QDF_TRACE(QDF_MODULE_ID_DP,
  1887. QDF_TRACE_LEVEL_INFO_MED,
  1888. FL("mesh pkt filtered"));
  1889. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  1890. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  1891. 1);
  1892. qdf_nbuf_free(nbuf);
  1893. nbuf = next;
  1894. dp_peer_unref_del_find_by_id(peer);
  1895. continue;
  1896. }
  1897. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  1898. }
  1899. if (qdf_likely(vdev->rx_decap_type ==
  1900. htt_cmn_pkt_type_ethernet) &&
  1901. qdf_likely(!vdev->mesh_vdev)) {
  1902. /* WDS Destination Address Learning */
  1903. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  1904. /* Due to HW issue, sometimes we see that the sa_idx
  1905. * and da_idx are invalid with sa_valid and da_valid
  1906. * bits set
  1907. *
  1908. * in this case we also see that value of
  1909. * sa_sw_peer_id is set as 0
  1910. *
  1911. * Drop the packet if sa_idx and da_idx OOB or
  1912. * sa_sw_peerid is 0
  1913. */
  1914. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf)) {
  1915. qdf_nbuf_free(nbuf);
  1916. nbuf = next;
  1917. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  1918. dp_peer_unref_del_find_by_id(peer);
  1919. continue;
  1920. }
  1921. /* WDS Source Port Learning */
  1922. if (qdf_likely(vdev->wds_enabled))
  1923. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr,
  1924. peer, nbuf);
  1925. /* Intrabss-fwd */
  1926. if (dp_rx_check_ap_bridge(vdev))
  1927. if (dp_rx_intrabss_fwd(soc,
  1928. peer,
  1929. rx_tlv_hdr,
  1930. nbuf)) {
  1931. nbuf = next;
  1932. dp_peer_unref_del_find_by_id(peer);
  1933. tid_stats->intrabss_cnt++;
  1934. continue; /* Get next desc */
  1935. }
  1936. }
  1937. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  1938. DP_RX_LIST_APPEND(deliver_list_head,
  1939. deliver_list_tail,
  1940. nbuf);
  1941. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  1942. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1943. tid_stats->delivered_to_stack++;
  1944. nbuf = next;
  1945. dp_peer_unref_del_find_by_id(peer);
  1946. }
  1947. if (deliver_list_head && peer)
  1948. dp_rx_deliver_to_stack(vdev, peer, deliver_list_head,
  1949. deliver_list_tail);
  1950. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  1951. if (quota) {
  1952. num_pending =
  1953. dp_rx_srng_get_num_pending(hal_soc,
  1954. hal_ring_hdl,
  1955. num_entries,
  1956. &near_full);
  1957. if (num_pending) {
  1958. DP_STATS_INC(soc, rx.hp_oos2, 1);
  1959. if (!hif_exec_should_yield(scn, intr_id))
  1960. goto more_data;
  1961. if (qdf_unlikely(near_full)) {
  1962. DP_STATS_INC(soc, rx.near_full, 1);
  1963. goto more_data;
  1964. }
  1965. }
  1966. }
  1967. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  1968. vdev->osif_gro_flush(vdev->osif_vdev,
  1969. reo_ring_num);
  1970. }
  1971. }
  1972. /* Update histogram statistics by looping through pdev's */
  1973. DP_RX_HIST_STATS_PER_PDEV();
  1974. return rx_bufs_used; /* Assume no scale factor for now */
  1975. }
  1976. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  1977. {
  1978. QDF_STATUS ret;
  1979. if (vdev->osif_rx_flush) {
  1980. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  1981. if (!ret) {
  1982. dp_err("Failed to flush rx pkts for vdev %d\n",
  1983. vdev->vdev_id);
  1984. return ret;
  1985. }
  1986. }
  1987. return QDF_STATUS_SUCCESS;
  1988. }
  1989. /**
  1990. * dp_rx_pdev_detach() - detach dp rx
  1991. * @pdev: core txrx pdev context
  1992. *
  1993. * This function will detach DP RX into main device context
  1994. * will free DP Rx resources.
  1995. *
  1996. * Return: void
  1997. */
  1998. void
  1999. dp_rx_pdev_detach(struct dp_pdev *pdev)
  2000. {
  2001. uint8_t pdev_id = pdev->pdev_id;
  2002. struct dp_soc *soc = pdev->soc;
  2003. struct rx_desc_pool *rx_desc_pool;
  2004. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  2005. if (rx_desc_pool->pool_size != 0) {
  2006. if (!dp_is_soc_reinit(soc))
  2007. dp_rx_desc_nbuf_and_pool_free(soc, pdev_id,
  2008. rx_desc_pool);
  2009. else
  2010. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  2011. }
  2012. return;
  2013. }
  2014. static QDF_STATUS
  2015. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc, qdf_nbuf_t *nbuf,
  2016. struct dp_pdev *dp_pdev)
  2017. {
  2018. qdf_dma_addr_t paddr;
  2019. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2020. *nbuf = qdf_nbuf_alloc(dp_soc->osdev, RX_BUFFER_SIZE,
  2021. RX_BUFFER_RESERVATION, RX_BUFFER_ALIGNMENT,
  2022. FALSE);
  2023. if (!(*nbuf)) {
  2024. dp_err("nbuf alloc failed");
  2025. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2026. return ret;
  2027. }
  2028. ret = qdf_nbuf_map_single(dp_soc->osdev, *nbuf,
  2029. QDF_DMA_FROM_DEVICE);
  2030. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2031. qdf_nbuf_free(*nbuf);
  2032. dp_err("nbuf map failed");
  2033. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2034. return ret;
  2035. }
  2036. paddr = qdf_nbuf_get_frag_paddr(*nbuf, 0);
  2037. ret = check_x86_paddr(dp_soc, nbuf, &paddr, dp_pdev);
  2038. if (ret == QDF_STATUS_E_FAILURE) {
  2039. qdf_nbuf_unmap_single(dp_soc->osdev, *nbuf,
  2040. QDF_DMA_FROM_DEVICE);
  2041. qdf_nbuf_free(*nbuf);
  2042. dp_err("nbuf check x86 failed");
  2043. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2044. return ret;
  2045. }
  2046. return QDF_STATUS_SUCCESS;
  2047. }
  2048. QDF_STATUS
  2049. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2050. struct dp_srng *dp_rxdma_srng,
  2051. struct rx_desc_pool *rx_desc_pool,
  2052. uint32_t num_req_buffers)
  2053. {
  2054. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(dp_soc, mac_id);
  2055. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2056. union dp_rx_desc_list_elem_t *next;
  2057. void *rxdma_ring_entry;
  2058. qdf_dma_addr_t paddr;
  2059. qdf_nbuf_t *rx_nbuf_arr;
  2060. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2061. uint32_t buffer_index, nbuf_ptrs_per_page;
  2062. qdf_nbuf_t nbuf;
  2063. QDF_STATUS ret;
  2064. int page_idx, total_pages;
  2065. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2066. union dp_rx_desc_list_elem_t *tail = NULL;
  2067. if (qdf_unlikely(!rxdma_srng)) {
  2068. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2069. return QDF_STATUS_E_FAILURE;
  2070. }
  2071. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2072. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2073. num_req_buffers, &desc_list, &tail);
  2074. if (!nr_descs) {
  2075. dp_err("no free rx_descs in freelist");
  2076. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2077. return QDF_STATUS_E_NOMEM;
  2078. }
  2079. dp_debug("got %u RX descs for driver attach", nr_descs);
  2080. /*
  2081. * Try to allocate pointers to the nbuf one page at a time.
  2082. * Take pointers that can fit in one page of memory and
  2083. * iterate through the total descriptors that need to be
  2084. * allocated in order of pages. Reuse the pointers that
  2085. * have been allocated to fit in one page across each
  2086. * iteration to index into the nbuf.
  2087. */
  2088. total_pages = (nr_descs * sizeof(*rx_nbuf_arr)) / PAGE_SIZE;
  2089. /*
  2090. * Add an extra page to store the remainder if any
  2091. */
  2092. if ((nr_descs * sizeof(*rx_nbuf_arr)) % PAGE_SIZE)
  2093. total_pages++;
  2094. rx_nbuf_arr = qdf_mem_malloc(PAGE_SIZE);
  2095. if (!rx_nbuf_arr) {
  2096. dp_err("failed to allocate nbuf array");
  2097. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2098. QDF_BUG(0);
  2099. return QDF_STATUS_E_NOMEM;
  2100. }
  2101. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*rx_nbuf_arr);
  2102. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2103. qdf_mem_zero(rx_nbuf_arr, PAGE_SIZE);
  2104. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2105. /*
  2106. * The last page of buffer pointers may not be required
  2107. * completely based on the number of descriptors. Below
  2108. * check will ensure we are allocating only the
  2109. * required number of descriptors.
  2110. */
  2111. if (nr_nbuf_total >= nr_descs)
  2112. break;
  2113. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2114. &rx_nbuf_arr[nr_nbuf],
  2115. dp_pdev);
  2116. if (QDF_IS_STATUS_ERROR(ret))
  2117. break;
  2118. nr_nbuf_total++;
  2119. }
  2120. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2121. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2122. rxdma_ring_entry =
  2123. hal_srng_src_get_next(dp_soc->hal_soc,
  2124. rxdma_srng);
  2125. qdf_assert_always(rxdma_ring_entry);
  2126. next = desc_list->next;
  2127. nbuf = rx_nbuf_arr[buffer_index];
  2128. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  2129. dp_rx_desc_prep(&desc_list->rx_desc, nbuf);
  2130. desc_list->rx_desc.in_use = 1;
  2131. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2132. desc_list->rx_desc.cookie,
  2133. rx_desc_pool->owner);
  2134. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, nbuf, true);
  2135. desc_list = next;
  2136. }
  2137. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2138. }
  2139. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2140. qdf_mem_free(rx_nbuf_arr);
  2141. if (!nr_nbuf_total) {
  2142. dp_err("No nbuf's allocated");
  2143. QDF_BUG(0);
  2144. return QDF_STATUS_E_RESOURCES;
  2145. }
  2146. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf,
  2147. RX_BUFFER_SIZE * nr_nbuf_total);
  2148. return QDF_STATUS_SUCCESS;
  2149. }
  2150. /**
  2151. * dp_rx_attach() - attach DP RX
  2152. * @pdev: core txrx pdev context
  2153. *
  2154. * This function will attach a DP RX instance into the main
  2155. * device (SOC) context. Will allocate dp rx resource and
  2156. * initialize resources.
  2157. *
  2158. * Return: QDF_STATUS_SUCCESS: success
  2159. * QDF_STATUS_E_RESOURCES: Error return
  2160. */
  2161. QDF_STATUS
  2162. dp_rx_pdev_attach(struct dp_pdev *pdev)
  2163. {
  2164. uint8_t pdev_id = pdev->pdev_id;
  2165. struct dp_soc *soc = pdev->soc;
  2166. uint32_t rxdma_entries;
  2167. uint32_t rx_sw_desc_weight;
  2168. struct dp_srng *dp_rxdma_srng;
  2169. struct rx_desc_pool *rx_desc_pool;
  2170. QDF_STATUS ret_val;
  2171. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2172. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2173. "nss-wifi<4> skip Rx refil %d", pdev_id);
  2174. return QDF_STATUS_SUCCESS;
  2175. }
  2176. pdev = soc->pdev_list[pdev_id];
  2177. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  2178. rxdma_entries = dp_rxdma_srng->num_entries;
  2179. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2180. rx_desc_pool = &soc->rx_desc_buf[pdev_id];
  2181. rx_sw_desc_weight = wlan_cfg_get_dp_soc_rx_sw_desc_weight(soc->wlan_cfg_ctx);
  2182. dp_rx_desc_pool_alloc(soc, pdev_id,
  2183. rx_sw_desc_weight * rxdma_entries,
  2184. rx_desc_pool);
  2185. rx_desc_pool->owner = DP_WBM2SW_RBM;
  2186. /* For Rx buffers, WBM release ring is SW RING 3,for all pdev's */
  2187. ret_val = dp_rx_fst_attach(soc, pdev);
  2188. if ((ret_val != QDF_STATUS_SUCCESS) &&
  2189. (ret_val != QDF_STATUS_E_NOSUPPORT)) {
  2190. QDF_TRACE(QDF_MODULE_ID_ANY, QDF_TRACE_LEVEL_ERROR,
  2191. "RX Flow Search Table attach failed: pdev %d err %d",
  2192. pdev_id, ret_val);
  2193. return ret_val;
  2194. }
  2195. return dp_pdev_rx_buffers_attach(soc, pdev_id, dp_rxdma_srng,
  2196. rx_desc_pool, rxdma_entries - 1);
  2197. }
  2198. /*
  2199. * dp_rx_nbuf_prepare() - prepare RX nbuf
  2200. * @soc: core txrx main context
  2201. * @pdev: core txrx pdev context
  2202. *
  2203. * This function alloc & map nbuf for RX dma usage, retry it if failed
  2204. * until retry times reaches max threshold or succeeded.
  2205. *
  2206. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  2207. */
  2208. qdf_nbuf_t
  2209. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  2210. {
  2211. uint8_t *buf;
  2212. int32_t nbuf_retry_count;
  2213. QDF_STATUS ret;
  2214. qdf_nbuf_t nbuf = NULL;
  2215. for (nbuf_retry_count = 0; nbuf_retry_count <
  2216. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  2217. nbuf_retry_count++) {
  2218. /* Allocate a new skb */
  2219. nbuf = qdf_nbuf_alloc(soc->osdev,
  2220. RX_BUFFER_SIZE,
  2221. RX_BUFFER_RESERVATION,
  2222. RX_BUFFER_ALIGNMENT,
  2223. FALSE);
  2224. if (!nbuf) {
  2225. DP_STATS_INC(pdev,
  2226. replenish.nbuf_alloc_fail, 1);
  2227. continue;
  2228. }
  2229. buf = qdf_nbuf_data(nbuf);
  2230. memset(buf, 0, RX_BUFFER_SIZE);
  2231. ret = qdf_nbuf_map_single(soc->osdev, nbuf,
  2232. QDF_DMA_FROM_DEVICE);
  2233. /* nbuf map failed */
  2234. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2235. qdf_nbuf_free(nbuf);
  2236. DP_STATS_INC(pdev, replenish.map_err, 1);
  2237. continue;
  2238. }
  2239. /* qdf_nbuf alloc and map succeeded */
  2240. break;
  2241. }
  2242. /* qdf_nbuf still alloc or map failed */
  2243. if (qdf_unlikely(nbuf_retry_count >=
  2244. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  2245. return NULL;
  2246. return nbuf;
  2247. }