htt_stats.h 142 KB

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  1. /*
  2. * Copyright (c) 2017-2019 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. /**
  19. * @file htt_stats.h
  20. *
  21. * @details the public header file of HTT STATS
  22. */
  23. #ifndef __HTT_STATS_H__
  24. #define __HTT_STATS_H__
  25. #include <htt.h>
  26. /*
  27. * htt_dbg_ext_stats_type -
  28. * The base structure for each of the stats_type is only for reference
  29. * Host should use this information to know the type of TLVs to expect
  30. * for a particular stats type.
  31. *
  32. * Max supported stats :- 256.
  33. */
  34. enum htt_dbg_ext_stats_type {
  35. /* HTT_DBG_EXT_STATS_RESET
  36. * PARAM:
  37. * - config_param0 : start_offset (stats type)
  38. * - config_param1 : stats bmask from start offset
  39. * - config_param2 : stats bmask from start offset + 32
  40. * - config_param3 : stats bmask from start offset + 64
  41. * RESP MSG:
  42. * - No response sent.
  43. */
  44. HTT_DBG_EXT_STATS_RESET = 0,
  45. /* HTT_DBG_EXT_STATS_PDEV_TX
  46. * PARAMS:
  47. * - No Params
  48. * RESP MSG:
  49. * - htt_tx_pdev_stats_t
  50. */
  51. HTT_DBG_EXT_STATS_PDEV_TX = 1,
  52. /* HTT_DBG_EXT_STATS_PDEV_RX
  53. * PARAMS:
  54. * - No Params
  55. * RESP MSG:
  56. * - htt_rx_pdev_stats_t
  57. */
  58. HTT_DBG_EXT_STATS_PDEV_RX = 2,
  59. /* HTT_DBG_EXT_STATS_PDEV_TX_HWQ
  60. * PARAMS:
  61. * - config_param0: [Bit31: Bit0] HWQ mask
  62. * RESP MSG:
  63. * - htt_tx_hwq_stats_t
  64. */
  65. HTT_DBG_EXT_STATS_PDEV_TX_HWQ = 3,
  66. /* HTT_DBG_EXT_STATS_PDEV_TX_SCHED
  67. * PARAMS:
  68. * - config_param0: [Bit31: Bit0] TXQ mask
  69. * RESP MSG:
  70. * - htt_stats_tx_sched_t
  71. */
  72. HTT_DBG_EXT_STATS_PDEV_TX_SCHED = 4,
  73. /* HTT_DBG_EXT_STATS_PDEV_ERROR
  74. * PARAMS:
  75. * - No Params
  76. * RESP MSG:
  77. * - htt_hw_err_stats_t
  78. */
  79. HTT_DBG_EXT_STATS_PDEV_ERROR = 5,
  80. /* HTT_DBG_EXT_STATS_PDEV_TQM
  81. * PARAMS:
  82. * - No Params
  83. * RESP MSG:
  84. * - htt_tx_tqm_pdev_stats_t
  85. */
  86. HTT_DBG_EXT_STATS_PDEV_TQM = 6,
  87. /* HTT_DBG_EXT_STATS_TQM_CMDQ
  88. * PARAMS:
  89. * - config_param0:
  90. * [Bit15: Bit0 ] cmdq id :if 0xFFFF print all cmdq's
  91. * [Bit31: Bit16] reserved
  92. * RESP MSG:
  93. * - htt_tx_tqm_cmdq_stats_t
  94. */
  95. HTT_DBG_EXT_STATS_TQM_CMDQ = 7,
  96. /* HTT_DBG_EXT_STATS_TX_DE_INFO
  97. * PARAMS:
  98. * - No Params
  99. * RESP MSG:
  100. * - htt_tx_de_stats_t
  101. */
  102. HTT_DBG_EXT_STATS_TX_DE_INFO = 8,
  103. /* HTT_DBG_EXT_STATS_PDEV_TX_RATE
  104. * PARAMS:
  105. * - No Params
  106. * RESP MSG:
  107. * - htt_tx_pdev_rate_stats_t
  108. */
  109. HTT_DBG_EXT_STATS_PDEV_TX_RATE = 9,
  110. /* HTT_DBG_EXT_STATS_PDEV_RX_RATE
  111. * PARAMS:
  112. * - No Params
  113. * RESP MSG:
  114. * - htt_rx_pdev_rate_stats_t
  115. */
  116. HTT_DBG_EXT_STATS_PDEV_RX_RATE = 10,
  117. /* HTT_DBG_EXT_STATS_PEER_INFO
  118. * PARAMS:
  119. * - config_param0:
  120. * [Bit0] - [0] for sw_peer_id, [1] for mac_addr based request
  121. * [Bit15 : Bit 1] htt_peer_stats_req_mode_t
  122. * [Bit31 : Bit16] sw_peer_id
  123. * config_param1:
  124. * peer_stats_req_type_mask:32 (enum htt_peer_stats_tlv_enum)
  125. * 0 bit htt_peer_stats_cmn_tlv
  126. * 1 bit htt_peer_details_tlv
  127. * 2 bit htt_tx_peer_rate_stats_tlv
  128. * 3 bit htt_rx_peer_rate_stats_tlv
  129. * 4 bit htt_tx_tid_stats_tlv/htt_tx_tid_stats_v1_tlv
  130. * 5 bit htt_rx_tid_stats_tlv
  131. * 6 bit htt_msdu_flow_stats_tlv
  132. * - config_param2: [Bit31 : Bit0] mac_addr31to0
  133. * - config_param3: [Bit15 : Bit0] mac_addr47to32
  134. * [Bit31 : Bit16] reserved
  135. * RESP MSG:
  136. * - htt_peer_stats_t
  137. */
  138. HTT_DBG_EXT_STATS_PEER_INFO = 11,
  139. /* HTT_DBG_EXT_STATS_TX_SELFGEN_INFO
  140. * PARAMS:
  141. * - No Params
  142. * RESP MSG:
  143. * - htt_tx_pdev_selfgen_stats_t
  144. */
  145. HTT_DBG_EXT_STATS_TX_SELFGEN_INFO = 12,
  146. /* HTT_DBG_EXT_STATS_TX_MU_HWQ
  147. * PARAMS:
  148. * - config_param0: [Bit31: Bit0] HWQ mask
  149. * RESP MSG:
  150. * - htt_tx_hwq_mu_mimo_stats_t
  151. */
  152. HTT_DBG_EXT_STATS_TX_MU_HWQ = 13,
  153. /* HTT_DBG_EXT_STATS_RING_IF_INFO
  154. * PARAMS:
  155. * - config_param0:
  156. * [Bit15: Bit0 ] ring id :if 0xFFFF print all rings
  157. * [Bit31: Bit16] reserved
  158. * RESP MSG:
  159. * - htt_ring_if_stats_t
  160. */
  161. HTT_DBG_EXT_STATS_RING_IF_INFO = 14,
  162. /* HTT_DBG_EXT_STATS_SRNG_INFO
  163. * PARAMS:
  164. * - config_param0:
  165. * [Bit15: Bit0 ] ring id :if 0xFFFF print all rings
  166. * [Bit31: Bit16] reserved
  167. * - No Params
  168. * RESP MSG:
  169. * - htt_sring_stats_t
  170. */
  171. HTT_DBG_EXT_STATS_SRNG_INFO = 15,
  172. /* HTT_DBG_EXT_STATS_SFM_INFO
  173. * PARAMS:
  174. * - No Params
  175. * RESP MSG:
  176. * - htt_sfm_stats_t
  177. */
  178. HTT_DBG_EXT_STATS_SFM_INFO = 16,
  179. /* HTT_DBG_EXT_STATS_PDEV_TX_MU
  180. * PARAMS:
  181. * - No Params
  182. * RESP MSG:
  183. * - htt_tx_pdev_mu_mimo_stats_t
  184. */
  185. HTT_DBG_EXT_STATS_PDEV_TX_MU = 17,
  186. /* HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST
  187. * PARAMS:
  188. * - config_param0:
  189. * [Bit7 : Bit0] vdev_id:8
  190. * note:0xFF to get all active peers based on pdev_mask.
  191. * [Bit31 : Bit8] rsvd:24
  192. * RESP MSG:
  193. * - htt_active_peer_details_list_t
  194. */
  195. HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST = 18,
  196. /* HTT_DBG_EXT_STATS_PDEV_CCA_STATS
  197. * PARAMS:
  198. * - config_param0:
  199. * [Bit0] - 1 sec interval histogram
  200. * [Bit1] - 100ms interval histogram
  201. * [Bit3] - Cumulative CCA stats
  202. * RESP MSG:
  203. * - htt_pdev_cca_stats_t
  204. */
  205. HTT_DBG_EXT_STATS_PDEV_CCA_STATS = 19,
  206. /* HTT_DBG_EXT_STATS_TWT_SESSIONS
  207. * PARAMS:
  208. * - config_param0:
  209. * No params
  210. * RESP MSG:
  211. * - htt_pdev_twt_sessions_stats_t
  212. */
  213. HTT_DBG_EXT_STATS_TWT_SESSIONS = 20,
  214. /* HTT_DBG_EXT_STATS_REO_CNTS
  215. * PARAMS:
  216. * - config_param0:
  217. * No params
  218. * RESP MSG:
  219. * - htt_soc_reo_resource_stats_t
  220. */
  221. HTT_DBG_EXT_STATS_REO_RESOURCE_STATS = 21,
  222. /* HTT_DBG_EXT_STATS_TX_SOUNDING_INFO
  223. * PARAMS:
  224. * - config_param0:
  225. * [Bit0] vdev_id_set:1
  226. * set to 1 if vdev_id is set and vdev stats are requested
  227. * [Bit8 : Bit1] vdev_id:8
  228. * note:0xFF to get all active vdevs based on pdev_mask.
  229. * [Bit31 : Bit9] rsvd:22
  230. *
  231. * RESP MSG:
  232. * - htt_tx_sounding_stats_t
  233. */
  234. HTT_DBG_EXT_STATS_TX_SOUNDING_INFO = 22,
  235. /* HTT_DBG_EXT_STATS_PDEV_OBSS_PD_STATS
  236. * PARAMS:
  237. * - config_param0:
  238. * No params
  239. * RESP MSG:
  240. * - htt_pdev_obss_pd_stats_t
  241. */
  242. HTT_DBG_EXT_STATS_PDEV_OBSS_PD_STATS = 23,
  243. /* HTT_DBG_EXT_STATS_RING_BACKPRESSURE_STATS
  244. * PARAMS:
  245. * - config_param0:
  246. * No params
  247. * RESP MSG:
  248. * - htt_stats_ring_backpressure_stats_t
  249. */
  250. HTT_DBG_EXT_STATS_RING_BACKPRESSURE_STATS = 24,
  251. /* HTT_DBG_EXT_STATS_LATENCY_PROF_STATS
  252. * PARAMS:
  253. *
  254. * RESP MSG:
  255. * - htt_soc_latency_prof_t
  256. */
  257. HTT_DBG_EXT_STATS_LATENCY_PROF_STATS = 25,
  258. /* keep this last */
  259. HTT_DBG_NUM_EXT_STATS = 256,
  260. };
  261. typedef enum {
  262. HTT_STATS_TX_PDEV_CMN_TAG = 0, /* htt_tx_pdev_stats_cmn_tlv */
  263. HTT_STATS_TX_PDEV_UNDERRUN_TAG = 1, /* htt_tx_pdev_stats_urrn_tlv_v */
  264. HTT_STATS_TX_PDEV_SIFS_TAG = 2, /* htt_tx_pdev_stats_sifs_tlv_v */
  265. HTT_STATS_TX_PDEV_FLUSH_TAG = 3, /* htt_tx_pdev_stats_flush_tlv_v */
  266. HTT_STATS_TX_PDEV_PHY_ERR_TAG = 4, /* htt_tx_pdev_stats_phy_err_tlv_v */
  267. HTT_STATS_STRING_TAG = 5, /* htt_stats_string_tlv */
  268. HTT_STATS_TX_HWQ_CMN_TAG = 6, /* htt_tx_hwq_stats_cmn_tlv */
  269. HTT_STATS_TX_HWQ_DIFS_LATENCY_TAG = 7, /* htt_tx_hwq_difs_latency_stats_tlv_v */
  270. HTT_STATS_TX_HWQ_CMD_RESULT_TAG = 8, /* htt_tx_hwq_cmd_result_stats_tlv_v */
  271. HTT_STATS_TX_HWQ_CMD_STALL_TAG = 9, /* htt_tx_hwq_cmd_stall_stats_tlv_v */
  272. HTT_STATS_TX_HWQ_FES_STATUS_TAG = 10, /* htt_tx_hwq_fes_result_stats_tlv_v */
  273. HTT_STATS_TX_TQM_GEN_MPDU_TAG = 11, /* htt_tx_tqm_gen_mpdu_stats_tlv_v */
  274. HTT_STATS_TX_TQM_LIST_MPDU_TAG = 12, /* htt_tx_tqm_list_mpdu_stats_tlv_v */
  275. HTT_STATS_TX_TQM_LIST_MPDU_CNT_TAG = 13, /* htt_tx_tqm_list_mpdu_cnt_tlv_v */
  276. HTT_STATS_TX_TQM_CMN_TAG = 14, /* htt_tx_tqm_cmn_stats_tlv */
  277. HTT_STATS_TX_TQM_PDEV_TAG = 15, /* htt_tx_tqm_pdev_stats_tlv_v */
  278. HTT_STATS_TX_TQM_CMDQ_STATUS_TAG = 16, /* htt_tx_tqm_cmdq_status_tlv */
  279. HTT_STATS_TX_DE_EAPOL_PACKETS_TAG = 17, /* htt_tx_de_eapol_packets_stats_tlv */
  280. HTT_STATS_TX_DE_CLASSIFY_FAILED_TAG = 18, /* htt_tx_de_classify_failed_stats_tlv */
  281. HTT_STATS_TX_DE_CLASSIFY_STATS_TAG = 19, /* htt_tx_de_classify_stats_tlv */
  282. HTT_STATS_TX_DE_CLASSIFY_STATUS_TAG = 20, /* htt_tx_de_classify_status_stats_tlv */
  283. HTT_STATS_TX_DE_ENQUEUE_PACKETS_TAG = 21, /* htt_tx_de_enqueue_packets_stats_tlv */
  284. HTT_STATS_TX_DE_ENQUEUE_DISCARD_TAG = 22, /* htt_tx_de_enqueue_discard_stats_tlv */
  285. HTT_STATS_TX_DE_CMN_TAG = 23, /* htt_tx_de_cmn_stats_tlv */
  286. HTT_STATS_RING_IF_TAG = 24, /* htt_ring_if_stats_tlv */
  287. HTT_STATS_TX_PDEV_MU_MIMO_STATS_TAG = 25, /* htt_tx_pdev_mu_mimo_sch_stats_tlv */
  288. HTT_STATS_SFM_CMN_TAG = 26, /* htt_sfm_cmn_tlv */
  289. HTT_STATS_SRING_STATS_TAG = 27, /* htt_sring_stats_tlv */
  290. HTT_STATS_RX_PDEV_FW_STATS_TAG = 28, /* htt_rx_pdev_fw_stats_tlv */
  291. HTT_STATS_RX_PDEV_FW_RING_MPDU_ERR_TAG = 29, /* htt_rx_pdev_fw_ring_mpdu_err_tlv_v */
  292. HTT_STATS_RX_PDEV_FW_MPDU_DROP_TAG = 30, /* htt_rx_pdev_fw_mpdu_drop_tlv_v */
  293. HTT_STATS_RX_SOC_FW_STATS_TAG = 31, /* htt_rx_soc_fw_stats_tlv */
  294. HTT_STATS_RX_SOC_FW_REFILL_RING_EMPTY_TAG = 32, /* htt_rx_soc_fw_refill_ring_empty_tlv_v */
  295. HTT_STATS_RX_SOC_FW_REFILL_RING_NUM_REFILL_TAG = 33, /* htt_rx_soc_fw_refill_ring_num_refill_tlv_v */
  296. HTT_STATS_TX_PDEV_RATE_STATS_TAG = 34, /* htt_tx_pdev_rate_stats_tlv */
  297. HTT_STATS_RX_PDEV_RATE_STATS_TAG = 35, /* htt_rx_pdev_rate_stats_tlv */
  298. HTT_STATS_TX_PDEV_SCHEDULER_TXQ_STATS_TAG = 36, /* htt_tx_pdev_stats_sched_per_txq_tlv */
  299. HTT_STATS_TX_SCHED_CMN_TAG = 37, /* htt_stats_tx_sched_cmn_tlv */
  300. HTT_STATS_TX_PDEV_MUMIMO_MPDU_STATS_TAG = 38, /* htt_tx_pdev_mu_mimo_mpdu_stats_tlv */
  301. HTT_STATS_SCHED_TXQ_CMD_POSTED_TAG = 39, /* htt_sched_txq_cmd_posted_tlv_v */
  302. HTT_STATS_RING_IF_CMN_TAG = 40, /* htt_ring_if_cmn_tlv */
  303. HTT_STATS_SFM_CLIENT_USER_TAG = 41, /* htt_sfm_client_user_tlv_v */
  304. HTT_STATS_SFM_CLIENT_TAG = 42, /* htt_sfm_client_tlv */
  305. HTT_STATS_TX_TQM_ERROR_STATS_TAG = 43, /* htt_tx_tqm_error_stats_tlv */
  306. HTT_STATS_SCHED_TXQ_CMD_REAPED_TAG = 44, /* htt_sched_txq_cmd_reaped_tlv_v */
  307. HTT_STATS_SRING_CMN_TAG = 45, /* htt_sring_cmn_tlv */
  308. HTT_STATS_TX_SELFGEN_AC_ERR_STATS_TAG = 46, /* htt_tx_selfgen_ac_err_stats_tlv */
  309. HTT_STATS_TX_SELFGEN_CMN_STATS_TAG = 47, /* htt_tx_selfgen_cmn_stats_tlv */
  310. HTT_STATS_TX_SELFGEN_AC_STATS_TAG = 48, /* htt_tx_selfgen_ac_stats_tlv */
  311. HTT_STATS_TX_SELFGEN_AX_STATS_TAG = 49, /* htt_tx_selfgen_ax_stats_tlv */
  312. HTT_STATS_TX_SELFGEN_AX_ERR_STATS_TAG = 50, /* htt_tx_selfgen_ax_err_stats_tlv */
  313. HTT_STATS_TX_HWQ_MUMIMO_SCH_STATS_TAG = 51, /* htt_tx_hwq_mu_mimo_sch_stats_tlv */
  314. HTT_STATS_TX_HWQ_MUMIMO_MPDU_STATS_TAG = 52, /* htt_tx_hwq_mu_mimo_mpdu_stats_tlv */
  315. HTT_STATS_TX_HWQ_MUMIMO_CMN_STATS_TAG = 53, /* htt_tx_hwq_mu_mimo_cmn_stats_tlv */
  316. HTT_STATS_HW_INTR_MISC_TAG = 54, /* htt_hw_stats_intr_misc_tlv */
  317. HTT_STATS_HW_WD_TIMEOUT_TAG = 55, /* htt_hw_stats_wd_timeout_tlv */
  318. HTT_STATS_HW_PDEV_ERRS_TAG = 56, /* htt_hw_stats_pdev_errs_tlv */
  319. HTT_STATS_COUNTER_NAME_TAG = 57, /* htt_counter_tlv */
  320. HTT_STATS_TX_TID_DETAILS_TAG = 58, /* htt_tx_tid_stats_tlv */
  321. HTT_STATS_RX_TID_DETAILS_TAG = 59, /* htt_rx_tid_stats_tlv */
  322. HTT_STATS_PEER_STATS_CMN_TAG = 60, /* htt_peer_stats_cmn_tlv */
  323. HTT_STATS_PEER_DETAILS_TAG = 61, /* htt_peer_details_tlv */
  324. HTT_STATS_PEER_TX_RATE_STATS_TAG = 62, /* htt_tx_peer_rate_stats_tlv */
  325. HTT_STATS_PEER_RX_RATE_STATS_TAG = 63, /* htt_rx_peer_rate_stats_tlv */
  326. HTT_STATS_PEER_MSDU_FLOWQ_TAG = 64, /* htt_msdu_flow_stats_tlv */
  327. HTT_STATS_TX_DE_COMPL_STATS_TAG = 65, /* htt_tx_de_compl_stats_tlv */
  328. HTT_STATS_WHAL_TX_TAG = 66, /* htt_hw_stats_whal_tx_tlv */
  329. HTT_STATS_TX_PDEV_SIFS_HIST_TAG = 67, /* htt_tx_pdev_stats_sifs_hist_tlv_v */
  330. HTT_STATS_RX_PDEV_FW_STATS_PHY_ERR_TAG = 68, /* htt_rx_pdev_fw_stats_phy_err_tlv */
  331. HTT_STATS_TX_TID_DETAILS_V1_TAG = 69, /* htt_tx_tid_stats_v1_tlv */
  332. HTT_STATS_PDEV_CCA_1SEC_HIST_TAG = 70, /* htt_pdev_cca_stats_hist_tlv (for 1 sec interval stats) */
  333. HTT_STATS_PDEV_CCA_100MSEC_HIST_TAG = 71, /* htt_pdev_cca_stats_hist_tlv (for 100 msec interval stats) */
  334. HTT_STATS_PDEV_CCA_STAT_CUMULATIVE_TAG = 72, /* htt_pdev_stats_cca_stats_tlv */
  335. HTT_STATS_PDEV_CCA_COUNTERS_TAG = 73, /* htt_pdev_stats_cca_counters_tlv */
  336. HTT_STATS_TX_PDEV_MPDU_STATS_TAG = 74, /* htt_tx_pdev_mpdu_stats_tlv */
  337. HTT_STATS_PDEV_TWT_SESSIONS_TAG = 75, /* htt_pdev_stats_twt_sessions_tlv */
  338. HTT_STATS_PDEV_TWT_SESSION_TAG = 76, /* htt_pdev_stats_twt_session_tlv */
  339. HTT_STATS_RX_REFILL_RXDMA_ERR_TAG = 77, /* htt_rx_soc_fw_refill_ring_num_rxdma_err_tlv_v */
  340. HTT_STATS_RX_REFILL_REO_ERR_TAG = 78, /* htt_rx_soc_fw_refill_ring_num_reo_err_tlv_v */
  341. HTT_STATS_RX_REO_RESOURCE_STATS_TAG = 79, /* htt_rx_reo_debug_stats_tlv_v */
  342. HTT_STATS_TX_SOUNDING_STATS_TAG = 80, /* htt_tx_sounding_stats_tlv */
  343. HTT_STATS_TX_PDEV_TX_PPDU_STATS_TAG = 81, /* htt_tx_pdev_stats_tx_ppdu_stats_tlv_v */
  344. HTT_STATS_TX_PDEV_TRIED_MPDU_CNT_HIST_TAG = 82, /* htt_tx_pdev_stats_tried_mpdu_cnt_hist_tlv_v */
  345. HTT_STATS_TX_HWQ_TRIED_MPDU_CNT_HIST_TAG = 83, /* htt_tx_hwq_tried_mpdu_cnt_hist_tlv_v */
  346. HTT_STATS_TX_HWQ_TXOP_USED_CNT_HIST_TAG = 84, /* htt_tx_hwq_txop_used_cnt_hist_tlv_v */
  347. HTT_STATS_TX_DE_FW2WBM_RING_FULL_HIST_TAG = 85, /* htt_tx_de_fw2wbm_ring_full_hist_tlv */
  348. HTT_STATS_SCHED_TXQ_SCHED_ORDER_SU_TAG = 86, /* htt_sched_txq_sched_order_su_tlv */
  349. HTT_STATS_SCHED_TXQ_SCHED_INELIGIBILITY_TAG = 87, /* htt_sched_txq_sched_eligibility_tlv */
  350. HTT_STATS_PDEV_OBSS_PD_TAG = 88, /* htt_pdev_obss_pd_stats_tlv */
  351. HTT_STATS_HW_WAR_TAG = 89, /* htt_hw_war_stats_tlv */
  352. HTT_STATS_RING_BACKPRESSURE_STATS_TAG = 90, /* htt_ring_backpressure_stats_tlv */
  353. HTT_STATS_LATENCY_PROF_STATS_TAG = 91, /* htt_latency_prof_stats_tlv */
  354. HTT_STATS_LATENCY_CTX_TAG = 92, /* htt_latency_prof_ctx_tlv */
  355. HTT_STATS_LATENCY_CNT_TAG = 93, /* htt_latency_prof_cnt_tlv */
  356. HTT_STATS_MAX_TAG,
  357. } htt_tlv_tag_t;
  358. #define HTT_STATS_TLV_TAG_M 0x00000fff
  359. #define HTT_STATS_TLV_TAG_S 0
  360. #define HTT_STATS_TLV_LENGTH_M 0x00fff000
  361. #define HTT_STATS_TLV_LENGTH_S 12
  362. #define HTT_STATS_TLV_TAG_GET(_var) \
  363. (((_var) & HTT_STATS_TLV_TAG_M) >> \
  364. HTT_STATS_TLV_TAG_S)
  365. #define HTT_STATS_TLV_TAG_SET(_var, _val) \
  366. do { \
  367. HTT_CHECK_SET_VAL(HTT_STATS_TLV_TAG, _val); \
  368. ((_var) |= ((_val) << HTT_STATS_TLV_TAG_S)); \
  369. } while (0)
  370. #define HTT_STATS_TLV_LENGTH_GET(_var) \
  371. (((_var) & HTT_STATS_TLV_LENGTH_M) >> \
  372. HTT_STATS_TLV_LENGTH_S)
  373. #define HTT_STATS_TLV_LENGTH_SET(_var, _val) \
  374. do { \
  375. HTT_CHECK_SET_VAL(HTT_STATS_TLV_LENGTH, _val); \
  376. ((_var) |= ((_val) << HTT_STATS_TLV_LENGTH_S)); \
  377. } while (0)
  378. typedef struct {
  379. union {
  380. /* BIT [11 : 0] :- tag
  381. * BIT [23 : 12] :- length
  382. * BIT [31 : 24] :- reserved
  383. */
  384. A_UINT32 tag__length;
  385. /*
  386. * The following struct is not endian-portable.
  387. * It is suitable for use within the target, which is known to be
  388. * little-endian.
  389. * The host should use the above endian-portable macros to access
  390. * the tag and length bitfields in an endian-neutral manner.
  391. */
  392. struct {
  393. A_UINT32 tag : 12, /* BIT [11 : 0] */
  394. length : 12, /* BIT [23 : 12] */
  395. reserved : 8; /* BIT [31 : 24] */
  396. };
  397. };
  398. } htt_tlv_hdr_t;
  399. #define HTT_STATS_MAX_STRING_SZ32 4
  400. #define HTT_STATS_MACID_INVALID 0xff
  401. #define HTT_TX_HWQ_MAX_DIFS_LATENCY_BINS 10
  402. #define HTT_TX_HWQ_MAX_CMD_RESULT_STATS 13
  403. #define HTT_TX_HWQ_MAX_CMD_STALL_STATS 5
  404. #define HTT_TX_HWQ_MAX_FES_RESULT_STATS 10
  405. typedef enum {
  406. HTT_STATS_TX_PDEV_NO_DATA_UNDERRUN = 0,
  407. HTT_STATS_TX_PDEV_DATA_UNDERRUN_BETWEEN_MPDU = 1,
  408. HTT_STATS_TX_PDEV_DATA_UNDERRUN_WITHIN_MPDU = 2,
  409. HTT_TX_PDEV_MAX_URRN_STATS = 3,
  410. } htt_tx_pdev_underrun_enum;
  411. #define HTT_TX_PDEV_MAX_FLUSH_REASON_STATS 71
  412. #define HTT_TX_PDEV_MAX_SIFS_BURST_STATS 9
  413. #define HTT_TX_PDEV_MAX_SIFS_BURST_HIST_STATS 10
  414. #define HTT_TX_PDEV_MAX_PHY_ERR_STATS 18
  415. #define HTT_TX_PDEV_SCHED_TX_MODE_MAX 4
  416. #define HTT_TX_PDEV_NUM_SCHED_ORDER_LOG 20
  417. #define HTT_RX_STATS_REFILL_MAX_RING 4
  418. #define HTT_RX_STATS_RXDMA_MAX_ERR 16
  419. #define HTT_RX_STATS_FW_DROP_REASON_MAX 16
  420. /* Bytes stored in little endian order */
  421. /* Length should be multiple of DWORD */
  422. typedef struct {
  423. htt_tlv_hdr_t tlv_hdr;
  424. A_UINT32 data[1]; /* Can be variable length */
  425. } htt_stats_string_tlv;
  426. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_M 0x000000ff
  427. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_S 0
  428. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_GET(_var) \
  429. (((_var) & HTT_TX_PDEV_STATS_CMN_MAC_ID_M) >> \
  430. HTT_TX_PDEV_STATS_CMN_MAC_ID_S)
  431. #define HTT_TX_PDEV_STATS_CMN_MAC_ID_SET(_var, _val) \
  432. do { \
  433. HTT_CHECK_SET_VAL(HTT_TX_PDEV_STATS_CMN_MAC_ID, _val); \
  434. ((_var) |= ((_val) << HTT_TX_PDEV_STATS_CMN_MAC_ID_S)); \
  435. } while (0)
  436. /* == TX PDEV STATS == */
  437. typedef struct {
  438. htt_tlv_hdr_t tlv_hdr;
  439. /* BIT [ 7 : 0] :- mac_id
  440. * BIT [31 : 8] :- reserved
  441. */
  442. A_UINT32 mac_id__word;
  443. /* Num queued to HW */
  444. A_UINT32 hw_queued;
  445. /* Num PPDU reaped from HW */
  446. A_UINT32 hw_reaped;
  447. /* Num underruns */
  448. A_UINT32 underrun;
  449. /* Num HW Paused counter. */
  450. A_UINT32 hw_paused;
  451. /* Num HW flush counter. */
  452. A_UINT32 hw_flush;
  453. /* Num HW filtered counter. */
  454. A_UINT32 hw_filt;
  455. /* Num PPDUs cleaned up in TX abort */
  456. A_UINT32 tx_abort;
  457. /* Num MPDUs requed by SW */
  458. A_UINT32 mpdu_requed;
  459. /* excessive retries */
  460. A_UINT32 tx_xretry;
  461. /* Last used data hw rate code */
  462. A_UINT32 data_rc;
  463. /* frames dropped due to excessive sw retries */
  464. A_UINT32 mpdu_dropped_xretry;
  465. /* illegal rate phy errors */
  466. A_UINT32 illgl_rate_phy_err;
  467. /* wal pdev continous xretry */
  468. A_UINT32 cont_xretry;
  469. /* wal pdev tx timeout */
  470. A_UINT32 tx_timeout;
  471. /* wal pdev resets */
  472. A_UINT32 pdev_resets;
  473. /* PhY/BB underrun */
  474. A_UINT32 phy_underrun;
  475. /* MPDU is more than txop limit */
  476. A_UINT32 txop_ovf;
  477. /* Number of Sequences posted */
  478. A_UINT32 seq_posted;
  479. /* Number of Sequences failed queueing */
  480. A_UINT32 seq_failed_queueing;
  481. /* Number of Sequences completed */
  482. A_UINT32 seq_completed;
  483. /* Number of Sequences restarted */
  484. A_UINT32 seq_restarted;
  485. /* Number of MU Sequences posted */
  486. A_UINT32 mu_seq_posted;
  487. /* Number of time HW ring is paused between seq switch within ISR */
  488. A_UINT32 seq_switch_hw_paused;
  489. /* Number of times seq continuation in DSR */
  490. A_UINT32 next_seq_posted_dsr;
  491. /* Number of times seq continuation in ISR */
  492. A_UINT32 seq_posted_isr;
  493. /* Number of seq_ctrl cached. */
  494. A_UINT32 seq_ctrl_cached;
  495. /* Number of MPDUs successfully transmitted */
  496. A_UINT32 mpdu_count_tqm;
  497. /* Number of MSDUs successfully transmitted */
  498. A_UINT32 msdu_count_tqm;
  499. /* Number of MPDUs dropped */
  500. A_UINT32 mpdu_removed_tqm;
  501. /* Number of MSDUs dropped */
  502. A_UINT32 msdu_removed_tqm;
  503. /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT (Reset,channel change) */
  504. A_UINT32 mpdus_sw_flush;
  505. /* Num MPDUs filtered by HW, all filter condition (TTL expired) */
  506. A_UINT32 mpdus_hw_filter;
  507. /* Num MPDUs truncated by PDG (TXOP, TBTT, PPDU_duration based on rate, dyn_bw) */
  508. A_UINT32 mpdus_truncated;
  509. /* Num MPDUs that was tried but didn't receive ACK or BA */
  510. A_UINT32 mpdus_ack_failed;
  511. /* Num MPDUs that was dropped due to expiry (MSDU TTL). */
  512. A_UINT32 mpdus_expired;
  513. /* Num MPDUs that was retried within seq_ctrl (MGMT/LEGACY) */
  514. A_UINT32 mpdus_seq_hw_retry;
  515. /* Num of TQM acked cmds processed */
  516. A_UINT32 ack_tlv_proc;
  517. /* coex_abort_mpdu_cnt valid. */
  518. A_UINT32 coex_abort_mpdu_cnt_valid;
  519. /* coex_abort_mpdu_cnt from TX FES stats. */
  520. A_UINT32 coex_abort_mpdu_cnt;
  521. /* Number of total PPDUs(DATA, MGMT, excludes selfgen) tried over the air (OTA) */
  522. A_UINT32 num_total_ppdus_tried_ota;
  523. /* Number of data PPDUs tried over the air (OTA) */
  524. A_UINT32 num_data_ppdus_tried_ota;
  525. /* Num Local control/mgmt frames (MSDUs) queued */
  526. A_UINT32 local_ctrl_mgmt_enqued;
  527. /* local_ctrl_mgmt_freed:
  528. * Num Local control/mgmt frames (MSDUs) done
  529. * It includes all local ctrl/mgmt completions
  530. * (acked, no ack, flush, TTL, etc)
  531. */
  532. A_UINT32 local_ctrl_mgmt_freed;
  533. /* Num Local data frames (MSDUs) queued */
  534. A_UINT32 local_data_enqued;
  535. /* local_data_freed:
  536. * Num Local data frames (MSDUs) done
  537. * It includes all local data completions
  538. * (acked, no ack, flush, TTL, etc)
  539. */
  540. A_UINT32 local_data_freed;
  541. /* Num MPDUs tried by SW */
  542. A_UINT32 mpdu_tried;
  543. /* Num of waiting seq posted in isr completion handler */
  544. A_UINT32 isr_wait_seq_posted;
  545. A_UINT32 tx_active_dur_us_low;
  546. A_UINT32 tx_active_dur_us_high;
  547. /* Number of MPDUs dropped after max retries */
  548. A_UINT32 remove_mpdus_max_retries;
  549. /* Num HTT cookies dispatched */
  550. A_UINT32 comp_delivered;
  551. /* successful ppdu transmissions */
  552. A_UINT32 ppdu_ok;
  553. /* Scheduler self triggers */
  554. A_UINT32 self_triggers;
  555. /* FES duration of last tx data PPDU in us (sch_eval_end - ppdu_start) */
  556. A_UINT32 tx_time_dur_data;
  557. /* Num of times sequence terminated due to ppdu duration < burst limit */
  558. A_UINT32 seq_qdepth_repost_stop;
  559. /* Num of times MU sequence terminated due to MSDUs reaching threshold */
  560. A_UINT32 mu_seq_min_msdu_repost_stop;
  561. /* Num of times SU sequence terminated due to MSDUs reaching threshold */
  562. A_UINT32 seq_min_msdu_repost_stop;
  563. /* Num of times sequence terminated due to no TXOP available */
  564. A_UINT32 seq_txop_repost_stop;
  565. /* Num of times the next sequence got cancelled */
  566. A_UINT32 next_seq_cancel;
  567. /* Num of times fes offset was misaligned */
  568. A_UINT32 fes_offsets_err_cnt;
  569. } htt_tx_pdev_stats_cmn_tlv;
  570. #define HTT_TX_PDEV_STATS_URRN_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  571. /* NOTE: Variable length TLV, use length spec to infer array size */
  572. typedef struct {
  573. htt_tlv_hdr_t tlv_hdr;
  574. A_UINT32 urrn_stats[1]; /* HTT_TX_PDEV_MAX_URRN_STATS */
  575. } htt_tx_pdev_stats_urrn_tlv_v;
  576. #define HTT_TX_PDEV_STATS_FLUSH_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  577. /* NOTE: Variable length TLV, use length spec to infer array size */
  578. typedef struct {
  579. htt_tlv_hdr_t tlv_hdr;
  580. A_UINT32 flush_errs[1]; /* HTT_TX_PDEV_MAX_FLUSH_REASON_STATS */
  581. } htt_tx_pdev_stats_flush_tlv_v;
  582. #define HTT_TX_PDEV_STATS_SIFS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  583. /* NOTE: Variable length TLV, use length spec to infer array size */
  584. typedef struct {
  585. htt_tlv_hdr_t tlv_hdr;
  586. A_UINT32 sifs_status[1]; /* HTT_TX_PDEV_MAX_SIFS_BURST_STATS */
  587. } htt_tx_pdev_stats_sifs_tlv_v;
  588. #define HTT_TX_PDEV_STATS_PHY_ERR_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  589. /* NOTE: Variable length TLV, use length spec to infer array size */
  590. typedef struct {
  591. htt_tlv_hdr_t tlv_hdr;
  592. A_UINT32 phy_errs[1]; /* HTT_TX_PDEV_MAX_PHY_ERR_STATS */
  593. } htt_tx_pdev_stats_phy_err_tlv_v;
  594. #define HTT_TX_PDEV_STATS_SIFS_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  595. /* NOTE: Variable length TLV, use length spec to infer array size */
  596. typedef struct {
  597. htt_tlv_hdr_t tlv_hdr;
  598. A_UINT32 sifs_hist_status[1]; /* HTT_TX_PDEV_SIFS_BURST_HIST_STATS */
  599. } htt_tx_pdev_stats_sifs_hist_tlv_v;
  600. typedef struct {
  601. htt_tlv_hdr_t tlv_hdr;
  602. A_UINT32 num_data_ppdus_legacy_su;
  603. A_UINT32 num_data_ppdus_ac_su;
  604. A_UINT32 num_data_ppdus_ax_su;
  605. A_UINT32 num_data_ppdus_ac_su_txbf;
  606. A_UINT32 num_data_ppdus_ax_su_txbf;
  607. } htt_tx_pdev_stats_tx_ppdu_stats_tlv_v;
  608. #define HTT_TX_PDEV_STATS_TRIED_MPDU_CNT_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  609. /* NOTE: Variable length TLV, use length spec to infer array size .
  610. *
  611. * Tried_mpdu_cnt_hist is the histogram of MPDUs tries per HWQ.
  612. * The tries here is the count of the MPDUS within a PPDU that the
  613. * HW had attempted to transmit on air, for the HWSCH Schedule
  614. * command submitted by FW.It is not the retry attempts.
  615. * The histogram bins are 0-29, 30-59, 60-89 and so on. The are
  616. * 10 bins in this histogram. They are defined in FW using the
  617. * following macros
  618. * #define WAL_MAX_TRIED_MPDU_CNT_HISTOGRAM 9
  619. * #define WAL_TRIED_MPDU_CNT_HISTOGRAM_INTERVAL 30
  620. *
  621. */
  622. typedef struct {
  623. htt_tlv_hdr_t tlv_hdr;
  624. A_UINT32 hist_bin_size;
  625. A_UINT32 tried_mpdu_cnt_hist[1]; /* HTT_TX_PDEV_TRIED_MPDU_CNT_HIST */
  626. } htt_tx_pdev_stats_tried_mpdu_cnt_hist_tlv_v;
  627. /* STATS_TYPE: HTT_DBG_EXT_STATS_PDEV_TX
  628. * TLV_TAGS:
  629. * - HTT_STATS_TX_PDEV_CMN_TAG
  630. * - HTT_STATS_TX_PDEV_URRN_TAG
  631. * - HTT_STATS_TX_PDEV_SIFS_TAG
  632. * - HTT_STATS_TX_PDEV_FLUSH_TAG
  633. * - HTT_STATS_TX_PDEV_PHY_ERR_TAG
  634. * - HTT_STATS_TX_PDEV_SIFS_HIST_TAG
  635. * - HTT_STATS_TX_PDEV_TX_PPDU_STATS_TAG
  636. * - HTT_STATS_TX_PDEV_TRIED_MPDU_CNT_HIST_TAG
  637. */
  638. /* NOTE:
  639. * This structure is for documentation, and cannot be safely used directly.
  640. * Instead, use the constituent TLV structures to fill/parse.
  641. */
  642. typedef struct _htt_tx_pdev_stats {
  643. htt_tx_pdev_stats_cmn_tlv cmn_tlv;
  644. htt_tx_pdev_stats_urrn_tlv_v underrun_tlv;
  645. htt_tx_pdev_stats_sifs_tlv_v sifs_tlv;
  646. htt_tx_pdev_stats_flush_tlv_v flush_tlv;
  647. htt_tx_pdev_stats_phy_err_tlv_v phy_err_tlv;
  648. htt_tx_pdev_stats_sifs_hist_tlv_v sifs_hist_tlv;
  649. htt_tx_pdev_stats_tx_ppdu_stats_tlv_v tx_su_tlv;
  650. htt_tx_pdev_stats_tried_mpdu_cnt_hist_tlv_v tried_mpdu_cnt_hist_tlv;
  651. } htt_tx_pdev_stats_t;
  652. /* == SOC ERROR STATS == */
  653. /* =============== PDEV ERROR STATS ============== */
  654. #define HTT_STATS_MAX_HW_INTR_NAME_LEN 8
  655. typedef struct {
  656. htt_tlv_hdr_t tlv_hdr;
  657. /* Stored as little endian */
  658. A_UINT8 hw_intr_name[HTT_STATS_MAX_HW_INTR_NAME_LEN];
  659. A_UINT32 mask;
  660. A_UINT32 count;
  661. } htt_hw_stats_intr_misc_tlv;
  662. #define HTT_STATS_MAX_HW_MODULE_NAME_LEN 8
  663. typedef struct {
  664. htt_tlv_hdr_t tlv_hdr;
  665. /* Stored as little endian */
  666. A_UINT8 hw_module_name[HTT_STATS_MAX_HW_MODULE_NAME_LEN];
  667. A_UINT32 count;
  668. } htt_hw_stats_wd_timeout_tlv;
  669. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_M 0x000000ff
  670. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_S 0
  671. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_GET(_var) \
  672. (((_var) & HTT_HW_STATS_PDEV_ERRS_MAC_ID_M) >> \
  673. HTT_HW_STATS_PDEV_ERRS_MAC_ID_S)
  674. #define HTT_HW_STATS_PDEV_ERRS_MAC_ID_SET(_var, _val) \
  675. do { \
  676. HTT_CHECK_SET_VAL(HTT_HW_STATS_PDEV_ERRS_MAC_ID, _val); \
  677. ((_var) |= ((_val) << HTT_HW_STATS_PDEV_ERRS_MAC_ID_S)); \
  678. } while (0)
  679. typedef struct {
  680. htt_tlv_hdr_t tlv_hdr;
  681. /* BIT [ 7 : 0] :- mac_id
  682. * BIT [31 : 8] :- reserved
  683. */
  684. A_UINT32 mac_id__word;
  685. A_UINT32 tx_abort;
  686. A_UINT32 tx_abort_fail_count;
  687. A_UINT32 rx_abort;
  688. A_UINT32 rx_abort_fail_count;
  689. A_UINT32 warm_reset;
  690. A_UINT32 cold_reset;
  691. A_UINT32 tx_flush;
  692. A_UINT32 tx_glb_reset;
  693. A_UINT32 tx_txq_reset;
  694. A_UINT32 rx_timeout_reset;
  695. A_UINT32 mac_cold_reset_restore_cal;
  696. A_UINT32 mac_cold_reset;
  697. A_UINT32 mac_warm_reset;
  698. A_UINT32 mac_only_reset;
  699. A_UINT32 phy_warm_reset;
  700. A_UINT32 phy_warm_reset_ucode_trig;
  701. A_UINT32 mac_warm_reset_restore_cal;
  702. A_UINT32 mac_sfm_reset;
  703. A_UINT32 phy_warm_reset_m3_ssr;
  704. A_UINT32 phy_warm_reset_reason_phy_m3;
  705. A_UINT32 phy_warm_reset_reason_tx_hw_stuck;
  706. A_UINT32 phy_warm_reset_reason_num_cca_rx_frame_stuck;
  707. A_UINT32 phy_warm_reset_reason_wal_rx_recovery_rst_rx_busy;
  708. A_UINT32 phy_warm_reset_reason_wal_rx_recovery_rst_mac_hang;
  709. A_UINT32 phy_warm_reset_reason_mac_reset_converted_phy_reset;
  710. A_UINT32 wal_rx_recovery_rst_mac_hang_count;
  711. A_UINT32 wal_rx_recovery_rst_known_sig_count;
  712. A_UINT32 wal_rx_recovery_rst_no_rx_count;
  713. A_UINT32 wal_rx_recovery_rst_no_rx_consecutive_count;
  714. A_UINT32 wal_rx_recovery_rst_rx_busy_count;
  715. A_UINT32 wal_rx_recovery_rst_phy_mac_hang_count;
  716. } htt_hw_stats_pdev_errs_tlv;
  717. typedef struct {
  718. htt_tlv_hdr_t tlv_hdr;
  719. /* BIT [ 7 : 0] :- mac_id
  720. * BIT [31 : 8] :- reserved
  721. */
  722. A_UINT32 mac_id__word;
  723. A_UINT32 last_unpause_ppdu_id;
  724. A_UINT32 hwsch_unpause_wait_tqm_write;
  725. A_UINT32 hwsch_dummy_tlv_skipped;
  726. A_UINT32 hwsch_misaligned_offset_received;
  727. A_UINT32 hwsch_reset_count;
  728. A_UINT32 hwsch_dev_reset_war;
  729. A_UINT32 hwsch_delayed_pause;
  730. A_UINT32 hwsch_long_delayed_pause;
  731. A_UINT32 sch_rx_ppdu_no_response;
  732. A_UINT32 sch_selfgen_response;
  733. A_UINT32 sch_rx_sifs_resp_trigger;
  734. } htt_hw_stats_whal_tx_tlv;
  735. typedef struct {
  736. htt_tlv_hdr_t tlv_hdr;
  737. /* BIT [ 7 : 0] :- mac_id
  738. * BIT [31 : 8] :- reserved
  739. */
  740. union {
  741. struct {
  742. A_UINT32 mac_id: 8,
  743. reserved: 24;
  744. };
  745. A_UINT32 mac_id__word;
  746. };
  747. /*
  748. * hw_wars is a variable-length array, with each element counting
  749. * the number of occurrences of the corresponding type of HW WAR.
  750. * That is, hw_wars[0] indicates how many times HW WAR 0 occurred,
  751. * hw_wars[1] indicates how many times HW WAR 1 occurred, etc.
  752. * The target has an internal HW WAR mapping that it uses to keep
  753. * track of which HW WAR is WAR 0, which HW WAR is WAR 1, etc.
  754. */
  755. A_UINT32 hw_wars[1/*or more*/];
  756. } htt_hw_war_stats_tlv;
  757. /* STATS_TYPE: HTT_DBG_EXT_STATS_PDEV_ERROR
  758. * TLV_TAGS:
  759. * - HTT_STATS_HW_PDEV_ERRS_TAG
  760. * - HTT_STATS_HW_INTR_MISC_TAG (multiple)
  761. * - HTT_STATS_HW_WD_TIMEOUT_TAG (multiple)
  762. * - HTT_STATS_WHAL_TX_TAG
  763. * - HTT_STATS_HW_WAR_TAG
  764. */
  765. /* NOTE:
  766. * This structure is for documentation, and cannot be safely used directly.
  767. * Instead, use the constituent TLV structures to fill/parse.
  768. */
  769. typedef struct _htt_pdev_err_stats {
  770. htt_hw_stats_pdev_errs_tlv pdev_errs;
  771. htt_hw_stats_intr_misc_tlv misc_stats[1];
  772. htt_hw_stats_wd_timeout_tlv wd_timeout[1];
  773. htt_hw_stats_whal_tx_tlv whal_tx_stats;
  774. htt_hw_war_stats_tlv hw_war;
  775. } htt_hw_err_stats_t;
  776. /* ============ PEER STATS ============ */
  777. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_M 0x0000ffff
  778. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_S 0
  779. #define HTT_MSDU_FLOW_STATS_TID_NUM_M 0x000f0000
  780. #define HTT_MSDU_FLOW_STATS_TID_NUM_S 16
  781. #define HTT_MSDU_FLOW_STATS_DROP_M 0x00100000
  782. #define HTT_MSDU_FLOW_STATS_DROP_S 20
  783. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_GET(_var) \
  784. (((_var) & HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_M) >> \
  785. HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_S)
  786. #define HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_SET(_var, _val) \
  787. do { \
  788. HTT_CHECK_SET_VAL(HTT_MSDU_FLOW_STATS_TX_FLOW_NUM, _val); \
  789. ((_var) |= ((_val) << HTT_MSDU_FLOW_STATS_TX_FLOW_NUM_S)); \
  790. } while (0)
  791. #define HTT_MSDU_FLOW_STATS_TID_NUM_GET(_var) \
  792. (((_var) & HTT_MSDU_FLOW_STATS_TID_NUM_M) >> \
  793. HTT_MSDU_FLOW_STATS_TID_NUM_S)
  794. #define HTT_MSDU_FLOW_STATS_TID_NUM_SET(_var, _val) \
  795. do { \
  796. HTT_CHECK_SET_VAL(HTT_MSDU_FLOW_STATS_TID_NUM, _val); \
  797. ((_var) |= ((_val) << HTT_MSDU_FLOW_STATS_TID_NUM_S)); \
  798. } while (0)
  799. #define HTT_MSDU_FLOW_STATS_DROP_GET(_var) \
  800. (((_var) & HTT_MSDU_FLOW_STATS_DROP_M) >> \
  801. HTT_MSDU_FLOW_STATS_DROP_S)
  802. #define HTT_MSDU_FLOW_STATS_DROP_SET(_var, _val) \
  803. do { \
  804. HTT_CHECK_SET_VAL(HTT_MSDU_FLOW_STATS_DROP, _val); \
  805. ((_var) |= ((_val) << HTT_MSDU_FLOW_STATS_DROP_S)); \
  806. } while (0)
  807. typedef struct _htt_msdu_flow_stats_tlv {
  808. htt_tlv_hdr_t tlv_hdr;
  809. A_UINT32 last_update_timestamp;
  810. A_UINT32 last_add_timestamp;
  811. A_UINT32 last_remove_timestamp;
  812. A_UINT32 total_processed_msdu_count;
  813. A_UINT32 cur_msdu_count_in_flowq;
  814. A_UINT32 sw_peer_id; /* This will help to find which peer_id is stuck state */
  815. /* BIT [15 : 0] :- tx_flow_number
  816. * BIT [19 : 16] :- tid_num
  817. * BIT [20 : 20] :- drop_rule
  818. * BIT [31 : 21] :- reserved
  819. */
  820. A_UINT32 tx_flow_no__tid_num__drop_rule;
  821. A_UINT32 last_cycle_enqueue_count;
  822. A_UINT32 last_cycle_dequeue_count;
  823. A_UINT32 last_cycle_drop_count;
  824. /* BIT [15 : 0] :- current_drop_th
  825. * BIT [31 : 16] :- reserved
  826. */
  827. A_UINT32 current_drop_th;
  828. } htt_msdu_flow_stats_tlv;
  829. #define MAX_HTT_TID_NAME 8
  830. /* DWORD sw_peer_id__tid_num */
  831. #define HTT_TX_TID_STATS_SW_PEER_ID_M 0x0000ffff
  832. #define HTT_TX_TID_STATS_SW_PEER_ID_S 0
  833. #define HTT_TX_TID_STATS_TID_NUM_M 0xffff0000
  834. #define HTT_TX_TID_STATS_TID_NUM_S 16
  835. #define HTT_TX_TID_STATS_SW_PEER_ID_GET(_var) \
  836. (((_var) & HTT_TX_TID_STATS_SW_PEER_ID_M) >> \
  837. HTT_TX_TID_STATS_SW_PEER_ID_S)
  838. #define HTT_TX_TID_STATS_SW_PEER_ID_SET(_var, _val) \
  839. do { \
  840. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_SW_PEER_ID, _val); \
  841. ((_var) |= ((_val) << HTT_TX_TID_STATS_SW_PEER_ID_S)); \
  842. } while (0)
  843. #define HTT_TX_TID_STATS_TID_NUM_GET(_var) \
  844. (((_var) & HTT_TX_TID_STATS_TID_NUM_M) >> \
  845. HTT_TX_TID_STATS_TID_NUM_S)
  846. #define HTT_TX_TID_STATS_TID_NUM_SET(_var, _val) \
  847. do { \
  848. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_TID_NUM, _val); \
  849. ((_var) |= ((_val) << HTT_TX_TID_STATS_TID_NUM_S)); \
  850. } while (0)
  851. /* DWORD num_sched_pending__num_ppdu_in_hwq */
  852. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_M 0x000000ff
  853. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_S 0
  854. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_M 0x0000ff00
  855. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_S 8
  856. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_GET(_var) \
  857. (((_var) & HTT_TX_TID_STATS_NUM_SCHED_PENDING_M) >> \
  858. HTT_TX_TID_STATS_NUM_SCHED_PENDING_S)
  859. #define HTT_TX_TID_STATS_NUM_SCHED_PENDING_SET(_var, _val) \
  860. do { \
  861. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_NUM_SCHED_PENDING, _val); \
  862. ((_var) |= ((_val) << HTT_TX_TID_STATS_NUM_SCHED_PENDING_S)); \
  863. } while (0)
  864. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_GET(_var) \
  865. (((_var) & HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_M) >> \
  866. HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_S)
  867. #define HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_SET(_var, _val) \
  868. do { \
  869. HTT_CHECK_SET_VAL(HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ, _val); \
  870. ((_var) |= ((_val) << HTT_TX_TID_STATS_NUM_PPDU_IN_HWQ_S)); \
  871. } while (0)
  872. /* Tidq stats */
  873. typedef struct _htt_tx_tid_stats_tlv {
  874. htt_tlv_hdr_t tlv_hdr;
  875. /* Stored as little endian */
  876. A_UINT8 tid_name[MAX_HTT_TID_NAME];
  877. /* BIT [15 : 0] :- sw_peer_id
  878. * BIT [31 : 16] :- tid_num
  879. */
  880. A_UINT32 sw_peer_id__tid_num;
  881. /* BIT [ 7 : 0] :- num_sched_pending
  882. * BIT [15 : 8] :- num_ppdu_in_hwq
  883. * BIT [31 : 16] :- reserved
  884. */
  885. A_UINT32 num_sched_pending__num_ppdu_in_hwq;
  886. A_UINT32 tid_flags;
  887. /* per tid # of hw_queued ppdu.*/
  888. A_UINT32 hw_queued;
  889. /* number of per tid successful PPDU. */
  890. A_UINT32 hw_reaped;
  891. /* per tid Num MPDUs filtered by HW */
  892. A_UINT32 mpdus_hw_filter;
  893. A_UINT32 qdepth_bytes;
  894. A_UINT32 qdepth_num_msdu;
  895. A_UINT32 qdepth_num_mpdu;
  896. A_UINT32 last_scheduled_tsmp;
  897. A_UINT32 pause_module_id;
  898. A_UINT32 block_module_id;
  899. /* tid tx airtime in sec */
  900. A_UINT32 tid_tx_airtime;
  901. } htt_tx_tid_stats_tlv;
  902. /* Tidq stats */
  903. typedef struct _htt_tx_tid_stats_v1_tlv {
  904. htt_tlv_hdr_t tlv_hdr;
  905. /* Stored as little endian */
  906. A_UINT8 tid_name[MAX_HTT_TID_NAME];
  907. /* BIT [15 : 0] :- sw_peer_id
  908. * BIT [31 : 16] :- tid_num
  909. */
  910. A_UINT32 sw_peer_id__tid_num;
  911. /* BIT [ 7 : 0] :- num_sched_pending
  912. * BIT [15 : 8] :- num_ppdu_in_hwq
  913. * BIT [31 : 16] :- reserved
  914. */
  915. A_UINT32 num_sched_pending__num_ppdu_in_hwq;
  916. A_UINT32 tid_flags;
  917. /* Max qdepth in bytes reached by this tid*/
  918. A_UINT32 max_qdepth_bytes;
  919. /* number of msdus qdepth reached max */
  920. A_UINT32 max_qdepth_n_msdus;
  921. /* Made reserved this field */
  922. A_UINT32 rsvd;
  923. A_UINT32 qdepth_bytes;
  924. A_UINT32 qdepth_num_msdu;
  925. A_UINT32 qdepth_num_mpdu;
  926. A_UINT32 last_scheduled_tsmp;
  927. A_UINT32 pause_module_id;
  928. A_UINT32 block_module_id;
  929. /* tid tx airtime in sec */
  930. A_UINT32 tid_tx_airtime;
  931. A_UINT32 allow_n_flags;
  932. /* BIT [15 : 0] :- sendn_frms_allowed
  933. * BIT [31 : 16] :- reserved
  934. */
  935. A_UINT32 sendn_frms_allowed;
  936. } htt_tx_tid_stats_v1_tlv;
  937. #define HTT_RX_TID_STATS_SW_PEER_ID_M 0x0000ffff
  938. #define HTT_RX_TID_STATS_SW_PEER_ID_S 0
  939. #define HTT_RX_TID_STATS_TID_NUM_M 0xffff0000
  940. #define HTT_RX_TID_STATS_TID_NUM_S 16
  941. #define HTT_RX_TID_STATS_SW_PEER_ID_GET(_var) \
  942. (((_var) & HTT_RX_TID_STATS_SW_PEER_ID_M) >> \
  943. HTT_RX_TID_STATS_SW_PEER_ID_S)
  944. #define HTT_RX_TID_STATS_SW_PEER_ID_SET(_var, _val) \
  945. do { \
  946. HTT_CHECK_SET_VAL(HTT_RX_TID_STATS_SW_PEER_ID, _val); \
  947. ((_var) |= ((_val) << HTT_RX_TID_STATS_SW_PEER_ID_S)); \
  948. } while (0)
  949. #define HTT_RX_TID_STATS_TID_NUM_GET(_var) \
  950. (((_var) & HTT_RX_TID_STATS_TID_NUM_M) >> \
  951. HTT_RX_TID_STATS_TID_NUM_S)
  952. #define HTT_RX_TID_STATS_TID_NUM_SET(_var, _val) \
  953. do { \
  954. HTT_CHECK_SET_VAL(HTT_RX_TID_STATS_TID_NUM, _val); \
  955. ((_var) |= ((_val) << HTT_RX_TID_STATS_TID_NUM_S)); \
  956. } while (0)
  957. typedef struct _htt_rx_tid_stats_tlv {
  958. htt_tlv_hdr_t tlv_hdr;
  959. /* BIT [15 : 0] : sw_peer_id
  960. * BIT [31 : 16] : tid_num
  961. */
  962. A_UINT32 sw_peer_id__tid_num;
  963. /* Stored as little endian */
  964. A_UINT8 tid_name[MAX_HTT_TID_NAME];
  965. /* dup_in_reorder not collected per tid for now,
  966. as there is no wal_peer back ptr in data rx peer. */
  967. A_UINT32 dup_in_reorder;
  968. A_UINT32 dup_past_outside_window;
  969. A_UINT32 dup_past_within_window;
  970. /* Number of per tid MSDUs with flag of decrypt_err */
  971. A_UINT32 rxdesc_err_decrypt;
  972. /* tid rx airtime in sec */
  973. A_UINT32 tid_rx_airtime;
  974. } htt_rx_tid_stats_tlv;
  975. #define HTT_MAX_COUNTER_NAME 8
  976. typedef struct {
  977. htt_tlv_hdr_t tlv_hdr;
  978. /* Stored as little endian */
  979. A_UINT8 counter_name[HTT_MAX_COUNTER_NAME];
  980. A_UINT32 count;
  981. } htt_counter_tlv;
  982. typedef struct {
  983. htt_tlv_hdr_t tlv_hdr;
  984. /* Number of rx ppdu. */
  985. A_UINT32 ppdu_cnt;
  986. /* Number of rx mpdu. */
  987. A_UINT32 mpdu_cnt;
  988. /* Number of rx msdu */
  989. A_UINT32 msdu_cnt;
  990. /* Pause bitmap */
  991. A_UINT32 pause_bitmap;
  992. /* Block bitmap */
  993. A_UINT32 block_bitmap;
  994. /* Current timestamp */
  995. A_UINT32 current_timestamp;
  996. /* Peer cumulative tx airtime in sec */
  997. A_UINT32 peer_tx_airtime;
  998. /* Peer cumulative rx airtime in sec */
  999. A_UINT32 peer_rx_airtime;
  1000. /* Peer current rssi in dBm */
  1001. A_INT32 rssi;
  1002. /* Total enqueued, dequeued and dropped msdu's for peer */
  1003. A_UINT32 peer_enqueued_count_low;
  1004. A_UINT32 peer_enqueued_count_high;
  1005. A_UINT32 peer_dequeued_count_low;
  1006. A_UINT32 peer_dequeued_count_high;
  1007. A_UINT32 peer_dropped_count_low;
  1008. A_UINT32 peer_dropped_count_high;
  1009. /* Total ppdu transmitted bytes for peer: includes MAC header overhead */
  1010. A_UINT32 ppdu_transmitted_bytes_low;
  1011. A_UINT32 ppdu_transmitted_bytes_high;
  1012. A_UINT32 peer_ttl_removed_count;
  1013. /* inactive_time
  1014. * Running duration of the time since last tx/rx activity by this peer,
  1015. * units = seconds.
  1016. * If the peer is currently active, this inactive_time will be 0x0.
  1017. */
  1018. A_UINT32 inactive_time;
  1019. /* Number of MPDUs dropped after max retries */
  1020. A_UINT32 remove_mpdus_max_retries;
  1021. } htt_peer_stats_cmn_tlv;
  1022. typedef struct {
  1023. htt_tlv_hdr_t tlv_hdr;
  1024. /* This enum type of HTT_PEER_TYPE */
  1025. A_UINT32 peer_type;
  1026. A_UINT32 sw_peer_id;
  1027. /* BIT [7 : 0] :- vdev_id
  1028. * BIT [15 : 8] :- pdev_id
  1029. * BIT [31 : 16] :- ast_indx
  1030. */
  1031. A_UINT32 vdev_pdev_ast_idx;
  1032. htt_mac_addr mac_addr;
  1033. A_UINT32 peer_flags;
  1034. A_UINT32 qpeer_flags;
  1035. } htt_peer_details_tlv;
  1036. typedef enum {
  1037. HTT_STATS_PREAM_OFDM,
  1038. HTT_STATS_PREAM_CCK,
  1039. HTT_STATS_PREAM_HT,
  1040. HTT_STATS_PREAM_VHT,
  1041. HTT_STATS_PREAM_HE,
  1042. HTT_STATS_PREAM_RSVD,
  1043. HTT_STATS_PREAM_RSVD1,
  1044. HTT_STATS_PREAM_COUNT,
  1045. } HTT_STATS_PREAM_TYPE;
  1046. #define HTT_TX_PEER_STATS_NUM_MCS_COUNTERS 12
  1047. #define HTT_TX_PEER_STATS_NUM_GI_COUNTERS 4
  1048. #define HTT_TX_PEER_STATS_NUM_DCM_COUNTERS 5
  1049. #define HTT_TX_PEER_STATS_NUM_BW_COUNTERS 4
  1050. #define HTT_TX_PEER_STATS_NUM_SPATIAL_STREAMS 8
  1051. #define HTT_TX_PEER_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  1052. typedef struct _htt_tx_peer_rate_stats_tlv {
  1053. htt_tlv_hdr_t tlv_hdr;
  1054. /* Number of tx ldpc packets */
  1055. A_UINT32 tx_ldpc;
  1056. /* Number of tx rts packets */
  1057. A_UINT32 rts_cnt;
  1058. /* RSSI value of last ack packet (units = dB above noise floor) */
  1059. A_UINT32 ack_rssi;
  1060. A_UINT32 tx_mcs[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1061. A_UINT32 tx_su_mcs[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1062. A_UINT32 tx_mu_mcs[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1063. A_UINT32 tx_nss[HTT_TX_PEER_STATS_NUM_SPATIAL_STREAMS]; /* element 0,1, ...7 -> NSS 1,2, ...8 */
  1064. A_UINT32 tx_bw[HTT_TX_PEER_STATS_NUM_BW_COUNTERS]; /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
  1065. A_UINT32 tx_stbc[HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1066. A_UINT32 tx_pream[HTT_TX_PEER_STATS_NUM_PREAMBLE_TYPES];
  1067. /* Counters to track number of tx packets in each GI (400us, 800us, 1600us & 3200us) in each mcs (0-11) */
  1068. A_UINT32 tx_gi[HTT_TX_PEER_STATS_NUM_GI_COUNTERS][HTT_TX_PEER_STATS_NUM_MCS_COUNTERS];
  1069. /* Counters to track packets in dcm mcs (MCS 0, 1, 3, 4) */
  1070. A_UINT32 tx_dcm[HTT_TX_PEER_STATS_NUM_DCM_COUNTERS];
  1071. } htt_tx_peer_rate_stats_tlv;
  1072. #define HTT_RX_PEER_STATS_NUM_MCS_COUNTERS 12
  1073. #define HTT_RX_PEER_STATS_NUM_GI_COUNTERS 4
  1074. #define HTT_RX_PEER_STATS_NUM_DCM_COUNTERS 5
  1075. #define HTT_RX_PEER_STATS_NUM_BW_COUNTERS 4
  1076. #define HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS 8
  1077. #define HTT_RX_PEER_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  1078. typedef struct _htt_rx_peer_rate_stats_tlv {
  1079. htt_tlv_hdr_t tlv_hdr;
  1080. A_UINT32 nsts;
  1081. /* Number of rx ldpc packets */
  1082. A_UINT32 rx_ldpc;
  1083. /* Number of rx rts packets */
  1084. A_UINT32 rts_cnt;
  1085. A_UINT32 rssi_mgmt; /* units = dB above noise floor */
  1086. A_UINT32 rssi_data; /* units = dB above noise floor */
  1087. A_UINT32 rssi_comb; /* units = dB above noise floor */
  1088. A_UINT32 rx_mcs[HTT_RX_PEER_STATS_NUM_MCS_COUNTERS];
  1089. A_UINT32 rx_nss[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS]; /* element 0,1, ...7 -> NSS 1,2, ...8 */
  1090. A_UINT32 rx_dcm[HTT_RX_PEER_STATS_NUM_DCM_COUNTERS];
  1091. A_UINT32 rx_stbc[HTT_RX_PEER_STATS_NUM_MCS_COUNTERS];
  1092. A_UINT32 rx_bw[HTT_RX_PEER_STATS_NUM_BW_COUNTERS]; /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
  1093. A_UINT32 rx_pream[HTT_RX_PEER_STATS_NUM_PREAMBLE_TYPES];
  1094. A_UINT8 rssi_chain[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PEER_STATS_NUM_BW_COUNTERS]; /* units = dB above noise floor */
  1095. /* Counters to track number of rx packets in each GI in each mcs (0-11) */
  1096. A_UINT32 rx_gi[HTT_RX_PEER_STATS_NUM_GI_COUNTERS][HTT_RX_PEER_STATS_NUM_MCS_COUNTERS];
  1097. A_UINT32 rx_ulofdma_non_data_ppdu; /* ppdu level */
  1098. A_UINT32 rx_ulofdma_data_ppdu; /* ppdu level */
  1099. A_UINT32 rx_ulofdma_mpdu_ok; /* mpdu level */
  1100. A_UINT32 rx_ulofdma_mpdu_fail; /* mpdu level */
  1101. A_INT8 rx_ul_fd_rssi[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS]; /* dBm unit */
  1102. /* per_chain_rssi_pkt_type:
  1103. * This field shows what type of rx frame the per-chain RSSI was computed
  1104. * on, by recording the frame type and sub-type as bit-fields within this
  1105. * field:
  1106. * BIT [3 : 0] :- IEEE80211_FC0_TYPE
  1107. * BIT [7 : 4] :- IEEE80211_FC0_SUBTYPE
  1108. * BIT [31 : 8] :- Reserved
  1109. */
  1110. A_UINT32 per_chain_rssi_pkt_type;
  1111. A_INT8 rx_per_chain_rssi_in_dbm[HTT_RX_PEER_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PEER_STATS_NUM_BW_COUNTERS];
  1112. A_UINT32 rx_ulmumimo_non_data_ppdu; /* ppdu level */
  1113. A_UINT32 rx_ulmumimo_data_ppdu; /* ppdu level */
  1114. A_UINT32 rx_ulmumimo_mpdu_ok; /* mpdu level */
  1115. A_UINT32 rx_ulmumimo_mpdu_fail; /* mpdu level */
  1116. } htt_rx_peer_rate_stats_tlv;
  1117. typedef enum {
  1118. HTT_PEER_STATS_REQ_MODE_NO_QUERY,
  1119. HTT_PEER_STATS_REQ_MODE_QUERY_TQM,
  1120. HTT_PEER_STATS_REQ_MODE_FLUSH_TQM,
  1121. } htt_peer_stats_req_mode_t;
  1122. typedef enum {
  1123. HTT_PEER_STATS_CMN_TLV = 0,
  1124. HTT_PEER_DETAILS_TLV = 1,
  1125. HTT_TX_PEER_RATE_STATS_TLV = 2,
  1126. HTT_RX_PEER_RATE_STATS_TLV = 3,
  1127. HTT_TX_TID_STATS_TLV = 4,
  1128. HTT_RX_TID_STATS_TLV = 5,
  1129. HTT_MSDU_FLOW_STATS_TLV = 6,
  1130. HTT_PEER_STATS_MAX_TLV = 31,
  1131. } htt_peer_stats_tlv_enum;
  1132. /* config_param0 */
  1133. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_M 0x00000001
  1134. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_S 0
  1135. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_M 0x0000FFFE
  1136. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_S 1
  1137. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_M 0xFFFF0000
  1138. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_S 16
  1139. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(_var, _val) \
  1140. do { \
  1141. HTT_CHECK_SET_VAL(HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR, _val); \
  1142. ((_var) |= ((_val) << HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_S)); \
  1143. } while (0)
  1144. #define HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_GET(_var) \
  1145. (((_var) & HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_M) >> \
  1146. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_S)
  1147. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_GET(_var) \
  1148. (((_var) & HTT_DBG_EXT_STATS_PEER_REQ_MODE_M) >> \
  1149. HTT_DBG_EXT_STATS_PEER_REQ_MODE_S)
  1150. #define HTT_DBG_EXT_STATS_PEER_REQ_MODE_SET(_var, _val) \
  1151. do { \
  1152. ((_var) |= ((_val) << HTT_DBG_EXT_STATS_PEER_REQ_MODE_S)); \
  1153. } while (0)
  1154. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_GET(_var) \
  1155. (((_var) & HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_M) >> \
  1156. HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_S)
  1157. #define HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_SET(_var, _val) \
  1158. do { \
  1159. ((_var) |= ((_val) << HTT_DBG_EXT_STATS_PEER_INFO_SW_PEER_ID_S)); \
  1160. } while (0)
  1161. /* STATS_TYPE : HTT_DBG_EXT_STATS_PEER_INFO
  1162. * TLV_TAGS:
  1163. * - HTT_STATS_PEER_STATS_CMN_TAG
  1164. * - HTT_STATS_PEER_DETAILS_TAG
  1165. * - HTT_STATS_PEER_TX_RATE_STATS_TAG
  1166. * - HTT_STATS_PEER_RX_RATE_STATS_TAG
  1167. * - HTT_STATS_TX_TID_DETAILS_TAG (multiple) (deprecated, so 0 elements in updated systems)
  1168. * - HTT_STATS_RX_TID_DETAILS_TAG (multiple)
  1169. * - HTT_STATS_PEER_MSDU_FLOWQ_TAG (multiple)
  1170. * - HTT_STATS_TX_TID_DETAILS_V1_TAG (multiple)
  1171. */
  1172. /* NOTE:
  1173. * This structure is for documentation, and cannot be safely used directly.
  1174. * Instead, use the constituent TLV structures to fill/parse.
  1175. */
  1176. typedef struct _htt_peer_stats {
  1177. htt_peer_stats_cmn_tlv cmn_tlv;
  1178. htt_peer_details_tlv peer_details;
  1179. /* from g_rate_info_stats */
  1180. htt_tx_peer_rate_stats_tlv tx_rate;
  1181. htt_rx_peer_rate_stats_tlv rx_rate;
  1182. htt_tx_tid_stats_tlv tx_tid_stats[1];
  1183. htt_rx_tid_stats_tlv rx_tid_stats[1];
  1184. htt_msdu_flow_stats_tlv msdu_flowq[1];
  1185. htt_tx_tid_stats_v1_tlv tx_tid_stats_v1[1];
  1186. } htt_peer_stats_t;
  1187. /* =========== ACTIVE PEER LIST ========== */
  1188. /* STATS_TYPE: HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST
  1189. * TLV_TAGS:
  1190. * - HTT_STATS_PEER_DETAILS_TAG
  1191. */
  1192. /* NOTE:
  1193. * This structure is for documentation, and cannot be safely used directly.
  1194. * Instead, use the constituent TLV structures to fill/parse.
  1195. */
  1196. typedef struct {
  1197. htt_peer_details_tlv peer_details[1];
  1198. } htt_active_peer_details_list_t;
  1199. /* =========== MUMIMO HWQ stats =========== */
  1200. /* MU MIMO stats per hwQ */
  1201. typedef struct {
  1202. htt_tlv_hdr_t tlv_hdr;
  1203. A_UINT32 mu_mimo_sch_posted;
  1204. A_UINT32 mu_mimo_sch_failed;
  1205. A_UINT32 mu_mimo_ppdu_posted;
  1206. } htt_tx_hwq_mu_mimo_sch_stats_tlv;
  1207. typedef struct {
  1208. htt_tlv_hdr_t tlv_hdr;
  1209. A_UINT32 mu_mimo_mpdus_queued_usr; /* Number of mpdus queued per user */
  1210. A_UINT32 mu_mimo_mpdus_tried_usr; /* Number of mpdus actually transmitted by TxPCU per user */
  1211. A_UINT32 mu_mimo_mpdus_failed_usr; /* Number of mpdus failed per user */
  1212. A_UINT32 mu_mimo_mpdus_requeued_usr; /* Number of mpdus requeued per user */
  1213. A_UINT32 mu_mimo_err_no_ba_usr; /* Number of times BA is not received for a user in MU PPDU */
  1214. A_UINT32 mu_mimo_mpdu_underrun_usr;
  1215. A_UINT32 mu_mimo_ampdu_underrun_usr;
  1216. } htt_tx_hwq_mu_mimo_mpdu_stats_tlv;
  1217. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_M 0x000000ff
  1218. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_S 0
  1219. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_M 0x0000ff00
  1220. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_S 8
  1221. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_GET(_var) \
  1222. (((_var) & HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_M) >> \
  1223. HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_S)
  1224. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_SET(_var, _val) \
  1225. do { \
  1226. HTT_CHECK_SET_VAL(HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID, _val); \
  1227. ((_var) |= ((_val) << HTT_TX_HWQ_MU_MIMO_CMN_STATS_MAC_ID_S)); \
  1228. } while (0)
  1229. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_GET(_var) \
  1230. (((_var) & HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_M) >> \
  1231. HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_S)
  1232. #define HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_SET(_var, _val) \
  1233. do { \
  1234. HTT_CHECK_SET_VAL(HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID, _val); \
  1235. ((_var) |= ((_val) << HTT_TX_HWQ_MU_MIMO_CMN_STATS_HWQ_ID_S)); \
  1236. } while (0)
  1237. typedef struct {
  1238. htt_tlv_hdr_t tlv_hdr;
  1239. /* BIT [ 7 : 0] :- mac_id
  1240. * BIT [15 : 8] :- hwq_id
  1241. * BIT [31 : 16] :- reserved
  1242. */
  1243. A_UINT32 mac_id__hwq_id__word;
  1244. } htt_tx_hwq_mu_mimo_cmn_stats_tlv;
  1245. /* NOTE:
  1246. * This structure is for documentation, and cannot be safely used directly.
  1247. * Instead, use the constituent TLV structures to fill/parse.
  1248. */
  1249. typedef struct {
  1250. struct _hwq_mu_mimo_stats {
  1251. htt_tx_hwq_mu_mimo_cmn_stats_tlv cmn_tlv;
  1252. htt_tx_hwq_mu_mimo_sch_stats_tlv mu_mimo_sch_stats_tlv[1]; /* WAL_TX_STATS_MAX_GROUP_SIZE */
  1253. htt_tx_hwq_mu_mimo_mpdu_stats_tlv mu_mimo_mpdu_stats_tlv[1]; /* WAL_TX_STATS_TX_MAX_NUM_USERS */
  1254. } hwq[1];
  1255. } htt_tx_hwq_mu_mimo_stats_t;
  1256. /* == TX HWQ STATS == */
  1257. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_M 0x000000ff
  1258. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_S 0
  1259. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_M 0x0000ff00
  1260. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_S 8
  1261. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_GET(_var) \
  1262. (((_var) & HTT_TX_HWQ_STATS_CMN_MAC_ID_M) >> \
  1263. HTT_TX_HWQ_STATS_CMN_MAC_ID_S)
  1264. #define HTT_TX_HWQ_STATS_CMN_MAC_ID_SET(_var, _val) \
  1265. do { \
  1266. HTT_CHECK_SET_VAL(HTT_TX_HWQ_STATS_CMN_MAC_ID, _val); \
  1267. ((_var) |= ((_val) << HTT_TX_HWQ_STATS_CMN_MAC_ID_S)); \
  1268. } while (0)
  1269. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_GET(_var) \
  1270. (((_var) & HTT_TX_HWQ_STATS_CMN_HWQ_ID_M) >> \
  1271. HTT_TX_HWQ_STATS_CMN_HWQ_ID_S)
  1272. #define HTT_TX_HWQ_STATS_CMN_HWQ_ID_SET(_var, _val) \
  1273. do { \
  1274. HTT_CHECK_SET_VAL(HTT_TX_HWQ_STATS_CMN_HWQ_ID, _val); \
  1275. ((_var) |= ((_val) << HTT_TX_HWQ_STATS_CMN_HWQ_ID_S)); \
  1276. } while (0)
  1277. typedef struct {
  1278. htt_tlv_hdr_t tlv_hdr;
  1279. /* BIT [ 7 : 0] :- mac_id
  1280. * BIT [15 : 8] :- hwq_id
  1281. * BIT [31 : 16] :- reserved
  1282. */
  1283. A_UINT32 mac_id__hwq_id__word;
  1284. /* PPDU level stats */
  1285. A_UINT32 xretry; /* Number of times ack is failed for the PPDU scheduled on this txQ */
  1286. A_UINT32 underrun_cnt; /* Number of times sched cmd status reported mpdu underrun */
  1287. A_UINT32 flush_cnt; /* Number of times sched cmd is flushed */
  1288. A_UINT32 filt_cnt; /* Number of times sched cmd is filtered */
  1289. A_UINT32 null_mpdu_bmap; /* Number of times HWSCH uploaded null mpdu bitmap */
  1290. A_UINT32 user_ack_failure; /* Number of time user ack or ba tlv is not seen on FES ring where it is expected to be */
  1291. A_UINT32 ack_tlv_proc; /* Number of times TQM processed ack tlv received from HWSCH */
  1292. A_UINT32 sched_id_proc; /* Cache latest processed scheduler ID received from ack ba tlv */
  1293. A_UINT32 null_mpdu_tx_count; /* Number of times TxPCU reported mpdus transmitted for a user is zero */
  1294. A_UINT32 mpdu_bmap_not_recvd; /* Number of times SW did not see any mpdu info bitmap tlv on FES status ring */
  1295. /* Selfgen stats per hwQ */
  1296. A_UINT32 num_bar; /* Number of SU/MU BAR frames posted to hwQ */
  1297. A_UINT32 rts; /* Number of RTS frames posted to hwQ */
  1298. A_UINT32 cts2self; /* Number of cts2self frames posted to hwQ */
  1299. A_UINT32 qos_null; /* Number of qos null frames posted to hwQ */
  1300. /* MPDU level stats */
  1301. A_UINT32 mpdu_tried_cnt; /* mpdus tried Tx by HWSCH/TQM */
  1302. A_UINT32 mpdu_queued_cnt; /* mpdus queued to HWSCH */
  1303. A_UINT32 mpdu_ack_fail_cnt; /* mpdus tried but ack was not received */
  1304. A_UINT32 mpdu_filt_cnt; /* This will include sched cmd flush and time based discard */
  1305. A_UINT32 false_mpdu_ack_count; /* Number of MPDUs for which ACK was sucessful but no Tx happened */
  1306. A_UINT32 txq_timeout; /* Number of times txq timeout happened */
  1307. } htt_tx_hwq_stats_cmn_tlv;
  1308. #define HTT_TX_HWQ_DIFS_LATENCY_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) + /* hist_intvl */ \
  1309. (sizeof(A_UINT32) * (_num_elems)))
  1310. /* NOTE: Variable length TLV, use length spec to infer array size */
  1311. typedef struct {
  1312. htt_tlv_hdr_t tlv_hdr;
  1313. A_UINT32 hist_intvl;
  1314. /* histogram of ppdu post to hwsch - > cmd status received */
  1315. A_UINT32 difs_latency_hist[1]; /* HTT_TX_HWQ_MAX_DIFS_LATENCY_BINS */
  1316. } htt_tx_hwq_difs_latency_stats_tlv_v;
  1317. #define HTT_TX_HWQ_CMD_RESULT_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1318. /* NOTE: Variable length TLV, use length spec to infer array size */
  1319. typedef struct {
  1320. htt_tlv_hdr_t tlv_hdr;
  1321. /* Histogram of sched cmd result */
  1322. A_UINT32 cmd_result[1]; /* HTT_TX_HWQ_MAX_CMD_RESULT_STATS */
  1323. } htt_tx_hwq_cmd_result_stats_tlv_v;
  1324. #define HTT_TX_HWQ_CMD_STALL_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1325. /* NOTE: Variable length TLV, use length spec to infer array size */
  1326. typedef struct {
  1327. htt_tlv_hdr_t tlv_hdr;
  1328. /* Histogram of various pause conitions */
  1329. A_UINT32 cmd_stall_status[1]; /* HTT_TX_HWQ_MAX_CMD_STALL_STATS */
  1330. } htt_tx_hwq_cmd_stall_stats_tlv_v;
  1331. #define HTT_TX_HWQ_FES_RESULT_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1332. /* NOTE: Variable length TLV, use length spec to infer array size */
  1333. typedef struct {
  1334. htt_tlv_hdr_t tlv_hdr;
  1335. /* Histogram of number of user fes result */
  1336. A_UINT32 fes_result[1]; /* HTT_TX_HWQ_MAX_FES_RESULT_STATS */
  1337. } htt_tx_hwq_fes_result_stats_tlv_v;
  1338. #define HTT_TX_HWQ_TRIED_MPDU_CNT_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1339. /* NOTE: Variable length TLV, use length spec to infer array size
  1340. *
  1341. * The hwq_tried_mpdu_cnt_hist is a histogram of MPDUs tries per HWQ.
  1342. * The tries here is the count of the MPDUS within a PPDU that the HW
  1343. * had attempted to transmit on air, for the HWSCH Schedule command
  1344. * submitted by FW in this HWQ .It is not the retry attempts. The
  1345. * histogram bins are 0-29, 30-59, 60-89 and so on. The are 10 bins
  1346. * in this histogram.
  1347. * they are defined in FW using the following macros
  1348. * #define WAL_MAX_TRIED_MPDU_CNT_HISTOGRAM 9
  1349. * #define WAL_TRIED_MPDU_CNT_HISTOGRAM_INTERVAL 30
  1350. *
  1351. * */
  1352. typedef struct {
  1353. htt_tlv_hdr_t tlv_hdr;
  1354. A_UINT32 hist_bin_size;
  1355. /* Histogram of number of mpdus on tried mpdu */
  1356. A_UINT32 tried_mpdu_cnt_hist[1]; /* HTT_TX_HWQ_TRIED_MPDU_CNT_HIST */
  1357. } htt_tx_hwq_tried_mpdu_cnt_hist_tlv_v;
  1358. #define HTT_TX_HWQ_TXOP_USED_CNT_HIST_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1359. /* NOTE: Variable length TLV, use length spec to infer array size
  1360. *
  1361. * The txop_used_cnt_hist is the histogram of txop per burst. After
  1362. * completing the burst, we identify the txop used in the burst and
  1363. * incr the corresponding bin.
  1364. * Each bin represents 1ms & we have 10 bins in this histogram.
  1365. * they are deined in FW using the following macros
  1366. * #define WAL_MAX_TXOP_USED_CNT_HISTOGRAM 10
  1367. * #define WAL_TXOP_USED_HISTOGRAM_INTERVAL 1000 ( 1 ms )
  1368. *
  1369. * */
  1370. typedef struct {
  1371. htt_tlv_hdr_t tlv_hdr;
  1372. /* Histogram of txop used cnt */
  1373. A_UINT32 txop_used_cnt_hist[1]; /* HTT_TX_HWQ_TXOP_USED_CNT_HIST */
  1374. } htt_tx_hwq_txop_used_cnt_hist_tlv_v;
  1375. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_HWQ
  1376. * TLV_TAGS:
  1377. * - HTT_STATS_STRING_TAG
  1378. * - HTT_STATS_TX_HWQ_CMN_TAG
  1379. * - HTT_STATS_TX_HWQ_DIFS_LATENCY_TAG
  1380. * - HTT_STATS_TX_HWQ_CMD_RESULT_TAG
  1381. * - HTT_STATS_TX_HWQ_CMD_STALL_TAG
  1382. * - HTT_STATS_TX_HWQ_FES_STATUS_TAG
  1383. * - HTT_STATS_TX_HWQ_TRIED_MPDU_CNT_HIST_TAG
  1384. * - HTT_STATS_TX_HWQ_TXOP_USED_CNT_HIST_TAG
  1385. */
  1386. /* NOTE:
  1387. * This structure is for documentation, and cannot be safely used directly.
  1388. * Instead, use the constituent TLV structures to fill/parse.
  1389. * General HWQ stats Mechanism:
  1390. * Once the host request for the stats, FW fill all the HWQ TAGS in a buffer
  1391. * for all the HWQ requested. & the FW send the buffer to host. In the
  1392. * buffer the HWQ ID is filled in mac_id__hwq_id, thus identifying each
  1393. * HWQ distinctly.
  1394. */
  1395. typedef struct _htt_tx_hwq_stats {
  1396. htt_stats_string_tlv hwq_str_tlv;
  1397. htt_tx_hwq_stats_cmn_tlv cmn_tlv;
  1398. htt_tx_hwq_difs_latency_stats_tlv_v difs_tlv;
  1399. htt_tx_hwq_cmd_result_stats_tlv_v cmd_result_tlv;
  1400. htt_tx_hwq_cmd_stall_stats_tlv_v cmd_stall_tlv;
  1401. htt_tx_hwq_fes_result_stats_tlv_v fes_stats_tlv;
  1402. htt_tx_hwq_tried_mpdu_cnt_hist_tlv_v tried_mpdu_tlv;
  1403. htt_tx_hwq_txop_used_cnt_hist_tlv_v txop_used_tlv;
  1404. } htt_tx_hwq_stats_t;
  1405. /* == TX SELFGEN STATS == */
  1406. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_M 0x000000ff
  1407. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_S 0
  1408. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_GET(_var) \
  1409. (((_var) & HTT_TX_SELFGEN_CMN_STATS_MAC_ID_M) >> \
  1410. HTT_TX_SELFGEN_CMN_STATS_MAC_ID_S)
  1411. #define HTT_TX_SELFGEN_CMN_STATS_MAC_ID_SET(_var, _val) \
  1412. do { \
  1413. HTT_CHECK_SET_VAL(HTT_TX_SELFGEN_CMN_STATS_MAC_ID, _val); \
  1414. ((_var) |= ((_val) << HTT_TX_SELFGEN_CMN_STATS_MAC_ID_S)); \
  1415. } while (0)
  1416. typedef struct {
  1417. htt_tlv_hdr_t tlv_hdr;
  1418. /* BIT [ 7 : 0] :- mac_id
  1419. * BIT [31 : 8] :- reserved
  1420. */
  1421. A_UINT32 mac_id__word;
  1422. A_UINT32 su_bar;
  1423. A_UINT32 rts;
  1424. A_UINT32 cts2self;
  1425. A_UINT32 qos_null;
  1426. A_UINT32 delayed_bar_1; /* MU user 1 */
  1427. A_UINT32 delayed_bar_2; /* MU user 2 */
  1428. A_UINT32 delayed_bar_3; /* MU user 3 */
  1429. A_UINT32 delayed_bar_4; /* MU user 4 */
  1430. A_UINT32 delayed_bar_5; /* MU user 5 */
  1431. A_UINT32 delayed_bar_6; /* MU user 6 */
  1432. A_UINT32 delayed_bar_7; /* MU user 7 */
  1433. } htt_tx_selfgen_cmn_stats_tlv;
  1434. typedef struct {
  1435. htt_tlv_hdr_t tlv_hdr;
  1436. /* 11AC */
  1437. A_UINT32 ac_su_ndpa;
  1438. A_UINT32 ac_su_ndp;
  1439. A_UINT32 ac_mu_mimo_ndpa;
  1440. A_UINT32 ac_mu_mimo_ndp;
  1441. A_UINT32 ac_mu_mimo_brpoll_1; /* MU user 1 */
  1442. A_UINT32 ac_mu_mimo_brpoll_2; /* MU user 2 */
  1443. A_UINT32 ac_mu_mimo_brpoll_3; /* MU user 3 */
  1444. } htt_tx_selfgen_ac_stats_tlv;
  1445. typedef struct {
  1446. htt_tlv_hdr_t tlv_hdr;
  1447. /* 11AX */
  1448. A_UINT32 ax_su_ndpa;
  1449. A_UINT32 ax_su_ndp;
  1450. A_UINT32 ax_mu_mimo_ndpa;
  1451. A_UINT32 ax_mu_mimo_ndp;
  1452. A_UINT32 ax_mu_mimo_brpoll_1; /* MU user 1 */
  1453. A_UINT32 ax_mu_mimo_brpoll_2; /* MU user 2 */
  1454. A_UINT32 ax_mu_mimo_brpoll_3; /* MU user 3 */
  1455. A_UINT32 ax_mu_mimo_brpoll_4; /* MU user 4 */
  1456. A_UINT32 ax_mu_mimo_brpoll_5; /* MU user 5 */
  1457. A_UINT32 ax_mu_mimo_brpoll_6; /* MU user 6 */
  1458. A_UINT32 ax_mu_mimo_brpoll_7; /* MU user 7 */
  1459. A_UINT32 ax_basic_trigger;
  1460. A_UINT32 ax_bsr_trigger;
  1461. A_UINT32 ax_mu_bar_trigger;
  1462. A_UINT32 ax_mu_rts_trigger;
  1463. A_UINT32 ax_ulmumimo_trigger;
  1464. } htt_tx_selfgen_ax_stats_tlv;
  1465. typedef struct {
  1466. htt_tlv_hdr_t tlv_hdr;
  1467. /* 11AC error stats */
  1468. A_UINT32 ac_su_ndp_err;
  1469. A_UINT32 ac_su_ndpa_err;
  1470. A_UINT32 ac_mu_mimo_ndpa_err;
  1471. A_UINT32 ac_mu_mimo_ndp_err;
  1472. A_UINT32 ac_mu_mimo_brp1_err;
  1473. A_UINT32 ac_mu_mimo_brp2_err;
  1474. A_UINT32 ac_mu_mimo_brp3_err;
  1475. } htt_tx_selfgen_ac_err_stats_tlv;
  1476. typedef struct {
  1477. htt_tlv_hdr_t tlv_hdr;
  1478. /* 11AX error stats */
  1479. A_UINT32 ax_su_ndp_err;
  1480. A_UINT32 ax_su_ndpa_err;
  1481. A_UINT32 ax_mu_mimo_ndpa_err;
  1482. A_UINT32 ax_mu_mimo_ndp_err;
  1483. A_UINT32 ax_mu_mimo_brp1_err;
  1484. A_UINT32 ax_mu_mimo_brp2_err;
  1485. A_UINT32 ax_mu_mimo_brp3_err;
  1486. A_UINT32 ax_mu_mimo_brp4_err;
  1487. A_UINT32 ax_mu_mimo_brp5_err;
  1488. A_UINT32 ax_mu_mimo_brp6_err;
  1489. A_UINT32 ax_mu_mimo_brp7_err;
  1490. A_UINT32 ax_basic_trigger_err;
  1491. A_UINT32 ax_bsr_trigger_err;
  1492. A_UINT32 ax_mu_bar_trigger_err;
  1493. A_UINT32 ax_mu_rts_trigger_err;
  1494. A_UINT32 ax_ulmumimo_trigger_err;
  1495. } htt_tx_selfgen_ax_err_stats_tlv;
  1496. /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_SELFGEN_INFO
  1497. * TLV_TAGS:
  1498. * - HTT_STATS_TX_SELFGEN_CMN_STATS_TAG
  1499. * - HTT_STATS_TX_SELFGEN_AC_STATS_TAG
  1500. * - HTT_STATS_TX_SELFGEN_AX_STATS_TAG
  1501. * - HTT_STATS_TX_SELFGEN_AC_ERR_STATS_TAG
  1502. * - HTT_STATS_TX_SELFGEN_AX_ERR_STATS_TAG
  1503. */
  1504. /* NOTE:
  1505. * This structure is for documentation, and cannot be safely used directly.
  1506. * Instead, use the constituent TLV structures to fill/parse.
  1507. */
  1508. typedef struct {
  1509. htt_tx_selfgen_cmn_stats_tlv cmn_tlv;
  1510. /* 11AC */
  1511. htt_tx_selfgen_ac_stats_tlv ac_tlv;
  1512. /* 11AX */
  1513. htt_tx_selfgen_ax_stats_tlv ax_tlv;
  1514. /* 11AC error stats */
  1515. htt_tx_selfgen_ac_err_stats_tlv ac_err_tlv;
  1516. /* 11AX error stats */
  1517. htt_tx_selfgen_ax_err_stats_tlv ax_err_tlv;
  1518. } htt_tx_pdev_selfgen_stats_t;
  1519. /* == TX MU STATS == */
  1520. #define HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS 4
  1521. #define HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS 8
  1522. #define HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS 74
  1523. typedef struct {
  1524. htt_tlv_hdr_t tlv_hdr;
  1525. /* mu-mimo sw sched cmd stats */
  1526. A_UINT32 mu_mimo_sch_posted;
  1527. A_UINT32 mu_mimo_sch_failed;
  1528. /* MU PPDU stats per hwQ */
  1529. A_UINT32 mu_mimo_ppdu_posted;
  1530. /*
  1531. * Counts the number of users in each transmission of
  1532. * the given TX mode.
  1533. *
  1534. * Index is the number of users - 1.
  1535. */
  1536. A_UINT32 ac_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_AC_MUMIMO_USER_STATS];
  1537. A_UINT32 ax_mu_mimo_sch_nusers[HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS];
  1538. A_UINT32 ax_ofdma_sch_nusers[HTT_TX_PDEV_STATS_NUM_OFDMA_USER_STATS];
  1539. } htt_tx_pdev_mu_mimo_sch_stats_tlv;
  1540. typedef struct {
  1541. htt_tlv_hdr_t tlv_hdr;
  1542. /* mu-mimo mpdu level stats */
  1543. /*
  1544. * This first block of stats is limited to 11ac
  1545. * MU-MIMO transmission.
  1546. */
  1547. A_UINT32 mu_mimo_mpdus_queued_usr;
  1548. A_UINT32 mu_mimo_mpdus_tried_usr;
  1549. A_UINT32 mu_mimo_mpdus_failed_usr;
  1550. A_UINT32 mu_mimo_mpdus_requeued_usr;
  1551. A_UINT32 mu_mimo_err_no_ba_usr;
  1552. A_UINT32 mu_mimo_mpdu_underrun_usr;
  1553. A_UINT32 mu_mimo_ampdu_underrun_usr;
  1554. A_UINT32 ax_mu_mimo_mpdus_queued_usr;
  1555. A_UINT32 ax_mu_mimo_mpdus_tried_usr;
  1556. A_UINT32 ax_mu_mimo_mpdus_failed_usr;
  1557. A_UINT32 ax_mu_mimo_mpdus_requeued_usr;
  1558. A_UINT32 ax_mu_mimo_err_no_ba_usr;
  1559. A_UINT32 ax_mu_mimo_mpdu_underrun_usr;
  1560. A_UINT32 ax_mu_mimo_ampdu_underrun_usr;
  1561. A_UINT32 ax_ofdma_mpdus_queued_usr;
  1562. A_UINT32 ax_ofdma_mpdus_tried_usr;
  1563. A_UINT32 ax_ofdma_mpdus_failed_usr;
  1564. A_UINT32 ax_ofdma_mpdus_requeued_usr;
  1565. A_UINT32 ax_ofdma_err_no_ba_usr;
  1566. A_UINT32 ax_ofdma_mpdu_underrun_usr;
  1567. A_UINT32 ax_ofdma_ampdu_underrun_usr;
  1568. } htt_tx_pdev_mu_mimo_mpdu_stats_tlv;
  1569. #define HTT_STATS_TX_SCHED_MODE_MU_MIMO_AC 1 /* SCHED_TX_MODE_MU_MIMO_AC */
  1570. #define HTT_STATS_TX_SCHED_MODE_MU_MIMO_AX 2 /* SCHED_TX_MODE_MU_MIMO_AX */
  1571. #define HTT_STATS_TX_SCHED_MODE_MU_OFDMA_AX 3 /* SCHED_TX_MODE_MU_OFDMA_AX */
  1572. typedef struct {
  1573. htt_tlv_hdr_t tlv_hdr;
  1574. /* mpdu level stats */
  1575. A_UINT32 mpdus_queued_usr;
  1576. A_UINT32 mpdus_tried_usr;
  1577. A_UINT32 mpdus_failed_usr;
  1578. A_UINT32 mpdus_requeued_usr;
  1579. A_UINT32 err_no_ba_usr;
  1580. A_UINT32 mpdu_underrun_usr;
  1581. A_UINT32 ampdu_underrun_usr;
  1582. A_UINT32 user_index;
  1583. A_UINT32 tx_sched_mode; /* HTT_STATS_TX_SCHED_MODE_xxx */
  1584. } htt_tx_pdev_mpdu_stats_tlv;
  1585. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_MU
  1586. * TLV_TAGS:
  1587. * - HTT_STATS_TX_PDEV_MU_MIMO_STATS_TAG (multiple)
  1588. * - HTT_STATS_TX_PDEV_MPDU_STATS_TAG (multiple)
  1589. */
  1590. /* NOTE:
  1591. * This structure is for documentation, and cannot be safely used directly.
  1592. * Instead, use the constituent TLV structures to fill/parse.
  1593. */
  1594. typedef struct {
  1595. htt_tx_pdev_mu_mimo_sch_stats_tlv mu_mimo_sch_stats_tlv[1]; /* WAL_TX_STATS_MAX_GROUP_SIZE */
  1596. /*
  1597. * Note that though mu_mimo_mpdu_stats_tlv is named MU-MIMO,
  1598. * it can also hold MU-OFDMA stats.
  1599. */
  1600. htt_tx_pdev_mpdu_stats_tlv mu_mimo_mpdu_stats_tlv[1]; /* WAL_TX_STATS_MAX_NUM_USERS */
  1601. } htt_tx_pdev_mu_mimo_stats_t;
  1602. /* == TX SCHED STATS == */
  1603. #define HTT_SCHED_TXQ_CMD_POSTED_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1604. /* NOTE: Variable length TLV, use length spec to infer array size */
  1605. typedef struct {
  1606. htt_tlv_hdr_t tlv_hdr;
  1607. /* Scheduler command posted per tx_mode su / mu mimo 11ac / mu mimo 11ax / mu ofdma */
  1608. A_UINT32 sched_cmd_posted[1]; /* HTT_TX_PDEV_SCHED_TX_MODE_MAX */
  1609. } htt_sched_txq_cmd_posted_tlv_v;
  1610. #define HTT_SCHED_TXQ_CMD_REAPED_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1611. /* NOTE: Variable length TLV, use length spec to infer array size */
  1612. typedef struct {
  1613. htt_tlv_hdr_t tlv_hdr;
  1614. /* Scheduler command reaped per tx_mode su / mu mimo 11ac / mu mimo 11ax / mu ofdma */
  1615. A_UINT32 sched_cmd_reaped[1]; /* HTT_TX_PDEV_SCHED_TX_MODE_MAX */
  1616. } htt_sched_txq_cmd_reaped_tlv_v;
  1617. #define HTT_SCHED_TXQ_SCHED_ORDER_SU_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1618. /* NOTE: Variable length TLV, use length spec to infer array size */
  1619. typedef struct {
  1620. htt_tlv_hdr_t tlv_hdr;
  1621. /*
  1622. * sched_order_su contains the peer IDs of peers chosen in the last
  1623. * NUM_SCHED_ORDER_LOG scheduler instances.
  1624. * The array is circular; it's unspecified which array element corresponds
  1625. * to the most recent scheduler invocation, and which corresponds to
  1626. * the (NUM_SCHED_ORDER_LOG-1) most recent scheduler invocation.
  1627. */
  1628. A_UINT32 sched_order_su[1]; /* HTT_TX_PDEV_NUM_SCHED_ORDER_LOG */
  1629. } htt_sched_txq_sched_order_su_tlv_v;
  1630. typedef enum {
  1631. HTT_SCHED_TID_SKIP_SCHED_MASK_DISABLED = 0, /* Skip the tid when WAL_TID_DISABLE_TX_SCHED_MASK is true */
  1632. HTT_SCHED_TID_SKIP_NOTIFY_MPDU, /* Skip the tid's 2nd sched_cmd when 1st cmd is ongoing */
  1633. HTT_SCHED_TID_SKIP_MPDU_STATE_INVALID, /* Skip the tid when MPDU state is invalid */
  1634. HTT_SCHED_TID_SKIP_SCHED_DISABLED, /* Skip the tid when scheduling is disabled for that tid */
  1635. HTT_SCHED_TID_SKIP_TQM_BYPASS_CMD_PENDING, /* Skip the TQM bypass tid when it has pending sched_cmd */
  1636. HTT_SCHED_TID_SKIP_SECOND_SU_SCHEDULE, /* Skip tid from 2nd SU schedule when any of the following flag is set
  1637. WAL_TX_TID(SEND_BAR | TQM_MPDU_STATE_VALID | SEND_QOS_NULL | TQM_NOTIFY_MPDU | SENDN_PENDING) */
  1638. HTT_SCHED_TID_SKIP_CMD_SLOT_NOT_AVAIL, /* Skip the tid when command slot is not available */
  1639. HTT_SCHED_TID_SKIP_NO_ENQ, /* Skip the tid when num_frames is zero with g_disable_remove_tid as true */
  1640. HTT_SCHED_TID_SKIP_LOW_ENQ, /* Skip the tid when enqueue is low */
  1641. HTT_SCHED_TID_SKIP_PAUSED, /* Skipping the paused tid(sendn-frames) */
  1642. HTT_SCHED_TID_SKIP_UL, /* UL tid skip */
  1643. HTT_SCHED_TID_REMOVE_PAUSED, /* Removing the paused tid when number of sendn frames is zero */
  1644. HTT_SCHED_TID_REMOVE_NO_ENQ, /* Remove tid with zero queue depth */
  1645. HTT_SCHED_TID_REMOVE_UL, /* UL tid remove */
  1646. HTT_SCHED_TID_QUERY, /* Moving to next user and adding tid in prepend list when qstats update is pending */
  1647. HTT_SCHED_TID_SU_ONLY, /* Tid is eligible and TX_SCHED_SU_ONLY is true */
  1648. HTT_SCHED_TID_ELIGIBLE, /* Tid is eligible for scheduling */
  1649. HTT_SCHED_INELIGIBILITY_MAX,
  1650. } htt_sched_txq_sched_ineligibility_tlv_enum;
  1651. #define HTT_SCHED_TXQ_SCHED_INELIGIBILITY_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1652. /* NOTE: Variable length TLV, use length spec to infer array size */
  1653. typedef struct {
  1654. htt_tlv_hdr_t tlv_hdr;
  1655. /* sched_ineligibility counts the number of occurrences of different reasons for tid ineligibility during eligibility checks per txq in scheduling */
  1656. A_UINT32 sched_ineligibility[1]; /* indexed by htt_sched_txq_sched_ineligibility_tlv_enum */
  1657. } htt_sched_txq_sched_ineligibility_tlv_v;
  1658. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_M 0x000000ff
  1659. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_S 0
  1660. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_M 0x0000ff00
  1661. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_S 8
  1662. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_GET(_var) \
  1663. (((_var) & HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_M) >> \
  1664. HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_S)
  1665. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_SET(_var, _val) \
  1666. do { \
  1667. HTT_CHECK_SET_VAL(HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID, _val); \
  1668. ((_var) |= ((_val) << HTT_TX_PDEV_STATS_SCHED_PER_TXQ_MAC_ID_S)); \
  1669. } while (0)
  1670. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_GET(_var) \
  1671. (((_var) & HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_M) >> \
  1672. HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_S)
  1673. #define HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_SET(_var, _val) \
  1674. do { \
  1675. HTT_CHECK_SET_VAL(HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID, _val); \
  1676. ((_var) |= ((_val) << HTT_TX_PDEV_STATS_SCHED_PER_TXQ_TXQUEUE_ID_S)); \
  1677. } while (0)
  1678. typedef struct {
  1679. htt_tlv_hdr_t tlv_hdr;
  1680. /* BIT [ 7 : 0] :- mac_id
  1681. * BIT [15 : 8] :- txq_id
  1682. * BIT [31 : 16] :- reserved
  1683. */
  1684. A_UINT32 mac_id__txq_id__word;
  1685. /* Scheduler policy ised for this TxQ */
  1686. A_UINT32 sched_policy;
  1687. /* Timestamp of last scheduler command posted */
  1688. A_UINT32 last_sched_cmd_posted_timestamp;
  1689. /* Timestamp of last scheduler command completed */
  1690. A_UINT32 last_sched_cmd_compl_timestamp;
  1691. /* Num of Sched2TAC ring hit Low Water Mark condition */
  1692. A_UINT32 sched_2_tac_lwm_count;
  1693. /* Num of Sched2TAC ring full condition */
  1694. A_UINT32 sched_2_tac_ring_full;
  1695. /* Num of scheduler command post failures that includes su/mu mimo/mu ofdma sequence type */
  1696. A_UINT32 sched_cmd_post_failure;
  1697. /* Num of active tids for this TxQ at current instance */
  1698. A_UINT32 num_active_tids;
  1699. /* Num of powersave schedules */
  1700. A_UINT32 num_ps_schedules;
  1701. /* Num of scheduler commands pending for this TxQ */
  1702. A_UINT32 sched_cmds_pending;
  1703. /* Num of tidq registration for this TxQ */
  1704. A_UINT32 num_tid_register;
  1705. /* Num of tidq de-registration for this TxQ */
  1706. A_UINT32 num_tid_unregister;
  1707. /* Num of iterations msduq stats was updated */
  1708. A_UINT32 num_qstats_queried;
  1709. /* qstats query update status */
  1710. A_UINT32 qstats_update_pending;
  1711. /* Timestamp of Last query stats made */
  1712. A_UINT32 last_qstats_query_timestamp;
  1713. /* Num of sched2tqm command queue full condition */
  1714. A_UINT32 num_tqm_cmdq_full;
  1715. /* Num of scheduler trigger from DE Module */
  1716. A_UINT32 num_de_sched_algo_trigger;
  1717. /* Num of scheduler trigger from RT Module */
  1718. A_UINT32 num_rt_sched_algo_trigger;
  1719. /* Num of scheduler trigger from TQM Module */
  1720. A_UINT32 num_tqm_sched_algo_trigger;
  1721. /* Num of schedules for notify frame */
  1722. A_UINT32 notify_sched;
  1723. /* Duration based sendn termination */
  1724. A_UINT32 dur_based_sendn_term;
  1725. /* scheduled via NOTIFY2 */
  1726. A_UINT32 su_notify2_sched;
  1727. /* schedule if queued packets are greater than avg MSDUs in PPDU */
  1728. A_UINT32 su_optimal_queued_msdus_sched;
  1729. /* schedule due to timeout */
  1730. A_UINT32 su_delay_timeout_sched;
  1731. /* delay if txtime is less than 500us */
  1732. A_UINT32 su_min_txtime_sched_delay;
  1733. /* scheduled via no delay */
  1734. A_UINT32 su_no_delay;
  1735. } htt_tx_pdev_stats_sched_per_txq_tlv;
  1736. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_M 0x000000ff
  1737. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_S 0
  1738. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_GET(_var) \
  1739. (((_var) & HTT_STATS_TX_SCHED_CMN_MAC_ID_M) >> \
  1740. HTT_STATS_TX_SCHED_CMN_MAC_ID_S)
  1741. #define HTT_STATS_TX_SCHED_CMN_MAC_ID_SET(_var, _val) \
  1742. do { \
  1743. HTT_CHECK_SET_VAL(HTT_STATS_TX_SCHED_CMN_MAC_ID, _val); \
  1744. ((_var) |= ((_val) << HTT_STATS_TX_SCHED_CMN_MAC_ID_S)); \
  1745. } while (0)
  1746. typedef struct {
  1747. htt_tlv_hdr_t tlv_hdr;
  1748. /* BIT [ 7 : 0] :- mac_id
  1749. * BIT [31 : 8] :- reserved
  1750. */
  1751. A_UINT32 mac_id__word;
  1752. /* Current timestamp */
  1753. A_UINT32 current_timestamp;
  1754. } htt_stats_tx_sched_cmn_tlv;
  1755. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_SCHED
  1756. * TLV_TAGS:
  1757. * - HTT_STATS_TX_SCHED_CMN_TAG
  1758. * - HTT_STATS_TX_PDEV_SCHEDULER_TXQ_STATS_TAG
  1759. * - HTT_STATS_SCHED_TXQ_CMD_POSTED_TAG
  1760. * - HTT_STATS_SCHED_TXQ_CMD_REAPED_TAG
  1761. * - HTT_STATS_SCHED_TXQ_SCHED_ORDER_SU_TAG
  1762. * - HTT_STATS_SCHED_TXQ_SCHED_INELIGIBILITY_TAG
  1763. */
  1764. /* NOTE:
  1765. * This structure is for documentation, and cannot be safely used directly.
  1766. * Instead, use the constituent TLV structures to fill/parse.
  1767. */
  1768. typedef struct {
  1769. htt_stats_tx_sched_cmn_tlv cmn_tlv;
  1770. struct _txq_tx_sched_stats {
  1771. htt_tx_pdev_stats_sched_per_txq_tlv txq_tlv;
  1772. htt_sched_txq_cmd_posted_tlv_v cmd_posted_tlv;
  1773. htt_sched_txq_cmd_reaped_tlv_v cmd_reaped_tlv;
  1774. htt_sched_txq_sched_order_su_tlv_v sched_order_su_tlv;
  1775. htt_sched_txq_sched_ineligibility_tlv_v sched_ineligibility_tlv;
  1776. } txq[1];
  1777. } htt_stats_tx_sched_t;
  1778. /* == TQM STATS == */
  1779. #define HTT_TX_TQM_MAX_GEN_MPDU_END_REASON 16
  1780. #define HTT_TX_TQM_MAX_LIST_MPDU_END_REASON 16
  1781. #define HTT_TX_TQM_MAX_LIST_MPDU_CNT_HISTOGRAM_BINS 16
  1782. #define HTT_TX_TQM_GEN_MPDU_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1783. /* NOTE: Variable length TLV, use length spec to infer array size */
  1784. typedef struct {
  1785. htt_tlv_hdr_t tlv_hdr;
  1786. A_UINT32 gen_mpdu_end_reason[1]; /* HTT_TX_TQM_MAX_GEN_MPDU_END_REASON */
  1787. } htt_tx_tqm_gen_mpdu_stats_tlv_v;
  1788. #define HTT_TX_TQM_LIST_MPDU_STATS_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1789. /* NOTE: Variable length TLV, use length spec to infer array size */
  1790. typedef struct {
  1791. htt_tlv_hdr_t tlv_hdr;
  1792. A_UINT32 list_mpdu_end_reason[1]; /* HTT_TX_TQM_MAX_LIST_MPDU_END_REASON */
  1793. } htt_tx_tqm_list_mpdu_stats_tlv_v;
  1794. #define HTT_TX_TQM_LIST_MPDU_CNT_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  1795. /* NOTE: Variable length TLV, use length spec to infer array size */
  1796. typedef struct {
  1797. htt_tlv_hdr_t tlv_hdr;
  1798. A_UINT32 list_mpdu_cnt_hist[1]; /* HTT_TX_TQM_MAX_LIST_MPDU_CNT_HISTOGRAM_BINS */
  1799. } htt_tx_tqm_list_mpdu_cnt_tlv_v;
  1800. typedef struct {
  1801. htt_tlv_hdr_t tlv_hdr;
  1802. A_UINT32 msdu_count;
  1803. A_UINT32 mpdu_count;
  1804. A_UINT32 remove_msdu;
  1805. A_UINT32 remove_mpdu;
  1806. A_UINT32 remove_msdu_ttl;
  1807. A_UINT32 send_bar;
  1808. A_UINT32 bar_sync;
  1809. A_UINT32 notify_mpdu;
  1810. A_UINT32 sync_cmd;
  1811. A_UINT32 write_cmd;
  1812. A_UINT32 hwsch_trigger;
  1813. A_UINT32 ack_tlv_proc;
  1814. A_UINT32 gen_mpdu_cmd;
  1815. A_UINT32 gen_list_cmd;
  1816. A_UINT32 remove_mpdu_cmd;
  1817. A_UINT32 remove_mpdu_tried_cmd;
  1818. A_UINT32 mpdu_queue_stats_cmd;
  1819. A_UINT32 mpdu_head_info_cmd;
  1820. A_UINT32 msdu_flow_stats_cmd;
  1821. A_UINT32 remove_msdu_cmd;
  1822. A_UINT32 remove_msdu_ttl_cmd;
  1823. A_UINT32 flush_cache_cmd;
  1824. A_UINT32 update_mpduq_cmd;
  1825. A_UINT32 enqueue;
  1826. A_UINT32 enqueue_notify;
  1827. A_UINT32 notify_mpdu_at_head;
  1828. A_UINT32 notify_mpdu_state_valid;
  1829. /*
  1830. * On receiving TQM_FLOW_NOT_EMPTY_STATUS from TQM, (on MSDUs being enqueued
  1831. * the flow is non empty), if the number of MSDUs is greater than the threshold,
  1832. * notify is incremented. UDP_THRESH counters are for UDP MSDUs, and NONUDP are
  1833. * for non-UDP MSDUs.
  1834. * MSDUQ_SWNOTIFY_UDP_THRESH1 threshold - sched_udp_notify1 is incremented
  1835. * MSDUQ_SWNOTIFY_UDP_THRESH2 threshold - sched_udp_notify2 is incremented
  1836. * MSDUQ_SWNOTIFY_NONUDP_THRESH1 threshold - sched_nonudp_notify1 is incremented
  1837. * MSDUQ_SWNOTIFY_NONUDP_THRESH2 threshold - sched_nonudp_notify2 is incremented
  1838. *
  1839. * Notify signifies that we trigger the scheduler.
  1840. */
  1841. A_UINT32 sched_udp_notify1;
  1842. A_UINT32 sched_udp_notify2;
  1843. A_UINT32 sched_nonudp_notify1;
  1844. A_UINT32 sched_nonudp_notify2;
  1845. } htt_tx_tqm_pdev_stats_tlv_v;
  1846. #define HTT_TX_TQM_CMN_STATS_MAC_ID_M 0x000000ff
  1847. #define HTT_TX_TQM_CMN_STATS_MAC_ID_S 0
  1848. #define HTT_TX_TQM_CMN_STATS_MAC_ID_GET(_var) \
  1849. (((_var) & HTT_TX_TQM_CMN_STATS_MAC_ID_M) >> \
  1850. HTT_TX_TQM_CMN_STATS_MAC_ID_S)
  1851. #define HTT_TX_TQM_CMN_STATS_MAC_ID_SET(_var, _val) \
  1852. do { \
  1853. HTT_CHECK_SET_VAL(HTT_TX_TQM_CMN_STATS_MAC_ID, _val); \
  1854. ((_var) |= ((_val) << HTT_TX_TQM_CMN_STATS_MAC_ID_S)); \
  1855. } while (0)
  1856. typedef struct {
  1857. htt_tlv_hdr_t tlv_hdr;
  1858. /* BIT [ 7 : 0] :- mac_id
  1859. * BIT [31 : 8] :- reserved
  1860. */
  1861. A_UINT32 mac_id__word;
  1862. A_UINT32 max_cmdq_id;
  1863. A_UINT32 list_mpdu_cnt_hist_intvl;
  1864. /* Global stats */
  1865. A_UINT32 add_msdu;
  1866. A_UINT32 q_empty;
  1867. A_UINT32 q_not_empty;
  1868. A_UINT32 drop_notification;
  1869. A_UINT32 desc_threshold;
  1870. A_UINT32 hwsch_tqm_invalid_status;
  1871. A_UINT32 missed_tqm_gen_mpdus;
  1872. } htt_tx_tqm_cmn_stats_tlv;
  1873. typedef struct {
  1874. htt_tlv_hdr_t tlv_hdr;
  1875. /* Error stats */
  1876. A_UINT32 q_empty_failure;
  1877. A_UINT32 q_not_empty_failure;
  1878. A_UINT32 add_msdu_failure;
  1879. } htt_tx_tqm_error_stats_tlv;
  1880. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TQM
  1881. * TLV_TAGS:
  1882. * - HTT_STATS_TX_TQM_CMN_TAG
  1883. * - HTT_STATS_TX_TQM_ERROR_STATS_TAG
  1884. * - HTT_STATS_TX_TQM_GEN_MPDU_TAG
  1885. * - HTT_STATS_TX_TQM_LIST_MPDU_TAG
  1886. * - HTT_STATS_TX_TQM_LIST_MPDU_CNT_TAG
  1887. * - HTT_STATS_TX_TQM_PDEV_TAG
  1888. */
  1889. /* NOTE:
  1890. * This structure is for documentation, and cannot be safely used directly.
  1891. * Instead, use the constituent TLV structures to fill/parse.
  1892. */
  1893. typedef struct {
  1894. htt_tx_tqm_cmn_stats_tlv cmn_tlv;
  1895. htt_tx_tqm_error_stats_tlv err_tlv;
  1896. htt_tx_tqm_gen_mpdu_stats_tlv_v gen_mpdu_stats_tlv;
  1897. htt_tx_tqm_list_mpdu_stats_tlv_v list_mpdu_stats_tlv;
  1898. htt_tx_tqm_list_mpdu_cnt_tlv_v list_mpdu_cnt_tlv;
  1899. htt_tx_tqm_pdev_stats_tlv_v tqm_pdev_stats_tlv;
  1900. } htt_tx_tqm_pdev_stats_t;
  1901. /* == TQM CMDQ stats == */
  1902. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_M 0x000000ff
  1903. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_S 0
  1904. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_M 0x0000ff00
  1905. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_S 8
  1906. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_GET(_var) \
  1907. (((_var) & HTT_TX_TQM_CMDQ_STATUS_MAC_ID_M) >> \
  1908. HTT_TX_TQM_CMDQ_STATUS_MAC_ID_S)
  1909. #define HTT_TX_TQM_CMDQ_STATUS_MAC_ID_SET(_var, _val) \
  1910. do { \
  1911. HTT_CHECK_SET_VAL(HTT_TX_TQM_CMDQ_STATUS_MAC_ID, _val); \
  1912. ((_var) |= ((_val) << HTT_TX_TQM_CMDQ_STATUS_MAC_ID_S)); \
  1913. } while (0)
  1914. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_GET(_var) \
  1915. (((_var) & HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_M) >> \
  1916. HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_S)
  1917. #define HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_SET(_var, _val) \
  1918. do { \
  1919. HTT_CHECK_SET_VAL(HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID, _val); \
  1920. ((_var) |= ((_val) << HTT_TX_TQM_CMDQ_STATUS_CMDQ_ID_S)); \
  1921. } while (0)
  1922. typedef struct {
  1923. htt_tlv_hdr_t tlv_hdr;
  1924. /* BIT [ 7 : 0] :- mac_id
  1925. * BIT [15 : 8] :- cmdq_id
  1926. * BIT [31 : 16] :- reserved
  1927. */
  1928. A_UINT32 mac_id__cmdq_id__word;
  1929. A_UINT32 sync_cmd;
  1930. A_UINT32 write_cmd;
  1931. A_UINT32 gen_mpdu_cmd;
  1932. A_UINT32 mpdu_queue_stats_cmd;
  1933. A_UINT32 mpdu_head_info_cmd;
  1934. A_UINT32 msdu_flow_stats_cmd;
  1935. A_UINT32 remove_mpdu_cmd;
  1936. A_UINT32 remove_msdu_cmd;
  1937. A_UINT32 flush_cache_cmd;
  1938. A_UINT32 update_mpduq_cmd;
  1939. A_UINT32 update_msduq_cmd;
  1940. } htt_tx_tqm_cmdq_status_tlv;
  1941. /* STATS_TYPE : HTT_DBG_EXT_STATS_TQM_CMDQ
  1942. * TLV_TAGS:
  1943. * - HTT_STATS_STRING_TAG
  1944. * - HTT_STATS_TX_TQM_CMDQ_STATUS_TAG
  1945. */
  1946. /* NOTE:
  1947. * This structure is for documentation, and cannot be safely used directly.
  1948. * Instead, use the constituent TLV structures to fill/parse.
  1949. */
  1950. typedef struct {
  1951. struct _cmdq_stats {
  1952. htt_stats_string_tlv cmdq_str_tlv;
  1953. htt_tx_tqm_cmdq_status_tlv status_tlv;
  1954. } q[1];
  1955. } htt_tx_tqm_cmdq_stats_t;
  1956. /* == TX-DE STATS == */
  1957. /* Structures for tx de stats */
  1958. typedef struct {
  1959. htt_tlv_hdr_t tlv_hdr;
  1960. A_UINT32 m1_packets;
  1961. A_UINT32 m2_packets;
  1962. A_UINT32 m3_packets;
  1963. A_UINT32 m4_packets;
  1964. A_UINT32 g1_packets;
  1965. A_UINT32 g2_packets;
  1966. A_UINT32 rc4_packets;
  1967. A_UINT32 eap_packets;
  1968. A_UINT32 eapol_start_packets;
  1969. A_UINT32 eapol_logoff_packets;
  1970. A_UINT32 eapol_encap_asf_packets;
  1971. } htt_tx_de_eapol_packets_stats_tlv;
  1972. typedef struct {
  1973. htt_tlv_hdr_t tlv_hdr;
  1974. A_UINT32 ap_bss_peer_not_found;
  1975. A_UINT32 ap_bcast_mcast_no_peer;
  1976. A_UINT32 sta_delete_in_progress;
  1977. A_UINT32 ibss_no_bss_peer;
  1978. A_UINT32 invaild_vdev_type;
  1979. A_UINT32 invalid_ast_peer_entry;
  1980. A_UINT32 peer_entry_invalid;
  1981. A_UINT32 ethertype_not_ip;
  1982. A_UINT32 eapol_lookup_failed;
  1983. A_UINT32 qpeer_not_allow_data;
  1984. A_UINT32 fse_tid_override;
  1985. A_UINT32 ipv6_jumbogram_zero_length;
  1986. A_UINT32 qos_to_non_qos_in_prog;
  1987. A_UINT32 ap_bcast_mcast_eapol;
  1988. A_UINT32 unicast_on_ap_bss_peer;
  1989. A_UINT32 ap_vdev_invalid;
  1990. A_UINT32 incomplete_llc;
  1991. A_UINT32 eapol_duplicate_m3;
  1992. A_UINT32 eapol_duplicate_m4;
  1993. } htt_tx_de_classify_failed_stats_tlv;
  1994. typedef struct {
  1995. htt_tlv_hdr_t tlv_hdr;
  1996. A_UINT32 arp_packets;
  1997. A_UINT32 igmp_packets;
  1998. A_UINT32 dhcp_packets;
  1999. A_UINT32 host_inspected;
  2000. A_UINT32 htt_included;
  2001. A_UINT32 htt_valid_mcs;
  2002. A_UINT32 htt_valid_nss;
  2003. A_UINT32 htt_valid_preamble_type;
  2004. A_UINT32 htt_valid_chainmask;
  2005. A_UINT32 htt_valid_guard_interval;
  2006. A_UINT32 htt_valid_retries;
  2007. A_UINT32 htt_valid_bw_info;
  2008. A_UINT32 htt_valid_power;
  2009. A_UINT32 htt_valid_key_flags;
  2010. A_UINT32 htt_valid_no_encryption;
  2011. A_UINT32 fse_entry_count;
  2012. A_UINT32 fse_priority_be;
  2013. A_UINT32 fse_priority_high;
  2014. A_UINT32 fse_priority_low;
  2015. A_UINT32 fse_traffic_ptrn_be;
  2016. A_UINT32 fse_traffic_ptrn_over_sub;
  2017. A_UINT32 fse_traffic_ptrn_bursty;
  2018. A_UINT32 fse_traffic_ptrn_interactive;
  2019. A_UINT32 fse_traffic_ptrn_periodic;
  2020. A_UINT32 fse_hwqueue_alloc;
  2021. A_UINT32 fse_hwqueue_created;
  2022. A_UINT32 fse_hwqueue_send_to_host;
  2023. A_UINT32 mcast_entry;
  2024. A_UINT32 bcast_entry;
  2025. A_UINT32 htt_update_peer_cache;
  2026. A_UINT32 htt_learning_frame;
  2027. A_UINT32 fse_invalid_peer;
  2028. /*
  2029. * mec_notify is HTT TX WBM multicast echo check notification
  2030. * from firmware to host. FW sends SA addresses to host for all
  2031. * multicast/broadcast packets received on STA side.
  2032. */
  2033. A_UINT32 mec_notify;
  2034. } htt_tx_de_classify_stats_tlv;
  2035. typedef struct {
  2036. htt_tlv_hdr_t tlv_hdr;
  2037. A_UINT32 eok;
  2038. A_UINT32 classify_done;
  2039. A_UINT32 lookup_failed;
  2040. A_UINT32 send_host_dhcp;
  2041. A_UINT32 send_host_mcast;
  2042. A_UINT32 send_host_unknown_dest;
  2043. A_UINT32 send_host;
  2044. A_UINT32 status_invalid;
  2045. } htt_tx_de_classify_status_stats_tlv;
  2046. typedef struct {
  2047. htt_tlv_hdr_t tlv_hdr;
  2048. A_UINT32 enqueued_pkts;
  2049. A_UINT32 to_tqm;
  2050. A_UINT32 to_tqm_bypass;
  2051. } htt_tx_de_enqueue_packets_stats_tlv;
  2052. typedef struct {
  2053. htt_tlv_hdr_t tlv_hdr;
  2054. A_UINT32 discarded_pkts;
  2055. A_UINT32 local_frames;
  2056. A_UINT32 is_ext_msdu;
  2057. } htt_tx_de_enqueue_discard_stats_tlv;
  2058. typedef struct {
  2059. htt_tlv_hdr_t tlv_hdr;
  2060. A_UINT32 tcl_dummy_frame;
  2061. A_UINT32 tqm_dummy_frame;
  2062. A_UINT32 tqm_notify_frame;
  2063. A_UINT32 fw2wbm_enq;
  2064. A_UINT32 tqm_bypass_frame;
  2065. } htt_tx_de_compl_stats_tlv;
  2066. #define HTT_TX_DE_CMN_STATS_MAC_ID_M 0x000000ff
  2067. #define HTT_TX_DE_CMN_STATS_MAC_ID_S 0
  2068. #define HTT_TX_DE_CMN_STATS_MAC_ID_GET(_var) \
  2069. (((_var) & HTT_TX_DE_CMN_STATS_MAC_ID_M) >> \
  2070. HTT_TX_DE_CMN_STATS_MAC_ID_S)
  2071. #define HTT_TX_DE_CMN_STATS_MAC_ID_SET(_var, _val) \
  2072. do { \
  2073. HTT_CHECK_SET_VAL(HTT_TX_DE_CMN_STATS_MAC_ID, _val); \
  2074. ((_var) |= ((_val) << HTT_TX_DE_CMN_STATS_MAC_ID_S)); \
  2075. } while (0)
  2076. /*
  2077. * The htt_tx_de_fw2wbm_ring_full_hist_tlv is a histogram of time we waited
  2078. * for the fw2wbm ring buffer. we are requesting a buffer in FW2WBM release
  2079. * ring,which may fail, due to non availability of buffer. Hence we sleep for
  2080. * 200us & again request for it. This is a histogram of time we wait, with
  2081. * bin of 200ms & there are 10 bin (2 seconds max)
  2082. * They are defined by the following macros in FW
  2083. * #define ENTRIES_PER_BIN_COUNT 1000 // per bin 1000 * 200us = 200ms
  2084. * #define RING_FULL_BIN_ENTRIES (WAL_TX_DE_FW2WBM_ALLOC_TIMEOUT_COUNT /
  2085. * ENTRIES_PER_BIN_COUNT)
  2086. */
  2087. typedef struct {
  2088. htt_tlv_hdr_t tlv_hdr;
  2089. A_UINT32 fw2wbm_ring_full_hist[1];
  2090. } htt_tx_de_fw2wbm_ring_full_hist_tlv;
  2091. typedef struct {
  2092. htt_tlv_hdr_t tlv_hdr;
  2093. /* BIT [ 7 : 0] :- mac_id
  2094. * BIT [31 : 8] :- reserved
  2095. */
  2096. A_UINT32 mac_id__word;
  2097. /* Global Stats */
  2098. A_UINT32 tcl2fw_entry_count;
  2099. A_UINT32 not_to_fw;
  2100. A_UINT32 invalid_pdev_vdev_peer;
  2101. A_UINT32 tcl_res_invalid_addrx;
  2102. A_UINT32 wbm2fw_entry_count;
  2103. A_UINT32 invalid_pdev;
  2104. A_UINT32 tcl_res_addrx_timeout;
  2105. A_UINT32 invalid_vdev;
  2106. A_UINT32 invalid_tcl_exp_frame_desc;
  2107. } htt_tx_de_cmn_stats_tlv;
  2108. /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_DE_INFO
  2109. * TLV_TAGS:
  2110. * - HTT_STATS_TX_DE_CMN_TAG
  2111. * - HTT_STATS_TX_DE_FW2WBM_RING_FULL_HIST_TAG
  2112. * - HTT_STATS_TX_DE_EAPOL_PACKETS_TAG
  2113. * - HTT_STATS_TX_DE_CLASSIFY_STATS_TAG
  2114. * - HTT_STATS_TX_DE_CLASSIFY_FAILED_TAG
  2115. * - HTT_STATS_TX_DE_CLASSIFY_STATUS_TAG
  2116. * - HTT_STATS_TX_DE_ENQUEUE_PACKETS_TAG
  2117. * - HTT_STATS_TX_DE_ENQUEUE_DISCARD_TAG
  2118. * - HTT_STATS_TX_DE_COMPL_STATS_TAG
  2119. */
  2120. /* NOTE:
  2121. * This structure is for documentation, and cannot be safely used directly.
  2122. * Instead, use the constituent TLV structures to fill/parse.
  2123. */
  2124. typedef struct {
  2125. htt_tx_de_cmn_stats_tlv cmn_tlv;
  2126. htt_tx_de_fw2wbm_ring_full_hist_tlv fw2wbm_hist_tlv;
  2127. htt_tx_de_eapol_packets_stats_tlv eapol_stats_tlv;
  2128. htt_tx_de_classify_stats_tlv classify_stats_tlv;
  2129. htt_tx_de_classify_failed_stats_tlv classify_failed_tlv;
  2130. htt_tx_de_classify_status_stats_tlv classify_status_rlv;
  2131. htt_tx_de_enqueue_packets_stats_tlv enqueue_packets_tlv;
  2132. htt_tx_de_enqueue_discard_stats_tlv enqueue_discard_tlv;
  2133. htt_tx_de_compl_stats_tlv comp_status_tlv;
  2134. } htt_tx_de_stats_t;
  2135. /* == RING-IF STATS == */
  2136. /* DWORD num_elems__prefetch_tail_idx */
  2137. #define HTT_RING_IF_STATS_NUM_ELEMS_M 0x0000ffff
  2138. #define HTT_RING_IF_STATS_NUM_ELEMS_S 0
  2139. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_M 0xffff0000
  2140. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_S 16
  2141. #define HTT_RING_IF_STATS_NUM_ELEMS_GET(_var) \
  2142. (((_var) & HTT_RING_IF_STATS_NUM_ELEMS_M) >> \
  2143. HTT_RING_IF_STATS_NUM_ELEMS_S)
  2144. #define HTT_RING_IF_STATS_NUM_ELEMS_SET(_var, _val) \
  2145. do { \
  2146. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_NUM_ELEMS, _val); \
  2147. ((_var) |= ((_val) << HTT_RING_IF_STATS_NUM_ELEMS_S)); \
  2148. } while (0)
  2149. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_GET(_var) \
  2150. (((_var) & HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_M) >> \
  2151. HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_S)
  2152. #define HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_SET(_var, _val) \
  2153. do { \
  2154. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_PREFETCH_TAIL_IDX, _val); \
  2155. ((_var) |= ((_val) << HTT_RING_IF_STATS_PREFETCH_TAIL_IDX_S)); \
  2156. } while (0)
  2157. /* DWORD head_idx__tail_idx */
  2158. #define HTT_RING_IF_STATS_HEAD_IDX_M 0x0000ffff
  2159. #define HTT_RING_IF_STATS_HEAD_IDX_S 0
  2160. #define HTT_RING_IF_STATS_TAIL_IDX_M 0xffff0000
  2161. #define HTT_RING_IF_STATS_TAIL_IDX_S 16
  2162. #define HTT_RING_IF_STATS_HEAD_IDX_GET(_var) \
  2163. (((_var) & HTT_RING_IF_STATS_HEAD_IDX_M) >> \
  2164. HTT_RING_IF_STATS_HEAD_IDX_S)
  2165. #define HTT_RING_IF_STATS_HEAD_IDX_SET(_var, _val) \
  2166. do { \
  2167. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_HEAD_IDX, _val); \
  2168. ((_var) |= ((_val) << HTT_RING_IF_STATS_HEAD_IDX_S)); \
  2169. } while (0)
  2170. #define HTT_RING_IF_STATS_TAIL_IDX_GET(_var) \
  2171. (((_var) & HTT_RING_IF_STATS_TAIL_IDX_M) >> \
  2172. HTT_RING_IF_STATS_TAIL_IDX_S)
  2173. #define HTT_RING_IF_STATS_TAIL_IDX_SET(_var, _val) \
  2174. do { \
  2175. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_TAIL_IDX, _val); \
  2176. ((_var) |= ((_val) << HTT_RING_IF_STATS_TAIL_IDX_S)); \
  2177. } while (0)
  2178. /* DWORD shadow_head_idx__shadow_tail_idx */
  2179. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_M 0x0000ffff
  2180. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_S 0
  2181. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_M 0xffff0000
  2182. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_S 16
  2183. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_GET(_var) \
  2184. (((_var) & HTT_RING_IF_STATS_SHADOW_HEAD_IDX_M) >> \
  2185. HTT_RING_IF_STATS_SHADOW_HEAD_IDX_S)
  2186. #define HTT_RING_IF_STATS_SHADOW_HEAD_IDX_SET(_var, _val) \
  2187. do { \
  2188. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_SHADOW_HEAD_IDX, _val); \
  2189. ((_var) |= ((_val) << HTT_RING_IF_STATS_SHADOW_HEAD_IDX_S)); \
  2190. } while (0)
  2191. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_GET(_var) \
  2192. (((_var) & HTT_RING_IF_STATS_SHADOW_TAIL_IDX_M) >> \
  2193. HTT_RING_IF_STATS_SHADOW_TAIL_IDX_S)
  2194. #define HTT_RING_IF_STATS_SHADOW_TAIL_IDX_SET(_var, _val) \
  2195. do { \
  2196. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_SHADOW_TAIL_IDX, _val); \
  2197. ((_var) |= ((_val) << HTT_RING_IF_STATS_SHADOW_TAIL_IDX_S)); \
  2198. } while (0)
  2199. /* DWORD lwm_thresh__hwm_thresh */
  2200. #define HTT_RING_IF_STATS_LWM_THRESHOLD_M 0x0000ffff
  2201. #define HTT_RING_IF_STATS_LWM_THRESHOLD_S 0
  2202. #define HTT_RING_IF_STATS_HWM_THRESHOLD_M 0xffff0000
  2203. #define HTT_RING_IF_STATS_HWM_THRESHOLD_S 16
  2204. #define HTT_RING_IF_STATS_LWM_THRESHOLD_GET(_var) \
  2205. (((_var) & HTT_RING_IF_STATS_LWM_THRESHOLD_M) >> \
  2206. HTT_RING_IF_STATS_LWM_THRESHOLD_S)
  2207. #define HTT_RING_IF_STATS_LWM_THRESHOLD_SET(_var, _val) \
  2208. do { \
  2209. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_LWM_THRESHOLD, _val); \
  2210. ((_var) |= ((_val) << HTT_RING_IF_STATS_LWM_THRESHOLD_S)); \
  2211. } while (0)
  2212. #define HTT_RING_IF_STATS_HWM_THRESHOLD_GET(_var) \
  2213. (((_var) & HTT_RING_IF_STATS_HWM_THRESHOLD_M) >> \
  2214. HTT_RING_IF_STATS_HWM_THRESHOLD_S)
  2215. #define HTT_RING_IF_STATS_HWM_THRESHOLD_SET(_var, _val) \
  2216. do { \
  2217. HTT_CHECK_SET_VAL(HTT_RING_IF_STATS_HWM_THRESHOLD, _val); \
  2218. ((_var) |= ((_val) << HTT_RING_IF_STATS_HWM_THRESHOLD_S)); \
  2219. } while (0)
  2220. #define HTT_STATS_LOW_WM_BINS 5
  2221. #define HTT_STATS_HIGH_WM_BINS 5
  2222. typedef struct {
  2223. A_UINT32 base_addr; /* DWORD aligned base memory address of the ring */
  2224. A_UINT32 elem_size; /* size of each ring element */
  2225. /* BIT [15 : 0] :- num_elems
  2226. * BIT [31 : 16] :- prefetch_tail_idx
  2227. */
  2228. A_UINT32 num_elems__prefetch_tail_idx;
  2229. /* BIT [15 : 0] :- head_idx
  2230. * BIT [31 : 16] :- tail_idx
  2231. */
  2232. A_UINT32 head_idx__tail_idx;
  2233. /* BIT [15 : 0] :- shadow_head_idx
  2234. * BIT [31 : 16] :- shadow_tail_idx
  2235. */
  2236. A_UINT32 shadow_head_idx__shadow_tail_idx;
  2237. A_UINT32 num_tail_incr;
  2238. /* BIT [15 : 0] :- lwm_thresh
  2239. * BIT [31 : 16] :- hwm_thresh
  2240. */
  2241. A_UINT32 lwm_thresh__hwm_thresh;
  2242. A_UINT32 overrun_hit_count;
  2243. A_UINT32 underrun_hit_count;
  2244. A_UINT32 prod_blockwait_count;
  2245. A_UINT32 cons_blockwait_count;
  2246. A_UINT32 low_wm_hit_count[HTT_STATS_LOW_WM_BINS]; /* FIX THIS: explain what each array element is for */
  2247. A_UINT32 high_wm_hit_count[HTT_STATS_HIGH_WM_BINS]; /* FIX THIS: explain what each array element is for */
  2248. } htt_ring_if_stats_tlv;
  2249. #define HTT_RING_IF_CMN_MAC_ID_M 0x000000ff
  2250. #define HTT_RING_IF_CMN_MAC_ID_S 0
  2251. #define HTT_RING_IF_CMN_MAC_ID_GET(_var) \
  2252. (((_var) & HTT_RING_IF_CMN_MAC_ID_M) >> \
  2253. HTT_RING_IF_CMN_MAC_ID_S)
  2254. #define HTT_RING_IF_CMN_MAC_ID_SET(_var, _val) \
  2255. do { \
  2256. HTT_CHECK_SET_VAL(HTT_RING_IF_CMN_MAC_ID, _val); \
  2257. ((_var) |= ((_val) << HTT_RING_IF_CMN_MAC_ID_S)); \
  2258. } while (0)
  2259. typedef struct {
  2260. htt_tlv_hdr_t tlv_hdr;
  2261. /* BIT [ 7 : 0] :- mac_id
  2262. * BIT [31 : 8] :- reserved
  2263. */
  2264. A_UINT32 mac_id__word;
  2265. A_UINT32 num_records;
  2266. } htt_ring_if_cmn_tlv;
  2267. /* STATS_TYPE : HTT_DBG_EXT_STATS_RING_IF_INFO
  2268. * TLV_TAGS:
  2269. * - HTT_STATS_RING_IF_CMN_TAG
  2270. * - HTT_STATS_STRING_TAG
  2271. * - HTT_STATS_RING_IF_TAG
  2272. */
  2273. /* NOTE:
  2274. * This structure is for documentation, and cannot be safely used directly.
  2275. * Instead, use the constituent TLV structures to fill/parse.
  2276. */
  2277. typedef struct {
  2278. htt_ring_if_cmn_tlv cmn_tlv;
  2279. /* Variable based on the Number of records. */
  2280. struct _ring_if {
  2281. htt_stats_string_tlv ring_str_tlv;
  2282. htt_ring_if_stats_tlv ring_tlv;
  2283. } r[1];
  2284. } htt_ring_if_stats_t;
  2285. /* == SFM STATS == */
  2286. #define HTT_SFM_CLIENT_USER_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2287. /* NOTE: Variable length TLV, use length spec to infer array size */
  2288. typedef struct {
  2289. htt_tlv_hdr_t tlv_hdr;
  2290. /* Number of DWORDS used per user and per client */
  2291. A_UINT32 dwords_used_by_user_n[1];
  2292. } htt_sfm_client_user_tlv_v;
  2293. typedef struct {
  2294. htt_tlv_hdr_t tlv_hdr;
  2295. /* Client ID */
  2296. A_UINT32 client_id;
  2297. /* Minimum number of buffers */
  2298. A_UINT32 buf_min;
  2299. /* Maximum number of buffers */
  2300. A_UINT32 buf_max;
  2301. /* Number of Busy buffers */
  2302. A_UINT32 buf_busy;
  2303. /* Number of Allocated buffers */
  2304. A_UINT32 buf_alloc;
  2305. /* Number of Available/Usable buffers */
  2306. A_UINT32 buf_avail;
  2307. /* Number of users */
  2308. A_UINT32 num_users;
  2309. } htt_sfm_client_tlv;
  2310. #define HTT_SFM_CMN_MAC_ID_M 0x000000ff
  2311. #define HTT_SFM_CMN_MAC_ID_S 0
  2312. #define HTT_SFM_CMN_MAC_ID_GET(_var) \
  2313. (((_var) & HTT_SFM_CMN_MAC_ID_M) >> \
  2314. HTT_SFM_CMN_MAC_ID_S)
  2315. #define HTT_SFM_CMN_MAC_ID_SET(_var, _val) \
  2316. do { \
  2317. HTT_CHECK_SET_VAL(HTT_SFM_CMN_MAC_ID, _val); \
  2318. ((_var) |= ((_val) << HTT_SFM_CMN_MAC_ID_S)); \
  2319. } while (0)
  2320. typedef struct {
  2321. htt_tlv_hdr_t tlv_hdr;
  2322. /* BIT [ 7 : 0] :- mac_id
  2323. * BIT [31 : 8] :- reserved
  2324. */
  2325. A_UINT32 mac_id__word;
  2326. /* Indicates the total number of 128 byte buffers in the CMEM that are available for buffer sharing */
  2327. A_UINT32 buf_total;
  2328. /* Indicates for certain client or all the clients there is no dowrd saved in SFM, refer to SFM_R1_MEM_EMPTY */
  2329. A_UINT32 mem_empty;
  2330. /* DEALLOCATE_BUFFERS, refer to register SFM_R0_DEALLOCATE_BUFFERS */
  2331. A_UINT32 deallocate_bufs;
  2332. /* Number of Records */
  2333. A_UINT32 num_records;
  2334. } htt_sfm_cmn_tlv;
  2335. /* STATS_TYPE : HTT_DBG_EXT_STATS_RING_IF_INFO
  2336. * TLV_TAGS:
  2337. * - HTT_STATS_SFM_CMN_TAG
  2338. * - HTT_STATS_STRING_TAG
  2339. * - HTT_STATS_SFM_CLIENT_TAG
  2340. * - HTT_STATS_SFM_CLIENT_USER_TAG
  2341. */
  2342. /* NOTE:
  2343. * This structure is for documentation, and cannot be safely used directly.
  2344. * Instead, use the constituent TLV structures to fill/parse.
  2345. */
  2346. typedef struct {
  2347. htt_sfm_cmn_tlv cmn_tlv;
  2348. /* Variable based on the Number of records. */
  2349. struct _sfm_client {
  2350. htt_stats_string_tlv client_str_tlv;
  2351. htt_sfm_client_tlv client_tlv;
  2352. htt_sfm_client_user_tlv_v user_tlv;
  2353. } r[1];
  2354. } htt_sfm_stats_t;
  2355. /* == SRNG STATS == */
  2356. /* DWORD mac_id__ring_id__arena__ep */
  2357. #define HTT_SRING_STATS_MAC_ID_M 0x000000ff
  2358. #define HTT_SRING_STATS_MAC_ID_S 0
  2359. #define HTT_SRING_STATS_RING_ID_M 0x0000ff00
  2360. #define HTT_SRING_STATS_RING_ID_S 8
  2361. #define HTT_SRING_STATS_ARENA_M 0x00ff0000
  2362. #define HTT_SRING_STATS_ARENA_S 16
  2363. #define HTT_SRING_STATS_EP_TYPE_M 0x01000000
  2364. #define HTT_SRING_STATS_EP_TYPE_S 24
  2365. #define HTT_SRING_STATS_MAC_ID_GET(_var) \
  2366. (((_var) & HTT_SRING_STATS_MAC_ID_M) >> \
  2367. HTT_SRING_STATS_MAC_ID_S)
  2368. #define HTT_SRING_STATS_MAC_ID_SET(_var, _val) \
  2369. do { \
  2370. HTT_CHECK_SET_VAL(HTT_SRING_STATS_MAC_ID, _val); \
  2371. ((_var) |= ((_val) << HTT_SRING_STATS_MAC_ID_S)); \
  2372. } while (0)
  2373. #define HTT_SRING_STATS_RING_ID_GET(_var) \
  2374. (((_var) & HTT_SRING_STATS_RING_ID_M) >> \
  2375. HTT_SRING_STATS_RING_ID_S)
  2376. #define HTT_SRING_STATS_RING_ID_SET(_var, _val) \
  2377. do { \
  2378. HTT_CHECK_SET_VAL(HTT_SRING_STATS_RING_ID, _val); \
  2379. ((_var) |= ((_val) << HTT_SRING_STATS_RING_ID_S)); \
  2380. } while (0)
  2381. #define HTT_SRING_STATS_ARENA_GET(_var) \
  2382. (((_var) & HTT_SRING_STATS_ARENA_M) >> \
  2383. HTT_SRING_STATS_ARENA_S)
  2384. #define HTT_SRING_STATS_ARENA_SET(_var, _val) \
  2385. do { \
  2386. HTT_CHECK_SET_VAL(HTT_SRING_STATS_ARENA, _val); \
  2387. ((_var) |= ((_val) << HTT_SRING_STATS_ARENA_S)); \
  2388. } while (0)
  2389. #define HTT_SRING_STATS_EP_TYPE_GET(_var) \
  2390. (((_var) & HTT_SRING_STATS_EP_TYPE_M) >> \
  2391. HTT_SRING_STATS_EP_TYPE_S)
  2392. #define HTT_SRING_STATS_EP_TYPE_SET(_var, _val) \
  2393. do { \
  2394. HTT_CHECK_SET_VAL(HTT_SRING_STATS_EP_TYPE, _val); \
  2395. ((_var) |= ((_val) << HTT_SRING_STATS_EP_TYPE_S)); \
  2396. } while (0)
  2397. /* DWORD num_avail_words__num_valid_words */
  2398. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_M 0x0000ffff
  2399. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_S 0
  2400. #define HTT_SRING_STATS_NUM_VALID_WORDS_M 0xffff0000
  2401. #define HTT_SRING_STATS_NUM_VALID_WORDS_S 16
  2402. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_GET(_var) \
  2403. (((_var) & HTT_SRING_STATS_NUM_AVAIL_WORDS_M) >> \
  2404. HTT_SRING_STATS_NUM_AVAIL_WORDS_S)
  2405. #define HTT_SRING_STATS_NUM_AVAIL_WORDS_SET(_var, _val) \
  2406. do { \
  2407. HTT_CHECK_SET_VAL(HTT_SRING_STATS_NUM_AVAIL_WORDS, _val); \
  2408. ((_var) |= ((_val) << HTT_SRING_STATS_NUM_AVAIL_WORDS_S)); \
  2409. } while (0)
  2410. #define HTT_SRING_STATS_NUM_VALID_WORDS_GET(_var) \
  2411. (((_var) & HTT_SRING_STATS_NUM_VALID_WORDS_M) >> \
  2412. HTT_SRING_STATS_NUM_VALID_WORDS_S)
  2413. #define HTT_SRING_STATS_NUM_VALID_WORDS_SET(_var, _val) \
  2414. do { \
  2415. HTT_CHECK_SET_VAL(HTT_SRING_STATS_NUM_VALID_WORDS, _val); \
  2416. ((_var) |= ((_val) << HTT_SRING_STATS_NUM_VALID_WORDS_S)); \
  2417. } while (0)
  2418. /* DWORD head_ptr__tail_ptr */
  2419. #define HTT_SRING_STATS_HEAD_PTR_M 0x0000ffff
  2420. #define HTT_SRING_STATS_HEAD_PTR_S 0
  2421. #define HTT_SRING_STATS_TAIL_PTR_M 0xffff0000
  2422. #define HTT_SRING_STATS_TAIL_PTR_S 16
  2423. #define HTT_SRING_STATS_HEAD_PTR_GET(_var) \
  2424. (((_var) & HTT_SRING_STATS_HEAD_PTR_M) >> \
  2425. HTT_SRING_STATS_HEAD_PTR_S)
  2426. #define HTT_SRING_STATS_HEAD_PTR_SET(_var, _val) \
  2427. do { \
  2428. HTT_CHECK_SET_VAL(HTT_SRING_STATS_HEAD_PTR, _val); \
  2429. ((_var) |= ((_val) << HTT_SRING_STATS_HEAD_PTR_S)); \
  2430. } while (0)
  2431. #define HTT_SRING_STATS_TAIL_PTR_GET(_var) \
  2432. (((_var) & HTT_SRING_STATS_TAIL_PTR_M) >> \
  2433. HTT_SRING_STATS_TAIL_PTR_S)
  2434. #define HTT_SRING_STATS_TAIL_PTR_SET(_var, _val) \
  2435. do { \
  2436. HTT_CHECK_SET_VAL(HTT_SRING_STATS_TAIL_PTR, _val); \
  2437. ((_var) |= ((_val) << HTT_SRING_STATS_TAIL_PTR_S)); \
  2438. } while (0)
  2439. /* DWORD consumer_empty__producer_full */
  2440. #define HTT_SRING_STATS_CONSUMER_EMPTY_M 0x0000ffff
  2441. #define HTT_SRING_STATS_CONSUMER_EMPTY_S 0
  2442. #define HTT_SRING_STATS_PRODUCER_FULL_M 0xffff0000
  2443. #define HTT_SRING_STATS_PRODUCER_FULL_S 16
  2444. #define HTT_SRING_STATS_CONSUMER_EMPTY_GET(_var) \
  2445. (((_var) & HTT_SRING_STATS_CONSUMER_EMPTY_M) >> \
  2446. HTT_SRING_STATS_CONSUMER_EMPTY_S)
  2447. #define HTT_SRING_STATS_CONSUMER_EMPTY_SET(_var, _val) \
  2448. do { \
  2449. HTT_CHECK_SET_VAL(HTT_SRING_STATS_CONSUMER_EMPTY, _val); \
  2450. ((_var) |= ((_val) << HTT_SRING_STATS_CONSUMER_EMPTY_S)); \
  2451. } while (0)
  2452. #define HTT_SRING_STATS_PRODUCER_FULL_GET(_var) \
  2453. (((_var) & HTT_SRING_STATS_PRODUCER_FULL_M) >> \
  2454. HTT_SRING_STATS_PRODUCER_FULL_S)
  2455. #define HTT_SRING_STATS_PRODUCER_FULL_SET(_var, _val) \
  2456. do { \
  2457. HTT_CHECK_SET_VAL(HTT_SRING_STATS_PRODUCER_FULL, _val); \
  2458. ((_var) |= ((_val) << HTT_SRING_STATS_PRODUCER_FULL_S)); \
  2459. } while (0)
  2460. /* DWORD prefetch_count__internal_tail_ptr */
  2461. #define HTT_SRING_STATS_PREFETCH_COUNT_M 0x0000ffff
  2462. #define HTT_SRING_STATS_PREFETCH_COUNT_S 0
  2463. #define HTT_SRING_STATS_INTERNAL_TP_M 0xffff0000
  2464. #define HTT_SRING_STATS_INTERNAL_TP_S 16
  2465. #define HTT_SRING_STATS_PREFETCH_COUNT_GET(_var) \
  2466. (((_var) & HTT_SRING_STATS_PREFETCH_COUNT_M) >> \
  2467. HTT_SRING_STATS_PREFETCH_COUNT_S)
  2468. #define HTT_SRING_STATS_PREFETCH_COUNT_SET(_var, _val) \
  2469. do { \
  2470. HTT_CHECK_SET_VAL(HTT_SRING_STATS_PREFETCH_COUNT, _val); \
  2471. ((_var) |= ((_val) << HTT_SRING_STATS_PREFETCH_COUNT_S)); \
  2472. } while (0)
  2473. #define HTT_SRING_STATS_INTERNAL_TP_GET(_var) \
  2474. (((_var) & HTT_SRING_STATS_INTERNAL_TP_M) >> \
  2475. HTT_SRING_STATS_INTERNAL_TP_S)
  2476. #define HTT_SRING_STATS_INTERNAL_TP_SET(_var, _val) \
  2477. do { \
  2478. HTT_CHECK_SET_VAL(HTT_SRING_STATS_INTERNAL_TP, _val); \
  2479. ((_var) |= ((_val) << HTT_SRING_STATS_INTERNAL_TP_S)); \
  2480. } while (0)
  2481. typedef struct {
  2482. htt_tlv_hdr_t tlv_hdr;
  2483. /* BIT [ 7 : 0] :- mac_id
  2484. * BIT [15 : 8] :- ring_id
  2485. * BIT [23 : 16] :- arena 0 -SRING_HRAM, 1 - SRING_HCRAM, 2 - SRING_HW2HW.
  2486. * BIT [24 : 24] :- EP 0 -consumer, 1 - producer
  2487. * BIT [31 : 25] :- reserved
  2488. */
  2489. A_UINT32 mac_id__ring_id__arena__ep;
  2490. A_UINT32 base_addr_lsb; /* DWORD aligned base memory address of the ring */
  2491. A_UINT32 base_addr_msb;
  2492. A_UINT32 ring_size; /* size of ring */
  2493. A_UINT32 elem_size; /* size of each ring element */
  2494. /* Ring status */
  2495. /* BIT [15 : 0] :- num_avail_words
  2496. * BIT [31 : 16] :- num_valid_words
  2497. */
  2498. A_UINT32 num_avail_words__num_valid_words;
  2499. /* Index of head and tail */
  2500. /* BIT [15 : 0] :- head_ptr
  2501. * BIT [31 : 16] :- tail_ptr
  2502. */
  2503. A_UINT32 head_ptr__tail_ptr;
  2504. /* Empty or full counter of rings */
  2505. /* BIT [15 : 0] :- consumer_empty
  2506. * BIT [31 : 16] :- producer_full
  2507. */
  2508. A_UINT32 consumer_empty__producer_full;
  2509. /* Prefetch status of consumer ring */
  2510. /* BIT [15 : 0] :- prefetch_count
  2511. * BIT [31 : 16] :- internal_tail_ptr
  2512. */
  2513. A_UINT32 prefetch_count__internal_tail_ptr;
  2514. } htt_sring_stats_tlv;
  2515. typedef struct {
  2516. htt_tlv_hdr_t tlv_hdr;
  2517. A_UINT32 num_records;
  2518. } htt_sring_cmn_tlv;
  2519. /* STATS_TYPE : HTT_DBG_EXT_STATS_SRNG_INFO
  2520. * TLV_TAGS:
  2521. * - HTT_STATS_SRING_CMN_TAG
  2522. * - HTT_STATS_STRING_TAG
  2523. * - HTT_STATS_SRING_STATS_TAG
  2524. */
  2525. /* NOTE:
  2526. * This structure is for documentation, and cannot be safely used directly.
  2527. * Instead, use the constituent TLV structures to fill/parse.
  2528. */
  2529. typedef struct {
  2530. htt_sring_cmn_tlv cmn_tlv;
  2531. /* Variable based on the Number of records. */
  2532. struct _sring_stats {
  2533. htt_stats_string_tlv sring_str_tlv;
  2534. htt_sring_stats_tlv sring_stats_tlv;
  2535. } r[1];
  2536. } htt_sring_stats_t;
  2537. /* == PDEV TX RATE CTRL STATS == */
  2538. #define HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS 12
  2539. #define HTT_TX_PDEV_STATS_NUM_GI_COUNTERS 4
  2540. #define HTT_TX_PDEV_STATS_NUM_DCM_COUNTERS 5
  2541. #define HTT_TX_PDEV_STATS_NUM_BW_COUNTERS 4
  2542. #define HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS 8
  2543. #define HTT_TX_PDEV_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  2544. #define HTT_TX_PDEV_STATS_NUM_LEGACY_CCK_STATS 4
  2545. #define HTT_TX_PDEV_STATS_NUM_LEGACY_OFDM_STATS 8
  2546. #define HTT_TX_PDEV_STATS_NUM_LTF 4
  2547. #define HTT_TX_PDEV_STATS_NUM_11AX_TRIGGER_TYPES 6
  2548. #define HTT_TX_NUM_OF_SOUNDING_STATS_WORDS \
  2549. (HTT_TX_PDEV_STATS_NUM_BW_COUNTERS * \
  2550. HTT_TX_PDEV_STATS_NUM_AX_MUMIMO_USER_STATS)
  2551. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_M 0x000000ff
  2552. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_S 0
  2553. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_GET(_var) \
  2554. (((_var) & HTT_TX_PDEV_RATE_STATS_MAC_ID_M) >> \
  2555. HTT_TX_PDEV_RATE_STATS_MAC_ID_S)
  2556. #define HTT_TX_PDEV_RATE_STATS_MAC_ID_SET(_var, _val) \
  2557. do { \
  2558. HTT_CHECK_SET_VAL(HTT_TX_PDEV_RATE_STATS_MAC_ID, _val); \
  2559. ((_var) |= ((_val) << HTT_TX_PDEV_RATE_STATS_MAC_ID_S)); \
  2560. } while (0)
  2561. typedef struct {
  2562. htt_tlv_hdr_t tlv_hdr;
  2563. /* BIT [ 7 : 0] :- mac_id
  2564. * BIT [31 : 8] :- reserved
  2565. */
  2566. A_UINT32 mac_id__word;
  2567. /* Number of tx ldpc packets */
  2568. A_UINT32 tx_ldpc;
  2569. /* Number of tx rts packets */
  2570. A_UINT32 rts_cnt;
  2571. /* RSSI value of last ack packet (units = dB above noise floor) */
  2572. A_UINT32 ack_rssi;
  2573. A_UINT32 tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2574. /* tx_xx_mcs: currently unused */
  2575. A_UINT32 tx_su_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2576. A_UINT32 tx_mu_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2577. A_UINT32 tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS]; /* element 0,1, ...7 -> NSS 1,2, ...8 */
  2578. A_UINT32 tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS]; /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
  2579. A_UINT32 tx_stbc[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2580. A_UINT32 tx_pream[HTT_TX_PDEV_STATS_NUM_PREAMBLE_TYPES];
  2581. /* Counters to track number of tx packets in each GI (400us, 800us, 1600us & 3200us) in each mcs (0-11) */
  2582. A_UINT32 tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2583. /* Counters to track packets in dcm mcs (MCS 0, 1, 3, 4) */
  2584. A_UINT32 tx_dcm[HTT_TX_PDEV_STATS_NUM_DCM_COUNTERS];
  2585. /* Number of CTS-acknowledged RTS packets */
  2586. A_UINT32 rts_success;
  2587. /*
  2588. * Counters for legacy 11a and 11b transmissions.
  2589. *
  2590. * The index corresponds to:
  2591. *
  2592. * CCK: 0: 1 Mbps, 1: 2 Mbps, 2: 5.5 Mbps, 3: 11 Mbps
  2593. *
  2594. * OFDM: 0: 6 Mbps, 1: 9 Mbps, 2: 12 Mbps, 3: 18 Mbps,
  2595. * 4: 24 Mbps, 5: 36 Mbps, 6: 48 Mbps, 7: 54 Mbps
  2596. */
  2597. A_UINT32 tx_legacy_cck_rate[HTT_TX_PDEV_STATS_NUM_LEGACY_CCK_STATS];
  2598. A_UINT32 tx_legacy_ofdm_rate[HTT_TX_PDEV_STATS_NUM_LEGACY_OFDM_STATS];
  2599. A_UINT32 ac_mu_mimo_tx_ldpc;
  2600. A_UINT32 ax_mu_mimo_tx_ldpc;
  2601. A_UINT32 ofdma_tx_ldpc;
  2602. /*
  2603. * Counters for 11ax HE LTF selection during TX.
  2604. *
  2605. * The index corresponds to:
  2606. *
  2607. * 0: unused, 1: 1x LTF, 2: 2x LTF, 3: 4x LTF
  2608. */
  2609. A_UINT32 tx_he_ltf[HTT_TX_PDEV_STATS_NUM_LTF];
  2610. A_UINT32 ac_mu_mimo_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2611. A_UINT32 ax_mu_mimo_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2612. A_UINT32 ofdma_tx_mcs[HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2613. A_UINT32 ac_mu_mimo_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  2614. A_UINT32 ax_mu_mimo_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  2615. A_UINT32 ofdma_tx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  2616. A_UINT32 ac_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  2617. A_UINT32 ax_mu_mimo_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  2618. A_UINT32 ofdma_tx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  2619. A_UINT32 ac_mu_mimo_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2620. A_UINT32 ax_mu_mimo_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2621. A_UINT32 ofdma_tx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_TX_PDEV_STATS_NUM_MCS_COUNTERS];
  2622. A_UINT32 trigger_type_11ax[HTT_TX_PDEV_STATS_NUM_11AX_TRIGGER_TYPES];
  2623. A_UINT32 tx_11ax_su_ext;
  2624. } htt_tx_pdev_rate_stats_tlv;
  2625. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_TX_RATE
  2626. * TLV_TAGS:
  2627. * - HTT_STATS_TX_PDEV_RATE_STATS_TAG
  2628. */
  2629. /* NOTE:
  2630. * This structure is for documentation, and cannot be safely used directly.
  2631. * Instead, use the constituent TLV structures to fill/parse.
  2632. */
  2633. typedef struct {
  2634. htt_tx_pdev_rate_stats_tlv rate_tlv;
  2635. } htt_tx_pdev_rate_stats_t;
  2636. /* == PDEV RX RATE CTRL STATS == */
  2637. #define HTT_RX_PDEV_STATS_NUM_LEGACY_CCK_STATS 4
  2638. #define HTT_RX_PDEV_STATS_NUM_LEGACY_OFDM_STATS 8
  2639. #define HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS 12
  2640. #define HTT_RX_PDEV_STATS_NUM_GI_COUNTERS 4
  2641. #define HTT_RX_PDEV_STATS_NUM_DCM_COUNTERS 5
  2642. #define HTT_RX_PDEV_STATS_NUM_BW_COUNTERS 4
  2643. #define HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS 8
  2644. #define HTT_RX_PDEV_STATS_NUM_PREAMBLE_TYPES HTT_STATS_PREAM_COUNT
  2645. #define HTT_RX_PDEV_MAX_OFDMA_NUM_USER 8
  2646. #define HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER 8
  2647. #define HTT_RX_PDEV_STATS_RXEVM_MAX_PILOTS_PER_NSS 16
  2648. #define HTT_RX_PDEV_STATS_NUM_RU_SIZE_COUNTERS 6
  2649. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_M 0x000000ff
  2650. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_S 0
  2651. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_GET(_var) \
  2652. (((_var) & HTT_RX_PDEV_RATE_STATS_MAC_ID_M) >> \
  2653. HTT_RX_PDEV_RATE_STATS_MAC_ID_S)
  2654. #define HTT_RX_PDEV_RATE_STATS_MAC_ID_SET(_var, _val) \
  2655. do { \
  2656. HTT_CHECK_SET_VAL(HTT_RX_PDEV_RATE_STATS_MAC_ID, _val); \
  2657. ((_var) |= ((_val) << HTT_RX_PDEV_RATE_STATS_MAC_ID_S)); \
  2658. } while (0)
  2659. typedef struct {
  2660. htt_tlv_hdr_t tlv_hdr;
  2661. /* BIT [ 7 : 0] :- mac_id
  2662. * BIT [31 : 8] :- reserved
  2663. */
  2664. A_UINT32 mac_id__word;
  2665. A_UINT32 nsts;
  2666. /* Number of rx ldpc packets */
  2667. A_UINT32 rx_ldpc;
  2668. /* Number of rx rts packets */
  2669. A_UINT32 rts_cnt;
  2670. A_UINT32 rssi_mgmt; /* units = dB above noise floor */
  2671. A_UINT32 rssi_data; /* units = dB above noise floor */
  2672. A_UINT32 rssi_comb; /* units = dB above noise floor */
  2673. A_UINT32 rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2674. A_UINT32 rx_nss[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS]; /* element 0,1, ...7 -> NSS 1,2, ...8 */
  2675. A_UINT32 rx_dcm[HTT_RX_PDEV_STATS_NUM_DCM_COUNTERS];
  2676. A_UINT32 rx_stbc[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2677. A_UINT32 rx_bw[HTT_RX_PDEV_STATS_NUM_BW_COUNTERS]; /* element 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160 and 80+80 MHz */
  2678. A_UINT32 rx_pream[HTT_RX_PDEV_STATS_NUM_PREAMBLE_TYPES];
  2679. A_UINT8 rssi_chain[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS]; /* units = dB above noise floor */
  2680. /* Counters to track number of rx packets in each GI in each mcs (0-11) */
  2681. A_UINT32 rx_gi[HTT_RX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2682. A_INT32 rssi_in_dbm; /* rx Signal Strength value in dBm unit */
  2683. A_UINT32 rx_11ax_su_ext;
  2684. A_UINT32 rx_11ac_mumimo;
  2685. A_UINT32 rx_11ax_mumimo;
  2686. A_UINT32 rx_11ax_ofdma;
  2687. A_UINT32 txbf;
  2688. A_UINT32 rx_legacy_cck_rate[HTT_RX_PDEV_STATS_NUM_LEGACY_CCK_STATS];
  2689. A_UINT32 rx_legacy_ofdm_rate[HTT_RX_PDEV_STATS_NUM_LEGACY_OFDM_STATS];
  2690. A_UINT32 rx_active_dur_us_low;
  2691. A_UINT32 rx_active_dur_us_high;
  2692. A_UINT32 rx_11ax_ul_ofdma;
  2693. A_UINT32 ul_ofdma_rx_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2694. A_UINT32 ul_ofdma_rx_gi[HTT_TX_PDEV_STATS_NUM_GI_COUNTERS][HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2695. A_UINT32 ul_ofdma_rx_nss[HTT_TX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  2696. A_UINT32 ul_ofdma_rx_bw[HTT_TX_PDEV_STATS_NUM_BW_COUNTERS];
  2697. A_UINT32 ul_ofdma_rx_stbc;
  2698. A_UINT32 ul_ofdma_rx_ldpc;
  2699. /* record the stats for each user index */
  2700. A_UINT32 rx_ulofdma_non_data_ppdu[HTT_RX_PDEV_MAX_OFDMA_NUM_USER]; /* ppdu level */
  2701. A_UINT32 rx_ulofdma_data_ppdu[HTT_RX_PDEV_MAX_OFDMA_NUM_USER]; /* ppdu level */
  2702. A_UINT32 rx_ulofdma_mpdu_ok[HTT_RX_PDEV_MAX_OFDMA_NUM_USER]; /* mpdu level */
  2703. A_UINT32 rx_ulofdma_mpdu_fail[HTT_RX_PDEV_MAX_OFDMA_NUM_USER]; /* mpdu level */
  2704. A_UINT32 nss_count;
  2705. A_UINT32 pilot_count;
  2706. /* RxEVM stats in dB */
  2707. A_INT32 rx_pilot_evm_dB[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_RXEVM_MAX_PILOTS_PER_NSS];
  2708. /* rx_pilot_evm_dB_mean:
  2709. * EVM mean across pilots, computed as
  2710. * mean(10*log10(rx_pilot_evm_linear)) = mean(rx_pilot_evm_dB)
  2711. */
  2712. A_INT32 rx_pilot_evm_dB_mean[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS];
  2713. A_INT8 rx_ul_fd_rssi[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_MAX_OFDMA_NUM_USER]; /* dBm units */
  2714. /* per_chain_rssi_pkt_type:
  2715. * This field shows what type of rx frame the per-chain RSSI was computed
  2716. * on, by recording the frame type and sub-type as bit-fields within this
  2717. * field:
  2718. * BIT [3 : 0] :- IEEE80211_FC0_TYPE
  2719. * BIT [7 : 4] :- IEEE80211_FC0_SUBTYPE
  2720. * BIT [31 : 8] :- Reserved
  2721. */
  2722. A_UINT32 per_chain_rssi_pkt_type;
  2723. A_INT8 rx_per_chain_rssi_in_dbm[HTT_RX_PDEV_STATS_NUM_SPATIAL_STREAMS][HTT_RX_PDEV_STATS_NUM_BW_COUNTERS];
  2724. A_UINT32 rx_su_ndpa;
  2725. A_UINT32 rx_11ax_su_txbf_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2726. A_UINT32 rx_mu_ndpa;
  2727. A_UINT32 rx_11ax_mu_txbf_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2728. A_UINT32 rx_br_poll;
  2729. A_UINT32 rx_11ax_dl_ofdma_mcs[HTT_RX_PDEV_STATS_NUM_MCS_COUNTERS];
  2730. A_UINT32 rx_11ax_dl_ofdma_ru[HTT_RX_PDEV_STATS_NUM_RU_SIZE_COUNTERS];
  2731. A_UINT32 rx_ulmumimo_non_data_ppdu[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER]; /* ppdu level */
  2732. A_UINT32 rx_ulmumimo_data_ppdu[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER]; /* ppdu level */
  2733. A_UINT32 rx_ulmumimo_mpdu_ok[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER]; /* mpdu level */
  2734. A_UINT32 rx_ulmumimo_mpdu_fail[HTT_RX_PDEV_MAX_ULMUMIMO_NUM_USER]; /* mpdu level */
  2735. } htt_rx_pdev_rate_stats_tlv;
  2736. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_RX_RATE
  2737. * TLV_TAGS:
  2738. * - HTT_STATS_RX_PDEV_RATE_STATS_TAG
  2739. */
  2740. /* NOTE:
  2741. * This structure is for documentation, and cannot be safely used directly.
  2742. * Instead, use the constituent TLV structures to fill/parse.
  2743. */
  2744. typedef struct {
  2745. htt_rx_pdev_rate_stats_tlv rate_tlv;
  2746. } htt_rx_pdev_rate_stats_t;
  2747. /* == RX PDEV/SOC STATS == */
  2748. typedef struct {
  2749. htt_tlv_hdr_t tlv_hdr;
  2750. /* Num Packets received on REO FW ring */
  2751. A_UINT32 fw_reo_ring_data_msdu;
  2752. /* Num bc/mc packets indicated from fw to host */
  2753. A_UINT32 fw_to_host_data_msdu_bcmc;
  2754. /* Num unicast packets indicated from fw to host */
  2755. A_UINT32 fw_to_host_data_msdu_uc;
  2756. /* Num remote buf recycle from offload */
  2757. A_UINT32 ofld_remote_data_buf_recycle_cnt;
  2758. /* Num remote free buf given to offload */
  2759. A_UINT32 ofld_remote_free_buf_indication_cnt;
  2760. /* Num unicast packets from local path indicated to host */
  2761. A_UINT32 ofld_buf_to_host_data_msdu_uc;
  2762. /* Num unicast packets from REO indicated to host */
  2763. A_UINT32 reo_fw_ring_to_host_data_msdu_uc;
  2764. /* Num Packets received from WBM SW1 ring */
  2765. A_UINT32 wbm_sw_ring_reap;
  2766. /* Num packets from WBM forwarded from fw to host via WBM */
  2767. A_UINT32 wbm_forward_to_host_cnt;
  2768. /* Num packets from WBM recycled to target refill ring */
  2769. A_UINT32 wbm_target_recycle_cnt;
  2770. /* Total Num of recycled to refill ring, including packets from WBM and REO */
  2771. A_UINT32 target_refill_ring_recycle_cnt;
  2772. } htt_rx_soc_fw_stats_tlv;
  2773. #define HTT_RX_SOC_FW_REFILL_RING_EMPTY_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2774. /* NOTE: Variable length TLV, use length spec to infer array size */
  2775. typedef struct {
  2776. htt_tlv_hdr_t tlv_hdr;
  2777. /* Num ring empty encountered */
  2778. A_UINT32 refill_ring_empty_cnt[1]; /* HTT_RX_STATS_REFILL_MAX_RING */
  2779. } htt_rx_soc_fw_refill_ring_empty_tlv_v;
  2780. #define HTT_RX_SOC_FW_REFILL_RING_EMPTY_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  2781. /* NOTE: Variable length TLV, use length spec to infer array size */
  2782. typedef struct {
  2783. htt_tlv_hdr_t tlv_hdr;
  2784. /* Num total buf refilled from refill ring */
  2785. A_UINT32 refill_ring_num_refill[1]; /* HTT_RX_STATS_REFILL_MAX_RING */
  2786. } htt_rx_soc_fw_refill_ring_num_refill_tlv_v;
  2787. /* RXDMA error code from WBM released packets */
  2788. typedef enum {
  2789. HTT_RX_RXDMA_OVERFLOW_ERR = 0,
  2790. HTT_RX_RXDMA_MPDU_LENGTH_ERR = 1,
  2791. HTT_RX_RXDMA_FCS_ERR = 2,
  2792. HTT_RX_RXDMA_DECRYPT_ERR = 3,
  2793. HTT_RX_RXDMA_TKIP_MIC_ERR = 4,
  2794. HTT_RX_RXDMA_UNECRYPTED_ERR = 5,
  2795. HTT_RX_RXDMA_MSDU_LEN_ERR = 6,
  2796. HTT_RX_RXDMA_MSDU_LIMIT_ERR = 7,
  2797. HTT_RX_RXDMA_WIFI_PARSE_ERR = 8,
  2798. HTT_RX_RXDMA_AMSDU_PARSE_ERR = 9,
  2799. HTT_RX_RXDMA_SA_TIMEOUT_ERR = 10,
  2800. HTT_RX_RXDMA_DA_TIMEOUT_ERR = 11,
  2801. HTT_RX_RXDMA_FLOW_TIMEOUT_ERR = 12,
  2802. HTT_RX_RXDMA_FLUSH_REQUEST = 13,
  2803. HTT_RX_RXDMA_ERR_CODE_RVSD0 = 14,
  2804. HTT_RX_RXDMA_ERR_CODE_RVSD1 = 15,
  2805. /*
  2806. * This MAX_ERR_CODE should not be used in any host/target messages,
  2807. * so that even though it is defined within a host/target interface
  2808. * definition header file, it isn't actually part of the host/target
  2809. * interface, and thus can be modified.
  2810. */
  2811. HTT_RX_RXDMA_MAX_ERR_CODE
  2812. } htt_rx_rxdma_error_code_enum;
  2813. /* NOTE: Variable length TLV, use length spec to infer array size */
  2814. typedef struct {
  2815. htt_tlv_hdr_t tlv_hdr;
  2816. /* NOTE:
  2817. * The mapping of RXDMA error types to rxdma_err array elements is HW dependent.
  2818. * It is expected but not required that the target will provide a rxdma_err element
  2819. * for each of the htt_rx_rxdma_error_code_enum values, up to but not including
  2820. * MAX_ERR_CODE. The host should ignore any array elements whose
  2821. * indices are >= the MAX_ERR_CODE value the host was compiled with.
  2822. */
  2823. A_UINT32 rxdma_err[1]; /* HTT_RX_RXDMA_MAX_ERR_CODE */
  2824. } htt_rx_soc_fw_refill_ring_num_rxdma_err_tlv_v;
  2825. /* REO error code from WBM released packets */
  2826. typedef enum {
  2827. HTT_RX_REO_QUEUE_DESC_ADDR_ZERO = 0,
  2828. HTT_RX_REO_QUEUE_DESC_NOT_VALID = 1,
  2829. HTT_RX_AMPDU_IN_NON_BA = 2,
  2830. HTT_RX_NON_BA_DUPLICATE = 3,
  2831. HTT_RX_BA_DUPLICATE = 4,
  2832. HTT_RX_REGULAR_FRAME_2K_JUMP = 5,
  2833. HTT_RX_BAR_FRAME_2K_JUMP = 6,
  2834. HTT_RX_REGULAR_FRAME_OOR = 7,
  2835. HTT_RX_BAR_FRAME_OOR = 8,
  2836. HTT_RX_BAR_FRAME_NO_BA_SESSION = 9,
  2837. HTT_RX_BAR_FRAME_SN_EQUALS_SSN = 10,
  2838. HTT_RX_PN_CHECK_FAILED = 11,
  2839. HTT_RX_2K_ERROR_HANDLING_FLAG_SET = 12,
  2840. HTT_RX_PN_ERROR_HANDLING_FLAG_SET = 13,
  2841. HTT_RX_QUEUE_DESCRIPTOR_BLOCKED_SET = 14,
  2842. HTT_RX_REO_ERR_CODE_RVSD = 15,
  2843. /*
  2844. * This MAX_ERR_CODE should not be used in any host/target messages,
  2845. * so that even though it is defined within a host/target interface
  2846. * definition header file, it isn't actually part of the host/target
  2847. * interface, and thus can be modified.
  2848. */
  2849. HTT_RX_REO_MAX_ERR_CODE
  2850. } htt_rx_reo_error_code_enum;
  2851. /* NOTE: Variable length TLV, use length spec to infer array size */
  2852. typedef struct {
  2853. htt_tlv_hdr_t tlv_hdr;
  2854. /* NOTE:
  2855. * The mapping of REO error types to reo_err array elements is HW dependent.
  2856. * It is expected but not required that the target will provide a rxdma_err element
  2857. * for each of the htt_rx_reo_error_code_enum values, up to but not including
  2858. * MAX_ERR_CODE. The host should ignore any array elements whose
  2859. * indices are >= the MAX_ERR_CODE value the host was compiled with.
  2860. */
  2861. A_UINT32 reo_err[1]; /* HTT_RX_REO_MAX_ERR_CODE */
  2862. } htt_rx_soc_fw_refill_ring_num_reo_err_tlv_v;
  2863. /* NOTE:
  2864. * This structure is for documentation, and cannot be safely used directly.
  2865. * Instead, use the constituent TLV structures to fill/parse.
  2866. */
  2867. typedef struct {
  2868. htt_rx_soc_fw_stats_tlv fw_tlv;
  2869. htt_rx_soc_fw_refill_ring_empty_tlv_v fw_refill_ring_empty_tlv;
  2870. htt_rx_soc_fw_refill_ring_num_refill_tlv_v fw_refill_ring_num_refill_tlv;
  2871. htt_rx_soc_fw_refill_ring_num_rxdma_err_tlv_v fw_refill_ring_num_rxdma_err_tlv;
  2872. htt_rx_soc_fw_refill_ring_num_reo_err_tlv_v fw_refill_ring_num_reo_err_tlv;
  2873. } htt_rx_soc_stats_t;
  2874. /* == RX PDEV STATS == */
  2875. #define HTT_RX_PDEV_FW_STATS_MAC_ID_M 0x000000ff
  2876. #define HTT_RX_PDEV_FW_STATS_MAC_ID_S 0
  2877. #define HTT_RX_PDEV_FW_STATS_MAC_ID_GET(_var) \
  2878. (((_var) & HTT_RX_PDEV_FW_STATS_MAC_ID_M) >> \
  2879. HTT_RX_PDEV_FW_STATS_MAC_ID_S)
  2880. #define HTT_RX_PDEV_FW_STATS_MAC_ID_SET(_var, _val) \
  2881. do { \
  2882. HTT_CHECK_SET_VAL(HTT_RX_PDEV_FW_STATS_MAC_ID, _val); \
  2883. ((_var) |= ((_val) << HTT_RX_PDEV_FW_STATS_MAC_ID_S)); \
  2884. } while (0)
  2885. #define HTT_STATS_SUBTYPE_MAX 16
  2886. typedef struct {
  2887. htt_tlv_hdr_t tlv_hdr;
  2888. /* BIT [ 7 : 0] :- mac_id
  2889. * BIT [31 : 8] :- reserved
  2890. */
  2891. A_UINT32 mac_id__word;
  2892. /* Num PPDU status processed from HW */
  2893. A_UINT32 ppdu_recvd;
  2894. /* Num MPDU across PPDUs with FCS ok */
  2895. A_UINT32 mpdu_cnt_fcs_ok;
  2896. /* Num MPDU across PPDUs with FCS err */
  2897. A_UINT32 mpdu_cnt_fcs_err;
  2898. /* Num MSDU across PPDUs */
  2899. A_UINT32 tcp_msdu_cnt;
  2900. /* Num MSDU across PPDUs */
  2901. A_UINT32 tcp_ack_msdu_cnt;
  2902. /* Num MSDU across PPDUs */
  2903. A_UINT32 udp_msdu_cnt;
  2904. /* Num MSDU across PPDUs */
  2905. A_UINT32 other_msdu_cnt;
  2906. /* Num MPDU on FW ring indicated */
  2907. A_UINT32 fw_ring_mpdu_ind;
  2908. /* Num MGMT MPDU given to protocol */
  2909. A_UINT32 fw_ring_mgmt_subtype[HTT_STATS_SUBTYPE_MAX];
  2910. /* Num ctrl MPDU given to protocol */
  2911. A_UINT32 fw_ring_ctrl_subtype[HTT_STATS_SUBTYPE_MAX];
  2912. /* Num mcast data packet received */
  2913. A_UINT32 fw_ring_mcast_data_msdu;
  2914. /* Num broadcast data packet received */
  2915. A_UINT32 fw_ring_bcast_data_msdu;
  2916. /* Num unicat data packet received */
  2917. A_UINT32 fw_ring_ucast_data_msdu;
  2918. /* Num null data packet received */
  2919. A_UINT32 fw_ring_null_data_msdu;
  2920. /* Num MPDU on FW ring dropped */
  2921. A_UINT32 fw_ring_mpdu_drop;
  2922. /* Num buf indication to offload */
  2923. A_UINT32 ofld_local_data_ind_cnt;
  2924. /* Num buf recycle from offload */
  2925. A_UINT32 ofld_local_data_buf_recycle_cnt;
  2926. /* Num buf indication to data_rx */
  2927. A_UINT32 drx_local_data_ind_cnt;
  2928. /* Num buf recycle from data_rx */
  2929. A_UINT32 drx_local_data_buf_recycle_cnt;
  2930. /* Num buf indication to protocol */
  2931. A_UINT32 local_nondata_ind_cnt;
  2932. /* Num buf recycle from protocol */
  2933. A_UINT32 local_nondata_buf_recycle_cnt;
  2934. /* Num buf fed */
  2935. A_UINT32 fw_status_buf_ring_refill_cnt;
  2936. /* Num ring empty encountered */
  2937. A_UINT32 fw_status_buf_ring_empty_cnt;
  2938. /* Num buf fed */
  2939. A_UINT32 fw_pkt_buf_ring_refill_cnt;
  2940. /* Num ring empty encountered */
  2941. A_UINT32 fw_pkt_buf_ring_empty_cnt;
  2942. /* Num buf fed */
  2943. A_UINT32 fw_link_buf_ring_refill_cnt;
  2944. /* Num ring empty encountered */
  2945. A_UINT32 fw_link_buf_ring_empty_cnt;
  2946. /* Num buf fed */
  2947. A_UINT32 host_pkt_buf_ring_refill_cnt;
  2948. /* Num ring empty encountered */
  2949. A_UINT32 host_pkt_buf_ring_empty_cnt;
  2950. /* Num buf fed */
  2951. A_UINT32 mon_pkt_buf_ring_refill_cnt;
  2952. /* Num ring empty encountered */
  2953. A_UINT32 mon_pkt_buf_ring_empty_cnt;
  2954. /* Num buf fed */
  2955. A_UINT32 mon_status_buf_ring_refill_cnt;
  2956. /* Num ring empty encountered */
  2957. A_UINT32 mon_status_buf_ring_empty_cnt;
  2958. /* Num buf fed */
  2959. A_UINT32 mon_desc_buf_ring_refill_cnt;
  2960. /* Num ring empty encountered */
  2961. A_UINT32 mon_desc_buf_ring_empty_cnt;
  2962. /* Num buf fed */
  2963. A_UINT32 mon_dest_ring_update_cnt;
  2964. /* Num ring full encountered */
  2965. A_UINT32 mon_dest_ring_full_cnt;
  2966. /* Num rx suspend is attempted */
  2967. A_UINT32 rx_suspend_cnt;
  2968. /* Num rx suspend failed */
  2969. A_UINT32 rx_suspend_fail_cnt;
  2970. /* Num rx resume attempted */
  2971. A_UINT32 rx_resume_cnt;
  2972. /* Num rx resume failed */
  2973. A_UINT32 rx_resume_fail_cnt;
  2974. /* Num rx ring switch */
  2975. A_UINT32 rx_ring_switch_cnt;
  2976. /* Num rx ring restore */
  2977. A_UINT32 rx_ring_restore_cnt;
  2978. /* Num rx flush issued */
  2979. A_UINT32 rx_flush_cnt;
  2980. /* Num rx recovery */
  2981. A_UINT32 rx_recovery_reset_cnt;
  2982. } htt_rx_pdev_fw_stats_tlv;
  2983. #define HTT_STATS_PHY_ERR_MAX 43
  2984. typedef struct {
  2985. htt_tlv_hdr_t tlv_hdr;
  2986. /* BIT [ 7 : 0] :- mac_id
  2987. * BIT [31 : 8] :- reserved
  2988. */
  2989. A_UINT32 mac_id__word;
  2990. /* Num of phy err */
  2991. A_UINT32 total_phy_err_cnt;
  2992. /* Counts of different types of phy errs
  2993. * The mapping of PHY error types to phy_err array elements is HW dependent.
  2994. * The only currently-supported mapping is shown below:
  2995. *
  2996. * 0 phyrx_err_phy_off Reception aborted due to receiving a PHY_OFF TLV
  2997. * 1 phyrx_err_synth_off
  2998. * 2 phyrx_err_ofdma_timing
  2999. * 3 phyrx_err_ofdma_signal_parity
  3000. * 4 phyrx_err_ofdma_rate_illegal
  3001. * 5 phyrx_err_ofdma_length_illegal
  3002. * 6 phyrx_err_ofdma_restart
  3003. * 7 phyrx_err_ofdma_service
  3004. * 8 phyrx_err_ppdu_ofdma_power_drop
  3005. * 9 phyrx_err_cck_blokker
  3006. * 10 phyrx_err_cck_timing
  3007. * 11 phyrx_err_cck_header_crc
  3008. * 12 phyrx_err_cck_rate_illegal
  3009. * 13 phyrx_err_cck_length_illegal
  3010. * 14 phyrx_err_cck_restart
  3011. * 15 phyrx_err_cck_service
  3012. * 16 phyrx_err_cck_power_drop
  3013. * 17 phyrx_err_ht_crc_err
  3014. * 18 phyrx_err_ht_length_illegal
  3015. * 19 phyrx_err_ht_rate_illegal
  3016. * 20 phyrx_err_ht_zlf
  3017. * 21 phyrx_err_false_radar_ext
  3018. * 22 phyrx_err_green_field
  3019. * 23 phyrx_err_bw_gt_dyn_bw
  3020. * 24 phyrx_err_leg_ht_mismatch
  3021. * 25 phyrx_err_vht_crc_error
  3022. * 26 phyrx_err_vht_siga_unsupported
  3023. * 27 phyrx_err_vht_lsig_len_invalid
  3024. * 28 phyrx_err_vht_ndp_or_zlf
  3025. * 29 phyrx_err_vht_nsym_lt_zero
  3026. * 30 phyrx_err_vht_rx_extra_symbol_mismatch
  3027. * 31 phyrx_err_vht_rx_skip_group_id0
  3028. * 32 phyrx_err_vht_rx_skip_group_id1to62
  3029. * 33 phyrx_err_vht_rx_skip_group_id63
  3030. * 34 phyrx_err_ofdm_ldpc_decoder_disabled
  3031. * 35 phyrx_err_defer_nap
  3032. * 36 phyrx_err_fdomain_timeout
  3033. * 37 phyrx_err_lsig_rel_check
  3034. * 38 phyrx_err_bt_collision
  3035. * 39 phyrx_err_unsupported_mu_feedback
  3036. * 40 phyrx_err_ppdu_tx_interrupt_rx
  3037. * 41 phyrx_err_unsupported_cbf
  3038. * 42 phyrx_err_other
  3039. */
  3040. A_UINT32 phy_err[HTT_STATS_PHY_ERR_MAX];
  3041. } htt_rx_pdev_fw_stats_phy_err_tlv;
  3042. #define HTT_RX_PDEV_FW_RING_MPDU_ERR_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3043. /* NOTE: Variable length TLV, use length spec to infer array size */
  3044. typedef struct {
  3045. htt_tlv_hdr_t tlv_hdr;
  3046. /* Num error MPDU for each RxDMA error type */
  3047. A_UINT32 fw_ring_mpdu_err[1]; /* HTT_RX_STATS_RXDMA_MAX_ERR */
  3048. } htt_rx_pdev_fw_ring_mpdu_err_tlv_v;
  3049. #define HTT_RX_PDEV_FW_MPDU_DROP_TLV_SZ(_num_elems) (sizeof(A_UINT32) * (_num_elems))
  3050. /* NOTE: Variable length TLV, use length spec to infer array size */
  3051. typedef struct {
  3052. htt_tlv_hdr_t tlv_hdr;
  3053. /* Num MPDU dropped */
  3054. A_UINT32 fw_mpdu_drop[1]; /* HTT_RX_STATS_FW_DROP_REASON_MAX */
  3055. } htt_rx_pdev_fw_mpdu_drop_tlv_v;
  3056. /* STATS_TYPE : HTT_DBG_EXT_STATS_PDEV_RX
  3057. * TLV_TAGS:
  3058. * - HTT_STATS_RX_SOC_FW_STATS_TAG (head TLV in soc_stats)
  3059. * - HTT_STATS_RX_SOC_FW_REFILL_RING_EMPTY_TAG (inside soc_stats)
  3060. * - HTT_STATS_RX_SOC_FW_REFILL_RING_NUM_REFILL_TAG (inside soc_stats)
  3061. * - HTT_STATS_RX_PDEV_FW_STATS_TAG
  3062. * - HTT_STATS_RX_PDEV_FW_RING_MPDU_ERR_TAG
  3063. * - HTT_STATS_RX_PDEV_FW_MPDU_DROP_TAG
  3064. */
  3065. /* NOTE:
  3066. * This structure is for documentation, and cannot be safely used directly.
  3067. * Instead, use the constituent TLV structures to fill/parse.
  3068. */
  3069. typedef struct {
  3070. htt_rx_soc_stats_t soc_stats;
  3071. htt_rx_pdev_fw_stats_tlv fw_stats_tlv;
  3072. htt_rx_pdev_fw_ring_mpdu_err_tlv_v fw_ring_mpdu_err_tlv;
  3073. htt_rx_pdev_fw_mpdu_drop_tlv_v fw_ring_mpdu_drop;
  3074. htt_rx_pdev_fw_stats_phy_err_tlv fw_stats_phy_err_tlv;
  3075. } htt_rx_pdev_stats_t;
  3076. #define HTT_PDEV_CCA_STATS_TX_FRAME_INFO_PRESENT (0x1)
  3077. #define HTT_PDEV_CCA_STATS_RX_FRAME_INFO_PRESENT (0x2)
  3078. #define HTT_PDEV_CCA_STATS_RX_CLEAR_INFO_PRESENT (0x4)
  3079. #define HTT_PDEV_CCA_STATS_MY_RX_FRAME_INFO_PRESENT (0x8)
  3080. #define HTT_PDEV_CCA_STATS_USEC_CNT_INFO_PRESENT (0x10)
  3081. #define HTT_PDEV_CCA_STATS_MED_RX_IDLE_INFO_PRESENT (0x20)
  3082. #define HTT_PDEV_CCA_STATS_MED_TX_IDLE_GLOBAL_INFO_PRESENT (0x40)
  3083. #define HTT_PDEV_CCA_STATS_CCA_OBBS_USEC_INFO_PRESENT (0x80)
  3084. typedef struct {
  3085. htt_tlv_hdr_t tlv_hdr;
  3086. /* Below values are obtained from the HW Cycles counter registers */
  3087. A_UINT32 tx_frame_usec;
  3088. A_UINT32 rx_frame_usec;
  3089. A_UINT32 rx_clear_usec;
  3090. A_UINT32 my_rx_frame_usec;
  3091. A_UINT32 usec_cnt;
  3092. A_UINT32 med_rx_idle_usec;
  3093. A_UINT32 med_tx_idle_global_usec;
  3094. A_UINT32 cca_obss_usec;
  3095. } htt_pdev_stats_cca_counters_tlv;
  3096. /* NOTE: THIS htt_pdev_cca_stats_hist_tlv STRUCTURE IS DEPRECATED,
  3097. * due to lack of support in some host stats infrastructures for
  3098. * TLVs nested within TLVs.
  3099. */
  3100. typedef struct {
  3101. htt_tlv_hdr_t tlv_hdr;
  3102. /* The channel number on which these stats were collected */
  3103. A_UINT32 chan_num;
  3104. /* num of CCA records (Num of htt_pdev_stats_cca_counters_tlv)*/
  3105. A_UINT32 num_records;
  3106. /*
  3107. * Bit map of valid CCA counters
  3108. * Bit0 - tx_frame_usec
  3109. * Bit1 - rx_frame_usec
  3110. * Bit2 - rx_clear_usec
  3111. * Bit3 - my_rx_frame_usec
  3112. * bit4 - usec_cnt
  3113. * Bit5 - med_rx_idle_usec
  3114. * Bit6 - med_tx_idle_global_usec
  3115. * Bit7 - cca_obss_usec
  3116. *
  3117. * See HTT_PDEV_CCA_STATS_xxx_INFO_PRESENT defs
  3118. */
  3119. A_UINT32 valid_cca_counters_bitmap;
  3120. /* Indicates the stats collection interval
  3121. * Valid Values:
  3122. * 100 - For the 100ms interval CCA stats histogram
  3123. * 1000 - For 1sec interval CCA histogram
  3124. * 0xFFFFFFFF - For Cumulative CCA Stats
  3125. */
  3126. A_UINT32 collection_interval;
  3127. /**
  3128. * This will be followed by an array which contains the CCA stats
  3129. * collected in the last N intervals,
  3130. * if the indication is for last N intervals CCA stats.
  3131. * Then the pdev_cca_stats[0] element contains the oldest CCA stats
  3132. * and pdev_cca_stats[N-1] will have the most recent CCA stats.
  3133. */
  3134. htt_pdev_stats_cca_counters_tlv cca_hist_tlv[1];
  3135. } htt_pdev_cca_stats_hist_tlv;
  3136. typedef struct {
  3137. htt_tlv_hdr_t tlv_hdr;
  3138. /* The channel number on which these stats were collected */
  3139. A_UINT32 chan_num;
  3140. /* num of CCA records (Num of htt_pdev_stats_cca_counters_tlv)*/
  3141. A_UINT32 num_records;
  3142. /*
  3143. * Bit map of valid CCA counters
  3144. * Bit0 - tx_frame_usec
  3145. * Bit1 - rx_frame_usec
  3146. * Bit2 - rx_clear_usec
  3147. * Bit3 - my_rx_frame_usec
  3148. * bit4 - usec_cnt
  3149. * Bit5 - med_rx_idle_usec
  3150. * Bit6 - med_tx_idle_global_usec
  3151. * Bit7 - cca_obss_usec
  3152. *
  3153. * See HTT_PDEV_CCA_STATS_xxx_INFO_PRESENT defs
  3154. */
  3155. A_UINT32 valid_cca_counters_bitmap;
  3156. /* Indicates the stats collection interval
  3157. * Valid Values:
  3158. * 100 - For the 100ms interval CCA stats histogram
  3159. * 1000 - For 1sec interval CCA histogram
  3160. * 0xFFFFFFFF - For Cumulative CCA Stats
  3161. */
  3162. A_UINT32 collection_interval;
  3163. /**
  3164. * This will be followed by an array which contains the CCA stats
  3165. * collected in the last N intervals,
  3166. * if the indication is for last N intervals CCA stats.
  3167. * Then the pdev_cca_stats[0] element contains the oldest CCA stats
  3168. * and pdev_cca_stats[N-1] will have the most recent CCA stats.
  3169. * htt_pdev_stats_cca_counters_tlv cca_hist_tlv[1];
  3170. */
  3171. } htt_pdev_cca_stats_hist_v1_tlv;
  3172. #define HTT_TWT_SESSION_FLAG_FLOW_ID_M 0x0000ffff
  3173. #define HTT_TWT_SESSION_FLAG_FLOW_ID_S 0
  3174. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_M 0x00010000
  3175. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_S 16
  3176. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_M 0x00020000
  3177. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_S 17
  3178. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_M 0x00040000
  3179. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_S 18
  3180. #define HTT_TWT_SESSION_FLAG_FLOW_ID_GET(_var) \
  3181. (((_var) & HTT_TWT_SESSION_FLAG_FLOW_ID_M) >> \
  3182. HTT_TWT_SESSION_FLAG_FLOW_ID_S)
  3183. #define HTT_TWT_SESSION_FLAG_FLOW_ID_SET(_var, _val) \
  3184. do { \
  3185. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_FLOW_ID, _val); \
  3186. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_FLOW_ID_S)); \
  3187. } while (0)
  3188. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_GET(_var) \
  3189. (((_var) & HTT_TWT_SESSION_FLAG_BCAST_TWT_M) >> \
  3190. HTT_TWT_SESSION_FLAG_BCAST_TWT_S)
  3191. #define HTT_TWT_SESSION_FLAG_BCAST_TWT_SET(_var, _val) \
  3192. do { \
  3193. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_BCAST_TWT, _val); \
  3194. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_BCAST_TWT_S)); \
  3195. } while (0)
  3196. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_GET(_var) \
  3197. (((_var) & HTT_TWT_SESSION_FLAG_TRIGGER_TWT_M) >> \
  3198. HTT_TWT_SESSION_FLAG_TRIGGER_TWT_S)
  3199. #define HTT_TWT_SESSION_FLAG_TRIGGER_TWT_SET(_var, _val) \
  3200. do { \
  3201. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_TRIGGER_TWT, _val); \
  3202. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_TRIGGER_TWT_S)); \
  3203. } while (0)
  3204. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_GET(_var) \
  3205. (((_var) & HTT_TWT_SESSION_FLAG_ANNOUN_TWT_M) >> \
  3206. HTT_TWT_SESSION_FLAG_ANNOUN_TWT_S)
  3207. #define HTT_TWT_SESSION_FLAG_ANNOUN_TWT_SET(_var, _val) \
  3208. do { \
  3209. HTT_CHECK_SET_VAL(HTT_TWT_SESSION_FLAG_ANNOUN_TWT, _val); \
  3210. ((_var) |= ((_val) << HTT_TWT_SESSION_FLAG_ANNOUN_TWT_S)); \
  3211. } while (0)
  3212. #define TWT_DIALOG_ID_UNAVAILABLE 0xFFFFFFFF
  3213. typedef struct {
  3214. htt_tlv_hdr_t tlv_hdr;
  3215. A_UINT32 vdev_id;
  3216. htt_mac_addr peer_mac;
  3217. A_UINT32 flow_id_flags;
  3218. A_UINT32 dialog_id; /* TWT_DIALOG_ID_UNAVAILABLE is used when TWT session is not initiated by host */
  3219. A_UINT32 wake_dura_us;
  3220. A_UINT32 wake_intvl_us;
  3221. A_UINT32 sp_offset_us;
  3222. } htt_pdev_stats_twt_session_tlv;
  3223. typedef struct {
  3224. htt_tlv_hdr_t tlv_hdr;
  3225. A_UINT32 pdev_id;
  3226. A_UINT32 num_sessions;
  3227. htt_pdev_stats_twt_session_tlv twt_session[1];
  3228. } htt_pdev_stats_twt_sessions_tlv;
  3229. /* STATS_TYPE: HTT_DBG_EXT_STATS_TWT_SESSIONS
  3230. * TLV_TAGS:
  3231. * - HTT_STATS_PDEV_TWT_SESSIONS_TAG
  3232. * - HTT_STATS_PDEV_TWT_SESSION_TAG
  3233. */
  3234. /* NOTE:
  3235. * This structure is for documentation, and cannot be safely used directly.
  3236. * Instead, use the constituent TLV structures to fill/parse.
  3237. */
  3238. typedef struct {
  3239. htt_pdev_stats_twt_sessions_tlv twt_sessions[1];
  3240. } htt_pdev_twt_sessions_stats_t;
  3241. typedef enum {
  3242. /* Global link descriptor queued in REO */
  3243. HTT_RX_REO_RESOURCE_GLOBAL_LINK_DESC_COUNT_0 = 0,
  3244. HTT_RX_REO_RESOURCE_GLOBAL_LINK_DESC_COUNT_1 = 1,
  3245. HTT_RX_REO_RESOURCE_GLOBAL_LINK_DESC_COUNT_2 = 2,
  3246. /*Number of queue descriptors of this aging group */
  3247. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC0 = 3,
  3248. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC1 = 4,
  3249. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC2 = 5,
  3250. HTT_RX_REO_RESOURCE_BUFFERS_USED_AC3 = 6,
  3251. /* Total number of MSDUs buffered in AC */
  3252. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC0 = 7,
  3253. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC1 = 8,
  3254. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC2 = 9,
  3255. HTT_RX_REO_RESOURCE_AGING_NUM_QUEUES_AC3 = 10,
  3256. HTT_RX_REO_RESOURCE_STATS_MAX = 16
  3257. } htt_rx_reo_resource_sample_id_enum;
  3258. typedef struct {
  3259. htt_tlv_hdr_t tlv_hdr;
  3260. /* Variable based on the Number of records. HTT_RX_REO_RESOURCE_STATS_MAX */
  3261. /* htt_rx_reo_debug_sample_id_enum */
  3262. A_UINT32 sample_id;
  3263. /* Max value of all samples */
  3264. A_UINT32 total_max;
  3265. /* Average value of total samples */
  3266. A_UINT32 total_avg;
  3267. /* Num of samples including both zeros and non zeros ones*/
  3268. A_UINT32 total_sample;
  3269. /* Average value of all non zeros samples */
  3270. A_UINT32 non_zeros_avg;
  3271. /* Num of non zeros samples */
  3272. A_UINT32 non_zeros_sample;
  3273. /* Max value of last N non zero samples (N = last_non_zeros_sample) */
  3274. A_UINT32 last_non_zeros_max;
  3275. /* Min value of last N non zero samples (N = last_non_zeros_sample) */
  3276. A_UINT32 last_non_zeros_min;
  3277. /* Average value of last N non zero samples (N = last_non_zeros_sample) */
  3278. A_UINT32 last_non_zeros_avg;
  3279. /* Num of last non zero samples */
  3280. A_UINT32 last_non_zeros_sample;
  3281. } htt_rx_reo_resource_stats_tlv_v;
  3282. /* STATS_TYPE: HTT_DBG_EXT_STATS_REO_RESOURCE_STATS
  3283. * TLV_TAGS:
  3284. * - HTT_STATS_RX_REO_RESOURCE_STATS_TAG
  3285. */
  3286. /* NOTE:
  3287. * This structure is for documentation, and cannot be safely used directly.
  3288. * Instead, use the constituent TLV structures to fill/parse.
  3289. */
  3290. typedef struct {
  3291. htt_rx_reo_resource_stats_tlv_v reo_resource_stats;
  3292. } htt_soc_reo_resource_stats_t;
  3293. /* == TX SOUNDING STATS == */
  3294. /* config_param0 */
  3295. #define HTT_DBG_EXT_STATS_SET_VDEV_MASK(_var) ((_var << 1) | 0x1)
  3296. #define HTT_DBG_EXT_STATS_GET_VDEV_ID_FROM_VDEV_MASK(_var) ((_var >> 1) & 0xFF)
  3297. #define HTT_DBG_EXT_STATS_IS_VDEV_ID_SET(_var) ((_var) & 0x1)
  3298. typedef enum {
  3299. /* Implicit beamforming stats */
  3300. HTT_IMPLICIT_TXBF_STEER_STATS = 0,
  3301. /* Single user short inter frame sequence steer stats */
  3302. HTT_EXPLICIT_TXBF_SU_SIFS_STEER_STATS = 1,
  3303. /* Single user random back off steer stats */
  3304. HTT_EXPLICIT_TXBF_SU_RBO_STEER_STATS = 2,
  3305. /* Multi user short inter frame sequence steer stats */
  3306. HTT_EXPLICIT_TXBF_MU_SIFS_STEER_STATS = 3,
  3307. /* Multi user random back off steer stats */
  3308. HTT_EXPLICIT_TXBF_MU_RBO_STEER_STATS = 4,
  3309. /* For backward compatability new modes cannot be added */
  3310. HTT_TXBF_MAX_NUM_OF_MODES = 5
  3311. } htt_txbf_sound_steer_modes;
  3312. typedef enum {
  3313. HTT_TX_AC_SOUNDING_MODE = 0,
  3314. HTT_TX_AX_SOUNDING_MODE = 1,
  3315. } htt_stats_sounding_tx_mode;
  3316. typedef struct {
  3317. htt_tlv_hdr_t tlv_hdr;
  3318. A_UINT32 tx_sounding_mode; /* HTT_TX_XX_SOUNDING_MODE */
  3319. /* Counts number of soundings for all steering modes in each bw */
  3320. A_UINT32 cbf_20[HTT_TXBF_MAX_NUM_OF_MODES];
  3321. A_UINT32 cbf_40[HTT_TXBF_MAX_NUM_OF_MODES];
  3322. A_UINT32 cbf_80[HTT_TXBF_MAX_NUM_OF_MODES];
  3323. A_UINT32 cbf_160[HTT_TXBF_MAX_NUM_OF_MODES];
  3324. /*
  3325. * The sounding array is a 2-D array stored as an 1-D array of
  3326. * A_UINT32. The stats for a particular user/bw combination is
  3327. * referenced with the following:
  3328. *
  3329. * sounding[(user* max_bw) + bw]
  3330. *
  3331. * ... where max_bw == 4 for 160mhz
  3332. */
  3333. A_UINT32 sounding[HTT_TX_NUM_OF_SOUNDING_STATS_WORDS];
  3334. } htt_tx_sounding_stats_tlv;
  3335. /* STATS_TYPE : HTT_DBG_EXT_STATS_TX_SOUNDING_INFO
  3336. * TLV_TAGS:
  3337. * - HTT_STATS_TX_SOUNDING_STATS_TAG
  3338. */
  3339. /* NOTE:
  3340. * This structure is for documentation, and cannot be safely used directly.
  3341. * Instead, use the constituent TLV structures to fill/parse.
  3342. */
  3343. typedef struct {
  3344. htt_tx_sounding_stats_tlv sounding_tlv;
  3345. } htt_tx_sounding_stats_t;
  3346. typedef struct {
  3347. htt_tlv_hdr_t tlv_hdr;
  3348. A_UINT32 num_obss_tx_ppdu_success;
  3349. A_UINT32 num_obss_tx_ppdu_failure;
  3350. } htt_pdev_obss_pd_stats_tlv;
  3351. /* NOTE:
  3352. * This structure is for documentation, and cannot be safely used directly.
  3353. * Instead, use the constituent TLV structures to fill/parse.
  3354. */
  3355. typedef struct {
  3356. htt_pdev_obss_pd_stats_tlv obss_pd_stat;
  3357. } htt_pdev_obss_pd_stats_t;
  3358. typedef struct {
  3359. htt_tlv_hdr_t tlv_hdr;
  3360. A_UINT32 pdev_id;
  3361. A_UINT32 current_head_idx;
  3362. A_UINT32 current_tail_idx;
  3363. A_UINT32 num_htt_msgs_sent;
  3364. /*
  3365. * Time in milliseconds for which the ring has been in
  3366. * its current backpressure condition
  3367. */
  3368. A_UINT32 backpressure_time_ms;
  3369. /* backpressure_hist - histogram showing how many times different degrees
  3370. * of backpressure duration occurred:
  3371. * Index 0 indicates the number of times ring was
  3372. * continously in backpressure state for 100 - 200ms.
  3373. * Index 1 indicates the number of times ring was
  3374. * continously in backpressure state for 200 - 300ms.
  3375. * Index 2 indicates the number of times ring was
  3376. * continously in backpressure state for 300 - 400ms.
  3377. * Index 3 indicates the number of times ring was
  3378. * continously in backpressure state for 400 - 500ms.
  3379. * Index 4 indicates the number of times ring was
  3380. * continously in backpressure state beyond 500ms.
  3381. */
  3382. A_UINT32 backpressure_hist[5];
  3383. } htt_ring_backpressure_stats_tlv;
  3384. /* STATS_TYPE : HTT_STATS_RING_BACKPRESSURE_STATS_INFO
  3385. * TLV_TAGS:
  3386. * - HTT_STATS_RING_BACKPRESSURE_STATS_TAG
  3387. */
  3388. /* NOTE:
  3389. * This structure is for documentation, and cannot be safely used directly.
  3390. * Instead, use the constituent TLV structures to fill/parse.
  3391. */
  3392. typedef struct {
  3393. htt_sring_cmn_tlv cmn_tlv;
  3394. struct {
  3395. htt_stats_string_tlv sring_str_tlv;
  3396. htt_ring_backpressure_stats_tlv backpressure_stats_tlv;
  3397. } r[1]; /* variable-length array */
  3398. } htt_ring_backpressure_stats_t;
  3399. #define HTT_LATENCY_PROFILE_MAX_HIST 3
  3400. #define HTT_STATS_MAX_PROF_STATS_NAME_LEN 32
  3401. typedef struct {
  3402. htt_tlv_hdr_t tlv_hdr;
  3403. /* print_header:
  3404. * This field suggests whether the host should print a header when
  3405. * displaying the TLV (because this is the first latency_prof_stats
  3406. * TLV within a series), or if only the TLV contents should be displayed
  3407. * without a header (because this is not the first TLV within the series).
  3408. */
  3409. A_UINT32 print_header;
  3410. A_UINT8 latency_prof_name[HTT_STATS_MAX_PROF_STATS_NAME_LEN];
  3411. A_UINT32 cnt; /* number of data values included in the tot sum */
  3412. A_UINT32 min; /* time in us */
  3413. A_UINT32 max; /* time in us */
  3414. A_UINT32 last;
  3415. A_UINT32 tot; /* time in us */
  3416. A_UINT32 avg; /* time in us */
  3417. /* hist_intvl:
  3418. * Histogram interval, i.e. the latency range covered by each
  3419. * bin of the histogram, in microsecond units.
  3420. * hist[0] counts how many latencies were between 0 to hist_intvl
  3421. * hist[1] counts how many latencies were between hist_intvl to 2*hist_intvl
  3422. * hist[2] counts how many latencies were more than 2*hist_intvl
  3423. */
  3424. A_UINT32 hist_intvl;
  3425. A_UINT32 hist[HTT_LATENCY_PROFILE_MAX_HIST];
  3426. } htt_latency_prof_stats_tlv;
  3427. typedef struct {
  3428. htt_tlv_hdr_t tlv_hdr;
  3429. /* duration:
  3430. * Time period over which counts were gathered, units = microseconds.
  3431. */
  3432. A_UINT32 duration;
  3433. A_UINT32 tx_msdu_cnt;
  3434. A_UINT32 tx_mpdu_cnt;
  3435. A_UINT32 tx_ppdu_cnt;
  3436. A_UINT32 rx_msdu_cnt;
  3437. A_UINT32 rx_mpdu_cnt;
  3438. } htt_latency_prof_ctx_tlv;
  3439. typedef struct {
  3440. htt_tlv_hdr_t tlv_hdr;
  3441. A_UINT32 prof_enable_cnt; /* count of enabled profiles */
  3442. } htt_latency_prof_cnt_tlv;
  3443. /* STATS_TYPE : HTT_DBG_EXT_STATS_LATENCY_PROF_STATS
  3444. * TLV_TAGS:
  3445. * HTT_STATS_LATENCY_PROF_STATS_TAG / htt_latency_prof_stats_tlv
  3446. * HTT_STATS_LATENCY_CTX_TAG / htt_latency_prof_ctx_tlv
  3447. * HTT_STATS_LATENCY_CNT_TAG / htt_latency_prof_cnt_tlv
  3448. */
  3449. /* NOTE:
  3450. * This structure is for documentation, and cannot be safely used directly.
  3451. * Instead, use the constituent TLV structures to fill/parse.
  3452. */
  3453. typedef struct {
  3454. htt_latency_prof_stats_tlv latency_prof_stat;
  3455. htt_latency_prof_ctx_tlv latency_ctx_stat;
  3456. htt_latency_prof_cnt_tlv latency_cnt_stat;
  3457. } htt_soc_latency_stats_t;
  3458. #endif /* __HTT_STATS_H__ */