sde_reg_dma.c 3.3 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
  6. #include "sde_reg_dma.h"
  7. #include "sde_hw_reg_dma_v1.h"
  8. #include "sde_dbg.h"
  9. #define REG_DMA_VER_1_0 0x00010000
  10. #define REG_DMA_VER_1_1 0x00010001
  11. #define REG_DMA_VER_1_2 0x00010002
  12. #define REG_DMA_VER_2_0 0x00020000
  13. static int default_check_support(enum sde_reg_dma_features feature,
  14. enum sde_reg_dma_blk blk,
  15. bool *is_supported)
  16. {
  17. if (!is_supported)
  18. return -EINVAL;
  19. *is_supported = false;
  20. return 0;
  21. }
  22. static int default_setup_payload(struct sde_reg_dma_setup_ops_cfg *cfg)
  23. {
  24. DRM_ERROR("not implemented\n");
  25. return -EINVAL;
  26. }
  27. static int default_kick_off(struct sde_reg_dma_kickoff_cfg *cfg)
  28. {
  29. DRM_ERROR("not implemented\n");
  30. return -EINVAL;
  31. }
  32. static int default_reset(struct sde_hw_ctl *ctl)
  33. {
  34. DRM_ERROR("not implemented\n");
  35. return -EINVAL;
  36. }
  37. struct sde_reg_dma_buffer *default_alloc_reg_dma_buf(u32 size)
  38. {
  39. DRM_ERROR("not implemented\n");
  40. return ERR_PTR(-EINVAL);
  41. }
  42. int default_dealloc_reg_dma(struct sde_reg_dma_buffer *lut_buf)
  43. {
  44. DRM_ERROR("not implemented\n");
  45. return -EINVAL;
  46. }
  47. static int default_buf_reset_reg_dma(struct sde_reg_dma_buffer *lut_buf)
  48. {
  49. DRM_ERROR("not implemented\n");
  50. return -EINVAL;
  51. }
  52. static int default_last_command(struct sde_hw_ctl *ctl,
  53. enum sde_reg_dma_queue q, enum sde_reg_dma_last_cmd_mode mode)
  54. {
  55. return 0;
  56. }
  57. static int default_last_command_sb(struct sde_hw_ctl *ctl,
  58. enum sde_reg_dma_queue q, enum sde_reg_dma_last_cmd_mode mode)
  59. {
  60. return 0;
  61. }
  62. static void default_dump_reg(void)
  63. {
  64. }
  65. static void set_default_dma_ops(struct sde_hw_reg_dma *reg_dma)
  66. {
  67. const static struct sde_hw_reg_dma_ops ops = {
  68. default_check_support, default_setup_payload,
  69. default_kick_off, default_reset, default_alloc_reg_dma_buf,
  70. default_dealloc_reg_dma, default_buf_reset_reg_dma,
  71. default_last_command, default_last_command_sb,
  72. default_dump_reg};
  73. memcpy(&reg_dma->ops, &ops, sizeof(ops));
  74. }
  75. static struct sde_hw_reg_dma reg_dma;
  76. int sde_reg_dma_init(void __iomem *addr, struct sde_mdss_cfg *m,
  77. struct drm_device *dev)
  78. {
  79. int rc = 0;
  80. set_default_dma_ops(&reg_dma);
  81. if (!addr || !m || !dev) {
  82. DRM_DEBUG("invalid addr %pK catalog %pK dev %pK\n", addr, m,
  83. dev);
  84. return 0;
  85. }
  86. if (!m->reg_dma_count)
  87. return 0;
  88. reg_dma.reg_dma_count = m->reg_dma_count;
  89. reg_dma.drm_dev = dev;
  90. reg_dma.addr = addr;
  91. reg_dma.caps = &m->dma_cfg;
  92. switch (reg_dma.caps->version) {
  93. case REG_DMA_VER_1_0:
  94. rc = init_v1(&reg_dma);
  95. if (rc)
  96. DRM_DEBUG("init v1 dma ops failed\n");
  97. break;
  98. case REG_DMA_VER_1_1:
  99. rc = init_v11(&reg_dma);
  100. if (rc)
  101. DRM_DEBUG("init v11 dma ops failed\n");
  102. break;
  103. case REG_DMA_VER_1_2:
  104. rc = init_v12(&reg_dma);
  105. if (rc)
  106. DRM_DEBUG("init v12 dma ops failed\n");
  107. break;
  108. case REG_DMA_VER_2_0:
  109. rc = init_v2(&reg_dma);
  110. if (rc)
  111. DRM_DEBUG("init v2 dma ops failed\n");
  112. break;
  113. default:
  114. break;
  115. }
  116. return rc;
  117. }
  118. struct sde_hw_reg_dma_ops *sde_reg_dma_get_ops(void)
  119. {
  120. return &reg_dma.ops;
  121. }
  122. void sde_reg_dma_deinit(void)
  123. {
  124. if (!reg_dma.drm_dev || !reg_dma.caps)
  125. return;
  126. switch (reg_dma.caps->version) {
  127. case REG_DMA_VER_1_0:
  128. case REG_DMA_VER_1_1:
  129. case REG_DMA_VER_1_2:
  130. case REG_DMA_VER_2_0:
  131. deinit_v1();
  132. break;
  133. default:
  134. break;
  135. }
  136. memset(&reg_dma, 0, sizeof(reg_dma));
  137. set_default_dma_ops(&reg_dma);
  138. }