sde_hw_top.h 8.3 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #ifndef _SDE_HW_TOP_H
  6. #define _SDE_HW_TOP_H
  7. #include "sde_hw_catalog.h"
  8. #include "sde_hw_mdss.h"
  9. #include "sde_hw_util.h"
  10. #include "sde_hw_blk.h"
  11. struct sde_hw_mdp;
  12. /**
  13. * struct traffic_shaper_cfg: traffic shaper configuration
  14. * @en : enable/disable traffic shaper
  15. * @rd_client : true if read client; false if write client
  16. * @client_id : client identifier
  17. * @bpc_denom : denominator of byte per clk
  18. * @bpc_numer : numerator of byte per clk
  19. */
  20. struct traffic_shaper_cfg {
  21. bool en;
  22. bool rd_client;
  23. u32 client_id;
  24. u32 bpc_denom;
  25. u64 bpc_numer;
  26. };
  27. /**
  28. * struct split_pipe_cfg - pipe configuration for dual display panels
  29. * @en : Enable/disable dual pipe confguration
  30. * @mode : Panel interface mode
  31. * @intf : Interface id for main control path
  32. * @pp_split_slave: Slave interface for ping pong split, INTF_MAX to disable
  33. * @pp_split_idx: Ping pong index for ping pong split
  34. * @split_flush_en: Allows both the paths to be flushed when master path is
  35. * flushed
  36. * @split_link_en: Check if split link is enabled
  37. */
  38. struct split_pipe_cfg {
  39. bool en;
  40. enum sde_intf_mode mode;
  41. enum sde_intf intf;
  42. enum sde_intf pp_split_slave;
  43. u32 pp_split_index;
  44. bool split_flush_en;
  45. bool split_link_en;
  46. };
  47. /**
  48. * struct cdm_output_cfg: output configuration for cdm
  49. * @wb_en : enable/disable writeback output
  50. * @intf_en : enable/disable interface output
  51. */
  52. struct cdm_output_cfg {
  53. bool wb_en;
  54. bool intf_en;
  55. };
  56. /**
  57. * struct sde_danger_safe_status: danger and safe status signals
  58. * @mdp: top level status
  59. * @sspp: source pipe status
  60. * @wb: writebck output status
  61. */
  62. struct sde_danger_safe_status {
  63. u8 mdp;
  64. u8 sspp[SSPP_MAX];
  65. u8 wb[WB_MAX];
  66. };
  67. /**
  68. * struct sde_vsync_source_cfg - configure vsync source and configure the
  69. * watchdog timers if required.
  70. * @pp_count: number of ping pongs active
  71. * @frame_rate: Display frame rate
  72. * @ppnumber: ping pong index array
  73. * @vsync_source: vsync source selection
  74. */
  75. struct sde_vsync_source_cfg {
  76. u32 pp_count;
  77. u32 frame_rate;
  78. u32 ppnumber[PINGPONG_MAX];
  79. u32 vsync_source;
  80. };
  81. /**
  82. * struct sde_hw_mdp_ops - interface to the MDP TOP Hw driver functions
  83. * Assumption is these functions will be called after clocks are enabled.
  84. * @setup_split_pipe : Programs the pipe control registers
  85. * @setup_pp_split : Programs the pp split control registers
  86. * @setup_cdm_output : programs cdm control
  87. * @setup_traffic_shaper : programs traffic shaper control
  88. */
  89. struct sde_hw_mdp_ops {
  90. /** setup_split_pipe() : Regsiters are not double buffered, thisk
  91. * function should be called before timing control enable
  92. * @mdp : mdp top context driver
  93. * @cfg : upper and lower part of pipe configuration
  94. */
  95. void (*setup_split_pipe)(struct sde_hw_mdp *mdp,
  96. struct split_pipe_cfg *p);
  97. /** setup_pp_split() : Configure pp split related registers
  98. * @mdp : mdp top context driver
  99. * @cfg : upper and lower part of pipe configuration
  100. */
  101. void (*setup_pp_split)(struct sde_hw_mdp *mdp,
  102. struct split_pipe_cfg *cfg);
  103. /**
  104. * setup_cdm_output() : Setup selection control of the cdm data path
  105. * @mdp : mdp top context driver
  106. * @cfg : cdm output configuration
  107. */
  108. void (*setup_cdm_output)(struct sde_hw_mdp *mdp,
  109. struct cdm_output_cfg *cfg);
  110. /**
  111. * setup_traffic_shaper() : Setup traffic shaper control
  112. * @mdp : mdp top context driver
  113. * @cfg : traffic shaper configuration
  114. */
  115. void (*setup_traffic_shaper)(struct sde_hw_mdp *mdp,
  116. struct traffic_shaper_cfg *cfg);
  117. /**
  118. * setup_clk_force_ctrl - set clock force control
  119. * @mdp: mdp top context driver
  120. * @clk_ctrl: clock to be controlled
  121. * @enable: force on enable
  122. * @return: if the clock is forced-on by this function
  123. */
  124. bool (*setup_clk_force_ctrl)(struct sde_hw_mdp *mdp,
  125. enum sde_clk_ctrl_type clk_ctrl, bool enable);
  126. /**
  127. * get_clk_ctrl_status - get clock control status
  128. * @mdp: mdp top context driver
  129. * @clk_ctrl: clock to be controlled
  130. * @status: returns true if clock is on
  131. * @return: 0 if success, otherwise return code
  132. */
  133. int (*get_clk_ctrl_status)(struct sde_hw_mdp *mdp,
  134. enum sde_clk_ctrl_type clk_ctrl, bool *status);
  135. /**
  136. * setup_dce - set DCE mux for DSC ctrl path
  137. * @mdp: mdp top context driver
  138. * @dce_sel: dce_mux value
  139. */
  140. void (*setup_dce)(struct sde_hw_mdp *mdp, u32 dce_sel);
  141. /**
  142. * get_danger_status - get danger status
  143. * @mdp: mdp top context driver
  144. * @status: Pointer to danger safe status
  145. */
  146. void (*get_danger_status)(struct sde_hw_mdp *mdp,
  147. struct sde_danger_safe_status *status);
  148. /**
  149. * setup_vsync_source - setup vsync source configuration details
  150. * @mdp: mdp top context driver
  151. * @cfg: vsync source selection configuration
  152. */
  153. void (*setup_vsync_source)(struct sde_hw_mdp *mdp,
  154. struct sde_vsync_source_cfg *cfg);
  155. /**
  156. * get_safe_status - get safe status
  157. * @mdp: mdp top context driver
  158. * @status: Pointer to danger safe status
  159. */
  160. void (*get_safe_status)(struct sde_hw_mdp *mdp,
  161. struct sde_danger_safe_status *status);
  162. /**
  163. * get_split_flush_status - get split flush status
  164. * @mdp: mdp top context driver
  165. */
  166. u32 (*get_split_flush_status)(struct sde_hw_mdp *mdp);
  167. /**
  168. * reset_ubwc - reset top level UBWC configuration
  169. * @mdp: mdp top context driver
  170. * @m: pointer to mdss catalog data
  171. */
  172. void (*reset_ubwc)(struct sde_hw_mdp *mdp, struct sde_mdss_cfg *m);
  173. /**
  174. * intf_audio_select - select the external interface for audio
  175. * @mdp: mdp top context driver
  176. */
  177. void (*intf_audio_select)(struct sde_hw_mdp *mdp);
  178. /**
  179. * set_mdp_hw_events - enable qdss hardware events for mdp
  180. * @mdp: mdp top context driver
  181. * @enable: enable/disable hw events
  182. */
  183. void (*set_mdp_hw_events)(struct sde_hw_mdp *mdp, bool enable);
  184. /**
  185. * set_cwb_ppb_cntl - select the data point for CWB
  186. * @mdp: mdp top context driver
  187. * @dual: indicates if dual pipe line needs to be programmed
  188. * @dspp_out : true if dspp output required. LM is default tap point
  189. */
  190. void (*set_cwb_ppb_cntl)(struct sde_hw_mdp *mdp,
  191. bool dual, bool dspp_out);
  192. /**
  193. * set_hdr_plus_metadata - program the dynamic hdr metadata
  194. * @mdp: mdp top context driver
  195. * @payload: pointer to payload data
  196. * @len: size of the valid data within payload
  197. * @stream_id: stream ID for MST (0 or 1)
  198. */
  199. void (*set_hdr_plus_metadata)(struct sde_hw_mdp *mdp,
  200. u8 *payload, u32 len, u32 stream_id);
  201. /**
  202. * get_autorefresh_status - get autorefresh status
  203. * @mdp: mdp top context driver
  204. * @intf_idx: intf block index for relative information
  205. */
  206. u32 (*get_autorefresh_status)(struct sde_hw_mdp *mdp,
  207. u32 intf_idx);
  208. };
  209. struct sde_hw_mdp {
  210. struct sde_hw_blk base;
  211. struct sde_hw_blk_reg_map hw;
  212. /* top */
  213. enum sde_mdp idx;
  214. const struct sde_mdp_cfg *caps;
  215. /* ops */
  216. struct sde_hw_mdp_ops ops;
  217. };
  218. struct sde_hw_sid {
  219. /* rotator base */
  220. struct sde_hw_blk_reg_map hw;
  221. };
  222. /**
  223. * sde_hw_sid_init - initialize the sid blk reg map
  224. * @addr: Mapped register io address
  225. * @sid_len: Length of block
  226. * @m: Pointer to mdss catalog data
  227. */
  228. struct sde_hw_sid *sde_hw_sid_init(void __iomem *addr,
  229. u32 sid_len, const struct sde_mdss_cfg *m);
  230. /**
  231. * sde_hw_set_rotator_sid - set sid values for rotator
  232. * sid: sde_hw_sid passed from kms
  233. */
  234. void sde_hw_set_rotator_sid(struct sde_hw_sid *sid);
  235. /**
  236. * sde_hw_set_sspp_sid - set sid values for the pipes
  237. * sid: sde_hw_sid passed from kms
  238. * pipe: sspp id
  239. * vm: vm id to set for SIDs
  240. */
  241. void sde_hw_set_sspp_sid(struct sde_hw_sid *sid, u32 pipe, u32 vm);
  242. /**
  243. * sde_hw_set_lutdma_sid - set sid values for the pipes
  244. * sid: sde_hw_sid passed from kms
  245. * vm: vm id to set for SIDs
  246. */
  247. void sde_hw_set_lutdma_sid(struct sde_hw_sid *sid, u32 vm);
  248. /**
  249. * to_sde_hw_mdp - convert base object sde_hw_base to container
  250. * @hw: Pointer to base hardware block
  251. * return: Pointer to hardware block container
  252. */
  253. static inline struct sde_hw_mdp *to_sde_hw_mdp(struct sde_hw_blk *hw)
  254. {
  255. return container_of(hw, struct sde_hw_mdp, base);
  256. }
  257. /**
  258. * sde_hw_mdptop_init - initializes the top driver for the passed idx
  259. * @idx: Interface index for which driver object is required
  260. * @addr: Mapped register io address of MDP
  261. * @m: Pointer to mdss catalog data
  262. */
  263. struct sde_hw_mdp *sde_hw_mdptop_init(enum sde_mdp idx,
  264. void __iomem *addr,
  265. const struct sde_mdss_cfg *m);
  266. void sde_hw_mdp_destroy(struct sde_hw_mdp *mdp);
  267. #endif /*_SDE_HW_TOP_H */