reo_entrance_ring.h 18 KB

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  1. /*
  2. * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef _REO_ENTRANCE_RING_H_
  17. #define _REO_ENTRANCE_RING_H_
  18. #include "rx_mpdu_details.h"
  19. #define NUM_OF_DWORDS_REO_ENTRANCE_RING 8
  20. struct reo_entrance_ring {
  21. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  22. struct rx_mpdu_details reo_level_mpdu_frame_info;
  23. uint32_t rx_reo_queue_desc_addr_31_0 : 32;
  24. uint32_t rx_reo_queue_desc_addr_39_32 : 8,
  25. rounded_mpdu_byte_count : 14,
  26. reo_destination_indication : 5,
  27. frameless_bar : 1,
  28. reserved_5a : 4;
  29. uint32_t rxdma_push_reason : 2,
  30. rxdma_error_code : 5,
  31. mpdu_fragment_number : 4,
  32. sw_exception : 1,
  33. sw_exception_mpdu_delink : 1,
  34. sw_exception_destination_ring_valid : 1,
  35. sw_exception_destination_ring : 5,
  36. mpdu_sequence_number : 12,
  37. reserved_6a : 1;
  38. uint32_t phy_ppdu_id : 16,
  39. src_link_id : 3,
  40. reserved_7a : 1,
  41. ring_id : 8,
  42. looping_count : 4;
  43. #else
  44. struct rx_mpdu_details reo_level_mpdu_frame_info;
  45. uint32_t rx_reo_queue_desc_addr_31_0 : 32;
  46. uint32_t reserved_5a : 4,
  47. frameless_bar : 1,
  48. reo_destination_indication : 5,
  49. rounded_mpdu_byte_count : 14,
  50. rx_reo_queue_desc_addr_39_32 : 8;
  51. uint32_t reserved_6a : 1,
  52. mpdu_sequence_number : 12,
  53. sw_exception_destination_ring : 5,
  54. sw_exception_destination_ring_valid : 1,
  55. sw_exception_mpdu_delink : 1,
  56. sw_exception : 1,
  57. mpdu_fragment_number : 4,
  58. rxdma_error_code : 5,
  59. rxdma_push_reason : 2;
  60. uint32_t looping_count : 4,
  61. ring_id : 8,
  62. reserved_7a : 1,
  63. src_link_id : 3,
  64. phy_ppdu_id : 16;
  65. #endif
  66. };
  67. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000
  68. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
  69. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MSB 31
  70. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
  71. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004
  72. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
  73. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MSB 7
  74. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
  75. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
  76. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
  77. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB 11
  78. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000f00
  79. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004
  80. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 12
  81. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MSB 31
  82. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_MSDU_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff000
  83. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET 0x00000008
  84. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_LSB 0
  85. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MSB 7
  86. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MASK 0x000000ff
  87. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_OFFSET 0x00000008
  88. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_LSB 8
  89. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MSB 8
  90. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MASK 0x00000100
  91. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_OFFSET 0x00000008
  92. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_LSB 9
  93. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MSB 9
  94. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MASK 0x00000200
  95. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_OFFSET 0x00000008
  96. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_LSB 10
  97. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MSB 10
  98. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MASK 0x00000400
  99. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_OFFSET 0x00000008
  100. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_LSB 11
  101. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MSB 11
  102. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MASK 0x00000800
  103. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000008
  104. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_LSB 12
  105. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MSB 12
  106. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x00001000
  107. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_OFFSET 0x00000008
  108. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_LSB 13
  109. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MSB 13
  110. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MASK 0x00002000
  111. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_OFFSET 0x00000008
  112. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_LSB 14
  113. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MSB 14
  114. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MASK 0x00004000
  115. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_OFFSET 0x00000008
  116. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_LSB 15
  117. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_MSB 26
  118. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_SRC_INFO_MASK 0x07ff8000
  119. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_OFFSET 0x00000008
  120. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_LSB 27
  121. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MSB 27
  122. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_MPDU_QOS_CONTROL_VALID_MASK 0x08000000
  123. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_OFFSET 0x00000008
  124. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_LSB 28
  125. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_MSB 31
  126. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_TID_MASK 0xf0000000
  127. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_OFFSET 0x0000000c
  128. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_LSB 0
  129. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MSB 31
  130. #define REO_ENTRANCE_RING_REO_LEVEL_MPDU_FRAME_INFO_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MASK 0xffffffff
  131. #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000010
  132. #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0
  133. #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_MSB 31
  134. #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff
  135. #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x00000014
  136. #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0
  137. #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_MSB 7
  138. #define REO_ENTRANCE_RING_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff
  139. #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_OFFSET 0x00000014
  140. #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_LSB 8
  141. #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_MSB 21
  142. #define REO_ENTRANCE_RING_ROUNDED_MPDU_BYTE_COUNT_MASK 0x003fff00
  143. #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_OFFSET 0x00000014
  144. #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_LSB 22
  145. #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_MSB 26
  146. #define REO_ENTRANCE_RING_REO_DESTINATION_INDICATION_MASK 0x07c00000
  147. #define REO_ENTRANCE_RING_FRAMELESS_BAR_OFFSET 0x00000014
  148. #define REO_ENTRANCE_RING_FRAMELESS_BAR_LSB 27
  149. #define REO_ENTRANCE_RING_FRAMELESS_BAR_MSB 27
  150. #define REO_ENTRANCE_RING_FRAMELESS_BAR_MASK 0x08000000
  151. #define REO_ENTRANCE_RING_RESERVED_5A_OFFSET 0x00000014
  152. #define REO_ENTRANCE_RING_RESERVED_5A_LSB 28
  153. #define REO_ENTRANCE_RING_RESERVED_5A_MSB 31
  154. #define REO_ENTRANCE_RING_RESERVED_5A_MASK 0xf0000000
  155. #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_OFFSET 0x00000018
  156. #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_LSB 0
  157. #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_MSB 1
  158. #define REO_ENTRANCE_RING_RXDMA_PUSH_REASON_MASK 0x00000003
  159. #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_OFFSET 0x00000018
  160. #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_LSB 2
  161. #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_MSB 6
  162. #define REO_ENTRANCE_RING_RXDMA_ERROR_CODE_MASK 0x0000007c
  163. #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_OFFSET 0x00000018
  164. #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_LSB 7
  165. #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_MSB 10
  166. #define REO_ENTRANCE_RING_MPDU_FRAGMENT_NUMBER_MASK 0x00000780
  167. #define REO_ENTRANCE_RING_SW_EXCEPTION_OFFSET 0x00000018
  168. #define REO_ENTRANCE_RING_SW_EXCEPTION_LSB 11
  169. #define REO_ENTRANCE_RING_SW_EXCEPTION_MSB 11
  170. #define REO_ENTRANCE_RING_SW_EXCEPTION_MASK 0x00000800
  171. #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_OFFSET 0x00000018
  172. #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_LSB 12
  173. #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_MSB 12
  174. #define REO_ENTRANCE_RING_SW_EXCEPTION_MPDU_DELINK_MASK 0x00001000
  175. #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_OFFSET 0x00000018
  176. #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_LSB 13
  177. #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_MSB 13
  178. #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_VALID_MASK 0x00002000
  179. #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_OFFSET 0x00000018
  180. #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_LSB 14
  181. #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_MSB 18
  182. #define REO_ENTRANCE_RING_SW_EXCEPTION_DESTINATION_RING_MASK 0x0007c000
  183. #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_OFFSET 0x00000018
  184. #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_LSB 19
  185. #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_MSB 30
  186. #define REO_ENTRANCE_RING_MPDU_SEQUENCE_NUMBER_MASK 0x7ff80000
  187. #define REO_ENTRANCE_RING_RESERVED_6A_OFFSET 0x00000018
  188. #define REO_ENTRANCE_RING_RESERVED_6A_LSB 31
  189. #define REO_ENTRANCE_RING_RESERVED_6A_MSB 31
  190. #define REO_ENTRANCE_RING_RESERVED_6A_MASK 0x80000000
  191. #define REO_ENTRANCE_RING_PHY_PPDU_ID_OFFSET 0x0000001c
  192. #define REO_ENTRANCE_RING_PHY_PPDU_ID_LSB 0
  193. #define REO_ENTRANCE_RING_PHY_PPDU_ID_MSB 15
  194. #define REO_ENTRANCE_RING_PHY_PPDU_ID_MASK 0x0000ffff
  195. #define REO_ENTRANCE_RING_SRC_LINK_ID_OFFSET 0x0000001c
  196. #define REO_ENTRANCE_RING_SRC_LINK_ID_LSB 16
  197. #define REO_ENTRANCE_RING_SRC_LINK_ID_MSB 18
  198. #define REO_ENTRANCE_RING_SRC_LINK_ID_MASK 0x00070000
  199. #define REO_ENTRANCE_RING_RESERVED_7A_OFFSET 0x0000001c
  200. #define REO_ENTRANCE_RING_RESERVED_7A_LSB 19
  201. #define REO_ENTRANCE_RING_RESERVED_7A_MSB 19
  202. #define REO_ENTRANCE_RING_RESERVED_7A_MASK 0x00080000
  203. #define REO_ENTRANCE_RING_RING_ID_OFFSET 0x0000001c
  204. #define REO_ENTRANCE_RING_RING_ID_LSB 20
  205. #define REO_ENTRANCE_RING_RING_ID_MSB 27
  206. #define REO_ENTRANCE_RING_RING_ID_MASK 0x0ff00000
  207. #define REO_ENTRANCE_RING_LOOPING_COUNT_OFFSET 0x0000001c
  208. #define REO_ENTRANCE_RING_LOOPING_COUNT_LSB 28
  209. #define REO_ENTRANCE_RING_LOOPING_COUNT_MSB 31
  210. #define REO_ENTRANCE_RING_LOOPING_COUNT_MASK 0xf0000000
  211. #endif