reo_destination_ring.h 42 KB

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  1. /*
  2. * Copyright (c) 2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. // $ATH_LICENSE_HW_HDR_C$
  17. //
  18. // DO NOT EDIT! This file is automatically generated
  19. // These definitions are tied to a particular hardware layout
  20. #ifndef _REO_DESTINATION_RING_H_
  21. #define _REO_DESTINATION_RING_H_
  22. #if !defined(__ASSEMBLER__)
  23. #endif
  24. #include "buffer_addr_info.h"
  25. #include "rx_mpdu_desc_info.h"
  26. #include "rx_msdu_desc_info.h"
  27. // ################ START SUMMARY #################
  28. //
  29. // Dword Fields
  30. // 0-1 struct buffer_addr_info buf_or_link_desc_addr_info;
  31. // 2-3 struct rx_mpdu_desc_info rx_mpdu_desc_info_details;
  32. // 4-5 struct rx_msdu_desc_info rx_msdu_desc_info_details;
  33. // 6 rx_reo_queue_desc_addr_31_0[31:0]
  34. // 7 rx_reo_queue_desc_addr_39_32[7:0], reo_dest_buffer_type[8], reo_push_reason[10:9], reo_error_code[15:11], receive_queue_number[31:16]
  35. // 8 soft_reorder_info_valid[0], reorder_opcode[4:1], reorder_slot_index[12:5], mpdu_fragment_number[16:13], reserved_8a[31:17]
  36. // 9 reserved_9a[31:0]
  37. // 10 reserved_10a[31:0]
  38. // 11 reserved_11a[31:0]
  39. // 12 reserved_12a[31:0]
  40. // 13 reserved_13a[31:0]
  41. // 14 reserved_14a[31:0]
  42. // 15 reserved_15[19:0], ring_id[27:20], looping_count[31:28]
  43. //
  44. // ################ END SUMMARY #################
  45. #define NUM_OF_DWORDS_REO_DESTINATION_RING 16
  46. struct reo_destination_ring {
  47. struct buffer_addr_info buf_or_link_desc_addr_info;
  48. struct rx_mpdu_desc_info rx_mpdu_desc_info_details;
  49. struct rx_msdu_desc_info rx_msdu_desc_info_details;
  50. uint32_t rx_reo_queue_desc_addr_31_0 : 32; //[31:0]
  51. uint32_t rx_reo_queue_desc_addr_39_32 : 8, //[7:0]
  52. reo_dest_buffer_type : 1, //[8]
  53. reo_push_reason : 2, //[10:9]
  54. reo_error_code : 5, //[15:11]
  55. receive_queue_number : 16; //[31:16]
  56. uint32_t soft_reorder_info_valid : 1, //[0]
  57. reorder_opcode : 4, //[4:1]
  58. reorder_slot_index : 8, //[12:5]
  59. mpdu_fragment_number : 4, //[16:13]
  60. reserved_8a : 15; //[31:17]
  61. uint32_t reserved_9a : 32; //[31:0]
  62. uint32_t reserved_10a : 32; //[31:0]
  63. uint32_t reserved_11a : 32; //[31:0]
  64. uint32_t reserved_12a : 32; //[31:0]
  65. uint32_t reserved_13a : 32; //[31:0]
  66. uint32_t reserved_14a : 32; //[31:0]
  67. uint32_t reserved_15 : 20, //[19:0]
  68. ring_id : 8, //[27:20]
  69. looping_count : 4; //[31:28]
  70. };
  71. /*
  72. struct buffer_addr_info buf_or_link_desc_addr_info
  73. Consumer: REO/SW/FW
  74. Producer: RXDMA
  75. Details of the physical address of the a buffer or MSDU
  76. link descriptor
  77. struct rx_mpdu_desc_info rx_mpdu_desc_info_details
  78. Consumer: REO/SW/FW
  79. Producer: RXDMA
  80. General information related to the MPDU that is passed
  81. on from REO entrance ring to the REO destination ring
  82. struct rx_msdu_desc_info rx_msdu_desc_info_details
  83. General information related to the MSDU that is passed
  84. on from RXDMA all the way to to the REO destination ring.
  85. rx_reo_queue_desc_addr_31_0
  86. Consumer: REO
  87. Producer: RXDMA
  88. Address (lower 32 bits) of the REO queue descriptor.
  89. <legal all>
  90. rx_reo_queue_desc_addr_39_32
  91. Consumer: REO
  92. Producer: RXDMA
  93. Address (upper 8 bits) of the REO queue descriptor.
  94. <legal all>
  95. reo_dest_buffer_type
  96. Indicates the type of address provided in the
  97. 'Buf_or_link_desc_addr_info'
  98. <enum 0 MSDU_buf_address> The address of an MSDU buffer
  99. <enum 1 MSDU_link_desc_address> The address of the MSDU
  100. link descriptor.
  101. <legal all>
  102. reo_push_reason
  103. Indicates why REO pushed the frame to this exit ring
  104. <enum 0 reo_error_detected> Reo detected an error an
  105. pushed this frame to this queue
  106. <enum 1 reo_routing_instruction> Reo pushed the frame to
  107. this queue per received routing instructions. No error
  108. within REO was detected
  109. <legal 0 - 1>
  110. reo_error_code
  111. Field only valid when 'Reo_push_reason' set to
  112. 'reo_error_detected'.
  113. <enum 0 reo_queue_desc_addr_zero> Reo queue descriptor
  114. provided in the REO_ENTRANCE ring is set to 0
  115. <enum 1 reo_queue_desc_not_valid> Reo queue descriptor
  116. valid bit is NOT set
  117. <enum 2 ampdu_in_non_ba> AMPDU frame received without BA
  118. session having been setup.
  119. <enum 3 non_ba_duplicate> Non-BA session, SN equal to
  120. SSN, Retry bit set: duplicate frame
  121. <enum 4 ba_duplicate> BA session, duplicate frame
  122. <enum 5 regular_frame_2k_jump> A normal (management/data
  123. frame) received with 2K jump in SN
  124. <enum 6 bar_frame_2k_jump> A bar received with 2K jump
  125. in SSN
  126. <enum 7 regular_frame_OOR> A normal (management/data
  127. frame) received with SN falling within the OOR window
  128. <enum 8 bar_frame_OOR> A bar received with SSN falling
  129. within the OOR window
  130. <enum 9 bar_frame_no_ba_session> A bar received without
  131. a BA session
  132. <enum 10 bar_frame_sn_equals_ssn> A bar received with
  133. SSN equal to SN
  134. <enum 11 pn_check_failed> PN Check Failed packet.
  135. <enum 12 2k_error_handling_flag_set> Frame is forwarded
  136. as a result of the 'Seq_2k_error_detected_flag' been set in
  137. the REO Queue descriptor
  138. <enum 13 pn_error_handling_flag_set> Frame is forwarded
  139. as a result of the 'pn_error_detected_flag' been set in the
  140. REO Queue descriptor
  141. <enum 14 queue_descriptor_blocked_set> Frame is
  142. forwarded as a result of the queue descriptor(address) being
  143. blocked as SW/FW seems to be currently in the process of
  144. making updates to this descriptor...
  145. <legal 0-14>
  146. receive_queue_number
  147. This field indicates the REO MPDU reorder queue ID from
  148. which this frame originated. This field is populated from a
  149. field with the same name in the RX_REO_QUEUE descriptor.
  150. <legal all>
  151. soft_reorder_info_valid
  152. When set, REO has been instructed to not perform the
  153. actual re-ordering of frames for this queue, but just to
  154. insert the reorder opcodes
  155. <legal all>
  156. reorder_opcode
  157. Field is valid when 'Soft_reorder_info_valid' is set.
  158. This field is always valid for debug purpose as well.
  159. Details are in the MLD.
  160. <enum 0 invalid>
  161. <enum 1 fwdcur_fwdbuf>
  162. <enum 2 fwdbuf_fwdcur>
  163. <enum 3 qcur>
  164. <enum 4 fwdbuf_qcur>
  165. <enum 5 fwdbuf_drop>
  166. <enum 6 fwdall_drop>
  167. <enum 7 fwdall_qcur>
  168. <enum 8 reserved_reo_opcode_1>
  169. <enum 9 dropcur> the error reason code is in
  170. reo_error_code field.
  171. <enum 10 reserved_reo_opcode_2>
  172. <enum 11 reserved_reo_opcode_3>
  173. <enum 12 reserved_reo_opcode_4>
  174. <enum 13 reserved_reo_opcode_5>
  175. <enum 14 reserved_reo_opcode_6>
  176. <enum 15 reserved_reo_opcode_7>
  177. <legal all>
  178. reorder_slot_index
  179. Field only valid when 'Soft_reorder_info_valid' is set.
  180. TODO: add description
  181. <legal all>
  182. mpdu_fragment_number
  183. Field only valid when Rx_mpdu_desc_info_details.
  184. Fragment_flag is set.
  185. The fragment number from the 802.11 header.
  186. Note that the sequence number is embedded in field:
  187. Rx_mpdu_desc_info_details.
  188. Mpdu_Sequence_number
  189. <legal all>
  190. reserved_8a
  191. <legal 0>
  192. reserved_9a
  193. <legal 0>
  194. reserved_10a
  195. <legal 0>
  196. reserved_11a
  197. <legal 0>
  198. reserved_12a
  199. <legal 0>
  200. reserved_13a
  201. <legal 0>
  202. reserved_14a
  203. <legal 0>
  204. reserved_15
  205. <legal 0>
  206. ring_id
  207. The buffer pointer ring ID.
  208. 0 refers to the IDLE ring
  209. 1 - N refers to other rings
  210. Helps with debugging when dumping ring contents.
  211. <legal all>
  212. looping_count
  213. A count value that indicates the number of times the
  214. producer of entries into this Ring has looped around the
  215. ring.
  216. At initialization time, this value is set to 0. On the
  217. first loop, this value is set to 1. After the max value is
  218. reached allowed by the number of bits for this field, the
  219. count value continues with 0 again.
  220. In case SW is the consumer of the ring entries, it can
  221. use this field to figure out up to where the producer of
  222. entries has created new entries. This eliminates the need to
  223. check where the head pointer' of the ring is located once
  224. the SW starts processing an interrupt indicating that new
  225. entries have been put into this ring...
  226. Also note that SW if it wants only needs to look at the
  227. LSB bit of this count value.
  228. <legal all>
  229. */
  230. /* EXTERNAL REFERENCE : struct buffer_addr_info buf_or_link_desc_addr_info */
  231. /* Description REO_DESTINATION_RING_0_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0
  232. Address (lower 32 bits) of the MSDU buffer OR
  233. MSDU_EXTENSION descriptor OR Link Descriptor
  234. In case of 'NULL' pointer, this field is set to 0
  235. <legal all>
  236. */
  237. #define REO_DESTINATION_RING_0_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000
  238. #define REO_DESTINATION_RING_0_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
  239. #define REO_DESTINATION_RING_0_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
  240. /* Description REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32
  241. Address (upper 8 bits) of the MSDU buffer OR
  242. MSDU_EXTENSION descriptor OR Link Descriptor
  243. In case of 'NULL' pointer, this field is set to 0
  244. <legal all>
  245. */
  246. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004
  247. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
  248. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
  249. /* Description REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER
  250. Consumer: WBM
  251. Producer: SW/FW
  252. In case of 'NULL' pointer, this field is set to 0
  253. Indicates to which buffer manager the buffer OR
  254. MSDU_EXTENSION descriptor OR link descriptor that is being
  255. pointed to shall be returned after the frame has been
  256. processed. It is used by WBM for routing purposes.
  257. <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
  258. to the WMB buffer idle list
  259. <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
  260. returned to the WMB idle link descriptor idle list
  261. <enum 2 FW_BM> This buffer shall be returned to the FW
  262. <enum 3 SW0_BM> This buffer shall be returned to the SW,
  263. ring 0
  264. <enum 4 SW1_BM> This buffer shall be returned to the SW,
  265. ring 1
  266. <enum 5 SW2_BM> This buffer shall be returned to the SW,
  267. ring 2
  268. <enum 6 SW3_BM> This buffer shall be returned to the SW,
  269. ring 3
  270. <enum 7 SW4_BM> This buffer shall be returned to the SW,
  271. ring 3
  272. <legal all>
  273. */
  274. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
  275. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
  276. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000700
  277. /* Description REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE
  278. Cookie field exclusively used by SW.
  279. In case of 'NULL' pointer, this field is set to 0
  280. HW ignores the contents, accept that it passes the
  281. programmed value on to other descriptors together with the
  282. physical address
  283. Field can be used by SW to for example associate the
  284. buffers physical address with the virtual address
  285. The bit definitions as used by SW are within SW HLD
  286. specification
  287. NOTE:
  288. The three most significant bits can have a special
  289. meaning in case this struct is embedded in a TX_MPDU_DETAILS
  290. STRUCT, and field transmit_bw_restriction is set
  291. In case of NON punctured transmission:
  292. Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
  293. Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
  294. Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
  295. Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
  296. In case of punctured transmission:
  297. Sw_buffer_cookie[20:18] = 3'b000: pattern 0 only
  298. Sw_buffer_cookie[20:18] = 3'b001: pattern 1 only
  299. Sw_buffer_cookie[20:18] = 3'b010: pattern 2 only
  300. Sw_buffer_cookie[20:18] = 3'b011: pattern 3 only
  301. Sw_buffer_cookie[20:18] = 3'b100: pattern 4 only
  302. Sw_buffer_cookie[20:18] = 3'b101: pattern 5 only
  303. Sw_buffer_cookie[20:18] = 3'b110: pattern 6 only
  304. Sw_buffer_cookie[20:18] = 3'b111: pattern 7 only
  305. Note: a punctured transmission is indicated by the
  306. presence of TLV TX_PUNCTURE_SETUP embedded in the scheduler
  307. TLV
  308. <legal all>
  309. */
  310. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004
  311. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_LSB 11
  312. #define REO_DESTINATION_RING_1_BUF_OR_LINK_DESC_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff800
  313. /* EXTERNAL REFERENCE : struct rx_mpdu_desc_info rx_mpdu_desc_info_details */
  314. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT
  315. Consumer: REO/SW/FW
  316. Producer: RXDMA
  317. The number of MSDUs within the MPDU
  318. <legal all>
  319. */
  320. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_OFFSET 0x00000008
  321. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_LSB 0
  322. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MSDU_COUNT_MASK 0x000000ff
  323. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER
  324. Consumer: REO/SW/FW
  325. Producer: RXDMA
  326. The field can have two different meanings based on the
  327. setting of field 'BAR_frame':
  328. 'BAR_frame' is NOT set:
  329. The MPDU sequence number of the received frame.
  330. 'BAR_frame' is set.
  331. The MPDU Start sequence number from the BAR frame
  332. <legal all>
  333. */
  334. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_OFFSET 0x00000008
  335. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_LSB 8
  336. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_SEQUENCE_NUMBER_MASK 0x000fff00
  337. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG
  338. Consumer: REO/SW/FW
  339. Producer: RXDMA
  340. When set, this MPDU is a fragment and REO should forward
  341. this fragment MPDU to the REO destination ring without any
  342. reorder checks, pn checks or bitmap update. This implies
  343. that REO is forwarding the pointer to the MSDU link
  344. descriptor. The destination ring is coming from a
  345. programmable register setting in REO
  346. <legal all>
  347. */
  348. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_OFFSET 0x00000008
  349. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_LSB 20
  350. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_FRAGMENT_FLAG_MASK 0x00100000
  351. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT
  352. Consumer: REO/SW/FW
  353. Producer: RXDMA
  354. The retry bit setting from the MPDU header of the
  355. received frame
  356. <legal all>
  357. */
  358. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_OFFSET 0x00000008
  359. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_LSB 21
  360. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MPDU_RETRY_BIT_MASK 0x00200000
  361. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG
  362. Consumer: REO/SW/FW
  363. Producer: RXDMA
  364. When set, the MPDU was received as part of an A-MPDU.
  365. <legal all>
  366. */
  367. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_OFFSET 0x00000008
  368. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_LSB 22
  369. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_AMPDU_FLAG_MASK 0x00400000
  370. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME
  371. Consumer: REO/SW/FW
  372. Producer: RXDMA
  373. When set, the received frame is a BAR frame. After
  374. processing, this frame shall be pushed to SW or deleted.
  375. <legal all>
  376. */
  377. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_OFFSET 0x00000008
  378. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_LSB 23
  379. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_BAR_FRAME_MASK 0x00800000
  380. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO
  381. Consumer: REO/SW/FW
  382. Producer: RXDMA
  383. Copied here by RXDMA from RX_MPDU_END
  384. When not set, REO will Not perform a PN sequence number
  385. check
  386. */
  387. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_OFFSET 0x00000008
  388. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_LSB 24
  389. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_PN_FIELDS_CONTAIN_VALID_INFO_MASK 0x01000000
  390. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID
  391. When set, OLE found a valid SA entry for all MSDUs in
  392. this MPDU
  393. <legal all>
  394. */
  395. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000008
  396. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 25
  397. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x02000000
  398. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT
  399. When set, at least 1 MSDU within the MPDU has an
  400. unsuccessful MAC source address search due to the expiration
  401. of the search timer.
  402. <legal all>
  403. */
  404. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_OFFSET 0x00000008
  405. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_LSB 26
  406. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_MASK 0x04000000
  407. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID
  408. When set, OLE found a valid DA entry for all MSDUs in
  409. this MPDU
  410. <legal all>
  411. */
  412. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000008
  413. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 27
  414. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x08000000
  415. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC
  416. Field Only valid if da_is_valid is set
  417. When set, at least one of the DA addresses is a
  418. Multicast or Broadcast address.
  419. <legal all>
  420. */
  421. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000008
  422. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 28
  423. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x10000000
  424. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT
  425. When set, at least 1 MSDU within the MPDU has an
  426. unsuccessful MAC destination address search due to the
  427. expiration of the search timer.
  428. <legal all>
  429. */
  430. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_OFFSET 0x00000008
  431. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_LSB 29
  432. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_MASK 0x20000000
  433. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU
  434. Field only valid when first_msdu_in_mpdu_flag is set.
  435. When set, the contents in the MSDU buffer contains a
  436. 'RAW' MPDU. This 'RAW' MPDU might be spread out over
  437. multiple MSDU buffers.
  438. <legal all>
  439. */
  440. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_OFFSET 0x00000008
  441. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_LSB 30
  442. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_RAW_MPDU_MASK 0x40000000
  443. /* Description REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG
  444. The More Fragment bit setting from the MPDU header of
  445. the received frame
  446. <legal all>
  447. */
  448. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_OFFSET 0x00000008
  449. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_LSB 31
  450. #define REO_DESTINATION_RING_2_RX_MPDU_DESC_INFO_DETAILS_MORE_FRAGMENT_FLAG_MASK 0x80000000
  451. /* Description REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA
  452. Meta data that SW has programmed in the Peer table entry
  453. of the transmitting STA.
  454. <legal all>
  455. */
  456. #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_OFFSET 0x0000000c
  457. #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_LSB 0
  458. #define REO_DESTINATION_RING_3_RX_MPDU_DESC_INFO_DETAILS_PEER_META_DATA_MASK 0xffffffff
  459. /* EXTERNAL REFERENCE : struct rx_msdu_desc_info rx_msdu_desc_info_details */
  460. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG
  461. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  462. over multiple buffers, this field will be valid in the Last
  463. buffer used by the MSDU
  464. <enum 0 Not_first_msdu> This is not the first MSDU in
  465. the MPDU.
  466. <enum 1 first_msdu> This MSDU is the first one in the
  467. MPDU.
  468. <legal all>
  469. */
  470. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000010
  471. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_LSB 0
  472. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_FIRST_MSDU_IN_MPDU_FLAG_MASK 0x00000001
  473. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG
  474. Consumer: WBM/REO/SW/FW
  475. Producer: RXDMA
  476. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  477. over multiple buffers, this field will be valid in the Last
  478. buffer used by the MSDU
  479. <enum 0 Not_last_msdu> There are more MSDUs linked to
  480. this MSDU that belongs to this MPDU
  481. <enum 1 Last_msdu> this MSDU is the last one in the
  482. MPDU. This setting is only allowed in combination with
  483. 'Msdu_continuation' set to 0. This implies that when an msdu
  484. is spread out over multiple buffers and thus
  485. msdu_continuation is set, only for the very last buffer of
  486. the msdu, can the 'last_msdu_in_mpdu_flag' be set.
  487. When both first_msdu_in_mpdu_flag and
  488. last_msdu_in_mpdu_flag are set, the MPDU that this MSDU
  489. belongs to only contains a single MSDU.
  490. <legal all>
  491. */
  492. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_OFFSET 0x00000010
  493. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_LSB 1
  494. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_LAST_MSDU_IN_MPDU_FLAG_MASK 0x00000002
  495. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION
  496. When set, this MSDU buffer was not able to hold the
  497. entire MSDU. The next buffer will therefor contain
  498. additional information related to this MSDU.
  499. <legal all>
  500. */
  501. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_OFFSET 0x00000010
  502. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_LSB 2
  503. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_CONTINUATION_MASK 0x00000004
  504. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH
  505. Parsed from RX_MSDU_START TLV . In the case MSDU spans
  506. over multiple buffers, this field will be valid in the First
  507. buffer used by MSDU.
  508. Full MSDU length in bytes after decapsulation.
  509. This field is still valid for MPDU frames without
  510. A-MSDU. It still represents MSDU length after decapsulation
  511. Or in case of RAW MPDUs, it indicates the length of the
  512. entire MPDU (without FCS field)
  513. <legal all>
  514. */
  515. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_OFFSET 0x00000010
  516. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_LSB 3
  517. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_LENGTH_MASK 0x0001fff8
  518. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION
  519. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  520. over multiple buffers, this field will be valid in the Last
  521. buffer used by the MSDU
  522. The ID of the REO exit ring where the MSDU frame shall
  523. push after (MPDU level) reordering has finished.
  524. <enum 0 reo_destination_tcl> Reo will push the frame
  525. into the REO2TCL ring
  526. <enum 1 reo_destination_sw1> Reo will push the frame
  527. into the REO2SW1 ring
  528. <enum 2 reo_destination_sw2> Reo will push the frame
  529. into the REO2SW1 ring
  530. <enum 3 reo_destination_sw3> Reo will push the frame
  531. into the REO2SW1 ring
  532. <enum 4 reo_destination_sw4> Reo will push the frame
  533. into the REO2SW1 ring
  534. <enum 5 reo_destination_release> Reo will push the frame
  535. into the REO_release ring
  536. <enum 6 reo_destination_fw> Reo will push the frame into
  537. the REO2FW ring
  538. <enum 7 reo_destination_7> REO remaps this
  539. <enum 8 reo_destination_8> REO remaps this <enum 9
  540. reo_destination_9> REO remaps this <enum 10
  541. reo_destination_10> REO remaps this
  542. <enum 11 reo_destination_11> REO remaps this
  543. <enum 12 reo_destination_12> REO remaps this <enum 13
  544. reo_destination_13> REO remaps this
  545. <enum 14 reo_destination_14> REO remaps this
  546. <enum 15 reo_destination_15> REO remaps this
  547. <enum 16 reo_destination_16> REO remaps this
  548. <enum 17 reo_destination_17> REO remaps this
  549. <enum 18 reo_destination_18> REO remaps this
  550. <enum 19 reo_destination_19> REO remaps this
  551. <enum 20 reo_destination_20> REO remaps this
  552. <enum 21 reo_destination_21> REO remaps this
  553. <enum 22 reo_destination_22> REO remaps this
  554. <enum 23 reo_destination_23> REO remaps this
  555. <enum 24 reo_destination_24> REO remaps this
  556. <enum 25 reo_destination_25> REO remaps this
  557. <enum 26 reo_destination_26> REO remaps this
  558. <enum 27 reo_destination_27> REO remaps this
  559. <enum 28 reo_destination_28> REO remaps this
  560. <enum 29 reo_destination_29> REO remaps this
  561. <enum 30 reo_destination_30> REO remaps this
  562. <enum 31 reo_destination_31> REO remaps this
  563. <legal all>
  564. */
  565. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_OFFSET 0x00000010
  566. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_LSB 17
  567. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_REO_DESTINATION_INDICATION_MASK 0x003e0000
  568. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP
  569. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  570. over multiple buffers, this field will be valid in the Last
  571. buffer used by the MSDU
  572. When set, REO shall drop this MSDU and not forward it to
  573. any other ring...
  574. <legal all>
  575. */
  576. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_OFFSET 0x00000010
  577. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_LSB 22
  578. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_MSDU_DROP_MASK 0x00400000
  579. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID
  580. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  581. over multiple buffers, this field will be valid in the Last
  582. buffer used by the MSDU
  583. Indicates that OLE found a valid SA entry for this MSDU
  584. <legal all>
  585. */
  586. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_OFFSET 0x00000010
  587. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_LSB 23
  588. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IS_VALID_MASK 0x00800000
  589. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT
  590. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  591. over multiple buffers, this field will be valid in the Last
  592. buffer used by the MSDU
  593. Indicates an unsuccessful MAC source address search due
  594. to the expiring of the search timer for this MSDU
  595. <legal all>
  596. */
  597. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_OFFSET 0x00000010
  598. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_LSB 24
  599. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_SA_IDX_TIMEOUT_MASK 0x01000000
  600. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID
  601. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  602. over multiple buffers, this field will be valid in the Last
  603. buffer used by the MSDU
  604. Indicates that OLE found a valid DA entry for this MSDU
  605. <legal all>
  606. */
  607. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_OFFSET 0x00000010
  608. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_LSB 25
  609. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_VALID_MASK 0x02000000
  610. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC
  611. Field Only valid if da_is_valid is set
  612. Indicates the DA address was a Multicast of Broadcast
  613. address for this MSDU
  614. <legal all>
  615. */
  616. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_OFFSET 0x00000010
  617. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_LSB 26
  618. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IS_MCBC_MASK 0x04000000
  619. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT
  620. Parsed from RX_MSDU_END TLV . In the case MSDU spans
  621. over multiple buffers, this field will be valid in the Last
  622. buffer used by the MSDU
  623. Indicates an unsuccessful MAC destination address search
  624. due to the expiring of the search timer for this MSDU
  625. <legal all>
  626. */
  627. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_OFFSET 0x00000010
  628. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_LSB 27
  629. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_DA_IDX_TIMEOUT_MASK 0x08000000
  630. /* Description REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A
  631. <legal 0>
  632. */
  633. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_OFFSET 0x00000010
  634. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_LSB 28
  635. #define REO_DESTINATION_RING_4_RX_MSDU_DESC_INFO_DETAILS_RESERVED_0A_MASK 0xf0000000
  636. /* Description REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A
  637. <legal 0>
  638. */
  639. #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A_OFFSET 0x00000014
  640. #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A_LSB 0
  641. #define REO_DESTINATION_RING_5_RX_MSDU_DESC_INFO_DETAILS_RESERVED_1A_MASK 0xffffffff
  642. /* Description REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0
  643. Consumer: REO
  644. Producer: RXDMA
  645. Address (lower 32 bits) of the REO queue descriptor.
  646. <legal all>
  647. */
  648. #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET 0x00000018
  649. #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_LSB 0
  650. #define REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_MASK 0xffffffff
  651. /* Description REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32
  652. Consumer: REO
  653. Producer: RXDMA
  654. Address (upper 8 bits) of the REO queue descriptor.
  655. <legal all>
  656. */
  657. #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_OFFSET 0x0000001c
  658. #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_LSB 0
  659. #define REO_DESTINATION_RING_7_RX_REO_QUEUE_DESC_ADDR_39_32_MASK 0x000000ff
  660. /* Description REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE
  661. Indicates the type of address provided in the
  662. 'Buf_or_link_desc_addr_info'
  663. <enum 0 MSDU_buf_address> The address of an MSDU buffer
  664. <enum 1 MSDU_link_desc_address> The address of the MSDU
  665. link descriptor.
  666. <legal all>
  667. */
  668. #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_OFFSET 0x0000001c
  669. #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_LSB 8
  670. #define REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_MASK 0x00000100
  671. /* Description REO_DESTINATION_RING_7_REO_PUSH_REASON
  672. Indicates why REO pushed the frame to this exit ring
  673. <enum 0 reo_error_detected> Reo detected an error an
  674. pushed this frame to this queue
  675. <enum 1 reo_routing_instruction> Reo pushed the frame to
  676. this queue per received routing instructions. No error
  677. within REO was detected
  678. <legal 0 - 1>
  679. */
  680. #define REO_DESTINATION_RING_7_REO_PUSH_REASON_OFFSET 0x0000001c
  681. #define REO_DESTINATION_RING_7_REO_PUSH_REASON_LSB 9
  682. #define REO_DESTINATION_RING_7_REO_PUSH_REASON_MASK 0x00000600
  683. /* Description REO_DESTINATION_RING_7_REO_ERROR_CODE
  684. Field only valid when 'Reo_push_reason' set to
  685. 'reo_error_detected'.
  686. <enum 0 reo_queue_desc_addr_zero> Reo queue descriptor
  687. provided in the REO_ENTRANCE ring is set to 0
  688. <enum 1 reo_queue_desc_not_valid> Reo queue descriptor
  689. valid bit is NOT set
  690. <enum 2 ampdu_in_non_ba> AMPDU frame received without BA
  691. session having been setup.
  692. <enum 3 non_ba_duplicate> Non-BA session, SN equal to
  693. SSN, Retry bit set: duplicate frame
  694. <enum 4 ba_duplicate> BA session, duplicate frame
  695. <enum 5 regular_frame_2k_jump> A normal (management/data
  696. frame) received with 2K jump in SN
  697. <enum 6 bar_frame_2k_jump> A bar received with 2K jump
  698. in SSN
  699. <enum 7 regular_frame_OOR> A normal (management/data
  700. frame) received with SN falling within the OOR window
  701. <enum 8 bar_frame_OOR> A bar received with SSN falling
  702. within the OOR window
  703. <enum 9 bar_frame_no_ba_session> A bar received without
  704. a BA session
  705. <enum 10 bar_frame_sn_equals_ssn> A bar received with
  706. SSN equal to SN
  707. <enum 11 pn_check_failed> PN Check Failed packet.
  708. <enum 12 2k_error_handling_flag_set> Frame is forwarded
  709. as a result of the 'Seq_2k_error_detected_flag' been set in
  710. the REO Queue descriptor
  711. <enum 13 pn_error_handling_flag_set> Frame is forwarded
  712. as a result of the 'pn_error_detected_flag' been set in the
  713. REO Queue descriptor
  714. <enum 14 queue_descriptor_blocked_set> Frame is
  715. forwarded as a result of the queue descriptor(address) being
  716. blocked as SW/FW seems to be currently in the process of
  717. making updates to this descriptor...
  718. <legal 0-14>
  719. */
  720. #define REO_DESTINATION_RING_7_REO_ERROR_CODE_OFFSET 0x0000001c
  721. #define REO_DESTINATION_RING_7_REO_ERROR_CODE_LSB 11
  722. #define REO_DESTINATION_RING_7_REO_ERROR_CODE_MASK 0x0000f800
  723. /* Description REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER
  724. This field indicates the REO MPDU reorder queue ID from
  725. which this frame originated. This field is populated from a
  726. field with the same name in the RX_REO_QUEUE descriptor.
  727. <legal all>
  728. */
  729. #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_OFFSET 0x0000001c
  730. #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_LSB 16
  731. #define REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_MASK 0xffff0000
  732. /* Description REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID
  733. When set, REO has been instructed to not perform the
  734. actual re-ordering of frames for this queue, but just to
  735. insert the reorder opcodes
  736. <legal all>
  737. */
  738. #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_OFFSET 0x00000020
  739. #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_LSB 0
  740. #define REO_DESTINATION_RING_8_SOFT_REORDER_INFO_VALID_MASK 0x00000001
  741. /* Description REO_DESTINATION_RING_8_REORDER_OPCODE
  742. Field is valid when 'Soft_reorder_info_valid' is set.
  743. This field is always valid for debug purpose as well.
  744. Details are in the MLD.
  745. <enum 0 invalid>
  746. <enum 1 fwdcur_fwdbuf>
  747. <enum 2 fwdbuf_fwdcur>
  748. <enum 3 qcur>
  749. <enum 4 fwdbuf_qcur>
  750. <enum 5 fwdbuf_drop>
  751. <enum 6 fwdall_drop>
  752. <enum 7 fwdall_qcur>
  753. <enum 8 reserved_reo_opcode_1>
  754. <enum 9 dropcur> the error reason code is in
  755. reo_error_code field.
  756. <enum 10 reserved_reo_opcode_2>
  757. <enum 11 reserved_reo_opcode_3>
  758. <enum 12 reserved_reo_opcode_4>
  759. <enum 13 reserved_reo_opcode_5>
  760. <enum 14 reserved_reo_opcode_6>
  761. <enum 15 reserved_reo_opcode_7>
  762. <legal all>
  763. */
  764. #define REO_DESTINATION_RING_8_REORDER_OPCODE_OFFSET 0x00000020
  765. #define REO_DESTINATION_RING_8_REORDER_OPCODE_LSB 1
  766. #define REO_DESTINATION_RING_8_REORDER_OPCODE_MASK 0x0000001e
  767. /* Description REO_DESTINATION_RING_8_REORDER_SLOT_INDEX
  768. Field only valid when 'Soft_reorder_info_valid' is set.
  769. TODO: add description
  770. <legal all>
  771. */
  772. #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_OFFSET 0x00000020
  773. #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_LSB 5
  774. #define REO_DESTINATION_RING_8_REORDER_SLOT_INDEX_MASK 0x00001fe0
  775. /* Description REO_DESTINATION_RING_8_MPDU_FRAGMENT_NUMBER
  776. Field only valid when Rx_mpdu_desc_info_details.
  777. Fragment_flag is set.
  778. The fragment number from the 802.11 header.
  779. Note that the sequence number is embedded in field:
  780. Rx_mpdu_desc_info_details.
  781. Mpdu_Sequence_number
  782. <legal all>
  783. */
  784. #define REO_DESTINATION_RING_8_MPDU_FRAGMENT_NUMBER_OFFSET 0x00000020
  785. #define REO_DESTINATION_RING_8_MPDU_FRAGMENT_NUMBER_LSB 13
  786. #define REO_DESTINATION_RING_8_MPDU_FRAGMENT_NUMBER_MASK 0x0001e000
  787. /* Description REO_DESTINATION_RING_8_RESERVED_8A
  788. <legal 0>
  789. */
  790. #define REO_DESTINATION_RING_8_RESERVED_8A_OFFSET 0x00000020
  791. #define REO_DESTINATION_RING_8_RESERVED_8A_LSB 17
  792. #define REO_DESTINATION_RING_8_RESERVED_8A_MASK 0xfffe0000
  793. /* Description REO_DESTINATION_RING_9_RESERVED_9A
  794. <legal 0>
  795. */
  796. #define REO_DESTINATION_RING_9_RESERVED_9A_OFFSET 0x00000024
  797. #define REO_DESTINATION_RING_9_RESERVED_9A_LSB 0
  798. #define REO_DESTINATION_RING_9_RESERVED_9A_MASK 0xffffffff
  799. /* Description REO_DESTINATION_RING_10_RESERVED_10A
  800. <legal 0>
  801. */
  802. #define REO_DESTINATION_RING_10_RESERVED_10A_OFFSET 0x00000028
  803. #define REO_DESTINATION_RING_10_RESERVED_10A_LSB 0
  804. #define REO_DESTINATION_RING_10_RESERVED_10A_MASK 0xffffffff
  805. /* Description REO_DESTINATION_RING_11_RESERVED_11A
  806. <legal 0>
  807. */
  808. #define REO_DESTINATION_RING_11_RESERVED_11A_OFFSET 0x0000002c
  809. #define REO_DESTINATION_RING_11_RESERVED_11A_LSB 0
  810. #define REO_DESTINATION_RING_11_RESERVED_11A_MASK 0xffffffff
  811. /* Description REO_DESTINATION_RING_12_RESERVED_12A
  812. <legal 0>
  813. */
  814. #define REO_DESTINATION_RING_12_RESERVED_12A_OFFSET 0x00000030
  815. #define REO_DESTINATION_RING_12_RESERVED_12A_LSB 0
  816. #define REO_DESTINATION_RING_12_RESERVED_12A_MASK 0xffffffff
  817. /* Description REO_DESTINATION_RING_13_RESERVED_13A
  818. <legal 0>
  819. */
  820. #define REO_DESTINATION_RING_13_RESERVED_13A_OFFSET 0x00000034
  821. #define REO_DESTINATION_RING_13_RESERVED_13A_LSB 0
  822. #define REO_DESTINATION_RING_13_RESERVED_13A_MASK 0xffffffff
  823. /* Description REO_DESTINATION_RING_14_RESERVED_14A
  824. <legal 0>
  825. */
  826. #define REO_DESTINATION_RING_14_RESERVED_14A_OFFSET 0x00000038
  827. #define REO_DESTINATION_RING_14_RESERVED_14A_LSB 0
  828. #define REO_DESTINATION_RING_14_RESERVED_14A_MASK 0xffffffff
  829. /* Description REO_DESTINATION_RING_15_RESERVED_15
  830. <legal 0>
  831. */
  832. #define REO_DESTINATION_RING_15_RESERVED_15_OFFSET 0x0000003c
  833. #define REO_DESTINATION_RING_15_RESERVED_15_LSB 0
  834. #define REO_DESTINATION_RING_15_RESERVED_15_MASK 0x000fffff
  835. /* Description REO_DESTINATION_RING_15_RING_ID
  836. The buffer pointer ring ID.
  837. 0 refers to the IDLE ring
  838. 1 - N refers to other rings
  839. Helps with debugging when dumping ring contents.
  840. <legal all>
  841. */
  842. #define REO_DESTINATION_RING_15_RING_ID_OFFSET 0x0000003c
  843. #define REO_DESTINATION_RING_15_RING_ID_LSB 20
  844. #define REO_DESTINATION_RING_15_RING_ID_MASK 0x0ff00000
  845. /* Description REO_DESTINATION_RING_15_LOOPING_COUNT
  846. A count value that indicates the number of times the
  847. producer of entries into this Ring has looped around the
  848. ring.
  849. At initialization time, this value is set to 0. On the
  850. first loop, this value is set to 1. After the max value is
  851. reached allowed by the number of bits for this field, the
  852. count value continues with 0 again.
  853. In case SW is the consumer of the ring entries, it can
  854. use this field to figure out up to where the producer of
  855. entries has created new entries. This eliminates the need to
  856. check where the head pointer' of the ring is located once
  857. the SW starts processing an interrupt indicating that new
  858. entries have been put into this ring...
  859. Also note that SW if it wants only needs to look at the
  860. LSB bit of this count value.
  861. <legal all>
  862. */
  863. #define REO_DESTINATION_RING_15_LOOPING_COUNT_OFFSET 0x0000003c
  864. #define REO_DESTINATION_RING_15_LOOPING_COUNT_LSB 28
  865. #define REO_DESTINATION_RING_15_LOOPING_COUNT_MASK 0xf0000000
  866. #endif // _REO_DESTINATION_RING_H_