buffer_addr_info.h 7.0 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _BUFFER_ADDR_INFO_H_
  19. #define _BUFFER_ADDR_INFO_H_
  20. #if !defined(__ASSEMBLER__)
  21. #endif
  22. // ################ START SUMMARY #################
  23. //
  24. // Dword Fields
  25. // 0 buffer_addr_31_0[31:0]
  26. // 1 buffer_addr_39_32[7:0], return_buffer_manager[10:8], sw_buffer_cookie[31:11]
  27. //
  28. // ################ END SUMMARY #################
  29. #define NUM_OF_DWORDS_BUFFER_ADDR_INFO 2
  30. struct buffer_addr_info {
  31. uint32_t buffer_addr_31_0 : 32; //[31:0]
  32. uint32_t buffer_addr_39_32 : 8, //[7:0]
  33. return_buffer_manager : 3, //[10:8]
  34. sw_buffer_cookie : 21; //[31:11]
  35. };
  36. /*
  37. buffer_addr_31_0
  38. Address (lower 32 bits) of the MSDU buffer OR
  39. MSDU_EXTENSION descriptor OR Link Descriptor
  40. In case of 'NULL' pointer, this field is set to 0
  41. <legal all>
  42. buffer_addr_39_32
  43. Address (upper 8 bits) of the MSDU buffer OR
  44. MSDU_EXTENSION descriptor OR Link Descriptor
  45. In case of 'NULL' pointer, this field is set to 0
  46. <legal all>
  47. return_buffer_manager
  48. Consumer: WBM
  49. Producer: SW/FW
  50. In case of 'NULL' pointer, this field is set to 0
  51. Indicates to which buffer manager the buffer OR
  52. MSDU_EXTENSION descriptor OR link descriptor that is being
  53. pointed to shall be returned after the frame has been
  54. processed. It is used by WBM for routing purposes.
  55. <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
  56. to the WMB buffer idle list
  57. <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
  58. returned to the WMB idle link descriptor idle list
  59. <enum 2 FW_BM> This buffer shall be returned to the FW
  60. <enum 3 SW0_BM> This buffer shall be returned to the SW,
  61. ring 0
  62. <enum 4 SW1_BM> This buffer shall be returned to the SW,
  63. ring 1
  64. <enum 5 SW2_BM> This buffer shall be returned to the SW,
  65. ring 2
  66. <enum 6 SW3_BM> This buffer shall be returned to the SW,
  67. ring 3
  68. <legal 0-6>
  69. sw_buffer_cookie
  70. Cookie field exclusively used by SW.
  71. In case of 'NULL' pointer, this field is set to 0
  72. HW ignores the contents, accept that it passes the
  73. programmed value on to other descriptors together with the
  74. physical address
  75. Field can be used by SW to for example associate the
  76. buffers physical address with the virtual address
  77. The bit definitions as used by SW are within SW HLD
  78. specification
  79. NOTE:
  80. The two most significant bits can have a special meaning
  81. in case this struct is embedded in a TX_MPDU_DETAILS STRUCT,
  82. and field transmit_bw_restriction is set
  83. Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
  84. Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
  85. Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
  86. Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
  87. <legal all>
  88. */
  89. /* Description BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0
  90. Address (lower 32 bits) of the MSDU buffer OR
  91. MSDU_EXTENSION descriptor OR Link Descriptor
  92. In case of 'NULL' pointer, this field is set to 0
  93. <legal all>
  94. */
  95. #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_OFFSET 0x00000000
  96. #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_LSB 0
  97. #define BUFFER_ADDR_INFO_0_BUFFER_ADDR_31_0_MASK 0xffffffff
  98. /* Description BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32
  99. Address (upper 8 bits) of the MSDU buffer OR
  100. MSDU_EXTENSION descriptor OR Link Descriptor
  101. In case of 'NULL' pointer, this field is set to 0
  102. <legal all>
  103. */
  104. #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_OFFSET 0x00000004
  105. #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_LSB 0
  106. #define BUFFER_ADDR_INFO_1_BUFFER_ADDR_39_32_MASK 0x000000ff
  107. /* Description BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER
  108. Consumer: WBM
  109. Producer: SW/FW
  110. In case of 'NULL' pointer, this field is set to 0
  111. Indicates to which buffer manager the buffer OR
  112. MSDU_EXTENSION descriptor OR link descriptor that is being
  113. pointed to shall be returned after the frame has been
  114. processed. It is used by WBM for routing purposes.
  115. <enum 0 WBM_IDLE_BUF_LIST> This buffer shall be returned
  116. to the WMB buffer idle list
  117. <enum 1 WBM_IDLE_DESC_LIST> This buffer shall be
  118. returned to the WMB idle link descriptor idle list
  119. <enum 2 FW_BM> This buffer shall be returned to the FW
  120. <enum 3 SW0_BM> This buffer shall be returned to the SW,
  121. ring 0
  122. <enum 4 SW1_BM> This buffer shall be returned to the SW,
  123. ring 1
  124. <enum 5 SW2_BM> This buffer shall be returned to the SW,
  125. ring 2
  126. <enum 6 SW3_BM> This buffer shall be returned to the SW,
  127. ring 3
  128. <legal 0-6>
  129. */
  130. #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
  131. #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB 8
  132. #define BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK 0x00000700
  133. /* Description BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE
  134. Cookie field exclusively used by SW.
  135. In case of 'NULL' pointer, this field is set to 0
  136. HW ignores the contents, accept that it passes the
  137. programmed value on to other descriptors together with the
  138. physical address
  139. Field can be used by SW to for example associate the
  140. buffers physical address with the virtual address
  141. The bit definitions as used by SW are within SW HLD
  142. specification
  143. NOTE:
  144. The two most significant bits can have a special meaning
  145. in case this struct is embedded in a TX_MPDU_DETAILS STRUCT,
  146. and field transmit_bw_restriction is set
  147. Sw_buffer_cookie[20:19] = 2'b00: 20 MHz TX only
  148. Sw_buffer_cookie[20:19] = 2'b01: 40 MHz TX only
  149. Sw_buffer_cookie[20:19] = 2'b10: 80 MHz TX only
  150. Sw_buffer_cookie[20:19] = 2'b11: 160 MHz TX only
  151. <legal all>
  152. */
  153. #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET 0x00000004
  154. #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB 11
  155. #define BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK 0xfffff800
  156. #endif // _BUFFER_ADDR_INFO_H_