vht_sig_a_info.h 9.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215
  1. /*
  2. * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
  3. * SPDX-License-Identifier: ISC
  4. */
  5. #ifndef _VHT_SIG_A_INFO_H_
  6. #define _VHT_SIG_A_INFO_H_
  7. #if !defined(__ASSEMBLER__)
  8. #endif
  9. #define NUM_OF_DWORDS_VHT_SIG_A_INFO 2
  10. struct vht_sig_a_info {
  11. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  12. uint32_t bandwidth : 2,
  13. vhta_reserved_0 : 1,
  14. stbc : 1,
  15. group_id : 6,
  16. n_sts : 12,
  17. txop_ps_not_allowed : 1,
  18. vhta_reserved_0b : 1,
  19. reserved_0 : 8;
  20. uint32_t gi_setting : 2,
  21. su_mu_coding : 1,
  22. ldpc_extra_symbol : 1,
  23. mcs : 4,
  24. beamformed : 1,
  25. vhta_reserved_1 : 1,
  26. crc : 8,
  27. tail : 6,
  28. reserved_1 : 7,
  29. rx_integrity_check_passed : 1;
  30. #else
  31. uint32_t reserved_0 : 8,
  32. vhta_reserved_0b : 1,
  33. txop_ps_not_allowed : 1,
  34. n_sts : 12,
  35. group_id : 6,
  36. stbc : 1,
  37. vhta_reserved_0 : 1,
  38. bandwidth : 2;
  39. uint32_t rx_integrity_check_passed : 1,
  40. reserved_1 : 7,
  41. tail : 6,
  42. crc : 8,
  43. vhta_reserved_1 : 1,
  44. beamformed : 1,
  45. mcs : 4,
  46. ldpc_extra_symbol : 1,
  47. su_mu_coding : 1,
  48. gi_setting : 2;
  49. #endif
  50. };
  51. #define VHT_SIG_A_INFO_BANDWIDTH_OFFSET 0x00000000
  52. #define VHT_SIG_A_INFO_BANDWIDTH_LSB 0
  53. #define VHT_SIG_A_INFO_BANDWIDTH_MSB 1
  54. #define VHT_SIG_A_INFO_BANDWIDTH_MASK 0x00000003
  55. #define VHT_SIG_A_INFO_VHTA_RESERVED_0_OFFSET 0x00000000
  56. #define VHT_SIG_A_INFO_VHTA_RESERVED_0_LSB 2
  57. #define VHT_SIG_A_INFO_VHTA_RESERVED_0_MSB 2
  58. #define VHT_SIG_A_INFO_VHTA_RESERVED_0_MASK 0x00000004
  59. #define VHT_SIG_A_INFO_STBC_OFFSET 0x00000000
  60. #define VHT_SIG_A_INFO_STBC_LSB 3
  61. #define VHT_SIG_A_INFO_STBC_MSB 3
  62. #define VHT_SIG_A_INFO_STBC_MASK 0x00000008
  63. #define VHT_SIG_A_INFO_GROUP_ID_OFFSET 0x00000000
  64. #define VHT_SIG_A_INFO_GROUP_ID_LSB 4
  65. #define VHT_SIG_A_INFO_GROUP_ID_MSB 9
  66. #define VHT_SIG_A_INFO_GROUP_ID_MASK 0x000003f0
  67. #define VHT_SIG_A_INFO_N_STS_OFFSET 0x00000000
  68. #define VHT_SIG_A_INFO_N_STS_LSB 10
  69. #define VHT_SIG_A_INFO_N_STS_MSB 21
  70. #define VHT_SIG_A_INFO_N_STS_MASK 0x003ffc00
  71. #define VHT_SIG_A_INFO_TXOP_PS_NOT_ALLOWED_OFFSET 0x00000000
  72. #define VHT_SIG_A_INFO_TXOP_PS_NOT_ALLOWED_LSB 22
  73. #define VHT_SIG_A_INFO_TXOP_PS_NOT_ALLOWED_MSB 22
  74. #define VHT_SIG_A_INFO_TXOP_PS_NOT_ALLOWED_MASK 0x00400000
  75. #define VHT_SIG_A_INFO_VHTA_RESERVED_0B_OFFSET 0x00000000
  76. #define VHT_SIG_A_INFO_VHTA_RESERVED_0B_LSB 23
  77. #define VHT_SIG_A_INFO_VHTA_RESERVED_0B_MSB 23
  78. #define VHT_SIG_A_INFO_VHTA_RESERVED_0B_MASK 0x00800000
  79. #define VHT_SIG_A_INFO_RESERVED_0_OFFSET 0x00000000
  80. #define VHT_SIG_A_INFO_RESERVED_0_LSB 24
  81. #define VHT_SIG_A_INFO_RESERVED_0_MSB 31
  82. #define VHT_SIG_A_INFO_RESERVED_0_MASK 0xff000000
  83. #define VHT_SIG_A_INFO_GI_SETTING_OFFSET 0x00000004
  84. #define VHT_SIG_A_INFO_GI_SETTING_LSB 0
  85. #define VHT_SIG_A_INFO_GI_SETTING_MSB 1
  86. #define VHT_SIG_A_INFO_GI_SETTING_MASK 0x00000003
  87. #define VHT_SIG_A_INFO_SU_MU_CODING_OFFSET 0x00000004
  88. #define VHT_SIG_A_INFO_SU_MU_CODING_LSB 2
  89. #define VHT_SIG_A_INFO_SU_MU_CODING_MSB 2
  90. #define VHT_SIG_A_INFO_SU_MU_CODING_MASK 0x00000004
  91. #define VHT_SIG_A_INFO_LDPC_EXTRA_SYMBOL_OFFSET 0x00000004
  92. #define VHT_SIG_A_INFO_LDPC_EXTRA_SYMBOL_LSB 3
  93. #define VHT_SIG_A_INFO_LDPC_EXTRA_SYMBOL_MSB 3
  94. #define VHT_SIG_A_INFO_LDPC_EXTRA_SYMBOL_MASK 0x00000008
  95. #define VHT_SIG_A_INFO_MCS_OFFSET 0x00000004
  96. #define VHT_SIG_A_INFO_MCS_LSB 4
  97. #define VHT_SIG_A_INFO_MCS_MSB 7
  98. #define VHT_SIG_A_INFO_MCS_MASK 0x000000f0
  99. #define VHT_SIG_A_INFO_BEAMFORMED_OFFSET 0x00000004
  100. #define VHT_SIG_A_INFO_BEAMFORMED_LSB 8
  101. #define VHT_SIG_A_INFO_BEAMFORMED_MSB 8
  102. #define VHT_SIG_A_INFO_BEAMFORMED_MASK 0x00000100
  103. #define VHT_SIG_A_INFO_VHTA_RESERVED_1_OFFSET 0x00000004
  104. #define VHT_SIG_A_INFO_VHTA_RESERVED_1_LSB 9
  105. #define VHT_SIG_A_INFO_VHTA_RESERVED_1_MSB 9
  106. #define VHT_SIG_A_INFO_VHTA_RESERVED_1_MASK 0x00000200
  107. #define VHT_SIG_A_INFO_CRC_OFFSET 0x00000004
  108. #define VHT_SIG_A_INFO_CRC_LSB 10
  109. #define VHT_SIG_A_INFO_CRC_MSB 17
  110. #define VHT_SIG_A_INFO_CRC_MASK 0x0003fc00
  111. #define VHT_SIG_A_INFO_TAIL_OFFSET 0x00000004
  112. #define VHT_SIG_A_INFO_TAIL_LSB 18
  113. #define VHT_SIG_A_INFO_TAIL_MSB 23
  114. #define VHT_SIG_A_INFO_TAIL_MASK 0x00fc0000
  115. #define VHT_SIG_A_INFO_RESERVED_1_OFFSET 0x00000004
  116. #define VHT_SIG_A_INFO_RESERVED_1_LSB 24
  117. #define VHT_SIG_A_INFO_RESERVED_1_MSB 30
  118. #define VHT_SIG_A_INFO_RESERVED_1_MASK 0x7f000000
  119. #define VHT_SIG_A_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x00000004
  120. #define VHT_SIG_A_INFO_RX_INTEGRITY_CHECK_PASSED_LSB 31
  121. #define VHT_SIG_A_INFO_RX_INTEGRITY_CHECK_PASSED_MSB 31
  122. #define VHT_SIG_A_INFO_RX_INTEGRITY_CHECK_PASSED_MASK 0x80000000
  123. #endif