tx_fes_status_1k_ba.h 23 KB

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  1. /*
  2. * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
  3. * SPDX-License-Identifier: ISC
  4. */
  5. #ifndef _TX_FES_STATUS_1K_BA_H_
  6. #define _TX_FES_STATUS_1K_BA_H_
  7. #if !defined(__ASSEMBLER__)
  8. #endif
  9. #define NUM_OF_DWORDS_TX_FES_STATUS_1K_BA 34
  10. #define NUM_OF_QWORDS_TX_FES_STATUS_1K_BA 17
  11. struct tx_fes_status_1k_ba {
  12. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  13. uint32_t ack_ba_status_type : 1,
  14. ba_type : 1,
  15. ba_tid : 4,
  16. unexpected_ack_or_ba : 1,
  17. response_timeout : 1,
  18. ack_frame_rssi : 8,
  19. ssn : 12,
  20. reserved_0b : 4;
  21. uint32_t sw_peer_id : 16,
  22. reserved_1a : 16;
  23. uint32_t ba_bitmap_31_0 : 32;
  24. uint32_t ba_bitmap_63_32 : 32;
  25. uint32_t ba_bitmap_95_64 : 32;
  26. uint32_t ba_bitmap_127_96 : 32;
  27. uint32_t ba_bitmap_159_128 : 32;
  28. uint32_t ba_bitmap_191_160 : 32;
  29. uint32_t ba_bitmap_223_192 : 32;
  30. uint32_t ba_bitmap_255_224 : 32;
  31. uint32_t ba_bitmap_287_256 : 32;
  32. uint32_t ba_bitmap_319_288 : 32;
  33. uint32_t ba_bitmap_351_320 : 32;
  34. uint32_t ba_bitmap_383_352 : 32;
  35. uint32_t ba_bitmap_415_384 : 32;
  36. uint32_t ba_bitmap_447_416 : 32;
  37. uint32_t ba_bitmap_479_448 : 32;
  38. uint32_t ba_bitmap_511_480 : 32;
  39. uint32_t ba_bitmap_543_512 : 32;
  40. uint32_t ba_bitmap_575_544 : 32;
  41. uint32_t ba_bitmap_607_576 : 32;
  42. uint32_t ba_bitmap_639_608 : 32;
  43. uint32_t ba_bitmap_671_640 : 32;
  44. uint32_t ba_bitmap_703_672 : 32;
  45. uint32_t ba_bitmap_735_704 : 32;
  46. uint32_t ba_bitmap_767_736 : 32;
  47. uint32_t ba_bitmap_799_768 : 32;
  48. uint32_t ba_bitmap_831_800 : 32;
  49. uint32_t ba_bitmap_863_832 : 32;
  50. uint32_t ba_bitmap_895_864 : 32;
  51. uint32_t ba_bitmap_927_896 : 32;
  52. uint32_t ba_bitmap_959_928 : 32;
  53. uint32_t ba_bitmap_991_960 : 32;
  54. uint32_t ba_bitmap_1023_992 : 32;
  55. #else
  56. uint32_t reserved_0b : 4,
  57. ssn : 12,
  58. ack_frame_rssi : 8,
  59. response_timeout : 1,
  60. unexpected_ack_or_ba : 1,
  61. ba_tid : 4,
  62. ba_type : 1,
  63. ack_ba_status_type : 1;
  64. uint32_t reserved_1a : 16,
  65. sw_peer_id : 16;
  66. uint32_t ba_bitmap_31_0 : 32;
  67. uint32_t ba_bitmap_63_32 : 32;
  68. uint32_t ba_bitmap_95_64 : 32;
  69. uint32_t ba_bitmap_127_96 : 32;
  70. uint32_t ba_bitmap_159_128 : 32;
  71. uint32_t ba_bitmap_191_160 : 32;
  72. uint32_t ba_bitmap_223_192 : 32;
  73. uint32_t ba_bitmap_255_224 : 32;
  74. uint32_t ba_bitmap_287_256 : 32;
  75. uint32_t ba_bitmap_319_288 : 32;
  76. uint32_t ba_bitmap_351_320 : 32;
  77. uint32_t ba_bitmap_383_352 : 32;
  78. uint32_t ba_bitmap_415_384 : 32;
  79. uint32_t ba_bitmap_447_416 : 32;
  80. uint32_t ba_bitmap_479_448 : 32;
  81. uint32_t ba_bitmap_511_480 : 32;
  82. uint32_t ba_bitmap_543_512 : 32;
  83. uint32_t ba_bitmap_575_544 : 32;
  84. uint32_t ba_bitmap_607_576 : 32;
  85. uint32_t ba_bitmap_639_608 : 32;
  86. uint32_t ba_bitmap_671_640 : 32;
  87. uint32_t ba_bitmap_703_672 : 32;
  88. uint32_t ba_bitmap_735_704 : 32;
  89. uint32_t ba_bitmap_767_736 : 32;
  90. uint32_t ba_bitmap_799_768 : 32;
  91. uint32_t ba_bitmap_831_800 : 32;
  92. uint32_t ba_bitmap_863_832 : 32;
  93. uint32_t ba_bitmap_895_864 : 32;
  94. uint32_t ba_bitmap_927_896 : 32;
  95. uint32_t ba_bitmap_959_928 : 32;
  96. uint32_t ba_bitmap_991_960 : 32;
  97. uint32_t ba_bitmap_1023_992 : 32;
  98. #endif
  99. };
  100. #define TX_FES_STATUS_1K_BA_ACK_BA_STATUS_TYPE_OFFSET 0x0000000000000000
  101. #define TX_FES_STATUS_1K_BA_ACK_BA_STATUS_TYPE_LSB 0
  102. #define TX_FES_STATUS_1K_BA_ACK_BA_STATUS_TYPE_MSB 0
  103. #define TX_FES_STATUS_1K_BA_ACK_BA_STATUS_TYPE_MASK 0x0000000000000001
  104. #define TX_FES_STATUS_1K_BA_BA_TYPE_OFFSET 0x0000000000000000
  105. #define TX_FES_STATUS_1K_BA_BA_TYPE_LSB 1
  106. #define TX_FES_STATUS_1K_BA_BA_TYPE_MSB 1
  107. #define TX_FES_STATUS_1K_BA_BA_TYPE_MASK 0x0000000000000002
  108. #define TX_FES_STATUS_1K_BA_BA_TID_OFFSET 0x0000000000000000
  109. #define TX_FES_STATUS_1K_BA_BA_TID_LSB 2
  110. #define TX_FES_STATUS_1K_BA_BA_TID_MSB 5
  111. #define TX_FES_STATUS_1K_BA_BA_TID_MASK 0x000000000000003c
  112. #define TX_FES_STATUS_1K_BA_UNEXPECTED_ACK_OR_BA_OFFSET 0x0000000000000000
  113. #define TX_FES_STATUS_1K_BA_UNEXPECTED_ACK_OR_BA_LSB 6
  114. #define TX_FES_STATUS_1K_BA_UNEXPECTED_ACK_OR_BA_MSB 6
  115. #define TX_FES_STATUS_1K_BA_UNEXPECTED_ACK_OR_BA_MASK 0x0000000000000040
  116. #define TX_FES_STATUS_1K_BA_RESPONSE_TIMEOUT_OFFSET 0x0000000000000000
  117. #define TX_FES_STATUS_1K_BA_RESPONSE_TIMEOUT_LSB 7
  118. #define TX_FES_STATUS_1K_BA_RESPONSE_TIMEOUT_MSB 7
  119. #define TX_FES_STATUS_1K_BA_RESPONSE_TIMEOUT_MASK 0x0000000000000080
  120. #define TX_FES_STATUS_1K_BA_ACK_FRAME_RSSI_OFFSET 0x0000000000000000
  121. #define TX_FES_STATUS_1K_BA_ACK_FRAME_RSSI_LSB 8
  122. #define TX_FES_STATUS_1K_BA_ACK_FRAME_RSSI_MSB 15
  123. #define TX_FES_STATUS_1K_BA_ACK_FRAME_RSSI_MASK 0x000000000000ff00
  124. #define TX_FES_STATUS_1K_BA_SSN_OFFSET 0x0000000000000000
  125. #define TX_FES_STATUS_1K_BA_SSN_LSB 16
  126. #define TX_FES_STATUS_1K_BA_SSN_MSB 27
  127. #define TX_FES_STATUS_1K_BA_SSN_MASK 0x000000000fff0000
  128. #define TX_FES_STATUS_1K_BA_RESERVED_0B_OFFSET 0x0000000000000000
  129. #define TX_FES_STATUS_1K_BA_RESERVED_0B_LSB 28
  130. #define TX_FES_STATUS_1K_BA_RESERVED_0B_MSB 31
  131. #define TX_FES_STATUS_1K_BA_RESERVED_0B_MASK 0x00000000f0000000
  132. #define TX_FES_STATUS_1K_BA_SW_PEER_ID_OFFSET 0x0000000000000000
  133. #define TX_FES_STATUS_1K_BA_SW_PEER_ID_LSB 32
  134. #define TX_FES_STATUS_1K_BA_SW_PEER_ID_MSB 47
  135. #define TX_FES_STATUS_1K_BA_SW_PEER_ID_MASK 0x0000ffff00000000
  136. #define TX_FES_STATUS_1K_BA_RESERVED_1A_OFFSET 0x0000000000000000
  137. #define TX_FES_STATUS_1K_BA_RESERVED_1A_LSB 48
  138. #define TX_FES_STATUS_1K_BA_RESERVED_1A_MSB 63
  139. #define TX_FES_STATUS_1K_BA_RESERVED_1A_MASK 0xffff000000000000
  140. #define TX_FES_STATUS_1K_BA_BA_BITMAP_31_0_OFFSET 0x0000000000000008
  141. #define TX_FES_STATUS_1K_BA_BA_BITMAP_31_0_LSB 0
  142. #define TX_FES_STATUS_1K_BA_BA_BITMAP_31_0_MSB 31
  143. #define TX_FES_STATUS_1K_BA_BA_BITMAP_31_0_MASK 0x00000000ffffffff
  144. #define TX_FES_STATUS_1K_BA_BA_BITMAP_63_32_OFFSET 0x0000000000000008
  145. #define TX_FES_STATUS_1K_BA_BA_BITMAP_63_32_LSB 32
  146. #define TX_FES_STATUS_1K_BA_BA_BITMAP_63_32_MSB 63
  147. #define TX_FES_STATUS_1K_BA_BA_BITMAP_63_32_MASK 0xffffffff00000000
  148. #define TX_FES_STATUS_1K_BA_BA_BITMAP_95_64_OFFSET 0x0000000000000010
  149. #define TX_FES_STATUS_1K_BA_BA_BITMAP_95_64_LSB 0
  150. #define TX_FES_STATUS_1K_BA_BA_BITMAP_95_64_MSB 31
  151. #define TX_FES_STATUS_1K_BA_BA_BITMAP_95_64_MASK 0x00000000ffffffff
  152. #define TX_FES_STATUS_1K_BA_BA_BITMAP_127_96_OFFSET 0x0000000000000010
  153. #define TX_FES_STATUS_1K_BA_BA_BITMAP_127_96_LSB 32
  154. #define TX_FES_STATUS_1K_BA_BA_BITMAP_127_96_MSB 63
  155. #define TX_FES_STATUS_1K_BA_BA_BITMAP_127_96_MASK 0xffffffff00000000
  156. #define TX_FES_STATUS_1K_BA_BA_BITMAP_159_128_OFFSET 0x0000000000000018
  157. #define TX_FES_STATUS_1K_BA_BA_BITMAP_159_128_LSB 0
  158. #define TX_FES_STATUS_1K_BA_BA_BITMAP_159_128_MSB 31
  159. #define TX_FES_STATUS_1K_BA_BA_BITMAP_159_128_MASK 0x00000000ffffffff
  160. #define TX_FES_STATUS_1K_BA_BA_BITMAP_191_160_OFFSET 0x0000000000000018
  161. #define TX_FES_STATUS_1K_BA_BA_BITMAP_191_160_LSB 32
  162. #define TX_FES_STATUS_1K_BA_BA_BITMAP_191_160_MSB 63
  163. #define TX_FES_STATUS_1K_BA_BA_BITMAP_191_160_MASK 0xffffffff00000000
  164. #define TX_FES_STATUS_1K_BA_BA_BITMAP_223_192_OFFSET 0x0000000000000020
  165. #define TX_FES_STATUS_1K_BA_BA_BITMAP_223_192_LSB 0
  166. #define TX_FES_STATUS_1K_BA_BA_BITMAP_223_192_MSB 31
  167. #define TX_FES_STATUS_1K_BA_BA_BITMAP_223_192_MASK 0x00000000ffffffff
  168. #define TX_FES_STATUS_1K_BA_BA_BITMAP_255_224_OFFSET 0x0000000000000020
  169. #define TX_FES_STATUS_1K_BA_BA_BITMAP_255_224_LSB 32
  170. #define TX_FES_STATUS_1K_BA_BA_BITMAP_255_224_MSB 63
  171. #define TX_FES_STATUS_1K_BA_BA_BITMAP_255_224_MASK 0xffffffff00000000
  172. #define TX_FES_STATUS_1K_BA_BA_BITMAP_287_256_OFFSET 0x0000000000000028
  173. #define TX_FES_STATUS_1K_BA_BA_BITMAP_287_256_LSB 0
  174. #define TX_FES_STATUS_1K_BA_BA_BITMAP_287_256_MSB 31
  175. #define TX_FES_STATUS_1K_BA_BA_BITMAP_287_256_MASK 0x00000000ffffffff
  176. #define TX_FES_STATUS_1K_BA_BA_BITMAP_319_288_OFFSET 0x0000000000000028
  177. #define TX_FES_STATUS_1K_BA_BA_BITMAP_319_288_LSB 32
  178. #define TX_FES_STATUS_1K_BA_BA_BITMAP_319_288_MSB 63
  179. #define TX_FES_STATUS_1K_BA_BA_BITMAP_319_288_MASK 0xffffffff00000000
  180. #define TX_FES_STATUS_1K_BA_BA_BITMAP_351_320_OFFSET 0x0000000000000030
  181. #define TX_FES_STATUS_1K_BA_BA_BITMAP_351_320_LSB 0
  182. #define TX_FES_STATUS_1K_BA_BA_BITMAP_351_320_MSB 31
  183. #define TX_FES_STATUS_1K_BA_BA_BITMAP_351_320_MASK 0x00000000ffffffff
  184. #define TX_FES_STATUS_1K_BA_BA_BITMAP_383_352_OFFSET 0x0000000000000030
  185. #define TX_FES_STATUS_1K_BA_BA_BITMAP_383_352_LSB 32
  186. #define TX_FES_STATUS_1K_BA_BA_BITMAP_383_352_MSB 63
  187. #define TX_FES_STATUS_1K_BA_BA_BITMAP_383_352_MASK 0xffffffff00000000
  188. #define TX_FES_STATUS_1K_BA_BA_BITMAP_415_384_OFFSET 0x0000000000000038
  189. #define TX_FES_STATUS_1K_BA_BA_BITMAP_415_384_LSB 0
  190. #define TX_FES_STATUS_1K_BA_BA_BITMAP_415_384_MSB 31
  191. #define TX_FES_STATUS_1K_BA_BA_BITMAP_415_384_MASK 0x00000000ffffffff
  192. #define TX_FES_STATUS_1K_BA_BA_BITMAP_447_416_OFFSET 0x0000000000000038
  193. #define TX_FES_STATUS_1K_BA_BA_BITMAP_447_416_LSB 32
  194. #define TX_FES_STATUS_1K_BA_BA_BITMAP_447_416_MSB 63
  195. #define TX_FES_STATUS_1K_BA_BA_BITMAP_447_416_MASK 0xffffffff00000000
  196. #define TX_FES_STATUS_1K_BA_BA_BITMAP_479_448_OFFSET 0x0000000000000040
  197. #define TX_FES_STATUS_1K_BA_BA_BITMAP_479_448_LSB 0
  198. #define TX_FES_STATUS_1K_BA_BA_BITMAP_479_448_MSB 31
  199. #define TX_FES_STATUS_1K_BA_BA_BITMAP_479_448_MASK 0x00000000ffffffff
  200. #define TX_FES_STATUS_1K_BA_BA_BITMAP_511_480_OFFSET 0x0000000000000040
  201. #define TX_FES_STATUS_1K_BA_BA_BITMAP_511_480_LSB 32
  202. #define TX_FES_STATUS_1K_BA_BA_BITMAP_511_480_MSB 63
  203. #define TX_FES_STATUS_1K_BA_BA_BITMAP_511_480_MASK 0xffffffff00000000
  204. #define TX_FES_STATUS_1K_BA_BA_BITMAP_543_512_OFFSET 0x0000000000000048
  205. #define TX_FES_STATUS_1K_BA_BA_BITMAP_543_512_LSB 0
  206. #define TX_FES_STATUS_1K_BA_BA_BITMAP_543_512_MSB 31
  207. #define TX_FES_STATUS_1K_BA_BA_BITMAP_543_512_MASK 0x00000000ffffffff
  208. #define TX_FES_STATUS_1K_BA_BA_BITMAP_575_544_OFFSET 0x0000000000000048
  209. #define TX_FES_STATUS_1K_BA_BA_BITMAP_575_544_LSB 32
  210. #define TX_FES_STATUS_1K_BA_BA_BITMAP_575_544_MSB 63
  211. #define TX_FES_STATUS_1K_BA_BA_BITMAP_575_544_MASK 0xffffffff00000000
  212. #define TX_FES_STATUS_1K_BA_BA_BITMAP_607_576_OFFSET 0x0000000000000050
  213. #define TX_FES_STATUS_1K_BA_BA_BITMAP_607_576_LSB 0
  214. #define TX_FES_STATUS_1K_BA_BA_BITMAP_607_576_MSB 31
  215. #define TX_FES_STATUS_1K_BA_BA_BITMAP_607_576_MASK 0x00000000ffffffff
  216. #define TX_FES_STATUS_1K_BA_BA_BITMAP_639_608_OFFSET 0x0000000000000050
  217. #define TX_FES_STATUS_1K_BA_BA_BITMAP_639_608_LSB 32
  218. #define TX_FES_STATUS_1K_BA_BA_BITMAP_639_608_MSB 63
  219. #define TX_FES_STATUS_1K_BA_BA_BITMAP_639_608_MASK 0xffffffff00000000
  220. #define TX_FES_STATUS_1K_BA_BA_BITMAP_671_640_OFFSET 0x0000000000000058
  221. #define TX_FES_STATUS_1K_BA_BA_BITMAP_671_640_LSB 0
  222. #define TX_FES_STATUS_1K_BA_BA_BITMAP_671_640_MSB 31
  223. #define TX_FES_STATUS_1K_BA_BA_BITMAP_671_640_MASK 0x00000000ffffffff
  224. #define TX_FES_STATUS_1K_BA_BA_BITMAP_703_672_OFFSET 0x0000000000000058
  225. #define TX_FES_STATUS_1K_BA_BA_BITMAP_703_672_LSB 32
  226. #define TX_FES_STATUS_1K_BA_BA_BITMAP_703_672_MSB 63
  227. #define TX_FES_STATUS_1K_BA_BA_BITMAP_703_672_MASK 0xffffffff00000000
  228. #define TX_FES_STATUS_1K_BA_BA_BITMAP_735_704_OFFSET 0x0000000000000060
  229. #define TX_FES_STATUS_1K_BA_BA_BITMAP_735_704_LSB 0
  230. #define TX_FES_STATUS_1K_BA_BA_BITMAP_735_704_MSB 31
  231. #define TX_FES_STATUS_1K_BA_BA_BITMAP_735_704_MASK 0x00000000ffffffff
  232. #define TX_FES_STATUS_1K_BA_BA_BITMAP_767_736_OFFSET 0x0000000000000060
  233. #define TX_FES_STATUS_1K_BA_BA_BITMAP_767_736_LSB 32
  234. #define TX_FES_STATUS_1K_BA_BA_BITMAP_767_736_MSB 63
  235. #define TX_FES_STATUS_1K_BA_BA_BITMAP_767_736_MASK 0xffffffff00000000
  236. #define TX_FES_STATUS_1K_BA_BA_BITMAP_799_768_OFFSET 0x0000000000000068
  237. #define TX_FES_STATUS_1K_BA_BA_BITMAP_799_768_LSB 0
  238. #define TX_FES_STATUS_1K_BA_BA_BITMAP_799_768_MSB 31
  239. #define TX_FES_STATUS_1K_BA_BA_BITMAP_799_768_MASK 0x00000000ffffffff
  240. #define TX_FES_STATUS_1K_BA_BA_BITMAP_831_800_OFFSET 0x0000000000000068
  241. #define TX_FES_STATUS_1K_BA_BA_BITMAP_831_800_LSB 32
  242. #define TX_FES_STATUS_1K_BA_BA_BITMAP_831_800_MSB 63
  243. #define TX_FES_STATUS_1K_BA_BA_BITMAP_831_800_MASK 0xffffffff00000000
  244. #define TX_FES_STATUS_1K_BA_BA_BITMAP_863_832_OFFSET 0x0000000000000070
  245. #define TX_FES_STATUS_1K_BA_BA_BITMAP_863_832_LSB 0
  246. #define TX_FES_STATUS_1K_BA_BA_BITMAP_863_832_MSB 31
  247. #define TX_FES_STATUS_1K_BA_BA_BITMAP_863_832_MASK 0x00000000ffffffff
  248. #define TX_FES_STATUS_1K_BA_BA_BITMAP_895_864_OFFSET 0x0000000000000070
  249. #define TX_FES_STATUS_1K_BA_BA_BITMAP_895_864_LSB 32
  250. #define TX_FES_STATUS_1K_BA_BA_BITMAP_895_864_MSB 63
  251. #define TX_FES_STATUS_1K_BA_BA_BITMAP_895_864_MASK 0xffffffff00000000
  252. #define TX_FES_STATUS_1K_BA_BA_BITMAP_927_896_OFFSET 0x0000000000000078
  253. #define TX_FES_STATUS_1K_BA_BA_BITMAP_927_896_LSB 0
  254. #define TX_FES_STATUS_1K_BA_BA_BITMAP_927_896_MSB 31
  255. #define TX_FES_STATUS_1K_BA_BA_BITMAP_927_896_MASK 0x00000000ffffffff
  256. #define TX_FES_STATUS_1K_BA_BA_BITMAP_959_928_OFFSET 0x0000000000000078
  257. #define TX_FES_STATUS_1K_BA_BA_BITMAP_959_928_LSB 32
  258. #define TX_FES_STATUS_1K_BA_BA_BITMAP_959_928_MSB 63
  259. #define TX_FES_STATUS_1K_BA_BA_BITMAP_959_928_MASK 0xffffffff00000000
  260. #define TX_FES_STATUS_1K_BA_BA_BITMAP_991_960_OFFSET 0x0000000000000080
  261. #define TX_FES_STATUS_1K_BA_BA_BITMAP_991_960_LSB 0
  262. #define TX_FES_STATUS_1K_BA_BA_BITMAP_991_960_MSB 31
  263. #define TX_FES_STATUS_1K_BA_BA_BITMAP_991_960_MASK 0x00000000ffffffff
  264. #define TX_FES_STATUS_1K_BA_BA_BITMAP_1023_992_OFFSET 0x0000000000000080
  265. #define TX_FES_STATUS_1K_BA_BA_BITMAP_1023_992_LSB 32
  266. #define TX_FES_STATUS_1K_BA_BA_BITMAP_1023_992_MSB 63
  267. #define TX_FES_STATUS_1K_BA_BA_BITMAP_1023_992_MASK 0xffffffff00000000
  268. #endif