123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487 |
- /*
- * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
- * SPDX-License-Identifier: ISC
- */
-
-
-
-
-
-
-
-
-
- #ifndef _RX_FRAME_1K_BITMAP_ACK_H_
- #define _RX_FRAME_1K_BITMAP_ACK_H_
- #if !defined(__ASSEMBLER__)
- #endif
- #define NUM_OF_DWORDS_RX_FRAME_1K_BITMAP_ACK 38
- #define NUM_OF_QWORDS_RX_FRAME_1K_BITMAP_ACK 19
- struct rx_frame_1k_bitmap_ack {
- #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
- uint32_t reserved_0a : 5,
- ba_bitmap_size : 2,
- reserved_0b : 3,
- ba_tid : 4,
- sta_full_aid : 13,
- reserved_0c : 5;
- uint32_t addr1_31_0 : 32;
- uint32_t addr1_47_32 : 16,
- addr2_15_0 : 16;
- uint32_t addr2_47_16 : 32;
- uint32_t ba_ts_ctrl : 16,
- ba_ts_seq : 16;
- uint32_t ba_ts_bitmap_31_0 : 32;
- uint32_t ba_ts_bitmap_63_32 : 32;
- uint32_t ba_ts_bitmap_95_64 : 32;
- uint32_t ba_ts_bitmap_127_96 : 32;
- uint32_t ba_ts_bitmap_159_128 : 32;
- uint32_t ba_ts_bitmap_191_160 : 32;
- uint32_t ba_ts_bitmap_223_192 : 32;
- uint32_t ba_ts_bitmap_255_224 : 32;
- uint32_t ba_ts_bitmap_287_256 : 32;
- uint32_t ba_ts_bitmap_319_288 : 32;
- uint32_t ba_ts_bitmap_351_320 : 32;
- uint32_t ba_ts_bitmap_383_352 : 32;
- uint32_t ba_ts_bitmap_415_384 : 32;
- uint32_t ba_ts_bitmap_447_416 : 32;
- uint32_t ba_ts_bitmap_479_448 : 32;
- uint32_t ba_ts_bitmap_511_480 : 32;
- uint32_t ba_ts_bitmap_543_512 : 32;
- uint32_t ba_ts_bitmap_575_544 : 32;
- uint32_t ba_ts_bitmap_607_576 : 32;
- uint32_t ba_ts_bitmap_639_608 : 32;
- uint32_t ba_ts_bitmap_671_640 : 32;
- uint32_t ba_ts_bitmap_703_672 : 32;
- uint32_t ba_ts_bitmap_735_704 : 32;
- uint32_t ba_ts_bitmap_767_736 : 32;
- uint32_t ba_ts_bitmap_799_768 : 32;
- uint32_t ba_ts_bitmap_831_800 : 32;
- uint32_t ba_ts_bitmap_863_832 : 32;
- uint32_t ba_ts_bitmap_895_864 : 32;
- uint32_t ba_ts_bitmap_927_896 : 32;
- uint32_t ba_ts_bitmap_959_928 : 32;
- uint32_t ba_ts_bitmap_991_960 : 32;
- uint32_t ba_ts_bitmap_1023_992 : 32;
- uint32_t tlv64_padding : 32;
- #else
- uint32_t reserved_0c : 5,
- sta_full_aid : 13,
- ba_tid : 4,
- reserved_0b : 3,
- ba_bitmap_size : 2,
- reserved_0a : 5;
- uint32_t addr1_31_0 : 32;
- uint32_t addr2_15_0 : 16,
- addr1_47_32 : 16;
- uint32_t addr2_47_16 : 32;
- uint32_t ba_ts_seq : 16,
- ba_ts_ctrl : 16;
- uint32_t ba_ts_bitmap_31_0 : 32;
- uint32_t ba_ts_bitmap_63_32 : 32;
- uint32_t ba_ts_bitmap_95_64 : 32;
- uint32_t ba_ts_bitmap_127_96 : 32;
- uint32_t ba_ts_bitmap_159_128 : 32;
- uint32_t ba_ts_bitmap_191_160 : 32;
- uint32_t ba_ts_bitmap_223_192 : 32;
- uint32_t ba_ts_bitmap_255_224 : 32;
- uint32_t ba_ts_bitmap_287_256 : 32;
- uint32_t ba_ts_bitmap_319_288 : 32;
- uint32_t ba_ts_bitmap_351_320 : 32;
- uint32_t ba_ts_bitmap_383_352 : 32;
- uint32_t ba_ts_bitmap_415_384 : 32;
- uint32_t ba_ts_bitmap_447_416 : 32;
- uint32_t ba_ts_bitmap_479_448 : 32;
- uint32_t ba_ts_bitmap_511_480 : 32;
- uint32_t ba_ts_bitmap_543_512 : 32;
- uint32_t ba_ts_bitmap_575_544 : 32;
- uint32_t ba_ts_bitmap_607_576 : 32;
- uint32_t ba_ts_bitmap_639_608 : 32;
- uint32_t ba_ts_bitmap_671_640 : 32;
- uint32_t ba_ts_bitmap_703_672 : 32;
- uint32_t ba_ts_bitmap_735_704 : 32;
- uint32_t ba_ts_bitmap_767_736 : 32;
- uint32_t ba_ts_bitmap_799_768 : 32;
- uint32_t ba_ts_bitmap_831_800 : 32;
- uint32_t ba_ts_bitmap_863_832 : 32;
- uint32_t ba_ts_bitmap_895_864 : 32;
- uint32_t ba_ts_bitmap_927_896 : 32;
- uint32_t ba_ts_bitmap_959_928 : 32;
- uint32_t ba_ts_bitmap_991_960 : 32;
- uint32_t ba_ts_bitmap_1023_992 : 32;
- uint32_t tlv64_padding : 32;
- #endif
- };
-
- #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0A_OFFSET 0x0000000000000000
- #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0A_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0A_MSB 4
- #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0A_MASK 0x000000000000001f
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_BITMAP_SIZE_OFFSET 0x0000000000000000
- #define RX_FRAME_1K_BITMAP_ACK_BA_BITMAP_SIZE_LSB 5
- #define RX_FRAME_1K_BITMAP_ACK_BA_BITMAP_SIZE_MSB 6
- #define RX_FRAME_1K_BITMAP_ACK_BA_BITMAP_SIZE_MASK 0x0000000000000060
-
- #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0B_OFFSET 0x0000000000000000
- #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0B_LSB 7
- #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0B_MSB 9
- #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0B_MASK 0x0000000000000380
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TID_OFFSET 0x0000000000000000
- #define RX_FRAME_1K_BITMAP_ACK_BA_TID_LSB 10
- #define RX_FRAME_1K_BITMAP_ACK_BA_TID_MSB 13
- #define RX_FRAME_1K_BITMAP_ACK_BA_TID_MASK 0x0000000000003c00
-
- #define RX_FRAME_1K_BITMAP_ACK_STA_FULL_AID_OFFSET 0x0000000000000000
- #define RX_FRAME_1K_BITMAP_ACK_STA_FULL_AID_LSB 14
- #define RX_FRAME_1K_BITMAP_ACK_STA_FULL_AID_MSB 26
- #define RX_FRAME_1K_BITMAP_ACK_STA_FULL_AID_MASK 0x0000000007ffc000
-
- #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0C_OFFSET 0x0000000000000000
- #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0C_LSB 27
- #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0C_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_RESERVED_0C_MASK 0x00000000f8000000
-
- #define RX_FRAME_1K_BITMAP_ACK_ADDR1_31_0_OFFSET 0x0000000000000000
- #define RX_FRAME_1K_BITMAP_ACK_ADDR1_31_0_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_ADDR1_31_0_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_ADDR1_31_0_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_ADDR1_47_32_OFFSET 0x0000000000000008
- #define RX_FRAME_1K_BITMAP_ACK_ADDR1_47_32_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_ADDR1_47_32_MSB 15
- #define RX_FRAME_1K_BITMAP_ACK_ADDR1_47_32_MASK 0x000000000000ffff
-
- #define RX_FRAME_1K_BITMAP_ACK_ADDR2_15_0_OFFSET 0x0000000000000008
- #define RX_FRAME_1K_BITMAP_ACK_ADDR2_15_0_LSB 16
- #define RX_FRAME_1K_BITMAP_ACK_ADDR2_15_0_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_ADDR2_15_0_MASK 0x00000000ffff0000
-
- #define RX_FRAME_1K_BITMAP_ACK_ADDR2_47_16_OFFSET 0x0000000000000008
- #define RX_FRAME_1K_BITMAP_ACK_ADDR2_47_16_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_ADDR2_47_16_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_ADDR2_47_16_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_CTRL_OFFSET 0x0000000000000010
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_CTRL_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_CTRL_MSB 15
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_CTRL_MASK 0x000000000000ffff
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_SEQ_OFFSET 0x0000000000000010
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_SEQ_LSB 16
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_SEQ_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_SEQ_MASK 0x00000000ffff0000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_31_0_OFFSET 0x0000000000000010
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_31_0_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_31_0_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_31_0_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_63_32_OFFSET 0x0000000000000018
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_63_32_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_63_32_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_63_32_MASK 0x00000000ffffffff
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_95_64_OFFSET 0x0000000000000018
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_95_64_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_95_64_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_95_64_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_127_96_OFFSET 0x0000000000000020
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_127_96_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_127_96_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_127_96_MASK 0x00000000ffffffff
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_159_128_OFFSET 0x0000000000000020
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_159_128_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_159_128_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_159_128_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_191_160_OFFSET 0x0000000000000028
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_191_160_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_191_160_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_191_160_MASK 0x00000000ffffffff
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_223_192_OFFSET 0x0000000000000028
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_223_192_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_223_192_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_223_192_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_255_224_OFFSET 0x0000000000000030
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_255_224_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_255_224_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_255_224_MASK 0x00000000ffffffff
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_287_256_OFFSET 0x0000000000000030
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_287_256_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_287_256_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_287_256_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_319_288_OFFSET 0x0000000000000038
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_319_288_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_319_288_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_319_288_MASK 0x00000000ffffffff
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_351_320_OFFSET 0x0000000000000038
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_351_320_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_351_320_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_351_320_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_383_352_OFFSET 0x0000000000000040
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_383_352_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_383_352_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_383_352_MASK 0x00000000ffffffff
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_415_384_OFFSET 0x0000000000000040
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_415_384_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_415_384_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_415_384_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_447_416_OFFSET 0x0000000000000048
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_447_416_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_447_416_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_447_416_MASK 0x00000000ffffffff
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_479_448_OFFSET 0x0000000000000048
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_479_448_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_479_448_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_479_448_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_511_480_OFFSET 0x0000000000000050
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_511_480_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_511_480_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_511_480_MASK 0x00000000ffffffff
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_543_512_OFFSET 0x0000000000000050
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_543_512_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_543_512_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_543_512_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_575_544_OFFSET 0x0000000000000058
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_575_544_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_575_544_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_575_544_MASK 0x00000000ffffffff
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_607_576_OFFSET 0x0000000000000058
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_607_576_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_607_576_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_607_576_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_639_608_OFFSET 0x0000000000000060
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_639_608_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_639_608_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_639_608_MASK 0x00000000ffffffff
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_671_640_OFFSET 0x0000000000000060
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_671_640_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_671_640_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_671_640_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_703_672_OFFSET 0x0000000000000068
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_703_672_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_703_672_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_703_672_MASK 0x00000000ffffffff
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_735_704_OFFSET 0x0000000000000068
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_735_704_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_735_704_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_735_704_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_767_736_OFFSET 0x0000000000000070
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_767_736_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_767_736_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_767_736_MASK 0x00000000ffffffff
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_799_768_OFFSET 0x0000000000000070
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_799_768_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_799_768_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_799_768_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_831_800_OFFSET 0x0000000000000078
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_831_800_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_831_800_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_831_800_MASK 0x00000000ffffffff
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_863_832_OFFSET 0x0000000000000078
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_863_832_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_863_832_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_863_832_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_895_864_OFFSET 0x0000000000000080
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_895_864_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_895_864_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_895_864_MASK 0x00000000ffffffff
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_927_896_OFFSET 0x0000000000000080
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_927_896_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_927_896_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_927_896_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_959_928_OFFSET 0x0000000000000088
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_959_928_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_959_928_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_959_928_MASK 0x00000000ffffffff
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_991_960_OFFSET 0x0000000000000088
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_991_960_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_991_960_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_991_960_MASK 0xffffffff00000000
-
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_1023_992_OFFSET 0x0000000000000090
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_1023_992_LSB 0
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_1023_992_MSB 31
- #define RX_FRAME_1K_BITMAP_ACK_BA_TS_BITMAP_1023_992_MASK 0x00000000ffffffff
-
- #define RX_FRAME_1K_BITMAP_ACK_TLV64_PADDING_OFFSET 0x0000000000000090
- #define RX_FRAME_1K_BITMAP_ACK_TLV64_PADDING_LSB 32
- #define RX_FRAME_1K_BITMAP_ACK_TLV64_PADDING_MSB 63
- #define RX_FRAME_1K_BITMAP_ACK_TLV64_PADDING_MASK 0xffffffff00000000
- #endif
|