mactx_he_sig_b1_mu.h 2.4 KB

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  1. /*
  2. * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
  3. * SPDX-License-Identifier: ISC
  4. */
  5. #ifndef _MACTX_HE_SIG_B1_MU_H_
  6. #define _MACTX_HE_SIG_B1_MU_H_
  7. #if !defined(__ASSEMBLER__)
  8. #endif
  9. #include "he_sig_b1_mu_info.h"
  10. #define NUM_OF_DWORDS_MACTX_HE_SIG_B1_MU 2
  11. #define NUM_OF_QWORDS_MACTX_HE_SIG_B1_MU 1
  12. struct mactx_he_sig_b1_mu {
  13. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  14. struct he_sig_b1_mu_info mactx_he_sig_b1_mu_info_details;
  15. uint32_t tlv64_padding : 32;
  16. #else
  17. struct he_sig_b1_mu_info mactx_he_sig_b1_mu_info_details;
  18. uint32_t tlv64_padding : 32;
  19. #endif
  20. };
  21. #define MACTX_HE_SIG_B1_MU_MACTX_HE_SIG_B1_MU_INFO_DETAILS_RU_ALLOCATION_OFFSET 0x0000000000000000
  22. #define MACTX_HE_SIG_B1_MU_MACTX_HE_SIG_B1_MU_INFO_DETAILS_RU_ALLOCATION_LSB 0
  23. #define MACTX_HE_SIG_B1_MU_MACTX_HE_SIG_B1_MU_INFO_DETAILS_RU_ALLOCATION_MSB 7
  24. #define MACTX_HE_SIG_B1_MU_MACTX_HE_SIG_B1_MU_INFO_DETAILS_RU_ALLOCATION_MASK 0x00000000000000ff
  25. #define MACTX_HE_SIG_B1_MU_MACTX_HE_SIG_B1_MU_INFO_DETAILS_RESERVED_0_OFFSET 0x0000000000000000
  26. #define MACTX_HE_SIG_B1_MU_MACTX_HE_SIG_B1_MU_INFO_DETAILS_RESERVED_0_LSB 8
  27. #define MACTX_HE_SIG_B1_MU_MACTX_HE_SIG_B1_MU_INFO_DETAILS_RESERVED_0_MSB 30
  28. #define MACTX_HE_SIG_B1_MU_MACTX_HE_SIG_B1_MU_INFO_DETAILS_RESERVED_0_MASK 0x000000007fffff00
  29. #define MACTX_HE_SIG_B1_MU_MACTX_HE_SIG_B1_MU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x0000000000000000
  30. #define MACTX_HE_SIG_B1_MU_MACTX_HE_SIG_B1_MU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_LSB 31
  31. #define MACTX_HE_SIG_B1_MU_MACTX_HE_SIG_B1_MU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MSB 31
  32. #define MACTX_HE_SIG_B1_MU_MACTX_HE_SIG_B1_MU_INFO_DETAILS_RX_INTEGRITY_CHECK_PASSED_MASK 0x0000000080000000
  33. #define MACTX_HE_SIG_B1_MU_TLV64_PADDING_OFFSET 0x0000000000000000
  34. #define MACTX_HE_SIG_B1_MU_TLV64_PADDING_LSB 32
  35. #define MACTX_HE_SIG_B1_MU_TLV64_PADDING_MSB 63
  36. #define MACTX_HE_SIG_B1_MU_TLV64_PADDING_MASK 0xffffffff00000000
  37. #endif