eht_sig_usr_su_info.h 4.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115
  1. /*
  2. * Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
  3. * SPDX-License-Identifier: ISC
  4. */
  5. #ifndef _EHT_SIG_USR_SU_INFO_H_
  6. #define _EHT_SIG_USR_SU_INFO_H_
  7. #if !defined(__ASSEMBLER__)
  8. #endif
  9. #define NUM_OF_DWORDS_EHT_SIG_USR_SU_INFO 1
  10. struct eht_sig_usr_su_info {
  11. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  12. uint32_t sta_id : 11,
  13. sta_mcs : 4,
  14. validate_0a : 1,
  15. nss : 4,
  16. txbf : 1,
  17. sta_coding : 1,
  18. reserved_0b : 9,
  19. rx_integrity_check_passed : 1;
  20. #else
  21. uint32_t rx_integrity_check_passed : 1,
  22. reserved_0b : 9,
  23. sta_coding : 1,
  24. txbf : 1,
  25. nss : 4,
  26. validate_0a : 1,
  27. sta_mcs : 4,
  28. sta_id : 11;
  29. #endif
  30. };
  31. #define EHT_SIG_USR_SU_INFO_STA_ID_OFFSET 0x00000000
  32. #define EHT_SIG_USR_SU_INFO_STA_ID_LSB 0
  33. #define EHT_SIG_USR_SU_INFO_STA_ID_MSB 10
  34. #define EHT_SIG_USR_SU_INFO_STA_ID_MASK 0x000007ff
  35. #define EHT_SIG_USR_SU_INFO_STA_MCS_OFFSET 0x00000000
  36. #define EHT_SIG_USR_SU_INFO_STA_MCS_LSB 11
  37. #define EHT_SIG_USR_SU_INFO_STA_MCS_MSB 14
  38. #define EHT_SIG_USR_SU_INFO_STA_MCS_MASK 0x00007800
  39. #define EHT_SIG_USR_SU_INFO_VALIDATE_0A_OFFSET 0x00000000
  40. #define EHT_SIG_USR_SU_INFO_VALIDATE_0A_LSB 15
  41. #define EHT_SIG_USR_SU_INFO_VALIDATE_0A_MSB 15
  42. #define EHT_SIG_USR_SU_INFO_VALIDATE_0A_MASK 0x00008000
  43. #define EHT_SIG_USR_SU_INFO_NSS_OFFSET 0x00000000
  44. #define EHT_SIG_USR_SU_INFO_NSS_LSB 16
  45. #define EHT_SIG_USR_SU_INFO_NSS_MSB 19
  46. #define EHT_SIG_USR_SU_INFO_NSS_MASK 0x000f0000
  47. #define EHT_SIG_USR_SU_INFO_TXBF_OFFSET 0x00000000
  48. #define EHT_SIG_USR_SU_INFO_TXBF_LSB 20
  49. #define EHT_SIG_USR_SU_INFO_TXBF_MSB 20
  50. #define EHT_SIG_USR_SU_INFO_TXBF_MASK 0x00100000
  51. #define EHT_SIG_USR_SU_INFO_STA_CODING_OFFSET 0x00000000
  52. #define EHT_SIG_USR_SU_INFO_STA_CODING_LSB 21
  53. #define EHT_SIG_USR_SU_INFO_STA_CODING_MSB 21
  54. #define EHT_SIG_USR_SU_INFO_STA_CODING_MASK 0x00200000
  55. #define EHT_SIG_USR_SU_INFO_RESERVED_0B_OFFSET 0x00000000
  56. #define EHT_SIG_USR_SU_INFO_RESERVED_0B_LSB 22
  57. #define EHT_SIG_USR_SU_INFO_RESERVED_0B_MSB 30
  58. #define EHT_SIG_USR_SU_INFO_RESERVED_0B_MASK 0x7fc00000
  59. #define EHT_SIG_USR_SU_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x00000000
  60. #define EHT_SIG_USR_SU_INFO_RX_INTEGRITY_CHECK_PASSED_LSB 31
  61. #define EHT_SIG_USR_SU_INFO_RX_INTEGRITY_CHECK_PASSED_MSB 31
  62. #define EHT_SIG_USR_SU_INFO_RX_INTEGRITY_CHECK_PASSED_MASK 0x80000000
  63. #endif