wcss_seq_hwiobase.h 6.0 KB

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  1. /*
  2. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef __WCSS_SEQ_HWIOBASE_H__
  19. #define __WCSS_SEQ_HWIOBASE_H__
  20. #define WCSS_CFGBUS_BASE 0x00008000
  21. #define WCSS_CFGBUS_BASE_SIZE 0x00008000
  22. #define WCSS_CFGBUS_BASE_PHYS 0x00008000
  23. #define UMAC_NOC_BASE 0x00140000
  24. #define UMAC_NOC_BASE_SIZE 0x00004400
  25. #define UMAC_NOC_BASE_PHYS 0x00140000
  26. #define PHYA0_BASE 0x00300000
  27. #define PHYA0_BASE_SIZE 0x00300000
  28. #define PHYA0_BASE_PHYS 0x00300000
  29. #define PHYA1_BASE 0x00600000
  30. #define PHYA1_BASE_SIZE 0x00300000
  31. #define PHYA1_BASE_PHYS 0x00600000
  32. #define DMAC_BASE 0x00900000
  33. #define DMAC_BASE_SIZE 0x00080000
  34. #define DMAC_BASE_PHYS 0x00900000
  35. #define UMAC_BASE 0x00a00000
  36. #define UMAC_BASE_SIZE 0x0004d000
  37. #define UMAC_BASE_PHYS 0x00a00000
  38. #define PMAC0_BASE 0x00a80000
  39. #define PMAC0_BASE_SIZE 0x00040000
  40. #define PMAC0_BASE_PHYS 0x00a80000
  41. #define PMAC1_BASE 0x00ac0000
  42. #define PMAC1_BASE_SIZE 0x00040000
  43. #define PMAC1_BASE_PHYS 0x00ac0000
  44. #define CXC_BASE 0x00b40000
  45. #define CXC_BASE_SIZE 0x00010000
  46. #define CXC_BASE_PHYS 0x00b40000
  47. #define WFSS_PMM_BASE 0x00b50000
  48. #define WFSS_PMM_BASE_SIZE 0x00002401
  49. #define WFSS_PMM_BASE_PHYS 0x00b50000
  50. #define WFSS_CC_BASE 0x00b60000
  51. #define WFSS_CC_BASE_SIZE 0x00008000
  52. #define WFSS_CC_BASE_PHYS 0x00b60000
  53. #define WCMN_CORE_BASE 0x00b68000
  54. #define WCMN_CORE_BASE_SIZE 0x000008a9
  55. #define WCMN_CORE_BASE_PHYS 0x00b68000
  56. #define WIFI_CFGBUS_APB_TSLV_BASE 0x00b6b000
  57. #define WIFI_CFGBUS_APB_TSLV_BASE_SIZE 0x00001000
  58. #define WIFI_CFGBUS_APB_TSLV_BASE_PHYS 0x00b6b000
  59. #define WFSS_CFGBUS_BASE 0x00b6c000
  60. #define WFSS_CFGBUS_BASE_SIZE 0x000000a0
  61. #define WFSS_CFGBUS_BASE_PHYS 0x00b6c000
  62. #define WIFI_CFGBUS_AHB_TSLV_BASE 0x00b6d000
  63. #define WIFI_CFGBUS_AHB_TSLV_BASE_SIZE 0x00001000
  64. #define WIFI_CFGBUS_AHB_TSLV_BASE_PHYS 0x00b6d000
  65. #define UMAC_ACMT_BASE 0x00b6e000
  66. #define UMAC_ACMT_BASE_SIZE 0x00001000
  67. #define UMAC_ACMT_BASE_PHYS 0x00b6e000
  68. #define WCSS_CC_BASE 0x00b80000
  69. #define WCSS_CC_BASE_SIZE 0x00010000
  70. #define WCSS_CC_BASE_PHYS 0x00b80000
  71. #define PMM_TOP_BASE 0x00b90000
  72. #define PMM_TOP_BASE_SIZE 0x00010000
  73. #define PMM_TOP_BASE_PHYS 0x00b90000
  74. #define WCSS_TOP_CMN_BASE 0x00ba0000
  75. #define WCSS_TOP_CMN_BASE_SIZE 0x00004000
  76. #define WCSS_TOP_CMN_BASE_PHYS 0x00ba0000
  77. #define MSIP_BASE 0x00bb0000
  78. #define MSIP_BASE_SIZE 0x00010000
  79. #define MSIP_BASE_PHYS 0x00bb0000
  80. #define DBG_BASE 0x01000000
  81. #define DBG_BASE_SIZE 0x00100000
  82. #define DBG_BASE_PHYS 0x01000000
  83. #define Q6SS_WLAN_BASE 0x01100000
  84. #define Q6SS_WLAN_BASE_SIZE 0x00100000
  85. #define Q6SS_WLAN_BASE_PHYS 0x01100000
  86. #endif