tx_msdu_start.h 19 KB

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  1. /*
  2. * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef _TX_MSDU_START_H_
  17. #define _TX_MSDU_START_H_
  18. #if !defined(__ASSEMBLER__)
  19. #endif
  20. #define NUM_OF_DWORDS_TX_MSDU_START 8
  21. #define NUM_OF_QWORDS_TX_MSDU_START 4
  22. struct tx_msdu_start {
  23. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  24. uint32_t msdu_len : 14,
  25. first_msdu : 1,
  26. last_msdu : 1,
  27. encap_type : 2,
  28. epd_en : 1,
  29. da_sa_present : 2,
  30. ipv4_checksum_en : 1,
  31. udp_over_ipv4_checksum_en : 1,
  32. udp_over_ipv6_checksum_en : 1,
  33. tcp_over_ipv4_checksum_en : 1,
  34. tcp_over_ipv6_checksum_en : 1,
  35. dummy_msdu_delimitation : 1,
  36. reserved_0a : 5;
  37. uint32_t tso_enable : 1,
  38. reserved_1a : 6,
  39. tcp_flag : 9,
  40. tcp_flag_mask : 9,
  41. mesh_enable : 1,
  42. reserved_1b : 6;
  43. uint32_t l2_length : 16,
  44. ip_length : 16;
  45. uint32_t tcp_seq_number : 32;
  46. uint32_t ip_identification : 16,
  47. checksum_offset : 13,
  48. partial_checksum_en : 1,
  49. reserved_4 : 2;
  50. uint32_t payload_start_offset : 14,
  51. reserved_5a : 2,
  52. payload_end_offset : 14,
  53. reserved_5b : 2;
  54. uint32_t udp_length : 16,
  55. reserved_6 : 16;
  56. uint32_t tlv64_padding : 32;
  57. #else
  58. uint32_t reserved_0a : 5,
  59. dummy_msdu_delimitation : 1,
  60. tcp_over_ipv6_checksum_en : 1,
  61. tcp_over_ipv4_checksum_en : 1,
  62. udp_over_ipv6_checksum_en : 1,
  63. udp_over_ipv4_checksum_en : 1,
  64. ipv4_checksum_en : 1,
  65. da_sa_present : 2,
  66. epd_en : 1,
  67. encap_type : 2,
  68. last_msdu : 1,
  69. first_msdu : 1,
  70. msdu_len : 14;
  71. uint32_t reserved_1b : 6,
  72. mesh_enable : 1,
  73. tcp_flag_mask : 9,
  74. tcp_flag : 9,
  75. reserved_1a : 6,
  76. tso_enable : 1;
  77. uint32_t ip_length : 16,
  78. l2_length : 16;
  79. uint32_t tcp_seq_number : 32;
  80. uint32_t reserved_4 : 2,
  81. partial_checksum_en : 1,
  82. checksum_offset : 13,
  83. ip_identification : 16;
  84. uint32_t reserved_5b : 2,
  85. payload_end_offset : 14,
  86. reserved_5a : 2,
  87. payload_start_offset : 14;
  88. uint32_t reserved_6 : 16,
  89. udp_length : 16;
  90. uint32_t tlv64_padding : 32;
  91. #endif
  92. };
  93. #define TX_MSDU_START_MSDU_LEN_OFFSET 0x0000000000000000
  94. #define TX_MSDU_START_MSDU_LEN_LSB 0
  95. #define TX_MSDU_START_MSDU_LEN_MSB 13
  96. #define TX_MSDU_START_MSDU_LEN_MASK 0x0000000000003fff
  97. #define TX_MSDU_START_FIRST_MSDU_OFFSET 0x0000000000000000
  98. #define TX_MSDU_START_FIRST_MSDU_LSB 14
  99. #define TX_MSDU_START_FIRST_MSDU_MSB 14
  100. #define TX_MSDU_START_FIRST_MSDU_MASK 0x0000000000004000
  101. #define TX_MSDU_START_LAST_MSDU_OFFSET 0x0000000000000000
  102. #define TX_MSDU_START_LAST_MSDU_LSB 15
  103. #define TX_MSDU_START_LAST_MSDU_MSB 15
  104. #define TX_MSDU_START_LAST_MSDU_MASK 0x0000000000008000
  105. #define TX_MSDU_START_ENCAP_TYPE_OFFSET 0x0000000000000000
  106. #define TX_MSDU_START_ENCAP_TYPE_LSB 16
  107. #define TX_MSDU_START_ENCAP_TYPE_MSB 17
  108. #define TX_MSDU_START_ENCAP_TYPE_MASK 0x0000000000030000
  109. #define TX_MSDU_START_EPD_EN_OFFSET 0x0000000000000000
  110. #define TX_MSDU_START_EPD_EN_LSB 18
  111. #define TX_MSDU_START_EPD_EN_MSB 18
  112. #define TX_MSDU_START_EPD_EN_MASK 0x0000000000040000
  113. #define TX_MSDU_START_DA_SA_PRESENT_OFFSET 0x0000000000000000
  114. #define TX_MSDU_START_DA_SA_PRESENT_LSB 19
  115. #define TX_MSDU_START_DA_SA_PRESENT_MSB 20
  116. #define TX_MSDU_START_DA_SA_PRESENT_MASK 0x0000000000180000
  117. #define TX_MSDU_START_IPV4_CHECKSUM_EN_OFFSET 0x0000000000000000
  118. #define TX_MSDU_START_IPV4_CHECKSUM_EN_LSB 21
  119. #define TX_MSDU_START_IPV4_CHECKSUM_EN_MSB 21
  120. #define TX_MSDU_START_IPV4_CHECKSUM_EN_MASK 0x0000000000200000
  121. #define TX_MSDU_START_UDP_OVER_IPV4_CHECKSUM_EN_OFFSET 0x0000000000000000
  122. #define TX_MSDU_START_UDP_OVER_IPV4_CHECKSUM_EN_LSB 22
  123. #define TX_MSDU_START_UDP_OVER_IPV4_CHECKSUM_EN_MSB 22
  124. #define TX_MSDU_START_UDP_OVER_IPV4_CHECKSUM_EN_MASK 0x0000000000400000
  125. #define TX_MSDU_START_UDP_OVER_IPV6_CHECKSUM_EN_OFFSET 0x0000000000000000
  126. #define TX_MSDU_START_UDP_OVER_IPV6_CHECKSUM_EN_LSB 23
  127. #define TX_MSDU_START_UDP_OVER_IPV6_CHECKSUM_EN_MSB 23
  128. #define TX_MSDU_START_UDP_OVER_IPV6_CHECKSUM_EN_MASK 0x0000000000800000
  129. #define TX_MSDU_START_TCP_OVER_IPV4_CHECKSUM_EN_OFFSET 0x0000000000000000
  130. #define TX_MSDU_START_TCP_OVER_IPV4_CHECKSUM_EN_LSB 24
  131. #define TX_MSDU_START_TCP_OVER_IPV4_CHECKSUM_EN_MSB 24
  132. #define TX_MSDU_START_TCP_OVER_IPV4_CHECKSUM_EN_MASK 0x0000000001000000
  133. #define TX_MSDU_START_TCP_OVER_IPV6_CHECKSUM_EN_OFFSET 0x0000000000000000
  134. #define TX_MSDU_START_TCP_OVER_IPV6_CHECKSUM_EN_LSB 25
  135. #define TX_MSDU_START_TCP_OVER_IPV6_CHECKSUM_EN_MSB 25
  136. #define TX_MSDU_START_TCP_OVER_IPV6_CHECKSUM_EN_MASK 0x0000000002000000
  137. #define TX_MSDU_START_DUMMY_MSDU_DELIMITATION_OFFSET 0x0000000000000000
  138. #define TX_MSDU_START_DUMMY_MSDU_DELIMITATION_LSB 26
  139. #define TX_MSDU_START_DUMMY_MSDU_DELIMITATION_MSB 26
  140. #define TX_MSDU_START_DUMMY_MSDU_DELIMITATION_MASK 0x0000000004000000
  141. #define TX_MSDU_START_RESERVED_0A_OFFSET 0x0000000000000000
  142. #define TX_MSDU_START_RESERVED_0A_LSB 27
  143. #define TX_MSDU_START_RESERVED_0A_MSB 31
  144. #define TX_MSDU_START_RESERVED_0A_MASK 0x00000000f8000000
  145. #define TX_MSDU_START_TSO_ENABLE_OFFSET 0x0000000000000000
  146. #define TX_MSDU_START_TSO_ENABLE_LSB 32
  147. #define TX_MSDU_START_TSO_ENABLE_MSB 32
  148. #define TX_MSDU_START_TSO_ENABLE_MASK 0x0000000100000000
  149. #define TX_MSDU_START_RESERVED_1A_OFFSET 0x0000000000000000
  150. #define TX_MSDU_START_RESERVED_1A_LSB 33
  151. #define TX_MSDU_START_RESERVED_1A_MSB 38
  152. #define TX_MSDU_START_RESERVED_1A_MASK 0x0000007e00000000
  153. #define TX_MSDU_START_TCP_FLAG_OFFSET 0x0000000000000000
  154. #define TX_MSDU_START_TCP_FLAG_LSB 39
  155. #define TX_MSDU_START_TCP_FLAG_MSB 47
  156. #define TX_MSDU_START_TCP_FLAG_MASK 0x0000ff8000000000
  157. #define TX_MSDU_START_TCP_FLAG_MASK_OFFSET 0x0000000000000000
  158. #define TX_MSDU_START_TCP_FLAG_MASK_LSB 48
  159. #define TX_MSDU_START_TCP_FLAG_MASK_MSB 56
  160. #define TX_MSDU_START_TCP_FLAG_MASK_MASK 0x01ff000000000000
  161. #define TX_MSDU_START_MESH_ENABLE_OFFSET 0x0000000000000000
  162. #define TX_MSDU_START_MESH_ENABLE_LSB 57
  163. #define TX_MSDU_START_MESH_ENABLE_MSB 57
  164. #define TX_MSDU_START_MESH_ENABLE_MASK 0x0200000000000000
  165. #define TX_MSDU_START_RESERVED_1B_OFFSET 0x0000000000000000
  166. #define TX_MSDU_START_RESERVED_1B_LSB 58
  167. #define TX_MSDU_START_RESERVED_1B_MSB 63
  168. #define TX_MSDU_START_RESERVED_1B_MASK 0xfc00000000000000
  169. #define TX_MSDU_START_L2_LENGTH_OFFSET 0x0000000000000008
  170. #define TX_MSDU_START_L2_LENGTH_LSB 0
  171. #define TX_MSDU_START_L2_LENGTH_MSB 15
  172. #define TX_MSDU_START_L2_LENGTH_MASK 0x000000000000ffff
  173. #define TX_MSDU_START_IP_LENGTH_OFFSET 0x0000000000000008
  174. #define TX_MSDU_START_IP_LENGTH_LSB 16
  175. #define TX_MSDU_START_IP_LENGTH_MSB 31
  176. #define TX_MSDU_START_IP_LENGTH_MASK 0x00000000ffff0000
  177. #define TX_MSDU_START_TCP_SEQ_NUMBER_OFFSET 0x0000000000000008
  178. #define TX_MSDU_START_TCP_SEQ_NUMBER_LSB 32
  179. #define TX_MSDU_START_TCP_SEQ_NUMBER_MSB 63
  180. #define TX_MSDU_START_TCP_SEQ_NUMBER_MASK 0xffffffff00000000
  181. #define TX_MSDU_START_IP_IDENTIFICATION_OFFSET 0x0000000000000010
  182. #define TX_MSDU_START_IP_IDENTIFICATION_LSB 0
  183. #define TX_MSDU_START_IP_IDENTIFICATION_MSB 15
  184. #define TX_MSDU_START_IP_IDENTIFICATION_MASK 0x000000000000ffff
  185. #define TX_MSDU_START_CHECKSUM_OFFSET_OFFSET 0x0000000000000010
  186. #define TX_MSDU_START_CHECKSUM_OFFSET_LSB 16
  187. #define TX_MSDU_START_CHECKSUM_OFFSET_MSB 28
  188. #define TX_MSDU_START_CHECKSUM_OFFSET_MASK 0x000000001fff0000
  189. #define TX_MSDU_START_PARTIAL_CHECKSUM_EN_OFFSET 0x0000000000000010
  190. #define TX_MSDU_START_PARTIAL_CHECKSUM_EN_LSB 29
  191. #define TX_MSDU_START_PARTIAL_CHECKSUM_EN_MSB 29
  192. #define TX_MSDU_START_PARTIAL_CHECKSUM_EN_MASK 0x0000000020000000
  193. #define TX_MSDU_START_RESERVED_4_OFFSET 0x0000000000000010
  194. #define TX_MSDU_START_RESERVED_4_LSB 30
  195. #define TX_MSDU_START_RESERVED_4_MSB 31
  196. #define TX_MSDU_START_RESERVED_4_MASK 0x00000000c0000000
  197. #define TX_MSDU_START_PAYLOAD_START_OFFSET_OFFSET 0x0000000000000010
  198. #define TX_MSDU_START_PAYLOAD_START_OFFSET_LSB 32
  199. #define TX_MSDU_START_PAYLOAD_START_OFFSET_MSB 45
  200. #define TX_MSDU_START_PAYLOAD_START_OFFSET_MASK 0x00003fff00000000
  201. #define TX_MSDU_START_RESERVED_5A_OFFSET 0x0000000000000010
  202. #define TX_MSDU_START_RESERVED_5A_LSB 46
  203. #define TX_MSDU_START_RESERVED_5A_MSB 47
  204. #define TX_MSDU_START_RESERVED_5A_MASK 0x0000c00000000000
  205. #define TX_MSDU_START_PAYLOAD_END_OFFSET_OFFSET 0x0000000000000010
  206. #define TX_MSDU_START_PAYLOAD_END_OFFSET_LSB 48
  207. #define TX_MSDU_START_PAYLOAD_END_OFFSET_MSB 61
  208. #define TX_MSDU_START_PAYLOAD_END_OFFSET_MASK 0x3fff000000000000
  209. #define TX_MSDU_START_RESERVED_5B_OFFSET 0x0000000000000010
  210. #define TX_MSDU_START_RESERVED_5B_LSB 62
  211. #define TX_MSDU_START_RESERVED_5B_MSB 63
  212. #define TX_MSDU_START_RESERVED_5B_MASK 0xc000000000000000
  213. #define TX_MSDU_START_UDP_LENGTH_OFFSET 0x0000000000000018
  214. #define TX_MSDU_START_UDP_LENGTH_LSB 0
  215. #define TX_MSDU_START_UDP_LENGTH_MSB 15
  216. #define TX_MSDU_START_UDP_LENGTH_MASK 0x000000000000ffff
  217. #define TX_MSDU_START_RESERVED_6_OFFSET 0x0000000000000018
  218. #define TX_MSDU_START_RESERVED_6_LSB 16
  219. #define TX_MSDU_START_RESERVED_6_MSB 31
  220. #define TX_MSDU_START_RESERVED_6_MASK 0x00000000ffff0000
  221. #define TX_MSDU_START_TLV64_PADDING_OFFSET 0x0000000000000018
  222. #define TX_MSDU_START_TLV64_PADDING_LSB 32
  223. #define TX_MSDU_START_TLV64_PADDING_MSB 63
  224. #define TX_MSDU_START_TLV64_PADDING_MASK 0xffffffff00000000
  225. #endif