tx_msdu_extension.h 27 KB

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  1. /*
  2. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _TX_MSDU_EXTENSION_H_
  19. #define _TX_MSDU_EXTENSION_H_
  20. #if !defined(__ASSEMBLER__)
  21. #endif
  22. #define NUM_OF_DWORDS_TX_MSDU_EXTENSION 18
  23. struct tx_msdu_extension {
  24. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  25. uint32_t tso_enable : 1,
  26. reserved_0a : 6,
  27. tcp_flag : 9,
  28. tcp_flag_mask : 9,
  29. reserved_0b : 7;
  30. uint32_t l2_length : 16,
  31. ip_length : 16;
  32. uint32_t tcp_seq_number : 32;
  33. uint32_t ip_identification : 16,
  34. udp_length : 16;
  35. uint32_t checksum_offset : 14,
  36. partial_checksum_en : 1,
  37. reserved_4a : 1,
  38. payload_start_offset : 14,
  39. reserved_4b : 2;
  40. uint32_t payload_end_offset : 14,
  41. reserved_5a : 2,
  42. wds : 1,
  43. reserved_5b : 15;
  44. uint32_t buf0_ptr_31_0 : 32;
  45. uint32_t buf0_ptr_39_32 : 8,
  46. extn_override : 1,
  47. encap_type : 2,
  48. encrypt_type : 4,
  49. tqm_no_drop : 1,
  50. buf0_len : 16;
  51. uint32_t buf1_ptr_31_0 : 32;
  52. uint32_t buf1_ptr_39_32 : 8,
  53. epd : 1,
  54. mesh_enable : 2,
  55. reserved_9a : 5,
  56. buf1_len : 16;
  57. uint32_t buf2_ptr_31_0 : 32;
  58. uint32_t buf2_ptr_39_32 : 8,
  59. dscp_tid_table_num : 6,
  60. reserved_11a : 2,
  61. buf2_len : 16;
  62. uint32_t buf3_ptr_31_0 : 32;
  63. uint32_t buf3_ptr_39_32 : 8,
  64. reserved_13a : 8,
  65. buf3_len : 16;
  66. uint32_t buf4_ptr_31_0 : 32;
  67. uint32_t buf4_ptr_39_32 : 8,
  68. reserved_15a : 8,
  69. buf4_len : 16;
  70. uint32_t buf5_ptr_31_0 : 32;
  71. uint32_t buf5_ptr_39_32 : 8,
  72. reserved_17a : 8,
  73. buf5_len : 16;
  74. #else
  75. uint32_t reserved_0b : 7,
  76. tcp_flag_mask : 9,
  77. tcp_flag : 9,
  78. reserved_0a : 6,
  79. tso_enable : 1;
  80. uint32_t ip_length : 16,
  81. l2_length : 16;
  82. uint32_t tcp_seq_number : 32;
  83. uint32_t udp_length : 16,
  84. ip_identification : 16;
  85. uint32_t reserved_4b : 2,
  86. payload_start_offset : 14,
  87. reserved_4a : 1,
  88. partial_checksum_en : 1,
  89. checksum_offset : 14;
  90. uint32_t reserved_5b : 15,
  91. wds : 1,
  92. reserved_5a : 2,
  93. payload_end_offset : 14;
  94. uint32_t buf0_ptr_31_0 : 32;
  95. uint32_t buf0_len : 16,
  96. tqm_no_drop : 1,
  97. encrypt_type : 4,
  98. encap_type : 2,
  99. extn_override : 1,
  100. buf0_ptr_39_32 : 8;
  101. uint32_t buf1_ptr_31_0 : 32;
  102. uint32_t buf1_len : 16,
  103. reserved_9a : 5,
  104. mesh_enable : 2,
  105. epd : 1,
  106. buf1_ptr_39_32 : 8;
  107. uint32_t buf2_ptr_31_0 : 32;
  108. uint32_t buf2_len : 16,
  109. reserved_11a : 2,
  110. dscp_tid_table_num : 6,
  111. buf2_ptr_39_32 : 8;
  112. uint32_t buf3_ptr_31_0 : 32;
  113. uint32_t buf3_len : 16,
  114. reserved_13a : 8,
  115. buf3_ptr_39_32 : 8;
  116. uint32_t buf4_ptr_31_0 : 32;
  117. uint32_t buf4_len : 16,
  118. reserved_15a : 8,
  119. buf4_ptr_39_32 : 8;
  120. uint32_t buf5_ptr_31_0 : 32;
  121. uint32_t buf5_len : 16,
  122. reserved_17a : 8,
  123. buf5_ptr_39_32 : 8;
  124. #endif
  125. };
  126. #define TX_MSDU_EXTENSION_TSO_ENABLE_OFFSET 0x00000000
  127. #define TX_MSDU_EXTENSION_TSO_ENABLE_LSB 0
  128. #define TX_MSDU_EXTENSION_TSO_ENABLE_MSB 0
  129. #define TX_MSDU_EXTENSION_TSO_ENABLE_MASK 0x00000001
  130. #define TX_MSDU_EXTENSION_RESERVED_0A_OFFSET 0x00000000
  131. #define TX_MSDU_EXTENSION_RESERVED_0A_LSB 1
  132. #define TX_MSDU_EXTENSION_RESERVED_0A_MSB 6
  133. #define TX_MSDU_EXTENSION_RESERVED_0A_MASK 0x0000007e
  134. #define TX_MSDU_EXTENSION_TCP_FLAG_OFFSET 0x00000000
  135. #define TX_MSDU_EXTENSION_TCP_FLAG_LSB 7
  136. #define TX_MSDU_EXTENSION_TCP_FLAG_MSB 15
  137. #define TX_MSDU_EXTENSION_TCP_FLAG_MASK 0x0000ff80
  138. #define TX_MSDU_EXTENSION_TCP_FLAG_MASK_OFFSET 0x00000000
  139. #define TX_MSDU_EXTENSION_TCP_FLAG_MASK_LSB 16
  140. #define TX_MSDU_EXTENSION_TCP_FLAG_MASK_MSB 24
  141. #define TX_MSDU_EXTENSION_TCP_FLAG_MASK_MASK 0x01ff0000
  142. #define TX_MSDU_EXTENSION_RESERVED_0B_OFFSET 0x00000000
  143. #define TX_MSDU_EXTENSION_RESERVED_0B_LSB 25
  144. #define TX_MSDU_EXTENSION_RESERVED_0B_MSB 31
  145. #define TX_MSDU_EXTENSION_RESERVED_0B_MASK 0xfe000000
  146. #define TX_MSDU_EXTENSION_L2_LENGTH_OFFSET 0x00000004
  147. #define TX_MSDU_EXTENSION_L2_LENGTH_LSB 0
  148. #define TX_MSDU_EXTENSION_L2_LENGTH_MSB 15
  149. #define TX_MSDU_EXTENSION_L2_LENGTH_MASK 0x0000ffff
  150. #define TX_MSDU_EXTENSION_IP_LENGTH_OFFSET 0x00000004
  151. #define TX_MSDU_EXTENSION_IP_LENGTH_LSB 16
  152. #define TX_MSDU_EXTENSION_IP_LENGTH_MSB 31
  153. #define TX_MSDU_EXTENSION_IP_LENGTH_MASK 0xffff0000
  154. #define TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_OFFSET 0x00000008
  155. #define TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_LSB 0
  156. #define TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_MSB 31
  157. #define TX_MSDU_EXTENSION_TCP_SEQ_NUMBER_MASK 0xffffffff
  158. #define TX_MSDU_EXTENSION_IP_IDENTIFICATION_OFFSET 0x0000000c
  159. #define TX_MSDU_EXTENSION_IP_IDENTIFICATION_LSB 0
  160. #define TX_MSDU_EXTENSION_IP_IDENTIFICATION_MSB 15
  161. #define TX_MSDU_EXTENSION_IP_IDENTIFICATION_MASK 0x0000ffff
  162. #define TX_MSDU_EXTENSION_UDP_LENGTH_OFFSET 0x0000000c
  163. #define TX_MSDU_EXTENSION_UDP_LENGTH_LSB 16
  164. #define TX_MSDU_EXTENSION_UDP_LENGTH_MSB 31
  165. #define TX_MSDU_EXTENSION_UDP_LENGTH_MASK 0xffff0000
  166. #define TX_MSDU_EXTENSION_CHECKSUM_OFFSET_OFFSET 0x00000010
  167. #define TX_MSDU_EXTENSION_CHECKSUM_OFFSET_LSB 0
  168. #define TX_MSDU_EXTENSION_CHECKSUM_OFFSET_MSB 13
  169. #define TX_MSDU_EXTENSION_CHECKSUM_OFFSET_MASK 0x00003fff
  170. #define TX_MSDU_EXTENSION_PARTIAL_CHECKSUM_EN_OFFSET 0x00000010
  171. #define TX_MSDU_EXTENSION_PARTIAL_CHECKSUM_EN_LSB 14
  172. #define TX_MSDU_EXTENSION_PARTIAL_CHECKSUM_EN_MSB 14
  173. #define TX_MSDU_EXTENSION_PARTIAL_CHECKSUM_EN_MASK 0x00004000
  174. #define TX_MSDU_EXTENSION_RESERVED_4A_OFFSET 0x00000010
  175. #define TX_MSDU_EXTENSION_RESERVED_4A_LSB 15
  176. #define TX_MSDU_EXTENSION_RESERVED_4A_MSB 15
  177. #define TX_MSDU_EXTENSION_RESERVED_4A_MASK 0x00008000
  178. #define TX_MSDU_EXTENSION_PAYLOAD_START_OFFSET_OFFSET 0x00000010
  179. #define TX_MSDU_EXTENSION_PAYLOAD_START_OFFSET_LSB 16
  180. #define TX_MSDU_EXTENSION_PAYLOAD_START_OFFSET_MSB 29
  181. #define TX_MSDU_EXTENSION_PAYLOAD_START_OFFSET_MASK 0x3fff0000
  182. #define TX_MSDU_EXTENSION_RESERVED_4B_OFFSET 0x00000010
  183. #define TX_MSDU_EXTENSION_RESERVED_4B_LSB 30
  184. #define TX_MSDU_EXTENSION_RESERVED_4B_MSB 31
  185. #define TX_MSDU_EXTENSION_RESERVED_4B_MASK 0xc0000000
  186. #define TX_MSDU_EXTENSION_PAYLOAD_END_OFFSET_OFFSET 0x00000014
  187. #define TX_MSDU_EXTENSION_PAYLOAD_END_OFFSET_LSB 0
  188. #define TX_MSDU_EXTENSION_PAYLOAD_END_OFFSET_MSB 13
  189. #define TX_MSDU_EXTENSION_PAYLOAD_END_OFFSET_MASK 0x00003fff
  190. #define TX_MSDU_EXTENSION_RESERVED_5A_OFFSET 0x00000014
  191. #define TX_MSDU_EXTENSION_RESERVED_5A_LSB 14
  192. #define TX_MSDU_EXTENSION_RESERVED_5A_MSB 15
  193. #define TX_MSDU_EXTENSION_RESERVED_5A_MASK 0x0000c000
  194. #define TX_MSDU_EXTENSION_WDS_OFFSET 0x00000014
  195. #define TX_MSDU_EXTENSION_WDS_LSB 16
  196. #define TX_MSDU_EXTENSION_WDS_MSB 16
  197. #define TX_MSDU_EXTENSION_WDS_MASK 0x00010000
  198. #define TX_MSDU_EXTENSION_RESERVED_5B_OFFSET 0x00000014
  199. #define TX_MSDU_EXTENSION_RESERVED_5B_LSB 17
  200. #define TX_MSDU_EXTENSION_RESERVED_5B_MSB 31
  201. #define TX_MSDU_EXTENSION_RESERVED_5B_MASK 0xfffe0000
  202. #define TX_MSDU_EXTENSION_BUF0_PTR_31_0_OFFSET 0x00000018
  203. #define TX_MSDU_EXTENSION_BUF0_PTR_31_0_LSB 0
  204. #define TX_MSDU_EXTENSION_BUF0_PTR_31_0_MSB 31
  205. #define TX_MSDU_EXTENSION_BUF0_PTR_31_0_MASK 0xffffffff
  206. #define TX_MSDU_EXTENSION_BUF0_PTR_39_32_OFFSET 0x0000001c
  207. #define TX_MSDU_EXTENSION_BUF0_PTR_39_32_LSB 0
  208. #define TX_MSDU_EXTENSION_BUF0_PTR_39_32_MSB 7
  209. #define TX_MSDU_EXTENSION_BUF0_PTR_39_32_MASK 0x000000ff
  210. #define TX_MSDU_EXTENSION_EXTN_OVERRIDE_OFFSET 0x0000001c
  211. #define TX_MSDU_EXTENSION_EXTN_OVERRIDE_LSB 8
  212. #define TX_MSDU_EXTENSION_EXTN_OVERRIDE_MSB 8
  213. #define TX_MSDU_EXTENSION_EXTN_OVERRIDE_MASK 0x00000100
  214. #define TX_MSDU_EXTENSION_ENCAP_TYPE_OFFSET 0x0000001c
  215. #define TX_MSDU_EXTENSION_ENCAP_TYPE_LSB 9
  216. #define TX_MSDU_EXTENSION_ENCAP_TYPE_MSB 10
  217. #define TX_MSDU_EXTENSION_ENCAP_TYPE_MASK 0x00000600
  218. #define TX_MSDU_EXTENSION_ENCRYPT_TYPE_OFFSET 0x0000001c
  219. #define TX_MSDU_EXTENSION_ENCRYPT_TYPE_LSB 11
  220. #define TX_MSDU_EXTENSION_ENCRYPT_TYPE_MSB 14
  221. #define TX_MSDU_EXTENSION_ENCRYPT_TYPE_MASK 0x00007800
  222. #define TX_MSDU_EXTENSION_TQM_NO_DROP_OFFSET 0x0000001c
  223. #define TX_MSDU_EXTENSION_TQM_NO_DROP_LSB 15
  224. #define TX_MSDU_EXTENSION_TQM_NO_DROP_MSB 15
  225. #define TX_MSDU_EXTENSION_TQM_NO_DROP_MASK 0x00008000
  226. #define TX_MSDU_EXTENSION_BUF0_LEN_OFFSET 0x0000001c
  227. #define TX_MSDU_EXTENSION_BUF0_LEN_LSB 16
  228. #define TX_MSDU_EXTENSION_BUF0_LEN_MSB 31
  229. #define TX_MSDU_EXTENSION_BUF0_LEN_MASK 0xffff0000
  230. #define TX_MSDU_EXTENSION_BUF1_PTR_31_0_OFFSET 0x00000020
  231. #define TX_MSDU_EXTENSION_BUF1_PTR_31_0_LSB 0
  232. #define TX_MSDU_EXTENSION_BUF1_PTR_31_0_MSB 31
  233. #define TX_MSDU_EXTENSION_BUF1_PTR_31_0_MASK 0xffffffff
  234. #define TX_MSDU_EXTENSION_BUF1_PTR_39_32_OFFSET 0x00000024
  235. #define TX_MSDU_EXTENSION_BUF1_PTR_39_32_LSB 0
  236. #define TX_MSDU_EXTENSION_BUF1_PTR_39_32_MSB 7
  237. #define TX_MSDU_EXTENSION_BUF1_PTR_39_32_MASK 0x000000ff
  238. #define TX_MSDU_EXTENSION_EPD_OFFSET 0x00000024
  239. #define TX_MSDU_EXTENSION_EPD_LSB 8
  240. #define TX_MSDU_EXTENSION_EPD_MSB 8
  241. #define TX_MSDU_EXTENSION_EPD_MASK 0x00000100
  242. #define TX_MSDU_EXTENSION_MESH_ENABLE_OFFSET 0x00000024
  243. #define TX_MSDU_EXTENSION_MESH_ENABLE_LSB 9
  244. #define TX_MSDU_EXTENSION_MESH_ENABLE_MSB 10
  245. #define TX_MSDU_EXTENSION_MESH_ENABLE_MASK 0x00000600
  246. #define TX_MSDU_EXTENSION_RESERVED_9A_OFFSET 0x00000024
  247. #define TX_MSDU_EXTENSION_RESERVED_9A_LSB 11
  248. #define TX_MSDU_EXTENSION_RESERVED_9A_MSB 15
  249. #define TX_MSDU_EXTENSION_RESERVED_9A_MASK 0x0000f800
  250. #define TX_MSDU_EXTENSION_BUF1_LEN_OFFSET 0x00000024
  251. #define TX_MSDU_EXTENSION_BUF1_LEN_LSB 16
  252. #define TX_MSDU_EXTENSION_BUF1_LEN_MSB 31
  253. #define TX_MSDU_EXTENSION_BUF1_LEN_MASK 0xffff0000
  254. #define TX_MSDU_EXTENSION_BUF2_PTR_31_0_OFFSET 0x00000028
  255. #define TX_MSDU_EXTENSION_BUF2_PTR_31_0_LSB 0
  256. #define TX_MSDU_EXTENSION_BUF2_PTR_31_0_MSB 31
  257. #define TX_MSDU_EXTENSION_BUF2_PTR_31_0_MASK 0xffffffff
  258. #define TX_MSDU_EXTENSION_BUF2_PTR_39_32_OFFSET 0x0000002c
  259. #define TX_MSDU_EXTENSION_BUF2_PTR_39_32_LSB 0
  260. #define TX_MSDU_EXTENSION_BUF2_PTR_39_32_MSB 7
  261. #define TX_MSDU_EXTENSION_BUF2_PTR_39_32_MASK 0x000000ff
  262. #define TX_MSDU_EXTENSION_DSCP_TID_TABLE_NUM_OFFSET 0x0000002c
  263. #define TX_MSDU_EXTENSION_DSCP_TID_TABLE_NUM_LSB 8
  264. #define TX_MSDU_EXTENSION_DSCP_TID_TABLE_NUM_MSB 13
  265. #define TX_MSDU_EXTENSION_DSCP_TID_TABLE_NUM_MASK 0x00003f00
  266. #define TX_MSDU_EXTENSION_RESERVED_11A_OFFSET 0x0000002c
  267. #define TX_MSDU_EXTENSION_RESERVED_11A_LSB 14
  268. #define TX_MSDU_EXTENSION_RESERVED_11A_MSB 15
  269. #define TX_MSDU_EXTENSION_RESERVED_11A_MASK 0x0000c000
  270. #define TX_MSDU_EXTENSION_BUF2_LEN_OFFSET 0x0000002c
  271. #define TX_MSDU_EXTENSION_BUF2_LEN_LSB 16
  272. #define TX_MSDU_EXTENSION_BUF2_LEN_MSB 31
  273. #define TX_MSDU_EXTENSION_BUF2_LEN_MASK 0xffff0000
  274. #define TX_MSDU_EXTENSION_BUF3_PTR_31_0_OFFSET 0x00000030
  275. #define TX_MSDU_EXTENSION_BUF3_PTR_31_0_LSB 0
  276. #define TX_MSDU_EXTENSION_BUF3_PTR_31_0_MSB 31
  277. #define TX_MSDU_EXTENSION_BUF3_PTR_31_0_MASK 0xffffffff
  278. #define TX_MSDU_EXTENSION_BUF3_PTR_39_32_OFFSET 0x00000034
  279. #define TX_MSDU_EXTENSION_BUF3_PTR_39_32_LSB 0
  280. #define TX_MSDU_EXTENSION_BUF3_PTR_39_32_MSB 7
  281. #define TX_MSDU_EXTENSION_BUF3_PTR_39_32_MASK 0x000000ff
  282. #define TX_MSDU_EXTENSION_RESERVED_13A_OFFSET 0x00000034
  283. #define TX_MSDU_EXTENSION_RESERVED_13A_LSB 8
  284. #define TX_MSDU_EXTENSION_RESERVED_13A_MSB 15
  285. #define TX_MSDU_EXTENSION_RESERVED_13A_MASK 0x0000ff00
  286. #define TX_MSDU_EXTENSION_BUF3_LEN_OFFSET 0x00000034
  287. #define TX_MSDU_EXTENSION_BUF3_LEN_LSB 16
  288. #define TX_MSDU_EXTENSION_BUF3_LEN_MSB 31
  289. #define TX_MSDU_EXTENSION_BUF3_LEN_MASK 0xffff0000
  290. #define TX_MSDU_EXTENSION_BUF4_PTR_31_0_OFFSET 0x00000038
  291. #define TX_MSDU_EXTENSION_BUF4_PTR_31_0_LSB 0
  292. #define TX_MSDU_EXTENSION_BUF4_PTR_31_0_MSB 31
  293. #define TX_MSDU_EXTENSION_BUF4_PTR_31_0_MASK 0xffffffff
  294. #define TX_MSDU_EXTENSION_BUF4_PTR_39_32_OFFSET 0x0000003c
  295. #define TX_MSDU_EXTENSION_BUF4_PTR_39_32_LSB 0
  296. #define TX_MSDU_EXTENSION_BUF4_PTR_39_32_MSB 7
  297. #define TX_MSDU_EXTENSION_BUF4_PTR_39_32_MASK 0x000000ff
  298. #define TX_MSDU_EXTENSION_RESERVED_15A_OFFSET 0x0000003c
  299. #define TX_MSDU_EXTENSION_RESERVED_15A_LSB 8
  300. #define TX_MSDU_EXTENSION_RESERVED_15A_MSB 15
  301. #define TX_MSDU_EXTENSION_RESERVED_15A_MASK 0x0000ff00
  302. #define TX_MSDU_EXTENSION_BUF4_LEN_OFFSET 0x0000003c
  303. #define TX_MSDU_EXTENSION_BUF4_LEN_LSB 16
  304. #define TX_MSDU_EXTENSION_BUF4_LEN_MSB 31
  305. #define TX_MSDU_EXTENSION_BUF4_LEN_MASK 0xffff0000
  306. #define TX_MSDU_EXTENSION_BUF5_PTR_31_0_OFFSET 0x00000040
  307. #define TX_MSDU_EXTENSION_BUF5_PTR_31_0_LSB 0
  308. #define TX_MSDU_EXTENSION_BUF5_PTR_31_0_MSB 31
  309. #define TX_MSDU_EXTENSION_BUF5_PTR_31_0_MASK 0xffffffff
  310. #define TX_MSDU_EXTENSION_BUF5_PTR_39_32_OFFSET 0x00000044
  311. #define TX_MSDU_EXTENSION_BUF5_PTR_39_32_LSB 0
  312. #define TX_MSDU_EXTENSION_BUF5_PTR_39_32_MSB 7
  313. #define TX_MSDU_EXTENSION_BUF5_PTR_39_32_MASK 0x000000ff
  314. #define TX_MSDU_EXTENSION_RESERVED_17A_OFFSET 0x00000044
  315. #define TX_MSDU_EXTENSION_RESERVED_17A_LSB 8
  316. #define TX_MSDU_EXTENSION_RESERVED_17A_MSB 15
  317. #define TX_MSDU_EXTENSION_RESERVED_17A_MASK 0x0000ff00
  318. #define TX_MSDU_EXTENSION_BUF5_LEN_OFFSET 0x00000044
  319. #define TX_MSDU_EXTENSION_BUF5_LEN_LSB 16
  320. #define TX_MSDU_EXTENSION_BUF5_LEN_MSB 31
  321. #define TX_MSDU_EXTENSION_BUF5_LEN_MASK 0xffff0000
  322. #endif