tcl_data_cmd.h 20 KB

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  1. /*
  2. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _TCL_DATA_CMD_H_
  19. #define _TCL_DATA_CMD_H_
  20. #if !defined(__ASSEMBLER__)
  21. #endif
  22. #include "buffer_addr_info.h"
  23. #define NUM_OF_DWORDS_TCL_DATA_CMD 8
  24. struct tcl_data_cmd {
  25. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  26. struct buffer_addr_info buf_addr_info;
  27. uint32_t tcl_cmd_type : 1,
  28. buf_or_ext_desc_type : 1,
  29. bank_id : 6,
  30. tx_notify_frame : 3,
  31. header_length_read_sel : 1,
  32. buffer_timestamp : 19,
  33. buffer_timestamp_valid : 1;
  34. uint32_t reserved_3a : 16,
  35. tcl_cmd_number : 16;
  36. uint32_t data_length : 16,
  37. ipv4_checksum_en : 1,
  38. udp_over_ipv4_checksum_en : 1,
  39. udp_over_ipv6_checksum_en : 1,
  40. tcp_over_ipv4_checksum_en : 1,
  41. tcp_over_ipv6_checksum_en : 1,
  42. to_fw : 1,
  43. reserved_4a : 1,
  44. packet_offset : 9;
  45. uint32_t hlos_tid_overwrite : 1,
  46. flow_override_enable : 1,
  47. who_classify_info_sel : 2,
  48. hlos_tid : 4,
  49. flow_override : 1,
  50. pmac_id : 2,
  51. msdu_color : 2,
  52. reserved_5a : 11,
  53. vdev_id : 8;
  54. uint32_t search_index : 20,
  55. cache_set_num : 4,
  56. index_lookup_override : 1,
  57. reserved_6a : 7;
  58. uint32_t reserved_7a : 20,
  59. ring_id : 8,
  60. looping_count : 4;
  61. #else
  62. struct buffer_addr_info buf_addr_info;
  63. uint32_t buffer_timestamp_valid : 1,
  64. buffer_timestamp : 19,
  65. header_length_read_sel : 1,
  66. tx_notify_frame : 3,
  67. bank_id : 6,
  68. buf_or_ext_desc_type : 1,
  69. tcl_cmd_type : 1;
  70. uint32_t tcl_cmd_number : 16,
  71. reserved_3a : 16;
  72. uint32_t packet_offset : 9,
  73. reserved_4a : 1,
  74. to_fw : 1,
  75. tcp_over_ipv6_checksum_en : 1,
  76. tcp_over_ipv4_checksum_en : 1,
  77. udp_over_ipv6_checksum_en : 1,
  78. udp_over_ipv4_checksum_en : 1,
  79. ipv4_checksum_en : 1,
  80. data_length : 16;
  81. uint32_t vdev_id : 8,
  82. reserved_5a : 11,
  83. msdu_color : 2,
  84. pmac_id : 2,
  85. flow_override : 1,
  86. hlos_tid : 4,
  87. who_classify_info_sel : 2,
  88. flow_override_enable : 1,
  89. hlos_tid_overwrite : 1;
  90. uint32_t reserved_6a : 7,
  91. index_lookup_override : 1,
  92. cache_set_num : 4,
  93. search_index : 20;
  94. uint32_t looping_count : 4,
  95. ring_id : 8,
  96. reserved_7a : 20;
  97. #endif
  98. };
  99. #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_31_0_OFFSET 0x00000000
  100. #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_31_0_LSB 0
  101. #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_31_0_MSB 31
  102. #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_31_0_MASK 0xffffffff
  103. #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_39_32_OFFSET 0x00000004
  104. #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_39_32_LSB 0
  105. #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_39_32_MSB 7
  106. #define TCL_DATA_CMD_BUF_ADDR_INFO_BUFFER_ADDR_39_32_MASK 0x000000ff
  107. #define TCL_DATA_CMD_BUF_ADDR_INFO_RETURN_BUFFER_MANAGER_OFFSET 0x00000004
  108. #define TCL_DATA_CMD_BUF_ADDR_INFO_RETURN_BUFFER_MANAGER_LSB 8
  109. #define TCL_DATA_CMD_BUF_ADDR_INFO_RETURN_BUFFER_MANAGER_MSB 11
  110. #define TCL_DATA_CMD_BUF_ADDR_INFO_RETURN_BUFFER_MANAGER_MASK 0x00000f00
  111. #define TCL_DATA_CMD_BUF_ADDR_INFO_SW_BUFFER_COOKIE_OFFSET 0x00000004
  112. #define TCL_DATA_CMD_BUF_ADDR_INFO_SW_BUFFER_COOKIE_LSB 12
  113. #define TCL_DATA_CMD_BUF_ADDR_INFO_SW_BUFFER_COOKIE_MSB 31
  114. #define TCL_DATA_CMD_BUF_ADDR_INFO_SW_BUFFER_COOKIE_MASK 0xfffff000
  115. #define TCL_DATA_CMD_TCL_CMD_TYPE_OFFSET 0x00000008
  116. #define TCL_DATA_CMD_TCL_CMD_TYPE_LSB 0
  117. #define TCL_DATA_CMD_TCL_CMD_TYPE_MSB 0
  118. #define TCL_DATA_CMD_TCL_CMD_TYPE_MASK 0x00000001
  119. #define TCL_DATA_CMD_BUF_OR_EXT_DESC_TYPE_OFFSET 0x00000008
  120. #define TCL_DATA_CMD_BUF_OR_EXT_DESC_TYPE_LSB 1
  121. #define TCL_DATA_CMD_BUF_OR_EXT_DESC_TYPE_MSB 1
  122. #define TCL_DATA_CMD_BUF_OR_EXT_DESC_TYPE_MASK 0x00000002
  123. #define TCL_DATA_CMD_BANK_ID_OFFSET 0x00000008
  124. #define TCL_DATA_CMD_BANK_ID_LSB 2
  125. #define TCL_DATA_CMD_BANK_ID_MSB 7
  126. #define TCL_DATA_CMD_BANK_ID_MASK 0x000000fc
  127. #define TCL_DATA_CMD_TX_NOTIFY_FRAME_OFFSET 0x00000008
  128. #define TCL_DATA_CMD_TX_NOTIFY_FRAME_LSB 8
  129. #define TCL_DATA_CMD_TX_NOTIFY_FRAME_MSB 10
  130. #define TCL_DATA_CMD_TX_NOTIFY_FRAME_MASK 0x00000700
  131. #define TCL_DATA_CMD_HEADER_LENGTH_READ_SEL_OFFSET 0x00000008
  132. #define TCL_DATA_CMD_HEADER_LENGTH_READ_SEL_LSB 11
  133. #define TCL_DATA_CMD_HEADER_LENGTH_READ_SEL_MSB 11
  134. #define TCL_DATA_CMD_HEADER_LENGTH_READ_SEL_MASK 0x00000800
  135. #define TCL_DATA_CMD_BUFFER_TIMESTAMP_OFFSET 0x00000008
  136. #define TCL_DATA_CMD_BUFFER_TIMESTAMP_LSB 12
  137. #define TCL_DATA_CMD_BUFFER_TIMESTAMP_MSB 30
  138. #define TCL_DATA_CMD_BUFFER_TIMESTAMP_MASK 0x7ffff000
  139. #define TCL_DATA_CMD_BUFFER_TIMESTAMP_VALID_OFFSET 0x00000008
  140. #define TCL_DATA_CMD_BUFFER_TIMESTAMP_VALID_LSB 31
  141. #define TCL_DATA_CMD_BUFFER_TIMESTAMP_VALID_MSB 31
  142. #define TCL_DATA_CMD_BUFFER_TIMESTAMP_VALID_MASK 0x80000000
  143. #define TCL_DATA_CMD_RESERVED_3A_OFFSET 0x0000000c
  144. #define TCL_DATA_CMD_RESERVED_3A_LSB 0
  145. #define TCL_DATA_CMD_RESERVED_3A_MSB 15
  146. #define TCL_DATA_CMD_RESERVED_3A_MASK 0x0000ffff
  147. #define TCL_DATA_CMD_TCL_CMD_NUMBER_OFFSET 0x0000000c
  148. #define TCL_DATA_CMD_TCL_CMD_NUMBER_LSB 16
  149. #define TCL_DATA_CMD_TCL_CMD_NUMBER_MSB 31
  150. #define TCL_DATA_CMD_TCL_CMD_NUMBER_MASK 0xffff0000
  151. #define TCL_DATA_CMD_DATA_LENGTH_OFFSET 0x00000010
  152. #define TCL_DATA_CMD_DATA_LENGTH_LSB 0
  153. #define TCL_DATA_CMD_DATA_LENGTH_MSB 15
  154. #define TCL_DATA_CMD_DATA_LENGTH_MASK 0x0000ffff
  155. #define TCL_DATA_CMD_IPV4_CHECKSUM_EN_OFFSET 0x00000010
  156. #define TCL_DATA_CMD_IPV4_CHECKSUM_EN_LSB 16
  157. #define TCL_DATA_CMD_IPV4_CHECKSUM_EN_MSB 16
  158. #define TCL_DATA_CMD_IPV4_CHECKSUM_EN_MASK 0x00010000
  159. #define TCL_DATA_CMD_UDP_OVER_IPV4_CHECKSUM_EN_OFFSET 0x00000010
  160. #define TCL_DATA_CMD_UDP_OVER_IPV4_CHECKSUM_EN_LSB 17
  161. #define TCL_DATA_CMD_UDP_OVER_IPV4_CHECKSUM_EN_MSB 17
  162. #define TCL_DATA_CMD_UDP_OVER_IPV4_CHECKSUM_EN_MASK 0x00020000
  163. #define TCL_DATA_CMD_UDP_OVER_IPV6_CHECKSUM_EN_OFFSET 0x00000010
  164. #define TCL_DATA_CMD_UDP_OVER_IPV6_CHECKSUM_EN_LSB 18
  165. #define TCL_DATA_CMD_UDP_OVER_IPV6_CHECKSUM_EN_MSB 18
  166. #define TCL_DATA_CMD_UDP_OVER_IPV6_CHECKSUM_EN_MASK 0x00040000
  167. #define TCL_DATA_CMD_TCP_OVER_IPV4_CHECKSUM_EN_OFFSET 0x00000010
  168. #define TCL_DATA_CMD_TCP_OVER_IPV4_CHECKSUM_EN_LSB 19
  169. #define TCL_DATA_CMD_TCP_OVER_IPV4_CHECKSUM_EN_MSB 19
  170. #define TCL_DATA_CMD_TCP_OVER_IPV4_CHECKSUM_EN_MASK 0x00080000
  171. #define TCL_DATA_CMD_TCP_OVER_IPV6_CHECKSUM_EN_OFFSET 0x00000010
  172. #define TCL_DATA_CMD_TCP_OVER_IPV6_CHECKSUM_EN_LSB 20
  173. #define TCL_DATA_CMD_TCP_OVER_IPV6_CHECKSUM_EN_MSB 20
  174. #define TCL_DATA_CMD_TCP_OVER_IPV6_CHECKSUM_EN_MASK 0x00100000
  175. #define TCL_DATA_CMD_TO_FW_OFFSET 0x00000010
  176. #define TCL_DATA_CMD_TO_FW_LSB 21
  177. #define TCL_DATA_CMD_TO_FW_MSB 21
  178. #define TCL_DATA_CMD_TO_FW_MASK 0x00200000
  179. #define TCL_DATA_CMD_RESERVED_4A_OFFSET 0x00000010
  180. #define TCL_DATA_CMD_RESERVED_4A_LSB 22
  181. #define TCL_DATA_CMD_RESERVED_4A_MSB 22
  182. #define TCL_DATA_CMD_RESERVED_4A_MASK 0x00400000
  183. #define TCL_DATA_CMD_PACKET_OFFSET_OFFSET 0x00000010
  184. #define TCL_DATA_CMD_PACKET_OFFSET_LSB 23
  185. #define TCL_DATA_CMD_PACKET_OFFSET_MSB 31
  186. #define TCL_DATA_CMD_PACKET_OFFSET_MASK 0xff800000
  187. #define TCL_DATA_CMD_HLOS_TID_OVERWRITE_OFFSET 0x00000014
  188. #define TCL_DATA_CMD_HLOS_TID_OVERWRITE_LSB 0
  189. #define TCL_DATA_CMD_HLOS_TID_OVERWRITE_MSB 0
  190. #define TCL_DATA_CMD_HLOS_TID_OVERWRITE_MASK 0x00000001
  191. #define TCL_DATA_CMD_FLOW_OVERRIDE_ENABLE_OFFSET 0x00000014
  192. #define TCL_DATA_CMD_FLOW_OVERRIDE_ENABLE_LSB 1
  193. #define TCL_DATA_CMD_FLOW_OVERRIDE_ENABLE_MSB 1
  194. #define TCL_DATA_CMD_FLOW_OVERRIDE_ENABLE_MASK 0x00000002
  195. #define TCL_DATA_CMD_WHO_CLASSIFY_INFO_SEL_OFFSET 0x00000014
  196. #define TCL_DATA_CMD_WHO_CLASSIFY_INFO_SEL_LSB 2
  197. #define TCL_DATA_CMD_WHO_CLASSIFY_INFO_SEL_MSB 3
  198. #define TCL_DATA_CMD_WHO_CLASSIFY_INFO_SEL_MASK 0x0000000c
  199. #define TCL_DATA_CMD_HLOS_TID_OFFSET 0x00000014
  200. #define TCL_DATA_CMD_HLOS_TID_LSB 4
  201. #define TCL_DATA_CMD_HLOS_TID_MSB 7
  202. #define TCL_DATA_CMD_HLOS_TID_MASK 0x000000f0
  203. #define TCL_DATA_CMD_FLOW_OVERRIDE_OFFSET 0x00000014
  204. #define TCL_DATA_CMD_FLOW_OVERRIDE_LSB 8
  205. #define TCL_DATA_CMD_FLOW_OVERRIDE_MSB 8
  206. #define TCL_DATA_CMD_FLOW_OVERRIDE_MASK 0x00000100
  207. #define TCL_DATA_CMD_PMAC_ID_OFFSET 0x00000014
  208. #define TCL_DATA_CMD_PMAC_ID_LSB 9
  209. #define TCL_DATA_CMD_PMAC_ID_MSB 10
  210. #define TCL_DATA_CMD_PMAC_ID_MASK 0x00000600
  211. #define TCL_DATA_CMD_MSDU_COLOR_OFFSET 0x00000014
  212. #define TCL_DATA_CMD_MSDU_COLOR_LSB 11
  213. #define TCL_DATA_CMD_MSDU_COLOR_MSB 12
  214. #define TCL_DATA_CMD_MSDU_COLOR_MASK 0x00001800
  215. #define TCL_DATA_CMD_RESERVED_5A_OFFSET 0x00000014
  216. #define TCL_DATA_CMD_RESERVED_5A_LSB 13
  217. #define TCL_DATA_CMD_RESERVED_5A_MSB 23
  218. #define TCL_DATA_CMD_RESERVED_5A_MASK 0x00ffe000
  219. #define TCL_DATA_CMD_VDEV_ID_OFFSET 0x00000014
  220. #define TCL_DATA_CMD_VDEV_ID_LSB 24
  221. #define TCL_DATA_CMD_VDEV_ID_MSB 31
  222. #define TCL_DATA_CMD_VDEV_ID_MASK 0xff000000
  223. #define TCL_DATA_CMD_SEARCH_INDEX_OFFSET 0x00000018
  224. #define TCL_DATA_CMD_SEARCH_INDEX_LSB 0
  225. #define TCL_DATA_CMD_SEARCH_INDEX_MSB 19
  226. #define TCL_DATA_CMD_SEARCH_INDEX_MASK 0x000fffff
  227. #define TCL_DATA_CMD_CACHE_SET_NUM_OFFSET 0x00000018
  228. #define TCL_DATA_CMD_CACHE_SET_NUM_LSB 20
  229. #define TCL_DATA_CMD_CACHE_SET_NUM_MSB 23
  230. #define TCL_DATA_CMD_CACHE_SET_NUM_MASK 0x00f00000
  231. #define TCL_DATA_CMD_INDEX_LOOKUP_OVERRIDE_OFFSET 0x00000018
  232. #define TCL_DATA_CMD_INDEX_LOOKUP_OVERRIDE_LSB 24
  233. #define TCL_DATA_CMD_INDEX_LOOKUP_OVERRIDE_MSB 24
  234. #define TCL_DATA_CMD_INDEX_LOOKUP_OVERRIDE_MASK 0x01000000
  235. #define TCL_DATA_CMD_RESERVED_6A_OFFSET 0x00000018
  236. #define TCL_DATA_CMD_RESERVED_6A_LSB 25
  237. #define TCL_DATA_CMD_RESERVED_6A_MSB 31
  238. #define TCL_DATA_CMD_RESERVED_6A_MASK 0xfe000000
  239. #define TCL_DATA_CMD_RESERVED_7A_OFFSET 0x0000001c
  240. #define TCL_DATA_CMD_RESERVED_7A_LSB 0
  241. #define TCL_DATA_CMD_RESERVED_7A_MSB 19
  242. #define TCL_DATA_CMD_RESERVED_7A_MASK 0x000fffff
  243. #define TCL_DATA_CMD_RING_ID_OFFSET 0x0000001c
  244. #define TCL_DATA_CMD_RING_ID_LSB 20
  245. #define TCL_DATA_CMD_RING_ID_MSB 27
  246. #define TCL_DATA_CMD_RING_ID_MASK 0x0ff00000
  247. #define TCL_DATA_CMD_LOOPING_COUNT_OFFSET 0x0000001c
  248. #define TCL_DATA_CMD_LOOPING_COUNT_LSB 28
  249. #define TCL_DATA_CMD_LOOPING_COUNT_MSB 31
  250. #define TCL_DATA_CMD_LOOPING_COUNT_MASK 0xf0000000
  251. #endif