rx_attention.h 29 KB

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  1. /*
  2. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _RX_ATTENTION_H_
  19. #define _RX_ATTENTION_H_
  20. #if !defined(__ASSEMBLER__)
  21. #endif
  22. #define NUM_OF_DWORDS_RX_ATTENTION 4
  23. #define NUM_OF_QWORDS_RX_ATTENTION 2
  24. struct rx_attention {
  25. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  26. uint32_t rxpcu_mpdu_filter_in_category : 2,
  27. sw_frame_group_id : 7,
  28. reserved_0 : 7,
  29. phy_ppdu_id : 16;
  30. uint32_t first_mpdu : 1,
  31. reserved_1a : 1,
  32. mcast_bcast : 1,
  33. ast_index_not_found : 1,
  34. ast_index_timeout : 1,
  35. power_mgmt : 1,
  36. non_qos : 1,
  37. null_data : 1,
  38. mgmt_type : 1,
  39. ctrl_type : 1,
  40. more_data : 1,
  41. eosp : 1,
  42. a_msdu_error : 1,
  43. fragment_flag : 1,
  44. order : 1,
  45. cce_match : 1,
  46. overflow_err : 1,
  47. msdu_length_err : 1,
  48. tcp_udp_chksum_fail : 1,
  49. ip_chksum_fail : 1,
  50. sa_idx_invalid : 1,
  51. da_idx_invalid : 1,
  52. reserved_1b : 1,
  53. rx_in_tx_decrypt_byp : 1,
  54. encrypt_required : 1,
  55. directed : 1,
  56. buffer_fragment : 1,
  57. mpdu_length_err : 1,
  58. tkip_mic_err : 1,
  59. decrypt_err : 1,
  60. unencrypted_frame_err : 1,
  61. fcs_err : 1;
  62. uint32_t flow_idx_timeout : 1,
  63. flow_idx_invalid : 1,
  64. wifi_parser_error : 1,
  65. amsdu_parser_error : 1,
  66. sa_idx_timeout : 1,
  67. da_idx_timeout : 1,
  68. msdu_limit_error : 1,
  69. da_is_valid : 1,
  70. da_is_mcbc : 1,
  71. sa_is_valid : 1,
  72. decrypt_status_code : 3,
  73. rx_bitmap_not_updated : 1,
  74. reserved_2 : 17,
  75. msdu_done : 1;
  76. uint32_t tlv64_padding : 32;
  77. #else
  78. uint32_t phy_ppdu_id : 16,
  79. reserved_0 : 7,
  80. sw_frame_group_id : 7,
  81. rxpcu_mpdu_filter_in_category : 2;
  82. uint32_t fcs_err : 1,
  83. unencrypted_frame_err : 1,
  84. decrypt_err : 1,
  85. tkip_mic_err : 1,
  86. mpdu_length_err : 1,
  87. buffer_fragment : 1,
  88. directed : 1,
  89. encrypt_required : 1,
  90. rx_in_tx_decrypt_byp : 1,
  91. reserved_1b : 1,
  92. da_idx_invalid : 1,
  93. sa_idx_invalid : 1,
  94. ip_chksum_fail : 1,
  95. tcp_udp_chksum_fail : 1,
  96. msdu_length_err : 1,
  97. overflow_err : 1,
  98. cce_match : 1,
  99. order : 1,
  100. fragment_flag : 1,
  101. a_msdu_error : 1,
  102. eosp : 1,
  103. more_data : 1,
  104. ctrl_type : 1,
  105. mgmt_type : 1,
  106. null_data : 1,
  107. non_qos : 1,
  108. power_mgmt : 1,
  109. ast_index_timeout : 1,
  110. ast_index_not_found : 1,
  111. mcast_bcast : 1,
  112. reserved_1a : 1,
  113. first_mpdu : 1;
  114. uint32_t msdu_done : 1,
  115. reserved_2 : 17,
  116. rx_bitmap_not_updated : 1,
  117. decrypt_status_code : 3,
  118. sa_is_valid : 1,
  119. da_is_mcbc : 1,
  120. da_is_valid : 1,
  121. msdu_limit_error : 1,
  122. da_idx_timeout : 1,
  123. sa_idx_timeout : 1,
  124. amsdu_parser_error : 1,
  125. wifi_parser_error : 1,
  126. flow_idx_invalid : 1,
  127. flow_idx_timeout : 1;
  128. uint32_t tlv64_padding : 32;
  129. #endif
  130. };
  131. #define RX_ATTENTION_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET 0x0000000000000000
  132. #define RX_ATTENTION_RXPCU_MPDU_FILTER_IN_CATEGORY_LSB 0
  133. #define RX_ATTENTION_RXPCU_MPDU_FILTER_IN_CATEGORY_MSB 1
  134. #define RX_ATTENTION_RXPCU_MPDU_FILTER_IN_CATEGORY_MASK 0x0000000000000003
  135. #define RX_ATTENTION_SW_FRAME_GROUP_ID_OFFSET 0x0000000000000000
  136. #define RX_ATTENTION_SW_FRAME_GROUP_ID_LSB 2
  137. #define RX_ATTENTION_SW_FRAME_GROUP_ID_MSB 8
  138. #define RX_ATTENTION_SW_FRAME_GROUP_ID_MASK 0x00000000000001fc
  139. #define RX_ATTENTION_RESERVED_0_OFFSET 0x0000000000000000
  140. #define RX_ATTENTION_RESERVED_0_LSB 9
  141. #define RX_ATTENTION_RESERVED_0_MSB 15
  142. #define RX_ATTENTION_RESERVED_0_MASK 0x000000000000fe00
  143. #define RX_ATTENTION_PHY_PPDU_ID_OFFSET 0x0000000000000000
  144. #define RX_ATTENTION_PHY_PPDU_ID_LSB 16
  145. #define RX_ATTENTION_PHY_PPDU_ID_MSB 31
  146. #define RX_ATTENTION_PHY_PPDU_ID_MASK 0x00000000ffff0000
  147. #define RX_ATTENTION_FIRST_MPDU_OFFSET 0x0000000000000000
  148. #define RX_ATTENTION_FIRST_MPDU_LSB 32
  149. #define RX_ATTENTION_FIRST_MPDU_MSB 32
  150. #define RX_ATTENTION_FIRST_MPDU_MASK 0x0000000100000000
  151. #define RX_ATTENTION_RESERVED_1A_OFFSET 0x0000000000000000
  152. #define RX_ATTENTION_RESERVED_1A_LSB 33
  153. #define RX_ATTENTION_RESERVED_1A_MSB 33
  154. #define RX_ATTENTION_RESERVED_1A_MASK 0x0000000200000000
  155. #define RX_ATTENTION_MCAST_BCAST_OFFSET 0x0000000000000000
  156. #define RX_ATTENTION_MCAST_BCAST_LSB 34
  157. #define RX_ATTENTION_MCAST_BCAST_MSB 34
  158. #define RX_ATTENTION_MCAST_BCAST_MASK 0x0000000400000000
  159. #define RX_ATTENTION_AST_INDEX_NOT_FOUND_OFFSET 0x0000000000000000
  160. #define RX_ATTENTION_AST_INDEX_NOT_FOUND_LSB 35
  161. #define RX_ATTENTION_AST_INDEX_NOT_FOUND_MSB 35
  162. #define RX_ATTENTION_AST_INDEX_NOT_FOUND_MASK 0x0000000800000000
  163. #define RX_ATTENTION_AST_INDEX_TIMEOUT_OFFSET 0x0000000000000000
  164. #define RX_ATTENTION_AST_INDEX_TIMEOUT_LSB 36
  165. #define RX_ATTENTION_AST_INDEX_TIMEOUT_MSB 36
  166. #define RX_ATTENTION_AST_INDEX_TIMEOUT_MASK 0x0000001000000000
  167. #define RX_ATTENTION_POWER_MGMT_OFFSET 0x0000000000000000
  168. #define RX_ATTENTION_POWER_MGMT_LSB 37
  169. #define RX_ATTENTION_POWER_MGMT_MSB 37
  170. #define RX_ATTENTION_POWER_MGMT_MASK 0x0000002000000000
  171. #define RX_ATTENTION_NON_QOS_OFFSET 0x0000000000000000
  172. #define RX_ATTENTION_NON_QOS_LSB 38
  173. #define RX_ATTENTION_NON_QOS_MSB 38
  174. #define RX_ATTENTION_NON_QOS_MASK 0x0000004000000000
  175. #define RX_ATTENTION_NULL_DATA_OFFSET 0x0000000000000000
  176. #define RX_ATTENTION_NULL_DATA_LSB 39
  177. #define RX_ATTENTION_NULL_DATA_MSB 39
  178. #define RX_ATTENTION_NULL_DATA_MASK 0x0000008000000000
  179. #define RX_ATTENTION_MGMT_TYPE_OFFSET 0x0000000000000000
  180. #define RX_ATTENTION_MGMT_TYPE_LSB 40
  181. #define RX_ATTENTION_MGMT_TYPE_MSB 40
  182. #define RX_ATTENTION_MGMT_TYPE_MASK 0x0000010000000000
  183. #define RX_ATTENTION_CTRL_TYPE_OFFSET 0x0000000000000000
  184. #define RX_ATTENTION_CTRL_TYPE_LSB 41
  185. #define RX_ATTENTION_CTRL_TYPE_MSB 41
  186. #define RX_ATTENTION_CTRL_TYPE_MASK 0x0000020000000000
  187. #define RX_ATTENTION_MORE_DATA_OFFSET 0x0000000000000000
  188. #define RX_ATTENTION_MORE_DATA_LSB 42
  189. #define RX_ATTENTION_MORE_DATA_MSB 42
  190. #define RX_ATTENTION_MORE_DATA_MASK 0x0000040000000000
  191. #define RX_ATTENTION_EOSP_OFFSET 0x0000000000000000
  192. #define RX_ATTENTION_EOSP_LSB 43
  193. #define RX_ATTENTION_EOSP_MSB 43
  194. #define RX_ATTENTION_EOSP_MASK 0x0000080000000000
  195. #define RX_ATTENTION_A_MSDU_ERROR_OFFSET 0x0000000000000000
  196. #define RX_ATTENTION_A_MSDU_ERROR_LSB 44
  197. #define RX_ATTENTION_A_MSDU_ERROR_MSB 44
  198. #define RX_ATTENTION_A_MSDU_ERROR_MASK 0x0000100000000000
  199. #define RX_ATTENTION_FRAGMENT_FLAG_OFFSET 0x0000000000000000
  200. #define RX_ATTENTION_FRAGMENT_FLAG_LSB 45
  201. #define RX_ATTENTION_FRAGMENT_FLAG_MSB 45
  202. #define RX_ATTENTION_FRAGMENT_FLAG_MASK 0x0000200000000000
  203. #define RX_ATTENTION_ORDER_OFFSET 0x0000000000000000
  204. #define RX_ATTENTION_ORDER_LSB 46
  205. #define RX_ATTENTION_ORDER_MSB 46
  206. #define RX_ATTENTION_ORDER_MASK 0x0000400000000000
  207. #define RX_ATTENTION_CCE_MATCH_OFFSET 0x0000000000000000
  208. #define RX_ATTENTION_CCE_MATCH_LSB 47
  209. #define RX_ATTENTION_CCE_MATCH_MSB 47
  210. #define RX_ATTENTION_CCE_MATCH_MASK 0x0000800000000000
  211. #define RX_ATTENTION_OVERFLOW_ERR_OFFSET 0x0000000000000000
  212. #define RX_ATTENTION_OVERFLOW_ERR_LSB 48
  213. #define RX_ATTENTION_OVERFLOW_ERR_MSB 48
  214. #define RX_ATTENTION_OVERFLOW_ERR_MASK 0x0001000000000000
  215. #define RX_ATTENTION_MSDU_LENGTH_ERR_OFFSET 0x0000000000000000
  216. #define RX_ATTENTION_MSDU_LENGTH_ERR_LSB 49
  217. #define RX_ATTENTION_MSDU_LENGTH_ERR_MSB 49
  218. #define RX_ATTENTION_MSDU_LENGTH_ERR_MASK 0x0002000000000000
  219. #define RX_ATTENTION_TCP_UDP_CHKSUM_FAIL_OFFSET 0x0000000000000000
  220. #define RX_ATTENTION_TCP_UDP_CHKSUM_FAIL_LSB 50
  221. #define RX_ATTENTION_TCP_UDP_CHKSUM_FAIL_MSB 50
  222. #define RX_ATTENTION_TCP_UDP_CHKSUM_FAIL_MASK 0x0004000000000000
  223. #define RX_ATTENTION_IP_CHKSUM_FAIL_OFFSET 0x0000000000000000
  224. #define RX_ATTENTION_IP_CHKSUM_FAIL_LSB 51
  225. #define RX_ATTENTION_IP_CHKSUM_FAIL_MSB 51
  226. #define RX_ATTENTION_IP_CHKSUM_FAIL_MASK 0x0008000000000000
  227. #define RX_ATTENTION_SA_IDX_INVALID_OFFSET 0x0000000000000000
  228. #define RX_ATTENTION_SA_IDX_INVALID_LSB 52
  229. #define RX_ATTENTION_SA_IDX_INVALID_MSB 52
  230. #define RX_ATTENTION_SA_IDX_INVALID_MASK 0x0010000000000000
  231. #define RX_ATTENTION_DA_IDX_INVALID_OFFSET 0x0000000000000000
  232. #define RX_ATTENTION_DA_IDX_INVALID_LSB 53
  233. #define RX_ATTENTION_DA_IDX_INVALID_MSB 53
  234. #define RX_ATTENTION_DA_IDX_INVALID_MASK 0x0020000000000000
  235. #define RX_ATTENTION_RESERVED_1B_OFFSET 0x0000000000000000
  236. #define RX_ATTENTION_RESERVED_1B_LSB 54
  237. #define RX_ATTENTION_RESERVED_1B_MSB 54
  238. #define RX_ATTENTION_RESERVED_1B_MASK 0x0040000000000000
  239. #define RX_ATTENTION_RX_IN_TX_DECRYPT_BYP_OFFSET 0x0000000000000000
  240. #define RX_ATTENTION_RX_IN_TX_DECRYPT_BYP_LSB 55
  241. #define RX_ATTENTION_RX_IN_TX_DECRYPT_BYP_MSB 55
  242. #define RX_ATTENTION_RX_IN_TX_DECRYPT_BYP_MASK 0x0080000000000000
  243. #define RX_ATTENTION_ENCRYPT_REQUIRED_OFFSET 0x0000000000000000
  244. #define RX_ATTENTION_ENCRYPT_REQUIRED_LSB 56
  245. #define RX_ATTENTION_ENCRYPT_REQUIRED_MSB 56
  246. #define RX_ATTENTION_ENCRYPT_REQUIRED_MASK 0x0100000000000000
  247. #define RX_ATTENTION_DIRECTED_OFFSET 0x0000000000000000
  248. #define RX_ATTENTION_DIRECTED_LSB 57
  249. #define RX_ATTENTION_DIRECTED_MSB 57
  250. #define RX_ATTENTION_DIRECTED_MASK 0x0200000000000000
  251. #define RX_ATTENTION_BUFFER_FRAGMENT_OFFSET 0x0000000000000000
  252. #define RX_ATTENTION_BUFFER_FRAGMENT_LSB 58
  253. #define RX_ATTENTION_BUFFER_FRAGMENT_MSB 58
  254. #define RX_ATTENTION_BUFFER_FRAGMENT_MASK 0x0400000000000000
  255. #define RX_ATTENTION_MPDU_LENGTH_ERR_OFFSET 0x0000000000000000
  256. #define RX_ATTENTION_MPDU_LENGTH_ERR_LSB 59
  257. #define RX_ATTENTION_MPDU_LENGTH_ERR_MSB 59
  258. #define RX_ATTENTION_MPDU_LENGTH_ERR_MASK 0x0800000000000000
  259. #define RX_ATTENTION_TKIP_MIC_ERR_OFFSET 0x0000000000000000
  260. #define RX_ATTENTION_TKIP_MIC_ERR_LSB 60
  261. #define RX_ATTENTION_TKIP_MIC_ERR_MSB 60
  262. #define RX_ATTENTION_TKIP_MIC_ERR_MASK 0x1000000000000000
  263. #define RX_ATTENTION_DECRYPT_ERR_OFFSET 0x0000000000000000
  264. #define RX_ATTENTION_DECRYPT_ERR_LSB 61
  265. #define RX_ATTENTION_DECRYPT_ERR_MSB 61
  266. #define RX_ATTENTION_DECRYPT_ERR_MASK 0x2000000000000000
  267. #define RX_ATTENTION_UNENCRYPTED_FRAME_ERR_OFFSET 0x0000000000000000
  268. #define RX_ATTENTION_UNENCRYPTED_FRAME_ERR_LSB 62
  269. #define RX_ATTENTION_UNENCRYPTED_FRAME_ERR_MSB 62
  270. #define RX_ATTENTION_UNENCRYPTED_FRAME_ERR_MASK 0x4000000000000000
  271. #define RX_ATTENTION_FCS_ERR_OFFSET 0x0000000000000000
  272. #define RX_ATTENTION_FCS_ERR_LSB 63
  273. #define RX_ATTENTION_FCS_ERR_MSB 63
  274. #define RX_ATTENTION_FCS_ERR_MASK 0x8000000000000000
  275. #define RX_ATTENTION_FLOW_IDX_TIMEOUT_OFFSET 0x0000000000000008
  276. #define RX_ATTENTION_FLOW_IDX_TIMEOUT_LSB 0
  277. #define RX_ATTENTION_FLOW_IDX_TIMEOUT_MSB 0
  278. #define RX_ATTENTION_FLOW_IDX_TIMEOUT_MASK 0x0000000000000001
  279. #define RX_ATTENTION_FLOW_IDX_INVALID_OFFSET 0x0000000000000008
  280. #define RX_ATTENTION_FLOW_IDX_INVALID_LSB 1
  281. #define RX_ATTENTION_FLOW_IDX_INVALID_MSB 1
  282. #define RX_ATTENTION_FLOW_IDX_INVALID_MASK 0x0000000000000002
  283. #define RX_ATTENTION_WIFI_PARSER_ERROR_OFFSET 0x0000000000000008
  284. #define RX_ATTENTION_WIFI_PARSER_ERROR_LSB 2
  285. #define RX_ATTENTION_WIFI_PARSER_ERROR_MSB 2
  286. #define RX_ATTENTION_WIFI_PARSER_ERROR_MASK 0x0000000000000004
  287. #define RX_ATTENTION_AMSDU_PARSER_ERROR_OFFSET 0x0000000000000008
  288. #define RX_ATTENTION_AMSDU_PARSER_ERROR_LSB 3
  289. #define RX_ATTENTION_AMSDU_PARSER_ERROR_MSB 3
  290. #define RX_ATTENTION_AMSDU_PARSER_ERROR_MASK 0x0000000000000008
  291. #define RX_ATTENTION_SA_IDX_TIMEOUT_OFFSET 0x0000000000000008
  292. #define RX_ATTENTION_SA_IDX_TIMEOUT_LSB 4
  293. #define RX_ATTENTION_SA_IDX_TIMEOUT_MSB 4
  294. #define RX_ATTENTION_SA_IDX_TIMEOUT_MASK 0x0000000000000010
  295. #define RX_ATTENTION_DA_IDX_TIMEOUT_OFFSET 0x0000000000000008
  296. #define RX_ATTENTION_DA_IDX_TIMEOUT_LSB 5
  297. #define RX_ATTENTION_DA_IDX_TIMEOUT_MSB 5
  298. #define RX_ATTENTION_DA_IDX_TIMEOUT_MASK 0x0000000000000020
  299. #define RX_ATTENTION_MSDU_LIMIT_ERROR_OFFSET 0x0000000000000008
  300. #define RX_ATTENTION_MSDU_LIMIT_ERROR_LSB 6
  301. #define RX_ATTENTION_MSDU_LIMIT_ERROR_MSB 6
  302. #define RX_ATTENTION_MSDU_LIMIT_ERROR_MASK 0x0000000000000040
  303. #define RX_ATTENTION_DA_IS_VALID_OFFSET 0x0000000000000008
  304. #define RX_ATTENTION_DA_IS_VALID_LSB 7
  305. #define RX_ATTENTION_DA_IS_VALID_MSB 7
  306. #define RX_ATTENTION_DA_IS_VALID_MASK 0x0000000000000080
  307. #define RX_ATTENTION_DA_IS_MCBC_OFFSET 0x0000000000000008
  308. #define RX_ATTENTION_DA_IS_MCBC_LSB 8
  309. #define RX_ATTENTION_DA_IS_MCBC_MSB 8
  310. #define RX_ATTENTION_DA_IS_MCBC_MASK 0x0000000000000100
  311. #define RX_ATTENTION_SA_IS_VALID_OFFSET 0x0000000000000008
  312. #define RX_ATTENTION_SA_IS_VALID_LSB 9
  313. #define RX_ATTENTION_SA_IS_VALID_MSB 9
  314. #define RX_ATTENTION_SA_IS_VALID_MASK 0x0000000000000200
  315. #define RX_ATTENTION_DECRYPT_STATUS_CODE_OFFSET 0x0000000000000008
  316. #define RX_ATTENTION_DECRYPT_STATUS_CODE_LSB 10
  317. #define RX_ATTENTION_DECRYPT_STATUS_CODE_MSB 12
  318. #define RX_ATTENTION_DECRYPT_STATUS_CODE_MASK 0x0000000000001c00
  319. #define RX_ATTENTION_RX_BITMAP_NOT_UPDATED_OFFSET 0x0000000000000008
  320. #define RX_ATTENTION_RX_BITMAP_NOT_UPDATED_LSB 13
  321. #define RX_ATTENTION_RX_BITMAP_NOT_UPDATED_MSB 13
  322. #define RX_ATTENTION_RX_BITMAP_NOT_UPDATED_MASK 0x0000000000002000
  323. #define RX_ATTENTION_RESERVED_2_OFFSET 0x0000000000000008
  324. #define RX_ATTENTION_RESERVED_2_LSB 14
  325. #define RX_ATTENTION_RESERVED_2_MSB 30
  326. #define RX_ATTENTION_RESERVED_2_MASK 0x000000007fffc000
  327. #define RX_ATTENTION_MSDU_DONE_OFFSET 0x0000000000000008
  328. #define RX_ATTENTION_MSDU_DONE_LSB 31
  329. #define RX_ATTENTION_MSDU_DONE_MSB 31
  330. #define RX_ATTENTION_MSDU_DONE_MASK 0x0000000080000000
  331. #define RX_ATTENTION_TLV64_PADDING_OFFSET 0x0000000000000008
  332. #define RX_ATTENTION_TLV64_PADDING_LSB 32
  333. #define RX_ATTENTION_TLV64_PADDING_MSB 63
  334. #define RX_ATTENTION_TLV64_PADDING_MASK 0xffffffff00000000
  335. #endif