dp_main.c 199 KB

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  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <qdf_net_types.h>
  21. #include <qdf_lro.h>
  22. #include <qdf_module.h>
  23. #include <hal_api.h>
  24. #include <hif.h>
  25. #include <htt.h>
  26. #include <wdi_event.h>
  27. #include <queue.h>
  28. #include "dp_htt.h"
  29. #include "dp_types.h"
  30. #include "dp_internal.h"
  31. #include "dp_tx.h"
  32. #include "dp_tx_desc.h"
  33. #include "dp_rx.h"
  34. #include <cdp_txrx_handle.h>
  35. #include <wlan_cfg.h>
  36. #include "cdp_txrx_cmn_struct.h"
  37. #include "cdp_txrx_stats_struct.h"
  38. #include <qdf_util.h>
  39. #include "dp_peer.h"
  40. #include "dp_rx_mon.h"
  41. #include "htt_stats.h"
  42. #include "qdf_mem.h" /* qdf_mem_malloc,free */
  43. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  44. #include "cdp_txrx_flow_ctrl_v2.h"
  45. #else
  46. static inline void
  47. cdp_dump_flow_pool_info(struct cdp_soc_t *soc)
  48. {
  49. return;
  50. }
  51. #endif
  52. #include "dp_ipa.h"
  53. #ifdef CONFIG_MCL
  54. static void dp_service_mon_rings(void *arg);
  55. #ifndef REMOVE_PKT_LOG
  56. #include <pktlog_ac_api.h>
  57. #include <pktlog_ac.h>
  58. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn);
  59. #endif
  60. #endif
  61. static void dp_pktlogmod_exit(struct dp_pdev *handle);
  62. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  63. uint8_t *peer_mac_addr);
  64. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap);
  65. #define DP_INTR_POLL_TIMER_MS 10
  66. #define DP_WDS_AGING_TIMER_DEFAULT_MS 120000
  67. #define DP_MCS_LENGTH (6*MAX_MCS)
  68. #define DP_NSS_LENGTH (6*SS_COUNT)
  69. #define DP_RXDMA_ERR_LENGTH (6*HAL_RXDMA_ERR_MAX)
  70. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_MAX)
  71. #define DP_MAX_MCS_STRING_LEN 30
  72. #define DP_CURR_FW_STATS_AVAIL 19
  73. #define DP_HTT_DBG_EXT_STATS_MAX 256
  74. #define DP_MAX_SLEEP_TIME 100
  75. #ifdef IPA_OFFLOAD
  76. /* Exclude IPA rings from the interrupt context */
  77. #define TX_RING_MASK_VAL 0xb
  78. #define RX_RING_MASK_VAL 0x7
  79. #else
  80. #define TX_RING_MASK_VAL 0xF
  81. #define RX_RING_MASK_VAL 0xF
  82. #endif
  83. bool rx_hash = 1;
  84. qdf_declare_param(rx_hash, bool);
  85. #define STR_MAXLEN 64
  86. #define DP_PPDU_STATS_CFG_ALL 0xFFFF
  87. /* PPDU stats mask sent to FW to enable enhanced stats */
  88. #define DP_PPDU_STATS_CFG_ENH_STATS 0xE67
  89. /* PPDU stats mask sent to FW to support debug sniffer feature */
  90. #define DP_PPDU_STATS_CFG_SNIFFER 0x2FFF
  91. /**
  92. * default_dscp_tid_map - Default DSCP-TID mapping
  93. *
  94. * DSCP TID
  95. * 000000 0
  96. * 001000 1
  97. * 010000 2
  98. * 011000 3
  99. * 100000 4
  100. * 101000 5
  101. * 110000 6
  102. * 111000 7
  103. */
  104. static uint8_t default_dscp_tid_map[DSCP_TID_MAP_MAX] = {
  105. 0, 0, 0, 0, 0, 0, 0, 0,
  106. 1, 1, 1, 1, 1, 1, 1, 1,
  107. 2, 2, 2, 2, 2, 2, 2, 2,
  108. 3, 3, 3, 3, 3, 3, 3, 3,
  109. 4, 4, 4, 4, 4, 4, 4, 4,
  110. 5, 5, 5, 5, 5, 5, 5, 5,
  111. 6, 6, 6, 6, 6, 6, 6, 6,
  112. 7, 7, 7, 7, 7, 7, 7, 7,
  113. };
  114. /*
  115. * struct dp_rate_debug
  116. *
  117. * @mcs_type: print string for a given mcs
  118. * @valid: valid mcs rate?
  119. */
  120. struct dp_rate_debug {
  121. char mcs_type[DP_MAX_MCS_STRING_LEN];
  122. uint8_t valid;
  123. };
  124. #define MCS_VALID 1
  125. #define MCS_INVALID 0
  126. static const struct dp_rate_debug dp_rate_string[DOT11_MAX][MAX_MCS] = {
  127. {
  128. {"OFDM 48 Mbps", MCS_VALID},
  129. {"OFDM 24 Mbps", MCS_VALID},
  130. {"OFDM 12 Mbps", MCS_VALID},
  131. {"OFDM 6 Mbps ", MCS_VALID},
  132. {"OFDM 54 Mbps", MCS_VALID},
  133. {"OFDM 36 Mbps", MCS_VALID},
  134. {"OFDM 18 Mbps", MCS_VALID},
  135. {"OFDM 9 Mbps ", MCS_VALID},
  136. {"INVALID ", MCS_INVALID},
  137. {"INVALID ", MCS_INVALID},
  138. {"INVALID ", MCS_INVALID},
  139. {"INVALID ", MCS_INVALID},
  140. {"INVALID ", MCS_VALID},
  141. },
  142. {
  143. {"CCK 11 Mbps Long ", MCS_VALID},
  144. {"CCK 5.5 Mbps Long ", MCS_VALID},
  145. {"CCK 2 Mbps Long ", MCS_VALID},
  146. {"CCK 1 Mbps Long ", MCS_VALID},
  147. {"CCK 11 Mbps Short ", MCS_VALID},
  148. {"CCK 5.5 Mbps Short", MCS_VALID},
  149. {"CCK 2 Mbps Short ", MCS_VALID},
  150. {"INVALID ", MCS_INVALID},
  151. {"INVALID ", MCS_INVALID},
  152. {"INVALID ", MCS_INVALID},
  153. {"INVALID ", MCS_INVALID},
  154. {"INVALID ", MCS_INVALID},
  155. {"INVALID ", MCS_VALID},
  156. },
  157. {
  158. {"HT MCS 0 (BPSK 1/2) ", MCS_VALID},
  159. {"HT MCS 1 (QPSK 1/2) ", MCS_VALID},
  160. {"HT MCS 2 (QPSK 3/4) ", MCS_VALID},
  161. {"HT MCS 3 (16-QAM 1/2)", MCS_VALID},
  162. {"HT MCS 4 (16-QAM 3/4)", MCS_VALID},
  163. {"HT MCS 5 (64-QAM 2/3)", MCS_VALID},
  164. {"HT MCS 6 (64-QAM 3/4)", MCS_VALID},
  165. {"HT MCS 7 (64-QAM 5/6)", MCS_VALID},
  166. {"INVALID ", MCS_INVALID},
  167. {"INVALID ", MCS_INVALID},
  168. {"INVALID ", MCS_INVALID},
  169. {"INVALID ", MCS_INVALID},
  170. {"INVALID ", MCS_VALID},
  171. },
  172. {
  173. {"VHT MCS 0 (BPSK 1/2) ", MCS_VALID},
  174. {"VHT MCS 1 (QPSK 1/2) ", MCS_VALID},
  175. {"VHT MCS 2 (QPSK 3/4) ", MCS_VALID},
  176. {"VHT MCS 3 (16-QAM 1/2) ", MCS_VALID},
  177. {"VHT MCS 4 (16-QAM 3/4) ", MCS_VALID},
  178. {"VHT MCS 5 (64-QAM 2/3) ", MCS_VALID},
  179. {"VHT MCS 6 (64-QAM 3/4) ", MCS_VALID},
  180. {"VHT MCS 7 (64-QAM 5/6) ", MCS_VALID},
  181. {"VHT MCS 8 (256-QAM 3/4) ", MCS_VALID},
  182. {"VHT MCS 9 (256-QAM 5/6) ", MCS_VALID},
  183. {"VHT MCS 10 (1024-QAM 3/4)", MCS_VALID},
  184. {"VHT MCS 11 (1024-QAM 5/6)", MCS_VALID},
  185. {"INVALID ", MCS_VALID},
  186. },
  187. {
  188. {"HE MCS 0 (BPSK 1/2) ", MCS_VALID},
  189. {"HE MCS 1 (QPSK 1/2) ", MCS_VALID},
  190. {"HE MCS 2 (QPSK 3/4) ", MCS_VALID},
  191. {"HE MCS 3 (16-QAM 1/2) ", MCS_VALID},
  192. {"HE MCS 4 (16-QAM 3/4) ", MCS_VALID},
  193. {"HE MCS 5 (64-QAM 2/3) ", MCS_VALID},
  194. {"HE MCS 6 (64-QAM 3/4) ", MCS_VALID},
  195. {"HE MCS 7 (64-QAM 5/6) ", MCS_VALID},
  196. {"HE MCS 8 (256-QAM 3/4) ", MCS_VALID},
  197. {"HE MCS 9 (256-QAM 5/6) ", MCS_VALID},
  198. {"HE MCS 10 (1024-QAM 3/4)", MCS_VALID},
  199. {"HE MCS 11 (1024-QAM 5/6)", MCS_VALID},
  200. {"INVALID ", MCS_VALID},
  201. }
  202. };
  203. /**
  204. * @brief Cpu ring map types
  205. */
  206. enum dp_cpu_ring_map_types {
  207. DP_DEFAULT_MAP,
  208. DP_NSS_FIRST_RADIO_OFFLOADED_MAP,
  209. DP_NSS_SECOND_RADIO_OFFLOADED_MAP,
  210. DP_NSS_ALL_RADIO_OFFLOADED_MAP,
  211. DP_CPU_RING_MAP_MAX
  212. };
  213. /**
  214. * @brief Cpu to tx ring map
  215. */
  216. static uint8_t dp_cpu_ring_map[DP_CPU_RING_MAP_MAX][WLAN_CFG_INT_NUM_CONTEXTS] = {
  217. {0x0, 0x1, 0x2, 0x0},
  218. {0x1, 0x2, 0x1, 0x2},
  219. {0x0, 0x2, 0x0, 0x2},
  220. {0x2, 0x2, 0x2, 0x2}
  221. };
  222. /**
  223. * @brief Select the type of statistics
  224. */
  225. enum dp_stats_type {
  226. STATS_FW = 0,
  227. STATS_HOST = 1,
  228. STATS_TYPE_MAX = 2,
  229. };
  230. /**
  231. * @brief General Firmware statistics options
  232. *
  233. */
  234. enum dp_fw_stats {
  235. TXRX_FW_STATS_INVALID = -1,
  236. };
  237. /**
  238. * dp_stats_mapping_table - Firmware and Host statistics
  239. * currently supported
  240. */
  241. const int dp_stats_mapping_table[][STATS_TYPE_MAX] = {
  242. {HTT_DBG_EXT_STATS_RESET, TXRX_HOST_STATS_INVALID},
  243. {HTT_DBG_EXT_STATS_PDEV_TX, TXRX_HOST_STATS_INVALID},
  244. {HTT_DBG_EXT_STATS_PDEV_RX, TXRX_HOST_STATS_INVALID},
  245. {HTT_DBG_EXT_STATS_PDEV_TX_HWQ, TXRX_HOST_STATS_INVALID},
  246. {HTT_DBG_EXT_STATS_PDEV_TX_SCHED, TXRX_HOST_STATS_INVALID},
  247. {HTT_DBG_EXT_STATS_PDEV_ERROR, TXRX_HOST_STATS_INVALID},
  248. {HTT_DBG_EXT_STATS_PDEV_TQM, TXRX_HOST_STATS_INVALID},
  249. {HTT_DBG_EXT_STATS_TQM_CMDQ, TXRX_HOST_STATS_INVALID},
  250. {HTT_DBG_EXT_STATS_TX_DE_INFO, TXRX_HOST_STATS_INVALID},
  251. {HTT_DBG_EXT_STATS_PDEV_TX_RATE, TXRX_HOST_STATS_INVALID},
  252. {HTT_DBG_EXT_STATS_PDEV_RX_RATE, TXRX_HOST_STATS_INVALID},
  253. {TXRX_FW_STATS_INVALID, TXRX_HOST_STATS_INVALID},
  254. {HTT_DBG_EXT_STATS_TX_SELFGEN_INFO, TXRX_HOST_STATS_INVALID},
  255. {HTT_DBG_EXT_STATS_TX_MU_HWQ, TXRX_HOST_STATS_INVALID},
  256. {HTT_DBG_EXT_STATS_RING_IF_INFO, TXRX_HOST_STATS_INVALID},
  257. {HTT_DBG_EXT_STATS_SRNG_INFO, TXRX_HOST_STATS_INVALID},
  258. {HTT_DBG_EXT_STATS_SFM_INFO, TXRX_HOST_STATS_INVALID},
  259. {HTT_DBG_EXT_STATS_PDEV_TX_MU, TXRX_HOST_STATS_INVALID},
  260. {HTT_DBG_EXT_STATS_ACTIVE_PEERS_LIST, TXRX_HOST_STATS_INVALID},
  261. /* Last ENUM for HTT FW STATS */
  262. {DP_HTT_DBG_EXT_STATS_MAX, TXRX_HOST_STATS_INVALID},
  263. {TXRX_FW_STATS_INVALID, TXRX_CLEAR_STATS},
  264. {TXRX_FW_STATS_INVALID, TXRX_RX_RATE_STATS},
  265. {TXRX_FW_STATS_INVALID, TXRX_TX_RATE_STATS},
  266. {TXRX_FW_STATS_INVALID, TXRX_TX_HOST_STATS},
  267. {TXRX_FW_STATS_INVALID, TXRX_RX_HOST_STATS},
  268. {TXRX_FW_STATS_INVALID, TXRX_AST_STATS},
  269. {TXRX_FW_STATS_INVALID, TXRX_SRNG_PTR_STATS},
  270. };
  271. static int dp_peer_add_ast_wifi3(struct cdp_soc_t *soc_hdl,
  272. struct cdp_peer *peer_hdl,
  273. uint8_t *mac_addr,
  274. enum cdp_txrx_ast_entry_type type,
  275. uint32_t flags)
  276. {
  277. return dp_peer_add_ast((struct dp_soc *)soc_hdl,
  278. (struct dp_peer *)peer_hdl,
  279. mac_addr,
  280. type,
  281. flags);
  282. }
  283. static void dp_peer_del_ast_wifi3(struct cdp_soc_t *soc_hdl,
  284. void *ast_entry_hdl)
  285. {
  286. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  287. qdf_spin_lock_bh(&soc->ast_lock);
  288. dp_peer_del_ast((struct dp_soc *)soc_hdl,
  289. (struct dp_ast_entry *)ast_entry_hdl);
  290. qdf_spin_unlock_bh(&soc->ast_lock);
  291. }
  292. static int dp_peer_update_ast_wifi3(struct cdp_soc_t *soc_hdl,
  293. struct cdp_peer *peer_hdl,
  294. void *ast_entry_hdl,
  295. uint32_t flags)
  296. {
  297. int status;
  298. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  299. qdf_spin_lock_bh(&soc->ast_lock);
  300. status = dp_peer_update_ast(soc,
  301. (struct dp_peer *)peer_hdl,
  302. (struct dp_ast_entry *)ast_entry_hdl,
  303. flags);
  304. qdf_spin_unlock_bh(&soc->ast_lock);
  305. return status;
  306. }
  307. static void *dp_peer_ast_hash_find_wifi3(struct cdp_soc_t *soc_hdl,
  308. uint8_t *ast_mac_addr)
  309. {
  310. struct dp_ast_entry *ast_entry;
  311. struct dp_soc *soc = (struct dp_soc *)soc_hdl;
  312. qdf_spin_lock_bh(&soc->ast_lock);
  313. ast_entry = dp_peer_ast_hash_find(soc, ast_mac_addr);
  314. qdf_spin_unlock_bh(&soc->ast_lock);
  315. return (void *)ast_entry;
  316. }
  317. static uint8_t dp_peer_ast_get_pdev_id_wifi3(struct cdp_soc_t *soc_hdl,
  318. void *ast_entry_hdl)
  319. {
  320. return dp_peer_ast_get_pdev_id((struct dp_soc *)soc_hdl,
  321. (struct dp_ast_entry *)ast_entry_hdl);
  322. }
  323. static uint8_t dp_peer_ast_get_next_hop_wifi3(struct cdp_soc_t *soc_hdl,
  324. void *ast_entry_hdl)
  325. {
  326. return dp_peer_ast_get_next_hop((struct dp_soc *)soc_hdl,
  327. (struct dp_ast_entry *)ast_entry_hdl);
  328. }
  329. static void dp_peer_ast_set_type_wifi3(
  330. struct cdp_soc_t *soc_hdl,
  331. void *ast_entry_hdl,
  332. enum cdp_txrx_ast_entry_type type)
  333. {
  334. dp_peer_ast_set_type((struct dp_soc *)soc_hdl,
  335. (struct dp_ast_entry *)ast_entry_hdl,
  336. type);
  337. }
  338. /**
  339. * dp_srng_find_ring_in_mask() - find which ext_group a ring belongs
  340. * @ring_num: ring num of the ring being queried
  341. * @grp_mask: the grp_mask array for the ring type in question.
  342. *
  343. * The grp_mask array is indexed by group number and the bit fields correspond
  344. * to ring numbers. We are finding which interrupt group a ring belongs to.
  345. *
  346. * Return: the index in the grp_mask array with the ring number.
  347. * -QDF_STATUS_E_NOENT if no entry is found
  348. */
  349. static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
  350. {
  351. int ext_group_num;
  352. int mask = 1 << ring_num;
  353. for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
  354. ext_group_num++) {
  355. if (mask & grp_mask[ext_group_num])
  356. return ext_group_num;
  357. }
  358. return -QDF_STATUS_E_NOENT;
  359. }
  360. static int dp_srng_calculate_msi_group(struct dp_soc *soc,
  361. enum hal_ring_type ring_type,
  362. int ring_num)
  363. {
  364. int *grp_mask;
  365. switch (ring_type) {
  366. case WBM2SW_RELEASE:
  367. /* dp_tx_comp_handler - soc->tx_comp_ring */
  368. if (ring_num < 3)
  369. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  370. /* dp_rx_wbm_err_process - soc->rx_rel_ring */
  371. else if (ring_num == 3) {
  372. /* sw treats this as a separate ring type */
  373. grp_mask = &soc->wlan_cfg_ctx->
  374. int_rx_wbm_rel_ring_mask[0];
  375. ring_num = 0;
  376. } else {
  377. qdf_assert(0);
  378. return -QDF_STATUS_E_NOENT;
  379. }
  380. break;
  381. case REO_EXCEPTION:
  382. /* dp_rx_err_process - &soc->reo_exception_ring */
  383. grp_mask = &soc->wlan_cfg_ctx->int_rx_err_ring_mask[0];
  384. break;
  385. case REO_DST:
  386. /* dp_rx_process - soc->reo_dest_ring */
  387. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  388. break;
  389. case REO_STATUS:
  390. /* dp_reo_status_ring_handler - soc->reo_status_ring */
  391. grp_mask = &soc->wlan_cfg_ctx->int_reo_status_ring_mask[0];
  392. break;
  393. /* dp_rx_mon_status_srng_process - pdev->rxdma_mon_status_ring*/
  394. case RXDMA_MONITOR_STATUS:
  395. /* dp_rx_mon_dest_process - pdev->rxdma_mon_dst_ring */
  396. case RXDMA_MONITOR_DST:
  397. /* dp_mon_process */
  398. grp_mask = &soc->wlan_cfg_ctx->int_rx_mon_ring_mask[0];
  399. break;
  400. case RXDMA_DST:
  401. /* dp_rxdma_err_process */
  402. grp_mask = &soc->wlan_cfg_ctx->int_rxdma2host_ring_mask[0];
  403. break;
  404. case RXDMA_BUF:
  405. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  406. break;
  407. case RXDMA_MONITOR_BUF:
  408. /* TODO: support low_thresh interrupt */
  409. return -QDF_STATUS_E_NOENT;
  410. break;
  411. case TCL_DATA:
  412. case TCL_CMD:
  413. case REO_CMD:
  414. case SW2WBM_RELEASE:
  415. case WBM_IDLE_LINK:
  416. /* normally empty SW_TO_HW rings */
  417. return -QDF_STATUS_E_NOENT;
  418. break;
  419. case TCL_STATUS:
  420. case REO_REINJECT:
  421. /* misc unused rings */
  422. return -QDF_STATUS_E_NOENT;
  423. break;
  424. case CE_SRC:
  425. case CE_DST:
  426. case CE_DST_STATUS:
  427. /* CE_rings - currently handled by hif */
  428. default:
  429. return -QDF_STATUS_E_NOENT;
  430. break;
  431. }
  432. return dp_srng_find_ring_in_mask(ring_num, grp_mask);
  433. }
  434. static void dp_srng_msi_setup(struct dp_soc *soc, struct hal_srng_params
  435. *ring_params, int ring_type, int ring_num)
  436. {
  437. int msi_group_number;
  438. int msi_data_count;
  439. int ret;
  440. uint32_t msi_data_start, msi_irq_start, addr_low, addr_high;
  441. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  442. &msi_data_count, &msi_data_start,
  443. &msi_irq_start);
  444. if (ret)
  445. return;
  446. msi_group_number = dp_srng_calculate_msi_group(soc, ring_type,
  447. ring_num);
  448. if (msi_group_number < 0) {
  449. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  450. FL("ring not part of an ext_group; ring_type: %d,ring_num %d"),
  451. ring_type, ring_num);
  452. ring_params->msi_addr = 0;
  453. ring_params->msi_data = 0;
  454. return;
  455. }
  456. if (msi_group_number > msi_data_count) {
  457. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  458. FL("2 msi_groups will share an msi; msi_group_num %d"),
  459. msi_group_number);
  460. QDF_ASSERT(0);
  461. }
  462. pld_get_msi_address(soc->osdev->dev, &addr_low, &addr_high);
  463. ring_params->msi_addr = addr_low;
  464. ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
  465. ring_params->msi_data = (msi_group_number % msi_data_count)
  466. + msi_data_start;
  467. ring_params->flags |= HAL_SRNG_MSI_INTR;
  468. }
  469. /**
  470. * dp_print_ast_stats() - Dump AST table contents
  471. * @soc: Datapath soc handle
  472. *
  473. * return void
  474. */
  475. #ifdef FEATURE_WDS
  476. static void dp_print_ast_stats(struct dp_soc *soc)
  477. {
  478. uint8_t i;
  479. uint8_t num_entries = 0;
  480. struct dp_vdev *vdev;
  481. struct dp_pdev *pdev;
  482. struct dp_peer *peer;
  483. struct dp_ast_entry *ase, *tmp_ase;
  484. DP_PRINT_STATS("AST Stats:");
  485. DP_PRINT_STATS(" Entries Added = %d", soc->stats.ast.added);
  486. DP_PRINT_STATS(" Entries Deleted = %d", soc->stats.ast.deleted);
  487. DP_PRINT_STATS(" Entries Agedout = %d", soc->stats.ast.aged_out);
  488. DP_PRINT_STATS("AST Table:");
  489. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  490. pdev = soc->pdev_list[i];
  491. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  492. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  493. DP_PEER_ITERATE_ASE_LIST(peer, ase, tmp_ase) {
  494. DP_PRINT_STATS("%6d mac_addr = %pM"
  495. " peer_mac_addr = %pM"
  496. " type = %d"
  497. " next_hop = %d"
  498. " is_active = %d"
  499. " is_bss = %d"
  500. " ast_idx = %d"
  501. " pdev_id = %d"
  502. " vdev_id = %d",
  503. ++num_entries,
  504. ase->mac_addr.raw,
  505. ase->peer->mac_addr.raw,
  506. ase->type,
  507. ase->next_hop,
  508. ase->is_active,
  509. ase->is_bss,
  510. ase->ast_idx,
  511. ase->pdev_id,
  512. ase->vdev_id);
  513. }
  514. }
  515. }
  516. }
  517. }
  518. #else
  519. static void dp_print_ast_stats(struct dp_soc *soc)
  520. {
  521. DP_PRINT_STATS("AST Stats not available.Enable FEATURE_WDS");
  522. return;
  523. }
  524. #endif
  525. /*
  526. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  527. */
  528. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  529. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  530. {
  531. void *hal_soc = soc->hal_soc;
  532. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  533. /* TODO: See if we should get align size from hal */
  534. uint32_t ring_base_align = 8;
  535. struct hal_srng_params ring_params;
  536. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  537. /* TODO: Currently hal layer takes care of endianness related settings.
  538. * See if these settings need to passed from DP layer
  539. */
  540. ring_params.flags = 0;
  541. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  542. FL("Ring type: %d, num:%d"), ring_type, ring_num);
  543. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  544. srng->hal_srng = NULL;
  545. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  546. srng->num_entries = num_entries;
  547. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  548. soc->osdev, soc->osdev->dev, srng->alloc_size,
  549. &(srng->base_paddr_unaligned));
  550. if (!srng->base_vaddr_unaligned) {
  551. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  552. FL("alloc failed - ring_type: %d, ring_num %d"),
  553. ring_type, ring_num);
  554. return QDF_STATUS_E_NOMEM;
  555. }
  556. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  557. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  558. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  559. ((unsigned long)(ring_params.ring_base_vaddr) -
  560. (unsigned long)srng->base_vaddr_unaligned);
  561. ring_params.num_entries = num_entries;
  562. if (soc->intr_mode == DP_INTR_MSI) {
  563. dp_srng_msi_setup(soc, &ring_params, ring_type, ring_num);
  564. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  565. FL("Using MSI for ring_type: %d, ring_num %d"),
  566. ring_type, ring_num);
  567. } else {
  568. ring_params.msi_data = 0;
  569. ring_params.msi_addr = 0;
  570. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  571. FL("Skipping MSI for ring_type: %d, ring_num %d"),
  572. ring_type, ring_num);
  573. }
  574. /*
  575. * Setup interrupt timer and batch counter thresholds for
  576. * interrupt mitigation based on ring type
  577. */
  578. if (ring_type == REO_DST) {
  579. ring_params.intr_timer_thres_us =
  580. wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
  581. ring_params.intr_batch_cntr_thres_entries =
  582. wlan_cfg_get_int_batch_threshold_rx(soc->wlan_cfg_ctx);
  583. } else if (ring_type == WBM2SW_RELEASE && (ring_num < 3)) {
  584. ring_params.intr_timer_thres_us =
  585. wlan_cfg_get_int_timer_threshold_tx(soc->wlan_cfg_ctx);
  586. ring_params.intr_batch_cntr_thres_entries =
  587. wlan_cfg_get_int_batch_threshold_tx(soc->wlan_cfg_ctx);
  588. } else {
  589. ring_params.intr_timer_thres_us =
  590. wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
  591. ring_params.intr_batch_cntr_thres_entries =
  592. wlan_cfg_get_int_batch_threshold_other(soc->wlan_cfg_ctx);
  593. }
  594. /* Enable low threshold interrupts for rx buffer rings (regular and
  595. * monitor buffer rings.
  596. * TODO: See if this is required for any other ring
  597. */
  598. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF) ||
  599. (ring_type == RXDMA_MONITOR_STATUS)) {
  600. /* TODO: Setting low threshold to 1/8th of ring size
  601. * see if this needs to be configurable
  602. */
  603. ring_params.low_threshold = num_entries >> 3;
  604. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  605. ring_params.intr_timer_thres_us = 0x1000;
  606. }
  607. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  608. mac_id, &ring_params);
  609. if (!srng->hal_srng) {
  610. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  611. srng->alloc_size,
  612. srng->base_vaddr_unaligned,
  613. srng->base_paddr_unaligned, 0);
  614. }
  615. return 0;
  616. }
  617. /**
  618. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  619. * Any buffers allocated and attached to ring entries are expected to be freed
  620. * before calling this function.
  621. */
  622. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  623. int ring_type, int ring_num)
  624. {
  625. if (!srng->hal_srng) {
  626. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  627. FL("Ring type: %d, num:%d not setup"),
  628. ring_type, ring_num);
  629. return;
  630. }
  631. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  632. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  633. srng->alloc_size,
  634. srng->base_vaddr_unaligned,
  635. srng->base_paddr_unaligned, 0);
  636. srng->hal_srng = NULL;
  637. }
  638. /* TODO: Need this interface from HIF */
  639. void *hif_get_hal_handle(void *hif_handle);
  640. /*
  641. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  642. * @dp_ctx: DP SOC handle
  643. * @budget: Number of frames/descriptors that can be processed in one shot
  644. *
  645. * Return: remaining budget/quota for the soc device
  646. */
  647. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  648. {
  649. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  650. struct dp_soc *soc = int_ctx->soc;
  651. int ring = 0;
  652. uint32_t work_done = 0;
  653. int budget = dp_budget;
  654. uint8_t tx_mask = int_ctx->tx_ring_mask;
  655. uint8_t rx_mask = int_ctx->rx_ring_mask;
  656. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  657. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  658. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  659. uint32_t remaining_quota = dp_budget;
  660. struct dp_pdev *pdev = NULL;
  661. /* Process Tx completion interrupts first to return back buffers */
  662. while (tx_mask) {
  663. if (tx_mask & 0x1) {
  664. work_done = dp_tx_comp_handler(soc,
  665. soc->tx_comp_ring[ring].hal_srng,
  666. remaining_quota);
  667. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  668. "tx mask 0x%x ring %d, budget %d, work_done %d",
  669. tx_mask, ring, budget, work_done);
  670. budget -= work_done;
  671. if (budget <= 0)
  672. goto budget_done;
  673. remaining_quota = budget;
  674. }
  675. tx_mask = tx_mask >> 1;
  676. ring++;
  677. }
  678. /* Process REO Exception ring interrupt */
  679. if (rx_err_mask) {
  680. work_done = dp_rx_err_process(soc,
  681. soc->reo_exception_ring.hal_srng,
  682. remaining_quota);
  683. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  684. "REO Exception Ring: work_done %d budget %d",
  685. work_done, budget);
  686. budget -= work_done;
  687. if (budget <= 0) {
  688. goto budget_done;
  689. }
  690. remaining_quota = budget;
  691. }
  692. /* Process Rx WBM release ring interrupt */
  693. if (rx_wbm_rel_mask) {
  694. work_done = dp_rx_wbm_err_process(soc,
  695. soc->rx_rel_ring.hal_srng, remaining_quota);
  696. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  697. "WBM Release Ring: work_done %d budget %d",
  698. work_done, budget);
  699. budget -= work_done;
  700. if (budget <= 0) {
  701. goto budget_done;
  702. }
  703. remaining_quota = budget;
  704. }
  705. /* Process Rx interrupts */
  706. if (rx_mask) {
  707. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  708. if (rx_mask & (1 << ring)) {
  709. work_done = dp_rx_process(int_ctx,
  710. soc->reo_dest_ring[ring].hal_srng,
  711. remaining_quota);
  712. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  713. "rx mask 0x%x ring %d, work_done %d budget %d",
  714. rx_mask, ring, work_done, budget);
  715. budget -= work_done;
  716. if (budget <= 0)
  717. goto budget_done;
  718. remaining_quota = budget;
  719. }
  720. }
  721. for (ring = 0; ring < MAX_RX_MAC_RINGS; ring++) {
  722. /* Need to check on this, why is required */
  723. work_done = dp_rxdma_err_process(soc, ring,
  724. remaining_quota);
  725. budget -= work_done;
  726. }
  727. }
  728. if (reo_status_mask)
  729. dp_reo_status_ring_handler(soc);
  730. /* Process LMAC interrupts */
  731. for (ring = 0 ; ring < MAX_PDEV_CNT; ring++) {
  732. pdev = soc->pdev_list[ring];
  733. if (pdev == NULL)
  734. continue;
  735. if (int_ctx->rx_mon_ring_mask & (1 << ring)) {
  736. work_done = dp_mon_process(soc, ring, remaining_quota);
  737. budget -= work_done;
  738. if (budget <= 0)
  739. goto budget_done;
  740. remaining_quota = budget;
  741. }
  742. if (int_ctx->rxdma2host_ring_mask & (1 << ring)) {
  743. work_done = dp_rxdma_err_process(soc, ring,
  744. remaining_quota);
  745. budget -= work_done;
  746. if (budget <= 0)
  747. goto budget_done;
  748. remaining_quota = budget;
  749. }
  750. if (int_ctx->host2rxdma_ring_mask & (1 << ring)) {
  751. union dp_rx_desc_list_elem_t *desc_list = NULL;
  752. union dp_rx_desc_list_elem_t *tail = NULL;
  753. struct dp_srng *rx_refill_buf_ring =
  754. &pdev->rx_refill_buf_ring;
  755. DP_STATS_INC(pdev, replenish.low_thresh_intrs, 1);
  756. dp_rx_buffers_replenish(soc, ring,
  757. rx_refill_buf_ring,
  758. &soc->rx_desc_buf[ring], 0,
  759. &desc_list, &tail, HAL_RX_BUF_RBM_SW3_BM);
  760. }
  761. }
  762. qdf_lro_flush(int_ctx->lro_ctx);
  763. budget_done:
  764. return dp_budget - budget;
  765. }
  766. #ifdef DP_INTR_POLL_BASED
  767. /* dp_interrupt_timer()- timer poll for interrupts
  768. *
  769. * @arg: SoC Handle
  770. *
  771. * Return:
  772. *
  773. */
  774. static void dp_interrupt_timer(void *arg)
  775. {
  776. struct dp_soc *soc = (struct dp_soc *) arg;
  777. int i;
  778. if (qdf_atomic_read(&soc->cmn_init_done)) {
  779. for (i = 0;
  780. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  781. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  782. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  783. }
  784. }
  785. /*
  786. * dp_soc_interrupt_attach_poll() - Register handlers for DP interrupts
  787. * @txrx_soc: DP SOC handle
  788. *
  789. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  790. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  791. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  792. *
  793. * Return: 0 for success. nonzero for failure.
  794. */
  795. static QDF_STATUS dp_soc_interrupt_attach_poll(void *txrx_soc)
  796. {
  797. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  798. int i;
  799. soc->intr_mode = DP_INTR_POLL;
  800. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  801. soc->intr_ctx[i].dp_intr_id = i;
  802. soc->intr_ctx[i].tx_ring_mask =
  803. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  804. soc->intr_ctx[i].rx_ring_mask =
  805. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  806. soc->intr_ctx[i].rx_mon_ring_mask =
  807. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  808. soc->intr_ctx[i].rx_err_ring_mask =
  809. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  810. soc->intr_ctx[i].rx_wbm_rel_ring_mask =
  811. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  812. soc->intr_ctx[i].reo_status_ring_mask =
  813. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  814. soc->intr_ctx[i].rxdma2host_ring_mask =
  815. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  816. soc->intr_ctx[i].soc = soc;
  817. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  818. }
  819. qdf_timer_init(soc->osdev, &soc->int_timer,
  820. dp_interrupt_timer, (void *)soc,
  821. QDF_TIMER_TYPE_WAKE_APPS);
  822. return QDF_STATUS_SUCCESS;
  823. }
  824. #if defined(CONFIG_MCL)
  825. extern int con_mode_monitor;
  826. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc);
  827. /*
  828. * dp_soc_interrupt_attach_wrapper() - Register handlers for DP interrupts
  829. * @txrx_soc: DP SOC handle
  830. *
  831. * Call the appropriate attach function based on the mode of operation.
  832. * This is a WAR for enabling monitor mode.
  833. *
  834. * Return: 0 for success. nonzero for failure.
  835. */
  836. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  837. {
  838. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  839. if (!(soc->wlan_cfg_ctx->napi_enabled) ||
  840. con_mode_monitor == QDF_GLOBAL_MONITOR_MODE) {
  841. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  842. "%s: Poll mode", __func__);
  843. return dp_soc_interrupt_attach_poll(txrx_soc);
  844. } else {
  845. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  846. "%s: Interrupt mode", __func__);
  847. return dp_soc_interrupt_attach(txrx_soc);
  848. }
  849. }
  850. #else
  851. static QDF_STATUS dp_soc_interrupt_attach_wrapper(void *txrx_soc)
  852. {
  853. return dp_soc_interrupt_attach_poll(txrx_soc);
  854. }
  855. #endif
  856. #endif
  857. static void dp_soc_interrupt_map_calculate_integrated(struct dp_soc *soc,
  858. int intr_ctx_num, int *irq_id_map, int *num_irq_r)
  859. {
  860. int j;
  861. int num_irq = 0;
  862. int tx_mask =
  863. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  864. int rx_mask =
  865. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  866. int rx_mon_mask =
  867. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, intr_ctx_num);
  868. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  869. soc->wlan_cfg_ctx, intr_ctx_num);
  870. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  871. soc->wlan_cfg_ctx, intr_ctx_num);
  872. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  873. soc->wlan_cfg_ctx, intr_ctx_num);
  874. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  875. soc->wlan_cfg_ctx, intr_ctx_num);
  876. int host2rxdma_ring_mask = wlan_cfg_get_host2rxdma_ring_mask(
  877. soc->wlan_cfg_ctx, intr_ctx_num);
  878. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  879. if (tx_mask & (1 << j)) {
  880. irq_id_map[num_irq++] =
  881. (wbm2host_tx_completions_ring1 - j);
  882. }
  883. if (rx_mask & (1 << j)) {
  884. irq_id_map[num_irq++] =
  885. (reo2host_destination_ring1 - j);
  886. }
  887. if (rxdma2host_ring_mask & (1 << j)) {
  888. irq_id_map[num_irq++] =
  889. rxdma2host_destination_ring_mac1 -
  890. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  891. }
  892. if (host2rxdma_ring_mask & (1 << j)) {
  893. irq_id_map[num_irq++] =
  894. host2rxdma_host_buf_ring_mac1 -
  895. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  896. }
  897. if (rx_mon_mask & (1 << j)) {
  898. irq_id_map[num_irq++] =
  899. ppdu_end_interrupts_mac1 -
  900. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  901. irq_id_map[num_irq++] =
  902. rxdma2host_monitor_status_ring_mac1 -
  903. wlan_cfg_get_hw_mac_idx(soc->wlan_cfg_ctx, j);
  904. }
  905. if (rx_wbm_rel_ring_mask & (1 << j))
  906. irq_id_map[num_irq++] = wbm2host_rx_release;
  907. if (rx_err_ring_mask & (1 << j))
  908. irq_id_map[num_irq++] = reo2host_exception;
  909. if (reo_status_ring_mask & (1 << j))
  910. irq_id_map[num_irq++] = reo2host_status;
  911. }
  912. *num_irq_r = num_irq;
  913. }
  914. static void dp_soc_interrupt_map_calculate_msi(struct dp_soc *soc,
  915. int intr_ctx_num, int *irq_id_map, int *num_irq_r,
  916. int msi_vector_count, int msi_vector_start)
  917. {
  918. int tx_mask = wlan_cfg_get_tx_ring_mask(
  919. soc->wlan_cfg_ctx, intr_ctx_num);
  920. int rx_mask = wlan_cfg_get_rx_ring_mask(
  921. soc->wlan_cfg_ctx, intr_ctx_num);
  922. int rx_mon_mask = wlan_cfg_get_rx_mon_ring_mask(
  923. soc->wlan_cfg_ctx, intr_ctx_num);
  924. int rx_err_ring_mask = wlan_cfg_get_rx_err_ring_mask(
  925. soc->wlan_cfg_ctx, intr_ctx_num);
  926. int rx_wbm_rel_ring_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  927. soc->wlan_cfg_ctx, intr_ctx_num);
  928. int reo_status_ring_mask = wlan_cfg_get_reo_status_ring_mask(
  929. soc->wlan_cfg_ctx, intr_ctx_num);
  930. int rxdma2host_ring_mask = wlan_cfg_get_rxdma2host_ring_mask(
  931. soc->wlan_cfg_ctx, intr_ctx_num);
  932. unsigned int vector =
  933. (intr_ctx_num % msi_vector_count) + msi_vector_start;
  934. int num_irq = 0;
  935. soc->intr_mode = DP_INTR_MSI;
  936. if (tx_mask | rx_mask | rx_mon_mask | rx_err_ring_mask |
  937. rx_wbm_rel_ring_mask | reo_status_ring_mask | rxdma2host_ring_mask)
  938. irq_id_map[num_irq++] =
  939. pld_get_msi_irq(soc->osdev->dev, vector);
  940. *num_irq_r = num_irq;
  941. }
  942. static void dp_soc_interrupt_map_calculate(struct dp_soc *soc, int intr_ctx_num,
  943. int *irq_id_map, int *num_irq)
  944. {
  945. int msi_vector_count, ret;
  946. uint32_t msi_base_data, msi_vector_start;
  947. ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
  948. &msi_vector_count,
  949. &msi_base_data,
  950. &msi_vector_start);
  951. if (ret)
  952. return dp_soc_interrupt_map_calculate_integrated(soc,
  953. intr_ctx_num, irq_id_map, num_irq);
  954. else
  955. dp_soc_interrupt_map_calculate_msi(soc,
  956. intr_ctx_num, irq_id_map, num_irq,
  957. msi_vector_count, msi_vector_start);
  958. }
  959. /*
  960. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  961. * @txrx_soc: DP SOC handle
  962. *
  963. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  964. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  965. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  966. *
  967. * Return: 0 for success. nonzero for failure.
  968. */
  969. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  970. {
  971. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  972. int i = 0;
  973. int num_irq = 0;
  974. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  975. int ret = 0;
  976. /* Map of IRQ ids registered with one interrupt context */
  977. int irq_id_map[HIF_MAX_GRP_IRQ];
  978. int tx_mask =
  979. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  980. int rx_mask =
  981. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  982. int rx_mon_mask =
  983. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  984. int rx_err_ring_mask =
  985. wlan_cfg_get_rx_err_ring_mask(soc->wlan_cfg_ctx, i);
  986. int rx_wbm_rel_ring_mask =
  987. wlan_cfg_get_rx_wbm_rel_ring_mask(soc->wlan_cfg_ctx, i);
  988. int reo_status_ring_mask =
  989. wlan_cfg_get_reo_status_ring_mask(soc->wlan_cfg_ctx, i);
  990. int rxdma2host_ring_mask =
  991. wlan_cfg_get_rxdma2host_ring_mask(soc->wlan_cfg_ctx, i);
  992. int host2rxdma_ring_mask =
  993. wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx, i);
  994. soc->intr_ctx[i].dp_intr_id = i;
  995. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  996. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  997. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  998. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask;
  999. soc->intr_ctx[i].rxdma2host_ring_mask = rxdma2host_ring_mask;
  1000. soc->intr_ctx[i].host2rxdma_ring_mask = host2rxdma_ring_mask;
  1001. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask;
  1002. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask;
  1003. soc->intr_ctx[i].soc = soc;
  1004. num_irq = 0;
  1005. dp_soc_interrupt_map_calculate(soc, i, &irq_id_map[0],
  1006. &num_irq);
  1007. ret = hif_register_ext_group(soc->hif_handle,
  1008. num_irq, irq_id_map, dp_service_srngs,
  1009. &soc->intr_ctx[i], "dp_intr",
  1010. HIF_EXEC_NAPI_TYPE, QCA_NAPI_DEF_SCALE_BIN_SHIFT);
  1011. if (ret) {
  1012. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1013. FL("failed, ret = %d"), ret);
  1014. return QDF_STATUS_E_FAILURE;
  1015. }
  1016. soc->intr_ctx[i].lro_ctx = qdf_lro_init();
  1017. }
  1018. hif_configure_ext_group_interrupts(soc->hif_handle);
  1019. return QDF_STATUS_SUCCESS;
  1020. }
  1021. /*
  1022. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  1023. * @txrx_soc: DP SOC handle
  1024. *
  1025. * Return: void
  1026. */
  1027. static void dp_soc_interrupt_detach(void *txrx_soc)
  1028. {
  1029. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1030. int i;
  1031. if (soc->intr_mode == DP_INTR_POLL) {
  1032. qdf_timer_stop(&soc->int_timer);
  1033. qdf_timer_free(&soc->int_timer);
  1034. } else {
  1035. hif_deregister_exec_group(soc->hif_handle, "dp_intr");
  1036. }
  1037. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  1038. soc->intr_ctx[i].tx_ring_mask = 0;
  1039. soc->intr_ctx[i].rx_ring_mask = 0;
  1040. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  1041. soc->intr_ctx[i].rx_err_ring_mask = 0;
  1042. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  1043. soc->intr_ctx[i].reo_status_ring_mask = 0;
  1044. soc->intr_ctx[i].rxdma2host_ring_mask = 0;
  1045. soc->intr_ctx[i].host2rxdma_ring_mask = 0;
  1046. qdf_lro_deinit(soc->intr_ctx[i].lro_ctx);
  1047. }
  1048. }
  1049. #define AVG_MAX_MPDUS_PER_TID 128
  1050. #define AVG_TIDS_PER_CLIENT 2
  1051. #define AVG_FLOWS_PER_TID 2
  1052. #define AVG_MSDUS_PER_FLOW 128
  1053. #define AVG_MSDUS_PER_MPDU 4
  1054. /*
  1055. * Allocate and setup link descriptor pool that will be used by HW for
  1056. * various link and queue descriptors and managed by WBM
  1057. */
  1058. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  1059. {
  1060. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1061. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1062. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  1063. uint32_t num_mpdus_per_link_desc =
  1064. hal_num_mpdus_per_link_desc(soc->hal_soc);
  1065. uint32_t num_msdus_per_link_desc =
  1066. hal_num_msdus_per_link_desc(soc->hal_soc);
  1067. uint32_t num_mpdu_links_per_queue_desc =
  1068. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  1069. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1070. uint32_t total_link_descs, total_mem_size;
  1071. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  1072. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  1073. uint32_t num_link_desc_banks;
  1074. uint32_t last_bank_size = 0;
  1075. uint32_t entry_size, num_entries;
  1076. int i;
  1077. uint32_t desc_id = 0;
  1078. /* Only Tx queue descriptors are allocated from common link descriptor
  1079. * pool Rx queue descriptors are not included in this because (REO queue
  1080. * extension descriptors) they are expected to be allocated contiguously
  1081. * with REO queue descriptors
  1082. */
  1083. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1084. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  1085. num_mpdu_queue_descs = num_mpdu_link_descs /
  1086. num_mpdu_links_per_queue_desc;
  1087. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1088. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  1089. num_msdus_per_link_desc;
  1090. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  1091. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  1092. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  1093. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  1094. /* Round up to power of 2 */
  1095. total_link_descs = 1;
  1096. while (total_link_descs < num_entries)
  1097. total_link_descs <<= 1;
  1098. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1099. FL("total_link_descs: %u, link_desc_size: %d"),
  1100. total_link_descs, link_desc_size);
  1101. total_mem_size = total_link_descs * link_desc_size;
  1102. total_mem_size += link_desc_align;
  1103. if (total_mem_size <= max_alloc_size) {
  1104. num_link_desc_banks = 0;
  1105. last_bank_size = total_mem_size;
  1106. } else {
  1107. num_link_desc_banks = (total_mem_size) /
  1108. (max_alloc_size - link_desc_align);
  1109. last_bank_size = total_mem_size %
  1110. (max_alloc_size - link_desc_align);
  1111. }
  1112. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1113. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  1114. total_mem_size, num_link_desc_banks);
  1115. for (i = 0; i < num_link_desc_banks; i++) {
  1116. soc->link_desc_banks[i].base_vaddr_unaligned =
  1117. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1118. max_alloc_size,
  1119. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1120. soc->link_desc_banks[i].size = max_alloc_size;
  1121. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  1122. soc->link_desc_banks[i].base_vaddr_unaligned) +
  1123. ((unsigned long)(
  1124. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1125. link_desc_align));
  1126. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  1127. soc->link_desc_banks[i].base_paddr_unaligned) +
  1128. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1129. (unsigned long)(
  1130. soc->link_desc_banks[i].base_vaddr_unaligned));
  1131. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  1132. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1133. FL("Link descriptor memory alloc failed"));
  1134. goto fail;
  1135. }
  1136. }
  1137. if (last_bank_size) {
  1138. /* Allocate last bank in case total memory required is not exact
  1139. * multiple of max_alloc_size
  1140. */
  1141. soc->link_desc_banks[i].base_vaddr_unaligned =
  1142. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1143. last_bank_size,
  1144. &(soc->link_desc_banks[i].base_paddr_unaligned));
  1145. soc->link_desc_banks[i].size = last_bank_size;
  1146. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  1147. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  1148. ((unsigned long)(
  1149. soc->link_desc_banks[i].base_vaddr_unaligned) %
  1150. link_desc_align));
  1151. soc->link_desc_banks[i].base_paddr =
  1152. (unsigned long)(
  1153. soc->link_desc_banks[i].base_paddr_unaligned) +
  1154. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  1155. (unsigned long)(
  1156. soc->link_desc_banks[i].base_vaddr_unaligned));
  1157. }
  1158. /* Allocate and setup link descriptor idle list for HW internal use */
  1159. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  1160. total_mem_size = entry_size * total_link_descs;
  1161. if (total_mem_size <= max_alloc_size) {
  1162. void *desc;
  1163. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  1164. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  1165. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1166. FL("Link desc idle ring setup failed"));
  1167. goto fail;
  1168. }
  1169. hal_srng_access_start_unlocked(soc->hal_soc,
  1170. soc->wbm_idle_link_ring.hal_srng);
  1171. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1172. soc->link_desc_banks[i].base_paddr; i++) {
  1173. uint32_t num_entries = (soc->link_desc_banks[i].size -
  1174. ((unsigned long)(
  1175. soc->link_desc_banks[i].base_vaddr) -
  1176. (unsigned long)(
  1177. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1178. / link_desc_size;
  1179. unsigned long paddr = (unsigned long)(
  1180. soc->link_desc_banks[i].base_paddr);
  1181. while (num_entries && (desc = hal_srng_src_get_next(
  1182. soc->hal_soc,
  1183. soc->wbm_idle_link_ring.hal_srng))) {
  1184. hal_set_link_desc_addr(desc,
  1185. LINK_DESC_COOKIE(desc_id, i), paddr);
  1186. num_entries--;
  1187. desc_id++;
  1188. paddr += link_desc_size;
  1189. }
  1190. }
  1191. hal_srng_access_end_unlocked(soc->hal_soc,
  1192. soc->wbm_idle_link_ring.hal_srng);
  1193. } else {
  1194. uint32_t num_scatter_bufs;
  1195. uint32_t num_entries_per_buf;
  1196. uint32_t rem_entries;
  1197. uint8_t *scatter_buf_ptr;
  1198. uint16_t scatter_buf_num;
  1199. soc->wbm_idle_scatter_buf_size =
  1200. hal_idle_list_scatter_buf_size(soc->hal_soc);
  1201. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  1202. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  1203. num_scatter_bufs = hal_idle_list_num_scatter_bufs(
  1204. soc->hal_soc, total_mem_size,
  1205. soc->wbm_idle_scatter_buf_size);
  1206. for (i = 0; i < num_scatter_bufs; i++) {
  1207. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  1208. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  1209. soc->wbm_idle_scatter_buf_size,
  1210. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  1211. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  1212. QDF_TRACE(QDF_MODULE_ID_DP,
  1213. QDF_TRACE_LEVEL_ERROR,
  1214. FL("Scatter list memory alloc failed"));
  1215. goto fail;
  1216. }
  1217. }
  1218. /* Populate idle list scatter buffers with link descriptor
  1219. * pointers
  1220. */
  1221. scatter_buf_num = 0;
  1222. scatter_buf_ptr = (uint8_t *)(
  1223. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  1224. rem_entries = num_entries_per_buf;
  1225. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  1226. soc->link_desc_banks[i].base_paddr; i++) {
  1227. uint32_t num_link_descs =
  1228. (soc->link_desc_banks[i].size -
  1229. ((unsigned long)(
  1230. soc->link_desc_banks[i].base_vaddr) -
  1231. (unsigned long)(
  1232. soc->link_desc_banks[i].base_vaddr_unaligned)))
  1233. / link_desc_size;
  1234. unsigned long paddr = (unsigned long)(
  1235. soc->link_desc_banks[i].base_paddr);
  1236. while (num_link_descs) {
  1237. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  1238. LINK_DESC_COOKIE(desc_id, i), paddr);
  1239. num_link_descs--;
  1240. desc_id++;
  1241. paddr += link_desc_size;
  1242. rem_entries--;
  1243. if (rem_entries) {
  1244. scatter_buf_ptr += entry_size;
  1245. } else {
  1246. rem_entries = num_entries_per_buf;
  1247. scatter_buf_num++;
  1248. if (scatter_buf_num >= num_scatter_bufs)
  1249. break;
  1250. scatter_buf_ptr = (uint8_t *)(
  1251. soc->wbm_idle_scatter_buf_base_vaddr[
  1252. scatter_buf_num]);
  1253. }
  1254. }
  1255. }
  1256. /* Setup link descriptor idle list in HW */
  1257. hal_setup_link_idle_list(soc->hal_soc,
  1258. soc->wbm_idle_scatter_buf_base_paddr,
  1259. soc->wbm_idle_scatter_buf_base_vaddr,
  1260. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  1261. (uint32_t)(scatter_buf_ptr -
  1262. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  1263. scatter_buf_num-1])), total_link_descs);
  1264. }
  1265. return 0;
  1266. fail:
  1267. if (soc->wbm_idle_link_ring.hal_srng) {
  1268. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  1269. WBM_IDLE_LINK, 0);
  1270. }
  1271. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1272. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1273. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1274. soc->wbm_idle_scatter_buf_size,
  1275. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1276. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1277. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1278. }
  1279. }
  1280. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1281. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1282. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1283. soc->link_desc_banks[i].size,
  1284. soc->link_desc_banks[i].base_vaddr_unaligned,
  1285. soc->link_desc_banks[i].base_paddr_unaligned,
  1286. 0);
  1287. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1288. }
  1289. }
  1290. return QDF_STATUS_E_FAILURE;
  1291. }
  1292. /*
  1293. * Free link descriptor pool that was setup HW
  1294. */
  1295. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  1296. {
  1297. int i;
  1298. if (soc->wbm_idle_link_ring.hal_srng) {
  1299. dp_srng_cleanup(soc, &soc->wbm_idle_link_ring,
  1300. WBM_IDLE_LINK, 0);
  1301. }
  1302. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  1303. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  1304. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1305. soc->wbm_idle_scatter_buf_size,
  1306. soc->wbm_idle_scatter_buf_base_vaddr[i],
  1307. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  1308. soc->wbm_idle_scatter_buf_base_vaddr[i] = NULL;
  1309. }
  1310. }
  1311. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  1312. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  1313. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1314. soc->link_desc_banks[i].size,
  1315. soc->link_desc_banks[i].base_vaddr_unaligned,
  1316. soc->link_desc_banks[i].base_paddr_unaligned,
  1317. 0);
  1318. soc->link_desc_banks[i].base_vaddr_unaligned = NULL;
  1319. }
  1320. }
  1321. }
  1322. /* TODO: Following should be configurable */
  1323. #define WBM_RELEASE_RING_SIZE 64
  1324. #define TCL_CMD_RING_SIZE 32
  1325. #define TCL_STATUS_RING_SIZE 32
  1326. #if defined(QCA_WIFI_QCA6290)
  1327. #define REO_DST_RING_SIZE 1024
  1328. #else
  1329. #define REO_DST_RING_SIZE 2048
  1330. #endif
  1331. #define REO_REINJECT_RING_SIZE 32
  1332. #define RX_RELEASE_RING_SIZE 1024
  1333. #define REO_EXCEPTION_RING_SIZE 128
  1334. #define REO_CMD_RING_SIZE 64
  1335. #define REO_STATUS_RING_SIZE 128
  1336. #define RXDMA_BUF_RING_SIZE 1024
  1337. #define RXDMA_REFILL_RING_SIZE 4096
  1338. #define RXDMA_MONITOR_BUF_RING_SIZE 4096
  1339. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  1340. #define RXDMA_MONITOR_STATUS_RING_SIZE 1024
  1341. #define RXDMA_MONITOR_DESC_RING_SIZE 4096
  1342. #define RXDMA_ERR_DST_RING_SIZE 1024
  1343. /*
  1344. * dp_wds_aging_timer_fn() - Timer callback function for WDS aging
  1345. * @soc: Datapath SOC handle
  1346. *
  1347. * This is a timer function used to age out stale WDS nodes from
  1348. * AST table
  1349. */
  1350. #ifdef FEATURE_WDS
  1351. static void dp_wds_aging_timer_fn(void *soc_hdl)
  1352. {
  1353. struct dp_soc *soc = (struct dp_soc *) soc_hdl;
  1354. struct dp_pdev *pdev;
  1355. struct dp_vdev *vdev;
  1356. struct dp_peer *peer;
  1357. struct dp_ast_entry *ase, *temp_ase;
  1358. int i;
  1359. qdf_spin_lock_bh(&soc->ast_lock);
  1360. for (i = 0; i < MAX_PDEV_CNT && soc->pdev_list[i]; i++) {
  1361. pdev = soc->pdev_list[i];
  1362. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1363. DP_VDEV_ITERATE_PEER_LIST(vdev, peer) {
  1364. DP_PEER_ITERATE_ASE_LIST(peer, ase, temp_ase) {
  1365. /*
  1366. * Do not expire static ast entries
  1367. * and HM WDS entries
  1368. */
  1369. if (ase->type ==
  1370. CDP_TXRX_AST_TYPE_STATIC ||
  1371. ase->type ==
  1372. CDP_TXRX_AST_TYPE_WDS_HM)
  1373. continue;
  1374. if (ase->is_active) {
  1375. ase->is_active = FALSE;
  1376. continue;
  1377. }
  1378. DP_STATS_INC(soc, ast.aged_out, 1);
  1379. dp_peer_del_ast(soc, ase);
  1380. }
  1381. }
  1382. }
  1383. }
  1384. qdf_spin_unlock_bh(&soc->ast_lock);
  1385. if (qdf_atomic_read(&soc->cmn_init_done))
  1386. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1387. }
  1388. /*
  1389. * dp_soc_wds_attach() - Setup WDS timer and AST table
  1390. * @soc: Datapath SOC handle
  1391. *
  1392. * Return: None
  1393. */
  1394. static void dp_soc_wds_attach(struct dp_soc *soc)
  1395. {
  1396. qdf_timer_init(soc->osdev, &soc->wds_aging_timer,
  1397. dp_wds_aging_timer_fn, (void *)soc,
  1398. QDF_TIMER_TYPE_WAKE_APPS);
  1399. qdf_timer_mod(&soc->wds_aging_timer, DP_WDS_AGING_TIMER_DEFAULT_MS);
  1400. }
  1401. /*
  1402. * dp_soc_wds_detach() - Detach WDS data structures and timers
  1403. * @txrx_soc: DP SOC handle
  1404. *
  1405. * Return: None
  1406. */
  1407. static void dp_soc_wds_detach(struct dp_soc *soc)
  1408. {
  1409. qdf_timer_stop(&soc->wds_aging_timer);
  1410. qdf_timer_free(&soc->wds_aging_timer);
  1411. }
  1412. #else
  1413. static void dp_soc_wds_attach(struct dp_soc *soc)
  1414. {
  1415. }
  1416. static void dp_soc_wds_detach(struct dp_soc *soc)
  1417. {
  1418. }
  1419. #endif
  1420. /*
  1421. * dp_soc_reset_ring_map() - Reset cpu ring map
  1422. * @soc: Datapath soc handler
  1423. *
  1424. * This api resets the default cpu ring map
  1425. */
  1426. static void dp_soc_reset_cpu_ring_map(struct dp_soc *soc)
  1427. {
  1428. uint8_t i;
  1429. int nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1430. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  1431. if (nss_config == 1) {
  1432. /*
  1433. * Setting Tx ring map for one nss offloaded radio
  1434. */
  1435. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_FIRST_RADIO_OFFLOADED_MAP][i];
  1436. } else if (nss_config == 2) {
  1437. /*
  1438. * Setting Tx ring for two nss offloaded radios
  1439. */
  1440. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_SECOND_RADIO_OFFLOADED_MAP][i];
  1441. } else {
  1442. /*
  1443. * Setting Tx ring map for all nss offloaded radios
  1444. */
  1445. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_NSS_ALL_RADIO_OFFLOADED_MAP][i];
  1446. }
  1447. }
  1448. }
  1449. /*
  1450. * dp_soc_ring_if_nss_offloaded() - find if ring is offloaded to NSS
  1451. * @dp_soc - DP soc handle
  1452. * @ring_type - ring type
  1453. * @ring_num - ring_num
  1454. *
  1455. * return 0 or 1
  1456. */
  1457. static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_type ring_type, int ring_num)
  1458. {
  1459. uint8_t nss_config = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1460. uint8_t status = 0;
  1461. switch (ring_type) {
  1462. case WBM2SW_RELEASE:
  1463. case REO_DST:
  1464. case RXDMA_BUF:
  1465. status = ((nss_config) & (1 << ring_num));
  1466. break;
  1467. default:
  1468. break;
  1469. }
  1470. return status;
  1471. }
  1472. /*
  1473. * dp_soc_reset_intr_mask() - reset interrupt mask
  1474. * @dp_soc - DP Soc handle
  1475. *
  1476. * Return: Return void
  1477. */
  1478. static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  1479. {
  1480. uint8_t j;
  1481. int *grp_mask = NULL;
  1482. int group_number, mask, num_ring;
  1483. /* number of tx ring */
  1484. num_ring = wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1485. /*
  1486. * group mask for tx completion ring.
  1487. */
  1488. grp_mask = &soc->wlan_cfg_ctx->int_tx_ring_mask[0];
  1489. /* loop and reset the mask for only offloaded ring */
  1490. for (j = 0; j < num_ring; j++) {
  1491. if (!dp_soc_ring_if_nss_offloaded(soc, WBM2SW_RELEASE, j)) {
  1492. continue;
  1493. }
  1494. /*
  1495. * Group number corresponding to tx offloaded ring.
  1496. */
  1497. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1498. if (group_number < 0) {
  1499. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1500. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1501. WBM2SW_RELEASE, j);
  1502. return;
  1503. }
  1504. /* reset the tx mask for offloaded ring */
  1505. mask = wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1506. mask &= (~(1 << j));
  1507. /*
  1508. * reset the interrupt mask for offloaded ring.
  1509. */
  1510. wlan_cfg_set_tx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1511. }
  1512. /* number of rx rings */
  1513. num_ring = wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1514. /*
  1515. * group mask for reo destination ring.
  1516. */
  1517. grp_mask = &soc->wlan_cfg_ctx->int_rx_ring_mask[0];
  1518. /* loop and reset the mask for only offloaded ring */
  1519. for (j = 0; j < num_ring; j++) {
  1520. if (!dp_soc_ring_if_nss_offloaded(soc, REO_DST, j)) {
  1521. continue;
  1522. }
  1523. /*
  1524. * Group number corresponding to rx offloaded ring.
  1525. */
  1526. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1527. if (group_number < 0) {
  1528. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1529. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1530. REO_DST, j);
  1531. return;
  1532. }
  1533. /* set the interrupt mask for offloaded ring */
  1534. mask = wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, group_number);
  1535. mask &= (~(1 << j));
  1536. /*
  1537. * set the interrupt mask to zero for rx offloaded radio.
  1538. */
  1539. wlan_cfg_set_rx_ring_mask(soc->wlan_cfg_ctx, group_number, mask);
  1540. }
  1541. /*
  1542. * group mask for Rx buffer refill ring
  1543. */
  1544. grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
  1545. /* loop and reset the mask for only offloaded ring */
  1546. for (j = 0; j < MAX_PDEV_CNT; j++) {
  1547. if (!dp_soc_ring_if_nss_offloaded(soc, RXDMA_BUF, j)) {
  1548. continue;
  1549. }
  1550. /*
  1551. * Group number corresponding to rx offloaded ring.
  1552. */
  1553. group_number = dp_srng_find_ring_in_mask(j, grp_mask);
  1554. if (group_number < 0) {
  1555. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  1556. FL("ring not part of any group; ring_type: %d,ring_num %d"),
  1557. REO_DST, j);
  1558. return;
  1559. }
  1560. /* set the interrupt mask for offloaded ring */
  1561. mask = wlan_cfg_get_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1562. group_number);
  1563. mask &= (~(1 << j));
  1564. /*
  1565. * set the interrupt mask to zero for rx offloaded radio.
  1566. */
  1567. wlan_cfg_set_host2rxdma_ring_mask(soc->wlan_cfg_ctx,
  1568. group_number, mask);
  1569. }
  1570. }
  1571. #ifdef IPA_OFFLOAD
  1572. /**
  1573. * dp_reo_remap_config() - configure reo remap register value based
  1574. * nss configuration.
  1575. * based on offload_radio value below remap configuration
  1576. * get applied.
  1577. * 0 - both Radios handled by host (remap rings 1, 2, 3 & 4)
  1578. * 1 - 1st Radio handled by NSS (remap rings 2, 3 & 4)
  1579. * 2 - 2nd Radio handled by NSS (remap rings 1, 2 & 4)
  1580. * 3 - both Radios handled by NSS (remap not required)
  1581. * 4 - IPA OFFLOAD enabled (remap rings 1,2 & 3)
  1582. *
  1583. * @remap1: output parameter indicates reo remap 1 register value
  1584. * @remap2: output parameter indicates reo remap 2 register value
  1585. * Return: bool type, true if remap is configured else false.
  1586. */
  1587. static bool dp_reo_remap_config(struct dp_soc *soc,
  1588. uint32_t *remap1,
  1589. uint32_t *remap2)
  1590. {
  1591. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
  1592. (0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
  1593. *remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
  1594. (0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
  1595. return true;
  1596. }
  1597. #else
  1598. static bool dp_reo_remap_config(struct dp_soc *soc,
  1599. uint32_t *remap1,
  1600. uint32_t *remap2)
  1601. {
  1602. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1603. switch (offload_radio) {
  1604. case 0:
  1605. *remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1606. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1607. (0x3 << 18) | (0x4 << 21)) << 8;
  1608. *remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
  1609. (0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
  1610. (0x3 << 18) | (0x4 << 21)) << 8;
  1611. break;
  1612. case 1:
  1613. *remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
  1614. (0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
  1615. (0x2 << 18) | (0x3 << 21)) << 8;
  1616. *remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
  1617. (0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
  1618. (0x4 << 18) | (0x2 << 21)) << 8;
  1619. break;
  1620. case 2:
  1621. *remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
  1622. (0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
  1623. (0x1 << 18) | (0x3 << 21)) << 8;
  1624. *remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
  1625. (0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
  1626. (0x4 << 18) | (0x1 << 21)) << 8;
  1627. break;
  1628. case 3:
  1629. /* return false if both radios are offloaded to NSS */
  1630. return false;
  1631. }
  1632. return true;
  1633. }
  1634. #endif
  1635. /*
  1636. * dp_reo_frag_dst_set() - configure reo register to set the
  1637. * fragment destination ring
  1638. * @soc : Datapath soc
  1639. * @frag_dst_ring : output parameter to set fragment destination ring
  1640. *
  1641. * Based on offload_radio below fragment destination rings is selected
  1642. * 0 - TCL
  1643. * 1 - SW1
  1644. * 2 - SW2
  1645. * 3 - SW3
  1646. * 4 - SW4
  1647. * 5 - Release
  1648. * 6 - FW
  1649. * 7 - alternate select
  1650. *
  1651. * return: void
  1652. */
  1653. static void dp_reo_frag_dst_set(struct dp_soc *soc, uint8_t *frag_dst_ring)
  1654. {
  1655. uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
  1656. switch (offload_radio) {
  1657. case 0:
  1658. *frag_dst_ring = HAL_SRNG_REO_EXCEPTION;
  1659. break;
  1660. case 3:
  1661. *frag_dst_ring = HAL_SRNG_REO_ALTERNATE_SELECT;
  1662. break;
  1663. default:
  1664. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1665. FL("dp_reo_frag_dst_set invalid offload radio config"));
  1666. break;
  1667. }
  1668. }
  1669. /*
  1670. * dp_soc_cmn_setup() - Common SoC level initializion
  1671. * @soc: Datapath SOC handle
  1672. *
  1673. * This is an internal function used to setup common SOC data structures,
  1674. * to be called from PDEV attach after receiving HW mode capabilities from FW
  1675. */
  1676. static int dp_soc_cmn_setup(struct dp_soc *soc)
  1677. {
  1678. int i;
  1679. struct hal_reo_params reo_params;
  1680. int tx_ring_size;
  1681. int tx_comp_ring_size;
  1682. if (qdf_atomic_read(&soc->cmn_init_done))
  1683. return 0;
  1684. if (dp_peer_find_attach(soc))
  1685. goto fail0;
  1686. if (dp_hw_link_desc_pool_setup(soc))
  1687. goto fail1;
  1688. /* Setup SRNG rings */
  1689. /* Common rings */
  1690. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  1691. WBM_RELEASE_RING_SIZE)) {
  1692. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1693. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  1694. goto fail1;
  1695. }
  1696. soc->num_tcl_data_rings = 0;
  1697. /* Tx data rings */
  1698. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1699. soc->num_tcl_data_rings =
  1700. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  1701. tx_comp_ring_size =
  1702. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  1703. tx_ring_size =
  1704. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  1705. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1706. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  1707. TCL_DATA, i, 0, tx_ring_size)) {
  1708. QDF_TRACE(QDF_MODULE_ID_DP,
  1709. QDF_TRACE_LEVEL_ERROR,
  1710. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  1711. goto fail1;
  1712. }
  1713. /*
  1714. * TBD: Set IPA WBM ring size with ini IPA UC tx buffer
  1715. * count
  1716. */
  1717. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  1718. WBM2SW_RELEASE, i, 0, tx_comp_ring_size)) {
  1719. QDF_TRACE(QDF_MODULE_ID_DP,
  1720. QDF_TRACE_LEVEL_ERROR,
  1721. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  1722. goto fail1;
  1723. }
  1724. }
  1725. } else {
  1726. /* This will be incremented during per pdev ring setup */
  1727. soc->num_tcl_data_rings = 0;
  1728. }
  1729. if (dp_tx_soc_attach(soc)) {
  1730. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1731. FL("dp_tx_soc_attach failed"));
  1732. goto fail1;
  1733. }
  1734. /* TCL command and status rings */
  1735. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  1736. TCL_CMD_RING_SIZE)) {
  1737. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1738. FL("dp_srng_setup failed for tcl_cmd_ring"));
  1739. goto fail1;
  1740. }
  1741. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  1742. TCL_STATUS_RING_SIZE)) {
  1743. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1744. FL("dp_srng_setup failed for tcl_status_ring"));
  1745. goto fail1;
  1746. }
  1747. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  1748. * descriptors
  1749. */
  1750. /* Rx data rings */
  1751. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1752. soc->num_reo_dest_rings =
  1753. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1754. QDF_TRACE(QDF_MODULE_ID_DP,
  1755. QDF_TRACE_LEVEL_ERROR,
  1756. FL("num_reo_dest_rings %d\n"), soc->num_reo_dest_rings);
  1757. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1758. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  1759. i, 0, REO_DST_RING_SIZE)) {
  1760. QDF_TRACE(QDF_MODULE_ID_DP,
  1761. QDF_TRACE_LEVEL_ERROR,
  1762. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  1763. goto fail1;
  1764. }
  1765. }
  1766. } else {
  1767. /* This will be incremented during per pdev ring setup */
  1768. soc->num_reo_dest_rings = 0;
  1769. }
  1770. /* LMAC RxDMA to SW Rings configuration */
  1771. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  1772. /* Only valid for MCL */
  1773. struct dp_pdev *pdev = soc->pdev_list[0];
  1774. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  1775. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[i],
  1776. RXDMA_DST, 0, i, RXDMA_ERR_DST_RING_SIZE)) {
  1777. QDF_TRACE(QDF_MODULE_ID_DP,
  1778. QDF_TRACE_LEVEL_ERROR,
  1779. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  1780. goto fail1;
  1781. }
  1782. }
  1783. }
  1784. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  1785. /* REO reinjection ring */
  1786. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  1787. REO_REINJECT_RING_SIZE)) {
  1788. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1789. FL("dp_srng_setup failed for reo_reinject_ring"));
  1790. goto fail1;
  1791. }
  1792. /* Rx release ring */
  1793. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  1794. RX_RELEASE_RING_SIZE)) {
  1795. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1796. FL("dp_srng_setup failed for rx_rel_ring"));
  1797. goto fail1;
  1798. }
  1799. /* Rx exception ring */
  1800. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  1801. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  1802. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1803. FL("dp_srng_setup failed for reo_exception_ring"));
  1804. goto fail1;
  1805. }
  1806. /* REO command and status rings */
  1807. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  1808. REO_CMD_RING_SIZE)) {
  1809. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1810. FL("dp_srng_setup failed for reo_cmd_ring"));
  1811. goto fail1;
  1812. }
  1813. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  1814. TAILQ_INIT(&soc->rx.reo_cmd_list);
  1815. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  1816. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  1817. REO_STATUS_RING_SIZE)) {
  1818. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1819. FL("dp_srng_setup failed for reo_status_ring"));
  1820. goto fail1;
  1821. }
  1822. qdf_spinlock_create(&soc->ast_lock);
  1823. dp_soc_wds_attach(soc);
  1824. /* Reset the cpu ring map if radio is NSS offloaded */
  1825. if (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx)) {
  1826. dp_soc_reset_cpu_ring_map(soc);
  1827. dp_soc_reset_intr_mask(soc);
  1828. }
  1829. /* Setup HW REO */
  1830. qdf_mem_zero(&reo_params, sizeof(reo_params));
  1831. if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1832. /*
  1833. * Reo ring remap is not required if both radios
  1834. * are offloaded to NSS
  1835. */
  1836. if (!dp_reo_remap_config(soc,
  1837. &reo_params.remap1,
  1838. &reo_params.remap2))
  1839. goto out;
  1840. reo_params.rx_hash_enabled = true;
  1841. }
  1842. /* setup the global rx defrag waitlist */
  1843. TAILQ_INIT(&soc->rx.defrag.waitlist);
  1844. soc->rx.defrag.timeout_ms =
  1845. wlan_cfg_get_rx_defrag_min_timeout(soc->wlan_cfg_ctx);
  1846. soc->rx.flags.defrag_timeout_check =
  1847. wlan_cfg_get_defrag_timeout_check(soc->wlan_cfg_ctx);
  1848. out:
  1849. /*
  1850. * set the fragment destination ring
  1851. */
  1852. dp_reo_frag_dst_set(soc, &reo_params.frag_dst_ring);
  1853. hal_reo_setup(soc->hal_soc, &reo_params);
  1854. qdf_atomic_set(&soc->cmn_init_done, 1);
  1855. qdf_nbuf_queue_init(&soc->htt_stats.msg);
  1856. return 0;
  1857. fail1:
  1858. /*
  1859. * Cleanup will be done as part of soc_detach, which will
  1860. * be called on pdev attach failure
  1861. */
  1862. fail0:
  1863. return QDF_STATUS_E_FAILURE;
  1864. }
  1865. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  1866. static void dp_lro_hash_setup(struct dp_soc *soc)
  1867. {
  1868. struct cdp_lro_hash_config lro_hash;
  1869. if (!wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  1870. !wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
  1871. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1872. FL("LRO disabled RX hash disabled"));
  1873. return;
  1874. }
  1875. qdf_mem_zero(&lro_hash, sizeof(lro_hash));
  1876. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx)) {
  1877. lro_hash.lro_enable = 1;
  1878. lro_hash.tcp_flag = QDF_TCPHDR_ACK;
  1879. lro_hash.tcp_flag_mask = QDF_TCPHDR_FIN | QDF_TCPHDR_SYN |
  1880. QDF_TCPHDR_RST | QDF_TCPHDR_ACK | QDF_TCPHDR_URG |
  1881. QDF_TCPHDR_ECE | QDF_TCPHDR_CWR;
  1882. }
  1883. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW, FL("enabled"));
  1884. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv4,
  1885. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1886. LRO_IPV4_SEED_ARR_SZ));
  1887. qdf_get_random_bytes(lro_hash.toeplitz_hash_ipv6,
  1888. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1889. LRO_IPV6_SEED_ARR_SZ));
  1890. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  1891. "lro_hash: lro_enable: 0x%x tcp_flag 0x%x tcp_flag_mask 0x%x",
  1892. lro_hash.lro_enable, lro_hash.tcp_flag,
  1893. lro_hash.tcp_flag_mask);
  1894. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1895. QDF_TRACE_LEVEL_ERROR,
  1896. (void *)lro_hash.toeplitz_hash_ipv4,
  1897. (sizeof(lro_hash.toeplitz_hash_ipv4[0]) *
  1898. LRO_IPV4_SEED_ARR_SZ));
  1899. qdf_trace_hex_dump(QDF_MODULE_ID_DP,
  1900. QDF_TRACE_LEVEL_ERROR,
  1901. (void *)lro_hash.toeplitz_hash_ipv6,
  1902. (sizeof(lro_hash.toeplitz_hash_ipv6[0]) *
  1903. LRO_IPV6_SEED_ARR_SZ));
  1904. qdf_assert(soc->cdp_soc.ol_ops->lro_hash_config);
  1905. if (soc->cdp_soc.ol_ops->lro_hash_config)
  1906. (void)soc->cdp_soc.ol_ops->lro_hash_config
  1907. (soc->ctrl_psoc, &lro_hash);
  1908. }
  1909. /*
  1910. * dp_rxdma_ring_setup() - configure the RX DMA rings
  1911. * @soc: data path SoC handle
  1912. * @pdev: Physical device handle
  1913. *
  1914. * Return: 0 - success, > 0 - failure
  1915. */
  1916. #ifdef QCA_HOST2FW_RXBUF_RING
  1917. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1918. struct dp_pdev *pdev)
  1919. {
  1920. int max_mac_rings =
  1921. wlan_cfg_get_num_mac_rings
  1922. (pdev->wlan_cfg_ctx);
  1923. int i;
  1924. for (i = 0; i < max_mac_rings; i++) {
  1925. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1926. "%s: pdev_id %d mac_id %d\n",
  1927. __func__, pdev->pdev_id, i);
  1928. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  1929. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  1930. QDF_TRACE(QDF_MODULE_ID_DP,
  1931. QDF_TRACE_LEVEL_ERROR,
  1932. FL("failed rx mac ring setup"));
  1933. return QDF_STATUS_E_FAILURE;
  1934. }
  1935. }
  1936. return QDF_STATUS_SUCCESS;
  1937. }
  1938. #else
  1939. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  1940. struct dp_pdev *pdev)
  1941. {
  1942. return QDF_STATUS_SUCCESS;
  1943. }
  1944. #endif
  1945. /**
  1946. * dp_dscp_tid_map_setup(): Initialize the dscp-tid maps
  1947. * @pdev - DP_PDEV handle
  1948. *
  1949. * Return: void
  1950. */
  1951. static inline void
  1952. dp_dscp_tid_map_setup(struct dp_pdev *pdev)
  1953. {
  1954. uint8_t map_id;
  1955. for (map_id = 0; map_id < DP_MAX_TID_MAPS; map_id++) {
  1956. qdf_mem_copy(pdev->dscp_tid_map[map_id], default_dscp_tid_map,
  1957. sizeof(default_dscp_tid_map));
  1958. }
  1959. for (map_id = 0; map_id < HAL_MAX_HW_DSCP_TID_MAPS; map_id++) {
  1960. hal_tx_set_dscp_tid_map(pdev->soc->hal_soc,
  1961. pdev->dscp_tid_map[map_id],
  1962. map_id);
  1963. }
  1964. }
  1965. #ifdef QCA_SUPPORT_SON
  1966. /**
  1967. * dp_mark_peer_inact(): Update peer inactivity status
  1968. * @peer_handle - datapath peer handle
  1969. *
  1970. * Return: void
  1971. */
  1972. void dp_mark_peer_inact(void *peer_handle, bool inactive)
  1973. {
  1974. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1975. struct dp_pdev *pdev;
  1976. struct dp_soc *soc;
  1977. bool inactive_old;
  1978. if (!peer)
  1979. return;
  1980. pdev = peer->vdev->pdev;
  1981. soc = pdev->soc;
  1982. inactive_old = peer->peer_bs_inact_flag == 1;
  1983. if (!inactive)
  1984. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1985. peer->peer_bs_inact_flag = inactive ? 1 : 0;
  1986. if (inactive_old != inactive) {
  1987. /**
  1988. * Note: a node lookup can happen in RX datapath context
  1989. * when a node changes from inactive to active (at most once
  1990. * per inactivity timeout threshold)
  1991. */
  1992. if (soc->cdp_soc.ol_ops->record_act_change) {
  1993. soc->cdp_soc.ol_ops->record_act_change(pdev->osif_pdev,
  1994. peer->mac_addr.raw, !inactive);
  1995. }
  1996. }
  1997. }
  1998. /**
  1999. * dp_txrx_peer_find_inact_timeout_handler(): Inactivity timeout function
  2000. *
  2001. * Periodically checks the inactivity status
  2002. */
  2003. static os_timer_func(dp_txrx_peer_find_inact_timeout_handler)
  2004. {
  2005. struct dp_pdev *pdev;
  2006. struct dp_vdev *vdev;
  2007. struct dp_peer *peer;
  2008. struct dp_soc *soc;
  2009. int i;
  2010. OS_GET_TIMER_ARG(soc, struct dp_soc *);
  2011. qdf_spin_lock(&soc->peer_ref_mutex);
  2012. for (i = 0; i < soc->pdev_count; i++) {
  2013. pdev = soc->pdev_list[i];
  2014. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  2015. if (vdev->opmode != wlan_op_mode_ap)
  2016. continue;
  2017. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2018. if (!peer->authorize) {
  2019. /**
  2020. * Inactivity check only interested in
  2021. * connected node
  2022. */
  2023. continue;
  2024. }
  2025. if (peer->peer_bs_inact > soc->pdev_bs_inact_reload) {
  2026. /**
  2027. * This check ensures we do not wait extra long
  2028. * due to the potential race condition
  2029. */
  2030. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  2031. }
  2032. if (peer->peer_bs_inact > 0) {
  2033. /* Do not let it wrap around */
  2034. peer->peer_bs_inact--;
  2035. }
  2036. if (peer->peer_bs_inact == 0)
  2037. dp_mark_peer_inact(peer, true);
  2038. }
  2039. }
  2040. }
  2041. qdf_spin_unlock(&soc->peer_ref_mutex);
  2042. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  2043. soc->pdev_bs_inact_interval * 1000);
  2044. }
  2045. /**
  2046. * dp_free_inact_timer(): free inact timer
  2047. * @timer - inact timer handle
  2048. *
  2049. * Return: bool
  2050. */
  2051. void dp_free_inact_timer(struct dp_soc *soc)
  2052. {
  2053. qdf_timer_free(&soc->pdev_bs_inact_timer);
  2054. }
  2055. #else
  2056. void dp_mark_peer_inact(void *peer, bool inactive)
  2057. {
  2058. return;
  2059. }
  2060. void dp_free_inact_timer(struct dp_soc *soc)
  2061. {
  2062. return;
  2063. }
  2064. #endif
  2065. #ifdef IPA_OFFLOAD
  2066. /**
  2067. * dp_setup_ipa_rx_refill_buf_ring - Setup second Rx refill buffer ring
  2068. * @soc: data path instance
  2069. * @pdev: core txrx pdev context
  2070. *
  2071. * Return: QDF_STATUS_SUCCESS: success
  2072. * QDF_STATUS_E_RESOURCES: Error return
  2073. */
  2074. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2075. struct dp_pdev *pdev)
  2076. {
  2077. /* Setup second Rx refill buffer ring */
  2078. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2079. IPA_RX_REFILL_BUF_RING_IDX,
  2080. pdev->pdev_id, RXDMA_REFILL_RING_SIZE)) {
  2081. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2082. FL("dp_srng_setup failed second rx refill ring"));
  2083. return QDF_STATUS_E_FAILURE;
  2084. }
  2085. return QDF_STATUS_SUCCESS;
  2086. }
  2087. /**
  2088. * dp_cleanup_ipa_rx_refill_buf_ring - Cleanup second Rx refill buffer ring
  2089. * @soc: data path instance
  2090. * @pdev: core txrx pdev context
  2091. *
  2092. * Return: void
  2093. */
  2094. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2095. struct dp_pdev *pdev)
  2096. {
  2097. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring2, RXDMA_BUF,
  2098. IPA_RX_REFILL_BUF_RING_IDX);
  2099. }
  2100. #else
  2101. static int dp_setup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2102. struct dp_pdev *pdev)
  2103. {
  2104. return QDF_STATUS_SUCCESS;
  2105. }
  2106. static void dp_cleanup_ipa_rx_refill_buf_ring(struct dp_soc *soc,
  2107. struct dp_pdev *pdev)
  2108. {
  2109. }
  2110. #endif
  2111. /*
  2112. * dp_pdev_attach_wifi3() - attach txrx pdev
  2113. * @ctrl_pdev: Opaque PDEV object
  2114. * @txrx_soc: Datapath SOC handle
  2115. * @htc_handle: HTC handle for host-target interface
  2116. * @qdf_osdev: QDF OS device
  2117. * @pdev_id: PDEV ID
  2118. *
  2119. * Return: DP PDEV handle on success, NULL on failure
  2120. */
  2121. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  2122. struct cdp_cfg *ctrl_pdev,
  2123. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  2124. {
  2125. int tx_ring_size;
  2126. int tx_comp_ring_size;
  2127. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2128. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  2129. if (!pdev) {
  2130. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2131. FL("DP PDEV memory allocation failed"));
  2132. goto fail0;
  2133. }
  2134. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  2135. if (!pdev->wlan_cfg_ctx) {
  2136. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2137. FL("pdev cfg_attach failed"));
  2138. qdf_mem_free(pdev);
  2139. goto fail0;
  2140. }
  2141. /*
  2142. * set nss pdev config based on soc config
  2143. */
  2144. wlan_cfg_set_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx,
  2145. (wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx) & (1 << pdev_id)));
  2146. pdev->soc = soc;
  2147. pdev->osif_pdev = ctrl_pdev;
  2148. pdev->pdev_id = pdev_id;
  2149. soc->pdev_list[pdev_id] = pdev;
  2150. soc->pdev_count++;
  2151. TAILQ_INIT(&pdev->vdev_list);
  2152. pdev->vdev_count = 0;
  2153. qdf_spinlock_create(&pdev->tx_mutex);
  2154. qdf_spinlock_create(&pdev->neighbour_peer_mutex);
  2155. TAILQ_INIT(&pdev->neighbour_peers_list);
  2156. if (dp_soc_cmn_setup(soc)) {
  2157. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2158. FL("dp_soc_cmn_setup failed"));
  2159. goto fail1;
  2160. }
  2161. /* Setup per PDEV TCL rings if configured */
  2162. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2163. tx_ring_size =
  2164. wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2165. tx_comp_ring_size =
  2166. wlan_cfg_tx_comp_ring_size(soc->wlan_cfg_ctx);
  2167. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  2168. pdev_id, pdev_id, tx_ring_size)) {
  2169. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2170. FL("dp_srng_setup failed for tcl_data_ring"));
  2171. goto fail1;
  2172. }
  2173. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  2174. WBM2SW_RELEASE, pdev_id, pdev_id, tx_comp_ring_size)) {
  2175. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2176. FL("dp_srng_setup failed for tx_comp_ring"));
  2177. goto fail1;
  2178. }
  2179. soc->num_tcl_data_rings++;
  2180. }
  2181. /* Tx specific init */
  2182. if (dp_tx_pdev_attach(pdev)) {
  2183. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2184. FL("dp_tx_pdev_attach failed"));
  2185. goto fail1;
  2186. }
  2187. /* Setup per PDEV REO rings if configured */
  2188. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2189. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  2190. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  2191. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2192. FL("dp_srng_setup failed for reo_dest_ringn"));
  2193. goto fail1;
  2194. }
  2195. soc->num_reo_dest_rings++;
  2196. }
  2197. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  2198. RXDMA_REFILL_RING_SIZE)) {
  2199. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2200. FL("dp_srng_setup failed rx refill ring"));
  2201. goto fail1;
  2202. }
  2203. if (dp_rxdma_ring_setup(soc, pdev)) {
  2204. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2205. FL("RXDMA ring config failed"));
  2206. goto fail1;
  2207. }
  2208. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  2209. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  2210. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2211. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  2212. goto fail1;
  2213. }
  2214. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  2215. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  2216. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2217. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  2218. goto fail1;
  2219. }
  2220. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  2221. RXDMA_MONITOR_STATUS, 0, pdev_id,
  2222. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  2223. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2224. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  2225. goto fail1;
  2226. }
  2227. if (dp_srng_setup(soc, &pdev->rxdma_mon_desc_ring,
  2228. RXDMA_MONITOR_DESC, 0, pdev_id, RXDMA_MONITOR_DESC_RING_SIZE)) {
  2229. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2230. "dp_srng_setup failed for rxdma_mon_desc_ring\n");
  2231. goto fail1;
  2232. }
  2233. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2234. if (dp_srng_setup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST,
  2235. 0, pdev_id, RXDMA_ERR_DST_RING_SIZE)) {
  2236. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2237. FL("dp_srng_setup failed for rxdma_err_dst_ring"));
  2238. goto fail1;
  2239. }
  2240. }
  2241. if (dp_setup_ipa_rx_refill_buf_ring(soc, pdev))
  2242. goto fail1;
  2243. if (dp_ipa_ring_resource_setup(soc, pdev))
  2244. goto fail1;
  2245. if (dp_ipa_uc_attach(soc, pdev) != QDF_STATUS_SUCCESS) {
  2246. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2247. FL("dp_ipa_uc_attach failed"));
  2248. goto fail1;
  2249. }
  2250. /* Rx specific init */
  2251. if (dp_rx_pdev_attach(pdev)) {
  2252. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2253. FL("dp_rx_pdev_attach failed"));
  2254. goto fail0;
  2255. }
  2256. DP_STATS_INIT(pdev);
  2257. /* Monitor filter init */
  2258. pdev->mon_filter_mode = MON_FILTER_ALL;
  2259. pdev->fp_mgmt_filter = FILTER_MGMT_ALL;
  2260. pdev->fp_ctrl_filter = FILTER_CTRL_ALL;
  2261. pdev->fp_data_filter = FILTER_DATA_ALL;
  2262. pdev->mo_mgmt_filter = FILTER_MGMT_ALL;
  2263. pdev->mo_ctrl_filter = FILTER_CTRL_ALL;
  2264. pdev->mo_data_filter = FILTER_DATA_ALL;
  2265. #ifndef CONFIG_WIN
  2266. /* MCL */
  2267. dp_local_peer_id_pool_init(pdev);
  2268. #endif
  2269. dp_dscp_tid_map_setup(pdev);
  2270. /* Rx monitor mode specific init */
  2271. if (dp_rx_pdev_mon_attach(pdev)) {
  2272. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2273. "dp_rx_pdev_attach failed\n");
  2274. goto fail1;
  2275. }
  2276. if (dp_wdi_event_attach(pdev)) {
  2277. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2278. "dp_wdi_evet_attach failed\n");
  2279. goto fail1;
  2280. }
  2281. /* set the reo destination during initialization */
  2282. pdev->reo_dest = pdev->pdev_id + 1;
  2283. return (struct cdp_pdev *)pdev;
  2284. fail1:
  2285. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  2286. fail0:
  2287. return NULL;
  2288. }
  2289. /*
  2290. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  2291. * @soc: data path SoC handle
  2292. * @pdev: Physical device handle
  2293. *
  2294. * Return: void
  2295. */
  2296. #ifdef QCA_HOST2FW_RXBUF_RING
  2297. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2298. struct dp_pdev *pdev)
  2299. {
  2300. int max_mac_rings =
  2301. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  2302. int i;
  2303. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  2304. max_mac_rings : MAX_RX_MAC_RINGS;
  2305. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2306. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  2307. RXDMA_BUF, 1);
  2308. qdf_timer_free(&soc->mon_reap_timer);
  2309. }
  2310. #else
  2311. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  2312. struct dp_pdev *pdev)
  2313. {
  2314. }
  2315. #endif
  2316. /*
  2317. * dp_neighbour_peers_detach() - Detach neighbour peers(nac clients)
  2318. * @pdev: device object
  2319. *
  2320. * Return: void
  2321. */
  2322. static void dp_neighbour_peers_detach(struct dp_pdev *pdev)
  2323. {
  2324. struct dp_neighbour_peer *peer = NULL;
  2325. struct dp_neighbour_peer *temp_peer = NULL;
  2326. TAILQ_FOREACH_SAFE(peer, &pdev->neighbour_peers_list,
  2327. neighbour_peer_list_elem, temp_peer) {
  2328. /* delete this peer from the list */
  2329. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  2330. peer, neighbour_peer_list_elem);
  2331. qdf_mem_free(peer);
  2332. }
  2333. qdf_spinlock_destroy(&pdev->neighbour_peer_mutex);
  2334. }
  2335. /*
  2336. * dp_pdev_detach_wifi3() - detach txrx pdev
  2337. * @txrx_pdev: Datapath PDEV handle
  2338. * @force: Force detach
  2339. *
  2340. */
  2341. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  2342. {
  2343. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2344. struct dp_soc *soc = pdev->soc;
  2345. qdf_nbuf_t curr_nbuf, next_nbuf;
  2346. dp_wdi_event_detach(pdev);
  2347. dp_tx_pdev_detach(pdev);
  2348. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2349. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  2350. TCL_DATA, pdev->pdev_id);
  2351. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  2352. WBM2SW_RELEASE, pdev->pdev_id);
  2353. }
  2354. dp_pktlogmod_exit(pdev);
  2355. dp_rx_pdev_detach(pdev);
  2356. dp_rx_pdev_mon_detach(pdev);
  2357. dp_neighbour_peers_detach(pdev);
  2358. qdf_spinlock_destroy(&pdev->tx_mutex);
  2359. dp_ipa_uc_detach(soc, pdev);
  2360. dp_cleanup_ipa_rx_refill_buf_ring(soc, pdev);
  2361. /* Cleanup per PDEV REO rings if configured */
  2362. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2363. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  2364. REO_DST, pdev->pdev_id);
  2365. }
  2366. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  2367. dp_rxdma_ring_cleanup(soc, pdev);
  2368. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  2369. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  2370. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  2371. RXDMA_MONITOR_STATUS, 0);
  2372. dp_srng_cleanup(soc, &pdev->rxdma_mon_desc_ring,
  2373. RXDMA_MONITOR_DESC, 0);
  2374. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx)) {
  2375. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[0], RXDMA_DST, 0);
  2376. } else {
  2377. int i;
  2378. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  2379. dp_srng_cleanup(soc, &pdev->rxdma_err_dst_ring[i],
  2380. RXDMA_DST, 0);
  2381. }
  2382. curr_nbuf = pdev->invalid_peer_head_msdu;
  2383. while (curr_nbuf) {
  2384. next_nbuf = qdf_nbuf_next(curr_nbuf);
  2385. qdf_nbuf_free(curr_nbuf);
  2386. curr_nbuf = next_nbuf;
  2387. }
  2388. soc->pdev_list[pdev->pdev_id] = NULL;
  2389. soc->pdev_count--;
  2390. wlan_cfg_pdev_detach(pdev->wlan_cfg_ctx);
  2391. qdf_mem_free(pdev->dp_txrx_handle);
  2392. qdf_mem_free(pdev);
  2393. }
  2394. /*
  2395. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  2396. * @soc: DP SOC handle
  2397. */
  2398. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  2399. {
  2400. struct reo_desc_list_node *desc;
  2401. struct dp_rx_tid *rx_tid;
  2402. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  2403. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  2404. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  2405. rx_tid = &desc->rx_tid;
  2406. qdf_mem_unmap_nbytes_single(soc->osdev,
  2407. rx_tid->hw_qdesc_paddr,
  2408. QDF_DMA_BIDIRECTIONAL,
  2409. rx_tid->hw_qdesc_alloc_size);
  2410. qdf_mem_free(rx_tid->hw_qdesc_vaddr_unaligned);
  2411. qdf_mem_free(desc);
  2412. }
  2413. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  2414. qdf_list_destroy(&soc->reo_desc_freelist);
  2415. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  2416. }
  2417. /*
  2418. * dp_soc_detach_wifi3() - Detach txrx SOC
  2419. * @txrx_soc: DP SOC handle, struct cdp_soc_t is first element of struct dp_soc.
  2420. */
  2421. static void dp_soc_detach_wifi3(void *txrx_soc)
  2422. {
  2423. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  2424. int i;
  2425. qdf_atomic_set(&soc->cmn_init_done, 0);
  2426. qdf_flush_work(&soc->htt_stats.work);
  2427. qdf_disable_work(&soc->htt_stats.work);
  2428. /* Free pending htt stats messages */
  2429. qdf_nbuf_queue_free(&soc->htt_stats.msg);
  2430. dp_free_inact_timer(soc);
  2431. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2432. if (soc->pdev_list[i])
  2433. dp_pdev_detach_wifi3(
  2434. (struct cdp_pdev *)soc->pdev_list[i], 1);
  2435. }
  2436. dp_peer_find_detach(soc);
  2437. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  2438. * SW descriptors
  2439. */
  2440. /* Free the ring memories */
  2441. /* Common rings */
  2442. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  2443. dp_tx_soc_detach(soc);
  2444. /* Tx data rings */
  2445. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  2446. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  2447. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  2448. TCL_DATA, i);
  2449. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  2450. WBM2SW_RELEASE, i);
  2451. }
  2452. }
  2453. /* TCL command and status rings */
  2454. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  2455. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  2456. /* Rx data rings */
  2457. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  2458. soc->num_reo_dest_rings =
  2459. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  2460. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  2461. /* TODO: Get number of rings and ring sizes
  2462. * from wlan_cfg
  2463. */
  2464. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  2465. REO_DST, i);
  2466. }
  2467. }
  2468. /* REO reinjection ring */
  2469. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  2470. /* Rx release ring */
  2471. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  2472. /* Rx exception ring */
  2473. /* TODO: Better to store ring_type and ring_num in
  2474. * dp_srng during setup
  2475. */
  2476. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  2477. /* REO command and status rings */
  2478. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  2479. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  2480. dp_hw_link_desc_pool_cleanup(soc);
  2481. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  2482. qdf_spinlock_destroy(&soc->htt_stats.lock);
  2483. htt_soc_detach(soc->htt_handle);
  2484. dp_reo_cmdlist_destroy(soc);
  2485. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  2486. dp_reo_desc_freelist_destroy(soc);
  2487. wlan_cfg_soc_detach(soc->wlan_cfg_ctx);
  2488. dp_soc_wds_detach(soc);
  2489. qdf_spinlock_destroy(&soc->ast_lock);
  2490. qdf_mem_free(soc);
  2491. }
  2492. /*
  2493. * dp_rxdma_ring_config() - configure the RX DMA rings
  2494. *
  2495. * This function is used to configure the MAC rings.
  2496. * On MCL host provides buffers in Host2FW ring
  2497. * FW refills (copies) buffers to the ring and updates
  2498. * ring_idx in register
  2499. *
  2500. * @soc: data path SoC handle
  2501. *
  2502. * Return: void
  2503. */
  2504. #ifdef QCA_HOST2FW_RXBUF_RING
  2505. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2506. {
  2507. int i;
  2508. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2509. struct dp_pdev *pdev = soc->pdev_list[i];
  2510. if (pdev) {
  2511. int mac_id = 0;
  2512. int j;
  2513. bool dbs_enable = 0;
  2514. int max_mac_rings =
  2515. wlan_cfg_get_num_mac_rings
  2516. (pdev->wlan_cfg_ctx);
  2517. htt_srng_setup(soc->htt_handle, 0,
  2518. pdev->rx_refill_buf_ring.hal_srng,
  2519. RXDMA_BUF);
  2520. if (pdev->rx_refill_buf_ring2.hal_srng)
  2521. htt_srng_setup(soc->htt_handle, 0,
  2522. pdev->rx_refill_buf_ring2.hal_srng,
  2523. RXDMA_BUF);
  2524. if (soc->cdp_soc.ol_ops->
  2525. is_hw_dbs_2x2_capable) {
  2526. dbs_enable = soc->cdp_soc.ol_ops->
  2527. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  2528. }
  2529. if (dbs_enable) {
  2530. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2531. QDF_TRACE_LEVEL_ERROR,
  2532. FL("DBS enabled max_mac_rings %d\n"),
  2533. max_mac_rings);
  2534. } else {
  2535. max_mac_rings = 1;
  2536. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2537. QDF_TRACE_LEVEL_ERROR,
  2538. FL("DBS disabled, max_mac_rings %d\n"),
  2539. max_mac_rings);
  2540. }
  2541. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2542. FL("pdev_id %d max_mac_rings %d\n"),
  2543. pdev->pdev_id, max_mac_rings);
  2544. for (j = 0; j < max_mac_rings; j++) {
  2545. QDF_TRACE(QDF_MODULE_ID_TXRX,
  2546. QDF_TRACE_LEVEL_ERROR,
  2547. FL("mac_id %d\n"), mac_id);
  2548. htt_srng_setup(soc->htt_handle, mac_id,
  2549. pdev->rx_mac_buf_ring[j]
  2550. .hal_srng,
  2551. RXDMA_BUF);
  2552. htt_srng_setup(soc->htt_handle, mac_id,
  2553. pdev->rxdma_err_dst_ring[j]
  2554. .hal_srng,
  2555. RXDMA_DST);
  2556. mac_id++;
  2557. }
  2558. /* Configure monitor mode rings */
  2559. htt_srng_setup(soc->htt_handle, i,
  2560. pdev->rxdma_mon_buf_ring.hal_srng,
  2561. RXDMA_MONITOR_BUF);
  2562. htt_srng_setup(soc->htt_handle, i,
  2563. pdev->rxdma_mon_dst_ring.hal_srng,
  2564. RXDMA_MONITOR_DST);
  2565. htt_srng_setup(soc->htt_handle, i,
  2566. pdev->rxdma_mon_status_ring.hal_srng,
  2567. RXDMA_MONITOR_STATUS);
  2568. htt_srng_setup(soc->htt_handle, i,
  2569. pdev->rxdma_mon_desc_ring.hal_srng,
  2570. RXDMA_MONITOR_DESC);
  2571. }
  2572. }
  2573. /*
  2574. * Timer to reap rxdma status rings.
  2575. * Needed until we enable ppdu end interrupts
  2576. */
  2577. qdf_timer_init(soc->osdev, &soc->mon_reap_timer,
  2578. dp_service_mon_rings, (void *)soc,
  2579. QDF_TIMER_TYPE_WAKE_APPS);
  2580. soc->reap_timer_init = 1;
  2581. }
  2582. #else
  2583. static void dp_rxdma_ring_config(struct dp_soc *soc)
  2584. {
  2585. int i;
  2586. for (i = 0; i < MAX_PDEV_CNT; i++) {
  2587. struct dp_pdev *pdev = soc->pdev_list[i];
  2588. if (pdev) {
  2589. int ring_idx = dp_get_ring_id_for_mac_id(soc, i);
  2590. htt_srng_setup(soc->htt_handle, i,
  2591. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  2592. htt_srng_setup(soc->htt_handle, i,
  2593. pdev->rxdma_mon_buf_ring.hal_srng,
  2594. RXDMA_MONITOR_BUF);
  2595. htt_srng_setup(soc->htt_handle, i,
  2596. pdev->rxdma_mon_dst_ring.hal_srng,
  2597. RXDMA_MONITOR_DST);
  2598. htt_srng_setup(soc->htt_handle, i,
  2599. pdev->rxdma_mon_status_ring.hal_srng,
  2600. RXDMA_MONITOR_STATUS);
  2601. htt_srng_setup(soc->htt_handle, i,
  2602. pdev->rxdma_mon_desc_ring.hal_srng,
  2603. RXDMA_MONITOR_DESC);
  2604. htt_srng_setup(soc->htt_handle, i,
  2605. pdev->rxdma_err_dst_ring[ring_idx].hal_srng,
  2606. RXDMA_DST);
  2607. }
  2608. }
  2609. }
  2610. #endif
  2611. /*
  2612. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  2613. * @txrx_soc: Datapath SOC handle
  2614. */
  2615. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  2616. {
  2617. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  2618. htt_soc_attach_target(soc->htt_handle);
  2619. dp_rxdma_ring_config(soc);
  2620. DP_STATS_INIT(soc);
  2621. /* initialize work queue for stats processing */
  2622. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  2623. return 0;
  2624. }
  2625. /*
  2626. * dp_soc_get_nss_cfg_wifi3() - SOC get nss config
  2627. * @txrx_soc: Datapath SOC handle
  2628. */
  2629. static int dp_soc_get_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc)
  2630. {
  2631. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2632. return wlan_cfg_get_dp_soc_nss_cfg(dsoc->wlan_cfg_ctx);
  2633. }
  2634. /*
  2635. * dp_soc_set_nss_cfg_wifi3() - SOC set nss config
  2636. * @txrx_soc: Datapath SOC handle
  2637. * @nss_cfg: nss config
  2638. */
  2639. static void dp_soc_set_nss_cfg_wifi3(struct cdp_soc_t *cdp_soc, int config)
  2640. {
  2641. struct dp_soc *dsoc = (struct dp_soc *)cdp_soc;
  2642. struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx = dsoc->wlan_cfg_ctx;
  2643. wlan_cfg_set_dp_soc_nss_cfg(wlan_cfg_ctx, config);
  2644. /*
  2645. * TODO: masked out based on the per offloaded radio
  2646. */
  2647. if (config == dp_nss_cfg_dbdc) {
  2648. wlan_cfg_set_num_tx_desc_pool(wlan_cfg_ctx, 0);
  2649. wlan_cfg_set_num_tx_ext_desc_pool(wlan_cfg_ctx, 0);
  2650. wlan_cfg_set_num_tx_desc(wlan_cfg_ctx, 0);
  2651. wlan_cfg_set_num_tx_ext_desc(wlan_cfg_ctx, 0);
  2652. }
  2653. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2654. FL("nss-wifi<0> nss config is enabled"));
  2655. }
  2656. /*
  2657. * dp_vdev_attach_wifi3() - attach txrx vdev
  2658. * @txrx_pdev: Datapath PDEV handle
  2659. * @vdev_mac_addr: MAC address of the virtual interface
  2660. * @vdev_id: VDEV Id
  2661. * @wlan_op_mode: VDEV operating mode
  2662. *
  2663. * Return: DP VDEV handle on success, NULL on failure
  2664. */
  2665. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  2666. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  2667. {
  2668. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  2669. struct dp_soc *soc = pdev->soc;
  2670. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  2671. int tx_ring_size;
  2672. if (!vdev) {
  2673. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2674. FL("DP VDEV memory allocation failed"));
  2675. goto fail0;
  2676. }
  2677. vdev->pdev = pdev;
  2678. vdev->vdev_id = vdev_id;
  2679. vdev->opmode = op_mode;
  2680. vdev->osdev = soc->osdev;
  2681. vdev->osif_rx = NULL;
  2682. vdev->osif_rsim_rx_decap = NULL;
  2683. vdev->osif_get_key = NULL;
  2684. vdev->osif_rx_mon = NULL;
  2685. vdev->osif_tx_free_ext = NULL;
  2686. vdev->osif_vdev = NULL;
  2687. vdev->delete.pending = 0;
  2688. vdev->safemode = 0;
  2689. vdev->drop_unenc = 1;
  2690. vdev->sec_type = cdp_sec_type_none;
  2691. #ifdef notyet
  2692. vdev->filters_num = 0;
  2693. #endif
  2694. qdf_mem_copy(
  2695. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2696. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2697. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  2698. vdev->dscp_tid_map_id = 0;
  2699. vdev->mcast_enhancement_en = 0;
  2700. tx_ring_size = wlan_cfg_tx_ring_size(soc->wlan_cfg_ctx);
  2701. /* TODO: Initialize default HTT meta data that will be used in
  2702. * TCL descriptors for packets transmitted from this VDEV
  2703. */
  2704. TAILQ_INIT(&vdev->peer_list);
  2705. /* add this vdev into the pdev's list */
  2706. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  2707. pdev->vdev_count++;
  2708. dp_tx_vdev_attach(vdev);
  2709. if (QDF_STATUS_SUCCESS != dp_tx_flow_pool_map_handler(pdev, vdev_id,
  2710. FLOW_TYPE_VDEV, vdev_id, tx_ring_size))
  2711. goto fail1;
  2712. if ((soc->intr_mode == DP_INTR_POLL) &&
  2713. wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx) != 0) {
  2714. if (pdev->vdev_count == 1)
  2715. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  2716. }
  2717. dp_lro_hash_setup(soc);
  2718. /* LRO */
  2719. if (wlan_cfg_is_lro_enabled(soc->wlan_cfg_ctx) &&
  2720. wlan_op_mode_sta == vdev->opmode)
  2721. vdev->lro_enable = true;
  2722. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  2723. "LRO: vdev_id %d lro_enable %d", vdev_id, vdev->lro_enable);
  2724. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2725. "Created vdev %pK (%pM)", vdev, vdev->mac_addr.raw);
  2726. DP_STATS_INIT(vdev);
  2727. if (wlan_op_mode_sta == vdev->opmode)
  2728. dp_peer_create_wifi3((struct cdp_vdev *)vdev,
  2729. vdev->mac_addr.raw);
  2730. return (struct cdp_vdev *)vdev;
  2731. fail1:
  2732. dp_tx_vdev_detach(vdev);
  2733. qdf_mem_free(vdev);
  2734. fail0:
  2735. return NULL;
  2736. }
  2737. /**
  2738. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  2739. * @vdev: Datapath VDEV handle
  2740. * @osif_vdev: OSIF vdev handle
  2741. * @txrx_ops: Tx and Rx operations
  2742. *
  2743. * Return: DP VDEV handle on success, NULL on failure
  2744. */
  2745. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  2746. void *osif_vdev,
  2747. struct ol_txrx_ops *txrx_ops)
  2748. {
  2749. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2750. vdev->osif_vdev = osif_vdev;
  2751. vdev->osif_rx = txrx_ops->rx.rx;
  2752. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  2753. vdev->osif_get_key = txrx_ops->get_key;
  2754. vdev->osif_rx_mon = txrx_ops->rx.mon;
  2755. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  2756. #ifdef notyet
  2757. #if ATH_SUPPORT_WAPI
  2758. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  2759. #endif
  2760. #endif
  2761. #ifdef UMAC_SUPPORT_PROXY_ARP
  2762. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  2763. #endif
  2764. vdev->me_convert = txrx_ops->me_convert;
  2765. /* TODO: Enable the following once Tx code is integrated */
  2766. if (vdev->mesh_vdev)
  2767. txrx_ops->tx.tx = dp_tx_send_mesh;
  2768. else
  2769. txrx_ops->tx.tx = dp_tx_send;
  2770. txrx_ops->tx.tx_exception = dp_tx_send_exception;
  2771. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  2772. "DP Vdev Register success");
  2773. }
  2774. /**
  2775. * dp_vdev_flush_peers() - Forcibily Flush peers of vdev
  2776. * @vdev: Datapath VDEV handle
  2777. *
  2778. * Return: void
  2779. */
  2780. static void dp_vdev_flush_peers(struct dp_vdev *vdev)
  2781. {
  2782. struct dp_pdev *pdev = vdev->pdev;
  2783. struct dp_soc *soc = pdev->soc;
  2784. struct dp_peer *peer;
  2785. uint16_t *peer_ids;
  2786. uint8_t i = 0, j = 0;
  2787. peer_ids = qdf_mem_malloc(soc->max_peers * sizeof(peer_ids[0]));
  2788. if (!peer_ids) {
  2789. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  2790. "DP alloc failure - unable to flush peers");
  2791. return;
  2792. }
  2793. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2794. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  2795. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  2796. if (peer->peer_ids[i] != HTT_INVALID_PEER)
  2797. if (j < soc->max_peers)
  2798. peer_ids[j++] = peer->peer_ids[i];
  2799. }
  2800. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2801. for (i = 0; i < j ; i++)
  2802. dp_rx_peer_unmap_handler(soc, peer_ids[i]);
  2803. qdf_mem_free(peer_ids);
  2804. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2805. FL("Flushed peers for vdev object %pK "), vdev);
  2806. }
  2807. /*
  2808. * dp_vdev_detach_wifi3() - Detach txrx vdev
  2809. * @txrx_vdev: Datapath VDEV handle
  2810. * @callback: Callback OL_IF on completion of detach
  2811. * @cb_context: Callback context
  2812. *
  2813. */
  2814. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  2815. ol_txrx_vdev_delete_cb callback, void *cb_context)
  2816. {
  2817. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2818. struct dp_pdev *pdev = vdev->pdev;
  2819. struct dp_soc *soc = pdev->soc;
  2820. /* preconditions */
  2821. qdf_assert(vdev);
  2822. /* remove the vdev from its parent pdev's list */
  2823. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  2824. if (wlan_op_mode_sta == vdev->opmode)
  2825. dp_peer_delete_wifi3(vdev->vap_bss_peer, 0);
  2826. /*
  2827. * If Target is hung, flush all peers before detaching vdev
  2828. * this will free all references held due to missing
  2829. * unmap commands from Target
  2830. */
  2831. if (hif_get_target_status(soc->hif_handle) == TARGET_STATUS_RESET)
  2832. dp_vdev_flush_peers(vdev);
  2833. /*
  2834. * Use peer_ref_mutex while accessing peer_list, in case
  2835. * a peer is in the process of being removed from the list.
  2836. */
  2837. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2838. /* check that the vdev has no peers allocated */
  2839. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  2840. /* debug print - will be removed later */
  2841. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  2842. FL("not deleting vdev object %pK (%pM)"
  2843. "until deletion finishes for all its peers"),
  2844. vdev, vdev->mac_addr.raw);
  2845. /* indicate that the vdev needs to be deleted */
  2846. vdev->delete.pending = 1;
  2847. vdev->delete.callback = callback;
  2848. vdev->delete.context = cb_context;
  2849. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2850. return;
  2851. }
  2852. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2853. dp_tx_flow_pool_unmap_handler(pdev, vdev->vdev_id, FLOW_TYPE_VDEV,
  2854. vdev->vdev_id);
  2855. dp_tx_vdev_detach(vdev);
  2856. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2857. FL("deleting vdev object %pK (%pM)"), vdev, vdev->mac_addr.raw);
  2858. qdf_mem_free(vdev);
  2859. if (callback)
  2860. callback(cb_context);
  2861. }
  2862. /*
  2863. * dp_peer_create_wifi3() - attach txrx peer
  2864. * @txrx_vdev: Datapath VDEV handle
  2865. * @peer_mac_addr: Peer MAC address
  2866. *
  2867. * Return: DP peeer handle on success, NULL on failure
  2868. */
  2869. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  2870. uint8_t *peer_mac_addr)
  2871. {
  2872. struct dp_peer *peer;
  2873. int i;
  2874. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2875. struct dp_pdev *pdev;
  2876. struct dp_soc *soc;
  2877. /* preconditions */
  2878. qdf_assert(vdev);
  2879. qdf_assert(peer_mac_addr);
  2880. pdev = vdev->pdev;
  2881. soc = pdev->soc;
  2882. #ifdef notyet
  2883. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  2884. soc->mempool_ol_ath_peer);
  2885. #else
  2886. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  2887. #endif
  2888. if (!peer)
  2889. return NULL; /* failure */
  2890. qdf_mem_zero(peer, sizeof(struct dp_peer));
  2891. TAILQ_INIT(&peer->ast_entry_list);
  2892. /* store provided params */
  2893. peer->vdev = vdev;
  2894. dp_peer_add_ast(soc, peer, peer_mac_addr, CDP_TXRX_AST_TYPE_STATIC, 0);
  2895. qdf_spinlock_create(&peer->peer_info_lock);
  2896. qdf_mem_copy(
  2897. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  2898. /* TODO: See of rx_opt_proc is really required */
  2899. peer->rx_opt_proc = soc->rx_opt_proc;
  2900. /* initialize the peer_id */
  2901. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  2902. peer->peer_ids[i] = HTT_INVALID_PEER;
  2903. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  2904. qdf_atomic_init(&peer->ref_cnt);
  2905. /* keep one reference for attach */
  2906. qdf_atomic_inc(&peer->ref_cnt);
  2907. /* add this peer into the vdev's list */
  2908. if (wlan_op_mode_sta == vdev->opmode)
  2909. TAILQ_INSERT_HEAD(&vdev->peer_list, peer, peer_list_elem);
  2910. else
  2911. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  2912. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  2913. /* TODO: See if hash based search is required */
  2914. dp_peer_find_hash_add(soc, peer);
  2915. /* Initialize the peer state */
  2916. peer->state = OL_TXRX_PEER_STATE_DISC;
  2917. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2918. "vdev %pK created peer %pK (%pM) ref_cnt: %d",
  2919. vdev, peer, peer->mac_addr.raw,
  2920. qdf_atomic_read(&peer->ref_cnt));
  2921. /*
  2922. * For every peer MAp message search and set if bss_peer
  2923. */
  2924. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  2925. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  2926. "vdev bss_peer!!!!");
  2927. peer->bss_peer = 1;
  2928. vdev->vap_bss_peer = peer;
  2929. }
  2930. #ifndef CONFIG_WIN
  2931. dp_local_peer_id_alloc(pdev, peer);
  2932. #endif
  2933. DP_STATS_INIT(peer);
  2934. return (void *)peer;
  2935. }
  2936. /*
  2937. * dp_peer_setup_wifi3() - initialize the peer
  2938. * @vdev_hdl: virtual device object
  2939. * @peer: Peer object
  2940. *
  2941. * Return: void
  2942. */
  2943. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  2944. {
  2945. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  2946. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  2947. struct dp_pdev *pdev;
  2948. struct dp_soc *soc;
  2949. bool hash_based = 0;
  2950. enum cdp_host_reo_dest_ring reo_dest;
  2951. /* preconditions */
  2952. qdf_assert(vdev);
  2953. qdf_assert(peer);
  2954. pdev = vdev->pdev;
  2955. soc = pdev->soc;
  2956. peer->last_assoc_rcvd = 0;
  2957. peer->last_disassoc_rcvd = 0;
  2958. peer->last_deauth_rcvd = 0;
  2959. /*
  2960. * hash based steering is disabled for Radios which are offloaded
  2961. * to NSS
  2962. */
  2963. if (!wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx))
  2964. hash_based = wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx);
  2965. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2966. FL("hash based steering for pdev: %d is %d\n"),
  2967. pdev->pdev_id, hash_based);
  2968. /*
  2969. * Below line of code will ensure the proper reo_dest ring is choosen
  2970. * for cases where toeplitz hash cannot be generated (ex: non TCP/UDP)
  2971. */
  2972. reo_dest = pdev->reo_dest;
  2973. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  2974. /* TODO: Check the destination ring number to be passed to FW */
  2975. soc->cdp_soc.ol_ops->peer_set_default_routing(
  2976. pdev->osif_pdev, peer->mac_addr.raw,
  2977. peer->vdev->vdev_id, hash_based, reo_dest);
  2978. }
  2979. dp_peer_rx_init(pdev, peer);
  2980. return;
  2981. }
  2982. /*
  2983. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  2984. * @vdev_handle: virtual device object
  2985. * @htt_pkt_type: type of pkt
  2986. *
  2987. * Return: void
  2988. */
  2989. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  2990. enum htt_cmn_pkt_type val)
  2991. {
  2992. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  2993. vdev->tx_encap_type = val;
  2994. }
  2995. /*
  2996. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  2997. * @vdev_handle: virtual device object
  2998. * @htt_pkt_type: type of pkt
  2999. *
  3000. * Return: void
  3001. */
  3002. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  3003. enum htt_cmn_pkt_type val)
  3004. {
  3005. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3006. vdev->rx_decap_type = val;
  3007. }
  3008. /*
  3009. * dp_set_pdev_reo_dest() - set the reo destination ring for this pdev
  3010. * @pdev_handle: physical device object
  3011. * @val: reo destination ring index (1 - 4)
  3012. *
  3013. * Return: void
  3014. */
  3015. static void dp_set_pdev_reo_dest(struct cdp_pdev *pdev_handle,
  3016. enum cdp_host_reo_dest_ring val)
  3017. {
  3018. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3019. if (pdev)
  3020. pdev->reo_dest = val;
  3021. }
  3022. /*
  3023. * dp_get_pdev_reo_dest() - get the reo destination for this pdev
  3024. * @pdev_handle: physical device object
  3025. *
  3026. * Return: reo destination ring index
  3027. */
  3028. static enum cdp_host_reo_dest_ring
  3029. dp_get_pdev_reo_dest(struct cdp_pdev *pdev_handle)
  3030. {
  3031. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3032. if (pdev)
  3033. return pdev->reo_dest;
  3034. else
  3035. return cdp_host_reo_dest_ring_unknown;
  3036. }
  3037. #ifdef QCA_SUPPORT_SON
  3038. static void dp_son_peer_authorize(struct dp_peer *peer)
  3039. {
  3040. struct dp_soc *soc;
  3041. soc = peer->vdev->pdev->soc;
  3042. peer->peer_bs_inact_flag = 0;
  3043. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3044. return;
  3045. }
  3046. #else
  3047. static void dp_son_peer_authorize(struct dp_peer *peer)
  3048. {
  3049. return;
  3050. }
  3051. #endif
  3052. /*
  3053. * dp_set_filter_neighbour_peers() - set filter neighbour peers for smart mesh
  3054. * @pdev_handle: device object
  3055. * @val: value to be set
  3056. *
  3057. * Return: void
  3058. */
  3059. static int dp_set_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3060. uint32_t val)
  3061. {
  3062. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3063. /* Enable/Disable smart mesh filtering. This flag will be checked
  3064. * during rx processing to check if packets are from NAC clients.
  3065. */
  3066. pdev->filter_neighbour_peers = val;
  3067. return 0;
  3068. }
  3069. /*
  3070. * dp_update_filter_neighbour_peers() - set neighbour peers(nac clients)
  3071. * address for smart mesh filtering
  3072. * @pdev_handle: device object
  3073. * @cmd: Add/Del command
  3074. * @macaddr: nac client mac address
  3075. *
  3076. * Return: void
  3077. */
  3078. static int dp_update_filter_neighbour_peers(struct cdp_pdev *pdev_handle,
  3079. uint32_t cmd, uint8_t *macaddr)
  3080. {
  3081. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3082. struct dp_neighbour_peer *peer = NULL;
  3083. if (!macaddr)
  3084. goto fail0;
  3085. /* Store address of NAC (neighbour peer) which will be checked
  3086. * against TA of received packets.
  3087. */
  3088. if (cmd == DP_NAC_PARAM_ADD) {
  3089. peer = (struct dp_neighbour_peer *) qdf_mem_malloc(
  3090. sizeof(*peer));
  3091. if (!peer) {
  3092. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3093. FL("DP neighbour peer node memory allocation failed"));
  3094. goto fail0;
  3095. }
  3096. qdf_mem_copy(&peer->neighbour_peers_macaddr.raw[0],
  3097. macaddr, DP_MAC_ADDR_LEN);
  3098. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3099. /* add this neighbour peer into the list */
  3100. TAILQ_INSERT_TAIL(&pdev->neighbour_peers_list, peer,
  3101. neighbour_peer_list_elem);
  3102. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3103. return 1;
  3104. } else if (cmd == DP_NAC_PARAM_DEL) {
  3105. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  3106. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  3107. neighbour_peer_list_elem) {
  3108. if (!qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  3109. macaddr, DP_MAC_ADDR_LEN)) {
  3110. /* delete this peer from the list */
  3111. TAILQ_REMOVE(&pdev->neighbour_peers_list,
  3112. peer, neighbour_peer_list_elem);
  3113. qdf_mem_free(peer);
  3114. break;
  3115. }
  3116. }
  3117. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  3118. return 1;
  3119. }
  3120. fail0:
  3121. return 0;
  3122. }
  3123. /*
  3124. * dp_get_sec_type() - Get the security type
  3125. * @peer: Datapath peer handle
  3126. * @sec_idx: Security id (mcast, ucast)
  3127. *
  3128. * return sec_type: Security type
  3129. */
  3130. static int dp_get_sec_type(struct cdp_peer *peer, uint8_t sec_idx)
  3131. {
  3132. struct dp_peer *dpeer = (struct dp_peer *)peer;
  3133. return dpeer->security[sec_idx].sec_type;
  3134. }
  3135. /*
  3136. * dp_peer_authorize() - authorize txrx peer
  3137. * @peer_handle: Datapath peer handle
  3138. * @authorize
  3139. *
  3140. */
  3141. static void dp_peer_authorize(struct cdp_peer *peer_handle, uint32_t authorize)
  3142. {
  3143. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3144. struct dp_soc *soc;
  3145. if (peer != NULL) {
  3146. soc = peer->vdev->pdev->soc;
  3147. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3148. dp_son_peer_authorize(peer);
  3149. peer->authorize = authorize ? 1 : 0;
  3150. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3151. }
  3152. }
  3153. #ifdef QCA_SUPPORT_SON
  3154. /*
  3155. * dp_txrx_update_inact_threshold() - Update inact timer threshold
  3156. * @pdev_handle: Device handle
  3157. * @new_threshold : updated threshold value
  3158. *
  3159. */
  3160. static void
  3161. dp_txrx_update_inact_threshold(struct cdp_pdev *pdev_handle,
  3162. u_int16_t new_threshold)
  3163. {
  3164. struct dp_vdev *vdev;
  3165. struct dp_peer *peer;
  3166. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3167. struct dp_soc *soc = pdev->soc;
  3168. u_int16_t old_threshold = soc->pdev_bs_inact_reload;
  3169. if (old_threshold == new_threshold)
  3170. return;
  3171. soc->pdev_bs_inact_reload = new_threshold;
  3172. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3173. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3174. if (vdev->opmode != wlan_op_mode_ap)
  3175. continue;
  3176. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3177. if (!peer->authorize)
  3178. continue;
  3179. if (old_threshold - peer->peer_bs_inact >=
  3180. new_threshold) {
  3181. dp_mark_peer_inact((void *)peer, true);
  3182. peer->peer_bs_inact = 0;
  3183. } else {
  3184. peer->peer_bs_inact = new_threshold -
  3185. (old_threshold - peer->peer_bs_inact);
  3186. }
  3187. }
  3188. }
  3189. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3190. }
  3191. /**
  3192. * dp_txrx_reset_inact_count(): Reset inact count
  3193. * @pdev_handle - device handle
  3194. *
  3195. * Return: void
  3196. */
  3197. static void
  3198. dp_txrx_reset_inact_count(struct cdp_pdev *pdev_handle)
  3199. {
  3200. struct dp_vdev *vdev = NULL;
  3201. struct dp_peer *peer = NULL;
  3202. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3203. struct dp_soc *soc = pdev->soc;
  3204. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3205. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3206. if (vdev->opmode != wlan_op_mode_ap)
  3207. continue;
  3208. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3209. if (!peer->authorize)
  3210. continue;
  3211. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  3212. }
  3213. }
  3214. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3215. }
  3216. /**
  3217. * dp_set_inact_params(): set inactivity params
  3218. * @pdev_handle - device handle
  3219. * @inact_check_interval - inactivity interval
  3220. * @inact_normal - Inactivity normal
  3221. * @inact_overload - Inactivity overload
  3222. *
  3223. * Return: bool
  3224. */
  3225. bool dp_set_inact_params(struct cdp_pdev *pdev_handle,
  3226. u_int16_t inact_check_interval,
  3227. u_int16_t inact_normal, u_int16_t inact_overload)
  3228. {
  3229. struct dp_soc *soc;
  3230. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3231. if (!pdev)
  3232. return false;
  3233. soc = pdev->soc;
  3234. if (!soc)
  3235. return false;
  3236. soc->pdev_bs_inact_interval = inact_check_interval;
  3237. soc->pdev_bs_inact_normal = inact_normal;
  3238. soc->pdev_bs_inact_overload = inact_overload;
  3239. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3240. soc->pdev_bs_inact_normal);
  3241. return true;
  3242. }
  3243. /**
  3244. * dp_start_inact_timer(): Inactivity timer start
  3245. * @pdev_handle - device handle
  3246. * @enable - Inactivity timer start/stop
  3247. *
  3248. * Return: bool
  3249. */
  3250. bool dp_start_inact_timer(struct cdp_pdev *pdev_handle, bool enable)
  3251. {
  3252. struct dp_soc *soc;
  3253. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3254. if (!pdev)
  3255. return false;
  3256. soc = pdev->soc;
  3257. if (!soc)
  3258. return false;
  3259. if (enable) {
  3260. dp_txrx_reset_inact_count((struct cdp_pdev *)pdev);
  3261. qdf_timer_mod(&soc->pdev_bs_inact_timer,
  3262. soc->pdev_bs_inact_interval * 1000);
  3263. } else {
  3264. qdf_timer_stop(&soc->pdev_bs_inact_timer);
  3265. }
  3266. return true;
  3267. }
  3268. /**
  3269. * dp_set_overload(): Set inactivity overload
  3270. * @pdev_handle - device handle
  3271. * @overload - overload status
  3272. *
  3273. * Return: void
  3274. */
  3275. void dp_set_overload(struct cdp_pdev *pdev_handle, bool overload)
  3276. {
  3277. struct dp_soc *soc;
  3278. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3279. if (!pdev)
  3280. return;
  3281. soc = pdev->soc;
  3282. if (!soc)
  3283. return;
  3284. dp_txrx_update_inact_threshold((struct cdp_pdev *)pdev,
  3285. overload ? soc->pdev_bs_inact_overload :
  3286. soc->pdev_bs_inact_normal);
  3287. }
  3288. /**
  3289. * dp_peer_is_inact(): check whether peer is inactive
  3290. * @peer_handle - datapath peer handle
  3291. *
  3292. * Return: bool
  3293. */
  3294. bool dp_peer_is_inact(void *peer_handle)
  3295. {
  3296. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3297. if (!peer)
  3298. return false;
  3299. return peer->peer_bs_inact_flag == 1;
  3300. }
  3301. /**
  3302. * dp_init_inact_timer: initialize the inact timer
  3303. * @soc - SOC handle
  3304. *
  3305. * Return: void
  3306. */
  3307. void dp_init_inact_timer(struct dp_soc *soc)
  3308. {
  3309. qdf_timer_init(soc->osdev, &soc->pdev_bs_inact_timer,
  3310. dp_txrx_peer_find_inact_timeout_handler,
  3311. (void *)soc, QDF_TIMER_TYPE_WAKE_APPS);
  3312. }
  3313. #else
  3314. bool dp_set_inact_params(struct cdp_pdev *pdev, u_int16_t inact_check_interval,
  3315. u_int16_t inact_normal, u_int16_t inact_overload)
  3316. {
  3317. return false;
  3318. }
  3319. bool dp_start_inact_timer(struct cdp_pdev *pdev, bool enable)
  3320. {
  3321. return false;
  3322. }
  3323. void dp_set_overload(struct cdp_pdev *pdev, bool overload)
  3324. {
  3325. return;
  3326. }
  3327. void dp_init_inact_timer(struct dp_soc *soc)
  3328. {
  3329. return;
  3330. }
  3331. bool dp_peer_is_inact(void *peer)
  3332. {
  3333. return false;
  3334. }
  3335. #endif
  3336. /*
  3337. * dp_peer_unref_delete() - unref and delete peer
  3338. * @peer_handle: Datapath peer handle
  3339. *
  3340. */
  3341. void dp_peer_unref_delete(void *peer_handle)
  3342. {
  3343. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3344. struct dp_peer *bss_peer = NULL;
  3345. struct dp_vdev *vdev = peer->vdev;
  3346. struct dp_pdev *pdev = vdev->pdev;
  3347. struct dp_soc *soc = pdev->soc;
  3348. struct dp_peer *tmppeer;
  3349. int found = 0;
  3350. uint16_t peer_id;
  3351. uint16_t vdev_id;
  3352. /*
  3353. * Hold the lock all the way from checking if the peer ref count
  3354. * is zero until the peer references are removed from the hash
  3355. * table and vdev list (if the peer ref count is zero).
  3356. * This protects against a new HL tx operation starting to use the
  3357. * peer object just after this function concludes it's done being used.
  3358. * Furthermore, the lock needs to be held while checking whether the
  3359. * vdev's list of peers is empty, to make sure that list is not modified
  3360. * concurrently with the empty check.
  3361. */
  3362. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  3363. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3364. "%s: peer %pK ref_cnt(before decrement): %d\n", __func__,
  3365. peer, qdf_atomic_read(&peer->ref_cnt));
  3366. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  3367. peer_id = peer->peer_ids[0];
  3368. vdev_id = vdev->vdev_id;
  3369. /*
  3370. * Make sure that the reference to the peer in
  3371. * peer object map is removed
  3372. */
  3373. if (peer_id != HTT_INVALID_PEER)
  3374. soc->peer_id_to_obj_map[peer_id] = NULL;
  3375. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3376. "Deleting peer %pK (%pM)", peer, peer->mac_addr.raw);
  3377. /* remove the reference to the peer from the hash table */
  3378. dp_peer_find_hash_remove(soc, peer);
  3379. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  3380. if (tmppeer == peer) {
  3381. found = 1;
  3382. break;
  3383. }
  3384. }
  3385. if (found) {
  3386. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  3387. peer_list_elem);
  3388. } else {
  3389. /*Ignoring the remove operation as peer not found*/
  3390. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  3391. "peer %pK not found in vdev (%pK)->peer_list:%pK",
  3392. peer, vdev, &peer->vdev->peer_list);
  3393. }
  3394. /* cleanup the peer data */
  3395. dp_peer_cleanup(vdev, peer);
  3396. /* check whether the parent vdev has no peers left */
  3397. if (TAILQ_EMPTY(&vdev->peer_list)) {
  3398. /*
  3399. * Now that there are no references to the peer, we can
  3400. * release the peer reference lock.
  3401. */
  3402. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3403. /*
  3404. * Check if the parent vdev was waiting for its peers
  3405. * to be deleted, in order for it to be deleted too.
  3406. */
  3407. if (vdev->delete.pending) {
  3408. ol_txrx_vdev_delete_cb vdev_delete_cb =
  3409. vdev->delete.callback;
  3410. void *vdev_delete_context =
  3411. vdev->delete.context;
  3412. QDF_TRACE(QDF_MODULE_ID_DP,
  3413. QDF_TRACE_LEVEL_INFO_HIGH,
  3414. FL("deleting vdev object %pK (%pM)"
  3415. " - its last peer is done"),
  3416. vdev, vdev->mac_addr.raw);
  3417. /* all peers are gone, go ahead and delete it */
  3418. dp_tx_flow_pool_unmap_handler(pdev, vdev_id,
  3419. FLOW_TYPE_VDEV,
  3420. vdev_id);
  3421. dp_tx_vdev_detach(vdev);
  3422. QDF_TRACE(QDF_MODULE_ID_DP,
  3423. QDF_TRACE_LEVEL_INFO_HIGH,
  3424. FL("deleting vdev object %pK (%pM)"),
  3425. vdev, vdev->mac_addr.raw);
  3426. qdf_mem_free(vdev);
  3427. vdev = NULL;
  3428. if (vdev_delete_cb)
  3429. vdev_delete_cb(vdev_delete_context);
  3430. }
  3431. } else {
  3432. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3433. }
  3434. if (vdev) {
  3435. if (vdev->vap_bss_peer == peer) {
  3436. vdev->vap_bss_peer = NULL;
  3437. }
  3438. }
  3439. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  3440. soc->cdp_soc.ol_ops->peer_unref_delete(pdev->osif_pdev,
  3441. vdev_id, peer->mac_addr.raw);
  3442. }
  3443. if (!vdev || !vdev->vap_bss_peer) {
  3444. goto free_peer;
  3445. }
  3446. #ifdef notyet
  3447. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  3448. #else
  3449. bss_peer = vdev->vap_bss_peer;
  3450. DP_UPDATE_STATS(bss_peer, peer);
  3451. free_peer:
  3452. qdf_mem_free(peer);
  3453. #endif
  3454. } else {
  3455. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  3456. }
  3457. }
  3458. /*
  3459. * dp_peer_detach_wifi3() – Detach txrx peer
  3460. * @peer_handle: Datapath peer handle
  3461. * @bitmap: bitmap indicating special handling of request.
  3462. *
  3463. */
  3464. static void dp_peer_delete_wifi3(void *peer_handle, uint32_t bitmap)
  3465. {
  3466. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3467. /* redirect the peer's rx delivery function to point to a
  3468. * discard func
  3469. */
  3470. peer->rx_opt_proc = dp_rx_discard;
  3471. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  3472. FL("peer %pK (%pM)"), peer, peer->mac_addr.raw);
  3473. #ifndef CONFIG_WIN
  3474. dp_local_peer_id_free(peer->vdev->pdev, peer);
  3475. #endif
  3476. qdf_spinlock_destroy(&peer->peer_info_lock);
  3477. /*
  3478. * Remove the reference added during peer_attach.
  3479. * The peer will still be left allocated until the
  3480. * PEER_UNMAP message arrives to remove the other
  3481. * reference, added by the PEER_MAP message.
  3482. */
  3483. dp_peer_unref_delete(peer_handle);
  3484. }
  3485. /*
  3486. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  3487. * @peer_handle: Datapath peer handle
  3488. *
  3489. */
  3490. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  3491. {
  3492. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3493. return vdev->mac_addr.raw;
  3494. }
  3495. /*
  3496. * dp_vdev_set_wds() - Enable per packet stats
  3497. * @vdev_handle: DP VDEV handle
  3498. * @val: value
  3499. *
  3500. * Return: none
  3501. */
  3502. static int dp_vdev_set_wds(void *vdev_handle, uint32_t val)
  3503. {
  3504. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3505. vdev->wds_enabled = val;
  3506. return 0;
  3507. }
  3508. /*
  3509. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  3510. * @peer_handle: Datapath peer handle
  3511. *
  3512. */
  3513. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  3514. uint8_t vdev_id)
  3515. {
  3516. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  3517. struct dp_vdev *vdev = NULL;
  3518. if (qdf_unlikely(!pdev))
  3519. return NULL;
  3520. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3521. if (vdev->vdev_id == vdev_id)
  3522. break;
  3523. }
  3524. return (struct cdp_vdev *)vdev;
  3525. }
  3526. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  3527. {
  3528. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3529. return vdev->opmode;
  3530. }
  3531. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  3532. {
  3533. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  3534. struct dp_pdev *pdev = vdev->pdev;
  3535. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  3536. }
  3537. /**
  3538. * dp_reset_monitor_mode() - Disable monitor mode
  3539. * @pdev_handle: Datapath PDEV handle
  3540. *
  3541. * Return: 0 on success, not 0 on failure
  3542. */
  3543. static int dp_reset_monitor_mode(struct cdp_pdev *pdev_handle)
  3544. {
  3545. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3546. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3547. struct dp_soc *soc;
  3548. uint8_t pdev_id;
  3549. pdev_id = pdev->pdev_id;
  3550. soc = pdev->soc;
  3551. pdev->monitor_vdev = NULL;
  3552. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3553. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3554. pdev->rxdma_mon_buf_ring.hal_srng,
  3555. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3556. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3557. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3558. RX_BUFFER_SIZE, &htt_tlv_filter);
  3559. return 0;
  3560. }
  3561. /**
  3562. * dp_set_nac() - set peer_nac
  3563. * @peer_handle: Datapath PEER handle
  3564. *
  3565. * Return: void
  3566. */
  3567. static void dp_set_nac(struct cdp_peer *peer_handle)
  3568. {
  3569. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  3570. peer->nac = 1;
  3571. }
  3572. /**
  3573. * dp_get_tx_pending() - read pending tx
  3574. * @pdev_handle: Datapath PDEV handle
  3575. *
  3576. * Return: outstanding tx
  3577. */
  3578. static int dp_get_tx_pending(struct cdp_pdev *pdev_handle)
  3579. {
  3580. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3581. return qdf_atomic_read(&pdev->num_tx_outstanding);
  3582. }
  3583. /**
  3584. * dp_get_peer_mac_from_peer_id() - get peer mac
  3585. * @pdev_handle: Datapath PDEV handle
  3586. * @peer_id: Peer ID
  3587. * @peer_mac: MAC addr of PEER
  3588. *
  3589. * Return: void
  3590. */
  3591. static void dp_get_peer_mac_from_peer_id(struct cdp_pdev *pdev_handle,
  3592. uint32_t peer_id, uint8_t *peer_mac)
  3593. {
  3594. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3595. struct dp_peer *peer;
  3596. if (pdev && peer_mac) {
  3597. peer = dp_peer_find_by_id(pdev->soc, (uint16_t)peer_id);
  3598. if (peer && peer->mac_addr.raw) {
  3599. qdf_mem_copy(peer_mac, peer->mac_addr.raw,
  3600. DP_MAC_ADDR_LEN);
  3601. }
  3602. }
  3603. }
  3604. /**
  3605. * dp_vdev_set_monitor_mode() - Set DP VDEV to monitor mode
  3606. * @vdev_handle: Datapath VDEV handle
  3607. * @smart_monitor: Flag to denote if its smart monitor mode
  3608. *
  3609. * Return: 0 on success, not 0 on failure
  3610. */
  3611. static int dp_vdev_set_monitor_mode(struct cdp_vdev *vdev_handle,
  3612. uint8_t smart_monitor)
  3613. {
  3614. /* Many monitor VAPs can exists in a system but only one can be up at
  3615. * anytime
  3616. */
  3617. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3618. struct dp_pdev *pdev;
  3619. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3620. struct dp_soc *soc;
  3621. uint8_t pdev_id;
  3622. qdf_assert(vdev);
  3623. pdev = vdev->pdev;
  3624. pdev_id = pdev->pdev_id;
  3625. soc = pdev->soc;
  3626. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3627. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3628. pdev, pdev_id, soc, vdev);
  3629. /*Check if current pdev's monitor_vdev exists */
  3630. if (pdev->monitor_vdev) {
  3631. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3632. "vdev=%pK\n", vdev);
  3633. qdf_assert(vdev);
  3634. }
  3635. pdev->monitor_vdev = vdev;
  3636. /* If smart monitor mode, do not configure monitor ring */
  3637. if (smart_monitor)
  3638. return QDF_STATUS_SUCCESS;
  3639. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3640. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3641. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3642. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3643. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3644. pdev->mo_data_filter);
  3645. htt_tlv_filter.mpdu_start = 1;
  3646. htt_tlv_filter.msdu_start = 1;
  3647. htt_tlv_filter.packet = 1;
  3648. htt_tlv_filter.msdu_end = 1;
  3649. htt_tlv_filter.mpdu_end = 1;
  3650. htt_tlv_filter.packet_header = 1;
  3651. htt_tlv_filter.attention = 1;
  3652. htt_tlv_filter.ppdu_start = 0;
  3653. htt_tlv_filter.ppdu_end = 0;
  3654. htt_tlv_filter.ppdu_end_user_stats = 0;
  3655. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3656. htt_tlv_filter.ppdu_end_status_done = 0;
  3657. htt_tlv_filter.header_per_msdu = 1;
  3658. htt_tlv_filter.enable_fp =
  3659. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3660. htt_tlv_filter.enable_md = 0;
  3661. htt_tlv_filter.enable_mo =
  3662. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3663. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3664. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3665. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3666. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3667. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3668. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3669. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3670. pdev->rxdma_mon_buf_ring.hal_srng,
  3671. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3672. htt_tlv_filter.mpdu_start = 1;
  3673. htt_tlv_filter.msdu_start = 1;
  3674. htt_tlv_filter.packet = 0;
  3675. htt_tlv_filter.msdu_end = 1;
  3676. htt_tlv_filter.mpdu_end = 1;
  3677. htt_tlv_filter.packet_header = 1;
  3678. htt_tlv_filter.attention = 1;
  3679. htt_tlv_filter.ppdu_start = 1;
  3680. htt_tlv_filter.ppdu_end = 1;
  3681. htt_tlv_filter.ppdu_end_user_stats = 1;
  3682. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3683. htt_tlv_filter.ppdu_end_status_done = 1;
  3684. htt_tlv_filter.header_per_msdu = 0;
  3685. htt_tlv_filter.enable_fp =
  3686. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3687. htt_tlv_filter.enable_md = 0;
  3688. htt_tlv_filter.enable_mo =
  3689. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3690. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3691. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3692. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3693. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3694. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3695. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3696. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3697. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3698. RX_BUFFER_SIZE, &htt_tlv_filter);
  3699. return QDF_STATUS_SUCCESS;
  3700. }
  3701. /**
  3702. * dp_pdev_set_advance_monitor_filter() - Set DP PDEV monitor filter
  3703. * @pdev_handle: Datapath PDEV handle
  3704. * @filter_val: Flag to select Filter for monitor mode
  3705. * Return: 0 on success, not 0 on failure
  3706. */
  3707. static int dp_pdev_set_advance_monitor_filter(struct cdp_pdev *pdev_handle,
  3708. struct cdp_monitor_filter *filter_val)
  3709. {
  3710. /* Many monitor VAPs can exists in a system but only one can be up at
  3711. * anytime
  3712. */
  3713. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3714. struct dp_vdev *vdev = pdev->monitor_vdev;
  3715. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  3716. struct dp_soc *soc;
  3717. uint8_t pdev_id;
  3718. pdev_id = pdev->pdev_id;
  3719. soc = pdev->soc;
  3720. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  3721. "pdev=%pK, pdev_id=%d, soc=%pK vdev=%pK\n",
  3722. pdev, pdev_id, soc, vdev);
  3723. /*Check if current pdev's monitor_vdev exists */
  3724. if (!pdev->monitor_vdev) {
  3725. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  3726. "vdev=%pK\n", vdev);
  3727. qdf_assert(vdev);
  3728. }
  3729. /* update filter mode, type in pdev structure */
  3730. pdev->mon_filter_mode = filter_val->mode;
  3731. pdev->fp_mgmt_filter = filter_val->fp_mgmt;
  3732. pdev->fp_ctrl_filter = filter_val->fp_ctrl;
  3733. pdev->fp_data_filter = filter_val->fp_data;
  3734. pdev->mo_mgmt_filter = filter_val->mo_mgmt;
  3735. pdev->mo_ctrl_filter = filter_val->mo_ctrl;
  3736. pdev->mo_data_filter = filter_val->mo_data;
  3737. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  3738. "MODE[%x] FP[%02x|%02x|%02x] MO[%02x|%02x|%02x]\n",
  3739. pdev->mon_filter_mode, pdev->fp_mgmt_filter,
  3740. pdev->fp_ctrl_filter, pdev->fp_data_filter,
  3741. pdev->mo_mgmt_filter, pdev->mo_ctrl_filter,
  3742. pdev->mo_data_filter);
  3743. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  3744. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3745. pdev->rxdma_mon_buf_ring.hal_srng,
  3746. RXDMA_MONITOR_BUF, RX_BUFFER_SIZE, &htt_tlv_filter);
  3747. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3748. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3749. RX_BUFFER_SIZE, &htt_tlv_filter);
  3750. htt_tlv_filter.mpdu_start = 1;
  3751. htt_tlv_filter.msdu_start = 1;
  3752. htt_tlv_filter.packet = 1;
  3753. htt_tlv_filter.msdu_end = 1;
  3754. htt_tlv_filter.mpdu_end = 1;
  3755. htt_tlv_filter.packet_header = 1;
  3756. htt_tlv_filter.attention = 1;
  3757. htt_tlv_filter.ppdu_start = 0;
  3758. htt_tlv_filter.ppdu_end = 0;
  3759. htt_tlv_filter.ppdu_end_user_stats = 0;
  3760. htt_tlv_filter.ppdu_end_user_stats_ext = 0;
  3761. htt_tlv_filter.ppdu_end_status_done = 0;
  3762. htt_tlv_filter.header_per_msdu = 1;
  3763. htt_tlv_filter.enable_fp =
  3764. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3765. htt_tlv_filter.enable_md = 0;
  3766. htt_tlv_filter.enable_mo =
  3767. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3768. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3769. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3770. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3771. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3772. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3773. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3774. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3775. pdev->rxdma_mon_buf_ring.hal_srng, RXDMA_MONITOR_BUF,
  3776. RX_BUFFER_SIZE, &htt_tlv_filter);
  3777. htt_tlv_filter.mpdu_start = 1;
  3778. htt_tlv_filter.msdu_start = 1;
  3779. htt_tlv_filter.packet = 0;
  3780. htt_tlv_filter.msdu_end = 1;
  3781. htt_tlv_filter.mpdu_end = 1;
  3782. htt_tlv_filter.packet_header = 1;
  3783. htt_tlv_filter.attention = 1;
  3784. htt_tlv_filter.ppdu_start = 1;
  3785. htt_tlv_filter.ppdu_end = 1;
  3786. htt_tlv_filter.ppdu_end_user_stats = 1;
  3787. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  3788. htt_tlv_filter.ppdu_end_status_done = 1;
  3789. htt_tlv_filter.header_per_msdu = 0;
  3790. htt_tlv_filter.enable_fp =
  3791. (pdev->mon_filter_mode & MON_FILTER_PASS) ? 1 : 0;
  3792. htt_tlv_filter.enable_md = 0;
  3793. htt_tlv_filter.enable_mo =
  3794. (pdev->mon_filter_mode & MON_FILTER_OTHER) ? 1 : 0;
  3795. htt_tlv_filter.fp_mgmt_filter = pdev->fp_mgmt_filter;
  3796. htt_tlv_filter.fp_ctrl_filter = pdev->fp_ctrl_filter;
  3797. htt_tlv_filter.fp_data_filter = pdev->fp_data_filter;
  3798. htt_tlv_filter.mo_mgmt_filter = pdev->mo_mgmt_filter;
  3799. htt_tlv_filter.mo_ctrl_filter = pdev->mo_ctrl_filter;
  3800. htt_tlv_filter.mo_data_filter = pdev->mo_data_filter;
  3801. htt_h2t_rx_ring_cfg(soc->htt_handle, pdev_id,
  3802. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  3803. RX_BUFFER_SIZE, &htt_tlv_filter);
  3804. return QDF_STATUS_SUCCESS;
  3805. }
  3806. /**
  3807. * dp_get_pdev_id_frm_pdev() - get pdev_id
  3808. * @pdev_handle: Datapath PDEV handle
  3809. *
  3810. * Return: pdev_id
  3811. */
  3812. static
  3813. uint8_t dp_get_pdev_id_frm_pdev(struct cdp_pdev *pdev_handle)
  3814. {
  3815. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  3816. return pdev->pdev_id;
  3817. }
  3818. /**
  3819. * dp_vdev_get_filter_ucast_data() - get DP VDEV monitor ucast filter
  3820. * @vdev_handle: Datapath VDEV handle
  3821. * Return: true on ucast filter flag set
  3822. */
  3823. static bool dp_vdev_get_filter_ucast_data(struct cdp_vdev *vdev_handle)
  3824. {
  3825. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3826. struct dp_pdev *pdev;
  3827. pdev = vdev->pdev;
  3828. if ((pdev->fp_data_filter & FILTER_DATA_UCAST) ||
  3829. (pdev->mo_data_filter & FILTER_DATA_UCAST))
  3830. return true;
  3831. return false;
  3832. }
  3833. /**
  3834. * dp_vdev_get_filter_mcast_data() - get DP VDEV monitor mcast filter
  3835. * @vdev_handle: Datapath VDEV handle
  3836. * Return: true on mcast filter flag set
  3837. */
  3838. static bool dp_vdev_get_filter_mcast_data(struct cdp_vdev *vdev_handle)
  3839. {
  3840. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3841. struct dp_pdev *pdev;
  3842. pdev = vdev->pdev;
  3843. if ((pdev->fp_data_filter & FILTER_DATA_MCAST) ||
  3844. (pdev->mo_data_filter & FILTER_DATA_MCAST))
  3845. return true;
  3846. return false;
  3847. }
  3848. /**
  3849. * dp_vdev_get_filter_non_data() - get DP VDEV monitor non_data filter
  3850. * @vdev_handle: Datapath VDEV handle
  3851. * Return: true on non data filter flag set
  3852. */
  3853. static bool dp_vdev_get_filter_non_data(struct cdp_vdev *vdev_handle)
  3854. {
  3855. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  3856. struct dp_pdev *pdev;
  3857. pdev = vdev->pdev;
  3858. if ((pdev->fp_mgmt_filter & FILTER_MGMT_ALL) ||
  3859. (pdev->mo_mgmt_filter & FILTER_MGMT_ALL)) {
  3860. if ((pdev->fp_ctrl_filter & FILTER_CTRL_ALL) ||
  3861. (pdev->mo_ctrl_filter & FILTER_CTRL_ALL)) {
  3862. return true;
  3863. }
  3864. }
  3865. return false;
  3866. }
  3867. #ifdef MESH_MODE_SUPPORT
  3868. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  3869. {
  3870. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3871. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3872. FL("val %d"), val);
  3873. vdev->mesh_vdev = val;
  3874. }
  3875. /*
  3876. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  3877. * @vdev_hdl: virtual device object
  3878. * @val: value to be set
  3879. *
  3880. * Return: void
  3881. */
  3882. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  3883. {
  3884. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  3885. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  3886. FL("val %d"), val);
  3887. vdev->mesh_rx_filter = val;
  3888. }
  3889. #endif
  3890. /*
  3891. * dp_aggregate_pdev_ctrl_frames_stats()- function to agreegate peer stats
  3892. * Current scope is bar recieved count
  3893. *
  3894. * @pdev_handle: DP_PDEV handle
  3895. *
  3896. * Return: void
  3897. */
  3898. #define STATS_PROC_TIMEOUT (HZ/1000)
  3899. static void
  3900. dp_aggregate_pdev_ctrl_frames_stats(struct dp_pdev *pdev)
  3901. {
  3902. struct dp_vdev *vdev;
  3903. struct dp_peer *peer;
  3904. uint32_t waitcnt;
  3905. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3906. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  3907. if (!peer) {
  3908. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3909. FL("DP Invalid Peer refernce"));
  3910. return;
  3911. }
  3912. if (peer->delete_in_progress) {
  3913. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  3914. FL("DP Peer deletion in progress"));
  3915. continue;
  3916. }
  3917. qdf_atomic_inc(&peer->ref_cnt);
  3918. waitcnt = 0;
  3919. dp_peer_rxtid_stats(peer, dp_rx_bar_stats_cb, pdev);
  3920. while (!(qdf_atomic_read(&(pdev->stats_cmd_complete)))
  3921. && waitcnt < 10) {
  3922. schedule_timeout_interruptible(
  3923. STATS_PROC_TIMEOUT);
  3924. waitcnt++;
  3925. }
  3926. qdf_atomic_set(&(pdev->stats_cmd_complete), 0);
  3927. dp_peer_unref_delete(peer);
  3928. }
  3929. }
  3930. }
  3931. /**
  3932. * dp_rx_bar_stats_cb(): BAR received stats callback
  3933. * @soc: SOC handle
  3934. * @cb_ctxt: Call back context
  3935. * @reo_status: Reo status
  3936. *
  3937. * return: void
  3938. */
  3939. void dp_rx_bar_stats_cb(struct dp_soc *soc, void *cb_ctxt,
  3940. union hal_reo_status *reo_status)
  3941. {
  3942. struct dp_pdev *pdev = (struct dp_pdev *)cb_ctxt;
  3943. struct hal_reo_queue_status *queue_status = &(reo_status->queue_status);
  3944. if (queue_status->header.status != HAL_REO_CMD_SUCCESS) {
  3945. DP_TRACE_STATS(FATAL, "REO stats failure %d \n",
  3946. queue_status->header.status);
  3947. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  3948. return;
  3949. }
  3950. pdev->stats.rx.bar_recv_cnt += queue_status->bar_rcvd_cnt;
  3951. qdf_atomic_set(&(pdev->stats_cmd_complete), 1);
  3952. }
  3953. /**
  3954. * dp_aggregate_vdev_stats(): Consolidate stats at VDEV level
  3955. * @vdev: DP VDEV handle
  3956. *
  3957. * return: void
  3958. */
  3959. void dp_aggregate_vdev_stats(struct dp_vdev *vdev)
  3960. {
  3961. struct dp_peer *peer = NULL;
  3962. struct dp_soc *soc = vdev->pdev->soc;
  3963. qdf_mem_set(&(vdev->stats.tx), sizeof(vdev->stats.tx), 0x0);
  3964. qdf_mem_set(&(vdev->stats.rx), sizeof(vdev->stats.rx), 0x0);
  3965. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem)
  3966. DP_UPDATE_STATS(vdev, peer);
  3967. if (soc->cdp_soc.ol_ops->update_dp_stats)
  3968. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  3969. &vdev->stats, (uint16_t) vdev->vdev_id,
  3970. UPDATE_VDEV_STATS);
  3971. }
  3972. /**
  3973. * dp_aggregate_pdev_stats(): Consolidate stats at PDEV level
  3974. * @pdev: DP PDEV handle
  3975. *
  3976. * return: void
  3977. */
  3978. static inline void dp_aggregate_pdev_stats(struct dp_pdev *pdev)
  3979. {
  3980. struct dp_vdev *vdev = NULL;
  3981. struct dp_soc *soc = pdev->soc;
  3982. qdf_mem_set(&(pdev->stats.tx), sizeof(pdev->stats.tx), 0x0);
  3983. qdf_mem_set(&(pdev->stats.rx), sizeof(pdev->stats.rx), 0x0);
  3984. qdf_mem_set(&(pdev->stats.tx_i), sizeof(pdev->stats.tx_i), 0x0);
  3985. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  3986. dp_aggregate_vdev_stats(vdev);
  3987. DP_UPDATE_STATS(pdev, vdev);
  3988. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.nawds_mcast);
  3989. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.rcvd);
  3990. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.processed);
  3991. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.reinject_pkts);
  3992. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.inspect_pkts);
  3993. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.raw.raw_pkt);
  3994. DP_STATS_AGGR(pdev, vdev, tx_i.raw.dma_map_error);
  3995. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.tso.tso_pkt);
  3996. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_host);
  3997. DP_STATS_AGGR(pdev, vdev, tx_i.tso.dropped_target);
  3998. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_host);
  3999. DP_STATS_AGGR(pdev, vdev, tx_i.sg.dropped_target);
  4000. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.sg.sg_pkt);
  4001. DP_STATS_AGGR_PKT(pdev, vdev, tx_i.mcast_en.mcast_pkt);
  4002. DP_STATS_AGGR(pdev, vdev,
  4003. tx_i.mcast_en.dropped_map_error);
  4004. DP_STATS_AGGR(pdev, vdev,
  4005. tx_i.mcast_en.dropped_self_mac);
  4006. DP_STATS_AGGR(pdev, vdev,
  4007. tx_i.mcast_en.dropped_send_fail);
  4008. DP_STATS_AGGR(pdev, vdev, tx_i.mcast_en.ucast);
  4009. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.dma_error);
  4010. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.ring_full);
  4011. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.enqueue_fail);
  4012. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.desc_na);
  4013. DP_STATS_AGGR(pdev, vdev, tx_i.dropped.res_full);
  4014. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified);
  4015. DP_STATS_AGGR(pdev, vdev, tx_i.cce_classified_raw);
  4016. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.exception_fw);
  4017. DP_STATS_AGGR(pdev, vdev, tx_i.mesh.completion_fw);
  4018. pdev->stats.tx_i.dropped.dropped_pkt.num =
  4019. pdev->stats.tx_i.dropped.dma_error +
  4020. pdev->stats.tx_i.dropped.ring_full +
  4021. pdev->stats.tx_i.dropped.enqueue_fail +
  4022. pdev->stats.tx_i.dropped.desc_na +
  4023. pdev->stats.tx_i.dropped.res_full;
  4024. pdev->stats.tx.last_ack_rssi =
  4025. vdev->stats.tx.last_ack_rssi;
  4026. pdev->stats.tx_i.tso.num_seg =
  4027. vdev->stats.tx_i.tso.num_seg;
  4028. }
  4029. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4030. soc->cdp_soc.ol_ops->update_dp_stats(pdev->osif_pdev,
  4031. &pdev->stats, pdev->pdev_id, UPDATE_PDEV_STATS);
  4032. }
  4033. /**
  4034. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  4035. * @pdev: DP_PDEV Handle
  4036. *
  4037. * Return:void
  4038. */
  4039. static inline void
  4040. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  4041. {
  4042. uint8_t index = 0;
  4043. DP_PRINT_STATS("PDEV Tx Stats:\n");
  4044. DP_PRINT_STATS("Received From Stack:");
  4045. DP_PRINT_STATS(" Packets = %d",
  4046. pdev->stats.tx_i.rcvd.num);
  4047. DP_PRINT_STATS(" Bytes = %llu",
  4048. pdev->stats.tx_i.rcvd.bytes);
  4049. DP_PRINT_STATS("Processed:");
  4050. DP_PRINT_STATS(" Packets = %d",
  4051. pdev->stats.tx_i.processed.num);
  4052. DP_PRINT_STATS(" Bytes = %llu",
  4053. pdev->stats.tx_i.processed.bytes);
  4054. DP_PRINT_STATS("Total Completions:");
  4055. DP_PRINT_STATS(" Packets = %u",
  4056. pdev->stats.tx.comp_pkt.num);
  4057. DP_PRINT_STATS(" Bytes = %llu",
  4058. pdev->stats.tx.comp_pkt.bytes);
  4059. DP_PRINT_STATS("Successful Completions:");
  4060. DP_PRINT_STATS(" Packets = %u",
  4061. pdev->stats.tx.tx_success.num);
  4062. DP_PRINT_STATS(" Bytes = %llu",
  4063. pdev->stats.tx.tx_success.bytes);
  4064. DP_PRINT_STATS("Dropped:");
  4065. DP_PRINT_STATS(" Total = %d",
  4066. pdev->stats.tx_i.dropped.dropped_pkt.num);
  4067. DP_PRINT_STATS(" Dma_map_error = %d",
  4068. pdev->stats.tx_i.dropped.dma_error);
  4069. DP_PRINT_STATS(" Ring Full = %d",
  4070. pdev->stats.tx_i.dropped.ring_full);
  4071. DP_PRINT_STATS(" Descriptor Not available = %d",
  4072. pdev->stats.tx_i.dropped.desc_na);
  4073. DP_PRINT_STATS(" HW enqueue failed= %d",
  4074. pdev->stats.tx_i.dropped.enqueue_fail);
  4075. DP_PRINT_STATS(" Resources Full = %d",
  4076. pdev->stats.tx_i.dropped.res_full);
  4077. DP_PRINT_STATS(" FW removed = %d",
  4078. pdev->stats.tx.dropped.fw_rem);
  4079. DP_PRINT_STATS(" FW removed transmitted = %d",
  4080. pdev->stats.tx.dropped.fw_rem_tx);
  4081. DP_PRINT_STATS(" FW removed untransmitted = %d",
  4082. pdev->stats.tx.dropped.fw_rem_notx);
  4083. DP_PRINT_STATS(" FW removed untransmitted fw_reason1 = %d",
  4084. pdev->stats.tx.dropped.fw_reason1);
  4085. DP_PRINT_STATS(" FW removed untransmitted fw_reason2 = %d",
  4086. pdev->stats.tx.dropped.fw_reason2);
  4087. DP_PRINT_STATS(" FW removed untransmitted fw_reason3 = %d",
  4088. pdev->stats.tx.dropped.fw_reason3);
  4089. DP_PRINT_STATS(" Aged Out from msdu/mpdu queues = %d",
  4090. pdev->stats.tx.dropped.age_out);
  4091. DP_PRINT_STATS("Scatter Gather:");
  4092. DP_PRINT_STATS(" Packets = %d",
  4093. pdev->stats.tx_i.sg.sg_pkt.num);
  4094. DP_PRINT_STATS(" Bytes = %llu",
  4095. pdev->stats.tx_i.sg.sg_pkt.bytes);
  4096. DP_PRINT_STATS(" Dropped By Host = %d",
  4097. pdev->stats.tx_i.sg.dropped_host);
  4098. DP_PRINT_STATS(" Dropped By Target = %d",
  4099. pdev->stats.tx_i.sg.dropped_target);
  4100. DP_PRINT_STATS("TSO:");
  4101. DP_PRINT_STATS(" Number of Segments = %d",
  4102. pdev->stats.tx_i.tso.num_seg);
  4103. DP_PRINT_STATS(" Packets = %d",
  4104. pdev->stats.tx_i.tso.tso_pkt.num);
  4105. DP_PRINT_STATS(" Bytes = %llu",
  4106. pdev->stats.tx_i.tso.tso_pkt.bytes);
  4107. DP_PRINT_STATS(" Dropped By Host = %d",
  4108. pdev->stats.tx_i.tso.dropped_host);
  4109. DP_PRINT_STATS("Mcast Enhancement:");
  4110. DP_PRINT_STATS(" Packets = %d",
  4111. pdev->stats.tx_i.mcast_en.mcast_pkt.num);
  4112. DP_PRINT_STATS(" Bytes = %llu",
  4113. pdev->stats.tx_i.mcast_en.mcast_pkt.bytes);
  4114. DP_PRINT_STATS(" Dropped: Map Errors = %d",
  4115. pdev->stats.tx_i.mcast_en.dropped_map_error);
  4116. DP_PRINT_STATS(" Dropped: Self Mac = %d",
  4117. pdev->stats.tx_i.mcast_en.dropped_self_mac);
  4118. DP_PRINT_STATS(" Dropped: Send Fail = %d",
  4119. pdev->stats.tx_i.mcast_en.dropped_send_fail);
  4120. DP_PRINT_STATS(" Unicast sent = %d",
  4121. pdev->stats.tx_i.mcast_en.ucast);
  4122. DP_PRINT_STATS("Raw:");
  4123. DP_PRINT_STATS(" Packets = %d",
  4124. pdev->stats.tx_i.raw.raw_pkt.num);
  4125. DP_PRINT_STATS(" Bytes = %llu",
  4126. pdev->stats.tx_i.raw.raw_pkt.bytes);
  4127. DP_PRINT_STATS(" DMA map error = %d",
  4128. pdev->stats.tx_i.raw.dma_map_error);
  4129. DP_PRINT_STATS("Reinjected:");
  4130. DP_PRINT_STATS(" Packets = %d",
  4131. pdev->stats.tx_i.reinject_pkts.num);
  4132. DP_PRINT_STATS("Bytes = %llu\n",
  4133. pdev->stats.tx_i.reinject_pkts.bytes);
  4134. DP_PRINT_STATS("Inspected:");
  4135. DP_PRINT_STATS(" Packets = %d",
  4136. pdev->stats.tx_i.inspect_pkts.num);
  4137. DP_PRINT_STATS(" Bytes = %llu",
  4138. pdev->stats.tx_i.inspect_pkts.bytes);
  4139. DP_PRINT_STATS("Nawds Multicast:");
  4140. DP_PRINT_STATS(" Packets = %d",
  4141. pdev->stats.tx_i.nawds_mcast.num);
  4142. DP_PRINT_STATS(" Bytes = %llu",
  4143. pdev->stats.tx_i.nawds_mcast.bytes);
  4144. DP_PRINT_STATS("CCE Classified:");
  4145. DP_PRINT_STATS(" CCE Classified Packets: %u",
  4146. pdev->stats.tx_i.cce_classified);
  4147. DP_PRINT_STATS(" RAW CCE Classified Packets: %u",
  4148. pdev->stats.tx_i.cce_classified_raw);
  4149. DP_PRINT_STATS("Mesh stats:");
  4150. DP_PRINT_STATS(" frames to firmware: %u",
  4151. pdev->stats.tx_i.mesh.exception_fw);
  4152. DP_PRINT_STATS(" completions from fw: %u",
  4153. pdev->stats.tx_i.mesh.completion_fw);
  4154. DP_PRINT_STATS("PPDU stats counter");
  4155. for (index = 0; index < CDP_PPDU_STATS_MAX_TAG; index++) {
  4156. DP_PRINT_STATS(" Tag[%d] = %llu", index,
  4157. pdev->stats.ppdu_stats_counter[index]);
  4158. }
  4159. }
  4160. /**
  4161. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  4162. * @pdev: DP_PDEV Handle
  4163. *
  4164. * Return: void
  4165. */
  4166. static inline void
  4167. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  4168. {
  4169. DP_PRINT_STATS("PDEV Rx Stats:\n");
  4170. DP_PRINT_STATS("Received From HW (Per Rx Ring):");
  4171. DP_PRINT_STATS(" Packets = %d %d %d %d",
  4172. pdev->stats.rx.rcvd_reo[0].num,
  4173. pdev->stats.rx.rcvd_reo[1].num,
  4174. pdev->stats.rx.rcvd_reo[2].num,
  4175. pdev->stats.rx.rcvd_reo[3].num);
  4176. DP_PRINT_STATS(" Bytes = %llu %llu %llu %llu",
  4177. pdev->stats.rx.rcvd_reo[0].bytes,
  4178. pdev->stats.rx.rcvd_reo[1].bytes,
  4179. pdev->stats.rx.rcvd_reo[2].bytes,
  4180. pdev->stats.rx.rcvd_reo[3].bytes);
  4181. DP_PRINT_STATS("Replenished:");
  4182. DP_PRINT_STATS(" Packets = %d",
  4183. pdev->stats.replenish.pkts.num);
  4184. DP_PRINT_STATS(" Bytes = %llu",
  4185. pdev->stats.replenish.pkts.bytes);
  4186. DP_PRINT_STATS(" Buffers Added To Freelist = %d",
  4187. pdev->stats.buf_freelist);
  4188. DP_PRINT_STATS(" Low threshold intr = %d",
  4189. pdev->stats.replenish.low_thresh_intrs);
  4190. DP_PRINT_STATS("Dropped:");
  4191. DP_PRINT_STATS(" msdu_not_done = %d",
  4192. pdev->stats.dropped.msdu_not_done);
  4193. DP_PRINT_STATS(" mon_rx_drop = %d",
  4194. pdev->stats.dropped.mon_rx_drop);
  4195. DP_PRINT_STATS("Sent To Stack:");
  4196. DP_PRINT_STATS(" Packets = %d",
  4197. pdev->stats.rx.to_stack.num);
  4198. DP_PRINT_STATS(" Bytes = %llu",
  4199. pdev->stats.rx.to_stack.bytes);
  4200. DP_PRINT_STATS("Multicast/Broadcast:");
  4201. DP_PRINT_STATS(" Packets = %d",
  4202. pdev->stats.rx.multicast.num);
  4203. DP_PRINT_STATS(" Bytes = %llu",
  4204. pdev->stats.rx.multicast.bytes);
  4205. DP_PRINT_STATS("Errors:");
  4206. DP_PRINT_STATS(" Rxdma Ring Un-inititalized = %d",
  4207. pdev->stats.replenish.rxdma_err);
  4208. DP_PRINT_STATS(" Desc Alloc Failed: = %d",
  4209. pdev->stats.err.desc_alloc_fail);
  4210. /* Get bar_recv_cnt */
  4211. dp_aggregate_pdev_ctrl_frames_stats(pdev);
  4212. DP_PRINT_STATS("BAR Received Count: = %d",
  4213. pdev->stats.rx.bar_recv_cnt);
  4214. }
  4215. /**
  4216. * dp_print_soc_tx_stats(): Print SOC level stats
  4217. * @soc DP_SOC Handle
  4218. *
  4219. * Return: void
  4220. */
  4221. static inline void
  4222. dp_print_soc_tx_stats(struct dp_soc *soc)
  4223. {
  4224. DP_PRINT_STATS("SOC Tx Stats:\n");
  4225. DP_PRINT_STATS("Tx Descriptors In Use = %d",
  4226. soc->stats.tx.desc_in_use);
  4227. DP_PRINT_STATS("Invalid peer:");
  4228. DP_PRINT_STATS(" Packets = %d",
  4229. soc->stats.tx.tx_invalid_peer.num);
  4230. DP_PRINT_STATS(" Bytes = %llu",
  4231. soc->stats.tx.tx_invalid_peer.bytes);
  4232. DP_PRINT_STATS("Packets dropped due to TCL ring full = %d %d %d",
  4233. soc->stats.tx.tcl_ring_full[0],
  4234. soc->stats.tx.tcl_ring_full[1],
  4235. soc->stats.tx.tcl_ring_full[2]);
  4236. }
  4237. /**
  4238. * dp_print_soc_rx_stats: Print SOC level Rx stats
  4239. * @soc: DP_SOC Handle
  4240. *
  4241. * Return:void
  4242. */
  4243. static inline void
  4244. dp_print_soc_rx_stats(struct dp_soc *soc)
  4245. {
  4246. uint32_t i;
  4247. char reo_error[DP_REO_ERR_LENGTH];
  4248. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  4249. uint8_t index = 0;
  4250. DP_PRINT_STATS("SOC Rx Stats:\n");
  4251. DP_PRINT_STATS("Errors:\n");
  4252. DP_PRINT_STATS("Rx Decrypt Errors = %d",
  4253. (soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
  4254. soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
  4255. DP_PRINT_STATS("Invalid RBM = %d",
  4256. soc->stats.rx.err.invalid_rbm);
  4257. DP_PRINT_STATS("Invalid Vdev = %d",
  4258. soc->stats.rx.err.invalid_vdev);
  4259. DP_PRINT_STATS("Invalid Pdev = %d",
  4260. soc->stats.rx.err.invalid_pdev);
  4261. DP_PRINT_STATS("Invalid Peer = %d",
  4262. soc->stats.rx.err.rx_invalid_peer.num);
  4263. DP_PRINT_STATS("HAL Ring Access Fail = %d",
  4264. soc->stats.rx.err.hal_ring_access_fail);
  4265. for (i = 0; i < HAL_RXDMA_ERR_MAX; i++) {
  4266. index += qdf_snprint(&rxdma_error[index],
  4267. DP_RXDMA_ERR_LENGTH - index,
  4268. " %d", soc->stats.rx.err.rxdma_error[i]);
  4269. }
  4270. DP_PRINT_STATS("RXDMA Error (0-31):%s",
  4271. rxdma_error);
  4272. index = 0;
  4273. for (i = 0; i < HAL_REO_ERR_MAX; i++) {
  4274. index += qdf_snprint(&reo_error[index],
  4275. DP_REO_ERR_LENGTH - index,
  4276. " %d", soc->stats.rx.err.reo_error[i]);
  4277. }
  4278. DP_PRINT_STATS("REO Error(0-14):%s",
  4279. reo_error);
  4280. }
  4281. /**
  4282. * dp_print_ring_stat_from_hal(): Print hal level ring stats
  4283. * @soc: DP_SOC handle
  4284. * @srng: DP_SRNG handle
  4285. * @ring_name: SRNG name
  4286. *
  4287. * Return: void
  4288. */
  4289. static inline void
  4290. dp_print_ring_stat_from_hal(struct dp_soc *soc, struct dp_srng *srng,
  4291. char *ring_name)
  4292. {
  4293. uint32_t tailp;
  4294. uint32_t headp;
  4295. if (srng->hal_srng != NULL) {
  4296. hal_api_get_tphp(soc->hal_soc, srng->hal_srng, &tailp, &headp);
  4297. DP_PRINT_STATS("%s : Head pointer = %d Tail Pointer = %d\n",
  4298. ring_name, headp, tailp);
  4299. }
  4300. }
  4301. /**
  4302. * dp_print_ring_stats(): Print tail and head pointer
  4303. * @pdev: DP_PDEV handle
  4304. *
  4305. * Return:void
  4306. */
  4307. static inline void
  4308. dp_print_ring_stats(struct dp_pdev *pdev)
  4309. {
  4310. uint32_t i;
  4311. char ring_name[STR_MAXLEN + 1];
  4312. dp_print_ring_stat_from_hal(pdev->soc,
  4313. &pdev->soc->reo_exception_ring,
  4314. "Reo Exception Ring");
  4315. dp_print_ring_stat_from_hal(pdev->soc,
  4316. &pdev->soc->reo_reinject_ring,
  4317. "Reo Inject Ring");
  4318. dp_print_ring_stat_from_hal(pdev->soc,
  4319. &pdev->soc->reo_cmd_ring,
  4320. "Reo Command Ring");
  4321. dp_print_ring_stat_from_hal(pdev->soc,
  4322. &pdev->soc->reo_status_ring,
  4323. "Reo Status Ring");
  4324. dp_print_ring_stat_from_hal(pdev->soc,
  4325. &pdev->soc->rx_rel_ring,
  4326. "Rx Release ring");
  4327. dp_print_ring_stat_from_hal(pdev->soc,
  4328. &pdev->soc->tcl_cmd_ring,
  4329. "Tcl command Ring");
  4330. dp_print_ring_stat_from_hal(pdev->soc,
  4331. &pdev->soc->tcl_status_ring,
  4332. "Tcl Status Ring");
  4333. dp_print_ring_stat_from_hal(pdev->soc,
  4334. &pdev->soc->wbm_desc_rel_ring,
  4335. "Wbm Desc Rel Ring");
  4336. for (i = 0; i < MAX_REO_DEST_RINGS; i++) {
  4337. snprintf(ring_name, STR_MAXLEN, "Reo Dest Ring %d", i);
  4338. dp_print_ring_stat_from_hal(pdev->soc,
  4339. &pdev->soc->reo_dest_ring[i],
  4340. ring_name);
  4341. }
  4342. for (i = 0; i < pdev->soc->num_tcl_data_rings; i++) {
  4343. snprintf(ring_name, STR_MAXLEN, "Tcl Data Ring %d", i);
  4344. dp_print_ring_stat_from_hal(pdev->soc,
  4345. &pdev->soc->tcl_data_ring[i],
  4346. ring_name);
  4347. }
  4348. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  4349. snprintf(ring_name, STR_MAXLEN, "Tx Comp Ring %d", i);
  4350. dp_print_ring_stat_from_hal(pdev->soc,
  4351. &pdev->soc->tx_comp_ring[i],
  4352. ring_name);
  4353. }
  4354. dp_print_ring_stat_from_hal(pdev->soc,
  4355. &pdev->rx_refill_buf_ring,
  4356. "Rx Refill Buf Ring");
  4357. dp_print_ring_stat_from_hal(pdev->soc,
  4358. &pdev->rx_refill_buf_ring2,
  4359. "Second Rx Refill Buf Ring");
  4360. dp_print_ring_stat_from_hal(pdev->soc,
  4361. &pdev->rxdma_mon_buf_ring,
  4362. "Rxdma Mon Buf Ring");
  4363. dp_print_ring_stat_from_hal(pdev->soc,
  4364. &pdev->rxdma_mon_dst_ring,
  4365. "Rxdma Mon Dst Ring");
  4366. dp_print_ring_stat_from_hal(pdev->soc,
  4367. &pdev->rxdma_mon_status_ring,
  4368. "Rxdma Mon Status Ring");
  4369. dp_print_ring_stat_from_hal(pdev->soc,
  4370. &pdev->rxdma_mon_desc_ring,
  4371. "Rxdma mon desc Ring");
  4372. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4373. snprintf(ring_name, STR_MAXLEN, "Rxdma err dst ring %d", i);
  4374. dp_print_ring_stat_from_hal(pdev->soc,
  4375. &pdev->rxdma_err_dst_ring[i],
  4376. ring_name);
  4377. }
  4378. for (i = 0; i < MAX_RX_MAC_RINGS; i++) {
  4379. snprintf(ring_name, STR_MAXLEN, "Rx mac buf ring %d", i);
  4380. dp_print_ring_stat_from_hal(pdev->soc,
  4381. &pdev->rx_mac_buf_ring[i],
  4382. ring_name);
  4383. }
  4384. }
  4385. /**
  4386. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  4387. * @vdev: DP_VDEV handle
  4388. *
  4389. * Return:void
  4390. */
  4391. static inline void
  4392. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  4393. {
  4394. struct dp_peer *peer = NULL;
  4395. struct dp_soc *soc = (struct dp_soc *)vdev->pdev->soc;
  4396. DP_STATS_CLR(vdev->pdev);
  4397. DP_STATS_CLR(vdev->pdev->soc);
  4398. DP_STATS_CLR(vdev);
  4399. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  4400. if (!peer)
  4401. return;
  4402. DP_STATS_CLR(peer);
  4403. if (soc->cdp_soc.ol_ops->update_dp_stats) {
  4404. soc->cdp_soc.ol_ops->update_dp_stats(
  4405. vdev->pdev->osif_pdev,
  4406. &peer->stats,
  4407. peer->peer_ids[0],
  4408. UPDATE_PEER_STATS);
  4409. }
  4410. }
  4411. if (soc->cdp_soc.ol_ops->update_dp_stats)
  4412. soc->cdp_soc.ol_ops->update_dp_stats(vdev->pdev->osif_pdev,
  4413. &vdev->stats, (uint16_t)vdev->vdev_id,
  4414. UPDATE_VDEV_STATS);
  4415. }
  4416. /**
  4417. * dp_print_rx_rates(): Print Rx rate stats
  4418. * @vdev: DP_VDEV handle
  4419. *
  4420. * Return:void
  4421. */
  4422. static inline void
  4423. dp_print_rx_rates(struct dp_vdev *vdev)
  4424. {
  4425. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4426. uint8_t i, mcs, pkt_type;
  4427. uint8_t index = 0;
  4428. char nss[DP_NSS_LENGTH];
  4429. DP_PRINT_STATS("Rx Rate Info:\n");
  4430. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4431. index = 0;
  4432. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4433. if (!dp_rate_string[pkt_type][mcs].valid)
  4434. continue;
  4435. DP_PRINT_STATS(" %s = %d",
  4436. dp_rate_string[pkt_type][mcs].mcs_type,
  4437. pdev->stats.rx.pkt_type[pkt_type].
  4438. mcs_count[mcs]);
  4439. }
  4440. DP_PRINT_STATS("\n");
  4441. }
  4442. index = 0;
  4443. for (i = 0; i < SS_COUNT; i++) {
  4444. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4445. " %d", pdev->stats.rx.nss[i]);
  4446. }
  4447. DP_PRINT_STATS("NSS(1-8) = %s",
  4448. nss);
  4449. DP_PRINT_STATS("SGI ="
  4450. " 0.8us %d,"
  4451. " 0.4us %d,"
  4452. " 1.6us %d,"
  4453. " 3.2us %d,",
  4454. pdev->stats.rx.sgi_count[0],
  4455. pdev->stats.rx.sgi_count[1],
  4456. pdev->stats.rx.sgi_count[2],
  4457. pdev->stats.rx.sgi_count[3]);
  4458. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4459. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  4460. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  4461. DP_PRINT_STATS("Reception Type ="
  4462. " SU: %d,"
  4463. " MU_MIMO:%d,"
  4464. " MU_OFDMA:%d,"
  4465. " MU_OFDMA_MIMO:%d\n",
  4466. pdev->stats.rx.reception_type[0],
  4467. pdev->stats.rx.reception_type[1],
  4468. pdev->stats.rx.reception_type[2],
  4469. pdev->stats.rx.reception_type[3]);
  4470. DP_PRINT_STATS("Aggregation:\n");
  4471. DP_PRINT_STATS("Number of Msdu's Part of Ampdus = %d",
  4472. pdev->stats.rx.ampdu_cnt);
  4473. DP_PRINT_STATS("Number of Msdu's With No Mpdu Level Aggregation : %d",
  4474. pdev->stats.rx.non_ampdu_cnt);
  4475. DP_PRINT_STATS("Number of Msdu's Part of Amsdu: %d",
  4476. pdev->stats.rx.amsdu_cnt);
  4477. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation: %d",
  4478. pdev->stats.rx.non_amsdu_cnt);
  4479. }
  4480. /**
  4481. * dp_print_tx_rates(): Print tx rates
  4482. * @vdev: DP_VDEV handle
  4483. *
  4484. * Return:void
  4485. */
  4486. static inline void
  4487. dp_print_tx_rates(struct dp_vdev *vdev)
  4488. {
  4489. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4490. uint8_t mcs, pkt_type;
  4491. uint32_t index;
  4492. DP_PRINT_STATS("Tx Rate Info:\n");
  4493. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4494. index = 0;
  4495. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4496. if (!dp_rate_string[pkt_type][mcs].valid)
  4497. continue;
  4498. DP_PRINT_STATS(" %s = %d",
  4499. dp_rate_string[pkt_type][mcs].mcs_type,
  4500. pdev->stats.tx.pkt_type[pkt_type].
  4501. mcs_count[mcs]);
  4502. }
  4503. DP_PRINT_STATS("\n");
  4504. }
  4505. DP_PRINT_STATS("SGI ="
  4506. " 0.8us %d"
  4507. " 0.4us %d"
  4508. " 1.6us %d"
  4509. " 3.2us %d",
  4510. pdev->stats.tx.sgi_count[0],
  4511. pdev->stats.tx.sgi_count[1],
  4512. pdev->stats.tx.sgi_count[2],
  4513. pdev->stats.tx.sgi_count[3]);
  4514. DP_PRINT_STATS("BW Counts = 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  4515. pdev->stats.tx.bw[0], pdev->stats.tx.bw[1],
  4516. pdev->stats.tx.bw[2], pdev->stats.tx.bw[3]);
  4517. DP_PRINT_STATS("OFDMA = %d", pdev->stats.tx.ofdma);
  4518. DP_PRINT_STATS("STBC = %d", pdev->stats.tx.stbc);
  4519. DP_PRINT_STATS("LDPC = %d", pdev->stats.tx.ldpc);
  4520. DP_PRINT_STATS("Retries = %d", pdev->stats.tx.retries);
  4521. DP_PRINT_STATS("Last ack rssi = %d\n", pdev->stats.tx.last_ack_rssi);
  4522. DP_PRINT_STATS("Aggregation:\n");
  4523. DP_PRINT_STATS("Number of Msdu's Part of Amsdu = %d",
  4524. pdev->stats.tx.amsdu_cnt);
  4525. DP_PRINT_STATS("Number of Msdu's With No Msdu Level Aggregation = %d",
  4526. pdev->stats.tx.non_amsdu_cnt);
  4527. }
  4528. /**
  4529. * dp_print_peer_stats():print peer stats
  4530. * @peer: DP_PEER handle
  4531. *
  4532. * return void
  4533. */
  4534. static inline void dp_print_peer_stats(struct dp_peer *peer)
  4535. {
  4536. uint8_t i, mcs, pkt_type;
  4537. uint32_t index;
  4538. char nss[DP_NSS_LENGTH];
  4539. DP_PRINT_STATS("Node Tx Stats:\n");
  4540. DP_PRINT_STATS("Total Packet Completions = %d",
  4541. peer->stats.tx.comp_pkt.num);
  4542. DP_PRINT_STATS("Total Bytes Completions = %llu",
  4543. peer->stats.tx.comp_pkt.bytes);
  4544. DP_PRINT_STATS("Success Packets = %d",
  4545. peer->stats.tx.tx_success.num);
  4546. DP_PRINT_STATS("Success Bytes = %llu",
  4547. peer->stats.tx.tx_success.bytes);
  4548. DP_PRINT_STATS("Unicast Success Packets = %d",
  4549. peer->stats.tx.ucast.num);
  4550. DP_PRINT_STATS("Unicast Success Bytes = %llu",
  4551. peer->stats.tx.ucast.bytes);
  4552. DP_PRINT_STATS("Multicast Success Packets = %d",
  4553. peer->stats.tx.mcast.num);
  4554. DP_PRINT_STATS("Multicast Success Bytes = %llu",
  4555. peer->stats.tx.mcast.bytes);
  4556. DP_PRINT_STATS("Broadcast Success Packets = %d",
  4557. peer->stats.tx.bcast.num);
  4558. DP_PRINT_STATS("Broadcast Success Bytes = %llu",
  4559. peer->stats.tx.bcast.bytes);
  4560. DP_PRINT_STATS("Packets Failed = %d",
  4561. peer->stats.tx.tx_failed);
  4562. DP_PRINT_STATS("Packets In OFDMA = %d",
  4563. peer->stats.tx.ofdma);
  4564. DP_PRINT_STATS("Packets In STBC = %d",
  4565. peer->stats.tx.stbc);
  4566. DP_PRINT_STATS("Packets In LDPC = %d",
  4567. peer->stats.tx.ldpc);
  4568. DP_PRINT_STATS("Packet Retries = %d",
  4569. peer->stats.tx.retries);
  4570. DP_PRINT_STATS("MSDU's Part of AMSDU = %d",
  4571. peer->stats.tx.amsdu_cnt);
  4572. DP_PRINT_STATS("Last Packet RSSI = %d",
  4573. peer->stats.tx.last_ack_rssi);
  4574. DP_PRINT_STATS("Dropped At FW: Removed = %d",
  4575. peer->stats.tx.dropped.fw_rem);
  4576. DP_PRINT_STATS("Dropped At FW: Removed transmitted = %d",
  4577. peer->stats.tx.dropped.fw_rem_tx);
  4578. DP_PRINT_STATS("Dropped At FW: Removed Untransmitted = %d",
  4579. peer->stats.tx.dropped.fw_rem_notx);
  4580. DP_PRINT_STATS("Dropped : Age Out = %d",
  4581. peer->stats.tx.dropped.age_out);
  4582. DP_PRINT_STATS("NAWDS : ");
  4583. DP_PRINT_STATS(" Nawds multicast Drop Tx Packet = %d",
  4584. peer->stats.tx.nawds_mcast_drop);
  4585. DP_PRINT_STATS(" Nawds multicast Tx Packet Count = %d",
  4586. peer->stats.tx.nawds_mcast.num);
  4587. DP_PRINT_STATS(" Nawds multicast Tx Packet Bytes = %llu",
  4588. peer->stats.tx.nawds_mcast.bytes);
  4589. DP_PRINT_STATS("Rate Info:");
  4590. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4591. index = 0;
  4592. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4593. if (!dp_rate_string[pkt_type][mcs].valid)
  4594. continue;
  4595. DP_PRINT_STATS(" %s = %d",
  4596. dp_rate_string[pkt_type][mcs].mcs_type,
  4597. peer->stats.tx.pkt_type[pkt_type].
  4598. mcs_count[mcs]);
  4599. }
  4600. DP_PRINT_STATS("\n");
  4601. }
  4602. DP_PRINT_STATS("SGI = "
  4603. " 0.8us %d"
  4604. " 0.4us %d"
  4605. " 1.6us %d"
  4606. " 3.2us %d",
  4607. peer->stats.tx.sgi_count[0],
  4608. peer->stats.tx.sgi_count[1],
  4609. peer->stats.tx.sgi_count[2],
  4610. peer->stats.tx.sgi_count[3]);
  4611. DP_PRINT_STATS("Excess Retries per AC ");
  4612. DP_PRINT_STATS(" Best effort = %d",
  4613. peer->stats.tx.excess_retries_per_ac[0]);
  4614. DP_PRINT_STATS(" Background= %d",
  4615. peer->stats.tx.excess_retries_per_ac[1]);
  4616. DP_PRINT_STATS(" Video = %d",
  4617. peer->stats.tx.excess_retries_per_ac[2]);
  4618. DP_PRINT_STATS(" Voice = %d",
  4619. peer->stats.tx.excess_retries_per_ac[3]);
  4620. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d\n",
  4621. peer->stats.tx.bw[2], peer->stats.tx.bw[3],
  4622. peer->stats.tx.bw[4], peer->stats.tx.bw[5]);
  4623. index = 0;
  4624. for (i = 0; i < SS_COUNT; i++) {
  4625. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4626. " %d", peer->stats.tx.nss[i]);
  4627. }
  4628. DP_PRINT_STATS("NSS(1-8) = %s",
  4629. nss);
  4630. DP_PRINT_STATS("Aggregation:");
  4631. DP_PRINT_STATS(" Number of Msdu's Part of Amsdu = %d",
  4632. peer->stats.tx.amsdu_cnt);
  4633. DP_PRINT_STATS(" Number of Msdu's With No Msdu Level Aggregation = %d\n",
  4634. peer->stats.tx.non_amsdu_cnt);
  4635. DP_PRINT_STATS("Node Rx Stats:");
  4636. DP_PRINT_STATS("Packets Sent To Stack = %d",
  4637. peer->stats.rx.to_stack.num);
  4638. DP_PRINT_STATS("Bytes Sent To Stack = %llu",
  4639. peer->stats.rx.to_stack.bytes);
  4640. for (i = 0; i < CDP_MAX_RX_RINGS; i++) {
  4641. DP_PRINT_STATS("Ring Id = %d", i);
  4642. DP_PRINT_STATS(" Packets Received = %d",
  4643. peer->stats.rx.rcvd_reo[i].num);
  4644. DP_PRINT_STATS(" Bytes Received = %llu",
  4645. peer->stats.rx.rcvd_reo[i].bytes);
  4646. }
  4647. DP_PRINT_STATS("Multicast Packets Received = %d",
  4648. peer->stats.rx.multicast.num);
  4649. DP_PRINT_STATS("Multicast Bytes Received = %llu",
  4650. peer->stats.rx.multicast.bytes);
  4651. DP_PRINT_STATS("Broadcast Packets Received = %d",
  4652. peer->stats.rx.bcast.num);
  4653. DP_PRINT_STATS("Broadcast Bytes Received = %llu",
  4654. peer->stats.rx.bcast.bytes);
  4655. DP_PRINT_STATS("Intra BSS Packets Received = %d",
  4656. peer->stats.rx.intra_bss.pkts.num);
  4657. DP_PRINT_STATS("Intra BSS Bytes Received = %llu",
  4658. peer->stats.rx.intra_bss.pkts.bytes);
  4659. DP_PRINT_STATS("Raw Packets Received = %d",
  4660. peer->stats.rx.raw.num);
  4661. DP_PRINT_STATS("Raw Bytes Received = %llu",
  4662. peer->stats.rx.raw.bytes);
  4663. DP_PRINT_STATS("Errors: MIC Errors = %d",
  4664. peer->stats.rx.err.mic_err);
  4665. DP_PRINT_STATS("Erros: Decryption Errors = %d",
  4666. peer->stats.rx.err.decrypt_err);
  4667. DP_PRINT_STATS("Msdu's Received As Part of Ampdu = %d",
  4668. peer->stats.rx.non_ampdu_cnt);
  4669. DP_PRINT_STATS("Msdu's Recived As Ampdu = %d",
  4670. peer->stats.rx.ampdu_cnt);
  4671. DP_PRINT_STATS("Msdu's Received Not Part of Amsdu's = %d",
  4672. peer->stats.rx.non_amsdu_cnt);
  4673. DP_PRINT_STATS("MSDUs Received As Part of Amsdu = %d",
  4674. peer->stats.rx.amsdu_cnt);
  4675. DP_PRINT_STATS("NAWDS : ");
  4676. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet = %d",
  4677. peer->stats.rx.nawds_mcast_drop.num);
  4678. DP_PRINT_STATS(" Nawds multicast Drop Rx Packet Bytes = %llu",
  4679. peer->stats.rx.nawds_mcast_drop.bytes);
  4680. DP_PRINT_STATS("SGI ="
  4681. " 0.8us %d"
  4682. " 0.4us %d"
  4683. " 1.6us %d"
  4684. " 3.2us %d",
  4685. peer->stats.rx.sgi_count[0],
  4686. peer->stats.rx.sgi_count[1],
  4687. peer->stats.rx.sgi_count[2],
  4688. peer->stats.rx.sgi_count[3]);
  4689. DP_PRINT_STATS("BW Counts = 20MHZ %d 40MHZ %d 80MHZ %d 160MHZ %d",
  4690. peer->stats.rx.bw[0], peer->stats.rx.bw[1],
  4691. peer->stats.rx.bw[2], peer->stats.rx.bw[3]);
  4692. DP_PRINT_STATS("Reception Type ="
  4693. " SU %d,"
  4694. " MU_MIMO %d,"
  4695. " MU_OFDMA %d,"
  4696. " MU_OFDMA_MIMO %d",
  4697. peer->stats.rx.reception_type[0],
  4698. peer->stats.rx.reception_type[1],
  4699. peer->stats.rx.reception_type[2],
  4700. peer->stats.rx.reception_type[3]);
  4701. for (pkt_type = 0; pkt_type < DOT11_MAX; pkt_type++) {
  4702. index = 0;
  4703. for (mcs = 0; mcs < MAX_MCS; mcs++) {
  4704. if (!dp_rate_string[pkt_type][mcs].valid)
  4705. continue;
  4706. DP_PRINT_STATS(" %s = %d",
  4707. dp_rate_string[pkt_type][mcs].mcs_type,
  4708. peer->stats.rx.pkt_type[pkt_type].
  4709. mcs_count[mcs]);
  4710. }
  4711. DP_PRINT_STATS("\n");
  4712. }
  4713. index = 0;
  4714. for (i = 0; i < SS_COUNT; i++) {
  4715. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  4716. " %d", peer->stats.rx.nss[i]);
  4717. }
  4718. DP_PRINT_STATS("NSS(1-8) = %s",
  4719. nss);
  4720. DP_PRINT_STATS("Aggregation:");
  4721. DP_PRINT_STATS(" Msdu's Part of Ampdu = %d",
  4722. peer->stats.rx.ampdu_cnt);
  4723. DP_PRINT_STATS(" Msdu's With No Mpdu Level Aggregation = %d",
  4724. peer->stats.rx.non_ampdu_cnt);
  4725. DP_PRINT_STATS(" Msdu's Part of Amsdu = %d",
  4726. peer->stats.rx.amsdu_cnt);
  4727. DP_PRINT_STATS(" Msdu's With No Msdu Level Aggregation = %d",
  4728. peer->stats.rx.non_amsdu_cnt);
  4729. }
  4730. /**
  4731. * dp_print_host_stats()- Function to print the stats aggregated at host
  4732. * @vdev_handle: DP_VDEV handle
  4733. * @type: host stats type
  4734. *
  4735. * Available Stat types
  4736. * TXRX_CLEAR_STATS : Clear the stats
  4737. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  4738. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  4739. * TXRX_TX_HOST_STATS: Print Tx Stats
  4740. * TXRX_RX_HOST_STATS: Print Rx Stats
  4741. * TXRX_AST_STATS: Print AST Stats
  4742. * TXRX_SRNG_PTR_STATS: Print SRNG ring pointer stats
  4743. *
  4744. * Return: 0 on success, print error message in case of failure
  4745. */
  4746. static int
  4747. dp_print_host_stats(struct cdp_vdev *vdev_handle, enum cdp_host_txrx_stats type)
  4748. {
  4749. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  4750. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  4751. dp_aggregate_pdev_stats(pdev);
  4752. switch (type) {
  4753. case TXRX_CLEAR_STATS:
  4754. dp_txrx_host_stats_clr(vdev);
  4755. break;
  4756. case TXRX_RX_RATE_STATS:
  4757. dp_print_rx_rates(vdev);
  4758. break;
  4759. case TXRX_TX_RATE_STATS:
  4760. dp_print_tx_rates(vdev);
  4761. break;
  4762. case TXRX_TX_HOST_STATS:
  4763. dp_print_pdev_tx_stats(pdev);
  4764. dp_print_soc_tx_stats(pdev->soc);
  4765. break;
  4766. case TXRX_RX_HOST_STATS:
  4767. dp_print_pdev_rx_stats(pdev);
  4768. dp_print_soc_rx_stats(pdev->soc);
  4769. break;
  4770. case TXRX_AST_STATS:
  4771. dp_print_ast_stats(pdev->soc);
  4772. break;
  4773. case TXRX_SRNG_PTR_STATS:
  4774. dp_print_ring_stats(pdev);
  4775. break;
  4776. default:
  4777. DP_TRACE(FATAL, "Wrong Input For TxRx Host Stats");
  4778. break;
  4779. }
  4780. return 0;
  4781. }
  4782. /*
  4783. * dp_get_host_peer_stats()- function to print peer stats
  4784. * @pdev_handle: DP_PDEV handle
  4785. * @mac_addr: mac address of the peer
  4786. *
  4787. * Return: void
  4788. */
  4789. static void
  4790. dp_get_host_peer_stats(struct cdp_pdev *pdev_handle, char *mac_addr)
  4791. {
  4792. struct dp_peer *peer;
  4793. uint8_t local_id;
  4794. peer = (struct dp_peer *)dp_find_peer_by_addr(pdev_handle, mac_addr,
  4795. &local_id);
  4796. if (!peer) {
  4797. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  4798. "%s: Invalid peer\n", __func__);
  4799. return;
  4800. }
  4801. dp_print_peer_stats(peer);
  4802. dp_peer_rxtid_stats(peer, dp_rx_tid_stats_cb, NULL);
  4803. return;
  4804. }
  4805. /*
  4806. * dp_ppdu_ring_reset()- Reset PPDU Stats ring
  4807. * @pdev: DP_PDEV handle
  4808. *
  4809. * Return: void
  4810. */
  4811. static void
  4812. dp_ppdu_ring_reset(struct dp_pdev *pdev)
  4813. {
  4814. struct htt_rx_ring_tlv_filter htt_tlv_filter;
  4815. qdf_mem_set(&(htt_tlv_filter), sizeof(htt_tlv_filter), 0x0);
  4816. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, pdev->pdev_id,
  4817. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  4818. RX_BUFFER_SIZE, &htt_tlv_filter);
  4819. }
  4820. /*
  4821. * dp_ppdu_ring_cfg()- Configure PPDU Stats ring
  4822. * @pdev: DP_PDEV handle
  4823. *
  4824. * Return: void
  4825. */
  4826. static void
  4827. dp_ppdu_ring_cfg(struct dp_pdev *pdev)
  4828. {
  4829. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  4830. htt_tlv_filter.mpdu_start = 0;
  4831. htt_tlv_filter.msdu_start = 0;
  4832. htt_tlv_filter.packet = 0;
  4833. htt_tlv_filter.msdu_end = 0;
  4834. htt_tlv_filter.mpdu_end = 0;
  4835. htt_tlv_filter.packet_header = 1;
  4836. htt_tlv_filter.attention = 1;
  4837. htt_tlv_filter.ppdu_start = 1;
  4838. htt_tlv_filter.ppdu_end = 1;
  4839. htt_tlv_filter.ppdu_end_user_stats = 1;
  4840. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  4841. htt_tlv_filter.ppdu_end_status_done = 1;
  4842. htt_tlv_filter.enable_fp = 1;
  4843. htt_tlv_filter.enable_md = 0;
  4844. if (pdev->mcopy_mode)
  4845. htt_tlv_filter.enable_mo = 1;
  4846. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  4847. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  4848. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  4849. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  4850. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  4851. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  4852. htt_h2t_rx_ring_cfg(pdev->soc->htt_handle, pdev->pdev_id,
  4853. pdev->rxdma_mon_status_ring.hal_srng, RXDMA_MONITOR_STATUS,
  4854. RX_BUFFER_SIZE, &htt_tlv_filter);
  4855. }
  4856. /*
  4857. * dp_config_debug_sniffer()- API to enable/disable debug sniffer
  4858. * @pdev_handle: DP_PDEV handle
  4859. * @val: user provided value
  4860. *
  4861. * Return: void
  4862. */
  4863. static void
  4864. dp_config_debug_sniffer(struct cdp_pdev *pdev_handle, int val)
  4865. {
  4866. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4867. switch (val) {
  4868. case 0:
  4869. pdev->tx_sniffer_enable = 0;
  4870. pdev->mcopy_mode = 0;
  4871. if (!pdev->pktlog_ppdu_stats && !pdev->enhanced_stats_en) {
  4872. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  4873. dp_ppdu_ring_reset(pdev);
  4874. } else if (pdev->enhanced_stats_en) {
  4875. dp_h2t_cfg_stats_msg_send(pdev,
  4876. DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  4877. }
  4878. break;
  4879. case 1:
  4880. pdev->tx_sniffer_enable = 1;
  4881. pdev->mcopy_mode = 0;
  4882. if (!pdev->pktlog_ppdu_stats)
  4883. dp_h2t_cfg_stats_msg_send(pdev,
  4884. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  4885. break;
  4886. case 2:
  4887. pdev->mcopy_mode = 1;
  4888. pdev->tx_sniffer_enable = 0;
  4889. if (!pdev->enhanced_stats_en)
  4890. dp_ppdu_ring_cfg(pdev);
  4891. if (!pdev->pktlog_ppdu_stats)
  4892. dp_h2t_cfg_stats_msg_send(pdev,
  4893. DP_PPDU_STATS_CFG_SNIFFER, pdev->pdev_id);
  4894. break;
  4895. default:
  4896. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  4897. "Invalid value\n");
  4898. break;
  4899. }
  4900. }
  4901. /*
  4902. * dp_enable_enhanced_stats()- API to enable enhanced statistcs
  4903. * @pdev_handle: DP_PDEV handle
  4904. *
  4905. * Return: void
  4906. */
  4907. static void
  4908. dp_enable_enhanced_stats(struct cdp_pdev *pdev_handle)
  4909. {
  4910. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4911. pdev->enhanced_stats_en = 1;
  4912. if (!pdev->mcopy_mode)
  4913. dp_ppdu_ring_cfg(pdev);
  4914. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  4915. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS, pdev->pdev_id);
  4916. }
  4917. /*
  4918. * dp_disable_enhanced_stats()- API to disable enhanced statistcs
  4919. * @pdev_handle: DP_PDEV handle
  4920. *
  4921. * Return: void
  4922. */
  4923. static void
  4924. dp_disable_enhanced_stats(struct cdp_pdev *pdev_handle)
  4925. {
  4926. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4927. pdev->enhanced_stats_en = 0;
  4928. if (!pdev->pktlog_ppdu_stats && !pdev->tx_sniffer_enable && !pdev->mcopy_mode)
  4929. dp_h2t_cfg_stats_msg_send(pdev, 0, pdev->pdev_id);
  4930. if (!pdev->mcopy_mode)
  4931. dp_ppdu_ring_reset(pdev);
  4932. }
  4933. /*
  4934. * dp_get_fw_peer_stats()- function to print peer stats
  4935. * @pdev_handle: DP_PDEV handle
  4936. * @mac_addr: mac address of the peer
  4937. * @cap: Type of htt stats requested
  4938. *
  4939. * Currently Supporting only MAC ID based requests Only
  4940. * 1: HTT_PEER_STATS_REQ_MODE_NO_QUERY
  4941. * 2: HTT_PEER_STATS_REQ_MODE_QUERY_TQM
  4942. * 3: HTT_PEER_STATS_REQ_MODE_FLUSH_TQM
  4943. *
  4944. * Return: void
  4945. */
  4946. static void
  4947. dp_get_fw_peer_stats(struct cdp_pdev *pdev_handle, uint8_t *mac_addr,
  4948. uint32_t cap)
  4949. {
  4950. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4951. int i;
  4952. uint32_t config_param0 = 0;
  4953. uint32_t config_param1 = 0;
  4954. uint32_t config_param2 = 0;
  4955. uint32_t config_param3 = 0;
  4956. HTT_DBG_EXT_STATS_PEER_INFO_IS_MAC_ADDR_SET(config_param0, 1);
  4957. config_param0 |= (1 << (cap + 1));
  4958. for (i = 0; i < HTT_PEER_STATS_MAX_TLV; i++) {
  4959. config_param1 |= (1 << i);
  4960. }
  4961. config_param2 |= (mac_addr[0] & 0x000000ff);
  4962. config_param2 |= ((mac_addr[1] << 8) & 0x0000ff00);
  4963. config_param2 |= ((mac_addr[2] << 16) & 0x00ff0000);
  4964. config_param2 |= ((mac_addr[3] << 24) & 0xff000000);
  4965. config_param3 |= (mac_addr[4] & 0x000000ff);
  4966. config_param3 |= ((mac_addr[5] << 8) & 0x0000ff00);
  4967. dp_h2t_ext_stats_msg_send(pdev, HTT_DBG_EXT_STATS_PEER_INFO,
  4968. config_param0, config_param1, config_param2,
  4969. config_param3, 0, 0, 0);
  4970. }
  4971. /* This struct definition will be removed from here
  4972. * once it get added in FW headers*/
  4973. struct httstats_cmd_req {
  4974. uint32_t config_param0;
  4975. uint32_t config_param1;
  4976. uint32_t config_param2;
  4977. uint32_t config_param3;
  4978. int cookie;
  4979. u_int8_t stats_id;
  4980. };
  4981. /*
  4982. * dp_get_htt_stats: function to process the httstas request
  4983. * @pdev_handle: DP pdev handle
  4984. * @data: pointer to request data
  4985. * @data_len: length for request data
  4986. *
  4987. * return: void
  4988. */
  4989. static void
  4990. dp_get_htt_stats(struct cdp_pdev *pdev_handle, void *data, uint32_t data_len)
  4991. {
  4992. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  4993. struct httstats_cmd_req *req = (struct httstats_cmd_req *)data;
  4994. QDF_ASSERT(data_len == sizeof(struct httstats_cmd_req));
  4995. dp_h2t_ext_stats_msg_send(pdev, req->stats_id,
  4996. req->config_param0, req->config_param1,
  4997. req->config_param2, req->config_param3,
  4998. req->cookie, 0, 0);
  4999. }
  5000. /*
  5001. * dp_set_pdev_param: function to set parameters in pdev
  5002. * @pdev_handle: DP pdev handle
  5003. * @param: parameter type to be set
  5004. * @val: value of parameter to be set
  5005. *
  5006. * return: void
  5007. */
  5008. static void dp_set_pdev_param(struct cdp_pdev *pdev_handle,
  5009. enum cdp_pdev_param_type param, uint8_t val)
  5010. {
  5011. switch (param) {
  5012. case CDP_CONFIG_DEBUG_SNIFFER:
  5013. dp_config_debug_sniffer(pdev_handle, val);
  5014. break;
  5015. default:
  5016. break;
  5017. }
  5018. }
  5019. /*
  5020. * dp_set_vdev_param: function to set parameters in vdev
  5021. * @param: parameter type to be set
  5022. * @val: value of parameter to be set
  5023. *
  5024. * return: void
  5025. */
  5026. static void dp_set_vdev_param(struct cdp_vdev *vdev_handle,
  5027. enum cdp_vdev_param_type param, uint32_t val)
  5028. {
  5029. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5030. switch (param) {
  5031. case CDP_ENABLE_WDS:
  5032. vdev->wds_enabled = val;
  5033. break;
  5034. case CDP_ENABLE_NAWDS:
  5035. vdev->nawds_enabled = val;
  5036. break;
  5037. case CDP_ENABLE_MCAST_EN:
  5038. vdev->mcast_enhancement_en = val;
  5039. break;
  5040. case CDP_ENABLE_PROXYSTA:
  5041. vdev->proxysta_vdev = val;
  5042. break;
  5043. case CDP_UPDATE_TDLS_FLAGS:
  5044. vdev->tdls_link_connected = val;
  5045. break;
  5046. case CDP_CFG_WDS_AGING_TIMER:
  5047. if (val == 0)
  5048. qdf_timer_stop(&vdev->pdev->soc->wds_aging_timer);
  5049. else if (val != vdev->wds_aging_timer_val)
  5050. qdf_timer_mod(&vdev->pdev->soc->wds_aging_timer, val);
  5051. vdev->wds_aging_timer_val = val;
  5052. break;
  5053. case CDP_ENABLE_AP_BRIDGE:
  5054. if (wlan_op_mode_sta != vdev->opmode)
  5055. vdev->ap_bridge_enabled = val;
  5056. else
  5057. vdev->ap_bridge_enabled = false;
  5058. break;
  5059. case CDP_ENABLE_CIPHER:
  5060. vdev->sec_type = val;
  5061. break;
  5062. case CDP_ENABLE_QWRAP_ISOLATION:
  5063. vdev->isolation_vdev = val;
  5064. break;
  5065. default:
  5066. break;
  5067. }
  5068. dp_tx_vdev_update_search_flags(vdev);
  5069. }
  5070. /**
  5071. * dp_peer_set_nawds: set nawds bit in peer
  5072. * @peer_handle: pointer to peer
  5073. * @value: enable/disable nawds
  5074. *
  5075. * return: void
  5076. */
  5077. static void dp_peer_set_nawds(struct cdp_peer *peer_handle, uint8_t value)
  5078. {
  5079. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5080. peer->nawds_enabled = value;
  5081. }
  5082. /*
  5083. * dp_set_vdev_dscp_tid_map_wifi3(): Update Map ID selected for particular vdev
  5084. * @vdev_handle: DP_VDEV handle
  5085. * @map_id:ID of map that needs to be updated
  5086. *
  5087. * Return: void
  5088. */
  5089. static void dp_set_vdev_dscp_tid_map_wifi3(struct cdp_vdev *vdev_handle,
  5090. uint8_t map_id)
  5091. {
  5092. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5093. vdev->dscp_tid_map_id = map_id;
  5094. return;
  5095. }
  5096. /*
  5097. * dp_txrx_stats_publish(): publish pdev stats into a buffer
  5098. * @pdev_handle: DP_PDEV handle
  5099. * @buf: to hold pdev_stats
  5100. *
  5101. * Return: int
  5102. */
  5103. static int
  5104. dp_txrx_stats_publish(struct cdp_pdev *pdev_handle, void *buf)
  5105. {
  5106. struct dp_pdev *pdev = (struct dp_pdev *)pdev_handle;
  5107. struct cdp_pdev_stats *buffer = (struct cdp_pdev_stats *) buf;
  5108. struct cdp_txrx_stats_req req = {0,};
  5109. dp_aggregate_pdev_stats(pdev);
  5110. req.stats = HTT_DBG_EXT_STATS_PDEV_TX;
  5111. req.cookie_val = 1;
  5112. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5113. req.param1, req.param2, req.param3, 0,
  5114. req.cookie_val, 0);
  5115. msleep(DP_MAX_SLEEP_TIME);
  5116. req.stats = HTT_DBG_EXT_STATS_PDEV_RX;
  5117. req.cookie_val = 1;
  5118. dp_h2t_ext_stats_msg_send(pdev, req.stats, req.param0,
  5119. req.param1, req.param2, req.param3, 0,
  5120. req.cookie_val, 0);
  5121. msleep(DP_MAX_SLEEP_TIME);
  5122. qdf_mem_copy(buffer, &pdev->stats, sizeof(pdev->stats));
  5123. return TXRX_STATS_LEVEL;
  5124. }
  5125. /**
  5126. * dp_set_pdev_dscp_tid_map_wifi3(): update dscp tid map in pdev
  5127. * @pdev: DP_PDEV handle
  5128. * @map_id: ID of map that needs to be updated
  5129. * @tos: index value in map
  5130. * @tid: tid value passed by the user
  5131. *
  5132. * Return: void
  5133. */
  5134. static void dp_set_pdev_dscp_tid_map_wifi3(struct cdp_pdev *pdev_handle,
  5135. uint8_t map_id, uint8_t tos, uint8_t tid)
  5136. {
  5137. uint8_t dscp;
  5138. struct dp_pdev *pdev = (struct dp_pdev *) pdev_handle;
  5139. dscp = (tos >> DP_IP_DSCP_SHIFT) & DP_IP_DSCP_MASK;
  5140. pdev->dscp_tid_map[map_id][dscp] = tid;
  5141. if (map_id < HAL_MAX_HW_DSCP_TID_MAPS)
  5142. hal_tx_update_dscp_tid(pdev->soc->hal_soc, tid,
  5143. map_id, dscp);
  5144. return;
  5145. }
  5146. /**
  5147. * dp_fw_stats_process(): Process TxRX FW stats request
  5148. * @vdev_handle: DP VDEV handle
  5149. * @req: stats request
  5150. *
  5151. * return: int
  5152. */
  5153. static int dp_fw_stats_process(struct cdp_vdev *vdev_handle,
  5154. struct cdp_txrx_stats_req *req)
  5155. {
  5156. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5157. struct dp_pdev *pdev = NULL;
  5158. uint32_t stats = req->stats;
  5159. uint8_t channel = req->channel;
  5160. if (!vdev) {
  5161. DP_TRACE(NONE, "VDEV not found");
  5162. return 1;
  5163. }
  5164. pdev = vdev->pdev;
  5165. /*
  5166. * For HTT_DBG_EXT_STATS_RESET command, FW need to config
  5167. * from param0 to param3 according to below rule:
  5168. *
  5169. * PARAM:
  5170. * - config_param0 : start_offset (stats type)
  5171. * - config_param1 : stats bmask from start offset
  5172. * - config_param2 : stats bmask from start offset + 32
  5173. * - config_param3 : stats bmask from start offset + 64
  5174. */
  5175. if (req->stats == CDP_TXRX_STATS_0) {
  5176. req->param0 = HTT_DBG_EXT_STATS_PDEV_TX;
  5177. req->param1 = 0xFFFFFFFF;
  5178. req->param2 = 0xFFFFFFFF;
  5179. req->param3 = 0xFFFFFFFF;
  5180. }
  5181. return dp_h2t_ext_stats_msg_send(pdev, stats, req->param0,
  5182. req->param1, req->param2, req->param3,
  5183. 0, 0, channel);
  5184. }
  5185. /**
  5186. * dp_txrx_stats_request - function to map to firmware and host stats
  5187. * @vdev: virtual handle
  5188. * @req: stats request
  5189. *
  5190. * Return: integer
  5191. */
  5192. static int dp_txrx_stats_request(struct cdp_vdev *vdev,
  5193. struct cdp_txrx_stats_req *req)
  5194. {
  5195. int host_stats;
  5196. int fw_stats;
  5197. enum cdp_stats stats;
  5198. if (!vdev || !req) {
  5199. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5200. "Invalid vdev/req instance");
  5201. return 0;
  5202. }
  5203. stats = req->stats;
  5204. if (stats >= CDP_TXRX_MAX_STATS)
  5205. return 0;
  5206. /*
  5207. * DP_CURR_FW_STATS_AVAIL: no of FW stats currently available
  5208. * has to be updated if new FW HTT stats added
  5209. */
  5210. if (stats > CDP_TXRX_STATS_HTT_MAX)
  5211. stats = stats + DP_CURR_FW_STATS_AVAIL - DP_HTT_DBG_EXT_STATS_MAX;
  5212. fw_stats = dp_stats_mapping_table[stats][STATS_FW];
  5213. host_stats = dp_stats_mapping_table[stats][STATS_HOST];
  5214. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5215. "stats: %u fw_stats_type: %d host_stats_type: %d",
  5216. stats, fw_stats, host_stats);
  5217. if (fw_stats != TXRX_FW_STATS_INVALID) {
  5218. /* update request with FW stats type */
  5219. req->stats = fw_stats;
  5220. return dp_fw_stats_process(vdev, req);
  5221. }
  5222. if ((host_stats != TXRX_HOST_STATS_INVALID) &&
  5223. (host_stats <= TXRX_HOST_STATS_MAX))
  5224. return dp_print_host_stats(vdev, host_stats);
  5225. else
  5226. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5227. "Wrong Input for TxRx Stats");
  5228. return 0;
  5229. }
  5230. /*
  5231. * dp_print_napi_stats(): NAPI stats
  5232. * @soc - soc handle
  5233. */
  5234. static void dp_print_napi_stats(struct dp_soc *soc)
  5235. {
  5236. hif_print_napi_stats(soc->hif_handle);
  5237. }
  5238. /*
  5239. * dp_print_per_ring_stats(): Packet count per ring
  5240. * @soc - soc handle
  5241. */
  5242. static void dp_print_per_ring_stats(struct dp_soc *soc)
  5243. {
  5244. uint8_t ring;
  5245. uint16_t core;
  5246. uint64_t total_packets;
  5247. DP_TRACE(FATAL, "Reo packets per ring:");
  5248. for (ring = 0; ring < MAX_REO_DEST_RINGS; ring++) {
  5249. total_packets = 0;
  5250. DP_TRACE(FATAL, "Packets on ring %u:", ring);
  5251. for (core = 0; core < NR_CPUS; core++) {
  5252. DP_TRACE(FATAL, "Packets arriving on core %u: %llu",
  5253. core, soc->stats.rx.ring_packets[core][ring]);
  5254. total_packets += soc->stats.rx.ring_packets[core][ring];
  5255. }
  5256. DP_TRACE(FATAL, "Total packets on ring %u: %llu",
  5257. ring, total_packets);
  5258. }
  5259. }
  5260. /*
  5261. * dp_txrx_path_stats() - Function to display dump stats
  5262. * @soc - soc handle
  5263. *
  5264. * return: none
  5265. */
  5266. static void dp_txrx_path_stats(struct dp_soc *soc)
  5267. {
  5268. uint8_t error_code;
  5269. uint8_t loop_pdev;
  5270. struct dp_pdev *pdev;
  5271. uint8_t i;
  5272. for (loop_pdev = 0; loop_pdev < soc->pdev_count; loop_pdev++) {
  5273. pdev = soc->pdev_list[loop_pdev];
  5274. dp_aggregate_pdev_stats(pdev);
  5275. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5276. "Tx path Statistics:");
  5277. DP_TRACE(FATAL, "from stack: %u msdus (%llu bytes)",
  5278. pdev->stats.tx_i.rcvd.num,
  5279. pdev->stats.tx_i.rcvd.bytes);
  5280. DP_TRACE(FATAL, "processed from host: %u msdus (%llu bytes)",
  5281. pdev->stats.tx_i.processed.num,
  5282. pdev->stats.tx_i.processed.bytes);
  5283. DP_TRACE(FATAL, "successfully transmitted: %u msdus (%llu bytes)",
  5284. pdev->stats.tx.tx_success.num,
  5285. pdev->stats.tx.tx_success.bytes);
  5286. DP_TRACE(FATAL, "Dropped in host:");
  5287. DP_TRACE(FATAL, "Total packets dropped: %u,",
  5288. pdev->stats.tx_i.dropped.dropped_pkt.num);
  5289. DP_TRACE(FATAL, "Descriptor not available: %u",
  5290. pdev->stats.tx_i.dropped.desc_na);
  5291. DP_TRACE(FATAL, "Ring full: %u",
  5292. pdev->stats.tx_i.dropped.ring_full);
  5293. DP_TRACE(FATAL, "Enqueue fail: %u",
  5294. pdev->stats.tx_i.dropped.enqueue_fail);
  5295. DP_TRACE(FATAL, "DMA Error: %u",
  5296. pdev->stats.tx_i.dropped.dma_error);
  5297. DP_TRACE(FATAL, "Dropped in hardware:");
  5298. DP_TRACE(FATAL, "total packets dropped: %u",
  5299. pdev->stats.tx.tx_failed);
  5300. DP_TRACE(FATAL, "mpdu age out: %u",
  5301. pdev->stats.tx.dropped.age_out);
  5302. DP_TRACE(FATAL, "firmware removed: %u",
  5303. pdev->stats.tx.dropped.fw_rem);
  5304. DP_TRACE(FATAL, "firmware removed tx: %u",
  5305. pdev->stats.tx.dropped.fw_rem_tx);
  5306. DP_TRACE(FATAL, "firmware removed notx %u",
  5307. pdev->stats.tx.dropped.fw_rem_notx);
  5308. DP_TRACE(FATAL, "peer_invalid: %u",
  5309. pdev->soc->stats.tx.tx_invalid_peer.num);
  5310. DP_TRACE(FATAL, "Tx packets sent per interrupt:");
  5311. DP_TRACE(FATAL, "Single Packet: %u",
  5312. pdev->stats.tx_comp_histogram.pkts_1);
  5313. DP_TRACE(FATAL, "2-20 Packets: %u",
  5314. pdev->stats.tx_comp_histogram.pkts_2_20);
  5315. DP_TRACE(FATAL, "21-40 Packets: %u",
  5316. pdev->stats.tx_comp_histogram.pkts_21_40);
  5317. DP_TRACE(FATAL, "41-60 Packets: %u",
  5318. pdev->stats.tx_comp_histogram.pkts_41_60);
  5319. DP_TRACE(FATAL, "61-80 Packets: %u",
  5320. pdev->stats.tx_comp_histogram.pkts_61_80);
  5321. DP_TRACE(FATAL, "81-100 Packets: %u",
  5322. pdev->stats.tx_comp_histogram.pkts_81_100);
  5323. DP_TRACE(FATAL, "101-200 Packets: %u",
  5324. pdev->stats.tx_comp_histogram.pkts_101_200);
  5325. DP_TRACE(FATAL, " 201+ Packets: %u",
  5326. pdev->stats.tx_comp_histogram.pkts_201_plus);
  5327. DP_TRACE(FATAL, "Rx path statistics");
  5328. DP_TRACE(FATAL, "delivered %u msdus ( %llu bytes),",
  5329. pdev->stats.rx.to_stack.num,
  5330. pdev->stats.rx.to_stack.bytes);
  5331. for (i = 0; i < CDP_MAX_RX_RINGS; i++)
  5332. DP_TRACE(FATAL, "received on reo[%d] %u msdus ( %llu bytes),",
  5333. i, pdev->stats.rx.rcvd_reo[i].num,
  5334. pdev->stats.rx.rcvd_reo[i].bytes);
  5335. DP_TRACE(FATAL, "intra-bss packets %u msdus ( %llu bytes),",
  5336. pdev->stats.rx.intra_bss.pkts.num,
  5337. pdev->stats.rx.intra_bss.pkts.bytes);
  5338. DP_TRACE(FATAL, "intra-bss fails %u msdus ( %llu bytes),",
  5339. pdev->stats.rx.intra_bss.fail.num,
  5340. pdev->stats.rx.intra_bss.fail.bytes);
  5341. DP_TRACE(FATAL, "raw packets %u msdus ( %llu bytes),",
  5342. pdev->stats.rx.raw.num,
  5343. pdev->stats.rx.raw.bytes);
  5344. DP_TRACE(FATAL, "dropped: error %u msdus",
  5345. pdev->stats.rx.err.mic_err);
  5346. DP_TRACE(FATAL, "peer invalid %u",
  5347. pdev->soc->stats.rx.err.rx_invalid_peer.num);
  5348. DP_TRACE(FATAL, "Reo Statistics");
  5349. DP_TRACE(FATAL, "rbm error: %u msdus",
  5350. pdev->soc->stats.rx.err.invalid_rbm);
  5351. DP_TRACE(FATAL, "hal ring access fail: %u msdus",
  5352. pdev->soc->stats.rx.err.hal_ring_access_fail);
  5353. DP_TRACE(FATAL, "Reo errors");
  5354. for (error_code = 0; error_code < HAL_REO_ERR_MAX;
  5355. error_code++) {
  5356. DP_TRACE(FATAL, "Reo error number (%u): %u msdus",
  5357. error_code,
  5358. pdev->soc->stats.rx.err.reo_error[error_code]);
  5359. }
  5360. for (error_code = 0; error_code < HAL_RXDMA_ERR_MAX;
  5361. error_code++) {
  5362. DP_TRACE(FATAL, "Rxdma error number (%u): %u msdus",
  5363. error_code,
  5364. pdev->soc->stats.rx.err
  5365. .rxdma_error[error_code]);
  5366. }
  5367. DP_TRACE(FATAL, "Rx packets reaped per interrupt:");
  5368. DP_TRACE(FATAL, "Single Packet: %u",
  5369. pdev->stats.rx_ind_histogram.pkts_1);
  5370. DP_TRACE(FATAL, "2-20 Packets: %u",
  5371. pdev->stats.rx_ind_histogram.pkts_2_20);
  5372. DP_TRACE(FATAL, "21-40 Packets: %u",
  5373. pdev->stats.rx_ind_histogram.pkts_21_40);
  5374. DP_TRACE(FATAL, "41-60 Packets: %u",
  5375. pdev->stats.rx_ind_histogram.pkts_41_60);
  5376. DP_TRACE(FATAL, "61-80 Packets: %u",
  5377. pdev->stats.rx_ind_histogram.pkts_61_80);
  5378. DP_TRACE(FATAL, "81-100 Packets: %u",
  5379. pdev->stats.rx_ind_histogram.pkts_81_100);
  5380. DP_TRACE(FATAL, "101-200 Packets: %u",
  5381. pdev->stats.rx_ind_histogram.pkts_101_200);
  5382. DP_TRACE(FATAL, " 201+ Packets: %u",
  5383. pdev->stats.rx_ind_histogram.pkts_201_plus);
  5384. DP_TRACE_STATS(ERROR, "%s: tso_enable: %u lro_enable: %u rx_hash: %u napi_enable: %u",
  5385. __func__,
  5386. pdev->soc->wlan_cfg_ctx->tso_enabled,
  5387. pdev->soc->wlan_cfg_ctx->lro_enabled,
  5388. pdev->soc->wlan_cfg_ctx->rx_hash,
  5389. pdev->soc->wlan_cfg_ctx->napi_enabled);
  5390. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5391. DP_TRACE_STATS(ERROR, "%s: Tx flow stop queue: %u tx flow start queue offset: %u",
  5392. __func__,
  5393. pdev->soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold,
  5394. pdev->soc->wlan_cfg_ctx->tx_flow_start_queue_offset);
  5395. #endif
  5396. }
  5397. }
  5398. /*
  5399. * dp_txrx_dump_stats() - Dump statistics
  5400. * @value - Statistics option
  5401. */
  5402. static QDF_STATUS dp_txrx_dump_stats(void *psoc, uint16_t value,
  5403. enum qdf_stats_verbosity_level level)
  5404. {
  5405. struct dp_soc *soc =
  5406. (struct dp_soc *)psoc;
  5407. QDF_STATUS status = QDF_STATUS_SUCCESS;
  5408. if (!soc) {
  5409. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5410. "%s: soc is NULL", __func__);
  5411. return QDF_STATUS_E_INVAL;
  5412. }
  5413. switch (value) {
  5414. case CDP_TXRX_PATH_STATS:
  5415. dp_txrx_path_stats(soc);
  5416. break;
  5417. case CDP_RX_RING_STATS:
  5418. dp_print_per_ring_stats(soc);
  5419. break;
  5420. case CDP_TXRX_TSO_STATS:
  5421. /* TODO: NOT IMPLEMENTED */
  5422. break;
  5423. case CDP_DUMP_TX_FLOW_POOL_INFO:
  5424. cdp_dump_flow_pool_info((struct cdp_soc_t *)soc);
  5425. break;
  5426. case CDP_DP_NAPI_STATS:
  5427. dp_print_napi_stats(soc);
  5428. break;
  5429. case CDP_TXRX_DESC_STATS:
  5430. /* TODO: NOT IMPLEMENTED */
  5431. break;
  5432. default:
  5433. status = QDF_STATUS_E_INVAL;
  5434. break;
  5435. }
  5436. return status;
  5437. }
  5438. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5439. /**
  5440. * dp_update_flow_control_parameters() - API to store datapath
  5441. * config parameters
  5442. * @soc: soc handle
  5443. * @cfg: ini parameter handle
  5444. *
  5445. * Return: void
  5446. */
  5447. static inline
  5448. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5449. struct cdp_config_params *params)
  5450. {
  5451. soc->wlan_cfg_ctx->tx_flow_stop_queue_threshold =
  5452. params->tx_flow_stop_queue_threshold;
  5453. soc->wlan_cfg_ctx->tx_flow_start_queue_offset =
  5454. params->tx_flow_start_queue_offset;
  5455. }
  5456. #else
  5457. static inline
  5458. void dp_update_flow_control_parameters(struct dp_soc *soc,
  5459. struct cdp_config_params *params)
  5460. {
  5461. }
  5462. #endif
  5463. /**
  5464. * dp_update_config_parameters() - API to store datapath
  5465. * config parameters
  5466. * @soc: soc handle
  5467. * @cfg: ini parameter handle
  5468. *
  5469. * Return: status
  5470. */
  5471. static
  5472. QDF_STATUS dp_update_config_parameters(struct cdp_soc *psoc,
  5473. struct cdp_config_params *params)
  5474. {
  5475. struct dp_soc *soc = (struct dp_soc *)psoc;
  5476. if (!(soc)) {
  5477. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  5478. "%s: Invalid handle", __func__);
  5479. return QDF_STATUS_E_INVAL;
  5480. }
  5481. soc->wlan_cfg_ctx->tso_enabled = params->tso_enable;
  5482. soc->wlan_cfg_ctx->lro_enabled = params->lro_enable;
  5483. soc->wlan_cfg_ctx->rx_hash = params->flow_steering_enable;
  5484. soc->wlan_cfg_ctx->tcp_udp_checksumoffload =
  5485. params->tcp_udp_checksumoffload;
  5486. soc->wlan_cfg_ctx->napi_enabled = params->napi_enable;
  5487. dp_update_flow_control_parameters(soc, params);
  5488. return QDF_STATUS_SUCCESS;
  5489. }
  5490. /**
  5491. * dp_txrx_set_wds_rx_policy() - API to store datapath
  5492. * config parameters
  5493. * @vdev_handle - datapath vdev handle
  5494. * @cfg: ini parameter handle
  5495. *
  5496. * Return: status
  5497. */
  5498. #ifdef WDS_VENDOR_EXTENSION
  5499. void
  5500. dp_txrx_set_wds_rx_policy(
  5501. struct cdp_vdev *vdev_handle,
  5502. u_int32_t val)
  5503. {
  5504. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5505. struct dp_peer *peer;
  5506. if (vdev->opmode == wlan_op_mode_ap) {
  5507. /* for ap, set it on bss_peer */
  5508. TAILQ_FOREACH(peer, &vdev->peer_list, peer_list_elem) {
  5509. if (peer->bss_peer) {
  5510. peer->wds_ecm.wds_rx_filter = 1;
  5511. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5512. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5513. break;
  5514. }
  5515. }
  5516. } else if (vdev->opmode == wlan_op_mode_sta) {
  5517. peer = TAILQ_FIRST(&vdev->peer_list);
  5518. peer->wds_ecm.wds_rx_filter = 1;
  5519. peer->wds_ecm.wds_rx_ucast_4addr = (val & WDS_POLICY_RX_UCAST_4ADDR) ? 1:0;
  5520. peer->wds_ecm.wds_rx_mcast_4addr = (val & WDS_POLICY_RX_MCAST_4ADDR) ? 1:0;
  5521. }
  5522. }
  5523. /**
  5524. * dp_txrx_peer_wds_tx_policy_update() - API to set tx wds policy
  5525. *
  5526. * @peer_handle - datapath peer handle
  5527. * @wds_tx_ucast: policy for unicast transmission
  5528. * @wds_tx_mcast: policy for multicast transmission
  5529. *
  5530. * Return: void
  5531. */
  5532. void
  5533. dp_txrx_peer_wds_tx_policy_update(struct cdp_peer *peer_handle,
  5534. int wds_tx_ucast, int wds_tx_mcast)
  5535. {
  5536. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  5537. if (wds_tx_ucast || wds_tx_mcast) {
  5538. peer->wds_enabled = 1;
  5539. peer->wds_ecm.wds_tx_ucast_4addr = wds_tx_ucast;
  5540. peer->wds_ecm.wds_tx_mcast_4addr = wds_tx_mcast;
  5541. } else {
  5542. peer->wds_enabled = 0;
  5543. peer->wds_ecm.wds_tx_ucast_4addr = 0;
  5544. peer->wds_ecm.wds_tx_mcast_4addr = 0;
  5545. }
  5546. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  5547. FL("Policy Update set to :\
  5548. peer->wds_enabled %d\
  5549. peer->wds_ecm.wds_tx_ucast_4addr %d\
  5550. peer->wds_ecm.wds_tx_mcast_4addr %d\n"),
  5551. peer->wds_enabled, peer->wds_ecm.wds_tx_ucast_4addr,
  5552. peer->wds_ecm.wds_tx_mcast_4addr);
  5553. return;
  5554. }
  5555. #endif
  5556. static struct cdp_wds_ops dp_ops_wds = {
  5557. .vdev_set_wds = dp_vdev_set_wds,
  5558. #ifdef WDS_VENDOR_EXTENSION
  5559. .txrx_set_wds_rx_policy = dp_txrx_set_wds_rx_policy,
  5560. .txrx_wds_peer_tx_policy_update = dp_txrx_peer_wds_tx_policy_update,
  5561. #endif
  5562. };
  5563. /*
  5564. * dp_peer_delete_ast_entries(): Delete all AST entries for a peer
  5565. * @soc - datapath soc handle
  5566. * @peer - datapath peer handle
  5567. *
  5568. * Delete the AST entries belonging to a peer
  5569. */
  5570. #ifdef FEATURE_WDS
  5571. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5572. struct dp_peer *peer)
  5573. {
  5574. struct dp_ast_entry *ast_entry, *temp_ast_entry;
  5575. qdf_spin_lock_bh(&soc->ast_lock);
  5576. DP_PEER_ITERATE_ASE_LIST(peer, ast_entry, temp_ast_entry)
  5577. dp_peer_del_ast(soc, ast_entry);
  5578. qdf_spin_unlock_bh(&soc->ast_lock);
  5579. }
  5580. #else
  5581. static inline void dp_peer_delete_ast_entries(struct dp_soc *soc,
  5582. struct dp_peer *peer)
  5583. {
  5584. }
  5585. #endif
  5586. /*
  5587. * dp_txrx_data_tx_cb_set(): set the callback for non standard tx
  5588. * @vdev_handle - datapath vdev handle
  5589. * @callback - callback function
  5590. * @ctxt: callback context
  5591. *
  5592. */
  5593. static void
  5594. dp_txrx_data_tx_cb_set(struct cdp_vdev *vdev_handle,
  5595. ol_txrx_data_tx_cb callback, void *ctxt)
  5596. {
  5597. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5598. vdev->tx_non_std_data_callback.func = callback;
  5599. vdev->tx_non_std_data_callback.ctxt = ctxt;
  5600. }
  5601. /**
  5602. * dp_pdev_get_dp_txrx_handle() - get dp handle from pdev
  5603. * @pdev_hdl: datapath pdev handle
  5604. *
  5605. * Return: opaque pointer to dp txrx handle
  5606. */
  5607. static void *dp_pdev_get_dp_txrx_handle(struct cdp_pdev *pdev_hdl)
  5608. {
  5609. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5610. return pdev->dp_txrx_handle;
  5611. }
  5612. /**
  5613. * dp_pdev_set_dp_txrx_handle() - set dp handle in pdev
  5614. * @pdev_hdl: datapath pdev handle
  5615. * @dp_txrx_hdl: opaque pointer for dp_txrx_handle
  5616. *
  5617. * Return: void
  5618. */
  5619. static void
  5620. dp_pdev_set_dp_txrx_handle(struct cdp_pdev *pdev_hdl, void *dp_txrx_hdl)
  5621. {
  5622. struct dp_pdev *pdev = (struct dp_pdev *)pdev_hdl;
  5623. pdev->dp_txrx_handle = dp_txrx_hdl;
  5624. }
  5625. /**
  5626. * dp_soc_get_dp_txrx_handle() - get context for external-dp from dp soc
  5627. * @soc_handle: datapath soc handle
  5628. *
  5629. * Return: opaque pointer to external dp (non-core DP)
  5630. */
  5631. static void *dp_soc_get_dp_txrx_handle(struct cdp_soc *soc_handle)
  5632. {
  5633. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  5634. return soc->external_txrx_handle;
  5635. }
  5636. /**
  5637. * dp_soc_set_dp_txrx_handle() - set external dp handle in soc
  5638. * @soc_handle: datapath soc handle
  5639. * @txrx_handle: opaque pointer to external dp (non-core DP)
  5640. *
  5641. * Return: void
  5642. */
  5643. static void
  5644. dp_soc_set_dp_txrx_handle(struct cdp_soc *soc_handle, void *txrx_handle)
  5645. {
  5646. struct dp_soc *soc = (struct dp_soc *)soc_handle;
  5647. soc->external_txrx_handle = txrx_handle;
  5648. }
  5649. #ifdef CONFIG_WIN
  5650. static void dp_peer_teardown_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  5651. {
  5652. struct dp_vdev *vdev = (struct dp_vdev *) vdev_hdl;
  5653. struct dp_peer *peer = (struct dp_peer *) peer_hdl;
  5654. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  5655. peer->delete_in_progress = true;
  5656. dp_peer_delete_ast_entries(soc, peer);
  5657. }
  5658. #endif
  5659. #ifdef ATH_SUPPORT_NAC_RSSI
  5660. static QDF_STATUS dp_config_for_nac_rssi(struct cdp_vdev *vdev_handle,
  5661. enum cdp_nac_param_cmd cmd, char *bssid, char *client_macaddr,
  5662. uint8_t chan_num)
  5663. {
  5664. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  5665. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  5666. struct dp_soc *soc = (struct dp_soc *) vdev->pdev->soc;
  5667. pdev->nac_rssi_filtering = 1;
  5668. /* Store address of NAC (neighbour peer) which will be checked
  5669. * against TA of received packets.
  5670. */
  5671. if (cmd == CDP_NAC_PARAM_ADD) {
  5672. qdf_mem_copy(vdev->cdp_nac_rssi.client_mac,
  5673. client_macaddr, DP_MAC_ADDR_LEN);
  5674. vdev->cdp_nac_rssi_enabled = 1;
  5675. } else if (cmd == CDP_NAC_PARAM_DEL) {
  5676. if (!qdf_mem_cmp(vdev->cdp_nac_rssi.client_mac,
  5677. client_macaddr, DP_MAC_ADDR_LEN)) {
  5678. /* delete this peer from the list */
  5679. qdf_mem_zero(vdev->cdp_nac_rssi.client_mac,
  5680. DP_MAC_ADDR_LEN);
  5681. }
  5682. vdev->cdp_nac_rssi_enabled = 0;
  5683. }
  5684. if (soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi)
  5685. soc->cdp_soc.ol_ops->config_bssid_in_fw_for_nac_rssi
  5686. (vdev->pdev->osif_pdev, vdev->vdev_id, cmd, bssid);
  5687. return QDF_STATUS_SUCCESS;
  5688. }
  5689. #endif
  5690. static struct cdp_cmn_ops dp_ops_cmn = {
  5691. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  5692. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  5693. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  5694. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  5695. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  5696. .txrx_peer_create = dp_peer_create_wifi3,
  5697. .txrx_peer_setup = dp_peer_setup_wifi3,
  5698. #ifdef CONFIG_WIN
  5699. .txrx_peer_teardown = dp_peer_teardown_wifi3,
  5700. #else
  5701. .txrx_peer_teardown = NULL,
  5702. #endif
  5703. .txrx_peer_add_ast = dp_peer_add_ast_wifi3,
  5704. .txrx_peer_del_ast = dp_peer_del_ast_wifi3,
  5705. .txrx_peer_update_ast = dp_peer_update_ast_wifi3,
  5706. .txrx_peer_ast_hash_find = dp_peer_ast_hash_find_wifi3,
  5707. .txrx_peer_ast_get_pdev_id = dp_peer_ast_get_pdev_id_wifi3,
  5708. .txrx_peer_ast_get_next_hop = dp_peer_ast_get_next_hop_wifi3,
  5709. .txrx_peer_ast_set_type = dp_peer_ast_set_type_wifi3,
  5710. .txrx_peer_delete = dp_peer_delete_wifi3,
  5711. .txrx_vdev_register = dp_vdev_register_wifi3,
  5712. .txrx_soc_detach = dp_soc_detach_wifi3,
  5713. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  5714. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  5715. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  5716. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  5717. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  5718. .delba_process = dp_delba_process_wifi3,
  5719. .set_addba_response = dp_set_addba_response,
  5720. .get_peer_mac_addr_frm_id = dp_get_peer_mac_addr_frm_id,
  5721. .flush_cache_rx_queue = NULL,
  5722. /* TODO: get API's for dscp-tid need to be added*/
  5723. .set_vdev_dscp_tid_map = dp_set_vdev_dscp_tid_map_wifi3,
  5724. .set_pdev_dscp_tid_map = dp_set_pdev_dscp_tid_map_wifi3,
  5725. .txrx_stats_request = dp_txrx_stats_request,
  5726. .txrx_set_monitor_mode = dp_vdev_set_monitor_mode,
  5727. .txrx_get_pdev_id_frm_pdev = dp_get_pdev_id_frm_pdev,
  5728. .txrx_set_nac = dp_set_nac,
  5729. .txrx_get_tx_pending = dp_get_tx_pending,
  5730. .txrx_set_pdev_tx_capture = dp_config_debug_sniffer,
  5731. .txrx_get_peer_mac_from_peer_id = dp_get_peer_mac_from_peer_id,
  5732. .display_stats = dp_txrx_dump_stats,
  5733. .txrx_soc_set_nss_cfg = dp_soc_set_nss_cfg_wifi3,
  5734. .txrx_soc_get_nss_cfg = dp_soc_get_nss_cfg_wifi3,
  5735. #ifdef DP_INTR_POLL_BASED
  5736. .txrx_intr_attach = dp_soc_interrupt_attach_wrapper,
  5737. #else
  5738. .txrx_intr_attach = dp_soc_interrupt_attach,
  5739. #endif
  5740. .txrx_intr_detach = dp_soc_interrupt_detach,
  5741. .set_pn_check = dp_set_pn_check_wifi3,
  5742. .update_config_parameters = dp_update_config_parameters,
  5743. /* TODO: Add other functions */
  5744. .txrx_data_tx_cb_set = dp_txrx_data_tx_cb_set,
  5745. .get_dp_txrx_handle = dp_pdev_get_dp_txrx_handle,
  5746. .set_dp_txrx_handle = dp_pdev_set_dp_txrx_handle,
  5747. .get_soc_dp_txrx_handle = dp_soc_get_dp_txrx_handle,
  5748. .set_soc_dp_txrx_handle = dp_soc_set_dp_txrx_handle,
  5749. .tx_send = dp_tx_send,
  5750. };
  5751. static struct cdp_ctrl_ops dp_ops_ctrl = {
  5752. .txrx_peer_authorize = dp_peer_authorize,
  5753. #ifdef QCA_SUPPORT_SON
  5754. .txrx_set_inact_params = dp_set_inact_params,
  5755. .txrx_start_inact_timer = dp_start_inact_timer,
  5756. .txrx_set_overload = dp_set_overload,
  5757. .txrx_peer_is_inact = dp_peer_is_inact,
  5758. .txrx_mark_peer_inact = dp_mark_peer_inact,
  5759. #endif
  5760. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  5761. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  5762. #ifdef MESH_MODE_SUPPORT
  5763. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  5764. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  5765. #endif
  5766. .txrx_set_vdev_param = dp_set_vdev_param,
  5767. .txrx_peer_set_nawds = dp_peer_set_nawds,
  5768. .txrx_set_pdev_reo_dest = dp_set_pdev_reo_dest,
  5769. .txrx_get_pdev_reo_dest = dp_get_pdev_reo_dest,
  5770. .txrx_set_filter_neighbour_peers = dp_set_filter_neighbour_peers,
  5771. .txrx_update_filter_neighbour_peers =
  5772. dp_update_filter_neighbour_peers,
  5773. .txrx_get_sec_type = dp_get_sec_type,
  5774. /* TODO: Add other functions */
  5775. .txrx_wdi_event_sub = dp_wdi_event_sub,
  5776. .txrx_wdi_event_unsub = dp_wdi_event_unsub,
  5777. #ifdef WDI_EVENT_ENABLE
  5778. .txrx_get_pldev = dp_get_pldev,
  5779. #endif
  5780. .txrx_set_pdev_param = dp_set_pdev_param,
  5781. #ifdef ATH_SUPPORT_NAC_RSSI
  5782. .txrx_vdev_config_for_nac_rssi = dp_config_for_nac_rssi,
  5783. #endif
  5784. };
  5785. static struct cdp_me_ops dp_ops_me = {
  5786. #ifdef ATH_SUPPORT_IQUE
  5787. .tx_me_alloc_descriptor = dp_tx_me_alloc_descriptor,
  5788. .tx_me_free_descriptor = dp_tx_me_free_descriptor,
  5789. .tx_me_convert_ucast = dp_tx_me_send_convert_ucast,
  5790. #endif
  5791. };
  5792. static struct cdp_mon_ops dp_ops_mon = {
  5793. .txrx_monitor_set_filter_ucast_data = NULL,
  5794. .txrx_monitor_set_filter_mcast_data = NULL,
  5795. .txrx_monitor_set_filter_non_data = NULL,
  5796. .txrx_monitor_get_filter_ucast_data = dp_vdev_get_filter_ucast_data,
  5797. .txrx_monitor_get_filter_mcast_data = dp_vdev_get_filter_mcast_data,
  5798. .txrx_monitor_get_filter_non_data = dp_vdev_get_filter_non_data,
  5799. .txrx_reset_monitor_mode = dp_reset_monitor_mode,
  5800. /* Added support for HK advance filter */
  5801. .txrx_set_advance_monitor_filter = dp_pdev_set_advance_monitor_filter,
  5802. };
  5803. static struct cdp_host_stats_ops dp_ops_host_stats = {
  5804. .txrx_per_peer_stats = dp_get_host_peer_stats,
  5805. .get_fw_peer_stats = dp_get_fw_peer_stats,
  5806. .get_htt_stats = dp_get_htt_stats,
  5807. .txrx_enable_enhanced_stats = dp_enable_enhanced_stats,
  5808. .txrx_disable_enhanced_stats = dp_disable_enhanced_stats,
  5809. .txrx_stats_publish = dp_txrx_stats_publish,
  5810. /* TODO */
  5811. };
  5812. static struct cdp_raw_ops dp_ops_raw = {
  5813. /* TODO */
  5814. };
  5815. #ifdef CONFIG_WIN
  5816. static struct cdp_pflow_ops dp_ops_pflow = {
  5817. /* TODO */
  5818. };
  5819. #endif /* CONFIG_WIN */
  5820. #ifdef FEATURE_RUNTIME_PM
  5821. /**
  5822. * dp_runtime_suspend() - ensure DP is ready to runtime suspend
  5823. * @opaque_pdev: DP pdev context
  5824. *
  5825. * DP is ready to runtime suspend if there are no pending TX packets.
  5826. *
  5827. * Return: QDF_STATUS
  5828. */
  5829. static QDF_STATUS dp_runtime_suspend(struct cdp_pdev *opaque_pdev)
  5830. {
  5831. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5832. struct dp_soc *soc = pdev->soc;
  5833. /* Call DP TX flow control API to check if there is any
  5834. pending packets */
  5835. if (soc->intr_mode == DP_INTR_POLL)
  5836. qdf_timer_stop(&soc->int_timer);
  5837. return QDF_STATUS_SUCCESS;
  5838. }
  5839. /**
  5840. * dp_runtime_resume() - ensure DP is ready to runtime resume
  5841. * @opaque_pdev: DP pdev context
  5842. *
  5843. * Resume DP for runtime PM.
  5844. *
  5845. * Return: QDF_STATUS
  5846. */
  5847. static QDF_STATUS dp_runtime_resume(struct cdp_pdev *opaque_pdev)
  5848. {
  5849. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5850. struct dp_soc *soc = pdev->soc;
  5851. void *hal_srng;
  5852. int i;
  5853. if (soc->intr_mode == DP_INTR_POLL)
  5854. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  5855. for (i = 0; i < MAX_TCL_DATA_RINGS; i++) {
  5856. hal_srng = soc->tcl_data_ring[i].hal_srng;
  5857. if (hal_srng) {
  5858. /* We actually only need to acquire the lock */
  5859. hal_srng_access_start(soc->hal_soc, hal_srng);
  5860. /* Update SRC ring head pointer for HW to send
  5861. all pending packets */
  5862. hal_srng_access_end(soc->hal_soc, hal_srng);
  5863. }
  5864. }
  5865. return QDF_STATUS_SUCCESS;
  5866. }
  5867. #endif /* FEATURE_RUNTIME_PM */
  5868. static QDF_STATUS dp_bus_suspend(struct cdp_pdev *opaque_pdev)
  5869. {
  5870. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5871. struct dp_soc *soc = pdev->soc;
  5872. if (soc->intr_mode == DP_INTR_POLL)
  5873. qdf_timer_stop(&soc->int_timer);
  5874. return QDF_STATUS_SUCCESS;
  5875. }
  5876. static QDF_STATUS dp_bus_resume(struct cdp_pdev *opaque_pdev)
  5877. {
  5878. struct dp_pdev *pdev = (struct dp_pdev *)opaque_pdev;
  5879. struct dp_soc *soc = pdev->soc;
  5880. if (soc->intr_mode == DP_INTR_POLL)
  5881. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  5882. return QDF_STATUS_SUCCESS;
  5883. }
  5884. #ifndef CONFIG_WIN
  5885. static struct cdp_misc_ops dp_ops_misc = {
  5886. .tx_non_std = dp_tx_non_std,
  5887. .get_opmode = dp_get_opmode,
  5888. #ifdef FEATURE_RUNTIME_PM
  5889. .runtime_suspend = dp_runtime_suspend,
  5890. .runtime_resume = dp_runtime_resume,
  5891. #endif /* FEATURE_RUNTIME_PM */
  5892. .pkt_log_init = dp_pkt_log_init,
  5893. .pkt_log_con_service = dp_pkt_log_con_service,
  5894. };
  5895. static struct cdp_flowctl_ops dp_ops_flowctl = {
  5896. /* WIFI 3.0 DP implement as required. */
  5897. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  5898. .register_pause_cb = dp_txrx_register_pause_cb,
  5899. .dump_flow_pool_info = dp_tx_dump_flow_pool_info,
  5900. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  5901. };
  5902. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  5903. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5904. };
  5905. #ifdef IPA_OFFLOAD
  5906. static struct cdp_ipa_ops dp_ops_ipa = {
  5907. .ipa_get_resource = dp_ipa_get_resource,
  5908. .ipa_set_doorbell_paddr = dp_ipa_set_doorbell_paddr,
  5909. .ipa_op_response = dp_ipa_op_response,
  5910. .ipa_register_op_cb = dp_ipa_register_op_cb,
  5911. .ipa_get_stat = dp_ipa_get_stat,
  5912. .ipa_tx_data_frame = dp_tx_send_ipa_data_frame,
  5913. .ipa_enable_autonomy = dp_ipa_enable_autonomy,
  5914. .ipa_disable_autonomy = dp_ipa_disable_autonomy,
  5915. .ipa_setup = dp_ipa_setup,
  5916. .ipa_cleanup = dp_ipa_cleanup,
  5917. .ipa_setup_iface = dp_ipa_setup_iface,
  5918. .ipa_cleanup_iface = dp_ipa_cleanup_iface,
  5919. .ipa_enable_pipes = dp_ipa_enable_pipes,
  5920. .ipa_disable_pipes = dp_ipa_disable_pipes,
  5921. .ipa_set_perf_level = dp_ipa_set_perf_level
  5922. };
  5923. #endif
  5924. static struct cdp_bus_ops dp_ops_bus = {
  5925. .bus_suspend = dp_bus_suspend,
  5926. .bus_resume = dp_bus_resume
  5927. };
  5928. static struct cdp_ocb_ops dp_ops_ocb = {
  5929. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5930. };
  5931. static struct cdp_throttle_ops dp_ops_throttle = {
  5932. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5933. };
  5934. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  5935. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5936. };
  5937. static struct cdp_cfg_ops dp_ops_cfg = {
  5938. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  5939. };
  5940. /*
  5941. * dp_wrapper_peer_get_ref_by_addr - wrapper function to get to peer
  5942. * @dev: physical device instance
  5943. * @peer_mac_addr: peer mac address
  5944. * @local_id: local id for the peer
  5945. * @debug_id: to track enum peer access
  5946. * Return: peer instance pointer
  5947. */
  5948. static inline void *
  5949. dp_wrapper_peer_get_ref_by_addr(struct cdp_pdev *dev, u8 *peer_mac_addr,
  5950. u8 *local_id,
  5951. enum peer_debug_id_type debug_id)
  5952. {
  5953. /*
  5954. * Currently this function does not implement the "get ref"
  5955. * functionality and is mapped to dp_find_peer_by_addr which does not
  5956. * increment the peer ref count. So the peer state is uncertain after
  5957. * calling this API. The functionality needs to be implemented.
  5958. * Accordingly the corresponding release_ref function is NULL.
  5959. */
  5960. return dp_find_peer_by_addr(dev, peer_mac_addr, local_id);
  5961. }
  5962. static struct cdp_peer_ops dp_ops_peer = {
  5963. .register_peer = dp_register_peer,
  5964. .clear_peer = dp_clear_peer,
  5965. .find_peer_by_addr = dp_find_peer_by_addr,
  5966. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  5967. .peer_get_ref_by_addr = dp_wrapper_peer_get_ref_by_addr,
  5968. .peer_release_ref = NULL,
  5969. .local_peer_id = dp_local_peer_id,
  5970. .peer_find_by_local_id = dp_peer_find_by_local_id,
  5971. .peer_state_update = dp_peer_state_update,
  5972. .get_vdevid = dp_get_vdevid,
  5973. .get_vdev_by_sta_id = dp_get_vdev_by_sta_id,
  5974. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  5975. .get_vdev_for_peer = dp_get_vdev_for_peer,
  5976. .get_peer_state = dp_get_peer_state,
  5977. .last_assoc_received = dp_get_last_assoc_received,
  5978. .last_disassoc_received = dp_get_last_disassoc_received,
  5979. .last_deauth_received = dp_get_last_deauth_received,
  5980. };
  5981. #endif
  5982. static struct cdp_ops dp_txrx_ops = {
  5983. .cmn_drv_ops = &dp_ops_cmn,
  5984. .ctrl_ops = &dp_ops_ctrl,
  5985. .me_ops = &dp_ops_me,
  5986. .mon_ops = &dp_ops_mon,
  5987. .host_stats_ops = &dp_ops_host_stats,
  5988. .wds_ops = &dp_ops_wds,
  5989. .raw_ops = &dp_ops_raw,
  5990. #ifdef CONFIG_WIN
  5991. .pflow_ops = &dp_ops_pflow,
  5992. #endif /* CONFIG_WIN */
  5993. #ifndef CONFIG_WIN
  5994. .misc_ops = &dp_ops_misc,
  5995. .cfg_ops = &dp_ops_cfg,
  5996. .flowctl_ops = &dp_ops_flowctl,
  5997. .l_flowctl_ops = &dp_ops_l_flowctl,
  5998. #ifdef IPA_OFFLOAD
  5999. .ipa_ops = &dp_ops_ipa,
  6000. #endif
  6001. .bus_ops = &dp_ops_bus,
  6002. .ocb_ops = &dp_ops_ocb,
  6003. .peer_ops = &dp_ops_peer,
  6004. .throttle_ops = &dp_ops_throttle,
  6005. .mob_stats_ops = &dp_ops_mob_stats,
  6006. #endif
  6007. };
  6008. /*
  6009. * dp_soc_set_txrx_ring_map()
  6010. * @dp_soc: DP handler for soc
  6011. *
  6012. * Return: Void
  6013. */
  6014. static void dp_soc_set_txrx_ring_map(struct dp_soc *soc)
  6015. {
  6016. uint32_t i;
  6017. for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
  6018. soc->tx_ring_map[i] = dp_cpu_ring_map[DP_DEFAULT_MAP][i];
  6019. }
  6020. }
  6021. /*
  6022. * dp_soc_attach_wifi3() - Attach txrx SOC
  6023. * @ctrl_psoc: Opaque SOC handle from control plane
  6024. * @htc_handle: Opaque HTC handle
  6025. * @hif_handle: Opaque HIF handle
  6026. * @qdf_osdev: QDF device
  6027. *
  6028. * Return: DP SOC handle on success, NULL on failure
  6029. */
  6030. /*
  6031. * Local prototype added to temporarily address warning caused by
  6032. * -Wmissing-prototypes. A more correct solution, namely to expose
  6033. * a prototype in an appropriate header file, will come later.
  6034. */
  6035. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6036. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6037. struct ol_if_ops *ol_ops);
  6038. void *dp_soc_attach_wifi3(void *ctrl_psoc, void *hif_handle,
  6039. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  6040. struct ol_if_ops *ol_ops)
  6041. {
  6042. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  6043. if (!soc) {
  6044. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6045. FL("DP SOC memory allocation failed"));
  6046. goto fail0;
  6047. }
  6048. soc->cdp_soc.ops = &dp_txrx_ops;
  6049. soc->cdp_soc.ol_ops = ol_ops;
  6050. soc->ctrl_psoc = ctrl_psoc;
  6051. soc->osdev = qdf_osdev;
  6052. soc->hif_handle = hif_handle;
  6053. soc->hal_soc = hif_get_hal_handle(hif_handle);
  6054. soc->htt_handle = htt_soc_attach(soc, ctrl_psoc, htc_handle,
  6055. soc->hal_soc, qdf_osdev);
  6056. if (!soc->htt_handle) {
  6057. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6058. FL("HTT attach failed"));
  6059. goto fail1;
  6060. }
  6061. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  6062. if (!soc->wlan_cfg_ctx) {
  6063. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6064. FL("wlan_cfg_soc_attach failed"));
  6065. goto fail2;
  6066. }
  6067. wlan_cfg_set_rx_hash(soc->wlan_cfg_ctx, rx_hash);
  6068. soc->cce_disable = false;
  6069. if (soc->cdp_soc.ol_ops->get_dp_cfg_param) {
  6070. int ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6071. CDP_CFG_MAX_PEER_ID);
  6072. if (ret != -EINVAL) {
  6073. wlan_cfg_set_max_peer_id(soc->wlan_cfg_ctx, ret);
  6074. }
  6075. ret = soc->cdp_soc.ol_ops->get_dp_cfg_param(soc->ctrl_psoc,
  6076. CDP_CFG_CCE_DISABLE);
  6077. if (ret == 1)
  6078. soc->cce_disable = true;
  6079. }
  6080. qdf_spinlock_create(&soc->peer_ref_mutex);
  6081. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  6082. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  6083. /* fill the tx/rx cpu ring map*/
  6084. dp_soc_set_txrx_ring_map(soc);
  6085. qdf_spinlock_create(&soc->htt_stats.lock);
  6086. /* initialize work queue for stats processing */
  6087. qdf_create_work(0, &soc->htt_stats.work, htt_t2h_stats_handler, soc);
  6088. /*Initialize inactivity timer for wifison */
  6089. dp_init_inact_timer(soc);
  6090. return (void *)soc;
  6091. fail2:
  6092. htt_soc_detach(soc->htt_handle);
  6093. fail1:
  6094. qdf_mem_free(soc);
  6095. fail0:
  6096. return NULL;
  6097. }
  6098. /*
  6099. * dp_get_pdev_for_mac_id() - Return pdev for mac_id
  6100. *
  6101. * @soc: handle to DP soc
  6102. * @mac_id: MAC id
  6103. *
  6104. * Return: Return pdev corresponding to MAC
  6105. */
  6106. void *dp_get_pdev_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  6107. {
  6108. if (wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  6109. return soc->pdev_list[mac_id];
  6110. /* Typically for MCL as there only 1 PDEV*/
  6111. return soc->pdev_list[0];
  6112. }
  6113. /*
  6114. * dp_get_ring_id_for_mac_id() - Return pdev for mac_id
  6115. *
  6116. * @soc: handle to DP soc
  6117. * @mac_id: MAC id
  6118. *
  6119. * Return: ring id
  6120. */
  6121. int dp_get_ring_id_for_mac_id(struct dp_soc *soc, uint32_t mac_id)
  6122. {
  6123. /*
  6124. * Single pdev using both MACs will operate on both MAC rings,
  6125. * which is the case for MCL.
  6126. */
  6127. if (!wlan_cfg_per_pdev_lmac_ring(soc->wlan_cfg_ctx))
  6128. return mac_id;
  6129. /* For WIN each PDEV will operate one ring, so index is zero. */
  6130. return 0;
  6131. }
  6132. /*
  6133. * dp_is_hw_dbs_enable() - Procedure to check if DBS is supported
  6134. * @soc: DP SoC context
  6135. * @max_mac_rings: No of MAC rings
  6136. *
  6137. * Return: None
  6138. */
  6139. static
  6140. void dp_is_hw_dbs_enable(struct dp_soc *soc,
  6141. int *max_mac_rings)
  6142. {
  6143. bool dbs_enable = false;
  6144. if (soc->cdp_soc.ol_ops->is_hw_dbs_2x2_capable)
  6145. dbs_enable = soc->cdp_soc.ol_ops->
  6146. is_hw_dbs_2x2_capable(soc->ctrl_psoc);
  6147. *max_mac_rings = (dbs_enable)?(*max_mac_rings):1;
  6148. }
  6149. /*
  6150. * dp_set_pktlog_wifi3() - attach txrx vdev
  6151. * @pdev: Datapath PDEV handle
  6152. * @event: which event's notifications are being subscribed to
  6153. * @enable: WDI event subscribe or not. (True or False)
  6154. *
  6155. * Return: Success, NULL on failure
  6156. */
  6157. #ifdef WDI_EVENT_ENABLE
  6158. int dp_set_pktlog_wifi3(struct dp_pdev *pdev, uint32_t event,
  6159. bool enable)
  6160. {
  6161. struct dp_soc *soc = pdev->soc;
  6162. struct htt_rx_ring_tlv_filter htt_tlv_filter = {0};
  6163. int max_mac_rings = wlan_cfg_get_num_mac_rings
  6164. (pdev->wlan_cfg_ctx);
  6165. uint8_t mac_id = 0;
  6166. dp_is_hw_dbs_enable(soc, &max_mac_rings);
  6167. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
  6168. FL("Max_mac_rings %d \n"),
  6169. max_mac_rings);
  6170. if (enable) {
  6171. switch (event) {
  6172. case WDI_EVENT_RX_DESC:
  6173. if (pdev->monitor_vdev) {
  6174. /* Nothing needs to be done if monitor mode is
  6175. * enabled
  6176. */
  6177. return 0;
  6178. }
  6179. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_FULL) {
  6180. pdev->rx_pktlog_mode = DP_RX_PKTLOG_FULL;
  6181. htt_tlv_filter.mpdu_start = 1;
  6182. htt_tlv_filter.msdu_start = 1;
  6183. htt_tlv_filter.msdu_end = 1;
  6184. htt_tlv_filter.mpdu_end = 1;
  6185. htt_tlv_filter.packet_header = 1;
  6186. htt_tlv_filter.attention = 1;
  6187. htt_tlv_filter.ppdu_start = 1;
  6188. htt_tlv_filter.ppdu_end = 1;
  6189. htt_tlv_filter.ppdu_end_user_stats = 1;
  6190. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6191. htt_tlv_filter.ppdu_end_status_done = 1;
  6192. htt_tlv_filter.enable_fp = 1;
  6193. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6194. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6195. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6196. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6197. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6198. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6199. for (mac_id = 0; mac_id < max_mac_rings;
  6200. mac_id++) {
  6201. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6202. pdev->pdev_id + mac_id,
  6203. pdev->rxdma_mon_status_ring
  6204. .hal_srng,
  6205. RXDMA_MONITOR_STATUS,
  6206. RX_BUFFER_SIZE,
  6207. &htt_tlv_filter);
  6208. }
  6209. if (soc->reap_timer_init)
  6210. qdf_timer_mod(&soc->mon_reap_timer,
  6211. DP_INTR_POLL_TIMER_MS);
  6212. }
  6213. break;
  6214. case WDI_EVENT_LITE_RX:
  6215. if (pdev->monitor_vdev) {
  6216. /* Nothing needs to be done if monitor mode is
  6217. * enabled
  6218. */
  6219. return 0;
  6220. }
  6221. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_LITE) {
  6222. pdev->rx_pktlog_mode = DP_RX_PKTLOG_LITE;
  6223. htt_tlv_filter.ppdu_start = 1;
  6224. htt_tlv_filter.ppdu_end = 1;
  6225. htt_tlv_filter.ppdu_end_user_stats = 1;
  6226. htt_tlv_filter.ppdu_end_user_stats_ext = 1;
  6227. htt_tlv_filter.ppdu_end_status_done = 1;
  6228. htt_tlv_filter.mpdu_start = 1;
  6229. htt_tlv_filter.enable_fp = 1;
  6230. htt_tlv_filter.fp_mgmt_filter = FILTER_MGMT_ALL;
  6231. htt_tlv_filter.fp_ctrl_filter = FILTER_CTRL_ALL;
  6232. htt_tlv_filter.fp_data_filter = FILTER_DATA_ALL;
  6233. htt_tlv_filter.mo_mgmt_filter = FILTER_MGMT_ALL;
  6234. htt_tlv_filter.mo_ctrl_filter = FILTER_CTRL_ALL;
  6235. htt_tlv_filter.mo_data_filter = FILTER_DATA_ALL;
  6236. for (mac_id = 0; mac_id < max_mac_rings;
  6237. mac_id++) {
  6238. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6239. pdev->pdev_id + mac_id,
  6240. pdev->rxdma_mon_status_ring
  6241. .hal_srng,
  6242. RXDMA_MONITOR_STATUS,
  6243. RX_BUFFER_SIZE_PKTLOG_LITE,
  6244. &htt_tlv_filter);
  6245. }
  6246. if (soc->reap_timer_init)
  6247. qdf_timer_mod(&soc->mon_reap_timer,
  6248. DP_INTR_POLL_TIMER_MS);
  6249. }
  6250. break;
  6251. case WDI_EVENT_LITE_T2H:
  6252. if (pdev->monitor_vdev) {
  6253. /* Nothing needs to be done if monitor mode is
  6254. * enabled
  6255. */
  6256. return 0;
  6257. }
  6258. /* To enable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  6259. * passing value 0xffff. Once these macros will define
  6260. * in htt header file will use proper macros
  6261. */
  6262. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6263. pdev->pktlog_ppdu_stats = true;
  6264. dp_h2t_cfg_stats_msg_send(pdev, 0xffff,
  6265. pdev->pdev_id + mac_id);
  6266. }
  6267. break;
  6268. default:
  6269. /* Nothing needs to be done for other pktlog types */
  6270. break;
  6271. }
  6272. } else {
  6273. switch (event) {
  6274. case WDI_EVENT_RX_DESC:
  6275. case WDI_EVENT_LITE_RX:
  6276. if (pdev->monitor_vdev) {
  6277. /* Nothing needs to be done if monitor mode is
  6278. * enabled
  6279. */
  6280. return 0;
  6281. }
  6282. if (pdev->rx_pktlog_mode != DP_RX_PKTLOG_DISABLED) {
  6283. pdev->rx_pktlog_mode = DP_RX_PKTLOG_DISABLED;
  6284. for (mac_id = 0; mac_id < max_mac_rings;
  6285. mac_id++) {
  6286. htt_h2t_rx_ring_cfg(soc->htt_handle,
  6287. pdev->pdev_id + mac_id,
  6288. pdev->rxdma_mon_status_ring
  6289. .hal_srng,
  6290. RXDMA_MONITOR_STATUS,
  6291. RX_BUFFER_SIZE,
  6292. &htt_tlv_filter);
  6293. }
  6294. if (soc->reap_timer_init)
  6295. qdf_timer_stop(&soc->mon_reap_timer);
  6296. }
  6297. break;
  6298. case WDI_EVENT_LITE_T2H:
  6299. if (pdev->monitor_vdev) {
  6300. /* Nothing needs to be done if monitor mode is
  6301. * enabled
  6302. */
  6303. return 0;
  6304. }
  6305. /* To disable HTT_H2T_MSG_TYPE_PPDU_STATS_CFG in FW
  6306. * passing value 0. Once these macros will define in htt
  6307. * header file will use proper macros
  6308. */
  6309. for (mac_id = 0; mac_id < max_mac_rings; mac_id++) {
  6310. pdev->pktlog_ppdu_stats = false;
  6311. if (!pdev->enhanced_stats_en && !pdev->tx_sniffer_enable && !pdev->mcopy_mode) {
  6312. dp_h2t_cfg_stats_msg_send(pdev, 0,
  6313. pdev->pdev_id + mac_id);
  6314. } else if (pdev->tx_sniffer_enable || pdev->mcopy_mode) {
  6315. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_SNIFFER,
  6316. pdev->pdev_id + mac_id);
  6317. } else if (pdev->enhanced_stats_en) {
  6318. dp_h2t_cfg_stats_msg_send(pdev, DP_PPDU_STATS_CFG_ENH_STATS,
  6319. pdev->pdev_id + mac_id);
  6320. }
  6321. }
  6322. break;
  6323. default:
  6324. /* Nothing needs to be done for other pktlog types */
  6325. break;
  6326. }
  6327. }
  6328. return 0;
  6329. }
  6330. #endif
  6331. #ifdef CONFIG_MCL
  6332. /*
  6333. * dp_service_mon_rings()- timer to reap monitor rings
  6334. * reqd as we are not getting ppdu end interrupts
  6335. * @arg: SoC Handle
  6336. *
  6337. * Return:
  6338. *
  6339. */
  6340. static void dp_service_mon_rings(void *arg)
  6341. {
  6342. struct dp_soc *soc = (struct dp_soc *) arg;
  6343. int ring = 0, work_done;
  6344. work_done = dp_mon_process(soc, ring, QCA_NAPI_BUDGET);
  6345. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  6346. FL("Reaped %d descs from Monitor rings"), work_done);
  6347. qdf_timer_mod(&soc->mon_reap_timer, DP_INTR_POLL_TIMER_MS);
  6348. }
  6349. #ifndef REMOVE_PKT_LOG
  6350. /**
  6351. * dp_pkt_log_init() - API to initialize packet log
  6352. * @ppdev: physical device handle
  6353. * @scn: HIF context
  6354. *
  6355. * Return: none
  6356. */
  6357. void dp_pkt_log_init(struct cdp_pdev *ppdev, void *scn)
  6358. {
  6359. struct dp_pdev *handle = (struct dp_pdev *)ppdev;
  6360. if (handle->pkt_log_init) {
  6361. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6362. "%s: Packet log not initialized", __func__);
  6363. return;
  6364. }
  6365. pktlog_sethandle(&handle->pl_dev, scn);
  6366. pktlog_set_callback_regtype(PKTLOG_LITE_CALLBACK_REGISTRATION);
  6367. if (pktlogmod_init(scn)) {
  6368. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6369. "%s: pktlogmod_init failed", __func__);
  6370. handle->pkt_log_init = false;
  6371. } else {
  6372. handle->pkt_log_init = true;
  6373. }
  6374. }
  6375. /**
  6376. * dp_pkt_log_con_service() - connect packet log service
  6377. * @ppdev: physical device handle
  6378. * @scn: device context
  6379. *
  6380. * Return: none
  6381. */
  6382. static void dp_pkt_log_con_service(struct cdp_pdev *ppdev, void *scn)
  6383. {
  6384. struct dp_pdev *pdev = (struct dp_pdev *)ppdev;
  6385. dp_pkt_log_init((struct cdp_pdev *)pdev, scn);
  6386. pktlog_htc_attach();
  6387. }
  6388. /**
  6389. * dp_pktlogmod_exit() - API to cleanup pktlog info
  6390. * @handle: Pdev handle
  6391. *
  6392. * Return: none
  6393. */
  6394. static void dp_pktlogmod_exit(struct dp_pdev *handle)
  6395. {
  6396. void *scn = (void *)handle->soc->hif_handle;
  6397. if (!scn) {
  6398. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  6399. "%s: Invalid hif(scn) handle", __func__);
  6400. return;
  6401. }
  6402. pktlogmod_exit(scn);
  6403. handle->pkt_log_init = false;
  6404. }
  6405. #endif
  6406. #else
  6407. static void dp_pktlogmod_exit(struct dp_pdev *handle) { }
  6408. #endif