wsa884x.c 65 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/init.h>
  8. #include <linux/slab.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/device.h>
  11. #include <linux/printk.h>
  12. #include <linux/bitops.h>
  13. #include <linux/regulator/consumer.h>
  14. #include <linux/pm_runtime.h>
  15. #include <linux/delay.h>
  16. #include <linux/kernel.h>
  17. #include <linux/gpio.h>
  18. #include <linux/of_gpio.h>
  19. #include <linux/of_platform.h>
  20. #include <linux/regmap.h>
  21. #include <linux/debugfs.h>
  22. #include <soc/soundwire.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/tlv.h>
  28. #include <asoc/msm-cdc-pinctrl.h>
  29. #include <asoc/msm-cdc-supply.h>
  30. #include "wsa884x.h"
  31. #include "internal.h"
  32. #include "asoc/bolero-slave-internal.h"
  33. #include <linux/qti-regmap-debugfs.h>
  34. #define T1_TEMP -10
  35. #define T2_TEMP 150
  36. #define LOW_TEMP_THRESHOLD 5
  37. #define HIGH_TEMP_THRESHOLD 45
  38. #define TEMP_INVALID 0xFFFF
  39. #define WSA884X_TEMP_RETRY 3
  40. #define PBR_MAX_VOLTAGE 20
  41. #define PBR_MAX_CODE 255
  42. #define MAX_NAME_LEN 40
  43. #define WSA884X_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
  44. SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
  45. SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000 |\
  46. SNDRV_PCM_RATE_384000)
  47. /* Fractional Rates */
  48. #define WSA884X_FRAC_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_88200 |\
  49. SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800)
  50. #define WSA884X_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
  51. SNDRV_PCM_FMTBIT_S24_LE |\
  52. SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)
  53. #define REG_FIELD_VALUE(register_name, field_name, value) \
  54. WSA884X_##register_name, FIELD_MASK(register_name, field_name), \
  55. value << FIELD_SHIFT(register_name, field_name)
  56. struct wsa_temp_register {
  57. u8 d1_msb;
  58. u8 d1_lsb;
  59. u8 d2_msb;
  60. u8 d2_lsb;
  61. u8 dmeas_msb;
  62. u8 dmeas_lsb;
  63. };
  64. enum {
  65. COMP_OFFSET0,
  66. COMP_OFFSET1,
  67. COMP_OFFSET2,
  68. COMP_OFFSET3,
  69. COMP_OFFSET4,
  70. };
  71. #define WSA884X_VTH_TO_REG(vth) \
  72. ((vth) != 0 ? (((vth) - 150 / PBR_MAX_VOLTAGE) * PBR_MAX_CODE / 100) : 0)
  73. struct wsa_reg_mask_val {
  74. u16 reg;
  75. u8 mask;
  76. u8 val;
  77. };
  78. static const struct wsa_reg_mask_val reg_init[] = {
  79. {REG_FIELD_VALUE(CKWD_CTL_1, VPP_SW_CTL, 0x00)},
  80. {REG_FIELD_VALUE(CDC_SPK_DSM_A2_0, COEF_A2, 0x0A)},
  81. {REG_FIELD_VALUE(CDC_SPK_DSM_A2_1, COEF_A2, 0x08)},
  82. {REG_FIELD_VALUE(CDC_SPK_DSM_A3_0, COEF_A3, 0xF3)},
  83. {REG_FIELD_VALUE(CDC_SPK_DSM_A3_1, COEF_A3, 0x07)},
  84. {REG_FIELD_VALUE(CDC_SPK_DSM_A4_0, COEF_A4, 0x79)},
  85. {REG_FIELD_VALUE(CDC_SPK_DSM_A5_0, COEF_A5, 0x0B)},
  86. {REG_FIELD_VALUE(CDC_SPK_DSM_A6_0, COEF_A6, 0x8A)},
  87. {REG_FIELD_VALUE(CDC_SPK_DSM_A7_0, COEF_A7, 0x9B)},
  88. {REG_FIELD_VALUE(CDC_SPK_DSM_C_0, COEF_C3, 0x06)},
  89. {REG_FIELD_VALUE(CDC_SPK_DSM_C_0, COEF_C2, 0x08)},
  90. {REG_FIELD_VALUE(CDC_SPK_DSM_C_2, COEF_C7, 0x0F)},
  91. {REG_FIELD_VALUE(CDC_SPK_DSM_C_3, COEF_C7, 0x20)},
  92. {REG_FIELD_VALUE(CDC_SPK_DSM_R1, SAT_LIMIT_R1, 0x83)},
  93. {REG_FIELD_VALUE(CDC_SPK_DSM_R2, SAT_LIMIT_R2, 0x7F)},
  94. {REG_FIELD_VALUE(CDC_SPK_DSM_R3, SAT_LIMIT_R3, 0x9D)},
  95. {REG_FIELD_VALUE(CDC_SPK_DSM_R4, SAT_LIMIT_R4, 0x82)},
  96. {REG_FIELD_VALUE(CDC_SPK_DSM_R5, SAT_LIMIT_R5, 0x8B)},
  97. {REG_FIELD_VALUE(CDC_SPK_DSM_R6, SAT_LIMIT_R6, 0x9B)},
  98. {REG_FIELD_VALUE(CDC_SPK_DSM_R7, SAT_LIMIT_R7, 0x3F)},
  99. {REG_FIELD_VALUE(BOP_DEGLITCH_CTL, BOP_DEGLITCH_SETTING, 0x08)},
  100. {REG_FIELD_VALUE(VBAT_THRM_FLT_CTL, VBAT_COEF_SEL, 0x04)},
  101. {REG_FIELD_VALUE(CLSH_CTL_0, DLY_CODE, 0x06)},
  102. {REG_FIELD_VALUE(CLSH_SOFT_MAX, SOFT_MAX, 0xFF)},
  103. {REG_FIELD_VALUE(OTP_REG_38, BOOST_ILIM_TUNE, 0x00)},
  104. {REG_FIELD_VALUE(OTP_REG_40, ISENSE_RESCAL, 0x08)},
  105. {REG_FIELD_VALUE(STB_CTRL1, SLOPE_COMP_CURRENT, 0x0D)},
  106. {REG_FIELD_VALUE(ILIM_CTRL1, ILIM_OFFSET_PB, 0x03)},
  107. {REG_FIELD_VALUE(CURRENT_LIMIT, CURRENT_LIMIT, 0x09)},
  108. {REG_FIELD_VALUE(CKWD_CTL_1, CKWD_VCOMP_VREF_SEL, 0x13)},
  109. };
  110. static int wsa884x_handle_post_irq(void *data);
  111. static int wsa884x_get_temperature(struct snd_soc_component *component,
  112. int *temp);
  113. enum {
  114. WSA8840 = 0,
  115. WSA8845 = 5,
  116. WSA8845H = 0xC,
  117. };
  118. enum {
  119. SPKR_STATUS = 0,
  120. WSA_SUPPLIES_LPM_MODE,
  121. SPKR_ADIE_LB,
  122. };
  123. enum {
  124. WSA884X_IRQ_INT_SAF2WAR = 0,
  125. WSA884X_IRQ_INT_WAR2SAF,
  126. WSA884X_IRQ_INT_DISABLE,
  127. WSA884X_IRQ_INT_OCP,
  128. WSA884X_IRQ_INT_CLIP,
  129. WSA884X_IRQ_INT_PDM_WD,
  130. WSA884X_IRQ_INT_CLK_WD,
  131. WSA884X_IRQ_INT_INTR_PIN,
  132. WSA884X_IRQ_INT_UVLO,
  133. WSA884X_IRQ_INT_PA_ON_ERR,
  134. WSA884X_NUM_IRQS,
  135. };
  136. static const struct regmap_irq wsa884x_irqs[WSA884X_NUM_IRQS] = {
  137. REGMAP_IRQ_REG(WSA884X_IRQ_INT_SAF2WAR, 0, 0x01),
  138. REGMAP_IRQ_REG(WSA884X_IRQ_INT_WAR2SAF, 0, 0x02),
  139. REGMAP_IRQ_REG(WSA884X_IRQ_INT_DISABLE, 0, 0x04),
  140. REGMAP_IRQ_REG(WSA884X_IRQ_INT_OCP, 0, 0x08),
  141. REGMAP_IRQ_REG(WSA884X_IRQ_INT_CLIP, 0, 0x10),
  142. REGMAP_IRQ_REG(WSA884X_IRQ_INT_PDM_WD, 0, 0x20),
  143. REGMAP_IRQ_REG(WSA884X_IRQ_INT_CLK_WD, 0, 0x40),
  144. REGMAP_IRQ_REG(WSA884X_IRQ_INT_INTR_PIN, 0, 0x80),
  145. REGMAP_IRQ_REG(WSA884X_IRQ_INT_UVLO, 1, 0x01),
  146. REGMAP_IRQ_REG(WSA884X_IRQ_INT_PA_ON_ERR, 1, 0x02),
  147. };
  148. static struct regmap_irq_chip wsa884x_regmap_irq_chip = {
  149. .name = "wsa884x",
  150. .irqs = wsa884x_irqs,
  151. .num_irqs = ARRAY_SIZE(wsa884x_irqs),
  152. .num_regs = 2,
  153. .status_base = WSA884X_INTR_STATUS0,
  154. .mask_base = WSA884X_INTR_MASK0,
  155. .type_base = WSA884X_INTR_LEVEL0,
  156. .ack_base = WSA884X_INTR_CLEAR0,
  157. .use_ack = 1,
  158. .runtime_pm = false,
  159. .handle_post_irq = wsa884x_handle_post_irq,
  160. .irq_drv_data = NULL,
  161. };
  162. static int wsa884x_handle_post_irq(void *data)
  163. {
  164. struct wsa884x_priv *wsa884x = data;
  165. u32 sts1 = 0, sts2 = 0;
  166. regmap_read(wsa884x->regmap, WSA884X_INTR_STATUS0, &sts1);
  167. regmap_read(wsa884x->regmap, WSA884X_INTR_STATUS1, &sts2);
  168. wsa884x->swr_slave->slave_irq_pending =
  169. ((sts1 || sts2) ? true : false);
  170. return IRQ_HANDLED;
  171. }
  172. #ifdef CONFIG_DEBUG_FS
  173. static int codec_debug_open(struct inode *inode, struct file *file)
  174. {
  175. file->private_data = inode->i_private;
  176. return 0;
  177. }
  178. static int get_parameters(char *buf, u32 *param1, int num_of_par)
  179. {
  180. char *token;
  181. int base, cnt;
  182. token = strsep(&buf, " ");
  183. for (cnt = 0; cnt < num_of_par; cnt++) {
  184. if (token) {
  185. if ((token[1] == 'x') || (token[1] == 'X'))
  186. base = 16;
  187. else
  188. base = 10;
  189. if (kstrtou32(token, base, &param1[cnt]) != 0)
  190. return -EINVAL;
  191. token = strsep(&buf, " ");
  192. } else {
  193. return -EINVAL;
  194. }
  195. }
  196. return 0;
  197. }
  198. static bool is_swr_slave_reg_readable(int reg)
  199. {
  200. int ret = true;
  201. if (((reg > 0x46) && (reg < 0x4A)) ||
  202. ((reg > 0x4A) && (reg < 0x50)) ||
  203. ((reg > 0x55) && (reg < 0xD0)) ||
  204. ((reg > 0xD0) && (reg < 0xE0)) ||
  205. ((reg > 0xE0) && (reg < 0xF0)) ||
  206. ((reg > 0xF0) && (reg < 0x100)) ||
  207. ((reg > 0x105) && (reg < 0x120)) ||
  208. ((reg > 0x205) && (reg < 0x220)) ||
  209. ((reg > 0x305) && (reg < 0x320)) ||
  210. ((reg > 0x405) && (reg < 0x420)) ||
  211. ((reg > 0x128) && (reg < 0x130)) ||
  212. ((reg > 0x228) && (reg < 0x230)) ||
  213. ((reg > 0x328) && (reg < 0x330)) ||
  214. ((reg > 0x428) && (reg < 0x430)) ||
  215. ((reg > 0x138) && (reg < 0x205)) ||
  216. ((reg > 0x238) && (reg < 0x305)) ||
  217. ((reg > 0x338) && (reg < 0x405)) ||
  218. ((reg > 0x405) && (reg < 0xF00)) ||
  219. ((reg > 0xF05) && (reg < 0xF20)) ||
  220. ((reg > 0xF25) && (reg < 0xF30)) ||
  221. ((reg > 0xF35) && (reg < 0x2000)))
  222. ret = false;
  223. return ret;
  224. }
  225. static ssize_t swr_slave_reg_show(struct swr_device *pdev, char __user *ubuf,
  226. size_t count, loff_t *ppos)
  227. {
  228. int i, reg_val, len;
  229. ssize_t total = 0;
  230. char tmp_buf[SWR_SLV_MAX_BUF_LEN];
  231. if (!ubuf || !ppos)
  232. return 0;
  233. for (i = (((int) *ppos/BYTES_PER_LINE) + SWR_SLV_START_REG_ADDR);
  234. i <= SWR_SLV_MAX_REG_ADDR; i++) {
  235. if (!is_swr_slave_reg_readable(i))
  236. continue;
  237. swr_read(pdev, pdev->dev_num, i, &reg_val, 1);
  238. len = snprintf(tmp_buf, sizeof(tmp_buf), "0x%.3x: 0x%.2x\n", i,
  239. (reg_val & 0xFF));
  240. if (len < 0) {
  241. pr_err("%s: fail to fill the buffer\n", __func__);
  242. total = -EFAULT;
  243. goto copy_err;
  244. }
  245. if ((total + len) >= count - 1)
  246. break;
  247. if (copy_to_user((ubuf + total), tmp_buf, len)) {
  248. pr_err("%s: fail to copy reg dump\n", __func__);
  249. total = -EFAULT;
  250. goto copy_err;
  251. }
  252. total += len;
  253. *ppos += len;
  254. }
  255. copy_err:
  256. *ppos = SWR_SLV_MAX_REG_ADDR * BYTES_PER_LINE;
  257. return total;
  258. }
  259. static ssize_t codec_debug_dump(struct file *file, char __user *ubuf,
  260. size_t count, loff_t *ppos)
  261. {
  262. struct swr_device *pdev;
  263. if (!count || !file || !ppos || !ubuf)
  264. return -EINVAL;
  265. pdev = file->private_data;
  266. if (!pdev)
  267. return -EINVAL;
  268. if (*ppos < 0)
  269. return -EINVAL;
  270. return swr_slave_reg_show(pdev, ubuf, count, ppos);
  271. }
  272. static ssize_t codec_debug_read(struct file *file, char __user *ubuf,
  273. size_t count, loff_t *ppos)
  274. {
  275. char lbuf[SWR_SLV_RD_BUF_LEN];
  276. struct swr_device *pdev = NULL;
  277. struct wsa884x_priv *wsa884x = NULL;
  278. if (!count || !file || !ppos || !ubuf)
  279. return -EINVAL;
  280. pdev = file->private_data;
  281. if (!pdev)
  282. return -EINVAL;
  283. wsa884x = swr_get_dev_data(pdev);
  284. if (!wsa884x)
  285. return -EINVAL;
  286. if (*ppos < 0)
  287. return -EINVAL;
  288. snprintf(lbuf, sizeof(lbuf), "0x%x\n",
  289. (wsa884x->read_data & 0xFF));
  290. return simple_read_from_buffer(ubuf, count, ppos, lbuf,
  291. strnlen(lbuf, 7));
  292. }
  293. static ssize_t codec_debug_peek_write(struct file *file,
  294. const char __user *ubuf, size_t cnt, loff_t *ppos)
  295. {
  296. char lbuf[SWR_SLV_WR_BUF_LEN];
  297. int rc = 0;
  298. u32 param[5];
  299. struct swr_device *pdev = NULL;
  300. struct wsa884x_priv *wsa884x = NULL;
  301. if (!cnt || !file || !ppos || !ubuf)
  302. return -EINVAL;
  303. pdev = file->private_data;
  304. if (!pdev)
  305. return -EINVAL;
  306. wsa884x = swr_get_dev_data(pdev);
  307. if (!wsa884x)
  308. return -EINVAL;
  309. if (*ppos < 0)
  310. return -EINVAL;
  311. if (cnt > sizeof(lbuf) - 1)
  312. return -EINVAL;
  313. rc = copy_from_user(lbuf, ubuf, cnt);
  314. if (rc)
  315. return -EFAULT;
  316. lbuf[cnt] = '\0';
  317. rc = get_parameters(lbuf, param, 1);
  318. if (!((param[0] <= SWR_SLV_MAX_REG_ADDR) && (rc == 0)))
  319. return -EINVAL;
  320. swr_read(pdev, pdev->dev_num, param[0], &wsa884x->read_data, 1);
  321. if (rc == 0)
  322. rc = cnt;
  323. else
  324. pr_err("%s: rc = %d\n", __func__, rc);
  325. return rc;
  326. }
  327. static ssize_t codec_debug_write(struct file *file,
  328. const char __user *ubuf, size_t cnt, loff_t *ppos)
  329. {
  330. char lbuf[SWR_SLV_WR_BUF_LEN];
  331. int rc = 0;
  332. u32 param[5];
  333. struct swr_device *pdev;
  334. if (!file || !ppos || !ubuf)
  335. return -EINVAL;
  336. pdev = file->private_data;
  337. if (!pdev)
  338. return -EINVAL;
  339. if (cnt > sizeof(lbuf) - 1)
  340. return -EINVAL;
  341. rc = copy_from_user(lbuf, ubuf, cnt);
  342. if (rc)
  343. return -EFAULT;
  344. lbuf[cnt] = '\0';
  345. rc = get_parameters(lbuf, param, 2);
  346. if (!((param[0] <= SWR_SLV_MAX_REG_ADDR) &&
  347. (param[1] <= 0xFF) && (rc == 0)))
  348. return -EINVAL;
  349. swr_write(pdev, pdev->dev_num, param[0], &param[1]);
  350. if (rc == 0)
  351. rc = cnt;
  352. else
  353. pr_err("%s: rc = %d\n", __func__, rc);
  354. return rc;
  355. }
  356. static const struct file_operations codec_debug_write_ops = {
  357. .open = codec_debug_open,
  358. .write = codec_debug_write,
  359. };
  360. static const struct file_operations codec_debug_read_ops = {
  361. .open = codec_debug_open,
  362. .read = codec_debug_read,
  363. .write = codec_debug_peek_write,
  364. };
  365. static const struct file_operations codec_debug_dump_ops = {
  366. .open = codec_debug_open,
  367. .read = codec_debug_dump,
  368. };
  369. #endif
  370. static void wsa884x_regcache_sync(struct wsa884x_priv *wsa884x)
  371. {
  372. mutex_lock(&wsa884x->res_lock);
  373. regcache_mark_dirty(wsa884x->regmap);
  374. regcache_sync(wsa884x->regmap);
  375. mutex_unlock(&wsa884x->res_lock);
  376. }
  377. static irqreturn_t wsa884x_saf2war_handle_irq(int irq, void *data)
  378. {
  379. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  380. __func__, irq);
  381. return IRQ_HANDLED;
  382. }
  383. static irqreturn_t wsa884x_war2saf_handle_irq(int irq, void *data)
  384. {
  385. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  386. __func__, irq);
  387. return IRQ_HANDLED;
  388. }
  389. static irqreturn_t wsa884x_otp_handle_irq(int irq, void *data)
  390. {
  391. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  392. __func__, irq);
  393. return IRQ_HANDLED;
  394. }
  395. static irqreturn_t wsa884x_ocp_handle_irq(int irq, void *data)
  396. {
  397. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  398. __func__, irq);
  399. return IRQ_HANDLED;
  400. }
  401. static irqreturn_t wsa884x_clip_handle_irq(int irq, void *data)
  402. {
  403. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  404. __func__, irq);
  405. return IRQ_HANDLED;
  406. }
  407. static irqreturn_t wsa884x_pdm_wd_handle_irq(int irq, void *data)
  408. {
  409. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  410. __func__, irq);
  411. return IRQ_HANDLED;
  412. }
  413. static irqreturn_t wsa884x_clk_wd_handle_irq(int irq, void *data)
  414. {
  415. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  416. __func__, irq);
  417. return IRQ_HANDLED;
  418. }
  419. static irqreturn_t wsa884x_ext_int_handle_irq(int irq, void *data)
  420. {
  421. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  422. __func__, irq);
  423. return IRQ_HANDLED;
  424. }
  425. static irqreturn_t wsa884x_uvlo_handle_irq(int irq, void *data)
  426. {
  427. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  428. __func__, irq);
  429. return IRQ_HANDLED;
  430. }
  431. static irqreturn_t wsa884x_pa_on_err_handle_irq(int irq, void *data)
  432. {
  433. u8 pa_fsm_sta = 0, pa_fsm_err = 0;
  434. struct wsa884x_priv *wsa884x = data;
  435. struct snd_soc_component *component = NULL;
  436. if (!wsa884x)
  437. return IRQ_NONE;
  438. component = wsa884x->component;
  439. if (!component)
  440. return IRQ_NONE;
  441. pa_fsm_sta = (snd_soc_component_read(component, WSA884X_PA_FSM_STA1)
  442. & 0x1F);
  443. if (pa_fsm_sta)
  444. pa_fsm_err = snd_soc_component_read(component,
  445. WSA884X_PA_FSM_ERR_COND0);
  446. pr_err_ratelimited("%s: interrupt for irq =%d triggered\n",
  447. __func__, irq);
  448. snd_soc_component_update_bits(component, WSA884X_PA_FSM_CTL0,
  449. 0x10, 0x00);
  450. snd_soc_component_update_bits(component, WSA884X_PA_FSM_CTL0,
  451. 0x10, 0x10);
  452. snd_soc_component_update_bits(component, WSA884X_PA_FSM_CTL0,
  453. 0x10, 0x00);
  454. return IRQ_HANDLED;
  455. }
  456. static int wsa884x_set_gain_parameters(struct snd_soc_component *component)
  457. {
  458. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  459. u8 igain;
  460. u8 vgain;
  461. switch (wsa884x->bat_cfg) {
  462. case CONFIG_1S:
  463. case EXT_1S:
  464. switch (wsa884x->system_gain) {
  465. case G_21_DB:
  466. wsa884x->comp_offset = COMP_OFFSET0;
  467. wsa884x->min_gain = G_0_DB;
  468. wsa884x->pa_aux_gain = PA_AUX_0_DB;
  469. break;
  470. case G_19P5_DB:
  471. wsa884x->comp_offset = COMP_OFFSET1;
  472. wsa884x->min_gain = G_M1P5_DB;
  473. wsa884x->pa_aux_gain = PA_AUX_M1P5_DB;
  474. break;
  475. case G_18_DB:
  476. wsa884x->comp_offset = COMP_OFFSET2;
  477. wsa884x->min_gain = G_M3_DB;
  478. wsa884x->pa_aux_gain = PA_AUX_M3_DB;
  479. break;
  480. case G_16P5_DB:
  481. wsa884x->comp_offset = COMP_OFFSET3;
  482. wsa884x->min_gain = G_M4P5_DB;
  483. wsa884x->pa_aux_gain = PA_AUX_M4P5_DB;
  484. break;
  485. default:
  486. wsa884x->comp_offset = COMP_OFFSET4;
  487. wsa884x->min_gain = G_M6_DB;
  488. wsa884x->pa_aux_gain = PA_AUX_M6_DB;
  489. break;
  490. }
  491. break;
  492. case CONFIG_3S:
  493. case EXT_3S:
  494. wsa884x->comp_offset = COMP_OFFSET0;
  495. wsa884x->min_gain = G_7P5_DB;
  496. wsa884x->pa_aux_gain = PA_AUX_7P5_DB;
  497. break;
  498. case EXT_ABOVE_3S:
  499. wsa884x->comp_offset = COMP_OFFSET0;
  500. wsa884x->min_gain = G_12_DB;
  501. wsa884x->pa_aux_gain = PA_AUX_12_DB;
  502. break;
  503. default:
  504. wsa884x->comp_offset = COMP_OFFSET0;
  505. wsa884x->min_gain = G_0_DB;
  506. wsa884x->pa_aux_gain = PA_AUX_0_DB;
  507. break;
  508. }
  509. igain = isense_gain_data[wsa884x->system_gain][wsa884x->rload];
  510. vgain = vsense_gain_data[wsa884x->system_gain];
  511. snd_soc_component_update_bits(component,
  512. REG_FIELD_VALUE(ISENSE2, ISENSE_GAIN_CTL, igain));
  513. snd_soc_component_update_bits(component,
  514. REG_FIELD_VALUE(VSENSE1, GAIN_VSENSE_FE, vgain));
  515. snd_soc_component_update_bits(component,
  516. REG_FIELD_VALUE(GAIN_RAMPING_MIN, MIN_GAIN, wsa884x->min_gain));
  517. if (wsa884x->comp_enable) {
  518. snd_soc_component_update_bits(component,
  519. REG_FIELD_VALUE(DRE_CTL_0, OFFSET,
  520. wsa884x->comp_offset));
  521. snd_soc_component_update_bits(component,
  522. REG_FIELD_VALUE(DRE_CTL_1, CSR_GAIN_EN, 0x00));
  523. } else {
  524. wsa884x->pa_aux_gain = pa_aux_no_comp[wsa884x->system_gain];
  525. snd_soc_component_update_bits(component,
  526. REG_FIELD_VALUE(DRE_CTL_1, CSR_GAIN_EN, 0x01));
  527. snd_soc_component_update_bits(component,
  528. REG_FIELD_VALUE(DRE_CTL_1, CSR_GAIN, wsa884x->pa_gain));
  529. }
  530. return 0;
  531. }
  532. static int wsa884x_set_pbr_parameters(struct snd_soc_component *component)
  533. {
  534. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  535. int vth1_reg_val;
  536. int vth2_reg_val;
  537. int vth3_reg_val;
  538. int vth4_reg_val;
  539. int vth5_reg_val;
  540. int vth6_reg_val;
  541. int vth7_reg_val;
  542. int vth8_reg_val;
  543. int vth9_reg_val;
  544. int vth10_reg_val;
  545. int vth11_reg_val;
  546. int vth12_reg_val;
  547. int vth13_reg_val;
  548. int vth14_reg_val;
  549. int vth15_reg_val;
  550. int vth1_val = pbr_vth1_data[wsa884x->system_gain][wsa884x->bat_cfg][wsa884x->rload];
  551. int vth2_val = pbr_vth2_data[wsa884x->system_gain][wsa884x->bat_cfg][wsa884x->rload];
  552. int vth3_val = pbr_vth3_data[wsa884x->system_gain][wsa884x->bat_cfg][wsa884x->rload];
  553. int vth4_val = pbr_vth4_data[wsa884x->system_gain][wsa884x->bat_cfg][wsa884x->rload];
  554. int vth5_val = pbr_vth5_data[wsa884x->system_gain][wsa884x->bat_cfg][wsa884x->rload];
  555. int vth6_val = pbr_vth6_data[wsa884x->system_gain][wsa884x->bat_cfg][wsa884x->rload];
  556. int vth7_val = pbr_vth7_data[wsa884x->system_gain][wsa884x->bat_cfg][wsa884x->rload];
  557. int vth8_val = pbr_vth8_data[wsa884x->system_gain][wsa884x->bat_cfg][wsa884x->rload];
  558. int vth9_val = pbr_vth9_data[wsa884x->system_gain][wsa884x->bat_cfg][wsa884x->rload];
  559. int vth10_val = pbr_vth10_data[wsa884x->system_gain][wsa884x->bat_cfg][wsa884x->rload];
  560. int vth11_val = pbr_vth11_data[wsa884x->system_gain][wsa884x->bat_cfg][wsa884x->rload];
  561. int vth12_val = pbr_vth12_data[wsa884x->system_gain][wsa884x->bat_cfg][wsa884x->rload];
  562. int vth13_val = pbr_vth13_data[wsa884x->system_gain][wsa884x->bat_cfg][wsa884x->rload];
  563. int vth14_val = pbr_vth14_data[wsa884x->system_gain][wsa884x->bat_cfg][wsa884x->rload];
  564. int vth15_val = pbr_vth15_data[wsa884x->system_gain][wsa884x->bat_cfg][wsa884x->rload];
  565. vth1_reg_val = WSA884X_VTH_TO_REG(vth1_val);
  566. vth2_reg_val = WSA884X_VTH_TO_REG(vth2_val);
  567. vth3_reg_val = WSA884X_VTH_TO_REG(vth3_val);
  568. vth4_reg_val = WSA884X_VTH_TO_REG(vth4_val);
  569. vth5_reg_val = WSA884X_VTH_TO_REG(vth5_val);
  570. vth6_reg_val = WSA884X_VTH_TO_REG(vth6_val);
  571. vth7_reg_val = WSA884X_VTH_TO_REG(vth7_val);
  572. vth8_reg_val = WSA884X_VTH_TO_REG(vth8_val);
  573. vth9_reg_val = WSA884X_VTH_TO_REG(vth9_val);
  574. vth10_reg_val = WSA884X_VTH_TO_REG(vth10_val);
  575. vth11_reg_val = WSA884X_VTH_TO_REG(vth11_val);
  576. vth12_reg_val = WSA884X_VTH_TO_REG(vth12_val);
  577. vth13_reg_val = WSA884X_VTH_TO_REG(vth13_val);
  578. vth14_reg_val = WSA884X_VTH_TO_REG(vth14_val);
  579. vth15_reg_val = WSA884X_VTH_TO_REG(vth15_val);
  580. snd_soc_component_write(component, WSA884X_CLSH_VTH1, vth1_reg_val);
  581. snd_soc_component_write(component, WSA884X_CLSH_VTH2, vth2_reg_val);
  582. snd_soc_component_write(component, WSA884X_CLSH_VTH3, vth3_reg_val);
  583. snd_soc_component_write(component, WSA884X_CLSH_VTH4, vth4_reg_val);
  584. snd_soc_component_write(component, WSA884X_CLSH_VTH5, vth5_reg_val);
  585. snd_soc_component_write(component, WSA884X_CLSH_VTH6, vth6_reg_val);
  586. snd_soc_component_write(component, WSA884X_CLSH_VTH7, vth7_reg_val);
  587. snd_soc_component_write(component, WSA884X_CLSH_VTH8, vth8_reg_val);
  588. snd_soc_component_write(component, WSA884X_CLSH_VTH9, vth9_reg_val);
  589. snd_soc_component_write(component, WSA884X_CLSH_VTH10, vth10_reg_val);
  590. snd_soc_component_write(component, WSA884X_CLSH_VTH11, vth11_reg_val);
  591. snd_soc_component_write(component, WSA884X_CLSH_VTH12, vth12_reg_val);
  592. snd_soc_component_write(component, WSA884X_CLSH_VTH13, vth13_reg_val);
  593. snd_soc_component_write(component, WSA884X_CLSH_VTH14, vth14_reg_val);
  594. snd_soc_component_write(component, WSA884X_CLSH_VTH15, vth15_reg_val);
  595. return 0;
  596. }
  597. static const char * const wsa_dev_mode_text[] = {
  598. "speaker", "receiver"
  599. };
  600. static const struct soc_enum wsa_dev_mode_enum =
  601. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(wsa_dev_mode_text), wsa_dev_mode_text);
  602. static int wsa_dev_mode_get(struct snd_kcontrol *kcontrol,
  603. struct snd_ctl_elem_value *ucontrol)
  604. {
  605. struct snd_soc_component *component =
  606. snd_soc_kcontrol_component(kcontrol);
  607. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  608. ucontrol->value.integer.value[0] = wsa884x->dev_mode;
  609. dev_dbg(component->dev, "%s: mode = 0x%x\n", __func__,
  610. wsa884x->dev_mode);
  611. return 0;
  612. }
  613. static int wsa_dev_mode_put(struct snd_kcontrol *kcontrol,
  614. struct snd_ctl_elem_value *ucontrol)
  615. {
  616. struct snd_soc_component *component =
  617. snd_soc_kcontrol_component(kcontrol);
  618. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  619. int dev_mode;
  620. dev_mode = ucontrol->value.integer.value[0];
  621. dev_dbg(component->dev, "%s: Dev Mode current: %d, new: %d = %ld\n",
  622. __func__, wsa884x->dev_mode, dev_mode);
  623. if (dev_mode >= SPEAKER && dev_mode <= RECEIVER) {
  624. wsa884x->dev_mode = dev_mode;
  625. wsa884x->system_gain = wsa884x->sys_gains[
  626. wsa884x->dev_mode + (wsa884x->dev_index - 1) * 2];
  627. } else {
  628. return -EINVAL;
  629. }
  630. return 0;
  631. }
  632. static const char * const wsa_pa_gain_text[] = {
  633. "G_21_DB", "G_19P5_DB" "G_18_DB", "G_16P5_DB", "G_15_DB", "G_13P5_DB",
  634. "G_12_DB", "G_10P5_DB", "G_9_DB", "G_7P5_DB", "G_6_DB", "G_4P5_DB",
  635. "G_3_DB", "G_1P5_DB", "G_0_DB", "G_M1P5_DB", "G_M3_DB", "G_M4P5_DB"
  636. "G_M6_DB", "G_M7P5_DB", "G_M9_DB"
  637. };
  638. static const struct soc_enum wsa_pa_gain_enum =
  639. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(wsa_pa_gain_text), wsa_pa_gain_text);
  640. static int wsa_pa_gain_get(struct snd_kcontrol *kcontrol,
  641. struct snd_ctl_elem_value *ucontrol)
  642. {
  643. struct snd_soc_component *component =
  644. snd_soc_kcontrol_component(kcontrol);
  645. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  646. ucontrol->value.integer.value[0] = wsa884x->pa_gain;
  647. dev_dbg(component->dev, "%s: PA gain = 0x%x\n", __func__,
  648. wsa884x->pa_gain);
  649. return 0;
  650. }
  651. static int wsa_pa_gain_put(struct snd_kcontrol *kcontrol,
  652. struct snd_ctl_elem_value *ucontrol)
  653. {
  654. struct snd_soc_component *component =
  655. snd_soc_kcontrol_component(kcontrol);
  656. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  657. dev_dbg(component->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  658. __func__, ucontrol->value.integer.value[0]);
  659. wsa884x->pa_gain = ucontrol->value.integer.value[0];
  660. return 0;
  661. }
  662. static int wsa884x_get_mute(struct snd_kcontrol *kcontrol,
  663. struct snd_ctl_elem_value *ucontrol)
  664. {
  665. struct snd_soc_component *component =
  666. snd_soc_kcontrol_component(kcontrol);
  667. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  668. ucontrol->value.integer.value[0] = wsa884x->pa_mute;
  669. return 0;
  670. }
  671. static int wsa884x_set_mute(struct snd_kcontrol *kcontrol,
  672. struct snd_ctl_elem_value *ucontrol)
  673. {
  674. struct snd_soc_component *component =
  675. snd_soc_kcontrol_component(kcontrol);
  676. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  677. int value = ucontrol->value.integer.value[0];
  678. dev_dbg(component->dev, "%s: mute current %d, new %d\n",
  679. __func__, wsa884x->pa_mute, value);
  680. wsa884x->pa_mute = value;
  681. return 0;
  682. }
  683. static int wsa_get_temp(struct snd_kcontrol *kcontrol,
  684. struct snd_ctl_elem_value *ucontrol)
  685. {
  686. struct snd_soc_component *component =
  687. snd_soc_kcontrol_component(kcontrol);
  688. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  689. int temp = 0;
  690. if (test_bit(SPKR_STATUS, &wsa884x->status_mask))
  691. temp = wsa884x->curr_temp;
  692. else
  693. wsa884x_get_temperature(component, &temp);
  694. ucontrol->value.integer.value[0] = temp;
  695. return 0;
  696. }
  697. static ssize_t wsa884x_codec_version_read(struct snd_info_entry *entry,
  698. void *file_private_data, struct file *file,
  699. char __user *buf, size_t count, loff_t pos)
  700. {
  701. struct wsa884x_priv *wsa884x;
  702. char buffer[WSA884X_VERSION_ENTRY_SIZE];
  703. int len = 0;
  704. wsa884x = (struct wsa884x_priv *) entry->private_data;
  705. if (!wsa884x) {
  706. pr_err("%s: wsa884x priv is null\n", __func__);
  707. return -EINVAL;
  708. }
  709. switch (wsa884x->version) {
  710. case WSA884X_VERSION_1_0:
  711. len = snprintf(buffer, sizeof(buffer), "WSA884X_1_0\n");
  712. break;
  713. default:
  714. len = snprintf(buffer, sizeof(buffer), "VER_UNDEFINED\n");
  715. break;
  716. }
  717. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  718. }
  719. static struct snd_info_entry_ops wsa884x_codec_info_ops = {
  720. .read = wsa884x_codec_version_read,
  721. };
  722. static ssize_t wsa884x_variant_read(struct snd_info_entry *entry,
  723. void *file_private_data,
  724. struct file *file,
  725. char __user *buf, size_t count,
  726. loff_t pos)
  727. {
  728. struct wsa884x_priv *wsa884x;
  729. char buffer[WSA884X_VARIANT_ENTRY_SIZE];
  730. int len = 0;
  731. wsa884x = (struct wsa884x_priv *) entry->private_data;
  732. if (!wsa884x) {
  733. pr_err("%s: wsa884x priv is null\n", __func__);
  734. return -EINVAL;
  735. }
  736. switch (wsa884x->variant) {
  737. case WSA8840:
  738. len = snprintf(buffer, sizeof(buffer), "WSA8840\n");
  739. break;
  740. case WSA8845:
  741. len = snprintf(buffer, sizeof(buffer), "WSA8845\n");
  742. break;
  743. case WSA8845H:
  744. len = snprintf(buffer, sizeof(buffer), "WSA8845H\n");
  745. break;
  746. default:
  747. len = snprintf(buffer, sizeof(buffer), "UNDEFINED\n");
  748. break;
  749. }
  750. return simple_read_from_buffer(buf, count, &pos, buffer, len);
  751. }
  752. static struct snd_info_entry_ops wsa884x_variant_ops = {
  753. .read = wsa884x_variant_read,
  754. };
  755. /*
  756. * wsa884x_codec_info_create_codec_entry - creates wsa884x module
  757. * @codec_root: The parent directory
  758. * @component: Codec instance
  759. *
  760. * Creates wsa884x module and version entry under the given
  761. * parent directory.
  762. *
  763. * Return: 0 on success or negative error code on failure.
  764. */
  765. int wsa884x_codec_info_create_codec_entry(struct snd_info_entry *codec_root,
  766. struct snd_soc_component *component)
  767. {
  768. struct snd_info_entry *version_entry;
  769. struct snd_info_entry *variant_entry;
  770. struct wsa884x_priv *wsa884x;
  771. struct snd_soc_card *card;
  772. char name[80];
  773. if (!codec_root || !component)
  774. return -EINVAL;
  775. wsa884x = snd_soc_component_get_drvdata(component);
  776. if (wsa884x->entry) {
  777. dev_dbg(wsa884x->dev,
  778. "%s:wsa884x module already created\n", __func__);
  779. return 0;
  780. }
  781. card = component->card;
  782. snprintf(name, sizeof(name), "%s.%llx", "wsa884x",
  783. wsa884x->swr_slave->addr);
  784. wsa884x->entry = snd_info_create_module_entry(codec_root->module,
  785. (const char *)name,
  786. codec_root);
  787. if (!wsa884x->entry) {
  788. dev_dbg(component->dev, "%s: failed to create wsa884x entry\n",
  789. __func__);
  790. return -ENOMEM;
  791. }
  792. wsa884x->entry->mode = S_IFDIR | 0555;
  793. if (snd_info_register(wsa884x->entry) < 0) {
  794. snd_info_free_entry(wsa884x->entry);
  795. return -ENOMEM;
  796. }
  797. version_entry = snd_info_create_card_entry(card->snd_card,
  798. "version",
  799. wsa884x->entry);
  800. if (!version_entry) {
  801. dev_dbg(component->dev, "%s: failed to create wsa884x version entry\n",
  802. __func__);
  803. snd_info_free_entry(wsa884x->entry);
  804. return -ENOMEM;
  805. }
  806. version_entry->private_data = wsa884x;
  807. version_entry->size = WSA884X_VERSION_ENTRY_SIZE;
  808. version_entry->content = SNDRV_INFO_CONTENT_DATA;
  809. version_entry->c.ops = &wsa884x_codec_info_ops;
  810. if (snd_info_register(version_entry) < 0) {
  811. snd_info_free_entry(version_entry);
  812. snd_info_free_entry(wsa884x->entry);
  813. return -ENOMEM;
  814. }
  815. wsa884x->version_entry = version_entry;
  816. variant_entry = snd_info_create_card_entry(card->snd_card,
  817. "variant",
  818. wsa884x->entry);
  819. if (!variant_entry) {
  820. dev_dbg(component->dev,
  821. "%s: failed to create wsa884x variant entry\n",
  822. __func__);
  823. snd_info_free_entry(version_entry);
  824. snd_info_free_entry(wsa884x->entry);
  825. return -ENOMEM;
  826. }
  827. variant_entry->private_data = wsa884x;
  828. variant_entry->size = WSA884X_VARIANT_ENTRY_SIZE;
  829. variant_entry->content = SNDRV_INFO_CONTENT_DATA;
  830. variant_entry->c.ops = &wsa884x_variant_ops;
  831. if (snd_info_register(variant_entry) < 0) {
  832. snd_info_free_entry(variant_entry);
  833. snd_info_free_entry(version_entry);
  834. snd_info_free_entry(wsa884x->entry);
  835. return -ENOMEM;
  836. }
  837. wsa884x->variant_entry = variant_entry;
  838. return 0;
  839. }
  840. EXPORT_SYMBOL(wsa884x_codec_info_create_codec_entry);
  841. /*
  842. * wsa884x_codec_get_dev_num - returns swr device number
  843. * @component: Codec instance
  844. *
  845. * Return: swr device number on success or negative error
  846. * code on failure.
  847. */
  848. int wsa884x_codec_get_dev_num(struct snd_soc_component *component)
  849. {
  850. struct wsa884x_priv *wsa884x;
  851. if (!component)
  852. return -EINVAL;
  853. wsa884x = snd_soc_component_get_drvdata(component);
  854. if (!wsa884x) {
  855. pr_err("%s: wsa884x component is NULL\n", __func__);
  856. return -EINVAL;
  857. }
  858. return wsa884x->swr_slave->dev_num;
  859. }
  860. EXPORT_SYMBOL(wsa884x_codec_get_dev_num);
  861. static int wsa884x_get_dev_num(struct snd_kcontrol *kcontrol,
  862. struct snd_ctl_elem_value *ucontrol)
  863. {
  864. struct snd_soc_component *component =
  865. snd_soc_kcontrol_component(kcontrol);
  866. struct wsa884x_priv *wsa884x;
  867. if (!component)
  868. return -EINVAL;
  869. wsa884x = snd_soc_component_get_drvdata(component);
  870. if (!wsa884x) {
  871. pr_err("%s: wsa884x component is NULL\n", __func__);
  872. return -EINVAL;
  873. }
  874. ucontrol->value.integer.value[0] = wsa884x->swr_slave->dev_num;
  875. return 0;
  876. }
  877. static int wsa884x_get_compander(struct snd_kcontrol *kcontrol,
  878. struct snd_ctl_elem_value *ucontrol)
  879. {
  880. struct snd_soc_component *component =
  881. snd_soc_kcontrol_component(kcontrol);
  882. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  883. ucontrol->value.integer.value[0] = wsa884x->comp_enable;
  884. return 0;
  885. }
  886. static int wsa884x_set_compander(struct snd_kcontrol *kcontrol,
  887. struct snd_ctl_elem_value *ucontrol)
  888. {
  889. struct snd_soc_component *component =
  890. snd_soc_kcontrol_component(kcontrol);
  891. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  892. int value = ucontrol->value.integer.value[0];
  893. dev_dbg(component->dev, "%s: Compander enable current %d, new %d\n",
  894. __func__, wsa884x->comp_enable, value);
  895. wsa884x->comp_enable = value;
  896. return 0;
  897. }
  898. static int wsa884x_get_comp_offset(struct snd_kcontrol *kcontrol,
  899. struct snd_ctl_elem_value *ucontrol)
  900. {
  901. struct snd_soc_component *component =
  902. snd_soc_kcontrol_component(kcontrol);
  903. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  904. ucontrol->value.integer.value[0] = wsa884x->comp_offset;
  905. return 0;
  906. }
  907. static int wsa884x_set_comp_offset(struct snd_kcontrol *kcontrol,
  908. struct snd_ctl_elem_value *ucontrol)
  909. {
  910. struct snd_soc_component *component =
  911. snd_soc_kcontrol_component(kcontrol);
  912. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  913. int value = ucontrol->value.integer.value[0];
  914. dev_dbg(component->dev, "%s: comp_offset %d\n",
  915. __func__, wsa884x->comp_offset);
  916. wsa884x->comp_offset = value;
  917. return 0;
  918. }
  919. static int wsa884x_get_visense(struct snd_kcontrol *kcontrol,
  920. struct snd_ctl_elem_value *ucontrol)
  921. {
  922. struct snd_soc_component *component =
  923. snd_soc_kcontrol_component(kcontrol);
  924. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  925. ucontrol->value.integer.value[0] = wsa884x->visense_enable;
  926. return 0;
  927. }
  928. static int wsa884x_set_visense(struct snd_kcontrol *kcontrol,
  929. struct snd_ctl_elem_value *ucontrol)
  930. {
  931. struct snd_soc_component *component =
  932. snd_soc_kcontrol_component(kcontrol);
  933. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  934. int value = ucontrol->value.integer.value[0];
  935. dev_dbg(component->dev, "%s: VIsense enable current %d, new %d\n",
  936. __func__, wsa884x->visense_enable, value);
  937. wsa884x->visense_enable = value;
  938. return 0;
  939. }
  940. static int wsa884x_get_pbr(struct snd_kcontrol *kcontrol,
  941. struct snd_ctl_elem_value *ucontrol)
  942. {
  943. struct snd_soc_component *component =
  944. snd_soc_kcontrol_component(kcontrol);
  945. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  946. ucontrol->value.integer.value[0] = wsa884x->pbr_enable;
  947. return 0;
  948. }
  949. static int wsa884x_set_pbr(struct snd_kcontrol *kcontrol,
  950. struct snd_ctl_elem_value *ucontrol)
  951. {
  952. struct snd_soc_component *component =
  953. snd_soc_kcontrol_component(kcontrol);
  954. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  955. int value = ucontrol->value.integer.value[0];
  956. dev_dbg(component->dev, "%s: PBR enable current %d, new %d\n",
  957. __func__, wsa884x->pbr_enable, value);
  958. wsa884x->pbr_enable = value;
  959. return 0;
  960. }
  961. static int wsa884x_get_cps(struct snd_kcontrol *kcontrol,
  962. struct snd_ctl_elem_value *ucontrol)
  963. {
  964. struct snd_soc_component *component =
  965. snd_soc_kcontrol_component(kcontrol);
  966. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  967. ucontrol->value.integer.value[0] = wsa884x->cps_enable;
  968. return 0;
  969. }
  970. static int wsa884x_set_cps(struct snd_kcontrol *kcontrol,
  971. struct snd_ctl_elem_value *ucontrol)
  972. {
  973. struct snd_soc_component *component =
  974. snd_soc_kcontrol_component(kcontrol);
  975. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  976. int value = ucontrol->value.integer.value[0];
  977. dev_dbg(component->dev, "%s: CPS enable current %d, new %d\n",
  978. __func__, wsa884x->cps_enable, value);
  979. wsa884x->cps_enable = value;
  980. return 0;
  981. }
  982. static int wsa884x_get_ext_vdd_spk(struct snd_kcontrol *kcontrol,
  983. struct snd_ctl_elem_value *ucontrol)
  984. {
  985. struct snd_soc_component *component =
  986. snd_soc_kcontrol_component(kcontrol);
  987. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  988. ucontrol->value.integer.value[0] = wsa884x->ext_vdd_spk;
  989. return 0;
  990. }
  991. static int wsa884x_put_ext_vdd_spk(struct snd_kcontrol *kcontrol,
  992. struct snd_ctl_elem_value *ucontrol)
  993. {
  994. struct snd_soc_component *component =
  995. snd_soc_kcontrol_component(kcontrol);
  996. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  997. int value = ucontrol->value.integer.value[0];
  998. dev_dbg(component->dev, "%s: Ext VDD SPK enable current %d, new %d\n",
  999. __func__, wsa884x->ext_vdd_spk, value);
  1000. wsa884x->ext_vdd_spk = value;
  1001. return 0;
  1002. }
  1003. static const struct snd_kcontrol_new wsa884x_snd_controls[] = {
  1004. SOC_ENUM_EXT("WSA PA Gain", wsa_pa_gain_enum,
  1005. wsa_pa_gain_get, wsa_pa_gain_put),
  1006. SOC_SINGLE_EXT("WSA PA Mute", SND_SOC_NOPM, 0, 1, 0,
  1007. wsa884x_get_mute, wsa884x_set_mute),
  1008. SOC_SINGLE_EXT("WSA Temp", SND_SOC_NOPM, 0, UINT_MAX, 0,
  1009. wsa_get_temp, NULL),
  1010. SOC_SINGLE_EXT("WSA Get DevNum", SND_SOC_NOPM, 0, UINT_MAX, 0,
  1011. wsa884x_get_dev_num, NULL),
  1012. SOC_ENUM_EXT("WSA MODE", wsa_dev_mode_enum,
  1013. wsa_dev_mode_get, wsa_dev_mode_put),
  1014. SOC_SINGLE_EXT("COMP Offset", SND_SOC_NOPM, 0, 4, 0,
  1015. wsa884x_get_comp_offset, wsa884x_set_comp_offset),
  1016. SOC_SINGLE_EXT("COMP Switch", SND_SOC_NOPM, 0, 1, 0,
  1017. wsa884x_get_compander, wsa884x_set_compander),
  1018. SOC_SINGLE_EXT("VISENSE Switch", SND_SOC_NOPM, 0, 1, 0,
  1019. wsa884x_get_visense, wsa884x_set_visense),
  1020. SOC_SINGLE_EXT("PBR Switch", SND_SOC_NOPM, 0, 1, 0,
  1021. wsa884x_get_pbr, wsa884x_set_pbr),
  1022. SOC_SINGLE_EXT("CPS Switch", SND_SOC_NOPM, 0, 1, 0,
  1023. wsa884x_get_cps, wsa884x_set_cps),
  1024. SOC_SINGLE_EXT("External VDD_SPK", SND_SOC_NOPM, 0, 1, 0,
  1025. wsa884x_get_ext_vdd_spk, wsa884x_put_ext_vdd_spk),
  1026. };
  1027. static const struct snd_kcontrol_new swr_dac_port[] = {
  1028. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  1029. };
  1030. static int wsa884x_set_port(struct snd_soc_component *component, int port_idx,
  1031. u8 *port_id, u8 *num_ch, u8 *ch_mask, u32 *ch_rate,
  1032. u8 *port_type)
  1033. {
  1034. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1035. *port_id = wsa884x->port[port_idx].port_id;
  1036. *num_ch = wsa884x->port[port_idx].num_ch;
  1037. *ch_mask = wsa884x->port[port_idx].ch_mask;
  1038. *ch_rate = wsa884x->port[port_idx].ch_rate;
  1039. *port_type = wsa884x->port[port_idx].port_type;
  1040. return 0;
  1041. }
  1042. static int wsa884x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
  1043. struct snd_kcontrol *kcontrol, int event)
  1044. {
  1045. struct snd_soc_component *component =
  1046. snd_soc_dapm_to_component(w->dapm);
  1047. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1048. u8 port_id[WSA884X_MAX_SWR_PORTS];
  1049. u8 num_ch[WSA884X_MAX_SWR_PORTS];
  1050. u8 ch_mask[WSA884X_MAX_SWR_PORTS];
  1051. u32 ch_rate[WSA884X_MAX_SWR_PORTS];
  1052. u8 port_type[WSA884X_MAX_SWR_PORTS];
  1053. u8 num_port = 0;
  1054. dev_dbg(component->dev, "%s: event %d name %s\n", __func__,
  1055. event, w->name);
  1056. if (wsa884x == NULL)
  1057. return -EINVAL;
  1058. switch (event) {
  1059. case SND_SOC_DAPM_PRE_PMU:
  1060. wsa884x_set_port(component, SWR_DAC_PORT,
  1061. &port_id[num_port], &num_ch[num_port],
  1062. &ch_mask[num_port], &ch_rate[num_port],
  1063. &port_type[num_port]);
  1064. if (wsa884x->dev_mode == RECEIVER)
  1065. ch_rate[num_port] = SWR_CLK_RATE_4P8MHZ;
  1066. ++num_port;
  1067. if (wsa884x->comp_enable) {
  1068. wsa884x_set_port(component, SWR_COMP_PORT,
  1069. &port_id[num_port], &num_ch[num_port],
  1070. &ch_mask[num_port], &ch_rate[num_port],
  1071. &port_type[num_port]);
  1072. ++num_port;
  1073. }
  1074. if (wsa884x->pbr_enable) {
  1075. wsa884x_set_port(component, SWR_PBR_PORT,
  1076. &port_id[num_port], &num_ch[num_port],
  1077. &ch_mask[num_port], &ch_rate[num_port],
  1078. &port_type[num_port]);
  1079. ++num_port;
  1080. }
  1081. if (wsa884x->visense_enable) {
  1082. wsa884x_set_port(component, SWR_VISENSE_PORT,
  1083. &port_id[num_port], &num_ch[num_port],
  1084. &ch_mask[num_port], &ch_rate[num_port],
  1085. &port_type[num_port]);
  1086. ++num_port;
  1087. }
  1088. if (wsa884x->cps_enable) {
  1089. wsa884x_set_port(component, SWR_CPS_PORT,
  1090. &port_id[num_port], &num_ch[num_port],
  1091. &ch_mask[num_port], &ch_rate[num_port],
  1092. &port_type[num_port]);
  1093. ++num_port;
  1094. }
  1095. swr_connect_port(wsa884x->swr_slave, &port_id[0], num_port,
  1096. &ch_mask[0], &ch_rate[0], &num_ch[0],
  1097. &port_type[0]);
  1098. break;
  1099. case SND_SOC_DAPM_POST_PMU:
  1100. set_bit(SPKR_STATUS, &wsa884x->status_mask);
  1101. break;
  1102. case SND_SOC_DAPM_PRE_PMD:
  1103. wsa884x_set_port(component, SWR_DAC_PORT,
  1104. &port_id[num_port], &num_ch[num_port],
  1105. &ch_mask[num_port], &ch_rate[num_port],
  1106. &port_type[num_port]);
  1107. ++num_port;
  1108. if (wsa884x->comp_enable) {
  1109. wsa884x_set_port(component, SWR_COMP_PORT,
  1110. &port_id[num_port], &num_ch[num_port],
  1111. &ch_mask[num_port], &ch_rate[num_port],
  1112. &port_type[num_port]);
  1113. ++num_port;
  1114. }
  1115. if (wsa884x->pbr_enable) {
  1116. wsa884x_set_port(component, SWR_PBR_PORT,
  1117. &port_id[num_port], &num_ch[num_port],
  1118. &ch_mask[num_port], &ch_rate[num_port],
  1119. &port_type[num_port]);
  1120. ++num_port;
  1121. }
  1122. if (wsa884x->visense_enable) {
  1123. wsa884x_set_port(component, SWR_VISENSE_PORT,
  1124. &port_id[num_port], &num_ch[num_port],
  1125. &ch_mask[num_port], &ch_rate[num_port],
  1126. &port_type[num_port]);
  1127. ++num_port;
  1128. }
  1129. if (wsa884x->cps_enable) {
  1130. wsa884x_set_port(component, SWR_CPS_PORT,
  1131. &port_id[num_port], &num_ch[num_port],
  1132. &ch_mask[num_port], &ch_rate[num_port],
  1133. &port_type[num_port]);
  1134. ++num_port;
  1135. }
  1136. swr_disconnect_port(wsa884x->swr_slave, &port_id[0], num_port,
  1137. &ch_mask[0], &port_type[0]);
  1138. break;
  1139. case SND_SOC_DAPM_POST_PMD:
  1140. if (swr_set_device_group(wsa884x->swr_slave, SWR_GROUP_NONE))
  1141. dev_err(component->dev,
  1142. "%s: set num ch failed\n", __func__);
  1143. swr_slvdev_datapath_control(wsa884x->swr_slave,
  1144. wsa884x->swr_slave->dev_num,
  1145. false);
  1146. break;
  1147. default:
  1148. break;
  1149. }
  1150. return 0;
  1151. }
  1152. static int wsa884x_spkr_event(struct snd_soc_dapm_widget *w,
  1153. struct snd_kcontrol *kcontrol, int event)
  1154. {
  1155. struct snd_soc_component *component =
  1156. snd_soc_dapm_to_component(w->dapm);
  1157. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1158. dev_dbg(component->dev, "%s: %s %d\n", __func__, w->name, event);
  1159. switch (event) {
  1160. case SND_SOC_DAPM_POST_PMU:
  1161. swr_slvdev_datapath_control(wsa884x->swr_slave,
  1162. wsa884x->swr_slave->dev_num,
  1163. true);
  1164. wsa884x_set_gain_parameters(component);
  1165. if (wsa884x->dev_mode == SPEAKER) {
  1166. snd_soc_component_update_bits(component,
  1167. REG_FIELD_VALUE(DRE_CTL_0, PROG_DELAY, 0x0F));
  1168. } else {
  1169. snd_soc_component_update_bits(component,
  1170. REG_FIELD_VALUE(DRE_CTL_0, PROG_DELAY, 0x03));
  1171. snd_soc_component_update_bits(component,
  1172. REG_FIELD_VALUE(CDC_PATH_MODE, RXD_MODE, 0x01));
  1173. snd_soc_component_update_bits(component,
  1174. REG_FIELD_VALUE(PWM_CLK_CTL,
  1175. PWM_CLK_FREQ_SEL, 0x01));
  1176. }
  1177. if (wsa884x->pbr_enable)
  1178. snd_soc_component_update_bits(component,
  1179. REG_FIELD_VALUE(CURRENT_LIMIT,
  1180. CURRENT_LIMIT_OVRD_EN, 0x00));
  1181. else
  1182. snd_soc_component_update_bits(component,
  1183. REG_FIELD_VALUE(CURRENT_LIMIT,
  1184. CURRENT_LIMIT_OVRD_EN, 0x01));
  1185. /* Force remove group */
  1186. swr_remove_from_group(wsa884x->swr_slave,
  1187. wsa884x->swr_slave->dev_num);
  1188. if (test_bit(SPKR_ADIE_LB, &wsa884x->status_mask))
  1189. snd_soc_component_update_bits(component,
  1190. REG_FIELD_VALUE(PA_FSM_EN, GLOBAL_PA_EN, 0x01));
  1191. break;
  1192. case SND_SOC_DAPM_PRE_PMD:
  1193. snd_soc_component_update_bits(component,
  1194. REG_FIELD_VALUE(PA_FSM_EN, GLOBAL_PA_EN, 0x00));
  1195. snd_soc_component_update_bits(component,
  1196. REG_FIELD_VALUE(PDM_WD_CTL, PDM_WD_EN, 0x00));
  1197. clear_bit(SPKR_STATUS, &wsa884x->status_mask);
  1198. clear_bit(SPKR_ADIE_LB, &wsa884x->status_mask);
  1199. break;
  1200. }
  1201. return 0;
  1202. }
  1203. static const struct snd_soc_dapm_widget wsa884x_dapm_widgets[] = {
  1204. SND_SOC_DAPM_INPUT("IN"),
  1205. SND_SOC_DAPM_MIXER_E("SWR DAC_Port", SND_SOC_NOPM, 0, 0, swr_dac_port,
  1206. ARRAY_SIZE(swr_dac_port), wsa884x_enable_swr_dac_port,
  1207. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  1208. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  1209. SND_SOC_DAPM_SPK("SPKR", wsa884x_spkr_event),
  1210. };
  1211. static const struct snd_soc_dapm_route wsa884x_audio_map[] = {
  1212. {"SWR DAC_Port", "Switch", "IN"},
  1213. {"SPKR", NULL, "SWR DAC_Port"},
  1214. };
  1215. int wsa884x_set_channel_map(struct snd_soc_component *component, u8 *port,
  1216. u8 num_port, unsigned int *ch_mask,
  1217. unsigned int *ch_rate, u8 *port_type)
  1218. {
  1219. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1220. int i;
  1221. if (!port || !ch_mask || !ch_rate ||
  1222. (num_port > WSA884X_MAX_SWR_PORTS)) {
  1223. dev_err(component->dev,
  1224. "%s: Invalid port=%pK, ch_mask=%pK, ch_rate=%pK\n",
  1225. __func__, port, ch_mask, ch_rate);
  1226. return -EINVAL;
  1227. }
  1228. for (i = 0; i < num_port; i++) {
  1229. wsa884x->port[i].port_id = port[i];
  1230. wsa884x->port[i].ch_mask = ch_mask[i];
  1231. wsa884x->port[i].ch_rate = ch_rate[i];
  1232. wsa884x->port[i].num_ch = __sw_hweight8(ch_mask[i]);
  1233. if (port_type)
  1234. wsa884x->port[i].port_type = port_type[i];
  1235. }
  1236. return 0;
  1237. }
  1238. EXPORT_SYMBOL(wsa884x_set_channel_map);
  1239. static void wsa884x_codec_init(struct snd_soc_component *component)
  1240. {
  1241. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1242. int i;
  1243. if (!wsa884x)
  1244. return;
  1245. for (i = 0; i < ARRAY_SIZE(reg_init); i++)
  1246. snd_soc_component_update_bits(component, reg_init[i].reg,
  1247. reg_init[i].mask, reg_init[i].val);
  1248. if (wsa884x->variant == WSA8845H)
  1249. snd_soc_component_update_bits(wsa884x->component,
  1250. REG_FIELD_VALUE(DRE_CTL_1, CSR_GAIN_EN, 0x01));
  1251. }
  1252. static int32_t wsa884x_temp_reg_read(struct snd_soc_component *component,
  1253. struct wsa_temp_register *wsa_temp_reg)
  1254. {
  1255. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1256. if (!wsa884x) {
  1257. dev_err(component->dev, "%s: wsa884x is NULL\n", __func__);
  1258. return -EINVAL;
  1259. }
  1260. mutex_lock(&wsa884x->res_lock);
  1261. snd_soc_component_update_bits(component,
  1262. REG_FIELD_VALUE(PA_FSM_BYP0, DC_CAL_EN, 0x01));
  1263. snd_soc_component_update_bits(component,
  1264. REG_FIELD_VALUE(PA_FSM_BYP0, BG_EN, 0x01));
  1265. snd_soc_component_update_bits(component,
  1266. REG_FIELD_VALUE(PA_FSM_BYP0, CLK_WD_EN, 0x01));
  1267. snd_soc_component_update_bits(component,
  1268. REG_FIELD_VALUE(PA_FSM_BYP0, TSADC_EN, 0x01));
  1269. snd_soc_component_update_bits(component,
  1270. REG_FIELD_VALUE(PA_FSM_BYP0, D_UNMUTE, 0x01));
  1271. snd_soc_component_update_bits(component,
  1272. REG_FIELD_VALUE(PA_FSM_BYP0, SPKR_PROT_EN, 0x01));
  1273. snd_soc_component_update_bits(component,
  1274. REG_FIELD_VALUE(TADC_VALUE_CTL, TEMP_VALUE_RD_EN, 0x00));
  1275. wsa_temp_reg->dmeas_msb = snd_soc_component_read(component,
  1276. WSA884X_TEMP_DIN_MSB);
  1277. wsa_temp_reg->dmeas_lsb = snd_soc_component_read(component,
  1278. WSA884X_TEMP_DIN_LSB);
  1279. snd_soc_component_update_bits(component,
  1280. REG_FIELD_VALUE(TADC_VALUE_CTL, TEMP_VALUE_RD_EN, 0x01));
  1281. wsa_temp_reg->d1_msb = snd_soc_component_read(component,
  1282. WSA884X_OTP_REG_1);
  1283. wsa_temp_reg->d1_lsb = snd_soc_component_read(component,
  1284. WSA884X_OTP_REG_2);
  1285. wsa_temp_reg->d2_msb = snd_soc_component_read(component,
  1286. WSA884X_OTP_REG_3);
  1287. wsa_temp_reg->d2_lsb = snd_soc_component_read(component,
  1288. WSA884X_OTP_REG_4);
  1289. snd_soc_component_update_bits(component,
  1290. WSA884X_PA_FSM_BYP0, 0xE7, 0x00);
  1291. mutex_unlock(&wsa884x->res_lock);
  1292. return 0;
  1293. }
  1294. static int wsa884x_get_temperature(struct snd_soc_component *component,
  1295. int *temp)
  1296. {
  1297. struct wsa_temp_register reg;
  1298. int dmeas, d1, d2;
  1299. int ret = 0;
  1300. int temp_val = 0;
  1301. int t1 = T1_TEMP;
  1302. int t2 = T2_TEMP;
  1303. u8 retry = WSA884X_TEMP_RETRY;
  1304. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1305. if (!wsa884x)
  1306. return -EINVAL;
  1307. do {
  1308. ret = wsa884x_temp_reg_read(component, &reg);
  1309. if (ret) {
  1310. pr_err("%s: temp read failed: %d, current temp: %d\n",
  1311. __func__, ret, wsa884x->curr_temp);
  1312. if (temp)
  1313. *temp = wsa884x->curr_temp;
  1314. return 0;
  1315. }
  1316. /*
  1317. * Temperature register values are expected to be in the
  1318. * following range.
  1319. * d1_msb = 68 - 92 and d1_lsb = 0, 64, 128, 192
  1320. * d2_msb = 185 -218 and d2_lsb = 0, 64, 128, 192
  1321. */
  1322. if ((reg.d1_msb < 68 || reg.d1_msb > 92) ||
  1323. (!(reg.d1_lsb == 0 || reg.d1_lsb == 64 || reg.d1_lsb == 128 ||
  1324. reg.d1_lsb == 192)) ||
  1325. (reg.d2_msb < 185 || reg.d2_msb > 218) ||
  1326. (!(reg.d2_lsb == 0 || reg.d2_lsb == 64 || reg.d2_lsb == 128 ||
  1327. reg.d2_lsb == 192))) {
  1328. printk_ratelimited("%s: Temperature registers[%d %d %d %d] are out of range\n",
  1329. __func__, reg.d1_msb, reg.d1_lsb, reg.d2_msb,
  1330. reg.d2_lsb);
  1331. }
  1332. dmeas = ((reg.dmeas_msb << 0x8) | reg.dmeas_lsb) >> 0x6;
  1333. d1 = ((reg.d1_msb << 0x8) | reg.d1_lsb) >> 0x6;
  1334. d2 = ((reg.d2_msb << 0x8) | reg.d2_lsb) >> 0x6;
  1335. if (d1 == d2)
  1336. temp_val = TEMP_INVALID;
  1337. else
  1338. temp_val = t1 + (((dmeas - d1) * (t2 - t1))/(d2 - d1));
  1339. if (temp_val <= LOW_TEMP_THRESHOLD ||
  1340. temp_val >= HIGH_TEMP_THRESHOLD) {
  1341. pr_debug("%s: T0: %d is out of range[%d, %d]\n", __func__,
  1342. temp_val, LOW_TEMP_THRESHOLD, HIGH_TEMP_THRESHOLD);
  1343. if (retry--)
  1344. msleep(10);
  1345. } else {
  1346. break;
  1347. }
  1348. } while (retry);
  1349. wsa884x->curr_temp = temp_val;
  1350. if (temp)
  1351. *temp = temp_val;
  1352. pr_debug("%s: t0 measured: %d dmeas = %d, d1 = %d, d2 = %d\n",
  1353. __func__, temp_val, dmeas, d1, d2);
  1354. return ret;
  1355. }
  1356. static int wsa884x_codec_probe(struct snd_soc_component *component)
  1357. {
  1358. char w_name[MAX_NAME_LEN];
  1359. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1360. struct swr_device *dev;
  1361. int variant = 0, version = 0;
  1362. struct snd_soc_dapm_context *dapm =
  1363. snd_soc_component_get_dapm(component);
  1364. if (!wsa884x)
  1365. return -EINVAL;
  1366. if (!component->name_prefix)
  1367. return -EINVAL;
  1368. snd_soc_component_init_regmap(component, wsa884x->regmap);
  1369. dev = wsa884x->swr_slave;
  1370. wsa884x->component = component;
  1371. variant = (snd_soc_component_read(component, WSA884X_OTP_REG_0)
  1372. & FIELD_MASK(OTP_REG_0, WSA884X_ID));
  1373. wsa884x->variant = variant;
  1374. version = (snd_soc_component_read(component, WSA884X_CHIP_ID0)
  1375. & FIELD_MASK(CHIP_ID0, BYTE_0));
  1376. wsa884x->version = version;
  1377. wsa884x->comp_offset = COMP_OFFSET2;
  1378. wsa884x_codec_init(component);
  1379. wsa884x->global_pa_cnt = 0;
  1380. memset(w_name, 0, sizeof(w_name));
  1381. strlcpy(w_name, component->name_prefix, sizeof(w_name));
  1382. strlcat(w_name, " ", sizeof(w_name));
  1383. strlcat(w_name, wsa884x->dai_driver->playback.stream_name,
  1384. sizeof(w_name));
  1385. snd_soc_dapm_ignore_suspend(dapm, w_name);
  1386. memset(w_name, 0, sizeof(w_name));
  1387. strlcpy(w_name, component->name_prefix, sizeof(w_name));
  1388. strlcat(w_name, " IN", sizeof(w_name));
  1389. snd_soc_dapm_ignore_suspend(dapm, w_name);
  1390. memset(w_name, 0, sizeof(w_name));
  1391. strlcpy(w_name, component->name_prefix, sizeof(w_name));
  1392. strlcat(w_name, " SWR DAC_Port", sizeof(w_name));
  1393. snd_soc_dapm_ignore_suspend(dapm, w_name);
  1394. memset(w_name, 0, sizeof(w_name));
  1395. strlcpy(w_name, component->name_prefix, sizeof(w_name));
  1396. strlcat(w_name, " SPKR", sizeof(w_name));
  1397. snd_soc_dapm_ignore_suspend(dapm, w_name);
  1398. snd_soc_dapm_sync(dapm);
  1399. return 0;
  1400. }
  1401. static void wsa884x_codec_remove(struct snd_soc_component *component)
  1402. {
  1403. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1404. if (!wsa884x)
  1405. return;
  1406. snd_soc_component_exit_regmap(component);
  1407. return;
  1408. }
  1409. static int wsa884x_soc_codec_suspend(struct snd_soc_component *component)
  1410. {
  1411. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1412. if (!wsa884x)
  1413. return 0;
  1414. wsa884x->dapm_bias_off = true;
  1415. return 0;
  1416. }
  1417. static int wsa884x_soc_codec_resume(struct snd_soc_component *component)
  1418. {
  1419. struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
  1420. if (!wsa884x)
  1421. return 0;
  1422. wsa884x->dapm_bias_off = false;
  1423. return 0;
  1424. }
  1425. static const struct snd_soc_component_driver soc_codec_dev_wsa884x_wsa = {
  1426. .name = "",
  1427. .probe = wsa884x_codec_probe,
  1428. .remove = wsa884x_codec_remove,
  1429. .controls = wsa884x_snd_controls,
  1430. .num_controls = ARRAY_SIZE(wsa884x_snd_controls),
  1431. .dapm_widgets = wsa884x_dapm_widgets,
  1432. .num_dapm_widgets = ARRAY_SIZE(wsa884x_dapm_widgets),
  1433. .dapm_routes = wsa884x_audio_map,
  1434. .num_dapm_routes = ARRAY_SIZE(wsa884x_audio_map),
  1435. .suspend = wsa884x_soc_codec_suspend,
  1436. .resume = wsa884x_soc_codec_resume,
  1437. };
  1438. static int wsa884x_gpio_ctrl(struct wsa884x_priv *wsa884x, bool enable)
  1439. {
  1440. int ret = 0;
  1441. if (enable)
  1442. ret = msm_cdc_pinctrl_select_active_state(
  1443. wsa884x->wsa_rst_np);
  1444. else
  1445. ret = msm_cdc_pinctrl_select_sleep_state(
  1446. wsa884x->wsa_rst_np);
  1447. if (ret != 0)
  1448. dev_err(wsa884x->dev,
  1449. "%s: Failed to turn state %d; ret=%d\n",
  1450. __func__, enable, ret);
  1451. return ret;
  1452. }
  1453. static int wsa884x_swr_up(struct wsa884x_priv *wsa884x)
  1454. {
  1455. int ret;
  1456. ret = wsa884x_gpio_ctrl(wsa884x, true);
  1457. if (ret)
  1458. dev_err(wsa884x->dev, "%s: Failed to enable gpio\n", __func__);
  1459. return ret;
  1460. }
  1461. static int wsa884x_swr_down(struct wsa884x_priv *wsa884x)
  1462. {
  1463. int ret;
  1464. ret = wsa884x_gpio_ctrl(wsa884x, false);
  1465. if (ret)
  1466. dev_err(wsa884x->dev, "%s: Failed to disable gpio\n", __func__);
  1467. return ret;
  1468. }
  1469. static int wsa884x_swr_reset(struct wsa884x_priv *wsa884x)
  1470. {
  1471. u8 retry = WSA884X_NUM_RETRY;
  1472. u8 devnum = 0;
  1473. struct swr_device *pdev;
  1474. pdev = wsa884x->swr_slave;
  1475. while (swr_get_logical_dev_num(pdev, pdev->addr, &devnum) && retry--) {
  1476. /* Retry after 1 msec delay */
  1477. usleep_range(1000, 1100);
  1478. }
  1479. pdev->dev_num = devnum;
  1480. wsa884x_regcache_sync(wsa884x);
  1481. return 0;
  1482. }
  1483. static int wsa884x_event_notify(struct notifier_block *nb,
  1484. unsigned long val, void *ptr)
  1485. {
  1486. u16 event = (val & 0xffff);
  1487. struct wsa884x_priv *wsa884x = container_of(nb, struct wsa884x_priv,
  1488. parent_nblock);
  1489. if (!wsa884x)
  1490. return -EINVAL;
  1491. switch (event) {
  1492. case BOLERO_SLV_EVT_PA_OFF_PRE_SSR:
  1493. if (test_bit(SPKR_STATUS, &wsa884x->status_mask))
  1494. snd_soc_component_update_bits(wsa884x->component,
  1495. REG_FIELD_VALUE(PA_FSM_EN, GLOBAL_PA_EN, 0x00));
  1496. wsa884x_swr_down(wsa884x);
  1497. break;
  1498. case BOLERO_SLV_EVT_SSR_UP:
  1499. wsa884x_swr_up(wsa884x);
  1500. /* Add delay to allow enumerate */
  1501. usleep_range(20000, 20010);
  1502. wsa884x_swr_reset(wsa884x);
  1503. break;
  1504. case BOLERO_SLV_EVT_PA_ON_POST_FSCLK:
  1505. if (test_bit(SPKR_STATUS, &wsa884x->status_mask)) {
  1506. snd_soc_component_update_bits(wsa884x->component,
  1507. REG_FIELD_VALUE(PDM_WD_CTL, PDM_WD_EN, 0x01));
  1508. snd_soc_component_update_bits(wsa884x->component,
  1509. REG_FIELD_VALUE(PA_FSM_EN, GLOBAL_PA_EN, 0x01));
  1510. }
  1511. break;
  1512. case BOLERO_SLV_EVT_PA_ON_POST_FSCLK_ADIE_LB:
  1513. if (test_bit(SPKR_STATUS, &wsa884x->status_mask))
  1514. set_bit(SPKR_ADIE_LB, &wsa884x->status_mask);
  1515. break;
  1516. default:
  1517. dev_dbg(wsa884x->dev, "%s: unknown event %d\n",
  1518. __func__, event);
  1519. break;
  1520. }
  1521. return 0;
  1522. }
  1523. static int wsa884x_enable_supplies(struct device *dev,
  1524. struct wsa884x_priv *priv)
  1525. {
  1526. int ret = 0;
  1527. /* Parse power supplies */
  1528. msm_cdc_get_power_supplies(dev, &priv->regulator,
  1529. &priv->num_supplies);
  1530. if (!priv->regulator || (priv->num_supplies <= 0)) {
  1531. dev_err(dev, "%s: no power supplies defined\n", __func__);
  1532. return -EINVAL;
  1533. }
  1534. ret = msm_cdc_init_supplies(dev, &priv->supplies,
  1535. priv->regulator, priv->num_supplies);
  1536. if (!priv->supplies) {
  1537. dev_err(dev, "%s: Cannot init wsa supplies\n",
  1538. __func__);
  1539. return ret;
  1540. }
  1541. ret = msm_cdc_enable_static_supplies(dev, priv->supplies,
  1542. priv->regulator,
  1543. priv->num_supplies);
  1544. if (ret)
  1545. dev_err(dev, "%s: wsa static supply enable failed!\n",
  1546. __func__);
  1547. return ret;
  1548. }
  1549. static struct snd_soc_dai_driver wsa_dai[] = {
  1550. {
  1551. .name = "",
  1552. .playback = {
  1553. .stream_name = "",
  1554. .rates = WSA884X_RATES | WSA884X_FRAC_RATES,
  1555. .formats = WSA884X_FORMATS,
  1556. .rate_max = 192000,
  1557. .rate_min = 8000,
  1558. .channels_min = 1,
  1559. .channels_max = 2,
  1560. },
  1561. },
  1562. };
  1563. static int wsa884x_swr_probe(struct swr_device *pdev)
  1564. {
  1565. int ret = 0;
  1566. struct wsa884x_priv *wsa884x;
  1567. u8 devnum = 0;
  1568. bool pin_state_current = false;
  1569. struct wsa_ctrl_platform_data *plat_data = NULL;
  1570. struct snd_soc_component *component;
  1571. char buffer[MAX_NAME_LEN];
  1572. int dev_index = 0;
  1573. struct regmap_irq_chip *wsa884x_sub_regmap_irq_chip = NULL;
  1574. u8 wo0_val;
  1575. int sys_gain_size, sys_gain_length;
  1576. wsa884x = devm_kzalloc(&pdev->dev, sizeof(struct wsa884x_priv),
  1577. GFP_KERNEL);
  1578. if (!wsa884x)
  1579. return -ENOMEM;
  1580. wsa884x_sub_regmap_irq_chip = devm_kzalloc(&pdev->dev, sizeof(struct regmap_irq_chip),
  1581. GFP_KERNEL);
  1582. if (!wsa884x_sub_regmap_irq_chip)
  1583. return -ENOMEM;
  1584. memcpy(wsa884x_sub_regmap_irq_chip, &wsa884x_regmap_irq_chip,
  1585. sizeof(struct regmap_irq_chip));
  1586. ret = wsa884x_enable_supplies(&pdev->dev, wsa884x);
  1587. if (ret) {
  1588. ret = -EPROBE_DEFER;
  1589. goto err;
  1590. }
  1591. wsa884x->wsa_rst_np = of_parse_phandle(pdev->dev.of_node,
  1592. "qcom,spkr-sd-n-node", 0);
  1593. if (!wsa884x->wsa_rst_np) {
  1594. dev_dbg(&pdev->dev, "%s: pinctrl not defined\n", __func__);
  1595. goto err_supply;
  1596. }
  1597. swr_set_dev_data(pdev, wsa884x);
  1598. wsa884x->swr_slave = pdev;
  1599. wsa884x->dev = &pdev->dev;
  1600. pin_state_current = msm_cdc_pinctrl_get_state(wsa884x->wsa_rst_np);
  1601. wsa884x_gpio_ctrl(wsa884x, true);
  1602. /*
  1603. * Add 5msec delay to provide sufficient time for
  1604. * soundwire auto enumeration of slave devices as
  1605. * per HW requirement.
  1606. */
  1607. usleep_range(5000, 5010);
  1608. ret = swr_get_logical_dev_num(pdev, pdev->addr, &devnum);
  1609. if (ret) {
  1610. dev_dbg(&pdev->dev,
  1611. "%s get devnum %d for dev addr %lx failed\n",
  1612. __func__, devnum, pdev->addr);
  1613. ret = -EPROBE_DEFER;
  1614. goto err_supply;
  1615. }
  1616. pdev->dev_num = devnum;
  1617. wsa884x->regmap = devm_regmap_init_swr(pdev,
  1618. &wsa884x_regmap_config);
  1619. if (IS_ERR(wsa884x->regmap)) {
  1620. ret = PTR_ERR(wsa884x->regmap);
  1621. dev_err(&pdev->dev, "%s: regmap_init failed %d\n",
  1622. __func__, ret);
  1623. goto dev_err;
  1624. }
  1625. devm_regmap_qti_debugfs_register(&pdev->dev, wsa884x->regmap);
  1626. wsa884x_sub_regmap_irq_chip->irq_drv_data = wsa884x;
  1627. wsa884x->irq_info.wcd_regmap_irq_chip = wsa884x_sub_regmap_irq_chip;
  1628. wsa884x->irq_info.codec_name = "WSA884X";
  1629. wsa884x->irq_info.regmap = wsa884x->regmap;
  1630. wsa884x->irq_info.dev = &pdev->dev;
  1631. ret = wcd_irq_init(&wsa884x->irq_info, &wsa884x->virq);
  1632. if (ret) {
  1633. dev_err(wsa884x->dev, "%s: IRQ init failed: %d\n",
  1634. __func__, ret);
  1635. goto dev_err;
  1636. }
  1637. wsa884x->swr_slave->slave_irq = wsa884x->virq;
  1638. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_SAF2WAR,
  1639. "WSA SAF2WAR", wsa884x_saf2war_handle_irq, wsa884x);
  1640. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_WAR2SAF,
  1641. "WSA WAR2SAF", wsa884x_war2saf_handle_irq, wsa884x);
  1642. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_DISABLE,
  1643. "WSA OTP", wsa884x_otp_handle_irq, wsa884x);
  1644. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_OCP,
  1645. "WSA OCP", wsa884x_ocp_handle_irq, wsa884x);
  1646. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_CLIP,
  1647. "WSA CLIP", wsa884x_clip_handle_irq, wsa884x);
  1648. wcd_disable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_CLIP);
  1649. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_PDM_WD,
  1650. "WSA PDM WD", wsa884x_pdm_wd_handle_irq, wsa884x);
  1651. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_CLK_WD,
  1652. "WSA CLK WD", wsa884x_clk_wd_handle_irq, wsa884x);
  1653. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_INTR_PIN,
  1654. "WSA EXT INT", wsa884x_ext_int_handle_irq, wsa884x);
  1655. wcd_disable_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_INTR_PIN);
  1656. /* Under Voltage Lock out (UVLO) interrupt handle */
  1657. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_UVLO,
  1658. "WSA UVLO", wsa884x_uvlo_handle_irq, wsa884x);
  1659. wcd_request_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_PA_ON_ERR,
  1660. "WSA PA ERR", wsa884x_pa_on_err_handle_irq, wsa884x);
  1661. wsa884x->driver = devm_kzalloc(&pdev->dev,
  1662. sizeof(struct snd_soc_component_driver), GFP_KERNEL);
  1663. if (!wsa884x->driver) {
  1664. ret = -ENOMEM;
  1665. goto err_irq;
  1666. }
  1667. memcpy(wsa884x->driver, &soc_codec_dev_wsa884x_wsa,
  1668. sizeof(struct snd_soc_component_driver));
  1669. wsa884x->dai_driver = devm_kzalloc(&pdev->dev,
  1670. sizeof(struct snd_soc_dai_driver), GFP_KERNEL);
  1671. if (!wsa884x->dai_driver) {
  1672. ret = -ENOMEM;
  1673. goto err_mem;
  1674. }
  1675. memcpy(wsa884x->dai_driver, wsa_dai, sizeof(struct snd_soc_dai_driver));
  1676. /* Get last digit from HEX format */
  1677. dev_index = (int)((char)(pdev->addr & 0xF));
  1678. dev_index += 1;
  1679. if (of_device_is_compatible(pdev->dev.of_node, "qcom,wsa884x_2"))
  1680. dev_index += 2;
  1681. snprintf(buffer, sizeof(buffer), "wsa-codec.%d", dev_index);
  1682. wsa884x->driver->name = kstrndup(buffer, strlen(buffer), GFP_KERNEL);
  1683. snprintf(buffer, sizeof(buffer), "wsa_rx%d", dev_index);
  1684. wsa884x->dai_driver->name =
  1685. kstrndup(buffer, strlen(buffer), GFP_KERNEL);
  1686. snprintf(buffer, sizeof(buffer), "WSA884X_AIF%d Playback", dev_index);
  1687. wsa884x->dai_driver->playback.stream_name =
  1688. kstrndup(buffer, strlen(buffer), GFP_KERNEL);
  1689. /* Number of DAI's used is 1 */
  1690. ret = snd_soc_register_component(&pdev->dev,
  1691. wsa884x->driver, wsa884x->dai_driver, 1);
  1692. component = snd_soc_lookup_component(&pdev->dev, wsa884x->driver->name);
  1693. if (!component) {
  1694. dev_err(&pdev->dev, "%s: component is NULL\n", __func__);
  1695. ret = -EINVAL;
  1696. goto err_mem;
  1697. }
  1698. wsa884x->parent_np = of_parse_phandle(pdev->dev.of_node,
  1699. "qcom,bolero-handle", 0);
  1700. if (!wsa884x->parent_np)
  1701. wsa884x->parent_np = of_parse_phandle(pdev->dev.of_node,
  1702. "qcom,lpass-cdc-handle", 0);
  1703. if (wsa884x->parent_np) {
  1704. wsa884x->parent_dev =
  1705. of_find_device_by_node(wsa884x->parent_np);
  1706. if (wsa884x->parent_dev) {
  1707. plat_data = dev_get_platdata(&wsa884x->parent_dev->dev);
  1708. if (plat_data) {
  1709. wsa884x->parent_nblock.notifier_call =
  1710. wsa884x_event_notify;
  1711. if (plat_data->register_notifier)
  1712. plat_data->register_notifier(
  1713. plat_data->handle,
  1714. &wsa884x->parent_nblock,
  1715. true);
  1716. wsa884x->register_notifier =
  1717. plat_data->register_notifier;
  1718. wsa884x->handle = plat_data->handle;
  1719. } else {
  1720. dev_err(&pdev->dev, "%s: plat data not found\n",
  1721. __func__);
  1722. }
  1723. } else {
  1724. dev_err(&pdev->dev, "%s: parent dev not found\n",
  1725. __func__);
  1726. }
  1727. } else {
  1728. dev_info(&pdev->dev, "%s: parent node not found\n", __func__);
  1729. }
  1730. /* Start in speaker mode by default */
  1731. wsa884x->dev_mode = SPEAKER;
  1732. wsa884x->dev_index = dev_index;
  1733. wsa884x->macro_np = of_parse_phandle(pdev->dev.of_node,
  1734. "qcom,wsa-macro-handle", 0);
  1735. if (wsa884x->macro_np) {
  1736. wsa884x->macro_dev =
  1737. of_find_device_by_node(wsa884x->macro_np);
  1738. if (wsa884x->macro_dev) {
  1739. ret = of_property_read_u32_index(
  1740. wsa884x->macro_dev->dev.of_node,
  1741. "qcom,wsa-rloads",
  1742. dev_index - 1,
  1743. &wsa884x->rload);
  1744. if (ret) {
  1745. dev_err(&pdev->dev,
  1746. "%s: Failed to read wsa rloads\n",
  1747. __func__);
  1748. goto err_mem;
  1749. }
  1750. if (!of_find_property(wsa884x->macro_dev->dev.of_node,
  1751. "qcom,wsa-system-gains", &sys_gain_size)) {
  1752. dev_err(&pdev->dev,
  1753. "%s: missing wsa-system-gains\n",
  1754. __func__);
  1755. goto err_mem;
  1756. }
  1757. sys_gain_length = sys_gain_size / (2 * sizeof(u32));
  1758. ret = of_property_read_u32_array(
  1759. wsa884x->macro_dev->dev.of_node,
  1760. "qcom,wsa-system-gains", wsa884x->sys_gains,
  1761. sys_gain_length);
  1762. if (ret) {
  1763. dev_err(&pdev->dev,
  1764. "%s: Failed to read wsa system gains\n",
  1765. __func__);
  1766. goto err_mem;
  1767. }
  1768. wsa884x->system_gain = wsa884x->sys_gains[
  1769. wsa884x->dev_mode + (dev_index - 1) * 2];
  1770. } else {
  1771. dev_err(&pdev->dev, "%s: parent dev not found\n",
  1772. __func__);
  1773. goto err_mem;
  1774. }
  1775. } else {
  1776. dev_err(&pdev->dev, "%s: parent node not found\n", __func__);
  1777. goto err_mem;
  1778. }
  1779. wsa884x->bat_cfg = snd_soc_component_read(component,
  1780. WSA884X_VPHX_SYS_EN_STATUS);
  1781. dev_dbg(component->dev,
  1782. "%s: Bat_cfg: 0x%x rload: 0x%x, sys_gain: 0x%x %x\n", __func__,
  1783. wsa884x->bat_cfg, wsa884x->rload, wsa884x->bat_cfg);
  1784. wsa884x_set_gain_parameters(component);
  1785. wsa884x_set_pbr_parameters(component);
  1786. /* Must write WO registers in a single write */
  1787. wo0_val = (0xC | (wsa884x->pa_aux_gain << 0x02) | !wsa884x->dev_mode);
  1788. snd_soc_component_write(component, WSA884X_ANA_WO_CTL_0, wo0_val);
  1789. snd_soc_component_write(component, WSA884X_ANA_WO_CTL_1, 0x0);
  1790. if (wsa884x->rload == WSA_4_OHMS || wsa884x->rload == WSA_6_OHMS)
  1791. snd_soc_component_update_bits(component,
  1792. REG_FIELD_VALUE(OCP_CTL, OCP_CURR_LIMIT, 0x07));
  1793. if (wsa884x->dev_mode == SPEAKER) {
  1794. snd_soc_component_update_bits(component,
  1795. REG_FIELD_VALUE(DRE_CTL_0, PROG_DELAY, 0x0F));
  1796. } else {
  1797. snd_soc_component_update_bits(component,
  1798. REG_FIELD_VALUE(DRE_CTL_0, PROG_DELAY, 0x03));
  1799. snd_soc_component_update_bits(component,
  1800. REG_FIELD_VALUE(CDC_PATH_MODE, RXD_MODE, 0x01));
  1801. snd_soc_component_update_bits(component,
  1802. REG_FIELD_VALUE(PWM_CLK_CTL,
  1803. PWM_CLK_FREQ_SEL, 0x01));
  1804. }
  1805. mutex_init(&wsa884x->res_lock);
  1806. #ifdef CONFIG_DEBUG_FS
  1807. if (!wsa884x->debugfs_dent) {
  1808. wsa884x->debugfs_dent = debugfs_create_dir(
  1809. dev_name(&pdev->dev), 0);
  1810. if (!IS_ERR(wsa884x->debugfs_dent)) {
  1811. wsa884x->debugfs_peek =
  1812. debugfs_create_file("swrslave_peek",
  1813. S_IFREG | 0444,
  1814. wsa884x->debugfs_dent,
  1815. (void *) pdev,
  1816. &codec_debug_read_ops);
  1817. wsa884x->debugfs_poke =
  1818. debugfs_create_file("swrslave_poke",
  1819. S_IFREG | 0444,
  1820. wsa884x->debugfs_dent,
  1821. (void *) pdev,
  1822. &codec_debug_write_ops);
  1823. wsa884x->debugfs_reg_dump =
  1824. debugfs_create_file(
  1825. "swrslave_reg_dump",
  1826. S_IFREG | 0444,
  1827. wsa884x->debugfs_dent,
  1828. (void *) pdev,
  1829. &codec_debug_dump_ops);
  1830. }
  1831. }
  1832. #endif
  1833. return 0;
  1834. err_mem:
  1835. if (wsa884x->dai_driver) {
  1836. kfree(wsa884x->dai_driver->name);
  1837. kfree(wsa884x->dai_driver->playback.stream_name);
  1838. kfree(wsa884x->dai_driver);
  1839. }
  1840. if (wsa884x->driver) {
  1841. kfree(wsa884x->driver->name);
  1842. kfree(wsa884x->driver);
  1843. }
  1844. err_irq:
  1845. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_SAF2WAR, NULL);
  1846. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_WAR2SAF, NULL);
  1847. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_DISABLE, NULL);
  1848. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_OCP, NULL);
  1849. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_CLIP, NULL);
  1850. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_PDM_WD, NULL);
  1851. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_CLK_WD, NULL);
  1852. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_INTR_PIN, NULL);
  1853. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_UVLO, NULL);
  1854. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_PA_ON_ERR, NULL);
  1855. wcd_irq_exit(&wsa884x->irq_info, wsa884x->virq);
  1856. dev_err:
  1857. if (pin_state_current == false)
  1858. wsa884x_gpio_ctrl(wsa884x, false);
  1859. swr_remove_device(pdev);
  1860. err_supply:
  1861. msm_cdc_release_supplies(&pdev->dev, wsa884x->supplies,
  1862. wsa884x->regulator,
  1863. wsa884x->num_supplies);
  1864. err:
  1865. swr_set_dev_data(pdev, NULL);
  1866. return ret;
  1867. }
  1868. static int wsa884x_swr_remove(struct swr_device *pdev)
  1869. {
  1870. struct wsa884x_priv *wsa884x;
  1871. wsa884x = swr_get_dev_data(pdev);
  1872. if (!wsa884x) {
  1873. dev_err(&pdev->dev, "%s: wsa884x is NULL\n", __func__);
  1874. return -EINVAL;
  1875. }
  1876. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_SAF2WAR, NULL);
  1877. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_WAR2SAF, NULL);
  1878. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_DISABLE, NULL);
  1879. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_OCP, NULL);
  1880. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_CLIP, NULL);
  1881. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_PDM_WD, NULL);
  1882. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_CLK_WD, NULL);
  1883. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_INTR_PIN, NULL);
  1884. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_UVLO, NULL);
  1885. wcd_free_irq(&wsa884x->irq_info, WSA884X_IRQ_INT_PA_ON_ERR, NULL);
  1886. if (wsa884x->register_notifier)
  1887. wsa884x->register_notifier(wsa884x->handle,
  1888. &wsa884x->parent_nblock, false);
  1889. #ifdef CONFIG_DEBUG_FS
  1890. debugfs_remove_recursive(wsa884x->debugfs_dent);
  1891. wsa884x->debugfs_dent = NULL;
  1892. #endif
  1893. mutex_destroy(&wsa884x->res_lock);
  1894. snd_soc_unregister_component(&pdev->dev);
  1895. if (wsa884x->dai_driver) {
  1896. kfree(wsa884x->dai_driver->name);
  1897. kfree(wsa884x->dai_driver->playback.stream_name);
  1898. kfree(wsa884x->dai_driver);
  1899. }
  1900. if (wsa884x->driver) {
  1901. kfree(wsa884x->driver->name);
  1902. kfree(wsa884x->driver);
  1903. }
  1904. msm_cdc_release_supplies(&pdev->dev, wsa884x->supplies,
  1905. wsa884x->regulator,
  1906. wsa884x->num_supplies);
  1907. swr_set_dev_data(pdev, NULL);
  1908. return 0;
  1909. }
  1910. #ifdef CONFIG_PM_SLEEP
  1911. static int wsa884x_swr_suspend(struct device *dev)
  1912. {
  1913. struct wsa884x_priv *wsa884x = swr_get_dev_data(to_swr_device(dev));
  1914. if (!wsa884x) {
  1915. dev_err(dev, "%s: wsa884x private data is NULL\n", __func__);
  1916. return -EINVAL;
  1917. }
  1918. dev_dbg(dev, "%s: system suspend\n", __func__);
  1919. if (wsa884x->dapm_bias_off) {
  1920. msm_cdc_set_supplies_lpm_mode(dev, wsa884x->supplies,
  1921. wsa884x->regulator,
  1922. wsa884x->num_supplies,
  1923. true);
  1924. set_bit(WSA_SUPPLIES_LPM_MODE, &wsa884x->status_mask);
  1925. }
  1926. return 0;
  1927. }
  1928. static int wsa884x_swr_resume(struct device *dev)
  1929. {
  1930. struct wsa884x_priv *wsa884x = swr_get_dev_data(to_swr_device(dev));
  1931. if (!wsa884x) {
  1932. dev_err(dev, "%s: wsa884x private data is NULL\n", __func__);
  1933. return -EINVAL;
  1934. }
  1935. if (test_bit(WSA_SUPPLIES_LPM_MODE, &wsa884x->status_mask)) {
  1936. msm_cdc_set_supplies_lpm_mode(dev, wsa884x->supplies,
  1937. wsa884x->regulator,
  1938. wsa884x->num_supplies,
  1939. false);
  1940. clear_bit(WSA_SUPPLIES_LPM_MODE, &wsa884x->status_mask);
  1941. }
  1942. dev_dbg(dev, "%s: system resume\n", __func__);
  1943. return 0;
  1944. }
  1945. #endif /* CONFIG_PM_SLEEP */
  1946. static const struct dev_pm_ops wsa884x_swr_pm_ops = {
  1947. .suspend_late = wsa884x_swr_suspend,
  1948. .resume_early = wsa884x_swr_resume,
  1949. };
  1950. static const struct swr_device_id wsa884x_swr_id[] = {
  1951. {"wsa884x", 0},
  1952. {"wsa884x_2", 0},
  1953. {}
  1954. };
  1955. static const struct of_device_id wsa884x_swr_dt_match[] = {
  1956. {
  1957. .compatible = "qcom,wsa884x",
  1958. },
  1959. {
  1960. .compatible = "qcom,wsa884x_2",
  1961. },
  1962. {}
  1963. };
  1964. static struct swr_driver wsa884x_swr_driver = {
  1965. .driver = {
  1966. .name = "wsa884x",
  1967. .owner = THIS_MODULE,
  1968. .pm = &wsa884x_swr_pm_ops,
  1969. .of_match_table = wsa884x_swr_dt_match,
  1970. },
  1971. .probe = wsa884x_swr_probe,
  1972. .remove = wsa884x_swr_remove,
  1973. .id_table = wsa884x_swr_id,
  1974. };
  1975. static int __init wsa884x_swr_init(void)
  1976. {
  1977. return swr_driver_register(&wsa884x_swr_driver);
  1978. }
  1979. static void __exit wsa884x_swr_exit(void)
  1980. {
  1981. swr_driver_unregister(&wsa884x_swr_driver);
  1982. }
  1983. module_init(wsa884x_swr_init);
  1984. module_exit(wsa884x_swr_exit);
  1985. MODULE_DESCRIPTION("WSA884x codec driver");
  1986. MODULE_LICENSE("GPL v2");