ce_src_desc.h 8.9 KB

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  1. /*
  2. * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _CE_SRC_DESC_H_
  19. #define _CE_SRC_DESC_H_
  20. #if !defined(__ASSEMBLER__)
  21. #endif
  22. #define NUM_OF_DWORDS_CE_SRC_DESC 4
  23. struct ce_src_desc {
  24. #ifndef WIFI_BIT_ORDER_BIG_ENDIAN
  25. uint32_t src_buffer_low : 32;
  26. uint32_t src_buffer_high : 8,
  27. toeplitz_en : 1,
  28. src_swap : 1,
  29. dest_swap : 1,
  30. gather : 1,
  31. ce_res_0 : 1,
  32. barrier_read : 1,
  33. ce_res_1 : 2,
  34. length : 16;
  35. uint32_t fw_metadata : 16,
  36. ce_res_2 : 16;
  37. uint32_t ce_res_3 : 20,
  38. ring_id : 8,
  39. looping_count : 4;
  40. #else
  41. uint32_t src_buffer_low : 32;
  42. uint32_t length : 16,
  43. ce_res_1 : 2,
  44. barrier_read : 1,
  45. ce_res_0 : 1,
  46. gather : 1,
  47. dest_swap : 1,
  48. src_swap : 1,
  49. toeplitz_en : 1,
  50. src_buffer_high : 8;
  51. uint32_t ce_res_2 : 16,
  52. fw_metadata : 16;
  53. uint32_t looping_count : 4,
  54. ring_id : 8,
  55. ce_res_3 : 20;
  56. #endif
  57. };
  58. #define CE_SRC_DESC_SRC_BUFFER_LOW_OFFSET 0x00000000
  59. #define CE_SRC_DESC_SRC_BUFFER_LOW_LSB 0
  60. #define CE_SRC_DESC_SRC_BUFFER_LOW_MSB 31
  61. #define CE_SRC_DESC_SRC_BUFFER_LOW_MASK 0xffffffff
  62. #define CE_SRC_DESC_SRC_BUFFER_HIGH_OFFSET 0x00000004
  63. #define CE_SRC_DESC_SRC_BUFFER_HIGH_LSB 0
  64. #define CE_SRC_DESC_SRC_BUFFER_HIGH_MSB 7
  65. #define CE_SRC_DESC_SRC_BUFFER_HIGH_MASK 0x000000ff
  66. #define CE_SRC_DESC_TOEPLITZ_EN_OFFSET 0x00000004
  67. #define CE_SRC_DESC_TOEPLITZ_EN_LSB 8
  68. #define CE_SRC_DESC_TOEPLITZ_EN_MSB 8
  69. #define CE_SRC_DESC_TOEPLITZ_EN_MASK 0x00000100
  70. #define CE_SRC_DESC_SRC_SWAP_OFFSET 0x00000004
  71. #define CE_SRC_DESC_SRC_SWAP_LSB 9
  72. #define CE_SRC_DESC_SRC_SWAP_MSB 9
  73. #define CE_SRC_DESC_SRC_SWAP_MASK 0x00000200
  74. #define CE_SRC_DESC_DEST_SWAP_OFFSET 0x00000004
  75. #define CE_SRC_DESC_DEST_SWAP_LSB 10
  76. #define CE_SRC_DESC_DEST_SWAP_MSB 10
  77. #define CE_SRC_DESC_DEST_SWAP_MASK 0x00000400
  78. #define CE_SRC_DESC_GATHER_OFFSET 0x00000004
  79. #define CE_SRC_DESC_GATHER_LSB 11
  80. #define CE_SRC_DESC_GATHER_MSB 11
  81. #define CE_SRC_DESC_GATHER_MASK 0x00000800
  82. #define CE_SRC_DESC_CE_RES_0_OFFSET 0x00000004
  83. #define CE_SRC_DESC_CE_RES_0_LSB 12
  84. #define CE_SRC_DESC_CE_RES_0_MSB 12
  85. #define CE_SRC_DESC_CE_RES_0_MASK 0x00001000
  86. #define CE_SRC_DESC_BARRIER_READ_OFFSET 0x00000004
  87. #define CE_SRC_DESC_BARRIER_READ_LSB 13
  88. #define CE_SRC_DESC_BARRIER_READ_MSB 13
  89. #define CE_SRC_DESC_BARRIER_READ_MASK 0x00002000
  90. #define CE_SRC_DESC_CE_RES_1_OFFSET 0x00000004
  91. #define CE_SRC_DESC_CE_RES_1_LSB 14
  92. #define CE_SRC_DESC_CE_RES_1_MSB 15
  93. #define CE_SRC_DESC_CE_RES_1_MASK 0x0000c000
  94. #define CE_SRC_DESC_LENGTH_OFFSET 0x00000004
  95. #define CE_SRC_DESC_LENGTH_LSB 16
  96. #define CE_SRC_DESC_LENGTH_MSB 31
  97. #define CE_SRC_DESC_LENGTH_MASK 0xffff0000
  98. #define CE_SRC_DESC_FW_METADATA_OFFSET 0x00000008
  99. #define CE_SRC_DESC_FW_METADATA_LSB 0
  100. #define CE_SRC_DESC_FW_METADATA_MSB 15
  101. #define CE_SRC_DESC_FW_METADATA_MASK 0x0000ffff
  102. #define CE_SRC_DESC_CE_RES_2_OFFSET 0x00000008
  103. #define CE_SRC_DESC_CE_RES_2_LSB 16
  104. #define CE_SRC_DESC_CE_RES_2_MSB 31
  105. #define CE_SRC_DESC_CE_RES_2_MASK 0xffff0000
  106. #define CE_SRC_DESC_CE_RES_3_OFFSET 0x0000000c
  107. #define CE_SRC_DESC_CE_RES_3_LSB 0
  108. #define CE_SRC_DESC_CE_RES_3_MSB 19
  109. #define CE_SRC_DESC_CE_RES_3_MASK 0x000fffff
  110. #define CE_SRC_DESC_RING_ID_OFFSET 0x0000000c
  111. #define CE_SRC_DESC_RING_ID_LSB 20
  112. #define CE_SRC_DESC_RING_ID_MSB 27
  113. #define CE_SRC_DESC_RING_ID_MASK 0x0ff00000
  114. #define CE_SRC_DESC_LOOPING_COUNT_OFFSET 0x0000000c
  115. #define CE_SRC_DESC_LOOPING_COUNT_LSB 28
  116. #define CE_SRC_DESC_LOOPING_COUNT_MSB 31
  117. #define CE_SRC_DESC_LOOPING_COUNT_MASK 0xf0000000
  118. #endif