sm6150.c 239 KB

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  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/gpio.h>
  16. #include <linux/of_gpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/slab.h>
  19. #include <linux/io.h>
  20. #include <linux/module.h>
  21. #include <linux/input.h>
  22. #include <linux/of_device.h>
  23. #include <linux/pm_qos.h>
  24. #include <sound/core.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/pcm.h>
  28. #include <sound/pcm_params.h>
  29. #include <sound/info.h>
  30. #include <dsp/audio_notifier.h>
  31. #include <dsp/q6afe-v2.h>
  32. #include <dsp/q6core.h>
  33. #include "device_event.h"
  34. #include "msm-pcm-routing-v2.h"
  35. #include "codecs/msm-cdc-pinctrl.h"
  36. #include "codecs/wcd934x/wcd934x.h"
  37. #include "codecs/wcd934x/wcd934x-mbhc.h"
  38. #include "codecs/wcd937x/wcd937x-mbhc.h"
  39. #include "codecs/wsa881x.h"
  40. #include "codecs/bolero/bolero-cdc.h"
  41. #include <dt-bindings/sound/audio-codec-port-types.h>
  42. #include "codecs/bolero/wsa-macro.h"
  43. #include "codecs/wcd937x/internal.h"
  44. #define DRV_NAME "sm6150-asoc-snd"
  45. #define __CHIPSET__ "SM6150 "
  46. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  47. #define SAMPLING_RATE_8KHZ 8000
  48. #define SAMPLING_RATE_11P025KHZ 11025
  49. #define SAMPLING_RATE_16KHZ 16000
  50. #define SAMPLING_RATE_22P05KHZ 22050
  51. #define SAMPLING_RATE_32KHZ 32000
  52. #define SAMPLING_RATE_44P1KHZ 44100
  53. #define SAMPLING_RATE_48KHZ 48000
  54. #define SAMPLING_RATE_88P2KHZ 88200
  55. #define SAMPLING_RATE_96KHZ 96000
  56. #define SAMPLING_RATE_176P4KHZ 176400
  57. #define SAMPLING_RATE_192KHZ 192000
  58. #define SAMPLING_RATE_352P8KHZ 352800
  59. #define SAMPLING_RATE_384KHZ 384000
  60. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  61. #define WCD9XXX_MBHC_DEF_RLOADS 5
  62. #define CODEC_EXT_CLK_RATE 9600000
  63. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  64. #define DEV_NAME_STR_LEN 32
  65. #define WSA8810_NAME_1 "wsa881x.20170211"
  66. #define WSA8810_NAME_2 "wsa881x.20170212"
  67. #define WCN_CDC_SLIM_RX_CH_MAX 2
  68. #define WCN_CDC_SLIM_TX_CH_MAX 3
  69. #define TDM_CHANNEL_MAX 8
  70. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  71. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  72. #define MSM_HIFI_ON 1
  73. enum {
  74. SLIM_RX_0 = 0,
  75. SLIM_RX_1,
  76. SLIM_RX_2,
  77. SLIM_RX_3,
  78. SLIM_RX_4,
  79. SLIM_RX_5,
  80. SLIM_RX_6,
  81. SLIM_RX_7,
  82. SLIM_RX_MAX,
  83. };
  84. enum {
  85. SLIM_TX_0 = 0,
  86. SLIM_TX_1,
  87. SLIM_TX_2,
  88. SLIM_TX_3,
  89. SLIM_TX_4,
  90. SLIM_TX_5,
  91. SLIM_TX_6,
  92. SLIM_TX_7,
  93. SLIM_TX_8,
  94. SLIM_TX_MAX,
  95. };
  96. enum {
  97. PRIM_MI2S = 0,
  98. SEC_MI2S,
  99. TERT_MI2S,
  100. QUAT_MI2S,
  101. QUIN_MI2S,
  102. MI2S_MAX,
  103. };
  104. enum {
  105. PRIM_AUX_PCM = 0,
  106. SEC_AUX_PCM,
  107. TERT_AUX_PCM,
  108. QUAT_AUX_PCM,
  109. QUIN_AUX_PCM,
  110. AUX_PCM_MAX,
  111. };
  112. enum {
  113. WSA_CDC_DMA_RX_0 = 0,
  114. WSA_CDC_DMA_RX_1,
  115. RX_CDC_DMA_RX_0,
  116. RX_CDC_DMA_RX_1,
  117. RX_CDC_DMA_RX_2,
  118. RX_CDC_DMA_RX_3,
  119. RX_CDC_DMA_RX_5,
  120. CDC_DMA_RX_MAX,
  121. };
  122. enum {
  123. WSA_CDC_DMA_TX_0 = 0,
  124. WSA_CDC_DMA_TX_1,
  125. WSA_CDC_DMA_TX_2,
  126. TX_CDC_DMA_TX_0,
  127. TX_CDC_DMA_TX_3,
  128. TX_CDC_DMA_TX_4,
  129. CDC_DMA_TX_MAX,
  130. };
  131. struct mi2s_conf {
  132. struct mutex lock;
  133. u32 ref_cnt;
  134. u32 msm_is_mi2s_master;
  135. };
  136. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  137. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  138. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  139. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  140. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  141. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  142. };
  143. struct dev_config {
  144. u32 sample_rate;
  145. u32 bit_format;
  146. u32 channels;
  147. };
  148. enum {
  149. DP_RX_IDX = 0,
  150. EXT_DISP_RX_IDX_MAX,
  151. };
  152. struct msm_wsa881x_dev_info {
  153. struct device_node *of_node;
  154. u32 index;
  155. };
  156. struct aux_codec_dev_info {
  157. struct device_node *of_node;
  158. u32 index;
  159. };
  160. enum pinctrl_pin_state {
  161. STATE_DISABLE = 0, /* All pins are in sleep state */
  162. STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
  163. STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
  164. };
  165. struct msm_pinctrl_info {
  166. struct pinctrl *pinctrl;
  167. struct pinctrl_state *mi2s_disable;
  168. struct pinctrl_state *tdm_disable;
  169. struct pinctrl_state *mi2s_active;
  170. struct pinctrl_state *tdm_active;
  171. enum pinctrl_pin_state curr_state;
  172. };
  173. struct msm_asoc_mach_data {
  174. struct snd_info_entry *codec_root;
  175. struct msm_pinctrl_info pinctrl_info;
  176. int usbc_en2_gpio; /* used by gpio driver API */
  177. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  178. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  179. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  180. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  181. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  182. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  183. };
  184. struct msm_asoc_wcd93xx_codec {
  185. void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
  186. enum afe_config_type config_type);
  187. };
  188. static const char *const pin_states[] = {"sleep", "i2s-active",
  189. "tdm-active"};
  190. static struct snd_soc_card snd_soc_card_sm6150_msm;
  191. enum {
  192. TDM_0 = 0,
  193. TDM_1,
  194. TDM_2,
  195. TDM_3,
  196. TDM_4,
  197. TDM_5,
  198. TDM_6,
  199. TDM_7,
  200. TDM_PORT_MAX,
  201. };
  202. enum {
  203. TDM_PRI = 0,
  204. TDM_SEC,
  205. TDM_TERT,
  206. TDM_QUAT,
  207. TDM_QUIN,
  208. TDM_INTERFACE_MAX,
  209. };
  210. struct tdm_port {
  211. u32 mode;
  212. u32 channel;
  213. };
  214. /* TDM default config */
  215. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  216. { /* PRI TDM */
  217. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  218. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  219. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  220. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  221. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  222. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  223. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  225. },
  226. { /* SEC TDM */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  231. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  232. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  235. },
  236. { /* TERT TDM */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  241. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  242. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  245. },
  246. { /* QUAT TDM */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  251. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  252. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  253. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  255. },
  256. { /* QUIN TDM */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  261. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  262. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  263. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  264. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  265. }
  266. };
  267. /* TDM default config */
  268. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  269. { /* PRI TDM */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  271. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  272. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  273. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  274. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  275. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  278. },
  279. { /* SEC TDM */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  284. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  285. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  288. },
  289. { /* TERT TDM */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  294. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  295. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  296. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  297. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  298. },
  299. { /* QUAT TDM */
  300. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  301. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  302. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  304. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  305. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  306. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  307. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  308. },
  309. { /* QUIN TDM */
  310. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  311. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  312. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  313. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  314. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  315. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  316. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  317. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  318. }
  319. };
  320. /* Default configuration of slimbus channels */
  321. static struct dev_config slim_rx_cfg[] = {
  322. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  323. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  324. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  325. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  326. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  327. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  328. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  329. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  330. };
  331. static struct dev_config slim_tx_cfg[] = {
  332. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  333. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  334. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  335. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  336. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  337. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  338. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  339. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  340. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  341. };
  342. /* Default configuration of Codec DMA Interface Tx */
  343. static struct dev_config cdc_dma_rx_cfg[] = {
  344. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  345. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  346. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  347. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  348. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  349. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  350. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  351. };
  352. /* Default configuration of Codec DMA Interface Rx */
  353. static struct dev_config cdc_dma_tx_cfg[] = {
  354. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  355. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  356. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  357. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  358. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  359. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  360. };
  361. /* Default configuration of external display BE */
  362. static struct dev_config ext_disp_rx_cfg[] = {
  363. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  364. };
  365. static struct dev_config usb_rx_cfg = {
  366. .sample_rate = SAMPLING_RATE_48KHZ,
  367. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  368. .channels = 2,
  369. };
  370. static struct dev_config usb_tx_cfg = {
  371. .sample_rate = SAMPLING_RATE_48KHZ,
  372. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  373. .channels = 1,
  374. };
  375. static struct dev_config proxy_rx_cfg = {
  376. .sample_rate = SAMPLING_RATE_48KHZ,
  377. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  378. .channels = 2,
  379. };
  380. /* Default configuration of MI2S channels */
  381. static struct dev_config mi2s_rx_cfg[] = {
  382. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  383. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  384. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  385. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  386. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  387. };
  388. static struct dev_config mi2s_tx_cfg[] = {
  389. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  390. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  391. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  392. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  393. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  394. };
  395. static struct dev_config aux_pcm_rx_cfg[] = {
  396. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  397. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  398. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  399. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  400. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  401. };
  402. static struct dev_config aux_pcm_tx_cfg[] = {
  403. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  404. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  405. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  406. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  407. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  408. };
  409. static int msm_vi_feed_tx_ch = 2;
  410. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  411. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  412. "Five", "Six", "Seven",
  413. "Eight"};
  414. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  415. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  416. "S32_LE"};
  417. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  418. "S24_3LE"};
  419. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  420. "KHZ_32", "KHZ_44P1", "KHZ_48",
  421. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  422. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  423. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  424. "KHZ_44P1", "KHZ_48",
  425. "KHZ_88P2", "KHZ_96"};
  426. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  427. "Five", "Six", "Seven",
  428. "Eight"};
  429. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  430. "Six", "Seven", "Eight"};
  431. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  432. "KHZ_16", "KHZ_22P05",
  433. "KHZ_32", "KHZ_44P1", "KHZ_48",
  434. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  435. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  436. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  437. "KHZ_192", "KHZ_32", "KHZ_44P1",
  438. "KHZ_88P2", "KHZ_176P4" };
  439. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  440. "Five", "Six", "Seven", "Eight"};
  441. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  442. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  443. "KHZ_48", "KHZ_176P4",
  444. "KHZ_352P8"};
  445. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  446. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  447. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  448. "KHZ_48", "KHZ_96", "KHZ_192"};
  449. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  450. "Five", "Six", "Seven",
  451. "Eight"};
  452. static const char *const hifi_text[] = {"Off", "On"};
  453. static const char *const qos_text[] = {"Disable", "Enable"};
  454. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  455. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  456. "Five", "Six", "Seven",
  457. "Eight"};
  458. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  459. "KHZ_16", "KHZ_22P05",
  460. "KHZ_32", "KHZ_44P1", "KHZ_48",
  461. "KHZ_88P2", "KHZ_96",
  462. "KHZ_176P4", "KHZ_192",
  463. "KHZ_352P8", "KHZ_384"};
  464. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  465. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  466. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  467. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  468. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  469. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  470. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  471. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  472. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  473. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  474. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  475. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  476. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  491. ext_disp_sample_rate_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  505. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  512. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  514. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  516. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  518. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  519. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  520. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  521. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  522. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  523. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  524. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  525. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  526. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  527. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  528. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  529. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  530. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  531. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  532. static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
  533. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  534. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  535. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  536. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  537. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  538. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  539. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  540. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  541. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  542. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  543. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  544. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  545. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  546. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  547. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  548. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  549. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  550. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  551. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  552. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  553. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  554. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  555. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  556. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  557. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  558. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  559. cdc_dma_sample_rate_text);
  560. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  561. cdc_dma_sample_rate_text);
  562. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  563. cdc_dma_sample_rate_text);
  564. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  565. cdc_dma_sample_rate_text);
  566. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  567. cdc_dma_sample_rate_text);
  568. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  569. cdc_dma_sample_rate_text);
  570. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  571. cdc_dma_sample_rate_text);
  572. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  573. cdc_dma_sample_rate_text);
  574. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  575. cdc_dma_sample_rate_text);
  576. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  577. cdc_dma_sample_rate_text);
  578. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  579. cdc_dma_sample_rate_text);
  580. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  581. cdc_dma_sample_rate_text);
  582. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  583. cdc_dma_sample_rate_text);
  584. static struct platform_device *spdev;
  585. static int msm_hifi_control;
  586. static bool is_initial_boot;
  587. static bool codec_reg_done;
  588. static struct snd_soc_aux_dev *msm_aux_dev;
  589. static struct snd_soc_codec_conf *msm_codec_conf;
  590. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  591. static int dmic_0_1_gpio_cnt;
  592. static int dmic_2_3_gpio_cnt;
  593. static void *def_wcd_mbhc_cal(void);
  594. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  595. int enable, bool dapm);
  596. static int msm_wsa881x_init(struct snd_soc_component *component);
  597. static int msm_aux_codec_init(struct snd_soc_component *component);
  598. /*
  599. * Need to report LINEIN
  600. * if R/L channel impedance is larger than 5K ohm
  601. */
  602. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  603. .read_fw_bin = false,
  604. .calibration = NULL,
  605. .detect_extn_cable = true,
  606. .mono_stero_detection = false,
  607. .swap_gnd_mic = NULL,
  608. .hs_ext_micbias = true,
  609. .key_code[0] = KEY_MEDIA,
  610. .key_code[1] = KEY_VOICECOMMAND,
  611. .key_code[2] = KEY_VOLUMEUP,
  612. .key_code[3] = KEY_VOLUMEDOWN,
  613. .key_code[4] = 0,
  614. .key_code[5] = 0,
  615. .key_code[6] = 0,
  616. .key_code[7] = 0,
  617. .linein_th = 5000,
  618. .moisture_en = true,
  619. .mbhc_micbias = MIC_BIAS_2,
  620. .anc_micbias = MIC_BIAS_2,
  621. .enable_anc_mic_detect = false,
  622. };
  623. static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
  624. {"MIC BIAS1", NULL, "MCLK TX"},
  625. {"MIC BIAS2", NULL, "MCLK TX"},
  626. {"MIC BIAS3", NULL, "MCLK TX"},
  627. {"MIC BIAS4", NULL, "MCLK TX"},
  628. };
  629. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  630. {
  631. AFE_API_VERSION_I2S_CONFIG,
  632. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  633. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  634. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  635. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  636. 0,
  637. },
  638. {
  639. AFE_API_VERSION_I2S_CONFIG,
  640. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  641. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  642. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  643. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  644. 0,
  645. },
  646. {
  647. AFE_API_VERSION_I2S_CONFIG,
  648. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  649. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  650. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  651. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  652. 0,
  653. },
  654. {
  655. AFE_API_VERSION_I2S_CONFIG,
  656. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  657. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  658. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  659. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  660. 0,
  661. },
  662. {
  663. AFE_API_VERSION_I2S_CONFIG,
  664. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  665. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  666. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  667. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  668. 0,
  669. }
  670. };
  671. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  672. static int slim_get_sample_rate_val(int sample_rate)
  673. {
  674. int sample_rate_val = 0;
  675. switch (sample_rate) {
  676. case SAMPLING_RATE_8KHZ:
  677. sample_rate_val = 0;
  678. break;
  679. case SAMPLING_RATE_16KHZ:
  680. sample_rate_val = 1;
  681. break;
  682. case SAMPLING_RATE_32KHZ:
  683. sample_rate_val = 2;
  684. break;
  685. case SAMPLING_RATE_44P1KHZ:
  686. sample_rate_val = 3;
  687. break;
  688. case SAMPLING_RATE_48KHZ:
  689. sample_rate_val = 4;
  690. break;
  691. case SAMPLING_RATE_88P2KHZ:
  692. sample_rate_val = 5;
  693. break;
  694. case SAMPLING_RATE_96KHZ:
  695. sample_rate_val = 6;
  696. break;
  697. case SAMPLING_RATE_176P4KHZ:
  698. sample_rate_val = 7;
  699. break;
  700. case SAMPLING_RATE_192KHZ:
  701. sample_rate_val = 8;
  702. break;
  703. case SAMPLING_RATE_352P8KHZ:
  704. sample_rate_val = 9;
  705. break;
  706. case SAMPLING_RATE_384KHZ:
  707. sample_rate_val = 10;
  708. break;
  709. default:
  710. sample_rate_val = 4;
  711. break;
  712. }
  713. return sample_rate_val;
  714. }
  715. static int slim_get_sample_rate(int value)
  716. {
  717. int sample_rate = 0;
  718. switch (value) {
  719. case 0:
  720. sample_rate = SAMPLING_RATE_8KHZ;
  721. break;
  722. case 1:
  723. sample_rate = SAMPLING_RATE_16KHZ;
  724. break;
  725. case 2:
  726. sample_rate = SAMPLING_RATE_32KHZ;
  727. break;
  728. case 3:
  729. sample_rate = SAMPLING_RATE_44P1KHZ;
  730. break;
  731. case 4:
  732. sample_rate = SAMPLING_RATE_48KHZ;
  733. break;
  734. case 5:
  735. sample_rate = SAMPLING_RATE_88P2KHZ;
  736. break;
  737. case 6:
  738. sample_rate = SAMPLING_RATE_96KHZ;
  739. break;
  740. case 7:
  741. sample_rate = SAMPLING_RATE_176P4KHZ;
  742. break;
  743. case 8:
  744. sample_rate = SAMPLING_RATE_192KHZ;
  745. break;
  746. case 9:
  747. sample_rate = SAMPLING_RATE_352P8KHZ;
  748. break;
  749. case 10:
  750. sample_rate = SAMPLING_RATE_384KHZ;
  751. break;
  752. default:
  753. sample_rate = SAMPLING_RATE_48KHZ;
  754. break;
  755. }
  756. return sample_rate;
  757. }
  758. static int slim_get_bit_format_val(int bit_format)
  759. {
  760. int val = 0;
  761. switch (bit_format) {
  762. case SNDRV_PCM_FORMAT_S32_LE:
  763. val = 3;
  764. break;
  765. case SNDRV_PCM_FORMAT_S24_3LE:
  766. val = 2;
  767. break;
  768. case SNDRV_PCM_FORMAT_S24_LE:
  769. val = 1;
  770. break;
  771. case SNDRV_PCM_FORMAT_S16_LE:
  772. default:
  773. val = 0;
  774. break;
  775. }
  776. return val;
  777. }
  778. static int slim_get_bit_format(int val)
  779. {
  780. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  781. switch (val) {
  782. case 0:
  783. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  784. break;
  785. case 1:
  786. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  787. break;
  788. case 2:
  789. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  790. break;
  791. case 3:
  792. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  793. break;
  794. default:
  795. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  796. break;
  797. }
  798. return bit_fmt;
  799. }
  800. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  801. {
  802. int port_id = 0;
  803. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  804. port_id = SLIM_RX_0;
  805. } else if (strnstr(kcontrol->id.name,
  806. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  807. port_id = SLIM_RX_2;
  808. } else if (strnstr(kcontrol->id.name,
  809. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  810. port_id = SLIM_RX_5;
  811. } else if (strnstr(kcontrol->id.name,
  812. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  813. port_id = SLIM_RX_6;
  814. } else if (strnstr(kcontrol->id.name,
  815. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  816. port_id = SLIM_TX_0;
  817. } else if (strnstr(kcontrol->id.name,
  818. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  819. port_id = SLIM_TX_1;
  820. } else {
  821. pr_err("%s: unsupported channel: %s\n",
  822. __func__, kcontrol->id.name);
  823. return -EINVAL;
  824. }
  825. return port_id;
  826. }
  827. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  828. struct snd_ctl_elem_value *ucontrol)
  829. {
  830. int ch_num = slim_get_port_idx(kcontrol);
  831. if (ch_num < 0)
  832. return ch_num;
  833. ucontrol->value.enumerated.item[0] =
  834. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  835. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  836. ch_num, slim_rx_cfg[ch_num].sample_rate,
  837. ucontrol->value.enumerated.item[0]);
  838. return 0;
  839. }
  840. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  841. struct snd_ctl_elem_value *ucontrol)
  842. {
  843. int ch_num = slim_get_port_idx(kcontrol);
  844. if (ch_num < 0)
  845. return ch_num;
  846. slim_rx_cfg[ch_num].sample_rate =
  847. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  848. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  849. ch_num, slim_rx_cfg[ch_num].sample_rate,
  850. ucontrol->value.enumerated.item[0]);
  851. return 0;
  852. }
  853. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  854. struct snd_ctl_elem_value *ucontrol)
  855. {
  856. int ch_num = slim_get_port_idx(kcontrol);
  857. if (ch_num < 0)
  858. return ch_num;
  859. ucontrol->value.enumerated.item[0] =
  860. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  861. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  862. ch_num, slim_tx_cfg[ch_num].sample_rate,
  863. ucontrol->value.enumerated.item[0]);
  864. return 0;
  865. }
  866. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  867. struct snd_ctl_elem_value *ucontrol)
  868. {
  869. int sample_rate = 0;
  870. int ch_num = slim_get_port_idx(kcontrol);
  871. if (ch_num < 0)
  872. return ch_num;
  873. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  874. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  875. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  876. __func__, sample_rate);
  877. return -EINVAL;
  878. }
  879. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  880. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  881. ch_num, slim_tx_cfg[ch_num].sample_rate,
  882. ucontrol->value.enumerated.item[0]);
  883. return 0;
  884. }
  885. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  886. struct snd_ctl_elem_value *ucontrol)
  887. {
  888. int ch_num = slim_get_port_idx(kcontrol);
  889. if (ch_num < 0)
  890. return ch_num;
  891. ucontrol->value.enumerated.item[0] =
  892. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  893. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  894. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  895. ucontrol->value.enumerated.item[0]);
  896. return 0;
  897. }
  898. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  899. struct snd_ctl_elem_value *ucontrol)
  900. {
  901. int ch_num = slim_get_port_idx(kcontrol);
  902. if (ch_num < 0)
  903. return ch_num;
  904. slim_rx_cfg[ch_num].bit_format =
  905. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  906. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  907. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  908. ucontrol->value.enumerated.item[0]);
  909. return 0;
  910. }
  911. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  912. struct snd_ctl_elem_value *ucontrol)
  913. {
  914. int ch_num = slim_get_port_idx(kcontrol);
  915. if (ch_num < 0)
  916. return ch_num;
  917. ucontrol->value.enumerated.item[0] =
  918. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  919. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  920. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  921. ucontrol->value.enumerated.item[0]);
  922. return 0;
  923. }
  924. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  925. struct snd_ctl_elem_value *ucontrol)
  926. {
  927. int ch_num = slim_get_port_idx(kcontrol);
  928. if (ch_num < 0)
  929. return ch_num;
  930. slim_tx_cfg[ch_num].bit_format =
  931. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  932. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  933. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  934. ucontrol->value.enumerated.item[0]);
  935. return 0;
  936. }
  937. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  938. struct snd_ctl_elem_value *ucontrol)
  939. {
  940. int ch_num = slim_get_port_idx(kcontrol);
  941. if (ch_num < 0)
  942. return ch_num;
  943. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  944. ch_num, slim_rx_cfg[ch_num].channels);
  945. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  946. return 0;
  947. }
  948. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  949. struct snd_ctl_elem_value *ucontrol)
  950. {
  951. int ch_num = slim_get_port_idx(kcontrol);
  952. if (ch_num < 0)
  953. return ch_num;
  954. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  955. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  956. ch_num, slim_rx_cfg[ch_num].channels);
  957. return 1;
  958. }
  959. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  960. struct snd_ctl_elem_value *ucontrol)
  961. {
  962. int ch_num = slim_get_port_idx(kcontrol);
  963. if (ch_num < 0)
  964. return ch_num;
  965. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  966. ch_num, slim_tx_cfg[ch_num].channels);
  967. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  968. return 0;
  969. }
  970. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  971. struct snd_ctl_elem_value *ucontrol)
  972. {
  973. int ch_num = slim_get_port_idx(kcontrol);
  974. if (ch_num < 0)
  975. return ch_num;
  976. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  977. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  978. ch_num, slim_tx_cfg[ch_num].channels);
  979. return 1;
  980. }
  981. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  982. struct snd_ctl_elem_value *ucontrol)
  983. {
  984. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  985. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  986. ucontrol->value.integer.value[0]);
  987. return 0;
  988. }
  989. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  990. struct snd_ctl_elem_value *ucontrol)
  991. {
  992. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  993. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  994. return 1;
  995. }
  996. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  997. struct snd_ctl_elem_value *ucontrol)
  998. {
  999. /*
  1000. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  1001. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  1002. * value.
  1003. */
  1004. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1005. case SAMPLING_RATE_96KHZ:
  1006. ucontrol->value.integer.value[0] = 5;
  1007. break;
  1008. case SAMPLING_RATE_88P2KHZ:
  1009. ucontrol->value.integer.value[0] = 4;
  1010. break;
  1011. case SAMPLING_RATE_48KHZ:
  1012. ucontrol->value.integer.value[0] = 3;
  1013. break;
  1014. case SAMPLING_RATE_44P1KHZ:
  1015. ucontrol->value.integer.value[0] = 2;
  1016. break;
  1017. case SAMPLING_RATE_16KHZ:
  1018. ucontrol->value.integer.value[0] = 1;
  1019. break;
  1020. case SAMPLING_RATE_8KHZ:
  1021. default:
  1022. ucontrol->value.integer.value[0] = 0;
  1023. break;
  1024. }
  1025. pr_debug("%s: sample rate = %d\n", __func__,
  1026. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1027. return 0;
  1028. }
  1029. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  1030. struct snd_ctl_elem_value *ucontrol)
  1031. {
  1032. switch (ucontrol->value.integer.value[0]) {
  1033. case 1:
  1034. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1035. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1036. break;
  1037. case 2:
  1038. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1039. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1040. break;
  1041. case 3:
  1042. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1043. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1044. break;
  1045. case 4:
  1046. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1047. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1048. break;
  1049. case 5:
  1050. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1051. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1052. break;
  1053. case 0:
  1054. default:
  1055. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1056. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1057. break;
  1058. }
  1059. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  1060. __func__,
  1061. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1062. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1063. ucontrol->value.enumerated.item[0]);
  1064. return 0;
  1065. }
  1066. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1067. {
  1068. int idx = 0;
  1069. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1070. sizeof("WSA_CDC_DMA_RX_0")))
  1071. idx = WSA_CDC_DMA_RX_0;
  1072. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1073. sizeof("WSA_CDC_DMA_RX_0")))
  1074. idx = WSA_CDC_DMA_RX_1;
  1075. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1076. sizeof("RX_CDC_DMA_RX_0")))
  1077. idx = RX_CDC_DMA_RX_0;
  1078. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1079. sizeof("RX_CDC_DMA_RX_1")))
  1080. idx = RX_CDC_DMA_RX_1;
  1081. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1082. sizeof("RX_CDC_DMA_RX_2")))
  1083. idx = RX_CDC_DMA_RX_2;
  1084. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1085. sizeof("RX_CDC_DMA_RX_3")))
  1086. idx = RX_CDC_DMA_RX_3;
  1087. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1088. sizeof("RX_CDC_DMA_RX_5")))
  1089. idx = RX_CDC_DMA_RX_5;
  1090. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1091. sizeof("WSA_CDC_DMA_TX_0")))
  1092. idx = WSA_CDC_DMA_TX_0;
  1093. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1094. sizeof("WSA_CDC_DMA_TX_1")))
  1095. idx = WSA_CDC_DMA_TX_1;
  1096. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1097. sizeof("WSA_CDC_DMA_TX_2")))
  1098. idx = WSA_CDC_DMA_TX_2;
  1099. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1100. sizeof("TX_CDC_DMA_TX_0")))
  1101. idx = TX_CDC_DMA_TX_0;
  1102. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1103. sizeof("TX_CDC_DMA_TX_3")))
  1104. idx = TX_CDC_DMA_TX_3;
  1105. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1106. sizeof("TX_CDC_DMA_TX_4")))
  1107. idx = TX_CDC_DMA_TX_4;
  1108. else {
  1109. pr_err("%s: unsupported channel: %s\n",
  1110. __func__, kcontrol->id.name);
  1111. return -EINVAL;
  1112. }
  1113. return idx;
  1114. }
  1115. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1116. struct snd_ctl_elem_value *ucontrol)
  1117. {
  1118. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1119. if (ch_num < 0) {
  1120. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1121. return ch_num;
  1122. }
  1123. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1124. cdc_dma_rx_cfg[ch_num].channels - 1);
  1125. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1126. return 0;
  1127. }
  1128. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1129. struct snd_ctl_elem_value *ucontrol)
  1130. {
  1131. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1132. if (ch_num < 0) {
  1133. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1134. return ch_num;
  1135. }
  1136. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1137. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1138. cdc_dma_rx_cfg[ch_num].channels);
  1139. return 1;
  1140. }
  1141. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1142. struct snd_ctl_elem_value *ucontrol)
  1143. {
  1144. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1145. if (ch_num < 0) {
  1146. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1147. return ch_num;
  1148. }
  1149. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1150. case SNDRV_PCM_FORMAT_S32_LE:
  1151. ucontrol->value.integer.value[0] = 3;
  1152. break;
  1153. case SNDRV_PCM_FORMAT_S24_3LE:
  1154. ucontrol->value.integer.value[0] = 2;
  1155. break;
  1156. case SNDRV_PCM_FORMAT_S24_LE:
  1157. ucontrol->value.integer.value[0] = 1;
  1158. break;
  1159. case SNDRV_PCM_FORMAT_S16_LE:
  1160. default:
  1161. ucontrol->value.integer.value[0] = 0;
  1162. break;
  1163. }
  1164. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1165. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1166. ucontrol->value.integer.value[0]);
  1167. return 0;
  1168. }
  1169. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1170. struct snd_ctl_elem_value *ucontrol)
  1171. {
  1172. int rc = 0;
  1173. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1174. if (ch_num < 0) {
  1175. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1176. return ch_num;
  1177. }
  1178. switch (ucontrol->value.integer.value[0]) {
  1179. case 3:
  1180. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1181. break;
  1182. case 2:
  1183. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1184. break;
  1185. case 1:
  1186. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1187. break;
  1188. case 0:
  1189. default:
  1190. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1191. break;
  1192. }
  1193. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1194. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1195. ucontrol->value.integer.value[0]);
  1196. return rc;
  1197. }
  1198. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1199. {
  1200. int sample_rate_val = 0;
  1201. switch (sample_rate) {
  1202. case SAMPLING_RATE_8KHZ:
  1203. sample_rate_val = 0;
  1204. break;
  1205. case SAMPLING_RATE_11P025KHZ:
  1206. sample_rate_val = 1;
  1207. break;
  1208. case SAMPLING_RATE_16KHZ:
  1209. sample_rate_val = 2;
  1210. break;
  1211. case SAMPLING_RATE_22P05KHZ:
  1212. sample_rate_val = 3;
  1213. break;
  1214. case SAMPLING_RATE_32KHZ:
  1215. sample_rate_val = 4;
  1216. break;
  1217. case SAMPLING_RATE_44P1KHZ:
  1218. sample_rate_val = 5;
  1219. break;
  1220. case SAMPLING_RATE_48KHZ:
  1221. sample_rate_val = 6;
  1222. break;
  1223. case SAMPLING_RATE_88P2KHZ:
  1224. sample_rate_val = 7;
  1225. break;
  1226. case SAMPLING_RATE_96KHZ:
  1227. sample_rate_val = 8;
  1228. break;
  1229. case SAMPLING_RATE_176P4KHZ:
  1230. sample_rate_val = 9;
  1231. break;
  1232. case SAMPLING_RATE_192KHZ:
  1233. sample_rate_val = 10;
  1234. break;
  1235. case SAMPLING_RATE_352P8KHZ:
  1236. sample_rate_val = 11;
  1237. break;
  1238. case SAMPLING_RATE_384KHZ:
  1239. sample_rate_val = 12;
  1240. break;
  1241. default:
  1242. sample_rate_val = 6;
  1243. break;
  1244. }
  1245. return sample_rate_val;
  1246. }
  1247. static int cdc_dma_get_sample_rate(int value)
  1248. {
  1249. int sample_rate = 0;
  1250. switch (value) {
  1251. case 0:
  1252. sample_rate = SAMPLING_RATE_8KHZ;
  1253. break;
  1254. case 1:
  1255. sample_rate = SAMPLING_RATE_11P025KHZ;
  1256. break;
  1257. case 2:
  1258. sample_rate = SAMPLING_RATE_16KHZ;
  1259. break;
  1260. case 3:
  1261. sample_rate = SAMPLING_RATE_22P05KHZ;
  1262. break;
  1263. case 4:
  1264. sample_rate = SAMPLING_RATE_32KHZ;
  1265. break;
  1266. case 5:
  1267. sample_rate = SAMPLING_RATE_44P1KHZ;
  1268. break;
  1269. case 6:
  1270. sample_rate = SAMPLING_RATE_48KHZ;
  1271. break;
  1272. case 7:
  1273. sample_rate = SAMPLING_RATE_88P2KHZ;
  1274. break;
  1275. case 8:
  1276. sample_rate = SAMPLING_RATE_96KHZ;
  1277. break;
  1278. case 9:
  1279. sample_rate = SAMPLING_RATE_176P4KHZ;
  1280. break;
  1281. case 10:
  1282. sample_rate = SAMPLING_RATE_192KHZ;
  1283. break;
  1284. case 11:
  1285. sample_rate = SAMPLING_RATE_352P8KHZ;
  1286. break;
  1287. case 12:
  1288. sample_rate = SAMPLING_RATE_384KHZ;
  1289. break;
  1290. default:
  1291. sample_rate = SAMPLING_RATE_48KHZ;
  1292. break;
  1293. }
  1294. return sample_rate;
  1295. }
  1296. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1297. struct snd_ctl_elem_value *ucontrol)
  1298. {
  1299. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1300. if (ch_num < 0) {
  1301. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1302. return ch_num;
  1303. }
  1304. ucontrol->value.enumerated.item[0] =
  1305. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1306. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1307. cdc_dma_rx_cfg[ch_num].sample_rate);
  1308. return 0;
  1309. }
  1310. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1311. struct snd_ctl_elem_value *ucontrol)
  1312. {
  1313. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1314. if (ch_num < 0) {
  1315. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1316. return ch_num;
  1317. }
  1318. cdc_dma_rx_cfg[ch_num].sample_rate =
  1319. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1320. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1321. __func__, ucontrol->value.enumerated.item[0],
  1322. cdc_dma_rx_cfg[ch_num].sample_rate);
  1323. return 0;
  1324. }
  1325. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1326. struct snd_ctl_elem_value *ucontrol)
  1327. {
  1328. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1329. if (ch_num < 0) {
  1330. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1331. return ch_num;
  1332. }
  1333. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1334. cdc_dma_tx_cfg[ch_num].channels);
  1335. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1336. return 0;
  1337. }
  1338. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1339. struct snd_ctl_elem_value *ucontrol)
  1340. {
  1341. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1342. if (ch_num < 0) {
  1343. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1344. return ch_num;
  1345. }
  1346. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1347. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1348. cdc_dma_tx_cfg[ch_num].channels);
  1349. return 1;
  1350. }
  1351. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1352. struct snd_ctl_elem_value *ucontrol)
  1353. {
  1354. int sample_rate_val;
  1355. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1356. if (ch_num < 0) {
  1357. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1358. return ch_num;
  1359. }
  1360. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1361. case SAMPLING_RATE_384KHZ:
  1362. sample_rate_val = 12;
  1363. break;
  1364. case SAMPLING_RATE_352P8KHZ:
  1365. sample_rate_val = 11;
  1366. break;
  1367. case SAMPLING_RATE_192KHZ:
  1368. sample_rate_val = 10;
  1369. break;
  1370. case SAMPLING_RATE_176P4KHZ:
  1371. sample_rate_val = 9;
  1372. break;
  1373. case SAMPLING_RATE_96KHZ:
  1374. sample_rate_val = 8;
  1375. break;
  1376. case SAMPLING_RATE_88P2KHZ:
  1377. sample_rate_val = 7;
  1378. break;
  1379. case SAMPLING_RATE_48KHZ:
  1380. sample_rate_val = 6;
  1381. break;
  1382. case SAMPLING_RATE_44P1KHZ:
  1383. sample_rate_val = 5;
  1384. break;
  1385. case SAMPLING_RATE_32KHZ:
  1386. sample_rate_val = 4;
  1387. break;
  1388. case SAMPLING_RATE_22P05KHZ:
  1389. sample_rate_val = 3;
  1390. break;
  1391. case SAMPLING_RATE_16KHZ:
  1392. sample_rate_val = 2;
  1393. break;
  1394. case SAMPLING_RATE_11P025KHZ:
  1395. sample_rate_val = 1;
  1396. break;
  1397. case SAMPLING_RATE_8KHZ:
  1398. sample_rate_val = 0;
  1399. break;
  1400. default:
  1401. sample_rate_val = 6;
  1402. break;
  1403. }
  1404. ucontrol->value.integer.value[0] = sample_rate_val;
  1405. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1406. cdc_dma_tx_cfg[ch_num].sample_rate);
  1407. return 0;
  1408. }
  1409. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1410. struct snd_ctl_elem_value *ucontrol)
  1411. {
  1412. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1413. if (ch_num < 0) {
  1414. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1415. return ch_num;
  1416. }
  1417. switch (ucontrol->value.integer.value[0]) {
  1418. case 12:
  1419. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1420. break;
  1421. case 11:
  1422. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1423. break;
  1424. case 10:
  1425. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1426. break;
  1427. case 9:
  1428. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1429. break;
  1430. case 8:
  1431. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1432. break;
  1433. case 7:
  1434. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1435. break;
  1436. case 6:
  1437. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1438. break;
  1439. case 5:
  1440. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1441. break;
  1442. case 4:
  1443. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1444. break;
  1445. case 3:
  1446. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1447. break;
  1448. case 2:
  1449. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1450. break;
  1451. case 1:
  1452. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1453. break;
  1454. case 0:
  1455. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1456. break;
  1457. default:
  1458. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1459. break;
  1460. }
  1461. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1462. __func__, ucontrol->value.integer.value[0],
  1463. cdc_dma_tx_cfg[ch_num].sample_rate);
  1464. return 0;
  1465. }
  1466. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1467. struct snd_ctl_elem_value *ucontrol)
  1468. {
  1469. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1470. if (ch_num < 0) {
  1471. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1472. return ch_num;
  1473. }
  1474. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1475. case SNDRV_PCM_FORMAT_S32_LE:
  1476. ucontrol->value.integer.value[0] = 3;
  1477. break;
  1478. case SNDRV_PCM_FORMAT_S24_3LE:
  1479. ucontrol->value.integer.value[0] = 2;
  1480. break;
  1481. case SNDRV_PCM_FORMAT_S24_LE:
  1482. ucontrol->value.integer.value[0] = 1;
  1483. break;
  1484. case SNDRV_PCM_FORMAT_S16_LE:
  1485. default:
  1486. ucontrol->value.integer.value[0] = 0;
  1487. break;
  1488. }
  1489. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1490. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1491. ucontrol->value.integer.value[0]);
  1492. return 0;
  1493. }
  1494. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1495. struct snd_ctl_elem_value *ucontrol)
  1496. {
  1497. int rc = 0;
  1498. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1499. if (ch_num < 0) {
  1500. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1501. return ch_num;
  1502. }
  1503. switch (ucontrol->value.integer.value[0]) {
  1504. case 3:
  1505. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1506. break;
  1507. case 2:
  1508. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1509. break;
  1510. case 1:
  1511. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1512. break;
  1513. case 0:
  1514. default:
  1515. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1516. break;
  1517. }
  1518. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1519. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1520. ucontrol->value.integer.value[0]);
  1521. return rc;
  1522. }
  1523. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1524. struct snd_ctl_elem_value *ucontrol)
  1525. {
  1526. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1527. usb_rx_cfg.channels);
  1528. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1529. return 0;
  1530. }
  1531. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1532. struct snd_ctl_elem_value *ucontrol)
  1533. {
  1534. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1535. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1536. return 1;
  1537. }
  1538. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1539. struct snd_ctl_elem_value *ucontrol)
  1540. {
  1541. int sample_rate_val;
  1542. switch (usb_rx_cfg.sample_rate) {
  1543. case SAMPLING_RATE_384KHZ:
  1544. sample_rate_val = 12;
  1545. break;
  1546. case SAMPLING_RATE_352P8KHZ:
  1547. sample_rate_val = 11;
  1548. break;
  1549. case SAMPLING_RATE_192KHZ:
  1550. sample_rate_val = 10;
  1551. break;
  1552. case SAMPLING_RATE_176P4KHZ:
  1553. sample_rate_val = 9;
  1554. break;
  1555. case SAMPLING_RATE_96KHZ:
  1556. sample_rate_val = 8;
  1557. break;
  1558. case SAMPLING_RATE_88P2KHZ:
  1559. sample_rate_val = 7;
  1560. break;
  1561. case SAMPLING_RATE_48KHZ:
  1562. sample_rate_val = 6;
  1563. break;
  1564. case SAMPLING_RATE_44P1KHZ:
  1565. sample_rate_val = 5;
  1566. break;
  1567. case SAMPLING_RATE_32KHZ:
  1568. sample_rate_val = 4;
  1569. break;
  1570. case SAMPLING_RATE_22P05KHZ:
  1571. sample_rate_val = 3;
  1572. break;
  1573. case SAMPLING_RATE_16KHZ:
  1574. sample_rate_val = 2;
  1575. break;
  1576. case SAMPLING_RATE_11P025KHZ:
  1577. sample_rate_val = 1;
  1578. break;
  1579. case SAMPLING_RATE_8KHZ:
  1580. default:
  1581. sample_rate_val = 0;
  1582. break;
  1583. }
  1584. ucontrol->value.integer.value[0] = sample_rate_val;
  1585. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1586. usb_rx_cfg.sample_rate);
  1587. return 0;
  1588. }
  1589. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1590. struct snd_ctl_elem_value *ucontrol)
  1591. {
  1592. switch (ucontrol->value.integer.value[0]) {
  1593. case 12:
  1594. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1595. break;
  1596. case 11:
  1597. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1598. break;
  1599. case 10:
  1600. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1601. break;
  1602. case 9:
  1603. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1604. break;
  1605. case 8:
  1606. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1607. break;
  1608. case 7:
  1609. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1610. break;
  1611. case 6:
  1612. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1613. break;
  1614. case 5:
  1615. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1616. break;
  1617. case 4:
  1618. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1619. break;
  1620. case 3:
  1621. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1622. break;
  1623. case 2:
  1624. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1625. break;
  1626. case 1:
  1627. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1628. break;
  1629. case 0:
  1630. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1631. break;
  1632. default:
  1633. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1634. break;
  1635. }
  1636. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1637. __func__, ucontrol->value.integer.value[0],
  1638. usb_rx_cfg.sample_rate);
  1639. return 0;
  1640. }
  1641. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1642. struct snd_ctl_elem_value *ucontrol)
  1643. {
  1644. switch (usb_rx_cfg.bit_format) {
  1645. case SNDRV_PCM_FORMAT_S32_LE:
  1646. ucontrol->value.integer.value[0] = 3;
  1647. break;
  1648. case SNDRV_PCM_FORMAT_S24_3LE:
  1649. ucontrol->value.integer.value[0] = 2;
  1650. break;
  1651. case SNDRV_PCM_FORMAT_S24_LE:
  1652. ucontrol->value.integer.value[0] = 1;
  1653. break;
  1654. case SNDRV_PCM_FORMAT_S16_LE:
  1655. default:
  1656. ucontrol->value.integer.value[0] = 0;
  1657. break;
  1658. }
  1659. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1660. __func__, usb_rx_cfg.bit_format,
  1661. ucontrol->value.integer.value[0]);
  1662. return 0;
  1663. }
  1664. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1665. struct snd_ctl_elem_value *ucontrol)
  1666. {
  1667. int rc = 0;
  1668. switch (ucontrol->value.integer.value[0]) {
  1669. case 3:
  1670. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1671. break;
  1672. case 2:
  1673. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1674. break;
  1675. case 1:
  1676. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1677. break;
  1678. case 0:
  1679. default:
  1680. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1681. break;
  1682. }
  1683. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1684. __func__, usb_rx_cfg.bit_format,
  1685. ucontrol->value.integer.value[0]);
  1686. return rc;
  1687. }
  1688. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1689. struct snd_ctl_elem_value *ucontrol)
  1690. {
  1691. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1692. usb_tx_cfg.channels);
  1693. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1694. return 0;
  1695. }
  1696. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1697. struct snd_ctl_elem_value *ucontrol)
  1698. {
  1699. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1700. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1701. return 1;
  1702. }
  1703. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1704. struct snd_ctl_elem_value *ucontrol)
  1705. {
  1706. int sample_rate_val;
  1707. switch (usb_tx_cfg.sample_rate) {
  1708. case SAMPLING_RATE_384KHZ:
  1709. sample_rate_val = 12;
  1710. break;
  1711. case SAMPLING_RATE_352P8KHZ:
  1712. sample_rate_val = 11;
  1713. break;
  1714. case SAMPLING_RATE_192KHZ:
  1715. sample_rate_val = 10;
  1716. break;
  1717. case SAMPLING_RATE_176P4KHZ:
  1718. sample_rate_val = 9;
  1719. break;
  1720. case SAMPLING_RATE_96KHZ:
  1721. sample_rate_val = 8;
  1722. break;
  1723. case SAMPLING_RATE_88P2KHZ:
  1724. sample_rate_val = 7;
  1725. break;
  1726. case SAMPLING_RATE_48KHZ:
  1727. sample_rate_val = 6;
  1728. break;
  1729. case SAMPLING_RATE_44P1KHZ:
  1730. sample_rate_val = 5;
  1731. break;
  1732. case SAMPLING_RATE_32KHZ:
  1733. sample_rate_val = 4;
  1734. break;
  1735. case SAMPLING_RATE_22P05KHZ:
  1736. sample_rate_val = 3;
  1737. break;
  1738. case SAMPLING_RATE_16KHZ:
  1739. sample_rate_val = 2;
  1740. break;
  1741. case SAMPLING_RATE_11P025KHZ:
  1742. sample_rate_val = 1;
  1743. break;
  1744. case SAMPLING_RATE_8KHZ:
  1745. sample_rate_val = 0;
  1746. break;
  1747. default:
  1748. sample_rate_val = 6;
  1749. break;
  1750. }
  1751. ucontrol->value.integer.value[0] = sample_rate_val;
  1752. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1753. usb_tx_cfg.sample_rate);
  1754. return 0;
  1755. }
  1756. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1757. struct snd_ctl_elem_value *ucontrol)
  1758. {
  1759. switch (ucontrol->value.integer.value[0]) {
  1760. case 12:
  1761. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1762. break;
  1763. case 11:
  1764. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1765. break;
  1766. case 10:
  1767. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1768. break;
  1769. case 9:
  1770. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1771. break;
  1772. case 8:
  1773. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1774. break;
  1775. case 7:
  1776. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1777. break;
  1778. case 6:
  1779. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1780. break;
  1781. case 5:
  1782. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1783. break;
  1784. case 4:
  1785. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1786. break;
  1787. case 3:
  1788. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1789. break;
  1790. case 2:
  1791. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1792. break;
  1793. case 1:
  1794. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1795. break;
  1796. case 0:
  1797. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1798. break;
  1799. default:
  1800. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1801. break;
  1802. }
  1803. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1804. __func__, ucontrol->value.integer.value[0],
  1805. usb_tx_cfg.sample_rate);
  1806. return 0;
  1807. }
  1808. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1809. struct snd_ctl_elem_value *ucontrol)
  1810. {
  1811. switch (usb_tx_cfg.bit_format) {
  1812. case SNDRV_PCM_FORMAT_S32_LE:
  1813. ucontrol->value.integer.value[0] = 3;
  1814. break;
  1815. case SNDRV_PCM_FORMAT_S24_3LE:
  1816. ucontrol->value.integer.value[0] = 2;
  1817. break;
  1818. case SNDRV_PCM_FORMAT_S24_LE:
  1819. ucontrol->value.integer.value[0] = 1;
  1820. break;
  1821. case SNDRV_PCM_FORMAT_S16_LE:
  1822. default:
  1823. ucontrol->value.integer.value[0] = 0;
  1824. break;
  1825. }
  1826. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1827. __func__, usb_tx_cfg.bit_format,
  1828. ucontrol->value.integer.value[0]);
  1829. return 0;
  1830. }
  1831. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1832. struct snd_ctl_elem_value *ucontrol)
  1833. {
  1834. int rc = 0;
  1835. switch (ucontrol->value.integer.value[0]) {
  1836. case 3:
  1837. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1838. break;
  1839. case 2:
  1840. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1841. break;
  1842. case 1:
  1843. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1844. break;
  1845. case 0:
  1846. default:
  1847. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1848. break;
  1849. }
  1850. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1851. __func__, usb_tx_cfg.bit_format,
  1852. ucontrol->value.integer.value[0]);
  1853. return rc;
  1854. }
  1855. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  1856. {
  1857. int idx;
  1858. if (strnstr(kcontrol->id.name, "Display Port RX",
  1859. sizeof("Display Port RX"))) {
  1860. idx = DP_RX_IDX;
  1861. } else {
  1862. pr_err("%s: unsupported BE: %s\n",
  1863. __func__, kcontrol->id.name);
  1864. idx = -EINVAL;
  1865. }
  1866. return idx;
  1867. }
  1868. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  1869. struct snd_ctl_elem_value *ucontrol)
  1870. {
  1871. int idx = ext_disp_get_port_idx(kcontrol);
  1872. if (idx < 0)
  1873. return idx;
  1874. switch (ext_disp_rx_cfg[idx].bit_format) {
  1875. case SNDRV_PCM_FORMAT_S24_3LE:
  1876. ucontrol->value.integer.value[0] = 2;
  1877. break;
  1878. case SNDRV_PCM_FORMAT_S24_LE:
  1879. ucontrol->value.integer.value[0] = 1;
  1880. break;
  1881. case SNDRV_PCM_FORMAT_S16_LE:
  1882. default:
  1883. ucontrol->value.integer.value[0] = 0;
  1884. break;
  1885. }
  1886. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1887. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1888. ucontrol->value.integer.value[0]);
  1889. return 0;
  1890. }
  1891. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  1892. struct snd_ctl_elem_value *ucontrol)
  1893. {
  1894. int idx = ext_disp_get_port_idx(kcontrol);
  1895. if (idx < 0)
  1896. return idx;
  1897. switch (ucontrol->value.integer.value[0]) {
  1898. case 2:
  1899. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1900. break;
  1901. case 1:
  1902. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1903. break;
  1904. case 0:
  1905. default:
  1906. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1907. break;
  1908. }
  1909. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  1910. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  1911. ucontrol->value.integer.value[0]);
  1912. return 0;
  1913. }
  1914. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  1915. struct snd_ctl_elem_value *ucontrol)
  1916. {
  1917. int idx = ext_disp_get_port_idx(kcontrol);
  1918. if (idx < 0)
  1919. return idx;
  1920. ucontrol->value.integer.value[0] =
  1921. ext_disp_rx_cfg[idx].channels - 2;
  1922. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1923. idx, ext_disp_rx_cfg[idx].channels);
  1924. return 0;
  1925. }
  1926. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  1927. struct snd_ctl_elem_value *ucontrol)
  1928. {
  1929. int idx = ext_disp_get_port_idx(kcontrol);
  1930. if (idx < 0)
  1931. return idx;
  1932. ext_disp_rx_cfg[idx].channels =
  1933. ucontrol->value.integer.value[0] + 2;
  1934. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  1935. idx, ext_disp_rx_cfg[idx].channels);
  1936. return 1;
  1937. }
  1938. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1939. struct snd_ctl_elem_value *ucontrol)
  1940. {
  1941. int sample_rate_val;
  1942. int idx = ext_disp_get_port_idx(kcontrol);
  1943. if (idx < 0)
  1944. return idx;
  1945. switch (ext_disp_rx_cfg[idx].sample_rate) {
  1946. case SAMPLING_RATE_176P4KHZ:
  1947. sample_rate_val = 6;
  1948. break;
  1949. case SAMPLING_RATE_88P2KHZ:
  1950. sample_rate_val = 5;
  1951. break;
  1952. case SAMPLING_RATE_44P1KHZ:
  1953. sample_rate_val = 4;
  1954. break;
  1955. case SAMPLING_RATE_32KHZ:
  1956. sample_rate_val = 3;
  1957. break;
  1958. case SAMPLING_RATE_192KHZ:
  1959. sample_rate_val = 2;
  1960. break;
  1961. case SAMPLING_RATE_96KHZ:
  1962. sample_rate_val = 1;
  1963. break;
  1964. case SAMPLING_RATE_48KHZ:
  1965. default:
  1966. sample_rate_val = 0;
  1967. break;
  1968. }
  1969. ucontrol->value.integer.value[0] = sample_rate_val;
  1970. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  1971. idx, ext_disp_rx_cfg[idx].sample_rate);
  1972. return 0;
  1973. }
  1974. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1975. struct snd_ctl_elem_value *ucontrol)
  1976. {
  1977. int idx = ext_disp_get_port_idx(kcontrol);
  1978. if (idx < 0)
  1979. return idx;
  1980. switch (ucontrol->value.integer.value[0]) {
  1981. case 6:
  1982. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  1983. break;
  1984. case 5:
  1985. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  1986. break;
  1987. case 4:
  1988. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  1989. break;
  1990. case 3:
  1991. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  1992. break;
  1993. case 2:
  1994. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  1995. break;
  1996. case 1:
  1997. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  1998. break;
  1999. case 0:
  2000. default:
  2001. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  2002. break;
  2003. }
  2004. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  2005. __func__, ucontrol->value.integer.value[0], idx,
  2006. ext_disp_rx_cfg[idx].sample_rate);
  2007. return 0;
  2008. }
  2009. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  2010. struct snd_ctl_elem_value *ucontrol)
  2011. {
  2012. pr_debug("%s: proxy_rx channels = %d\n",
  2013. __func__, proxy_rx_cfg.channels);
  2014. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  2015. return 0;
  2016. }
  2017. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  2018. struct snd_ctl_elem_value *ucontrol)
  2019. {
  2020. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  2021. pr_debug("%s: proxy_rx channels = %d\n",
  2022. __func__, proxy_rx_cfg.channels);
  2023. return 1;
  2024. }
  2025. static int tdm_get_sample_rate(int value)
  2026. {
  2027. int sample_rate = 0;
  2028. switch (value) {
  2029. case 0:
  2030. sample_rate = SAMPLING_RATE_8KHZ;
  2031. break;
  2032. case 1:
  2033. sample_rate = SAMPLING_RATE_16KHZ;
  2034. break;
  2035. case 2:
  2036. sample_rate = SAMPLING_RATE_32KHZ;
  2037. break;
  2038. case 3:
  2039. sample_rate = SAMPLING_RATE_48KHZ;
  2040. break;
  2041. case 4:
  2042. sample_rate = SAMPLING_RATE_176P4KHZ;
  2043. break;
  2044. case 5:
  2045. sample_rate = SAMPLING_RATE_352P8KHZ;
  2046. break;
  2047. default:
  2048. sample_rate = SAMPLING_RATE_48KHZ;
  2049. break;
  2050. }
  2051. return sample_rate;
  2052. }
  2053. static int aux_pcm_get_sample_rate(int value)
  2054. {
  2055. int sample_rate;
  2056. switch (value) {
  2057. case 1:
  2058. sample_rate = SAMPLING_RATE_16KHZ;
  2059. break;
  2060. case 0:
  2061. default:
  2062. sample_rate = SAMPLING_RATE_8KHZ;
  2063. break;
  2064. }
  2065. return sample_rate;
  2066. }
  2067. static int tdm_get_sample_rate_val(int sample_rate)
  2068. {
  2069. int sample_rate_val = 0;
  2070. switch (sample_rate) {
  2071. case SAMPLING_RATE_8KHZ:
  2072. sample_rate_val = 0;
  2073. break;
  2074. case SAMPLING_RATE_16KHZ:
  2075. sample_rate_val = 1;
  2076. break;
  2077. case SAMPLING_RATE_32KHZ:
  2078. sample_rate_val = 2;
  2079. break;
  2080. case SAMPLING_RATE_48KHZ:
  2081. sample_rate_val = 3;
  2082. break;
  2083. case SAMPLING_RATE_176P4KHZ:
  2084. sample_rate_val = 4;
  2085. break;
  2086. case SAMPLING_RATE_352P8KHZ:
  2087. sample_rate_val = 5;
  2088. break;
  2089. default:
  2090. sample_rate_val = 3;
  2091. break;
  2092. }
  2093. return sample_rate_val;
  2094. }
  2095. static int aux_pcm_get_sample_rate_val(int sample_rate)
  2096. {
  2097. int sample_rate_val;
  2098. switch (sample_rate) {
  2099. case SAMPLING_RATE_16KHZ:
  2100. sample_rate_val = 1;
  2101. break;
  2102. case SAMPLING_RATE_8KHZ:
  2103. default:
  2104. sample_rate_val = 0;
  2105. break;
  2106. }
  2107. return sample_rate_val;
  2108. }
  2109. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  2110. struct tdm_port *port)
  2111. {
  2112. if (port) {
  2113. if (strnstr(kcontrol->id.name, "PRI",
  2114. sizeof(kcontrol->id.name))) {
  2115. port->mode = TDM_PRI;
  2116. } else if (strnstr(kcontrol->id.name, "SEC",
  2117. sizeof(kcontrol->id.name))) {
  2118. port->mode = TDM_SEC;
  2119. } else if (strnstr(kcontrol->id.name, "TERT",
  2120. sizeof(kcontrol->id.name))) {
  2121. port->mode = TDM_TERT;
  2122. } else if (strnstr(kcontrol->id.name, "QUAT",
  2123. sizeof(kcontrol->id.name))) {
  2124. port->mode = TDM_QUAT;
  2125. } else if (strnstr(kcontrol->id.name, "QUIN",
  2126. sizeof(kcontrol->id.name))) {
  2127. port->mode = TDM_QUIN;
  2128. } else {
  2129. pr_err("%s: unsupported mode in: %s\n",
  2130. __func__, kcontrol->id.name);
  2131. return -EINVAL;
  2132. }
  2133. if (strnstr(kcontrol->id.name, "RX_0",
  2134. sizeof(kcontrol->id.name)) ||
  2135. strnstr(kcontrol->id.name, "TX_0",
  2136. sizeof(kcontrol->id.name))) {
  2137. port->channel = TDM_0;
  2138. } else if (strnstr(kcontrol->id.name, "RX_1",
  2139. sizeof(kcontrol->id.name)) ||
  2140. strnstr(kcontrol->id.name, "TX_1",
  2141. sizeof(kcontrol->id.name))) {
  2142. port->channel = TDM_1;
  2143. } else if (strnstr(kcontrol->id.name, "RX_2",
  2144. sizeof(kcontrol->id.name)) ||
  2145. strnstr(kcontrol->id.name, "TX_2",
  2146. sizeof(kcontrol->id.name))) {
  2147. port->channel = TDM_2;
  2148. } else if (strnstr(kcontrol->id.name, "RX_3",
  2149. sizeof(kcontrol->id.name)) ||
  2150. strnstr(kcontrol->id.name, "TX_3",
  2151. sizeof(kcontrol->id.name))) {
  2152. port->channel = TDM_3;
  2153. } else if (strnstr(kcontrol->id.name, "RX_4",
  2154. sizeof(kcontrol->id.name)) ||
  2155. strnstr(kcontrol->id.name, "TX_4",
  2156. sizeof(kcontrol->id.name))) {
  2157. port->channel = TDM_4;
  2158. } else if (strnstr(kcontrol->id.name, "RX_5",
  2159. sizeof(kcontrol->id.name)) ||
  2160. strnstr(kcontrol->id.name, "TX_5",
  2161. sizeof(kcontrol->id.name))) {
  2162. port->channel = TDM_5;
  2163. } else if (strnstr(kcontrol->id.name, "RX_6",
  2164. sizeof(kcontrol->id.name)) ||
  2165. strnstr(kcontrol->id.name, "TX_6",
  2166. sizeof(kcontrol->id.name))) {
  2167. port->channel = TDM_6;
  2168. } else if (strnstr(kcontrol->id.name, "RX_7",
  2169. sizeof(kcontrol->id.name)) ||
  2170. strnstr(kcontrol->id.name, "TX_7",
  2171. sizeof(kcontrol->id.name))) {
  2172. port->channel = TDM_7;
  2173. } else {
  2174. pr_err("%s: unsupported channel in: %s\n",
  2175. __func__, kcontrol->id.name);
  2176. return -EINVAL;
  2177. }
  2178. } else {
  2179. return -EINVAL;
  2180. }
  2181. return 0;
  2182. }
  2183. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2184. struct snd_ctl_elem_value *ucontrol)
  2185. {
  2186. struct tdm_port port;
  2187. int ret = tdm_get_port_idx(kcontrol, &port);
  2188. if (ret) {
  2189. pr_err("%s: unsupported control: %s\n",
  2190. __func__, kcontrol->id.name);
  2191. } else {
  2192. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2193. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  2194. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2195. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2196. ucontrol->value.enumerated.item[0]);
  2197. }
  2198. return ret;
  2199. }
  2200. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2201. struct snd_ctl_elem_value *ucontrol)
  2202. {
  2203. struct tdm_port port;
  2204. int ret = tdm_get_port_idx(kcontrol, &port);
  2205. if (ret) {
  2206. pr_err("%s: unsupported control: %s\n",
  2207. __func__, kcontrol->id.name);
  2208. } else {
  2209. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  2210. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2211. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2212. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2213. ucontrol->value.enumerated.item[0]);
  2214. }
  2215. return ret;
  2216. }
  2217. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2218. struct snd_ctl_elem_value *ucontrol)
  2219. {
  2220. struct tdm_port port;
  2221. int ret = tdm_get_port_idx(kcontrol, &port);
  2222. if (ret) {
  2223. pr_err("%s: unsupported control: %s\n",
  2224. __func__, kcontrol->id.name);
  2225. } else {
  2226. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2227. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  2228. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2229. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2230. ucontrol->value.enumerated.item[0]);
  2231. }
  2232. return ret;
  2233. }
  2234. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2235. struct snd_ctl_elem_value *ucontrol)
  2236. {
  2237. struct tdm_port port;
  2238. int ret = tdm_get_port_idx(kcontrol, &port);
  2239. if (ret) {
  2240. pr_err("%s: unsupported control: %s\n",
  2241. __func__, kcontrol->id.name);
  2242. } else {
  2243. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  2244. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2245. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2246. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2247. ucontrol->value.enumerated.item[0]);
  2248. }
  2249. return ret;
  2250. }
  2251. static int tdm_get_format(int value)
  2252. {
  2253. int format = 0;
  2254. switch (value) {
  2255. case 0:
  2256. format = SNDRV_PCM_FORMAT_S16_LE;
  2257. break;
  2258. case 1:
  2259. format = SNDRV_PCM_FORMAT_S24_LE;
  2260. break;
  2261. case 2:
  2262. format = SNDRV_PCM_FORMAT_S32_LE;
  2263. break;
  2264. default:
  2265. format = SNDRV_PCM_FORMAT_S16_LE;
  2266. break;
  2267. }
  2268. return format;
  2269. }
  2270. static int tdm_get_format_val(int format)
  2271. {
  2272. int value = 0;
  2273. switch (format) {
  2274. case SNDRV_PCM_FORMAT_S16_LE:
  2275. value = 0;
  2276. break;
  2277. case SNDRV_PCM_FORMAT_S24_LE:
  2278. value = 1;
  2279. break;
  2280. case SNDRV_PCM_FORMAT_S32_LE:
  2281. value = 2;
  2282. break;
  2283. default:
  2284. value = 0;
  2285. break;
  2286. }
  2287. return value;
  2288. }
  2289. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  2290. struct snd_ctl_elem_value *ucontrol)
  2291. {
  2292. struct tdm_port port;
  2293. int ret = tdm_get_port_idx(kcontrol, &port);
  2294. if (ret) {
  2295. pr_err("%s: unsupported control: %s\n",
  2296. __func__, kcontrol->id.name);
  2297. } else {
  2298. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2299. tdm_rx_cfg[port.mode][port.channel].bit_format);
  2300. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2301. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2302. ucontrol->value.enumerated.item[0]);
  2303. }
  2304. return ret;
  2305. }
  2306. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  2307. struct snd_ctl_elem_value *ucontrol)
  2308. {
  2309. struct tdm_port port;
  2310. int ret = tdm_get_port_idx(kcontrol, &port);
  2311. if (ret) {
  2312. pr_err("%s: unsupported control: %s\n",
  2313. __func__, kcontrol->id.name);
  2314. } else {
  2315. tdm_rx_cfg[port.mode][port.channel].bit_format =
  2316. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2317. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2318. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2319. ucontrol->value.enumerated.item[0]);
  2320. }
  2321. return ret;
  2322. }
  2323. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2324. struct snd_ctl_elem_value *ucontrol)
  2325. {
  2326. struct tdm_port port;
  2327. int ret = tdm_get_port_idx(kcontrol, &port);
  2328. if (ret) {
  2329. pr_err("%s: unsupported control: %s\n",
  2330. __func__, kcontrol->id.name);
  2331. } else {
  2332. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2333. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2334. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2335. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2336. ucontrol->value.enumerated.item[0]);
  2337. }
  2338. return ret;
  2339. }
  2340. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2341. struct snd_ctl_elem_value *ucontrol)
  2342. {
  2343. struct tdm_port port;
  2344. int ret = tdm_get_port_idx(kcontrol, &port);
  2345. if (ret) {
  2346. pr_err("%s: unsupported control: %s\n",
  2347. __func__, kcontrol->id.name);
  2348. } else {
  2349. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2350. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2351. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2352. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2353. ucontrol->value.enumerated.item[0]);
  2354. }
  2355. return ret;
  2356. }
  2357. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2358. struct snd_ctl_elem_value *ucontrol)
  2359. {
  2360. struct tdm_port port;
  2361. int ret = tdm_get_port_idx(kcontrol, &port);
  2362. if (ret) {
  2363. pr_err("%s: unsupported control: %s\n",
  2364. __func__, kcontrol->id.name);
  2365. } else {
  2366. ucontrol->value.enumerated.item[0] =
  2367. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2368. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2369. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2370. ucontrol->value.enumerated.item[0]);
  2371. }
  2372. return ret;
  2373. }
  2374. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2375. struct snd_ctl_elem_value *ucontrol)
  2376. {
  2377. struct tdm_port port;
  2378. int ret = tdm_get_port_idx(kcontrol, &port);
  2379. if (ret) {
  2380. pr_err("%s: unsupported control: %s\n",
  2381. __func__, kcontrol->id.name);
  2382. } else {
  2383. tdm_rx_cfg[port.mode][port.channel].channels =
  2384. ucontrol->value.enumerated.item[0] + 1;
  2385. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2386. tdm_rx_cfg[port.mode][port.channel].channels,
  2387. ucontrol->value.enumerated.item[0] + 1);
  2388. }
  2389. return ret;
  2390. }
  2391. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2392. struct snd_ctl_elem_value *ucontrol)
  2393. {
  2394. struct tdm_port port;
  2395. int ret = tdm_get_port_idx(kcontrol, &port);
  2396. if (ret) {
  2397. pr_err("%s: unsupported control: %s\n",
  2398. __func__, kcontrol->id.name);
  2399. } else {
  2400. ucontrol->value.enumerated.item[0] =
  2401. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2402. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2403. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2404. ucontrol->value.enumerated.item[0]);
  2405. }
  2406. return ret;
  2407. }
  2408. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2409. struct snd_ctl_elem_value *ucontrol)
  2410. {
  2411. struct tdm_port port;
  2412. int ret = tdm_get_port_idx(kcontrol, &port);
  2413. if (ret) {
  2414. pr_err("%s: unsupported control: %s\n",
  2415. __func__, kcontrol->id.name);
  2416. } else {
  2417. tdm_tx_cfg[port.mode][port.channel].channels =
  2418. ucontrol->value.enumerated.item[0] + 1;
  2419. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2420. tdm_tx_cfg[port.mode][port.channel].channels,
  2421. ucontrol->value.enumerated.item[0] + 1);
  2422. }
  2423. return ret;
  2424. }
  2425. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2426. {
  2427. int idx;
  2428. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2429. sizeof("PRIM_AUX_PCM"))) {
  2430. idx = PRIM_AUX_PCM;
  2431. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2432. sizeof("SEC_AUX_PCM"))) {
  2433. idx = SEC_AUX_PCM;
  2434. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2435. sizeof("TERT_AUX_PCM"))) {
  2436. idx = TERT_AUX_PCM;
  2437. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2438. sizeof("QUAT_AUX_PCM"))) {
  2439. idx = QUAT_AUX_PCM;
  2440. } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2441. sizeof("QUIN_AUX_PCM"))) {
  2442. idx = QUIN_AUX_PCM;
  2443. } else {
  2444. pr_err("%s: unsupported port: %s\n",
  2445. __func__, kcontrol->id.name);
  2446. idx = -EINVAL;
  2447. }
  2448. return idx;
  2449. }
  2450. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2451. struct snd_ctl_elem_value *ucontrol)
  2452. {
  2453. int idx = aux_pcm_get_port_idx(kcontrol);
  2454. if (idx < 0)
  2455. return idx;
  2456. aux_pcm_rx_cfg[idx].sample_rate =
  2457. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2458. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2459. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2460. ucontrol->value.enumerated.item[0]);
  2461. return 0;
  2462. }
  2463. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2464. struct snd_ctl_elem_value *ucontrol)
  2465. {
  2466. int idx = aux_pcm_get_port_idx(kcontrol);
  2467. if (idx < 0)
  2468. return idx;
  2469. ucontrol->value.enumerated.item[0] =
  2470. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2471. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2472. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2473. ucontrol->value.enumerated.item[0]);
  2474. return 0;
  2475. }
  2476. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2477. struct snd_ctl_elem_value *ucontrol)
  2478. {
  2479. int idx = aux_pcm_get_port_idx(kcontrol);
  2480. if (idx < 0)
  2481. return idx;
  2482. aux_pcm_tx_cfg[idx].sample_rate =
  2483. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2484. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2485. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2486. ucontrol->value.enumerated.item[0]);
  2487. return 0;
  2488. }
  2489. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2490. struct snd_ctl_elem_value *ucontrol)
  2491. {
  2492. int idx = aux_pcm_get_port_idx(kcontrol);
  2493. if (idx < 0)
  2494. return idx;
  2495. ucontrol->value.enumerated.item[0] =
  2496. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2497. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2498. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2499. ucontrol->value.enumerated.item[0]);
  2500. return 0;
  2501. }
  2502. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2503. {
  2504. int idx;
  2505. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2506. sizeof("PRIM_MI2S_RX"))) {
  2507. idx = PRIM_MI2S;
  2508. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2509. sizeof("SEC_MI2S_RX"))) {
  2510. idx = SEC_MI2S;
  2511. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2512. sizeof("TERT_MI2S_RX"))) {
  2513. idx = TERT_MI2S;
  2514. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2515. sizeof("QUAT_MI2S_RX"))) {
  2516. idx = QUAT_MI2S;
  2517. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2518. sizeof("QUIN_MI2S_RX"))) {
  2519. idx = QUIN_MI2S;
  2520. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2521. sizeof("PRIM_MI2S_TX"))) {
  2522. idx = PRIM_MI2S;
  2523. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2524. sizeof("SEC_MI2S_TX"))) {
  2525. idx = SEC_MI2S;
  2526. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2527. sizeof("TERT_MI2S_TX"))) {
  2528. idx = TERT_MI2S;
  2529. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2530. sizeof("QUAT_MI2S_TX"))) {
  2531. idx = QUAT_MI2S;
  2532. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2533. sizeof("QUIN_MI2S_TX"))) {
  2534. idx = QUIN_MI2S;
  2535. } else {
  2536. pr_err("%s: unsupported channel: %s\n",
  2537. __func__, kcontrol->id.name);
  2538. idx = -EINVAL;
  2539. }
  2540. return idx;
  2541. }
  2542. static int mi2s_get_sample_rate_val(int sample_rate)
  2543. {
  2544. int sample_rate_val;
  2545. switch (sample_rate) {
  2546. case SAMPLING_RATE_8KHZ:
  2547. sample_rate_val = 0;
  2548. break;
  2549. case SAMPLING_RATE_11P025KHZ:
  2550. sample_rate_val = 1;
  2551. break;
  2552. case SAMPLING_RATE_16KHZ:
  2553. sample_rate_val = 2;
  2554. break;
  2555. case SAMPLING_RATE_22P05KHZ:
  2556. sample_rate_val = 3;
  2557. break;
  2558. case SAMPLING_RATE_32KHZ:
  2559. sample_rate_val = 4;
  2560. break;
  2561. case SAMPLING_RATE_44P1KHZ:
  2562. sample_rate_val = 5;
  2563. break;
  2564. case SAMPLING_RATE_48KHZ:
  2565. sample_rate_val = 6;
  2566. break;
  2567. case SAMPLING_RATE_96KHZ:
  2568. sample_rate_val = 7;
  2569. break;
  2570. case SAMPLING_RATE_192KHZ:
  2571. sample_rate_val = 8;
  2572. break;
  2573. default:
  2574. sample_rate_val = 6;
  2575. break;
  2576. }
  2577. return sample_rate_val;
  2578. }
  2579. static int mi2s_get_sample_rate(int value)
  2580. {
  2581. int sample_rate;
  2582. switch (value) {
  2583. case 0:
  2584. sample_rate = SAMPLING_RATE_8KHZ;
  2585. break;
  2586. case 1:
  2587. sample_rate = SAMPLING_RATE_11P025KHZ;
  2588. break;
  2589. case 2:
  2590. sample_rate = SAMPLING_RATE_16KHZ;
  2591. break;
  2592. case 3:
  2593. sample_rate = SAMPLING_RATE_22P05KHZ;
  2594. break;
  2595. case 4:
  2596. sample_rate = SAMPLING_RATE_32KHZ;
  2597. break;
  2598. case 5:
  2599. sample_rate = SAMPLING_RATE_44P1KHZ;
  2600. break;
  2601. case 6:
  2602. sample_rate = SAMPLING_RATE_48KHZ;
  2603. break;
  2604. case 7:
  2605. sample_rate = SAMPLING_RATE_96KHZ;
  2606. break;
  2607. case 8:
  2608. sample_rate = SAMPLING_RATE_192KHZ;
  2609. break;
  2610. default:
  2611. sample_rate = SAMPLING_RATE_48KHZ;
  2612. break;
  2613. }
  2614. return sample_rate;
  2615. }
  2616. static int mi2s_auxpcm_get_format(int value)
  2617. {
  2618. int format;
  2619. switch (value) {
  2620. case 0:
  2621. format = SNDRV_PCM_FORMAT_S16_LE;
  2622. break;
  2623. case 1:
  2624. format = SNDRV_PCM_FORMAT_S24_LE;
  2625. break;
  2626. case 2:
  2627. format = SNDRV_PCM_FORMAT_S24_3LE;
  2628. break;
  2629. case 3:
  2630. format = SNDRV_PCM_FORMAT_S32_LE;
  2631. break;
  2632. default:
  2633. format = SNDRV_PCM_FORMAT_S16_LE;
  2634. break;
  2635. }
  2636. return format;
  2637. }
  2638. static int mi2s_auxpcm_get_format_value(int format)
  2639. {
  2640. int value;
  2641. switch (format) {
  2642. case SNDRV_PCM_FORMAT_S16_LE:
  2643. value = 0;
  2644. break;
  2645. case SNDRV_PCM_FORMAT_S24_LE:
  2646. value = 1;
  2647. break;
  2648. case SNDRV_PCM_FORMAT_S24_3LE:
  2649. value = 2;
  2650. break;
  2651. case SNDRV_PCM_FORMAT_S32_LE:
  2652. value = 3;
  2653. break;
  2654. default:
  2655. value = 0;
  2656. break;
  2657. }
  2658. return value;
  2659. }
  2660. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2661. struct snd_ctl_elem_value *ucontrol)
  2662. {
  2663. int idx = mi2s_get_port_idx(kcontrol);
  2664. if (idx < 0)
  2665. return idx;
  2666. mi2s_rx_cfg[idx].sample_rate =
  2667. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2668. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2669. idx, mi2s_rx_cfg[idx].sample_rate,
  2670. ucontrol->value.enumerated.item[0]);
  2671. return 0;
  2672. }
  2673. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2674. struct snd_ctl_elem_value *ucontrol)
  2675. {
  2676. int idx = mi2s_get_port_idx(kcontrol);
  2677. if (idx < 0)
  2678. return idx;
  2679. ucontrol->value.enumerated.item[0] =
  2680. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2681. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2682. idx, mi2s_rx_cfg[idx].sample_rate,
  2683. ucontrol->value.enumerated.item[0]);
  2684. return 0;
  2685. }
  2686. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2687. struct snd_ctl_elem_value *ucontrol)
  2688. {
  2689. int idx = mi2s_get_port_idx(kcontrol);
  2690. if (idx < 0)
  2691. return idx;
  2692. mi2s_tx_cfg[idx].sample_rate =
  2693. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2694. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2695. idx, mi2s_tx_cfg[idx].sample_rate,
  2696. ucontrol->value.enumerated.item[0]);
  2697. return 0;
  2698. }
  2699. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2700. struct snd_ctl_elem_value *ucontrol)
  2701. {
  2702. int idx = mi2s_get_port_idx(kcontrol);
  2703. if (idx < 0)
  2704. return idx;
  2705. ucontrol->value.enumerated.item[0] =
  2706. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2707. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2708. idx, mi2s_tx_cfg[idx].sample_rate,
  2709. ucontrol->value.enumerated.item[0]);
  2710. return 0;
  2711. }
  2712. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2713. struct snd_ctl_elem_value *ucontrol)
  2714. {
  2715. int idx = mi2s_get_port_idx(kcontrol);
  2716. if (idx < 0)
  2717. return idx;
  2718. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2719. idx, mi2s_rx_cfg[idx].channels);
  2720. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2721. return 0;
  2722. }
  2723. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2724. struct snd_ctl_elem_value *ucontrol)
  2725. {
  2726. int idx = mi2s_get_port_idx(kcontrol);
  2727. if (idx < 0)
  2728. return idx;
  2729. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2730. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2731. idx, mi2s_rx_cfg[idx].channels);
  2732. return 1;
  2733. }
  2734. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2735. struct snd_ctl_elem_value *ucontrol)
  2736. {
  2737. int idx = mi2s_get_port_idx(kcontrol);
  2738. if (idx < 0)
  2739. return idx;
  2740. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2741. idx, mi2s_tx_cfg[idx].channels);
  2742. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2743. return 0;
  2744. }
  2745. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2746. struct snd_ctl_elem_value *ucontrol)
  2747. {
  2748. int idx = mi2s_get_port_idx(kcontrol);
  2749. if (idx < 0)
  2750. return idx;
  2751. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2752. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2753. idx, mi2s_tx_cfg[idx].channels);
  2754. return 1;
  2755. }
  2756. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2757. struct snd_ctl_elem_value *ucontrol)
  2758. {
  2759. int idx = mi2s_get_port_idx(kcontrol);
  2760. if (idx < 0)
  2761. return idx;
  2762. ucontrol->value.enumerated.item[0] =
  2763. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2764. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2765. idx, mi2s_rx_cfg[idx].bit_format,
  2766. ucontrol->value.enumerated.item[0]);
  2767. return 0;
  2768. }
  2769. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2770. struct snd_ctl_elem_value *ucontrol)
  2771. {
  2772. int idx = mi2s_get_port_idx(kcontrol);
  2773. if (idx < 0)
  2774. return idx;
  2775. mi2s_rx_cfg[idx].bit_format =
  2776. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2777. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2778. idx, mi2s_rx_cfg[idx].bit_format,
  2779. ucontrol->value.enumerated.item[0]);
  2780. return 0;
  2781. }
  2782. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2783. struct snd_ctl_elem_value *ucontrol)
  2784. {
  2785. int idx = mi2s_get_port_idx(kcontrol);
  2786. if (idx < 0)
  2787. return idx;
  2788. ucontrol->value.enumerated.item[0] =
  2789. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2790. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2791. idx, mi2s_tx_cfg[idx].bit_format,
  2792. ucontrol->value.enumerated.item[0]);
  2793. return 0;
  2794. }
  2795. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2796. struct snd_ctl_elem_value *ucontrol)
  2797. {
  2798. int idx = mi2s_get_port_idx(kcontrol);
  2799. if (idx < 0)
  2800. return idx;
  2801. mi2s_tx_cfg[idx].bit_format =
  2802. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2803. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2804. idx, mi2s_tx_cfg[idx].bit_format,
  2805. ucontrol->value.enumerated.item[0]);
  2806. return 0;
  2807. }
  2808. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2809. struct snd_ctl_elem_value *ucontrol)
  2810. {
  2811. int idx = aux_pcm_get_port_idx(kcontrol);
  2812. if (idx < 0)
  2813. return idx;
  2814. ucontrol->value.enumerated.item[0] =
  2815. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2816. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2817. idx, aux_pcm_rx_cfg[idx].bit_format,
  2818. ucontrol->value.enumerated.item[0]);
  2819. return 0;
  2820. }
  2821. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2822. struct snd_ctl_elem_value *ucontrol)
  2823. {
  2824. int idx = aux_pcm_get_port_idx(kcontrol);
  2825. if (idx < 0)
  2826. return idx;
  2827. aux_pcm_rx_cfg[idx].bit_format =
  2828. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2829. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2830. idx, aux_pcm_rx_cfg[idx].bit_format,
  2831. ucontrol->value.enumerated.item[0]);
  2832. return 0;
  2833. }
  2834. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2835. struct snd_ctl_elem_value *ucontrol)
  2836. {
  2837. int idx = aux_pcm_get_port_idx(kcontrol);
  2838. if (idx < 0)
  2839. return idx;
  2840. ucontrol->value.enumerated.item[0] =
  2841. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2842. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2843. idx, aux_pcm_tx_cfg[idx].bit_format,
  2844. ucontrol->value.enumerated.item[0]);
  2845. return 0;
  2846. }
  2847. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2848. struct snd_ctl_elem_value *ucontrol)
  2849. {
  2850. int idx = aux_pcm_get_port_idx(kcontrol);
  2851. if (idx < 0)
  2852. return idx;
  2853. aux_pcm_tx_cfg[idx].bit_format =
  2854. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2855. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2856. idx, aux_pcm_tx_cfg[idx].bit_format,
  2857. ucontrol->value.enumerated.item[0]);
  2858. return 0;
  2859. }
  2860. static int msm_hifi_ctrl(struct snd_soc_codec *codec)
  2861. {
  2862. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  2863. struct snd_soc_card *card = codec->component.card;
  2864. struct msm_asoc_mach_data *pdata =
  2865. snd_soc_card_get_drvdata(card);
  2866. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
  2867. msm_hifi_control);
  2868. if (!pdata || !pdata->hph_en1_gpio_p) {
  2869. dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
  2870. return -EINVAL;
  2871. }
  2872. if (msm_hifi_control == MSM_HIFI_ON) {
  2873. msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
  2874. /* 5msec delay needed as per HW requirement */
  2875. usleep_range(5000, 5010);
  2876. } else {
  2877. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
  2878. }
  2879. snd_soc_dapm_sync(dapm);
  2880. return 0;
  2881. }
  2882. static int msm_hifi_get(struct snd_kcontrol *kcontrol,
  2883. struct snd_ctl_elem_value *ucontrol)
  2884. {
  2885. pr_debug("%s: msm_hifi_control = %d\n",
  2886. __func__, msm_hifi_control);
  2887. ucontrol->value.integer.value[0] = msm_hifi_control;
  2888. return 0;
  2889. }
  2890. static int msm_hifi_put(struct snd_kcontrol *kcontrol,
  2891. struct snd_ctl_elem_value *ucontrol)
  2892. {
  2893. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  2894. dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  2895. __func__, ucontrol->value.integer.value[0]);
  2896. msm_hifi_control = ucontrol->value.integer.value[0];
  2897. msm_hifi_ctrl(codec);
  2898. return 0;
  2899. }
  2900. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  2901. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  2902. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2903. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  2904. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2905. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  2906. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2907. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  2908. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2909. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  2910. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2911. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  2912. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2913. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  2914. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  2915. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  2916. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2917. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  2918. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2919. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  2920. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2921. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  2922. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2923. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  2924. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2925. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  2926. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  2927. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  2928. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2929. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  2930. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2931. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  2932. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2933. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  2934. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2935. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  2936. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2937. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  2938. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2939. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  2940. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  2941. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  2942. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2943. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  2944. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2945. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  2946. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2947. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  2948. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2949. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  2950. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  2951. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  2952. wsa_cdc_dma_rx_0_sample_rate,
  2953. cdc_dma_rx_sample_rate_get,
  2954. cdc_dma_rx_sample_rate_put),
  2955. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  2956. wsa_cdc_dma_rx_1_sample_rate,
  2957. cdc_dma_rx_sample_rate_get,
  2958. cdc_dma_rx_sample_rate_put),
  2959. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  2960. rx_cdc_dma_rx_0_sample_rate,
  2961. cdc_dma_rx_sample_rate_get,
  2962. cdc_dma_rx_sample_rate_put),
  2963. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  2964. rx_cdc_dma_rx_1_sample_rate,
  2965. cdc_dma_rx_sample_rate_get,
  2966. cdc_dma_rx_sample_rate_put),
  2967. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  2968. rx_cdc_dma_rx_2_sample_rate,
  2969. cdc_dma_rx_sample_rate_get,
  2970. cdc_dma_rx_sample_rate_put),
  2971. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  2972. rx_cdc_dma_rx_3_sample_rate,
  2973. cdc_dma_rx_sample_rate_get,
  2974. cdc_dma_rx_sample_rate_put),
  2975. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  2976. rx_cdc_dma_rx_5_sample_rate,
  2977. cdc_dma_rx_sample_rate_get,
  2978. cdc_dma_rx_sample_rate_put),
  2979. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  2980. wsa_cdc_dma_tx_0_sample_rate,
  2981. cdc_dma_tx_sample_rate_get,
  2982. cdc_dma_tx_sample_rate_put),
  2983. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  2984. wsa_cdc_dma_tx_1_sample_rate,
  2985. cdc_dma_tx_sample_rate_get,
  2986. cdc_dma_tx_sample_rate_put),
  2987. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  2988. wsa_cdc_dma_tx_2_sample_rate,
  2989. cdc_dma_tx_sample_rate_get,
  2990. cdc_dma_tx_sample_rate_put),
  2991. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  2992. tx_cdc_dma_tx_0_sample_rate,
  2993. cdc_dma_tx_sample_rate_get,
  2994. cdc_dma_tx_sample_rate_put),
  2995. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  2996. tx_cdc_dma_tx_3_sample_rate,
  2997. cdc_dma_tx_sample_rate_get,
  2998. cdc_dma_tx_sample_rate_put),
  2999. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  3000. tx_cdc_dma_tx_4_sample_rate,
  3001. cdc_dma_tx_sample_rate_get,
  3002. cdc_dma_tx_sample_rate_put),
  3003. };
  3004. static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
  3005. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  3006. slim_rx_ch_get, slim_rx_ch_put),
  3007. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  3008. slim_rx_ch_get, slim_rx_ch_put),
  3009. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  3010. slim_tx_ch_get, slim_tx_ch_put),
  3011. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  3012. slim_tx_ch_get, slim_tx_ch_put),
  3013. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  3014. slim_rx_ch_get, slim_rx_ch_put),
  3015. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  3016. slim_rx_ch_get, slim_rx_ch_put),
  3017. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  3018. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3019. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  3020. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3021. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  3022. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3023. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  3024. slim_tx_bit_format_get, slim_tx_bit_format_put),
  3025. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  3026. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3027. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  3028. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3029. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  3030. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  3031. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  3032. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3033. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  3034. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3035. };
  3036. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  3037. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  3038. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  3039. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  3040. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  3041. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  3042. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  3043. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  3044. proxy_rx_ch_get, proxy_rx_ch_put),
  3045. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  3046. usb_audio_rx_format_get, usb_audio_rx_format_put),
  3047. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  3048. usb_audio_tx_format_get, usb_audio_tx_format_put),
  3049. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  3050. ext_disp_rx_format_get, ext_disp_rx_format_put),
  3051. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  3052. usb_audio_rx_sample_rate_get,
  3053. usb_audio_rx_sample_rate_put),
  3054. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  3055. usb_audio_tx_sample_rate_get,
  3056. usb_audio_tx_sample_rate_put),
  3057. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  3058. ext_disp_rx_sample_rate_get,
  3059. ext_disp_rx_sample_rate_put),
  3060. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3061. tdm_rx_sample_rate_get,
  3062. tdm_rx_sample_rate_put),
  3063. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3064. tdm_tx_sample_rate_get,
  3065. tdm_tx_sample_rate_put),
  3066. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  3067. tdm_rx_format_get,
  3068. tdm_rx_format_put),
  3069. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  3070. tdm_tx_format_get,
  3071. tdm_tx_format_put),
  3072. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  3073. tdm_rx_ch_get,
  3074. tdm_rx_ch_put),
  3075. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  3076. tdm_tx_ch_get,
  3077. tdm_tx_ch_put),
  3078. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3079. tdm_rx_sample_rate_get,
  3080. tdm_rx_sample_rate_put),
  3081. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3082. tdm_tx_sample_rate_get,
  3083. tdm_tx_sample_rate_put),
  3084. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  3085. tdm_rx_format_get,
  3086. tdm_rx_format_put),
  3087. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  3088. tdm_tx_format_get,
  3089. tdm_tx_format_put),
  3090. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  3091. tdm_rx_ch_get,
  3092. tdm_rx_ch_put),
  3093. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  3094. tdm_tx_ch_get,
  3095. tdm_tx_ch_put),
  3096. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3097. tdm_rx_sample_rate_get,
  3098. tdm_rx_sample_rate_put),
  3099. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3100. tdm_tx_sample_rate_get,
  3101. tdm_tx_sample_rate_put),
  3102. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  3103. tdm_rx_format_get,
  3104. tdm_rx_format_put),
  3105. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  3106. tdm_tx_format_get,
  3107. tdm_tx_format_put),
  3108. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  3109. tdm_rx_ch_get,
  3110. tdm_rx_ch_put),
  3111. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  3112. tdm_tx_ch_get,
  3113. tdm_tx_ch_put),
  3114. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3115. tdm_rx_sample_rate_get,
  3116. tdm_rx_sample_rate_put),
  3117. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3118. tdm_tx_sample_rate_get,
  3119. tdm_tx_sample_rate_put),
  3120. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  3121. tdm_rx_format_get,
  3122. tdm_rx_format_put),
  3123. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  3124. tdm_tx_format_get,
  3125. tdm_tx_format_put),
  3126. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  3127. tdm_rx_ch_get,
  3128. tdm_rx_ch_put),
  3129. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  3130. tdm_tx_ch_get,
  3131. tdm_tx_ch_put),
  3132. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3133. tdm_rx_sample_rate_get,
  3134. tdm_rx_sample_rate_put),
  3135. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3136. tdm_tx_sample_rate_get,
  3137. tdm_tx_sample_rate_put),
  3138. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  3139. tdm_rx_format_get,
  3140. tdm_rx_format_put),
  3141. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  3142. tdm_tx_format_get,
  3143. tdm_tx_format_put),
  3144. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  3145. tdm_rx_ch_get,
  3146. tdm_rx_ch_put),
  3147. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  3148. tdm_tx_ch_get,
  3149. tdm_tx_ch_put),
  3150. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3151. aux_pcm_rx_sample_rate_get,
  3152. aux_pcm_rx_sample_rate_put),
  3153. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  3154. aux_pcm_rx_sample_rate_get,
  3155. aux_pcm_rx_sample_rate_put),
  3156. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  3157. aux_pcm_rx_sample_rate_get,
  3158. aux_pcm_rx_sample_rate_put),
  3159. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  3160. aux_pcm_rx_sample_rate_get,
  3161. aux_pcm_rx_sample_rate_put),
  3162. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  3163. aux_pcm_rx_sample_rate_get,
  3164. aux_pcm_rx_sample_rate_put),
  3165. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3166. aux_pcm_tx_sample_rate_get,
  3167. aux_pcm_tx_sample_rate_put),
  3168. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  3169. aux_pcm_tx_sample_rate_get,
  3170. aux_pcm_tx_sample_rate_put),
  3171. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  3172. aux_pcm_tx_sample_rate_get,
  3173. aux_pcm_tx_sample_rate_put),
  3174. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  3175. aux_pcm_tx_sample_rate_get,
  3176. aux_pcm_tx_sample_rate_put),
  3177. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  3178. aux_pcm_tx_sample_rate_get,
  3179. aux_pcm_tx_sample_rate_put),
  3180. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  3181. mi2s_rx_sample_rate_get,
  3182. mi2s_rx_sample_rate_put),
  3183. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  3184. mi2s_rx_sample_rate_get,
  3185. mi2s_rx_sample_rate_put),
  3186. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  3187. mi2s_rx_sample_rate_get,
  3188. mi2s_rx_sample_rate_put),
  3189. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  3190. mi2s_rx_sample_rate_get,
  3191. mi2s_rx_sample_rate_put),
  3192. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  3193. mi2s_rx_sample_rate_get,
  3194. mi2s_rx_sample_rate_put),
  3195. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  3196. mi2s_tx_sample_rate_get,
  3197. mi2s_tx_sample_rate_put),
  3198. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  3199. mi2s_tx_sample_rate_get,
  3200. mi2s_tx_sample_rate_put),
  3201. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  3202. mi2s_tx_sample_rate_get,
  3203. mi2s_tx_sample_rate_put),
  3204. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  3205. mi2s_tx_sample_rate_get,
  3206. mi2s_tx_sample_rate_put),
  3207. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  3208. mi2s_tx_sample_rate_get,
  3209. mi2s_tx_sample_rate_put),
  3210. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  3211. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3212. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  3213. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3214. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  3215. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3216. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  3217. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3218. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  3219. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3220. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  3221. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3222. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  3223. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3224. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  3225. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3226. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  3227. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3228. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  3229. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3230. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  3231. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3232. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  3233. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3234. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  3235. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3236. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  3237. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3238. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  3239. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3240. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  3241. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3242. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  3243. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3244. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  3245. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3246. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  3247. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3248. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  3249. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3250. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3251. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3252. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3253. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3254. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  3255. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3256. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  3257. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3258. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3259. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3260. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3261. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3262. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3263. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3264. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3265. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3266. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  3267. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3268. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  3269. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3270. SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
  3271. msm_hifi_put),
  3272. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  3273. msm_bt_sample_rate_get,
  3274. msm_bt_sample_rate_put),
  3275. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  3276. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  3277. };
  3278. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  3279. int enable, bool dapm)
  3280. {
  3281. int ret = 0;
  3282. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3283. ret = tavil_cdc_mclk_enable(codec, enable);
  3284. } else {
  3285. dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
  3286. __func__);
  3287. ret = -EINVAL;
  3288. }
  3289. return ret;
  3290. }
  3291. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
  3292. int enable, bool dapm)
  3293. {
  3294. int ret = 0;
  3295. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3296. ret = tavil_cdc_mclk_tx_enable(codec, enable);
  3297. } else {
  3298. dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
  3299. __func__);
  3300. ret = -EINVAL;
  3301. }
  3302. return ret;
  3303. }
  3304. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  3305. struct snd_kcontrol *kcontrol, int event)
  3306. {
  3307. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3308. pr_debug("%s: event = %d\n", __func__, event);
  3309. switch (event) {
  3310. case SND_SOC_DAPM_PRE_PMU:
  3311. return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
  3312. case SND_SOC_DAPM_POST_PMD:
  3313. return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
  3314. }
  3315. return 0;
  3316. }
  3317. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  3318. struct snd_kcontrol *kcontrol, int event)
  3319. {
  3320. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3321. pr_debug("%s: event = %d\n", __func__, event);
  3322. switch (event) {
  3323. case SND_SOC_DAPM_PRE_PMU:
  3324. return msm_snd_enable_codec_ext_clk(codec, 1, true);
  3325. case SND_SOC_DAPM_POST_PMD:
  3326. return msm_snd_enable_codec_ext_clk(codec, 0, true);
  3327. }
  3328. return 0;
  3329. }
  3330. static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
  3331. struct snd_kcontrol *k, int event)
  3332. {
  3333. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3334. struct snd_soc_card *card = codec->component.card;
  3335. struct msm_asoc_mach_data *pdata =
  3336. snd_soc_card_get_drvdata(card);
  3337. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
  3338. __func__, msm_hifi_control);
  3339. if (!pdata || !pdata->hph_en0_gpio_p) {
  3340. dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
  3341. return -EINVAL;
  3342. }
  3343. if (msm_hifi_control != MSM_HIFI_ON) {
  3344. dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
  3345. __func__);
  3346. return 0;
  3347. }
  3348. switch (event) {
  3349. case SND_SOC_DAPM_POST_PMU:
  3350. msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
  3351. break;
  3352. case SND_SOC_DAPM_PRE_PMD:
  3353. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
  3354. break;
  3355. }
  3356. return 0;
  3357. }
  3358. static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
  3359. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  3360. msm_mclk_event,
  3361. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3362. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  3363. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3364. SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
  3365. SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
  3366. SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
  3367. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  3368. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  3369. SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
  3370. SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
  3371. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3372. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  3373. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  3374. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  3375. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  3376. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  3377. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  3378. };
  3379. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3380. struct snd_kcontrol *kcontrol, int event)
  3381. {
  3382. struct msm_asoc_mach_data *pdata = NULL;
  3383. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3384. int ret = 0;
  3385. u32 dmic_idx;
  3386. int *dmic_gpio_cnt;
  3387. struct device_node *dmic_gpio;
  3388. char *wname;
  3389. wname = strpbrk(w->name, "0123");
  3390. if (!wname) {
  3391. dev_err(codec->dev, "%s: widget not found\n", __func__);
  3392. return -EINVAL;
  3393. }
  3394. ret = kstrtouint(wname, 10, &dmic_idx);
  3395. if (ret < 0) {
  3396. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  3397. __func__);
  3398. return -EINVAL;
  3399. }
  3400. pdata = snd_soc_card_get_drvdata(codec->component.card);
  3401. switch (dmic_idx) {
  3402. case 0:
  3403. case 1:
  3404. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3405. dmic_gpio = pdata->dmic01_gpio_p;
  3406. break;
  3407. case 2:
  3408. case 3:
  3409. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3410. dmic_gpio = pdata->dmic23_gpio_p;
  3411. break;
  3412. default:
  3413. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  3414. __func__);
  3415. return -EINVAL;
  3416. }
  3417. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3418. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3419. switch (event) {
  3420. case SND_SOC_DAPM_PRE_PMU:
  3421. (*dmic_gpio_cnt)++;
  3422. if (*dmic_gpio_cnt == 1) {
  3423. ret = msm_cdc_pinctrl_select_active_state(
  3424. dmic_gpio);
  3425. if (ret < 0) {
  3426. pr_err("%s: gpio set cannot be activated %sd",
  3427. __func__, "dmic_gpio");
  3428. return ret;
  3429. }
  3430. }
  3431. break;
  3432. case SND_SOC_DAPM_POST_PMD:
  3433. (*dmic_gpio_cnt)--;
  3434. if (*dmic_gpio_cnt == 0) {
  3435. ret = msm_cdc_pinctrl_select_sleep_state(
  3436. dmic_gpio);
  3437. if (ret < 0) {
  3438. pr_err("%s: gpio set cannot be de-activated %sd",
  3439. __func__, "dmic_gpio");
  3440. return ret;
  3441. }
  3442. }
  3443. break;
  3444. default:
  3445. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3446. return -EINVAL;
  3447. }
  3448. return 0;
  3449. }
  3450. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3451. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3452. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3453. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3454. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3455. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3456. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3457. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3458. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3459. };
  3460. static inline int param_is_mask(int p)
  3461. {
  3462. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3463. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3464. }
  3465. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3466. int n)
  3467. {
  3468. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3469. }
  3470. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3471. unsigned int bit)
  3472. {
  3473. if (bit >= SNDRV_MASK_MAX)
  3474. return;
  3475. if (param_is_mask(n)) {
  3476. struct snd_mask *m = param_to_mask(p, n);
  3477. m->bits[0] = 0;
  3478. m->bits[1] = 0;
  3479. m->bits[bit >> 5] |= (1 << (bit & 31));
  3480. }
  3481. }
  3482. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3483. {
  3484. int ch_id = 0;
  3485. switch (be_id) {
  3486. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3487. ch_id = SLIM_RX_0;
  3488. break;
  3489. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3490. ch_id = SLIM_RX_1;
  3491. break;
  3492. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3493. ch_id = SLIM_RX_2;
  3494. break;
  3495. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3496. ch_id = SLIM_RX_3;
  3497. break;
  3498. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3499. ch_id = SLIM_RX_4;
  3500. break;
  3501. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3502. ch_id = SLIM_RX_6;
  3503. break;
  3504. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3505. ch_id = SLIM_TX_0;
  3506. break;
  3507. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3508. ch_id = SLIM_TX_3;
  3509. break;
  3510. default:
  3511. ch_id = SLIM_RX_0;
  3512. break;
  3513. }
  3514. return ch_id;
  3515. }
  3516. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3517. {
  3518. int idx = 0;
  3519. switch (be_id) {
  3520. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3521. idx = WSA_CDC_DMA_RX_0;
  3522. break;
  3523. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3524. idx = WSA_CDC_DMA_TX_0;
  3525. break;
  3526. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3527. idx = WSA_CDC_DMA_RX_1;
  3528. break;
  3529. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3530. idx = WSA_CDC_DMA_TX_1;
  3531. break;
  3532. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3533. idx = WSA_CDC_DMA_TX_2;
  3534. break;
  3535. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3536. idx = RX_CDC_DMA_RX_0;
  3537. break;
  3538. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3539. idx = RX_CDC_DMA_RX_1;
  3540. break;
  3541. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3542. idx = RX_CDC_DMA_RX_2;
  3543. break;
  3544. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3545. idx = RX_CDC_DMA_RX_3;
  3546. break;
  3547. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3548. idx = RX_CDC_DMA_RX_5;
  3549. break;
  3550. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3551. idx = TX_CDC_DMA_TX_0;
  3552. break;
  3553. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3554. idx = TX_CDC_DMA_TX_3;
  3555. break;
  3556. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3557. idx = TX_CDC_DMA_TX_4;
  3558. break;
  3559. default:
  3560. idx = RX_CDC_DMA_RX_0;
  3561. break;
  3562. }
  3563. return idx;
  3564. }
  3565. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3566. {
  3567. int idx = -EINVAL;
  3568. switch (be_id) {
  3569. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3570. idx = DP_RX_IDX;
  3571. break;
  3572. default:
  3573. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3574. idx = -EINVAL;
  3575. break;
  3576. }
  3577. return idx;
  3578. }
  3579. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3580. struct snd_pcm_hw_params *params)
  3581. {
  3582. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3583. struct snd_interval *rate = hw_param_interval(params,
  3584. SNDRV_PCM_HW_PARAM_RATE);
  3585. struct snd_interval *channels = hw_param_interval(params,
  3586. SNDRV_PCM_HW_PARAM_CHANNELS);
  3587. int rc = 0;
  3588. int idx;
  3589. void *config = NULL;
  3590. struct snd_soc_codec *codec = NULL;
  3591. pr_debug("%s: format = %d, rate = %d\n",
  3592. __func__, params_format(params), params_rate(params));
  3593. switch (dai_link->id) {
  3594. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3595. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3596. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3597. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3598. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3599. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3600. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3601. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3602. slim_rx_cfg[idx].bit_format);
  3603. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3604. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3605. break;
  3606. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3607. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3608. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3609. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3610. slim_tx_cfg[idx].bit_format);
  3611. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3612. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3613. break;
  3614. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3615. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3616. slim_tx_cfg[1].bit_format);
  3617. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3618. channels->min = channels->max = slim_tx_cfg[1].channels;
  3619. break;
  3620. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3621. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3622. SNDRV_PCM_FORMAT_S32_LE);
  3623. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3624. channels->min = channels->max = msm_vi_feed_tx_ch;
  3625. break;
  3626. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3627. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3628. slim_rx_cfg[5].bit_format);
  3629. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3630. channels->min = channels->max = slim_rx_cfg[5].channels;
  3631. break;
  3632. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3633. codec = rtd->codec;
  3634. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3635. channels->min = channels->max = 1;
  3636. config = msm_codec_fn.get_afe_config_fn(codec,
  3637. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3638. if (config) {
  3639. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3640. config, SLIMBUS_5_TX);
  3641. if (rc)
  3642. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3643. __func__, rc);
  3644. }
  3645. break;
  3646. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3647. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3648. slim_rx_cfg[SLIM_RX_7].bit_format);
  3649. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3650. channels->min = channels->max =
  3651. slim_rx_cfg[SLIM_RX_7].channels;
  3652. break;
  3653. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3654. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3655. channels->min = channels->max =
  3656. slim_tx_cfg[SLIM_TX_7].channels;
  3657. break;
  3658. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3659. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3660. channels->min = channels->max =
  3661. slim_tx_cfg[SLIM_TX_8].channels;
  3662. break;
  3663. case MSM_BACKEND_DAI_USB_RX:
  3664. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3665. usb_rx_cfg.bit_format);
  3666. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3667. channels->min = channels->max = usb_rx_cfg.channels;
  3668. break;
  3669. case MSM_BACKEND_DAI_USB_TX:
  3670. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3671. usb_tx_cfg.bit_format);
  3672. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3673. channels->min = channels->max = usb_tx_cfg.channels;
  3674. break;
  3675. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3676. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3677. if (idx < 0) {
  3678. pr_err("%s: Incorrect ext disp idx %d\n",
  3679. __func__, idx);
  3680. rc = idx;
  3681. goto done;
  3682. }
  3683. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3684. ext_disp_rx_cfg[idx].bit_format);
  3685. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3686. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3687. break;
  3688. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3689. channels->min = channels->max = proxy_rx_cfg.channels;
  3690. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3691. break;
  3692. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3693. channels->min = channels->max =
  3694. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3695. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3696. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3697. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3698. break;
  3699. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3700. channels->min = channels->max =
  3701. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3702. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3703. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3704. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3705. break;
  3706. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3707. channels->min = channels->max =
  3708. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3709. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3710. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3711. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3712. break;
  3713. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3714. channels->min = channels->max =
  3715. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3716. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3717. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3718. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3719. break;
  3720. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3721. channels->min = channels->max =
  3722. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3723. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3724. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3725. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3726. break;
  3727. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3728. channels->min = channels->max =
  3729. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3730. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3731. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3732. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3733. break;
  3734. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3735. channels->min = channels->max =
  3736. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3737. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3738. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3739. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3740. break;
  3741. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3742. channels->min = channels->max =
  3743. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3744. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3745. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3746. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3747. break;
  3748. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3749. channels->min = channels->max =
  3750. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3751. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3752. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3753. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3754. break;
  3755. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3756. channels->min = channels->max =
  3757. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3758. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3759. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3760. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3761. break;
  3762. case MSM_BACKEND_DAI_AUXPCM_RX:
  3763. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3764. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3765. rate->min = rate->max =
  3766. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3767. channels->min = channels->max =
  3768. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3769. break;
  3770. case MSM_BACKEND_DAI_AUXPCM_TX:
  3771. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3772. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3773. rate->min = rate->max =
  3774. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3775. channels->min = channels->max =
  3776. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3777. break;
  3778. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3779. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3780. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3781. rate->min = rate->max =
  3782. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3783. channels->min = channels->max =
  3784. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3785. break;
  3786. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3787. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3788. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3789. rate->min = rate->max =
  3790. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3791. channels->min = channels->max =
  3792. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3793. break;
  3794. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3795. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3796. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3797. rate->min = rate->max =
  3798. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3799. channels->min = channels->max =
  3800. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3801. break;
  3802. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3803. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3804. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3805. rate->min = rate->max =
  3806. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3807. channels->min = channels->max =
  3808. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3809. break;
  3810. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3811. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3812. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3813. rate->min = rate->max =
  3814. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3815. channels->min = channels->max =
  3816. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3817. break;
  3818. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3819. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3820. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3821. rate->min = rate->max =
  3822. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3823. channels->min = channels->max =
  3824. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3825. break;
  3826. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  3827. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3828. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  3829. rate->min = rate->max =
  3830. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  3831. channels->min = channels->max =
  3832. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  3833. break;
  3834. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3835. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3836. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  3837. rate->min = rate->max =
  3838. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  3839. channels->min = channels->max =
  3840. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  3841. break;
  3842. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3843. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3844. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3845. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3846. channels->min = channels->max =
  3847. mi2s_rx_cfg[PRIM_MI2S].channels;
  3848. break;
  3849. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3850. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3851. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3852. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3853. channels->min = channels->max =
  3854. mi2s_tx_cfg[PRIM_MI2S].channels;
  3855. break;
  3856. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3857. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3858. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3859. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3860. channels->min = channels->max =
  3861. mi2s_rx_cfg[SEC_MI2S].channels;
  3862. break;
  3863. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3864. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3865. mi2s_tx_cfg[SEC_MI2S].bit_format);
  3866. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  3867. channels->min = channels->max =
  3868. mi2s_tx_cfg[SEC_MI2S].channels;
  3869. break;
  3870. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  3871. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3872. mi2s_rx_cfg[TERT_MI2S].bit_format);
  3873. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  3874. channels->min = channels->max =
  3875. mi2s_rx_cfg[TERT_MI2S].channels;
  3876. break;
  3877. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  3878. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3879. mi2s_tx_cfg[TERT_MI2S].bit_format);
  3880. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  3881. channels->min = channels->max =
  3882. mi2s_tx_cfg[TERT_MI2S].channels;
  3883. break;
  3884. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  3885. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3886. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  3887. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  3888. channels->min = channels->max =
  3889. mi2s_rx_cfg[QUAT_MI2S].channels;
  3890. break;
  3891. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  3892. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3893. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  3894. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  3895. channels->min = channels->max =
  3896. mi2s_tx_cfg[QUAT_MI2S].channels;
  3897. break;
  3898. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  3899. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3900. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  3901. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  3902. channels->min = channels->max =
  3903. mi2s_rx_cfg[QUIN_MI2S].channels;
  3904. break;
  3905. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  3906. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3907. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  3908. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  3909. channels->min = channels->max =
  3910. mi2s_tx_cfg[QUIN_MI2S].channels;
  3911. break;
  3912. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3913. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3914. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3915. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3916. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3917. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3918. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3919. cdc_dma_rx_cfg[idx].bit_format);
  3920. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  3921. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  3922. break;
  3923. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3924. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3925. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3926. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3927. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3928. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  3929. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3930. cdc_dma_tx_cfg[idx].bit_format);
  3931. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  3932. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  3933. break;
  3934. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3935. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3936. SNDRV_PCM_FORMAT_S32_LE);
  3937. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3938. channels->min = channels->max = msm_vi_feed_tx_ch;
  3939. break;
  3940. default:
  3941. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3942. break;
  3943. }
  3944. done:
  3945. return rc;
  3946. }
  3947. static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  3948. {
  3949. int value = 0;
  3950. bool ret = 0;
  3951. struct snd_soc_card *card = codec->component.card;
  3952. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  3953. struct pinctrl_state *en2_pinctrl_active;
  3954. struct pinctrl_state *en2_pinctrl_sleep;
  3955. if (!pdata->usbc_en2_gpio_p) {
  3956. if (active) {
  3957. /* if active and usbc_en2_gpio undefined, get pin */
  3958. pdata->usbc_en2_gpio_p = devm_pinctrl_get(card->dev);
  3959. if (IS_ERR_OR_NULL(pdata->usbc_en2_gpio_p)) {
  3960. dev_err(card->dev,
  3961. "%s: Can't get EN2 gpio pinctrl:%ld\n",
  3962. __func__,
  3963. PTR_ERR(pdata->usbc_en2_gpio_p));
  3964. pdata->usbc_en2_gpio_p = NULL;
  3965. return false;
  3966. }
  3967. } else {
  3968. /* if not active and usbc_en2_gpio undefined, return */
  3969. return false;
  3970. }
  3971. }
  3972. pdata->usbc_en2_gpio = of_get_named_gpio(card->dev->of_node,
  3973. "qcom,usbc-analog-en2-gpio", 0);
  3974. if (!gpio_is_valid(pdata->usbc_en2_gpio)) {
  3975. dev_err(card->dev, "%s, property %s not in node %s",
  3976. __func__, "qcom,usbc-analog-en2-gpio",
  3977. card->dev->of_node->full_name);
  3978. return false;
  3979. }
  3980. en2_pinctrl_active = pinctrl_lookup_state(
  3981. pdata->usbc_en2_gpio_p, "aud_active");
  3982. if (IS_ERR_OR_NULL(en2_pinctrl_active)) {
  3983. dev_err(card->dev,
  3984. "%s: Cannot get aud_active pinctrl state:%ld\n",
  3985. __func__, PTR_ERR(en2_pinctrl_active));
  3986. ret = false;
  3987. goto err_lookup_state;
  3988. }
  3989. en2_pinctrl_sleep = pinctrl_lookup_state(
  3990. pdata->usbc_en2_gpio_p, "aud_sleep");
  3991. if (IS_ERR_OR_NULL(en2_pinctrl_sleep)) {
  3992. dev_err(card->dev,
  3993. "%s: Cannot get aud_sleep pinctrl state:%ld\n",
  3994. __func__, PTR_ERR(en2_pinctrl_sleep));
  3995. ret = false;
  3996. goto err_lookup_state;
  3997. }
  3998. /* if active and usbc_en2_gpio_p defined, swap using usbc_en2_gpio_p */
  3999. if (active) {
  4000. dev_dbg(codec->dev, "%s: enter\n", __func__);
  4001. if (pdata->usbc_en2_gpio_p) {
  4002. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  4003. if (value)
  4004. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  4005. en2_pinctrl_sleep);
  4006. else
  4007. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  4008. en2_pinctrl_active);
  4009. } else if (pdata->usbc_en2_gpio >= 0) {
  4010. value = gpio_get_value_cansleep(pdata->usbc_en2_gpio);
  4011. gpio_set_value_cansleep(pdata->usbc_en2_gpio, !value);
  4012. }
  4013. pr_debug("%s: swap select switch %d to %d\n", __func__,
  4014. value, !value);
  4015. ret = true;
  4016. } else {
  4017. /* if not active, release usbc_en2_gpio_p pin */
  4018. pinctrl_select_state(pdata->usbc_en2_gpio_p,
  4019. en2_pinctrl_sleep);
  4020. }
  4021. err_lookup_state:
  4022. devm_pinctrl_put(pdata->usbc_en2_gpio_p);
  4023. pdata->usbc_en2_gpio_p = NULL;
  4024. return ret;
  4025. }
  4026. static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  4027. {
  4028. int value = 0;
  4029. bool ret = false;
  4030. struct snd_soc_card *card;
  4031. struct msm_asoc_mach_data *pdata;
  4032. if (!codec) {
  4033. pr_err("%s codec is NULL\n", __func__);
  4034. return false;
  4035. }
  4036. card = codec->component.card;
  4037. pdata = snd_soc_card_get_drvdata(card);
  4038. if (!pdata)
  4039. return false;
  4040. if (wcd_mbhc_cfg.enable_usbc_analog)
  4041. return msm_usbc_swap_gnd_mic(codec, active);
  4042. /* if usbc is not defined, swap using us_euro_gpio_p */
  4043. if (pdata->us_euro_gpio_p) {
  4044. value = msm_cdc_pinctrl_get_state(
  4045. pdata->us_euro_gpio_p);
  4046. if (value)
  4047. msm_cdc_pinctrl_select_sleep_state(
  4048. pdata->us_euro_gpio_p);
  4049. else
  4050. msm_cdc_pinctrl_select_active_state(
  4051. pdata->us_euro_gpio_p);
  4052. dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
  4053. __func__, value, !value);
  4054. ret = true;
  4055. }
  4056. return ret;
  4057. }
  4058. static int msm_afe_set_config(struct snd_soc_codec *codec)
  4059. {
  4060. int ret = 0;
  4061. void *config_data = NULL;
  4062. if (!msm_codec_fn.get_afe_config_fn) {
  4063. dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
  4064. __func__);
  4065. return -EINVAL;
  4066. }
  4067. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4068. AFE_CDC_REGISTERS_CONFIG);
  4069. if (config_data) {
  4070. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  4071. if (ret) {
  4072. dev_err(codec->dev,
  4073. "%s: Failed to set codec registers config %d\n",
  4074. __func__, ret);
  4075. return ret;
  4076. }
  4077. }
  4078. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4079. AFE_CDC_REGISTER_PAGE_CONFIG);
  4080. if (config_data) {
  4081. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  4082. 0);
  4083. if (ret)
  4084. dev_err(codec->dev,
  4085. "%s: Failed to set cdc register page config\n",
  4086. __func__);
  4087. }
  4088. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4089. AFE_SLIMBUS_SLAVE_CONFIG);
  4090. if (config_data) {
  4091. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  4092. if (ret) {
  4093. dev_err(codec->dev,
  4094. "%s: Failed to set slimbus slave config %d\n",
  4095. __func__, ret);
  4096. return ret;
  4097. }
  4098. }
  4099. return 0;
  4100. }
  4101. static void msm_afe_clear_config(void)
  4102. {
  4103. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  4104. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  4105. }
  4106. static int msm_adsp_power_up_config(struct snd_soc_codec *codec,
  4107. struct snd_card *card)
  4108. {
  4109. int ret = 0;
  4110. unsigned long timeout;
  4111. int adsp_ready = 0;
  4112. bool snd_card_online = 0;
  4113. timeout = jiffies +
  4114. msecs_to_jiffies(ADSP_STATE_READY_TIMEOUT_MS);
  4115. do {
  4116. if (!snd_card_online) {
  4117. snd_card_online = snd_card_is_online_state(card);
  4118. pr_debug("%s: Sound card is %s\n", __func__,
  4119. snd_card_online ? "Online" : "Offline");
  4120. }
  4121. if (!adsp_ready) {
  4122. adsp_ready = q6core_is_adsp_ready();
  4123. pr_debug("%s: ADSP Audio is %s\n", __func__,
  4124. adsp_ready ? "ready" : "not ready");
  4125. }
  4126. if (snd_card_online && adsp_ready)
  4127. break;
  4128. /*
  4129. * Sound card/ADSP will be coming up after subsystem restart and
  4130. * it might not be fully up when the control reaches
  4131. * here. So, wait for 50msec before checking ADSP state
  4132. */
  4133. msleep(50);
  4134. } while (time_after(timeout, jiffies));
  4135. if (!snd_card_online || !adsp_ready) {
  4136. pr_err("%s: Timeout. Sound card is %s, ADSP Audio is %s\n",
  4137. __func__,
  4138. snd_card_online ? "Online" : "Offline",
  4139. adsp_ready ? "ready" : "not ready");
  4140. ret = -ETIMEDOUT;
  4141. goto err;
  4142. }
  4143. ret = msm_afe_set_config(codec);
  4144. if (ret)
  4145. pr_err("%s: Failed to set AFE config. err %d\n",
  4146. __func__, ret);
  4147. return 0;
  4148. err:
  4149. return ret;
  4150. }
  4151. static int sm6150_notifier_service_cb(struct notifier_block *this,
  4152. unsigned long opcode, void *ptr)
  4153. {
  4154. int ret;
  4155. struct snd_soc_card *card = NULL;
  4156. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  4157. struct snd_soc_pcm_runtime *rtd;
  4158. struct snd_soc_codec *codec;
  4159. pr_debug("%s: Service opcode 0x%lx\n", __func__, opcode);
  4160. switch (opcode) {
  4161. case AUDIO_NOTIFIER_SERVICE_DOWN:
  4162. /*
  4163. * Use flag to ignore initial boot notifications
  4164. * On initial boot msm_adsp_power_up_config is
  4165. * called on init. There is no need to clear
  4166. * and set the config again on initial boot.
  4167. */
  4168. if (is_initial_boot)
  4169. break;
  4170. msm_afe_clear_config();
  4171. break;
  4172. case AUDIO_NOTIFIER_SERVICE_UP:
  4173. if (is_initial_boot) {
  4174. is_initial_boot = false;
  4175. break;
  4176. }
  4177. if (!spdev)
  4178. return -EINVAL;
  4179. card = platform_get_drvdata(spdev);
  4180. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  4181. if (!rtd) {
  4182. dev_err(card->dev,
  4183. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  4184. __func__, be_dl_name);
  4185. ret = -EINVAL;
  4186. goto err;
  4187. }
  4188. codec = rtd->codec;
  4189. ret = msm_adsp_power_up_config(codec, card->snd_card);
  4190. if (ret < 0) {
  4191. dev_err(card->dev,
  4192. "%s: msm_adsp_power_up_config failed ret = %d!\n",
  4193. __func__, ret);
  4194. goto err;
  4195. }
  4196. break;
  4197. default:
  4198. break;
  4199. }
  4200. err:
  4201. return NOTIFY_OK;
  4202. }
  4203. static struct notifier_block service_nb = {
  4204. .notifier_call = sm6150_notifier_service_cb,
  4205. .priority = -INT_MAX,
  4206. };
  4207. static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
  4208. {
  4209. int ret = 0;
  4210. void *config_data;
  4211. struct snd_soc_codec *codec = rtd->codec;
  4212. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4213. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4214. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4215. struct snd_soc_component *aux_comp;
  4216. struct snd_card *card;
  4217. struct snd_info_entry *entry;
  4218. struct msm_asoc_mach_data *pdata =
  4219. snd_soc_card_get_drvdata(rtd->card);
  4220. /*
  4221. * Codec SLIMBUS configuration
  4222. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  4223. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4224. * TX14, TX15, TX16
  4225. */
  4226. unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
  4227. 150, 151};
  4228. unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4229. 134, 135, 136, 137, 138, 139,
  4230. 140, 141, 142, 143};
  4231. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4232. rtd->pmdown_time = 0;
  4233. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  4234. ARRAY_SIZE(msm_tavil_snd_controls));
  4235. if (ret < 0) {
  4236. pr_err("%s: add_codec_controls failed, err %d\n",
  4237. __func__, ret);
  4238. return ret;
  4239. }
  4240. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4241. ARRAY_SIZE(msm_common_snd_controls));
  4242. if (ret < 0) {
  4243. pr_err("%s: add_codec_controls failed, err %d\n",
  4244. __func__, ret);
  4245. return ret;
  4246. }
  4247. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
  4248. ARRAY_SIZE(msm_dapm_widgets_tavil));
  4249. snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
  4250. ARRAY_SIZE(wcd_audio_paths_tavil));
  4251. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4252. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4253. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4254. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4255. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4256. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4257. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4258. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4259. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4260. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4261. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  4262. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4263. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4264. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  4265. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  4266. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4267. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4268. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4269. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4270. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4271. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4272. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4273. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4274. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4275. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4276. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4277. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4278. snd_soc_dapm_sync(dapm);
  4279. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4280. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4281. msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
  4282. ret = msm_adsp_power_up_config(codec, rtd->card->snd_card);
  4283. if (ret) {
  4284. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4285. goto err;
  4286. }
  4287. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4288. AFE_AANC_VERSION);
  4289. if (config_data) {
  4290. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4291. if (ret) {
  4292. pr_err("%s: Failed to set aanc version %d\n",
  4293. __func__, ret);
  4294. goto err;
  4295. }
  4296. }
  4297. /*
  4298. * Send speaker configuration only for WSA8810.
  4299. * Default configuration is for WSA8815.
  4300. */
  4301. pr_debug("%s: Number of aux devices: %d\n",
  4302. __func__, rtd->card->num_aux_devs);
  4303. if (rtd->card->num_aux_devs &&
  4304. !list_empty(&rtd->card->aux_comp_list)) {
  4305. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4306. struct snd_soc_component, card_aux_list);
  4307. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4308. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4309. tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
  4310. tavil_set_spkr_gain_offset(rtd->codec,
  4311. WCD934X_RX_GAIN_OFFSET_M1P5_DB);
  4312. }
  4313. }
  4314. card = rtd->card->snd_card;
  4315. entry = snd_info_create_subdir(card->module, "codecs",
  4316. card->proc_root);
  4317. if (!entry) {
  4318. pr_debug("%s: Cannot create codecs module entry\n",
  4319. __func__);
  4320. ret = 0;
  4321. goto err;
  4322. }
  4323. pdata->codec_root = entry;
  4324. tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
  4325. codec_reg_done = true;
  4326. return 0;
  4327. err:
  4328. return ret;
  4329. }
  4330. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  4331. {
  4332. int ret = 0;
  4333. struct snd_soc_codec *codec = rtd->codec;
  4334. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4335. struct snd_card *card;
  4336. struct snd_info_entry *entry;
  4337. struct snd_soc_component *aux_comp;
  4338. struct msm_asoc_mach_data *pdata =
  4339. snd_soc_card_get_drvdata(rtd->card);
  4340. ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
  4341. ARRAY_SIZE(msm_int_snd_controls));
  4342. if (ret < 0) {
  4343. pr_err("%s: add_codec_controls failed: %d\n",
  4344. __func__, ret);
  4345. return ret;
  4346. }
  4347. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4348. ARRAY_SIZE(msm_common_snd_controls));
  4349. if (ret < 0) {
  4350. pr_err("%s: add common snd controls failed: %d\n",
  4351. __func__, ret);
  4352. return ret;
  4353. }
  4354. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  4355. ARRAY_SIZE(msm_int_dapm_widgets));
  4356. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4357. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4358. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4359. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4360. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  4361. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  4362. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  4363. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4364. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  4365. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  4366. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  4367. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  4368. snd_soc_dapm_sync(dapm);
  4369. /*
  4370. * Send speaker configuration only for WSA8810.
  4371. * Default configuration is for WSA8815.
  4372. */
  4373. dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
  4374. __func__, rtd->card->num_aux_devs);
  4375. if (rtd->card->num_aux_devs &&
  4376. !list_empty(&rtd->card->component_dev_list)) {
  4377. aux_comp = list_first_entry(
  4378. &rtd->card->component_dev_list,
  4379. struct snd_soc_component,
  4380. card_aux_list);
  4381. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4382. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4383. wsa_macro_set_spkr_mode(rtd->codec,
  4384. WSA_MACRO_SPKR_MODE_1);
  4385. wsa_macro_set_spkr_gain_offset(rtd->codec,
  4386. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  4387. }
  4388. }
  4389. card = rtd->card->snd_card;
  4390. if (!pdata->codec_root) {
  4391. entry = snd_info_create_subdir(card->module, "codecs",
  4392. card->proc_root);
  4393. if (!entry) {
  4394. pr_debug("%s: Cannot create codecs module entry\n",
  4395. __func__);
  4396. ret = 0;
  4397. goto err;
  4398. }
  4399. pdata->codec_root = entry;
  4400. }
  4401. bolero_info_create_codec_entry(pdata->codec_root, codec);
  4402. codec_reg_done = true;
  4403. return 0;
  4404. err:
  4405. return ret;
  4406. }
  4407. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  4408. {
  4409. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  4410. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  4411. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4412. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4413. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4414. }
  4415. static void *def_wcd_mbhc_cal(void)
  4416. {
  4417. void *wcd_mbhc_cal;
  4418. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  4419. u16 *btn_high;
  4420. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  4421. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  4422. if (!wcd_mbhc_cal)
  4423. return NULL;
  4424. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
  4425. S(v_hs_max, 1600);
  4426. #undef S
  4427. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
  4428. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  4429. #undef S
  4430. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  4431. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  4432. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  4433. btn_high[0] = 75;
  4434. btn_high[1] = 150;
  4435. btn_high[2] = 237;
  4436. btn_high[3] = 500;
  4437. btn_high[4] = 500;
  4438. btn_high[5] = 500;
  4439. btn_high[6] = 500;
  4440. btn_high[7] = 500;
  4441. return wcd_mbhc_cal;
  4442. }
  4443. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  4444. struct snd_pcm_hw_params *params)
  4445. {
  4446. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4447. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4448. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4449. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4450. int ret = 0;
  4451. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4452. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4453. u32 user_set_tx_ch = 0;
  4454. u32 rx_ch_count;
  4455. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4456. ret = snd_soc_dai_get_channel_map(codec_dai,
  4457. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4458. if (ret < 0) {
  4459. pr_err("%s: failed to get codec chan map, err:%d\n",
  4460. __func__, ret);
  4461. goto err;
  4462. }
  4463. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  4464. pr_debug("%s: rx_5_ch=%d\n", __func__,
  4465. slim_rx_cfg[5].channels);
  4466. rx_ch_count = slim_rx_cfg[5].channels;
  4467. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  4468. pr_debug("%s: rx_2_ch=%d\n", __func__,
  4469. slim_rx_cfg[2].channels);
  4470. rx_ch_count = slim_rx_cfg[2].channels;
  4471. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  4472. pr_debug("%s: rx_6_ch=%d\n", __func__,
  4473. slim_rx_cfg[6].channels);
  4474. rx_ch_count = slim_rx_cfg[6].channels;
  4475. } else {
  4476. pr_debug("%s: rx_0_ch=%d\n", __func__,
  4477. slim_rx_cfg[0].channels);
  4478. rx_ch_count = slim_rx_cfg[0].channels;
  4479. }
  4480. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4481. rx_ch_count, rx_ch);
  4482. if (ret < 0) {
  4483. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4484. __func__, ret);
  4485. goto err;
  4486. }
  4487. } else {
  4488. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  4489. codec_dai->name, codec_dai->id, user_set_tx_ch);
  4490. ret = snd_soc_dai_get_channel_map(codec_dai,
  4491. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4492. if (ret < 0) {
  4493. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4494. __func__, ret);
  4495. goto err;
  4496. }
  4497. /* For <codec>_tx1 case */
  4498. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  4499. user_set_tx_ch = slim_tx_cfg[0].channels;
  4500. /* For <codec>_tx3 case */
  4501. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  4502. user_set_tx_ch = slim_tx_cfg[1].channels;
  4503. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  4504. user_set_tx_ch = msm_vi_feed_tx_ch;
  4505. else
  4506. user_set_tx_ch = tx_ch_cnt;
  4507. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  4508. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  4509. tx_ch_cnt, dai_link->id);
  4510. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4511. user_set_tx_ch, tx_ch, 0, 0);
  4512. if (ret < 0)
  4513. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4514. __func__, ret);
  4515. }
  4516. err:
  4517. return ret;
  4518. }
  4519. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  4520. struct snd_pcm_hw_params *params)
  4521. {
  4522. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4523. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4524. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4525. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4526. int ret = 0;
  4527. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  4528. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4529. u32 user_set_tx_ch = 0;
  4530. u32 user_set_rx_ch = 0;
  4531. u32 ch_id;
  4532. ret = snd_soc_dai_get_channel_map(codec_dai,
  4533. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  4534. &rx_ch_cdc_dma);
  4535. if (ret < 0) {
  4536. pr_err("%s: failed to get codec chan map, err:%d\n",
  4537. __func__, ret);
  4538. goto err;
  4539. }
  4540. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4541. switch (dai_link->id) {
  4542. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4543. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4544. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4545. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4546. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4547. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  4548. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  4549. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  4550. {
  4551. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4552. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  4553. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  4554. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  4555. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4556. user_set_rx_ch, &rx_ch_cdc_dma);
  4557. if (ret < 0) {
  4558. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4559. __func__, ret);
  4560. goto err;
  4561. }
  4562. }
  4563. break;
  4564. }
  4565. } else {
  4566. switch (dai_link->id) {
  4567. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4568. {
  4569. user_set_tx_ch = msm_vi_feed_tx_ch;
  4570. }
  4571. break;
  4572. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4573. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4574. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4575. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4576. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4577. {
  4578. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4579. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  4580. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  4581. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  4582. }
  4583. break;
  4584. }
  4585. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  4586. &tx_ch_cdc_dma, 0, 0);
  4587. if (ret < 0) {
  4588. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4589. __func__, ret);
  4590. goto err;
  4591. }
  4592. }
  4593. err:
  4594. return ret;
  4595. }
  4596. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  4597. struct snd_pcm_hw_params *params)
  4598. {
  4599. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4600. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4601. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4602. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4603. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  4604. unsigned int num_tx_ch = 0;
  4605. unsigned int num_rx_ch = 0;
  4606. int ret = 0;
  4607. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4608. num_rx_ch = params_channels(params);
  4609. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  4610. codec_dai->name, codec_dai->id, num_rx_ch);
  4611. ret = snd_soc_dai_get_channel_map(codec_dai,
  4612. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4613. if (ret < 0) {
  4614. pr_err("%s: failed to get codec chan map, err:%d\n",
  4615. __func__, ret);
  4616. goto err;
  4617. }
  4618. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4619. num_rx_ch, rx_ch);
  4620. if (ret < 0) {
  4621. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4622. __func__, ret);
  4623. goto err;
  4624. }
  4625. } else {
  4626. num_tx_ch = params_channels(params);
  4627. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  4628. codec_dai->name, codec_dai->id, num_tx_ch);
  4629. ret = snd_soc_dai_get_channel_map(codec_dai,
  4630. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4631. if (ret < 0) {
  4632. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4633. __func__, ret);
  4634. goto err;
  4635. }
  4636. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4637. num_tx_ch, tx_ch, 0, 0);
  4638. if (ret < 0) {
  4639. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4640. __func__, ret);
  4641. goto err;
  4642. }
  4643. }
  4644. err:
  4645. return ret;
  4646. }
  4647. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  4648. struct snd_pcm_hw_params *params)
  4649. {
  4650. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4651. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4652. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4653. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4654. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  4655. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4656. int ret;
  4657. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  4658. codec_dai->name, codec_dai->id);
  4659. ret = snd_soc_dai_get_channel_map(codec_dai,
  4660. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4661. if (ret) {
  4662. dev_err(rtd->dev,
  4663. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4664. __func__, ret);
  4665. goto err;
  4666. }
  4667. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4668. __func__, tx_ch_cnt, dai_link->id);
  4669. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4670. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4671. if (ret)
  4672. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4673. __func__, ret);
  4674. err:
  4675. return ret;
  4676. }
  4677. static int msm_get_port_id(int be_id)
  4678. {
  4679. int afe_port_id;
  4680. switch (be_id) {
  4681. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4682. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4683. break;
  4684. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4685. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4686. break;
  4687. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4688. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4689. break;
  4690. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4691. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4692. break;
  4693. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4694. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4695. break;
  4696. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4697. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4698. break;
  4699. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4700. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4701. break;
  4702. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4703. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4704. break;
  4705. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4706. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4707. break;
  4708. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4709. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4710. break;
  4711. default:
  4712. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4713. afe_port_id = -EINVAL;
  4714. }
  4715. return afe_port_id;
  4716. }
  4717. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4718. {
  4719. u32 bit_per_sample;
  4720. switch (bit_format) {
  4721. case SNDRV_PCM_FORMAT_S32_LE:
  4722. case SNDRV_PCM_FORMAT_S24_3LE:
  4723. case SNDRV_PCM_FORMAT_S24_LE:
  4724. bit_per_sample = 32;
  4725. break;
  4726. case SNDRV_PCM_FORMAT_S16_LE:
  4727. default:
  4728. bit_per_sample = 16;
  4729. break;
  4730. }
  4731. return bit_per_sample;
  4732. }
  4733. static void update_mi2s_clk_val(int dai_id, int stream)
  4734. {
  4735. u32 bit_per_sample;
  4736. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4737. bit_per_sample =
  4738. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4739. mi2s_clk[dai_id].clk_freq_in_hz =
  4740. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4741. } else {
  4742. bit_per_sample =
  4743. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4744. mi2s_clk[dai_id].clk_freq_in_hz =
  4745. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4746. }
  4747. }
  4748. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4749. {
  4750. int ret = 0;
  4751. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4752. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4753. int port_id = 0;
  4754. int index = cpu_dai->id;
  4755. port_id = msm_get_port_id(rtd->dai_link->id);
  4756. if (port_id < 0) {
  4757. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4758. ret = port_id;
  4759. goto err;
  4760. }
  4761. if (enable) {
  4762. update_mi2s_clk_val(index, substream->stream);
  4763. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4764. mi2s_clk[index].clk_freq_in_hz);
  4765. }
  4766. mi2s_clk[index].enable = enable;
  4767. ret = afe_set_lpass_clock_v2(port_id,
  4768. &mi2s_clk[index]);
  4769. if (ret < 0) {
  4770. dev_err(rtd->card->dev,
  4771. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  4772. __func__, port_id, ret);
  4773. goto err;
  4774. }
  4775. err:
  4776. return ret;
  4777. }
  4778. static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
  4779. enum pinctrl_pin_state new_state)
  4780. {
  4781. int ret = 0;
  4782. int curr_state = 0;
  4783. if (pinctrl_info == NULL) {
  4784. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4785. ret = -EINVAL;
  4786. goto err;
  4787. }
  4788. if (pinctrl_info->pinctrl == NULL) {
  4789. pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
  4790. ret = -EINVAL;
  4791. goto err;
  4792. }
  4793. curr_state = pinctrl_info->curr_state;
  4794. pinctrl_info->curr_state = new_state;
  4795. pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
  4796. pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
  4797. if (curr_state == pinctrl_info->curr_state) {
  4798. pr_debug("%s: Already in same state\n", __func__);
  4799. goto err;
  4800. }
  4801. if (curr_state != STATE_DISABLE &&
  4802. pinctrl_info->curr_state != STATE_DISABLE) {
  4803. pr_debug("%s: state already active cannot switch\n", __func__);
  4804. ret = -EIO;
  4805. goto err;
  4806. }
  4807. switch (pinctrl_info->curr_state) {
  4808. case STATE_MI2S_ACTIVE:
  4809. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4810. pinctrl_info->mi2s_active);
  4811. if (ret) {
  4812. pr_err("%s: MI2S state select failed with %d\n",
  4813. __func__, ret);
  4814. ret = -EIO;
  4815. goto err;
  4816. }
  4817. break;
  4818. case STATE_TDM_ACTIVE:
  4819. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4820. pinctrl_info->tdm_active);
  4821. if (ret) {
  4822. pr_err("%s: TDM state select failed with %d\n",
  4823. __func__, ret);
  4824. ret = -EIO;
  4825. goto err;
  4826. }
  4827. break;
  4828. case STATE_DISABLE:
  4829. if (curr_state == STATE_MI2S_ACTIVE) {
  4830. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4831. pinctrl_info->mi2s_disable);
  4832. } else {
  4833. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4834. pinctrl_info->tdm_disable);
  4835. }
  4836. if (ret) {
  4837. pr_err("%s: state disable failed with %d\n",
  4838. __func__, ret);
  4839. ret = -EIO;
  4840. goto err;
  4841. }
  4842. break;
  4843. default:
  4844. pr_err("%s: TLMM pin state is invalid\n", __func__);
  4845. return -EINVAL;
  4846. }
  4847. err:
  4848. return ret;
  4849. }
  4850. static int msm_get_pinctrl(struct platform_device *pdev)
  4851. {
  4852. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4853. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4854. struct msm_pinctrl_info *pinctrl_info = NULL;
  4855. struct pinctrl *pinctrl;
  4856. int ret = 0;
  4857. pinctrl_info = &pdata->pinctrl_info;
  4858. if (pinctrl_info == NULL) {
  4859. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4860. return -EINVAL;
  4861. }
  4862. pinctrl = devm_pinctrl_get(&pdev->dev);
  4863. if (IS_ERR_OR_NULL(pinctrl)) {
  4864. pr_err("%s: Unable to get pinctrl handle\n", __func__);
  4865. return -EINVAL;
  4866. }
  4867. pinctrl_info->pinctrl = pinctrl;
  4868. /* get all the states handles from Device Tree */
  4869. pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
  4870. "quat-mi2s-sleep");
  4871. if (IS_ERR(pinctrl_info->mi2s_disable)) {
  4872. pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
  4873. goto err;
  4874. }
  4875. pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
  4876. "quat-mi2s-active");
  4877. if (IS_ERR(pinctrl_info->mi2s_active)) {
  4878. pr_err("%s: could not get mi2s_active pinstate\n", __func__);
  4879. goto err;
  4880. }
  4881. pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
  4882. "quat-tdm-sleep");
  4883. if (IS_ERR(pinctrl_info->tdm_disable)) {
  4884. pr_err("%s: could not get tdm_disable pinstate\n", __func__);
  4885. goto err;
  4886. }
  4887. pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
  4888. "quat-tdm-active");
  4889. if (IS_ERR(pinctrl_info->tdm_active)) {
  4890. pr_err("%s: could not get tdm_active pinstate\n",
  4891. __func__);
  4892. goto err;
  4893. }
  4894. /* Reset the TLMM pins to a default state */
  4895. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4896. pinctrl_info->mi2s_disable);
  4897. if (ret != 0) {
  4898. pr_err("%s: Disable TLMM pins failed with %d\n",
  4899. __func__, ret);
  4900. ret = -EIO;
  4901. goto err;
  4902. }
  4903. pinctrl_info->curr_state = STATE_DISABLE;
  4904. return 0;
  4905. err:
  4906. devm_pinctrl_put(pinctrl);
  4907. pinctrl_info->pinctrl = NULL;
  4908. return -EINVAL;
  4909. }
  4910. static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  4911. struct snd_pcm_hw_params *params)
  4912. {
  4913. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4914. struct snd_interval *rate = hw_param_interval(params,
  4915. SNDRV_PCM_HW_PARAM_RATE);
  4916. struct snd_interval *channels = hw_param_interval(params,
  4917. SNDRV_PCM_HW_PARAM_CHANNELS);
  4918. if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
  4919. channels->min = channels->max =
  4920. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4921. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4922. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  4923. rate->min = rate->max =
  4924. tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  4925. } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
  4926. channels->min = channels->max =
  4927. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4928. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4929. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  4930. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  4931. } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
  4932. channels->min = channels->max =
  4933. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4934. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4935. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  4936. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  4937. } else {
  4938. pr_err("%s: dai id 0x%x not supported\n",
  4939. __func__, cpu_dai->id);
  4940. return -EINVAL;
  4941. }
  4942. pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
  4943. __func__, cpu_dai->id, channels->max, rate->max,
  4944. params_format(params));
  4945. return 0;
  4946. }
  4947. static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  4948. struct snd_pcm_hw_params *params)
  4949. {
  4950. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4951. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4952. int ret = 0;
  4953. int slot_width = 32;
  4954. int channels, slots;
  4955. unsigned int slot_mask, rate, clk_freq;
  4956. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  4957. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  4958. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4959. switch (cpu_dai->id) {
  4960. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4961. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  4962. break;
  4963. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4964. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4965. break;
  4966. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4967. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  4968. break;
  4969. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4970. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4971. break;
  4972. case AFE_PORT_ID_QUINARY_TDM_RX:
  4973. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4974. break;
  4975. case AFE_PORT_ID_PRIMARY_TDM_TX:
  4976. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  4977. break;
  4978. case AFE_PORT_ID_SECONDARY_TDM_TX:
  4979. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  4980. break;
  4981. case AFE_PORT_ID_TERTIARY_TDM_TX:
  4982. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  4983. break;
  4984. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  4985. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  4986. break;
  4987. case AFE_PORT_ID_QUINARY_TDM_TX:
  4988. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  4989. break;
  4990. default:
  4991. pr_err("%s: dai id 0x%x not supported\n",
  4992. __func__, cpu_dai->id);
  4993. return -EINVAL;
  4994. }
  4995. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4996. /*2 slot config - bits 0 and 1 set for the first two slots */
  4997. slot_mask = 0x0000FFFF >> (16-slots);
  4998. channels = slots;
  4999. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  5000. __func__, slot_width, slots);
  5001. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  5002. slots, slot_width);
  5003. if (ret < 0) {
  5004. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  5005. __func__, ret);
  5006. goto end;
  5007. }
  5008. ret = snd_soc_dai_set_channel_map(cpu_dai,
  5009. 0, NULL, channels, slot_offset);
  5010. if (ret < 0) {
  5011. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  5012. __func__, ret);
  5013. goto end;
  5014. }
  5015. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  5016. /*2 slot config - bits 0 and 1 set for the first two slots */
  5017. slot_mask = 0x0000FFFF >> (16-slots);
  5018. channels = slots;
  5019. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  5020. __func__, slot_width, slots);
  5021. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  5022. slots, slot_width);
  5023. if (ret < 0) {
  5024. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  5025. __func__, ret);
  5026. goto end;
  5027. }
  5028. ret = snd_soc_dai_set_channel_map(cpu_dai,
  5029. channels, slot_offset, 0, NULL);
  5030. if (ret < 0) {
  5031. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  5032. __func__, ret);
  5033. goto end;
  5034. }
  5035. } else {
  5036. ret = -EINVAL;
  5037. pr_err("%s: invalid use case, err:%d\n",
  5038. __func__, ret);
  5039. goto end;
  5040. }
  5041. rate = params_rate(params);
  5042. clk_freq = rate * slot_width * slots;
  5043. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  5044. if (ret < 0)
  5045. pr_err("%s: failed to set tdm clk, err:%d\n",
  5046. __func__, ret);
  5047. end:
  5048. return ret;
  5049. }
  5050. static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
  5051. {
  5052. int ret = 0;
  5053. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5054. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5055. struct snd_soc_card *card = rtd->card;
  5056. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5057. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5058. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5059. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5060. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5061. ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
  5062. if (ret)
  5063. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5064. __func__, ret);
  5065. }
  5066. return ret;
  5067. }
  5068. static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  5069. {
  5070. int ret = 0;
  5071. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5072. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5073. struct snd_soc_card *card = rtd->card;
  5074. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5075. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5076. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5077. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5078. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5079. ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
  5080. if (ret)
  5081. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5082. __func__, ret);
  5083. }
  5084. }
  5085. static struct snd_soc_ops sm6150_tdm_be_ops = {
  5086. .hw_params = sm6150_tdm_snd_hw_params,
  5087. .startup = sm6150_tdm_snd_startup,
  5088. .shutdown = sm6150_tdm_snd_shutdown
  5089. };
  5090. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  5091. {
  5092. cpumask_t mask;
  5093. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  5094. pm_qos_remove_request(&substream->latency_pm_qos_req);
  5095. cpumask_clear(&mask);
  5096. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  5097. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  5098. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  5099. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  5100. pm_qos_add_request(&substream->latency_pm_qos_req,
  5101. PM_QOS_CPU_DMA_LATENCY,
  5102. MSM_LL_QOS_VALUE);
  5103. return 0;
  5104. }
  5105. static struct snd_soc_ops msm_fe_qos_ops = {
  5106. .prepare = msm_fe_qos_prepare,
  5107. };
  5108. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  5109. {
  5110. int ret = 0;
  5111. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5112. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5113. int index = cpu_dai->id;
  5114. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  5115. struct snd_soc_card *card = rtd->card;
  5116. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5117. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5118. int ret_pinctrl = 0;
  5119. dev_dbg(rtd->card->dev,
  5120. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  5121. __func__, substream->name, substream->stream,
  5122. cpu_dai->name, cpu_dai->id);
  5123. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5124. ret = -EINVAL;
  5125. dev_err(rtd->card->dev,
  5126. "%s: CPU DAI id (%d) out of range\n",
  5127. __func__, cpu_dai->id);
  5128. goto err;
  5129. }
  5130. /*
  5131. * Mutex protection in case the same MI2S
  5132. * interface using for both TX and RX so
  5133. * that the same clock won't be enable twice.
  5134. */
  5135. mutex_lock(&mi2s_intf_conf[index].lock);
  5136. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  5137. /* Check if msm needs to provide the clock to the interface */
  5138. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  5139. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  5140. fmt = SND_SOC_DAIFMT_CBM_CFM;
  5141. }
  5142. ret = msm_mi2s_set_sclk(substream, true);
  5143. if (ret < 0) {
  5144. dev_err(rtd->card->dev,
  5145. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  5146. __func__, ret);
  5147. goto clean_up;
  5148. }
  5149. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  5150. if (ret < 0) {
  5151. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  5152. __func__, index, ret);
  5153. goto clk_off;
  5154. }
  5155. if (index == QUAT_MI2S) {
  5156. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5157. STATE_MI2S_ACTIVE);
  5158. if (ret_pinctrl)
  5159. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5160. __func__, ret_pinctrl);
  5161. }
  5162. }
  5163. clk_off:
  5164. if (ret < 0)
  5165. msm_mi2s_set_sclk(substream, false);
  5166. clean_up:
  5167. if (ret < 0)
  5168. mi2s_intf_conf[index].ref_cnt--;
  5169. mutex_unlock(&mi2s_intf_conf[index].lock);
  5170. err:
  5171. return ret;
  5172. }
  5173. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  5174. {
  5175. int ret;
  5176. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5177. int index = rtd->cpu_dai->id;
  5178. struct snd_soc_card *card = rtd->card;
  5179. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5180. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5181. int ret_pinctrl = 0;
  5182. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  5183. substream->name, substream->stream);
  5184. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5185. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  5186. return;
  5187. }
  5188. mutex_lock(&mi2s_intf_conf[index].lock);
  5189. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  5190. ret = msm_mi2s_set_sclk(substream, false);
  5191. if (ret < 0)
  5192. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  5193. __func__, index, ret);
  5194. if (index == QUAT_MI2S) {
  5195. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5196. STATE_DISABLE);
  5197. if (ret_pinctrl)
  5198. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5199. __func__, ret_pinctrl);
  5200. }
  5201. }
  5202. mutex_unlock(&mi2s_intf_conf[index].lock);
  5203. }
  5204. static struct snd_soc_ops msm_mi2s_be_ops = {
  5205. .startup = msm_mi2s_snd_startup,
  5206. .shutdown = msm_mi2s_snd_shutdown,
  5207. };
  5208. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  5209. .hw_params = msm_snd_cdc_dma_hw_params,
  5210. };
  5211. static struct snd_soc_ops msm_be_ops = {
  5212. .hw_params = msm_snd_hw_params,
  5213. };
  5214. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  5215. .hw_params = msm_slimbus_2_hw_params,
  5216. };
  5217. static struct snd_soc_ops msm_wcn_ops = {
  5218. .hw_params = msm_wcn_hw_params,
  5219. };
  5220. /* Digital audio interface glue - connects codec <---> CPU */
  5221. static struct snd_soc_dai_link msm_common_dai_links[] = {
  5222. /* FrontEnd DAI Links */
  5223. {/* hw:x,0 */
  5224. .name = MSM_DAILINK_NAME(Media1),
  5225. .stream_name = "MultiMedia1",
  5226. .cpu_dai_name = "MultiMedia1",
  5227. .platform_name = "msm-pcm-dsp.0",
  5228. .dynamic = 1,
  5229. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5230. .dpcm_playback = 1,
  5231. .dpcm_capture = 1,
  5232. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5233. SND_SOC_DPCM_TRIGGER_POST},
  5234. .codec_dai_name = "snd-soc-dummy-dai",
  5235. .codec_name = "snd-soc-dummy",
  5236. .ignore_suspend = 1,
  5237. /* this dainlink has playback support */
  5238. .ignore_pmdown_time = 1,
  5239. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5240. },
  5241. {/* hw:x,1 */
  5242. .name = MSM_DAILINK_NAME(Media2),
  5243. .stream_name = "MultiMedia2",
  5244. .cpu_dai_name = "MultiMedia2",
  5245. .platform_name = "msm-pcm-dsp.0",
  5246. .dynamic = 1,
  5247. .dpcm_playback = 1,
  5248. .dpcm_capture = 1,
  5249. .codec_dai_name = "snd-soc-dummy-dai",
  5250. .codec_name = "snd-soc-dummy",
  5251. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5252. SND_SOC_DPCM_TRIGGER_POST},
  5253. .ignore_suspend = 1,
  5254. /* this dainlink has playback support */
  5255. .ignore_pmdown_time = 1,
  5256. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  5257. },
  5258. {/* hw:x,2 */
  5259. .name = "VoiceMMode1",
  5260. .stream_name = "VoiceMMode1",
  5261. .cpu_dai_name = "VoiceMMode1",
  5262. .platform_name = "msm-pcm-voice",
  5263. .dynamic = 1,
  5264. .dpcm_playback = 1,
  5265. .dpcm_capture = 1,
  5266. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5267. SND_SOC_DPCM_TRIGGER_POST},
  5268. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5269. .ignore_suspend = 1,
  5270. .ignore_pmdown_time = 1,
  5271. .codec_dai_name = "snd-soc-dummy-dai",
  5272. .codec_name = "snd-soc-dummy",
  5273. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  5274. },
  5275. {/* hw:x,3 */
  5276. .name = "MSM VoIP",
  5277. .stream_name = "VoIP",
  5278. .cpu_dai_name = "VoIP",
  5279. .platform_name = "msm-voip-dsp",
  5280. .dynamic = 1,
  5281. .dpcm_playback = 1,
  5282. .dpcm_capture = 1,
  5283. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5284. SND_SOC_DPCM_TRIGGER_POST},
  5285. .codec_dai_name = "snd-soc-dummy-dai",
  5286. .codec_name = "snd-soc-dummy",
  5287. .ignore_suspend = 1,
  5288. /* this dainlink has playback support */
  5289. .ignore_pmdown_time = 1,
  5290. .id = MSM_FRONTEND_DAI_VOIP,
  5291. },
  5292. {/* hw:x,4 */
  5293. .name = MSM_DAILINK_NAME(ULL),
  5294. .stream_name = "MultiMedia3",
  5295. .cpu_dai_name = "MultiMedia3",
  5296. .platform_name = "msm-pcm-dsp.2",
  5297. .dynamic = 1,
  5298. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5299. .dpcm_playback = 1,
  5300. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5301. SND_SOC_DPCM_TRIGGER_POST},
  5302. .codec_dai_name = "snd-soc-dummy-dai",
  5303. .codec_name = "snd-soc-dummy",
  5304. .ignore_suspend = 1,
  5305. /* this dainlink has playback support */
  5306. .ignore_pmdown_time = 1,
  5307. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  5308. },
  5309. /* Hostless PCM purpose */
  5310. {/* hw:x,5 */
  5311. .name = "SLIMBUS_0 Hostless",
  5312. .stream_name = "SLIMBUS_0 Hostless",
  5313. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  5314. .platform_name = "msm-pcm-hostless",
  5315. .dynamic = 1,
  5316. .dpcm_playback = 1,
  5317. .dpcm_capture = 1,
  5318. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5319. SND_SOC_DPCM_TRIGGER_POST},
  5320. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5321. .ignore_suspend = 1,
  5322. /* this dailink has playback support */
  5323. .ignore_pmdown_time = 1,
  5324. .codec_dai_name = "snd-soc-dummy-dai",
  5325. .codec_name = "snd-soc-dummy",
  5326. },
  5327. {/* hw:x,6 */
  5328. .name = "MSM AFE-PCM RX",
  5329. .stream_name = "AFE-PROXY RX",
  5330. .cpu_dai_name = "msm-dai-q6-dev.241",
  5331. .codec_name = "msm-stub-codec.1",
  5332. .codec_dai_name = "msm-stub-rx",
  5333. .platform_name = "msm-pcm-afe",
  5334. .dpcm_playback = 1,
  5335. .ignore_suspend = 1,
  5336. /* this dainlink has playback support */
  5337. .ignore_pmdown_time = 1,
  5338. },
  5339. {/* hw:x,7 */
  5340. .name = "MSM AFE-PCM TX",
  5341. .stream_name = "AFE-PROXY TX",
  5342. .cpu_dai_name = "msm-dai-q6-dev.240",
  5343. .codec_name = "msm-stub-codec.1",
  5344. .codec_dai_name = "msm-stub-tx",
  5345. .platform_name = "msm-pcm-afe",
  5346. .dpcm_capture = 1,
  5347. .ignore_suspend = 1,
  5348. },
  5349. {/* hw:x,8 */
  5350. .name = MSM_DAILINK_NAME(Compress1),
  5351. .stream_name = "Compress1",
  5352. .cpu_dai_name = "MultiMedia4",
  5353. .platform_name = "msm-compress-dsp",
  5354. .dynamic = 1,
  5355. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  5356. .dpcm_playback = 1,
  5357. .dpcm_capture = 1,
  5358. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5359. SND_SOC_DPCM_TRIGGER_POST},
  5360. .codec_dai_name = "snd-soc-dummy-dai",
  5361. .codec_name = "snd-soc-dummy",
  5362. .ignore_suspend = 1,
  5363. .ignore_pmdown_time = 1,
  5364. /* this dainlink has playback support */
  5365. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  5366. },
  5367. {/* hw:x,9 */
  5368. .name = "AUXPCM Hostless",
  5369. .stream_name = "AUXPCM Hostless",
  5370. .cpu_dai_name = "AUXPCM_HOSTLESS",
  5371. .platform_name = "msm-pcm-hostless",
  5372. .dynamic = 1,
  5373. .dpcm_playback = 1,
  5374. .dpcm_capture = 1,
  5375. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5376. SND_SOC_DPCM_TRIGGER_POST},
  5377. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5378. .ignore_suspend = 1,
  5379. /* this dainlink has playback support */
  5380. .ignore_pmdown_time = 1,
  5381. .codec_dai_name = "snd-soc-dummy-dai",
  5382. .codec_name = "snd-soc-dummy",
  5383. },
  5384. {/* hw:x,10 */
  5385. .name = "SLIMBUS_1 Hostless",
  5386. .stream_name = "SLIMBUS_1 Hostless",
  5387. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  5388. .platform_name = "msm-pcm-hostless",
  5389. .dynamic = 1,
  5390. .dpcm_playback = 1,
  5391. .dpcm_capture = 1,
  5392. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5393. SND_SOC_DPCM_TRIGGER_POST},
  5394. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5395. .ignore_suspend = 1,
  5396. /* this dailink has playback support */
  5397. .ignore_pmdown_time = 1,
  5398. .codec_dai_name = "snd-soc-dummy-dai",
  5399. .codec_name = "snd-soc-dummy",
  5400. },
  5401. {/* hw:x,11 */
  5402. .name = "SLIMBUS_3 Hostless",
  5403. .stream_name = "SLIMBUS_3 Hostless",
  5404. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  5405. .platform_name = "msm-pcm-hostless",
  5406. .dynamic = 1,
  5407. .dpcm_playback = 1,
  5408. .dpcm_capture = 1,
  5409. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5410. SND_SOC_DPCM_TRIGGER_POST},
  5411. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5412. .ignore_suspend = 1,
  5413. /* this dailink has playback support */
  5414. .ignore_pmdown_time = 1,
  5415. .codec_dai_name = "snd-soc-dummy-dai",
  5416. .codec_name = "snd-soc-dummy",
  5417. },
  5418. {/* hw:x,12 */
  5419. .name = "SLIMBUS_7 Hostless",
  5420. .stream_name = "SLIMBUS_7 Hostless",
  5421. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  5422. .platform_name = "msm-pcm-hostless",
  5423. .dynamic = 1,
  5424. .dpcm_playback = 1,
  5425. .dpcm_capture = 1,
  5426. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5427. SND_SOC_DPCM_TRIGGER_POST},
  5428. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5429. .ignore_suspend = 1,
  5430. /* this dailink has playback support */
  5431. .ignore_pmdown_time = 1,
  5432. .codec_dai_name = "snd-soc-dummy-dai",
  5433. .codec_name = "snd-soc-dummy",
  5434. },
  5435. {/* hw:x,13 */
  5436. .name = MSM_DAILINK_NAME(LowLatency),
  5437. .stream_name = "MultiMedia5",
  5438. .cpu_dai_name = "MultiMedia5",
  5439. .platform_name = "msm-pcm-dsp.1",
  5440. .dynamic = 1,
  5441. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5442. .dpcm_playback = 1,
  5443. .dpcm_capture = 1,
  5444. .codec_dai_name = "snd-soc-dummy-dai",
  5445. .codec_name = "snd-soc-dummy",
  5446. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5447. SND_SOC_DPCM_TRIGGER_POST},
  5448. .ignore_suspend = 1,
  5449. /* this dainlink has playback support */
  5450. .ignore_pmdown_time = 1,
  5451. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  5452. .ops = &msm_fe_qos_ops,
  5453. },
  5454. {/* hw:x,14 */
  5455. .name = "Listen 1 Audio Service",
  5456. .stream_name = "Listen 1 Audio Service",
  5457. .cpu_dai_name = "LSM1",
  5458. .platform_name = "msm-lsm-client",
  5459. .dynamic = 1,
  5460. .dpcm_capture = 1,
  5461. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5462. SND_SOC_DPCM_TRIGGER_POST },
  5463. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5464. .ignore_suspend = 1,
  5465. .codec_dai_name = "snd-soc-dummy-dai",
  5466. .codec_name = "snd-soc-dummy",
  5467. .id = MSM_FRONTEND_DAI_LSM1,
  5468. },
  5469. /* Multiple Tunnel instances */
  5470. {/* hw:x,15 */
  5471. .name = MSM_DAILINK_NAME(Compress2),
  5472. .stream_name = "Compress2",
  5473. .cpu_dai_name = "MultiMedia7",
  5474. .platform_name = "msm-compress-dsp",
  5475. .dynamic = 1,
  5476. .dpcm_playback = 1,
  5477. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5478. SND_SOC_DPCM_TRIGGER_POST},
  5479. .codec_dai_name = "snd-soc-dummy-dai",
  5480. .codec_name = "snd-soc-dummy",
  5481. .ignore_suspend = 1,
  5482. .ignore_pmdown_time = 1,
  5483. /* this dainlink has playback support */
  5484. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  5485. },
  5486. {/* hw:x,16 */
  5487. .name = MSM_DAILINK_NAME(MultiMedia10),
  5488. .stream_name = "MultiMedia10",
  5489. .cpu_dai_name = "MultiMedia10",
  5490. .platform_name = "msm-pcm-dsp.1",
  5491. .dynamic = 1,
  5492. .dpcm_playback = 1,
  5493. .dpcm_capture = 1,
  5494. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5495. SND_SOC_DPCM_TRIGGER_POST},
  5496. .codec_dai_name = "snd-soc-dummy-dai",
  5497. .codec_name = "snd-soc-dummy",
  5498. .ignore_suspend = 1,
  5499. .ignore_pmdown_time = 1,
  5500. /* this dainlink has playback support */
  5501. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  5502. },
  5503. {/* hw:x,17 */
  5504. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  5505. .stream_name = "MM_NOIRQ",
  5506. .cpu_dai_name = "MultiMedia8",
  5507. .platform_name = "msm-pcm-dsp-noirq",
  5508. .dynamic = 1,
  5509. .dpcm_playback = 1,
  5510. .dpcm_capture = 1,
  5511. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5512. SND_SOC_DPCM_TRIGGER_POST},
  5513. .codec_dai_name = "snd-soc-dummy-dai",
  5514. .codec_name = "snd-soc-dummy",
  5515. .ignore_suspend = 1,
  5516. .ignore_pmdown_time = 1,
  5517. /* this dainlink has playback support */
  5518. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  5519. .ops = &msm_fe_qos_ops,
  5520. },
  5521. /* HDMI Hostless */
  5522. {/* hw:x,18 */
  5523. .name = "HDMI_RX_HOSTLESS",
  5524. .stream_name = "HDMI_RX_HOSTLESS",
  5525. .cpu_dai_name = "HDMI_HOSTLESS",
  5526. .platform_name = "msm-pcm-hostless",
  5527. .dynamic = 1,
  5528. .dpcm_playback = 1,
  5529. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5530. SND_SOC_DPCM_TRIGGER_POST},
  5531. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5532. .ignore_suspend = 1,
  5533. .ignore_pmdown_time = 1,
  5534. .codec_dai_name = "snd-soc-dummy-dai",
  5535. .codec_name = "snd-soc-dummy",
  5536. },
  5537. {/* hw:x,19 */
  5538. .name = "VoiceMMode2",
  5539. .stream_name = "VoiceMMode2",
  5540. .cpu_dai_name = "VoiceMMode2",
  5541. .platform_name = "msm-pcm-voice",
  5542. .dynamic = 1,
  5543. .dpcm_playback = 1,
  5544. .dpcm_capture = 1,
  5545. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5546. SND_SOC_DPCM_TRIGGER_POST},
  5547. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5548. .ignore_suspend = 1,
  5549. .ignore_pmdown_time = 1,
  5550. .codec_dai_name = "snd-soc-dummy-dai",
  5551. .codec_name = "snd-soc-dummy",
  5552. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  5553. },
  5554. /* LSM FE */
  5555. {/* hw:x,20 */
  5556. .name = "Listen 2 Audio Service",
  5557. .stream_name = "Listen 2 Audio Service",
  5558. .cpu_dai_name = "LSM2",
  5559. .platform_name = "msm-lsm-client",
  5560. .dynamic = 1,
  5561. .dpcm_capture = 1,
  5562. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5563. SND_SOC_DPCM_TRIGGER_POST },
  5564. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5565. .ignore_suspend = 1,
  5566. .codec_dai_name = "snd-soc-dummy-dai",
  5567. .codec_name = "snd-soc-dummy",
  5568. .id = MSM_FRONTEND_DAI_LSM2,
  5569. },
  5570. {/* hw:x,21 */
  5571. .name = "Listen 3 Audio Service",
  5572. .stream_name = "Listen 3 Audio Service",
  5573. .cpu_dai_name = "LSM3",
  5574. .platform_name = "msm-lsm-client",
  5575. .dynamic = 1,
  5576. .dpcm_capture = 1,
  5577. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5578. SND_SOC_DPCM_TRIGGER_POST },
  5579. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5580. .ignore_suspend = 1,
  5581. .codec_dai_name = "snd-soc-dummy-dai",
  5582. .codec_name = "snd-soc-dummy",
  5583. .id = MSM_FRONTEND_DAI_LSM3,
  5584. },
  5585. {/* hw:x,22 */
  5586. .name = "Listen 4 Audio Service",
  5587. .stream_name = "Listen 4 Audio Service",
  5588. .cpu_dai_name = "LSM4",
  5589. .platform_name = "msm-lsm-client",
  5590. .dynamic = 1,
  5591. .dpcm_capture = 1,
  5592. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5593. SND_SOC_DPCM_TRIGGER_POST },
  5594. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5595. .ignore_suspend = 1,
  5596. .codec_dai_name = "snd-soc-dummy-dai",
  5597. .codec_name = "snd-soc-dummy",
  5598. .id = MSM_FRONTEND_DAI_LSM4,
  5599. },
  5600. {/* hw:x,23 */
  5601. .name = "Listen 5 Audio Service",
  5602. .stream_name = "Listen 5 Audio Service",
  5603. .cpu_dai_name = "LSM5",
  5604. .platform_name = "msm-lsm-client",
  5605. .dynamic = 1,
  5606. .dpcm_capture = 1,
  5607. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5608. SND_SOC_DPCM_TRIGGER_POST },
  5609. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5610. .ignore_suspend = 1,
  5611. .codec_dai_name = "snd-soc-dummy-dai",
  5612. .codec_name = "snd-soc-dummy",
  5613. .id = MSM_FRONTEND_DAI_LSM5,
  5614. },
  5615. {/* hw:x,24 */
  5616. .name = "Listen 6 Audio Service",
  5617. .stream_name = "Listen 6 Audio Service",
  5618. .cpu_dai_name = "LSM6",
  5619. .platform_name = "msm-lsm-client",
  5620. .dynamic = 1,
  5621. .dpcm_capture = 1,
  5622. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5623. SND_SOC_DPCM_TRIGGER_POST },
  5624. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5625. .ignore_suspend = 1,
  5626. .codec_dai_name = "snd-soc-dummy-dai",
  5627. .codec_name = "snd-soc-dummy",
  5628. .id = MSM_FRONTEND_DAI_LSM6,
  5629. },
  5630. {/* hw:x,25 */
  5631. .name = "Listen 7 Audio Service",
  5632. .stream_name = "Listen 7 Audio Service",
  5633. .cpu_dai_name = "LSM7",
  5634. .platform_name = "msm-lsm-client",
  5635. .dynamic = 1,
  5636. .dpcm_capture = 1,
  5637. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5638. SND_SOC_DPCM_TRIGGER_POST },
  5639. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5640. .ignore_suspend = 1,
  5641. .codec_dai_name = "snd-soc-dummy-dai",
  5642. .codec_name = "snd-soc-dummy",
  5643. .id = MSM_FRONTEND_DAI_LSM7,
  5644. },
  5645. {/* hw:x,26 */
  5646. .name = "Listen 8 Audio Service",
  5647. .stream_name = "Listen 8 Audio Service",
  5648. .cpu_dai_name = "LSM8",
  5649. .platform_name = "msm-lsm-client",
  5650. .dynamic = 1,
  5651. .dpcm_capture = 1,
  5652. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5653. SND_SOC_DPCM_TRIGGER_POST },
  5654. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5655. .ignore_suspend = 1,
  5656. .codec_dai_name = "snd-soc-dummy-dai",
  5657. .codec_name = "snd-soc-dummy",
  5658. .id = MSM_FRONTEND_DAI_LSM8,
  5659. },
  5660. {/* hw:x,27 */
  5661. .name = MSM_DAILINK_NAME(Media9),
  5662. .stream_name = "MultiMedia9",
  5663. .cpu_dai_name = "MultiMedia9",
  5664. .platform_name = "msm-pcm-dsp.0",
  5665. .dynamic = 1,
  5666. .dpcm_playback = 1,
  5667. .dpcm_capture = 1,
  5668. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5669. SND_SOC_DPCM_TRIGGER_POST},
  5670. .codec_dai_name = "snd-soc-dummy-dai",
  5671. .codec_name = "snd-soc-dummy",
  5672. .ignore_suspend = 1,
  5673. /* this dainlink has playback support */
  5674. .ignore_pmdown_time = 1,
  5675. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5676. },
  5677. {/* hw:x,28 */
  5678. .name = MSM_DAILINK_NAME(Compress4),
  5679. .stream_name = "Compress4",
  5680. .cpu_dai_name = "MultiMedia11",
  5681. .platform_name = "msm-compress-dsp",
  5682. .dynamic = 1,
  5683. .dpcm_playback = 1,
  5684. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5685. SND_SOC_DPCM_TRIGGER_POST},
  5686. .codec_dai_name = "snd-soc-dummy-dai",
  5687. .codec_name = "snd-soc-dummy",
  5688. .ignore_suspend = 1,
  5689. .ignore_pmdown_time = 1,
  5690. /* this dainlink has playback support */
  5691. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5692. },
  5693. {/* hw:x,29 */
  5694. .name = MSM_DAILINK_NAME(Compress5),
  5695. .stream_name = "Compress5",
  5696. .cpu_dai_name = "MultiMedia12",
  5697. .platform_name = "msm-compress-dsp",
  5698. .dynamic = 1,
  5699. .dpcm_playback = 1,
  5700. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5701. SND_SOC_DPCM_TRIGGER_POST},
  5702. .codec_dai_name = "snd-soc-dummy-dai",
  5703. .codec_name = "snd-soc-dummy",
  5704. .ignore_suspend = 1,
  5705. .ignore_pmdown_time = 1,
  5706. /* this dainlink has playback support */
  5707. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5708. },
  5709. {/* hw:x,30 */
  5710. .name = MSM_DAILINK_NAME(Compress6),
  5711. .stream_name = "Compress6",
  5712. .cpu_dai_name = "MultiMedia13",
  5713. .platform_name = "msm-compress-dsp",
  5714. .dynamic = 1,
  5715. .dpcm_playback = 1,
  5716. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5717. SND_SOC_DPCM_TRIGGER_POST},
  5718. .codec_dai_name = "snd-soc-dummy-dai",
  5719. .codec_name = "snd-soc-dummy",
  5720. .ignore_suspend = 1,
  5721. .ignore_pmdown_time = 1,
  5722. /* this dainlink has playback support */
  5723. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5724. },
  5725. {/* hw:x,31 */
  5726. .name = MSM_DAILINK_NAME(Compress7),
  5727. .stream_name = "Compress7",
  5728. .cpu_dai_name = "MultiMedia14",
  5729. .platform_name = "msm-compress-dsp",
  5730. .dynamic = 1,
  5731. .dpcm_playback = 1,
  5732. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5733. SND_SOC_DPCM_TRIGGER_POST},
  5734. .codec_dai_name = "snd-soc-dummy-dai",
  5735. .codec_name = "snd-soc-dummy",
  5736. .ignore_suspend = 1,
  5737. .ignore_pmdown_time = 1,
  5738. /* this dainlink has playback support */
  5739. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5740. },
  5741. {/* hw:x,32 */
  5742. .name = MSM_DAILINK_NAME(Compress8),
  5743. .stream_name = "Compress8",
  5744. .cpu_dai_name = "MultiMedia15",
  5745. .platform_name = "msm-compress-dsp",
  5746. .dynamic = 1,
  5747. .dpcm_playback = 1,
  5748. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5749. SND_SOC_DPCM_TRIGGER_POST},
  5750. .codec_dai_name = "snd-soc-dummy-dai",
  5751. .codec_name = "snd-soc-dummy",
  5752. .ignore_suspend = 1,
  5753. .ignore_pmdown_time = 1,
  5754. /* this dainlink has playback support */
  5755. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5756. },
  5757. {/* hw:x,33 */
  5758. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5759. .stream_name = "MM_NOIRQ_2",
  5760. .cpu_dai_name = "MultiMedia16",
  5761. .platform_name = "msm-pcm-dsp-noirq",
  5762. .dynamic = 1,
  5763. .dpcm_playback = 1,
  5764. .dpcm_capture = 1,
  5765. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5766. SND_SOC_DPCM_TRIGGER_POST},
  5767. .codec_dai_name = "snd-soc-dummy-dai",
  5768. .codec_name = "snd-soc-dummy",
  5769. .ignore_suspend = 1,
  5770. .ignore_pmdown_time = 1,
  5771. /* this dainlink has playback support */
  5772. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5773. },
  5774. {/* hw:x,34 */
  5775. .name = "SLIMBUS_8 Hostless",
  5776. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5777. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5778. .platform_name = "msm-pcm-hostless",
  5779. .dynamic = 1,
  5780. .dpcm_capture = 1,
  5781. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5782. SND_SOC_DPCM_TRIGGER_POST},
  5783. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5784. .ignore_suspend = 1,
  5785. .codec_dai_name = "snd-soc-dummy-dai",
  5786. .codec_name = "snd-soc-dummy",
  5787. },
  5788. {/* hw:x,35 */
  5789. .name = "CDC_DMA Hostless",
  5790. .stream_name = "CDC_DMA Hostless",
  5791. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  5792. .platform_name = "msm-pcm-hostless",
  5793. .dynamic = 1,
  5794. .dpcm_playback = 1,
  5795. .dpcm_capture = 1,
  5796. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5797. SND_SOC_DPCM_TRIGGER_POST},
  5798. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5799. .ignore_suspend = 1,
  5800. /* this dailink has playback support */
  5801. .ignore_pmdown_time = 1,
  5802. .codec_dai_name = "snd-soc-dummy-dai",
  5803. .codec_name = "snd-soc-dummy",
  5804. },
  5805. {/* hw:x,36 */
  5806. .name = "TX3_CDC_DMA Hostless",
  5807. .stream_name = "TX3_CDC_DMA Hostless",
  5808. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  5809. .platform_name = "msm-pcm-hostless",
  5810. .dynamic = 1,
  5811. .dpcm_capture = 1,
  5812. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5813. SND_SOC_DPCM_TRIGGER_POST},
  5814. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5815. .ignore_suspend = 1,
  5816. .codec_dai_name = "snd-soc-dummy-dai",
  5817. .codec_name = "snd-soc-dummy",
  5818. },
  5819. };
  5820. static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
  5821. {/* hw:x,37 */
  5822. .name = LPASS_BE_SLIMBUS_4_TX,
  5823. .stream_name = "Slimbus4 Capture",
  5824. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5825. .platform_name = "msm-pcm-hostless",
  5826. .codec_name = "tavil_codec",
  5827. .codec_dai_name = "tavil_vifeedback",
  5828. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5829. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5830. .ops = &msm_be_ops,
  5831. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5832. .ignore_suspend = 1,
  5833. },
  5834. /* Ultrasound RX DAI Link */
  5835. {/* hw:x,38 */
  5836. .name = "SLIMBUS_2 Hostless Playback",
  5837. .stream_name = "SLIMBUS_2 Hostless Playback",
  5838. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5839. .platform_name = "msm-pcm-hostless",
  5840. .codec_name = "tavil_codec",
  5841. .codec_dai_name = "tavil_rx2",
  5842. .ignore_suspend = 1,
  5843. .ignore_pmdown_time = 1,
  5844. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5845. .ops = &msm_slimbus_2_be_ops,
  5846. },
  5847. /* Ultrasound TX DAI Link */
  5848. {/* hw:x,39 */
  5849. .name = "SLIMBUS_2 Hostless Capture",
  5850. .stream_name = "SLIMBUS_2 Hostless Capture",
  5851. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5852. .platform_name = "msm-pcm-hostless",
  5853. .codec_name = "tavil_codec",
  5854. .codec_dai_name = "tavil_tx2",
  5855. .ignore_suspend = 1,
  5856. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5857. .ops = &msm_slimbus_2_be_ops,
  5858. },
  5859. };
  5860. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  5861. {/* hw:x,37 */
  5862. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  5863. .stream_name = "WSA CDC DMA0 Capture",
  5864. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  5865. .platform_name = "msm-pcm-hostless",
  5866. .codec_name = "bolero_codec",
  5867. .codec_dai_name = "wsa_macro_vifeedback",
  5868. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  5869. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5870. .ignore_suspend = 1,
  5871. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5872. .ops = &msm_cdc_dma_be_ops,
  5873. },
  5874. };
  5875. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  5876. {
  5877. .name = MSM_DAILINK_NAME(ASM Loopback),
  5878. .stream_name = "MultiMedia6",
  5879. .cpu_dai_name = "MultiMedia6",
  5880. .platform_name = "msm-pcm-loopback",
  5881. .dynamic = 1,
  5882. .dpcm_playback = 1,
  5883. .dpcm_capture = 1,
  5884. .codec_dai_name = "snd-soc-dummy-dai",
  5885. .codec_name = "snd-soc-dummy",
  5886. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5887. SND_SOC_DPCM_TRIGGER_POST},
  5888. .ignore_suspend = 1,
  5889. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5890. .ignore_pmdown_time = 1,
  5891. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  5892. },
  5893. {
  5894. .name = "USB Audio Hostless",
  5895. .stream_name = "USB Audio Hostless",
  5896. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  5897. .platform_name = "msm-pcm-hostless",
  5898. .dynamic = 1,
  5899. .dpcm_playback = 1,
  5900. .dpcm_capture = 1,
  5901. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5902. SND_SOC_DPCM_TRIGGER_POST},
  5903. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5904. .ignore_suspend = 1,
  5905. .ignore_pmdown_time = 1,
  5906. .codec_dai_name = "snd-soc-dummy-dai",
  5907. .codec_name = "snd-soc-dummy",
  5908. },
  5909. };
  5910. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  5911. /* Backend AFE DAI Links */
  5912. {
  5913. .name = LPASS_BE_AFE_PCM_RX,
  5914. .stream_name = "AFE Playback",
  5915. .cpu_dai_name = "msm-dai-q6-dev.224",
  5916. .platform_name = "msm-pcm-routing",
  5917. .codec_name = "msm-stub-codec.1",
  5918. .codec_dai_name = "msm-stub-rx",
  5919. .no_pcm = 1,
  5920. .dpcm_playback = 1,
  5921. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  5922. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5923. /* this dainlink has playback support */
  5924. .ignore_pmdown_time = 1,
  5925. .ignore_suspend = 1,
  5926. },
  5927. {
  5928. .name = LPASS_BE_AFE_PCM_TX,
  5929. .stream_name = "AFE Capture",
  5930. .cpu_dai_name = "msm-dai-q6-dev.225",
  5931. .platform_name = "msm-pcm-routing",
  5932. .codec_name = "msm-stub-codec.1",
  5933. .codec_dai_name = "msm-stub-tx",
  5934. .no_pcm = 1,
  5935. .dpcm_capture = 1,
  5936. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  5937. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5938. .ignore_suspend = 1,
  5939. },
  5940. /* Incall Record Uplink BACK END DAI Link */
  5941. {
  5942. .name = LPASS_BE_INCALL_RECORD_TX,
  5943. .stream_name = "Voice Uplink Capture",
  5944. .cpu_dai_name = "msm-dai-q6-dev.32772",
  5945. .platform_name = "msm-pcm-routing",
  5946. .codec_name = "msm-stub-codec.1",
  5947. .codec_dai_name = "msm-stub-tx",
  5948. .no_pcm = 1,
  5949. .dpcm_capture = 1,
  5950. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  5951. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5952. .ignore_suspend = 1,
  5953. },
  5954. /* Incall Record Downlink BACK END DAI Link */
  5955. {
  5956. .name = LPASS_BE_INCALL_RECORD_RX,
  5957. .stream_name = "Voice Downlink Capture",
  5958. .cpu_dai_name = "msm-dai-q6-dev.32771",
  5959. .platform_name = "msm-pcm-routing",
  5960. .codec_name = "msm-stub-codec.1",
  5961. .codec_dai_name = "msm-stub-tx",
  5962. .no_pcm = 1,
  5963. .dpcm_capture = 1,
  5964. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  5965. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5966. .ignore_suspend = 1,
  5967. },
  5968. /* Incall Music BACK END DAI Link */
  5969. {
  5970. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  5971. .stream_name = "Voice Farend Playback",
  5972. .cpu_dai_name = "msm-dai-q6-dev.32773",
  5973. .platform_name = "msm-pcm-routing",
  5974. .codec_name = "msm-stub-codec.1",
  5975. .codec_dai_name = "msm-stub-rx",
  5976. .no_pcm = 1,
  5977. .dpcm_playback = 1,
  5978. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  5979. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5980. .ignore_suspend = 1,
  5981. .ignore_pmdown_time = 1,
  5982. },
  5983. /* Incall Music 2 BACK END DAI Link */
  5984. {
  5985. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  5986. .stream_name = "Voice2 Farend Playback",
  5987. .cpu_dai_name = "msm-dai-q6-dev.32770",
  5988. .platform_name = "msm-pcm-routing",
  5989. .codec_name = "msm-stub-codec.1",
  5990. .codec_dai_name = "msm-stub-rx",
  5991. .no_pcm = 1,
  5992. .dpcm_playback = 1,
  5993. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  5994. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5995. .ignore_suspend = 1,
  5996. .ignore_pmdown_time = 1,
  5997. },
  5998. {
  5999. .name = LPASS_BE_USB_AUDIO_RX,
  6000. .stream_name = "USB Audio Playback",
  6001. .cpu_dai_name = "msm-dai-q6-dev.28672",
  6002. .platform_name = "msm-pcm-routing",
  6003. .codec_name = "msm-stub-codec.1",
  6004. .codec_dai_name = "msm-stub-rx",
  6005. .no_pcm = 1,
  6006. .dpcm_playback = 1,
  6007. .id = MSM_BACKEND_DAI_USB_RX,
  6008. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6009. .ignore_pmdown_time = 1,
  6010. .ignore_suspend = 1,
  6011. },
  6012. {
  6013. .name = LPASS_BE_USB_AUDIO_TX,
  6014. .stream_name = "USB Audio Capture",
  6015. .cpu_dai_name = "msm-dai-q6-dev.28673",
  6016. .platform_name = "msm-pcm-routing",
  6017. .codec_name = "msm-stub-codec.1",
  6018. .codec_dai_name = "msm-stub-tx",
  6019. .no_pcm = 1,
  6020. .dpcm_capture = 1,
  6021. .id = MSM_BACKEND_DAI_USB_TX,
  6022. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6023. .ignore_suspend = 1,
  6024. },
  6025. {
  6026. .name = LPASS_BE_PRI_TDM_RX_0,
  6027. .stream_name = "Primary TDM0 Playback",
  6028. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  6029. .platform_name = "msm-pcm-routing",
  6030. .codec_name = "msm-stub-codec.1",
  6031. .codec_dai_name = "msm-stub-rx",
  6032. .no_pcm = 1,
  6033. .dpcm_playback = 1,
  6034. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  6035. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6036. .ops = &sm6150_tdm_be_ops,
  6037. .ignore_suspend = 1,
  6038. .ignore_pmdown_time = 1,
  6039. },
  6040. {
  6041. .name = LPASS_BE_PRI_TDM_TX_0,
  6042. .stream_name = "Primary TDM0 Capture",
  6043. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  6044. .platform_name = "msm-pcm-routing",
  6045. .codec_name = "msm-stub-codec.1",
  6046. .codec_dai_name = "msm-stub-tx",
  6047. .no_pcm = 1,
  6048. .dpcm_capture = 1,
  6049. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  6050. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6051. .ops = &sm6150_tdm_be_ops,
  6052. .ignore_suspend = 1,
  6053. },
  6054. {
  6055. .name = LPASS_BE_SEC_TDM_RX_0,
  6056. .stream_name = "Secondary TDM0 Playback",
  6057. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  6058. .platform_name = "msm-pcm-routing",
  6059. .codec_name = "msm-stub-codec.1",
  6060. .codec_dai_name = "msm-stub-rx",
  6061. .no_pcm = 1,
  6062. .dpcm_playback = 1,
  6063. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  6064. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6065. .ops = &sm6150_tdm_be_ops,
  6066. .ignore_suspend = 1,
  6067. .ignore_pmdown_time = 1,
  6068. },
  6069. {
  6070. .name = LPASS_BE_SEC_TDM_TX_0,
  6071. .stream_name = "Secondary TDM0 Capture",
  6072. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  6073. .platform_name = "msm-pcm-routing",
  6074. .codec_name = "msm-stub-codec.1",
  6075. .codec_dai_name = "msm-stub-tx",
  6076. .no_pcm = 1,
  6077. .dpcm_capture = 1,
  6078. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  6079. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6080. .ops = &sm6150_tdm_be_ops,
  6081. .ignore_suspend = 1,
  6082. },
  6083. {
  6084. .name = LPASS_BE_TERT_TDM_RX_0,
  6085. .stream_name = "Tertiary TDM0 Playback",
  6086. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  6087. .platform_name = "msm-pcm-routing",
  6088. .codec_name = "msm-stub-codec.1",
  6089. .codec_dai_name = "msm-stub-rx",
  6090. .no_pcm = 1,
  6091. .dpcm_playback = 1,
  6092. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  6093. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6094. .ops = &sm6150_tdm_be_ops,
  6095. .ignore_suspend = 1,
  6096. .ignore_pmdown_time = 1,
  6097. },
  6098. {
  6099. .name = LPASS_BE_TERT_TDM_TX_0,
  6100. .stream_name = "Tertiary TDM0 Capture",
  6101. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  6102. .platform_name = "msm-pcm-routing",
  6103. .codec_name = "msm-stub-codec.1",
  6104. .codec_dai_name = "msm-stub-tx",
  6105. .no_pcm = 1,
  6106. .dpcm_capture = 1,
  6107. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  6108. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6109. .ops = &sm6150_tdm_be_ops,
  6110. .ignore_suspend = 1,
  6111. },
  6112. {
  6113. .name = LPASS_BE_QUAT_TDM_RX_0,
  6114. .stream_name = "Quaternary TDM0 Playback",
  6115. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  6116. .platform_name = "msm-pcm-routing",
  6117. .codec_name = "msm-stub-codec.1",
  6118. .codec_dai_name = "msm-stub-rx",
  6119. .no_pcm = 1,
  6120. .dpcm_playback = 1,
  6121. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  6122. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  6123. .ops = &sm6150_tdm_be_ops,
  6124. .ignore_suspend = 1,
  6125. .ignore_pmdown_time = 1,
  6126. },
  6127. {
  6128. .name = LPASS_BE_QUAT_TDM_TX_0,
  6129. .stream_name = "Quaternary TDM0 Capture",
  6130. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  6131. .platform_name = "msm-pcm-routing",
  6132. .codec_name = "msm-stub-codec.1",
  6133. .codec_dai_name = "msm-stub-tx",
  6134. .no_pcm = 1,
  6135. .dpcm_capture = 1,
  6136. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  6137. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6138. .ops = &sm6150_tdm_be_ops,
  6139. .ignore_suspend = 1,
  6140. },
  6141. };
  6142. static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
  6143. {
  6144. .name = LPASS_BE_SLIMBUS_0_RX,
  6145. .stream_name = "Slimbus Playback",
  6146. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6147. .platform_name = "msm-pcm-routing",
  6148. .codec_name = "tavil_codec",
  6149. .codec_dai_name = "tavil_rx1",
  6150. .no_pcm = 1,
  6151. .dpcm_playback = 1,
  6152. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6153. .init = &msm_audrx_tavil_init,
  6154. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6155. /* this dainlink has playback support */
  6156. .ignore_pmdown_time = 1,
  6157. .ignore_suspend = 1,
  6158. .ops = &msm_be_ops,
  6159. },
  6160. {
  6161. .name = LPASS_BE_SLIMBUS_0_TX,
  6162. .stream_name = "Slimbus Capture",
  6163. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6164. .platform_name = "msm-pcm-routing",
  6165. .codec_name = "tavil_codec",
  6166. .codec_dai_name = "tavil_tx1",
  6167. .no_pcm = 1,
  6168. .dpcm_capture = 1,
  6169. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6170. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6171. .ignore_suspend = 1,
  6172. .ops = &msm_be_ops,
  6173. },
  6174. {
  6175. .name = LPASS_BE_SLIMBUS_1_RX,
  6176. .stream_name = "Slimbus1 Playback",
  6177. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6178. .platform_name = "msm-pcm-routing",
  6179. .codec_name = "tavil_codec",
  6180. .codec_dai_name = "tavil_rx1",
  6181. .no_pcm = 1,
  6182. .dpcm_playback = 1,
  6183. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6184. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6185. .ops = &msm_be_ops,
  6186. /* dai link has playback support */
  6187. .ignore_pmdown_time = 1,
  6188. .ignore_suspend = 1,
  6189. },
  6190. {
  6191. .name = LPASS_BE_SLIMBUS_1_TX,
  6192. .stream_name = "Slimbus1 Capture",
  6193. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6194. .platform_name = "msm-pcm-routing",
  6195. .codec_name = "tavil_codec",
  6196. .codec_dai_name = "tavil_tx3",
  6197. .no_pcm = 1,
  6198. .dpcm_capture = 1,
  6199. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6200. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6201. .ops = &msm_be_ops,
  6202. .ignore_suspend = 1,
  6203. },
  6204. {
  6205. .name = LPASS_BE_SLIMBUS_2_RX,
  6206. .stream_name = "Slimbus2 Playback",
  6207. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6208. .platform_name = "msm-pcm-routing",
  6209. .codec_name = "tavil_codec",
  6210. .codec_dai_name = "tavil_rx2",
  6211. .no_pcm = 1,
  6212. .dpcm_playback = 1,
  6213. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  6214. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6215. .ops = &msm_be_ops,
  6216. .ignore_pmdown_time = 1,
  6217. .ignore_suspend = 1,
  6218. },
  6219. {
  6220. .name = LPASS_BE_SLIMBUS_3_RX,
  6221. .stream_name = "Slimbus3 Playback",
  6222. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6223. .platform_name = "msm-pcm-routing",
  6224. .codec_name = "tavil_codec",
  6225. .codec_dai_name = "tavil_rx1",
  6226. .no_pcm = 1,
  6227. .dpcm_playback = 1,
  6228. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6229. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6230. .ops = &msm_be_ops,
  6231. /* dai link has playback support */
  6232. .ignore_pmdown_time = 1,
  6233. .ignore_suspend = 1,
  6234. },
  6235. {
  6236. .name = LPASS_BE_SLIMBUS_3_TX,
  6237. .stream_name = "Slimbus3 Capture",
  6238. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6239. .platform_name = "msm-pcm-routing",
  6240. .codec_name = "tavil_codec",
  6241. .codec_dai_name = "tavil_tx1",
  6242. .no_pcm = 1,
  6243. .dpcm_capture = 1,
  6244. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6245. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6246. .ops = &msm_be_ops,
  6247. .ignore_suspend = 1,
  6248. },
  6249. {
  6250. .name = LPASS_BE_SLIMBUS_4_RX,
  6251. .stream_name = "Slimbus4 Playback",
  6252. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6253. .platform_name = "msm-pcm-routing",
  6254. .codec_name = "tavil_codec",
  6255. .codec_dai_name = "tavil_rx1",
  6256. .no_pcm = 1,
  6257. .dpcm_playback = 1,
  6258. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6259. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6260. .ops = &msm_be_ops,
  6261. /* dai link has playback support */
  6262. .ignore_pmdown_time = 1,
  6263. .ignore_suspend = 1,
  6264. },
  6265. {
  6266. .name = LPASS_BE_SLIMBUS_5_RX,
  6267. .stream_name = "Slimbus5 Playback",
  6268. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6269. .platform_name = "msm-pcm-routing",
  6270. .codec_name = "tavil_codec",
  6271. .codec_dai_name = "tavil_rx3",
  6272. .no_pcm = 1,
  6273. .dpcm_playback = 1,
  6274. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6275. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6276. .ops = &msm_be_ops,
  6277. /* dai link has playback support */
  6278. .ignore_pmdown_time = 1,
  6279. .ignore_suspend = 1,
  6280. },
  6281. /* MAD BE */
  6282. {
  6283. .name = LPASS_BE_SLIMBUS_5_TX,
  6284. .stream_name = "Slimbus5 Capture",
  6285. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6286. .platform_name = "msm-pcm-routing",
  6287. .codec_name = "tavil_codec",
  6288. .codec_dai_name = "tavil_mad1",
  6289. .no_pcm = 1,
  6290. .dpcm_capture = 1,
  6291. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6292. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6293. .ops = &msm_be_ops,
  6294. .ignore_suspend = 1,
  6295. },
  6296. {
  6297. .name = LPASS_BE_SLIMBUS_6_RX,
  6298. .stream_name = "Slimbus6 Playback",
  6299. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6300. .platform_name = "msm-pcm-routing",
  6301. .codec_name = "tavil_codec",
  6302. .codec_dai_name = "tavil_rx4",
  6303. .no_pcm = 1,
  6304. .dpcm_playback = 1,
  6305. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6306. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6307. .ops = &msm_be_ops,
  6308. /* dai link has playback support */
  6309. .ignore_pmdown_time = 1,
  6310. .ignore_suspend = 1,
  6311. },
  6312. /* Slimbus VI Recording */
  6313. {
  6314. .name = LPASS_BE_SLIMBUS_TX_VI,
  6315. .stream_name = "Slimbus4 Capture",
  6316. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6317. .platform_name = "msm-pcm-routing",
  6318. .codec_name = "tavil_codec",
  6319. .codec_dai_name = "tavil_vifeedback",
  6320. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6321. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6322. .ops = &msm_be_ops,
  6323. .ignore_suspend = 1,
  6324. .no_pcm = 1,
  6325. .dpcm_capture = 1,
  6326. },
  6327. };
  6328. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  6329. {
  6330. .name = LPASS_BE_SLIMBUS_7_RX,
  6331. .stream_name = "Slimbus7 Playback",
  6332. .cpu_dai_name = "msm-dai-q6-dev.16398",
  6333. .platform_name = "msm-pcm-routing",
  6334. .codec_name = "btfmslim_slave",
  6335. /* BT codec driver determines capabilities based on
  6336. * dai name, bt codecdai name should always contains
  6337. * supported usecase information
  6338. */
  6339. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  6340. .no_pcm = 1,
  6341. .dpcm_playback = 1,
  6342. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  6343. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6344. .ops = &msm_wcn_ops,
  6345. /* dai link has playback support */
  6346. .ignore_pmdown_time = 1,
  6347. .ignore_suspend = 1,
  6348. },
  6349. {
  6350. .name = LPASS_BE_SLIMBUS_7_TX,
  6351. .stream_name = "Slimbus7 Capture",
  6352. .cpu_dai_name = "msm-dai-q6-dev.16399",
  6353. .platform_name = "msm-pcm-routing",
  6354. .codec_name = "btfmslim_slave",
  6355. .codec_dai_name = "btfm_bt_sco_slim_tx",
  6356. .no_pcm = 1,
  6357. .dpcm_capture = 1,
  6358. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  6359. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6360. .ops = &msm_wcn_ops,
  6361. .ignore_suspend = 1,
  6362. },
  6363. {
  6364. .name = LPASS_BE_SLIMBUS_8_TX,
  6365. .stream_name = "Slimbus8 Capture",
  6366. .cpu_dai_name = "msm-dai-q6-dev.16401",
  6367. .platform_name = "msm-pcm-routing",
  6368. .codec_name = "btfmslim_slave",
  6369. .codec_dai_name = "btfm_fm_slim_tx",
  6370. .no_pcm = 1,
  6371. .dpcm_capture = 1,
  6372. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  6373. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6374. .init = &msm_wcn_init,
  6375. .ops = &msm_wcn_ops,
  6376. .ignore_suspend = 1,
  6377. },
  6378. };
  6379. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  6380. /* DISP PORT BACK END DAI Link */
  6381. {
  6382. .name = LPASS_BE_DISPLAY_PORT,
  6383. .stream_name = "Display Port Playback",
  6384. .cpu_dai_name = "msm-dai-q6-dp.24608",
  6385. .platform_name = "msm-pcm-routing",
  6386. .codec_name = "msm-ext-disp-audio-codec-rx",
  6387. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  6388. .no_pcm = 1,
  6389. .dpcm_playback = 1,
  6390. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  6391. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6392. .ignore_pmdown_time = 1,
  6393. .ignore_suspend = 1,
  6394. },
  6395. };
  6396. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  6397. {
  6398. .name = LPASS_BE_PRI_MI2S_RX,
  6399. .stream_name = "Primary MI2S Playback",
  6400. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6401. .platform_name = "msm-pcm-routing",
  6402. .codec_name = "msm-stub-codec.1",
  6403. .codec_dai_name = "msm-stub-rx",
  6404. .no_pcm = 1,
  6405. .dpcm_playback = 1,
  6406. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  6407. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6408. .ops = &msm_mi2s_be_ops,
  6409. .ignore_suspend = 1,
  6410. .ignore_pmdown_time = 1,
  6411. },
  6412. {
  6413. .name = LPASS_BE_PRI_MI2S_TX,
  6414. .stream_name = "Primary MI2S Capture",
  6415. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6416. .platform_name = "msm-pcm-routing",
  6417. .codec_name = "msm-stub-codec.1",
  6418. .codec_dai_name = "msm-stub-tx",
  6419. .no_pcm = 1,
  6420. .dpcm_capture = 1,
  6421. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  6422. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6423. .ops = &msm_mi2s_be_ops,
  6424. .ignore_suspend = 1,
  6425. },
  6426. {
  6427. .name = LPASS_BE_SEC_MI2S_RX,
  6428. .stream_name = "Secondary MI2S Playback",
  6429. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6430. .platform_name = "msm-pcm-routing",
  6431. .codec_name = "msm-stub-codec.1",
  6432. .codec_dai_name = "msm-stub-rx",
  6433. .no_pcm = 1,
  6434. .dpcm_playback = 1,
  6435. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  6436. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6437. .ops = &msm_mi2s_be_ops,
  6438. .ignore_suspend = 1,
  6439. .ignore_pmdown_time = 1,
  6440. },
  6441. {
  6442. .name = LPASS_BE_SEC_MI2S_TX,
  6443. .stream_name = "Secondary MI2S Capture",
  6444. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6445. .platform_name = "msm-pcm-routing",
  6446. .codec_name = "msm-stub-codec.1",
  6447. .codec_dai_name = "msm-stub-tx",
  6448. .no_pcm = 1,
  6449. .dpcm_capture = 1,
  6450. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  6451. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6452. .ops = &msm_mi2s_be_ops,
  6453. .ignore_suspend = 1,
  6454. },
  6455. {
  6456. .name = LPASS_BE_TERT_MI2S_RX,
  6457. .stream_name = "Tertiary MI2S Playback",
  6458. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6459. .platform_name = "msm-pcm-routing",
  6460. .codec_name = "msm-stub-codec.1",
  6461. .codec_dai_name = "msm-stub-rx",
  6462. .no_pcm = 1,
  6463. .dpcm_playback = 1,
  6464. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  6465. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6466. .ops = &msm_mi2s_be_ops,
  6467. .ignore_suspend = 1,
  6468. .ignore_pmdown_time = 1,
  6469. },
  6470. {
  6471. .name = LPASS_BE_TERT_MI2S_TX,
  6472. .stream_name = "Tertiary MI2S Capture",
  6473. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6474. .platform_name = "msm-pcm-routing",
  6475. .codec_name = "msm-stub-codec.1",
  6476. .codec_dai_name = "msm-stub-tx",
  6477. .no_pcm = 1,
  6478. .dpcm_capture = 1,
  6479. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  6480. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6481. .ops = &msm_mi2s_be_ops,
  6482. .ignore_suspend = 1,
  6483. },
  6484. {
  6485. .name = LPASS_BE_QUAT_MI2S_RX,
  6486. .stream_name = "Quaternary MI2S Playback",
  6487. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6488. .platform_name = "msm-pcm-routing",
  6489. .codec_name = "msm-stub-codec.1",
  6490. .codec_dai_name = "msm-stub-rx",
  6491. .no_pcm = 1,
  6492. .dpcm_playback = 1,
  6493. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  6494. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6495. .ops = &msm_mi2s_be_ops,
  6496. .ignore_suspend = 1,
  6497. .ignore_pmdown_time = 1,
  6498. },
  6499. {
  6500. .name = LPASS_BE_QUAT_MI2S_TX,
  6501. .stream_name = "Quaternary MI2S Capture",
  6502. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6503. .platform_name = "msm-pcm-routing",
  6504. .codec_name = "msm-stub-codec.1",
  6505. .codec_dai_name = "msm-stub-tx",
  6506. .no_pcm = 1,
  6507. .dpcm_capture = 1,
  6508. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  6509. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6510. .ops = &msm_mi2s_be_ops,
  6511. .ignore_suspend = 1,
  6512. },
  6513. {
  6514. .name = LPASS_BE_QUIN_MI2S_RX,
  6515. .stream_name = "Quinary MI2S Playback",
  6516. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6517. .platform_name = "msm-pcm-routing",
  6518. .codec_name = "msm-stub-codec.1",
  6519. .codec_dai_name = "msm-stub-rx",
  6520. .no_pcm = 1,
  6521. .dpcm_playback = 1,
  6522. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  6523. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6524. .ops = &msm_mi2s_be_ops,
  6525. .ignore_suspend = 1,
  6526. .ignore_pmdown_time = 1,
  6527. },
  6528. {
  6529. .name = LPASS_BE_QUIN_MI2S_TX,
  6530. .stream_name = "Quinary MI2S Capture",
  6531. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6532. .platform_name = "msm-pcm-routing",
  6533. .codec_name = "msm-stub-codec.1",
  6534. .codec_dai_name = "msm-stub-tx",
  6535. .no_pcm = 1,
  6536. .dpcm_capture = 1,
  6537. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  6538. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6539. .ops = &msm_mi2s_be_ops,
  6540. .ignore_suspend = 1,
  6541. },
  6542. };
  6543. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  6544. /* Primary AUX PCM Backend DAI Links */
  6545. {
  6546. .name = LPASS_BE_AUXPCM_RX,
  6547. .stream_name = "AUX PCM Playback",
  6548. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6549. .platform_name = "msm-pcm-routing",
  6550. .codec_name = "msm-stub-codec.1",
  6551. .codec_dai_name = "msm-stub-rx",
  6552. .no_pcm = 1,
  6553. .dpcm_playback = 1,
  6554. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  6555. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6556. .ignore_pmdown_time = 1,
  6557. .ignore_suspend = 1,
  6558. },
  6559. {
  6560. .name = LPASS_BE_AUXPCM_TX,
  6561. .stream_name = "AUX PCM Capture",
  6562. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6563. .platform_name = "msm-pcm-routing",
  6564. .codec_name = "msm-stub-codec.1",
  6565. .codec_dai_name = "msm-stub-tx",
  6566. .no_pcm = 1,
  6567. .dpcm_capture = 1,
  6568. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  6569. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6570. .ignore_suspend = 1,
  6571. },
  6572. /* Secondary AUX PCM Backend DAI Links */
  6573. {
  6574. .name = LPASS_BE_SEC_AUXPCM_RX,
  6575. .stream_name = "Sec AUX PCM Playback",
  6576. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6577. .platform_name = "msm-pcm-routing",
  6578. .codec_name = "msm-stub-codec.1",
  6579. .codec_dai_name = "msm-stub-rx",
  6580. .no_pcm = 1,
  6581. .dpcm_playback = 1,
  6582. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  6583. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6584. .ignore_pmdown_time = 1,
  6585. .ignore_suspend = 1,
  6586. },
  6587. {
  6588. .name = LPASS_BE_SEC_AUXPCM_TX,
  6589. .stream_name = "Sec AUX PCM Capture",
  6590. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6591. .platform_name = "msm-pcm-routing",
  6592. .codec_name = "msm-stub-codec.1",
  6593. .codec_dai_name = "msm-stub-tx",
  6594. .no_pcm = 1,
  6595. .dpcm_capture = 1,
  6596. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  6597. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6598. .ignore_suspend = 1,
  6599. },
  6600. /* Tertiary AUX PCM Backend DAI Links */
  6601. {
  6602. .name = LPASS_BE_TERT_AUXPCM_RX,
  6603. .stream_name = "Tert AUX PCM Playback",
  6604. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6605. .platform_name = "msm-pcm-routing",
  6606. .codec_name = "msm-stub-codec.1",
  6607. .codec_dai_name = "msm-stub-rx",
  6608. .no_pcm = 1,
  6609. .dpcm_playback = 1,
  6610. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  6611. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6612. .ignore_suspend = 1,
  6613. },
  6614. {
  6615. .name = LPASS_BE_TERT_AUXPCM_TX,
  6616. .stream_name = "Tert AUX PCM Capture",
  6617. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6618. .platform_name = "msm-pcm-routing",
  6619. .codec_name = "msm-stub-codec.1",
  6620. .codec_dai_name = "msm-stub-tx",
  6621. .no_pcm = 1,
  6622. .dpcm_capture = 1,
  6623. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  6624. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6625. .ignore_suspend = 1,
  6626. },
  6627. /* Quaternary AUX PCM Backend DAI Links */
  6628. {
  6629. .name = LPASS_BE_QUAT_AUXPCM_RX,
  6630. .stream_name = "Quat AUX PCM Playback",
  6631. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6632. .platform_name = "msm-pcm-routing",
  6633. .codec_name = "msm-stub-codec.1",
  6634. .codec_dai_name = "msm-stub-rx",
  6635. .no_pcm = 1,
  6636. .dpcm_playback = 1,
  6637. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  6638. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6639. .ignore_pmdown_time = 1,
  6640. .ignore_suspend = 1,
  6641. },
  6642. {
  6643. .name = LPASS_BE_QUAT_AUXPCM_TX,
  6644. .stream_name = "Quat AUX PCM Capture",
  6645. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6646. .platform_name = "msm-pcm-routing",
  6647. .codec_name = "msm-stub-codec.1",
  6648. .codec_dai_name = "msm-stub-tx",
  6649. .no_pcm = 1,
  6650. .dpcm_capture = 1,
  6651. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  6652. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6653. .ignore_suspend = 1,
  6654. },
  6655. /* Quinary AUX PCM Backend DAI Links */
  6656. {
  6657. .name = LPASS_BE_QUIN_AUXPCM_RX,
  6658. .stream_name = "Quin AUX PCM Playback",
  6659. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6660. .platform_name = "msm-pcm-routing",
  6661. .codec_name = "msm-stub-codec.1",
  6662. .codec_dai_name = "msm-stub-rx",
  6663. .no_pcm = 1,
  6664. .dpcm_playback = 1,
  6665. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  6666. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6667. .ignore_pmdown_time = 1,
  6668. .ignore_suspend = 1,
  6669. },
  6670. {
  6671. .name = LPASS_BE_QUIN_AUXPCM_TX,
  6672. .stream_name = "Quin AUX PCM Capture",
  6673. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6674. .platform_name = "msm-pcm-routing",
  6675. .codec_name = "msm-stub-codec.1",
  6676. .codec_dai_name = "msm-stub-tx",
  6677. .no_pcm = 1,
  6678. .dpcm_capture = 1,
  6679. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  6680. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6681. .ignore_suspend = 1,
  6682. },
  6683. };
  6684. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  6685. /* WSA CDC DMA Backend DAI Links */
  6686. {
  6687. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  6688. .stream_name = "WSA CDC DMA0 Playback",
  6689. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  6690. .platform_name = "msm-pcm-routing",
  6691. .codec_name = "bolero_codec",
  6692. .codec_dai_name = "wsa_macro_rx1",
  6693. .no_pcm = 1,
  6694. .dpcm_playback = 1,
  6695. .init = &msm_int_audrx_init,
  6696. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  6697. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6698. .ignore_pmdown_time = 1,
  6699. .ignore_suspend = 1,
  6700. .ops = &msm_cdc_dma_be_ops,
  6701. },
  6702. {
  6703. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  6704. .stream_name = "WSA CDC DMA1 Playback",
  6705. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  6706. .platform_name = "msm-pcm-routing",
  6707. .codec_name = "bolero_codec",
  6708. .codec_dai_name = "wsa_macro_rx_mix",
  6709. .no_pcm = 1,
  6710. .dpcm_playback = 1,
  6711. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  6712. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6713. .ignore_pmdown_time = 1,
  6714. .ignore_suspend = 1,
  6715. .ops = &msm_cdc_dma_be_ops,
  6716. },
  6717. {
  6718. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  6719. .stream_name = "WSA CDC DMA1 Capture",
  6720. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  6721. .platform_name = "msm-pcm-routing",
  6722. .codec_name = "bolero_codec",
  6723. .codec_dai_name = "wsa_macro_echo",
  6724. .no_pcm = 1,
  6725. .dpcm_capture = 1,
  6726. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  6727. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6728. .ignore_suspend = 1,
  6729. .ops = &msm_cdc_dma_be_ops,
  6730. },
  6731. };
  6732. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  6733. /* RX CDC DMA Backend DAI Links */
  6734. {
  6735. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  6736. .stream_name = "RX CDC DMA0 Playback",
  6737. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  6738. .platform_name = "msm-pcm-routing",
  6739. .codec_name = "bolero_codec",
  6740. .codec_dai_name = "rx_macro_rx1",
  6741. .no_pcm = 1,
  6742. .dpcm_playback = 1,
  6743. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  6744. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6745. .ignore_pmdown_time = 1,
  6746. .ignore_suspend = 1,
  6747. .ops = &msm_cdc_dma_be_ops,
  6748. },
  6749. {
  6750. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  6751. .stream_name = "RX CDC DMA1 Playback",
  6752. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  6753. .platform_name = "msm-pcm-routing",
  6754. .codec_name = "bolero_codec",
  6755. .codec_dai_name = "rx_macro_rx2",
  6756. .no_pcm = 1,
  6757. .dpcm_playback = 1,
  6758. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  6759. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6760. .ignore_pmdown_time = 1,
  6761. .ignore_suspend = 1,
  6762. .ops = &msm_cdc_dma_be_ops,
  6763. },
  6764. {
  6765. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  6766. .stream_name = "RX CDC DMA2 Playback",
  6767. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  6768. .platform_name = "msm-pcm-routing",
  6769. .codec_name = "bolero_codec",
  6770. .codec_dai_name = "rx_macro_rx3",
  6771. .no_pcm = 1,
  6772. .dpcm_playback = 1,
  6773. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  6774. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6775. .ignore_pmdown_time = 1,
  6776. .ignore_suspend = 1,
  6777. .ops = &msm_cdc_dma_be_ops,
  6778. },
  6779. {
  6780. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  6781. .stream_name = "RX CDC DMA3 Playback",
  6782. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  6783. .platform_name = "msm-pcm-routing",
  6784. .codec_name = "bolero_codec",
  6785. .codec_dai_name = "rx_macro_rx4",
  6786. .no_pcm = 1,
  6787. .dpcm_playback = 1,
  6788. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  6789. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6790. .ignore_pmdown_time = 1,
  6791. .ignore_suspend = 1,
  6792. .ops = &msm_cdc_dma_be_ops,
  6793. },
  6794. /* TX CDC DMA Backend DAI Links */
  6795. {
  6796. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  6797. .stream_name = "TX CDC DMA3 Capture",
  6798. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  6799. .platform_name = "msm-pcm-routing",
  6800. .codec_name = "bolero_codec",
  6801. .codec_dai_name = "tx_macro_tx1",
  6802. .no_pcm = 1,
  6803. .dpcm_capture = 1,
  6804. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  6805. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6806. .ignore_suspend = 1,
  6807. .ops = &msm_cdc_dma_be_ops,
  6808. },
  6809. {
  6810. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  6811. .stream_name = "TX CDC DMA4 Capture",
  6812. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  6813. .platform_name = "msm-pcm-routing",
  6814. .codec_name = "bolero_codec",
  6815. .codec_dai_name = "tx_macro_tx2",
  6816. .no_pcm = 1,
  6817. .dpcm_capture = 1,
  6818. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  6819. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6820. .ignore_suspend = 1,
  6821. .ops = &msm_cdc_dma_be_ops,
  6822. },
  6823. };
  6824. static struct snd_soc_dai_link msm_sm6150_dai_links[
  6825. ARRAY_SIZE(msm_common_dai_links) +
  6826. ARRAY_SIZE(msm_tavil_fe_dai_links) +
  6827. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  6828. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  6829. ARRAY_SIZE(msm_common_be_dai_links) +
  6830. ARRAY_SIZE(msm_tavil_be_dai_links) +
  6831. ARRAY_SIZE(msm_wcn_be_dai_links) +
  6832. ARRAY_SIZE(ext_disp_be_dai_link) +
  6833. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  6834. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  6835. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  6836. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  6837. static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
  6838. {
  6839. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  6840. struct snd_soc_pcm_runtime *rtd;
  6841. int ret = 0;
  6842. void *mbhc_calibration;
  6843. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  6844. if (!rtd) {
  6845. dev_err(card->dev,
  6846. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  6847. __func__, be_dl_name);
  6848. ret = -EINVAL;
  6849. goto err_pcm_runtime;
  6850. }
  6851. mbhc_calibration = def_wcd_mbhc_cal();
  6852. if (!mbhc_calibration) {
  6853. ret = -ENOMEM;
  6854. goto err_mbhc_cal;
  6855. }
  6856. wcd_mbhc_cfg.calibration = mbhc_calibration;
  6857. ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
  6858. if (ret) {
  6859. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  6860. __func__, ret);
  6861. goto err_hs_detect;
  6862. }
  6863. return 0;
  6864. err_hs_detect:
  6865. kfree(mbhc_calibration);
  6866. err_mbhc_cal:
  6867. err_pcm_runtime:
  6868. return ret;
  6869. }
  6870. static int msm_populate_dai_link_component_of_node(
  6871. struct snd_soc_card *card)
  6872. {
  6873. int i, index, ret = 0;
  6874. struct device *cdev = card->dev;
  6875. struct snd_soc_dai_link *dai_link = card->dai_link;
  6876. struct device_node *np;
  6877. if (!cdev) {
  6878. pr_err("%s: Sound card device memory NULL\n", __func__);
  6879. return -ENODEV;
  6880. }
  6881. for (i = 0; i < card->num_links; i++) {
  6882. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  6883. continue;
  6884. /* populate platform_of_node for snd card dai links */
  6885. if (dai_link[i].platform_name &&
  6886. !dai_link[i].platform_of_node) {
  6887. index = of_property_match_string(cdev->of_node,
  6888. "asoc-platform-names",
  6889. dai_link[i].platform_name);
  6890. if (index < 0) {
  6891. pr_err("%s: No match found for platform name: %s\n",
  6892. __func__, dai_link[i].platform_name);
  6893. ret = index;
  6894. goto err;
  6895. }
  6896. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  6897. index);
  6898. if (!np) {
  6899. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  6900. __func__, dai_link[i].platform_name,
  6901. index);
  6902. ret = -ENODEV;
  6903. goto err;
  6904. }
  6905. dai_link[i].platform_of_node = np;
  6906. dai_link[i].platform_name = NULL;
  6907. }
  6908. /* populate cpu_of_node for snd card dai links */
  6909. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  6910. index = of_property_match_string(cdev->of_node,
  6911. "asoc-cpu-names",
  6912. dai_link[i].cpu_dai_name);
  6913. if (index >= 0) {
  6914. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  6915. index);
  6916. if (!np) {
  6917. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  6918. __func__,
  6919. dai_link[i].cpu_dai_name);
  6920. ret = -ENODEV;
  6921. goto err;
  6922. }
  6923. dai_link[i].cpu_of_node = np;
  6924. dai_link[i].cpu_dai_name = NULL;
  6925. }
  6926. }
  6927. /* populate codec_of_node for snd card dai links */
  6928. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  6929. index = of_property_match_string(cdev->of_node,
  6930. "asoc-codec-names",
  6931. dai_link[i].codec_name);
  6932. if (index < 0)
  6933. continue;
  6934. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  6935. index);
  6936. if (!np) {
  6937. pr_err("%s: retrieving phandle for codec %s failed\n",
  6938. __func__, dai_link[i].codec_name);
  6939. ret = -ENODEV;
  6940. goto err;
  6941. }
  6942. dai_link[i].codec_of_node = np;
  6943. dai_link[i].codec_name = NULL;
  6944. }
  6945. }
  6946. err:
  6947. return ret;
  6948. }
  6949. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  6950. {
  6951. int ret = 0;
  6952. struct snd_soc_codec *codec = rtd->codec;
  6953. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  6954. ARRAY_SIZE(msm_tavil_snd_controls));
  6955. if (ret < 0) {
  6956. dev_err(codec->dev,
  6957. "%s: add_codec_controls failed, err = %d\n",
  6958. __func__, ret);
  6959. return ret;
  6960. }
  6961. return 0;
  6962. }
  6963. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  6964. struct snd_pcm_hw_params *params)
  6965. {
  6966. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  6967. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  6968. int ret = 0;
  6969. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  6970. 151};
  6971. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  6972. 134, 135, 136, 137, 138, 139,
  6973. 140, 141, 142, 143};
  6974. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  6975. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  6976. slim_rx_cfg[SLIM_RX_0].channels,
  6977. rx_ch);
  6978. if (ret < 0)
  6979. pr_err("%s: RX failed to set cpu chan map error %d\n",
  6980. __func__, ret);
  6981. } else {
  6982. ret = snd_soc_dai_set_channel_map(cpu_dai,
  6983. slim_tx_cfg[SLIM_TX_0].channels,
  6984. tx_ch, 0, 0);
  6985. if (ret < 0)
  6986. pr_err("%s: TX failed to set cpu chan map error %d\n",
  6987. __func__, ret);
  6988. }
  6989. return ret;
  6990. }
  6991. static struct snd_soc_ops msm_stub_be_ops = {
  6992. .hw_params = msm_snd_stub_hw_params,
  6993. };
  6994. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  6995. /* FrontEnd DAI Links */
  6996. {
  6997. .name = "MSMSTUB Media1",
  6998. .stream_name = "MultiMedia1",
  6999. .cpu_dai_name = "MultiMedia1",
  7000. .platform_name = "msm-pcm-dsp.0",
  7001. .dynamic = 1,
  7002. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  7003. .dpcm_playback = 1,
  7004. .dpcm_capture = 1,
  7005. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  7006. SND_SOC_DPCM_TRIGGER_POST},
  7007. .codec_dai_name = "snd-soc-dummy-dai",
  7008. .codec_name = "snd-soc-dummy",
  7009. .ignore_suspend = 1,
  7010. /* this dainlink has playback support */
  7011. .ignore_pmdown_time = 1,
  7012. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  7013. },
  7014. };
  7015. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  7016. /* Backend DAI Links */
  7017. {
  7018. .name = LPASS_BE_SLIMBUS_0_RX,
  7019. .stream_name = "Slimbus Playback",
  7020. .cpu_dai_name = "msm-dai-q6-dev.16384",
  7021. .platform_name = "msm-pcm-routing",
  7022. .codec_name = "msm-stub-codec.1",
  7023. .codec_dai_name = "msm-stub-rx",
  7024. .no_pcm = 1,
  7025. .dpcm_playback = 1,
  7026. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  7027. .init = &msm_audrx_stub_init,
  7028. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7029. .ignore_pmdown_time = 1, /* dai link has playback support */
  7030. .ignore_suspend = 1,
  7031. .ops = &msm_stub_be_ops,
  7032. },
  7033. {
  7034. .name = LPASS_BE_SLIMBUS_0_TX,
  7035. .stream_name = "Slimbus Capture",
  7036. .cpu_dai_name = "msm-dai-q6-dev.16385",
  7037. .platform_name = "msm-pcm-routing",
  7038. .codec_name = "msm-stub-codec.1",
  7039. .codec_dai_name = "msm-stub-tx",
  7040. .no_pcm = 1,
  7041. .dpcm_capture = 1,
  7042. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  7043. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7044. .ignore_suspend = 1,
  7045. .ops = &msm_stub_be_ops,
  7046. },
  7047. };
  7048. static struct snd_soc_dai_link msm_stub_dai_links[
  7049. ARRAY_SIZE(msm_stub_fe_dai_links) +
  7050. ARRAY_SIZE(msm_stub_be_dai_links)];
  7051. struct snd_soc_card snd_soc_card_stub_msm = {
  7052. .name = "sm6150-stub-snd-card",
  7053. };
  7054. static const struct of_device_id sm6150_asoc_machine_of_match[] = {
  7055. { .compatible = "qcom,sm6150-asoc-snd",
  7056. .data = "codec"},
  7057. { .compatible = "qcom,sm6150-asoc-snd-stub",
  7058. .data = "stub_codec"},
  7059. {},
  7060. };
  7061. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  7062. {
  7063. struct snd_soc_card *card = NULL;
  7064. struct snd_soc_dai_link *dailink;
  7065. int total_links = 0, rc = 0;
  7066. u32 tavil_codec = 0, auxpcm_audio_intf = 0;
  7067. u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
  7068. u32 wcn_btfm_intf = 0;
  7069. const struct of_device_id *match;
  7070. match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
  7071. if (!match) {
  7072. dev_err(dev, "%s: No DT match found for sound card\n",
  7073. __func__);
  7074. return NULL;
  7075. }
  7076. if (!strcmp(match->data, "codec")) {
  7077. card = &snd_soc_card_sm6150_msm;
  7078. memcpy(msm_sm6150_dai_links + total_links,
  7079. msm_common_dai_links,
  7080. sizeof(msm_common_dai_links));
  7081. total_links += ARRAY_SIZE(msm_common_dai_links);
  7082. memcpy(msm_sm6150_dai_links + total_links,
  7083. msm_common_misc_fe_dai_links,
  7084. sizeof(msm_common_misc_fe_dai_links));
  7085. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  7086. rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
  7087. &tavil_codec);
  7088. if (rc) {
  7089. dev_dbg(dev, "%s: No DT match for tavil codec\n",
  7090. __func__);
  7091. } else {
  7092. if (tavil_codec) {
  7093. card->late_probe =
  7094. msm_snd_card_tavil_late_probe;
  7095. memcpy(msm_sm6150_dai_links + total_links,
  7096. msm_tavil_fe_dai_links,
  7097. sizeof(msm_tavil_fe_dai_links));
  7098. total_links +=
  7099. ARRAY_SIZE(msm_tavil_fe_dai_links);
  7100. }
  7101. }
  7102. if (!tavil_codec) {
  7103. memcpy(msm_sm6150_dai_links + total_links,
  7104. msm_bolero_fe_dai_links,
  7105. sizeof(msm_bolero_fe_dai_links));
  7106. total_links +=
  7107. ARRAY_SIZE(msm_bolero_fe_dai_links);
  7108. }
  7109. memcpy(msm_sm6150_dai_links + total_links,
  7110. msm_common_be_dai_links,
  7111. sizeof(msm_common_be_dai_links));
  7112. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  7113. if (tavil_codec) {
  7114. memcpy(msm_sm6150_dai_links + total_links,
  7115. msm_tavil_be_dai_links,
  7116. sizeof(msm_tavil_be_dai_links));
  7117. total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
  7118. } else {
  7119. memcpy(msm_sm6150_dai_links + total_links,
  7120. msm_wsa_cdc_dma_be_dai_links,
  7121. sizeof(msm_wsa_cdc_dma_be_dai_links));
  7122. total_links +=
  7123. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  7124. memcpy(msm_sm6150_dai_links + total_links,
  7125. msm_rx_tx_cdc_dma_be_dai_links,
  7126. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  7127. total_links +=
  7128. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  7129. }
  7130. rc = of_property_read_u32(dev->of_node,
  7131. "qcom,ext-disp-audio-rx",
  7132. &ext_disp_audio_intf);
  7133. if (rc) {
  7134. dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
  7135. __func__);
  7136. } else {
  7137. if (auxpcm_audio_intf) {
  7138. memcpy(msm_sm6150_dai_links + total_links,
  7139. ext_disp_be_dai_link,
  7140. sizeof(ext_disp_be_dai_link));
  7141. total_links +=
  7142. ARRAY_SIZE(ext_disp_be_dai_link);
  7143. }
  7144. }
  7145. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  7146. &mi2s_audio_intf);
  7147. if (rc) {
  7148. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  7149. __func__);
  7150. } else {
  7151. if (mi2s_audio_intf) {
  7152. memcpy(msm_sm6150_dai_links + total_links,
  7153. msm_mi2s_be_dai_links,
  7154. sizeof(msm_mi2s_be_dai_links));
  7155. total_links +=
  7156. ARRAY_SIZE(msm_mi2s_be_dai_links);
  7157. }
  7158. }
  7159. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  7160. &wcn_btfm_intf);
  7161. if (rc) {
  7162. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  7163. __func__);
  7164. } else {
  7165. if (wcn_btfm_intf) {
  7166. memcpy(msm_sm6150_dai_links + total_links,
  7167. msm_wcn_be_dai_links,
  7168. sizeof(msm_wcn_be_dai_links));
  7169. total_links +=
  7170. ARRAY_SIZE(msm_wcn_be_dai_links);
  7171. }
  7172. }
  7173. rc = of_property_read_u32(dev->of_node,
  7174. "qcom,auxpcm-audio-intf",
  7175. &auxpcm_audio_intf);
  7176. if (rc) {
  7177. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  7178. __func__);
  7179. } else {
  7180. if (auxpcm_audio_intf) {
  7181. memcpy(msm_sm6150_dai_links + total_links,
  7182. msm_auxpcm_be_dai_links,
  7183. sizeof(msm_auxpcm_be_dai_links));
  7184. total_links +=
  7185. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  7186. }
  7187. }
  7188. dailink = msm_sm6150_dai_links;
  7189. } else if (!strcmp(match->data, "stub_codec")) {
  7190. card = &snd_soc_card_stub_msm;
  7191. memcpy(msm_stub_dai_links + total_links,
  7192. msm_stub_fe_dai_links,
  7193. sizeof(msm_stub_fe_dai_links));
  7194. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  7195. memcpy(msm_stub_dai_links + total_links,
  7196. msm_stub_be_dai_links,
  7197. sizeof(msm_stub_be_dai_links));
  7198. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  7199. dailink = msm_stub_dai_links;
  7200. }
  7201. if (card) {
  7202. card->dai_link = dailink;
  7203. card->num_links = total_links;
  7204. }
  7205. return card;
  7206. }
  7207. static int msm_wsa881x_init(struct snd_soc_component *component)
  7208. {
  7209. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7210. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7211. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  7212. SPKR_L_BOOST, SPKR_L_VI};
  7213. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  7214. SPKR_R_BOOST, SPKR_R_VI};
  7215. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  7216. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  7217. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7218. struct msm_asoc_mach_data *pdata;
  7219. struct snd_soc_dapm_context *dapm;
  7220. struct snd_card *card = component->card->snd_card;
  7221. struct snd_info_entry *entry;
  7222. int ret = 0;
  7223. if (!codec) {
  7224. pr_err("%s codec is NULL\n", __func__);
  7225. return -EINVAL;
  7226. }
  7227. dapm = snd_soc_codec_get_dapm(codec);
  7228. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  7229. dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
  7230. __func__, codec->component.name);
  7231. wsa881x_set_channel_map(codec, &spkleft_ports[0],
  7232. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7233. &ch_rate[0], &spkleft_port_types[0]);
  7234. if (dapm->component) {
  7235. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  7236. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  7237. }
  7238. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  7239. dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
  7240. __func__, codec->component.name);
  7241. wsa881x_set_channel_map(codec, &spkright_ports[0],
  7242. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7243. &ch_rate[0], &spkright_port_types[0]);
  7244. if (dapm->component) {
  7245. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  7246. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  7247. }
  7248. } else {
  7249. dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
  7250. codec->component.name);
  7251. ret = -EINVAL;
  7252. goto err;
  7253. }
  7254. pdata = snd_soc_card_get_drvdata(component->card);
  7255. if (!pdata->codec_root) {
  7256. entry = snd_info_create_subdir(card->module, "codecs",
  7257. card->proc_root);
  7258. if (!entry) {
  7259. pr_err("%s: Cannot create codecs module entry\n",
  7260. __func__);
  7261. ret = 0;
  7262. goto err;
  7263. }
  7264. pdata->codec_root = entry;
  7265. }
  7266. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  7267. codec);
  7268. err:
  7269. return ret;
  7270. }
  7271. static int msm_aux_codec_init(struct snd_soc_component *component)
  7272. {
  7273. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7274. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  7275. int ret = 0;
  7276. void *mbhc_calibration;
  7277. struct snd_info_entry *entry;
  7278. struct snd_card *card = component->card->snd_card;
  7279. struct msm_asoc_mach_data *pdata;
  7280. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  7281. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  7282. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  7283. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  7284. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  7285. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  7286. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  7287. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  7288. snd_soc_dapm_sync(dapm);
  7289. pdata = snd_soc_card_get_drvdata(component->card);
  7290. if (!pdata->codec_root) {
  7291. entry = snd_info_create_subdir(card->module, "codecs",
  7292. card->proc_root);
  7293. if (!entry) {
  7294. pr_err("%s: Cannot create codecs module entry\n",
  7295. __func__);
  7296. ret = 0;
  7297. goto codec_root_err;
  7298. }
  7299. pdata->codec_root = entry;
  7300. }
  7301. wcd937x_info_create_codec_entry(pdata->codec_root, codec);
  7302. codec_root_err:
  7303. mbhc_calibration = def_wcd_mbhc_cal();
  7304. if (!mbhc_calibration) {
  7305. return -ENOMEM;
  7306. }
  7307. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7308. ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
  7309. return ret;
  7310. }
  7311. static int msm_init_aux_dev(struct platform_device *pdev,
  7312. struct snd_soc_card *card)
  7313. {
  7314. struct device_node *wsa_of_node;
  7315. struct device_node *aux_codec_of_node;
  7316. u32 wsa_max_devs;
  7317. u32 wsa_dev_cnt;
  7318. u32 codec_aux_dev_cnt = 0;
  7319. int i;
  7320. struct msm_wsa881x_dev_info *wsa881x_dev_info;
  7321. struct aux_codec_dev_info *aux_cdc_dev_info;
  7322. const char *auxdev_name_prefix[1];
  7323. char *dev_name_str = NULL;
  7324. int found = 0;
  7325. int codecs_found = 0;
  7326. int ret = 0;
  7327. /* Get maximum WSA device count for this platform */
  7328. ret = of_property_read_u32(pdev->dev.of_node,
  7329. "qcom,wsa-max-devs", &wsa_max_devs);
  7330. if (ret) {
  7331. dev_info(&pdev->dev,
  7332. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  7333. __func__, pdev->dev.of_node->full_name, ret);
  7334. wsa_max_devs = 0;
  7335. goto codec_aux_dev;
  7336. }
  7337. if (wsa_max_devs == 0) {
  7338. dev_warn(&pdev->dev,
  7339. "%s: Max WSA devices is 0 for this target?\n",
  7340. __func__);
  7341. goto codec_aux_dev;
  7342. }
  7343. /* Get count of WSA device phandles for this platform */
  7344. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  7345. "qcom,wsa-devs", NULL);
  7346. if (wsa_dev_cnt == -ENOENT) {
  7347. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  7348. __func__);
  7349. goto err;
  7350. } else if (wsa_dev_cnt <= 0) {
  7351. dev_err(&pdev->dev,
  7352. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  7353. __func__, wsa_dev_cnt);
  7354. ret = -EINVAL;
  7355. goto err;
  7356. }
  7357. /*
  7358. * Expect total phandles count to be NOT less than maximum possible
  7359. * WSA count. However, if it is less, then assign same value to
  7360. * max count as well.
  7361. */
  7362. if (wsa_dev_cnt < wsa_max_devs) {
  7363. dev_dbg(&pdev->dev,
  7364. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  7365. __func__, wsa_max_devs, wsa_dev_cnt);
  7366. wsa_max_devs = wsa_dev_cnt;
  7367. }
  7368. /* Make sure prefix string passed for each WSA device */
  7369. ret = of_property_count_strings(pdev->dev.of_node,
  7370. "qcom,wsa-aux-dev-prefix");
  7371. if (ret != wsa_dev_cnt) {
  7372. dev_err(&pdev->dev,
  7373. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  7374. __func__, wsa_dev_cnt, ret);
  7375. ret = -EINVAL;
  7376. goto err;
  7377. }
  7378. /*
  7379. * Alloc mem to store phandle and index info of WSA device, if already
  7380. * registered with ALSA core
  7381. */
  7382. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  7383. sizeof(struct msm_wsa881x_dev_info),
  7384. GFP_KERNEL);
  7385. if (!wsa881x_dev_info) {
  7386. ret = -ENOMEM;
  7387. goto err;
  7388. }
  7389. /*
  7390. * search and check whether all WSA devices are already
  7391. * registered with ALSA core or not. If found a node, store
  7392. * the node and the index in a local array of struct for later
  7393. * use.
  7394. */
  7395. for (i = 0; i < wsa_dev_cnt; i++) {
  7396. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  7397. "qcom,wsa-devs", i);
  7398. if (unlikely(!wsa_of_node)) {
  7399. /* we should not be here */
  7400. dev_err(&pdev->dev,
  7401. "%s: wsa dev node is not present\n",
  7402. __func__);
  7403. ret = -EINVAL;
  7404. goto err;
  7405. }
  7406. if (soc_find_component(wsa_of_node, NULL)) {
  7407. /* WSA device registered with ALSA core */
  7408. wsa881x_dev_info[found].of_node = wsa_of_node;
  7409. wsa881x_dev_info[found].index = i;
  7410. found++;
  7411. if (found == wsa_max_devs)
  7412. break;
  7413. }
  7414. }
  7415. if (found < wsa_max_devs) {
  7416. dev_dbg(&pdev->dev,
  7417. "%s: failed to find %d components. Found only %d\n",
  7418. __func__, wsa_max_devs, found);
  7419. return -EPROBE_DEFER;
  7420. }
  7421. dev_info(&pdev->dev,
  7422. "%s: found %d wsa881x devices registered with ALSA core\n",
  7423. __func__, found);
  7424. codec_aux_dev:
  7425. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7426. /* Get count of aux codec device phandles for this platform */
  7427. codec_aux_dev_cnt = of_count_phandle_with_args(
  7428. pdev->dev.of_node,
  7429. "qcom,codec-aux-devs", NULL);
  7430. if (codec_aux_dev_cnt == -ENOENT) {
  7431. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  7432. __func__);
  7433. goto err;
  7434. } else if (codec_aux_dev_cnt <= 0) {
  7435. dev_err(&pdev->dev,
  7436. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  7437. __func__, codec_aux_dev_cnt);
  7438. ret = -EINVAL;
  7439. goto err;
  7440. }
  7441. /*
  7442. * Alloc mem to store phandle and index info of aux codec
  7443. * if already registered with ALSA core
  7444. */
  7445. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  7446. sizeof(struct aux_codec_dev_info),
  7447. GFP_KERNEL);
  7448. if (!aux_cdc_dev_info) {
  7449. ret = -ENOMEM;
  7450. goto err;
  7451. }
  7452. /*
  7453. * search and check whether all aux codecs are already
  7454. * registered with ALSA core or not. If found a node, store
  7455. * the node and the index in a local array of struct for later
  7456. * use.
  7457. */
  7458. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7459. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  7460. "qcom,codec-aux-devs", i);
  7461. if (unlikely(!aux_codec_of_node)) {
  7462. /* we should not be here */
  7463. dev_err(&pdev->dev,
  7464. "%s: aux codec dev node is not present\n",
  7465. __func__);
  7466. ret = -EINVAL;
  7467. goto err;
  7468. }
  7469. if (soc_find_component(aux_codec_of_node, NULL)) {
  7470. /* AUX codec registered with ALSA core */
  7471. aux_cdc_dev_info[codecs_found].of_node =
  7472. aux_codec_of_node;
  7473. aux_cdc_dev_info[codecs_found].index = i;
  7474. codecs_found++;
  7475. }
  7476. }
  7477. if (codecs_found < codec_aux_dev_cnt) {
  7478. dev_dbg(&pdev->dev,
  7479. "%s: failed to find %d components. Found only %d\n",
  7480. __func__, codec_aux_dev_cnt, codecs_found);
  7481. return -EPROBE_DEFER;
  7482. }
  7483. dev_info(&pdev->dev,
  7484. "%s: found %d AUX codecs registered with ALSA core\n",
  7485. __func__, codecs_found);
  7486. }
  7487. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  7488. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  7489. /* Alloc array of AUX devs struct */
  7490. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  7491. sizeof(struct snd_soc_aux_dev),
  7492. GFP_KERNEL);
  7493. if (!msm_aux_dev) {
  7494. ret = -ENOMEM;
  7495. goto err;
  7496. }
  7497. /* Alloc array of codec conf struct */
  7498. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  7499. sizeof(struct snd_soc_codec_conf),
  7500. GFP_KERNEL);
  7501. if (!msm_codec_conf) {
  7502. ret = -ENOMEM;
  7503. goto err;
  7504. }
  7505. for (i = 0; i < wsa_max_devs; i++) {
  7506. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  7507. GFP_KERNEL);
  7508. if (!dev_name_str) {
  7509. ret = -ENOMEM;
  7510. goto err;
  7511. }
  7512. ret = of_property_read_string_index(pdev->dev.of_node,
  7513. "qcom,wsa-aux-dev-prefix",
  7514. wsa881x_dev_info[i].index,
  7515. auxdev_name_prefix);
  7516. if (ret) {
  7517. dev_err(&pdev->dev,
  7518. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  7519. __func__, ret);
  7520. ret = -EINVAL;
  7521. goto err;
  7522. }
  7523. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  7524. msm_aux_dev[i].name = dev_name_str;
  7525. msm_aux_dev[i].codec_name = NULL;
  7526. msm_aux_dev[i].codec_of_node =
  7527. wsa881x_dev_info[i].of_node;
  7528. msm_aux_dev[i].init = msm_wsa881x_init;
  7529. msm_codec_conf[i].dev_name = NULL;
  7530. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  7531. msm_codec_conf[i].of_node =
  7532. wsa881x_dev_info[i].of_node;
  7533. }
  7534. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7535. msm_aux_dev[wsa_max_devs + i].name = NULL;
  7536. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  7537. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  7538. aux_cdc_dev_info[i].of_node;
  7539. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  7540. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  7541. msm_codec_conf[wsa_max_devs + i].name_prefix =
  7542. NULL;
  7543. msm_codec_conf[wsa_max_devs + i].of_node =
  7544. aux_cdc_dev_info[i].of_node;
  7545. }
  7546. card->codec_conf = msm_codec_conf;
  7547. card->aux_dev = msm_aux_dev;
  7548. err:
  7549. return ret;
  7550. }
  7551. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  7552. {
  7553. int count;
  7554. u32 mi2s_master_slave[MI2S_MAX];
  7555. int ret;
  7556. for (count = 0; count < MI2S_MAX; count++) {
  7557. mutex_init(&mi2s_intf_conf[count].lock);
  7558. mi2s_intf_conf[count].ref_cnt = 0;
  7559. }
  7560. ret = of_property_read_u32_array(pdev->dev.of_node,
  7561. "qcom,msm-mi2s-master",
  7562. mi2s_master_slave, MI2S_MAX);
  7563. if (ret) {
  7564. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  7565. __func__);
  7566. } else {
  7567. for (count = 0; count < MI2S_MAX; count++) {
  7568. mi2s_intf_conf[count].msm_is_mi2s_master =
  7569. mi2s_master_slave[count];
  7570. }
  7571. }
  7572. }
  7573. static void msm_i2s_auxpcm_deinit(void)
  7574. {
  7575. int count;
  7576. for (count = 0; count < MI2S_MAX; count++) {
  7577. mutex_destroy(&mi2s_intf_conf[count].lock);
  7578. mi2s_intf_conf[count].ref_cnt = 0;
  7579. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  7580. }
  7581. }
  7582. static int msm_asoc_machine_probe(struct platform_device *pdev)
  7583. {
  7584. struct snd_soc_card *card;
  7585. struct msm_asoc_mach_data *pdata;
  7586. const char *mbhc_audio_jack_type = NULL;
  7587. int ret;
  7588. if (!pdev->dev.of_node) {
  7589. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  7590. return -EINVAL;
  7591. }
  7592. pdata = devm_kzalloc(&pdev->dev,
  7593. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  7594. if (!pdata)
  7595. return -ENOMEM;
  7596. card = populate_snd_card_dailinks(&pdev->dev);
  7597. if (!card) {
  7598. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  7599. ret = -EINVAL;
  7600. goto err;
  7601. }
  7602. card->dev = &pdev->dev;
  7603. platform_set_drvdata(pdev, card);
  7604. snd_soc_card_set_drvdata(card, pdata);
  7605. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  7606. if (ret) {
  7607. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  7608. ret);
  7609. goto err;
  7610. }
  7611. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  7612. if (ret) {
  7613. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  7614. ret);
  7615. goto err;
  7616. }
  7617. ret = msm_populate_dai_link_component_of_node(card);
  7618. if (ret) {
  7619. ret = -EPROBE_DEFER;
  7620. goto err;
  7621. }
  7622. ret = msm_init_aux_dev(pdev, card);
  7623. if (ret)
  7624. goto err;
  7625. ret = devm_snd_soc_register_card(&pdev->dev, card);
  7626. if (ret == -EPROBE_DEFER) {
  7627. if (codec_reg_done)
  7628. ret = -EINVAL;
  7629. goto err;
  7630. } else if (ret) {
  7631. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  7632. ret);
  7633. goto err;
  7634. }
  7635. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  7636. spdev = pdev;
  7637. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7638. "qcom,hph-en1-gpio", 0);
  7639. if (!pdata->hph_en1_gpio_p) {
  7640. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7641. "qcom,hph-en1-gpio",
  7642. pdev->dev.of_node->full_name);
  7643. }
  7644. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7645. "qcom,hph-en0-gpio", 0);
  7646. if (!pdata->hph_en0_gpio_p) {
  7647. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7648. "qcom,hph-en0-gpio",
  7649. pdev->dev.of_node->full_name);
  7650. }
  7651. ret = of_property_read_string(pdev->dev.of_node,
  7652. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  7653. if (ret) {
  7654. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
  7655. "qcom,mbhc-audio-jack-type",
  7656. pdev->dev.of_node->full_name);
  7657. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  7658. } else {
  7659. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  7660. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7661. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  7662. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  7663. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7664. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  7665. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  7666. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7667. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  7668. } else {
  7669. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7670. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  7671. }
  7672. }
  7673. /*
  7674. * Parse US-Euro gpio info from DT. Report no error if us-euro
  7675. * entry is not found in DT file as some targets do not support
  7676. * US-Euro detection
  7677. */
  7678. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7679. "qcom,us-euro-gpios", 0);
  7680. if (!pdata->us_euro_gpio_p) {
  7681. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  7682. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  7683. } else {
  7684. dev_dbg(&pdev->dev, "%s detected\n",
  7685. "qcom,us-euro-gpios");
  7686. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  7687. }
  7688. /* Parse pinctrl info from devicetree */
  7689. ret = msm_get_pinctrl(pdev);
  7690. if (!ret) {
  7691. pr_debug("%s: pinctrl parsing successful\n", __func__);
  7692. } else {
  7693. dev_dbg(&pdev->dev,
  7694. "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
  7695. __func__, ret);
  7696. ret = 0;
  7697. }
  7698. msm_i2s_auxpcm_init(pdev);
  7699. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7700. is_initial_boot = true;
  7701. ret = audio_notifier_register("sm6150",
  7702. AUDIO_NOTIFIER_ADSP_DOMAIN,
  7703. &service_nb);
  7704. if (ret < 0)
  7705. pr_err("%s: Audio notifier register failed ret = %d\n",
  7706. __func__, ret);
  7707. } else {
  7708. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7709. "qcom,cdc-dmic01-gpios",
  7710. 0);
  7711. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7712. "qcom,cdc-dmic23-gpios",
  7713. 0);
  7714. }
  7715. err:
  7716. return ret;
  7717. }
  7718. static int msm_asoc_machine_remove(struct platform_device *pdev)
  7719. {
  7720. audio_notifier_deregister("sm6150");
  7721. msm_i2s_auxpcm_deinit();
  7722. return 0;
  7723. }
  7724. static struct platform_driver sm6150_asoc_machine_driver = {
  7725. .driver = {
  7726. .name = DRV_NAME,
  7727. .owner = THIS_MODULE,
  7728. .pm = &snd_soc_pm_ops,
  7729. .of_match_table = sm6150_asoc_machine_of_match,
  7730. },
  7731. .probe = msm_asoc_machine_probe,
  7732. .remove = msm_asoc_machine_remove,
  7733. };
  7734. module_platform_driver(sm6150_asoc_machine_driver);
  7735. MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
  7736. MODULE_LICENSE("GPL v2");
  7737. MODULE_ALIAS("platform:" DRV_NAME);
  7738. MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);