dp_rx_mon_dest.c 30 KB

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  1. /*
  2. * Copyright (c) 2017-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "hal_rx.h"
  22. #include "hal_api.h"
  23. #include "qdf_trace.h"
  24. #include "qdf_nbuf.h"
  25. #include "hal_api_mon.h"
  26. #include "dp_rx_mon.h"
  27. #include "wlan_cfg.h"
  28. /**
  29. * dp_rx_mon_link_desc_return() - Return a MPDU link descriptor to HW
  30. * (WBM), following error handling
  31. *
  32. * @dp_pdev: core txrx pdev context
  33. * @buf_addr_info: void pointer to monitor link descriptor buf addr info
  34. * Return: QDF_STATUS
  35. */
  36. static QDF_STATUS
  37. dp_rx_mon_link_desc_return(struct dp_pdev *dp_pdev,
  38. void *buf_addr_info)
  39. {
  40. struct dp_srng *dp_srng;
  41. void *hal_srng;
  42. void *hal_soc;
  43. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  44. void *src_srng_desc;
  45. hal_soc = dp_pdev->soc->hal_soc;
  46. dp_srng = &dp_pdev->rxdma_mon_desc_ring;
  47. hal_srng = dp_srng->hal_srng;
  48. qdf_assert(hal_srng);
  49. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_srng))) {
  50. /* TODO */
  51. /*
  52. * Need API to convert from hal_ring pointer to
  53. * Ring Type / Ring Id combo
  54. */
  55. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  56. "%s %d : \
  57. HAL RING Access For WBM Release SRNG Failed -- %pK\n",
  58. __func__, __LINE__, hal_srng);
  59. goto done;
  60. }
  61. src_srng_desc = hal_srng_src_get_next(hal_soc, hal_srng);
  62. if (qdf_likely(src_srng_desc)) {
  63. /* Return link descriptor through WBM ring (SW2WBM)*/
  64. hal_rx_mon_msdu_link_desc_set(hal_soc,
  65. src_srng_desc, buf_addr_info);
  66. status = QDF_STATUS_SUCCESS;
  67. } else {
  68. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  69. "%s %d -- Monitor Link Desc WBM Release Ring Full\n",
  70. __func__, __LINE__);
  71. }
  72. done:
  73. hal_srng_access_end(hal_soc, hal_srng);
  74. return status;
  75. }
  76. /**
  77. * dp_mon_adjust_frag_len() - MPDU and MSDU may spread across
  78. * multiple nbufs. This function
  79. * is to return data length in
  80. * fragmented buffer
  81. *
  82. * @total_len: pointer to remaining data length.
  83. * @frag_len: poiter to data length in this fragment.
  84. */
  85. static inline void dp_mon_adjust_frag_len(uint32_t *total_len,
  86. uint32_t *frag_len)
  87. {
  88. if (*total_len >= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  89. *frag_len = RX_BUFFER_SIZE - RX_PKT_TLVS_LEN;
  90. *total_len -= *frag_len;
  91. } else {
  92. *frag_len = *total_len;
  93. *total_len = 0;
  94. }
  95. }
  96. /**
  97. * dp_rx_mon_mpdu_pop() - Return a MPDU link descriptor to HW
  98. * (WBM), following error handling
  99. *
  100. * @soc: core DP main context
  101. * @mac_id: mac id which is one of 3 mac_ids
  102. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  103. * @head_msdu: head of msdu to be popped
  104. * @tail_msdu: tail of msdu to be popped
  105. * @npackets: number of packet to be popped
  106. * @ppdu_id: ppdu id of processing ppdu
  107. * @head: head of descs list to be freed
  108. * @tail: tail of decs list to be freed
  109. * Return: number of msdu in MPDU to be popped
  110. */
  111. static inline uint32_t
  112. dp_rx_mon_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  113. void *rxdma_dst_ring_desc, qdf_nbuf_t *head_msdu,
  114. qdf_nbuf_t *tail_msdu, uint32_t *npackets, uint32_t *ppdu_id,
  115. union dp_rx_desc_list_elem_t **head,
  116. union dp_rx_desc_list_elem_t **tail)
  117. {
  118. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  119. void *rx_desc_tlv;
  120. void *rx_msdu_link_desc;
  121. qdf_nbuf_t msdu;
  122. qdf_nbuf_t last;
  123. struct hal_rx_msdu_list msdu_list;
  124. uint16_t num_msdus;
  125. uint32_t rx_buf_size, rx_pkt_offset;
  126. struct hal_buf_info buf_info;
  127. void *p_buf_addr_info;
  128. void *p_last_buf_addr_info;
  129. uint32_t rx_bufs_used = 0;
  130. uint32_t msdu_ppdu_id, msdu_cnt, last_ppdu_id;
  131. uint8_t *data;
  132. uint32_t i;
  133. uint32_t total_frag_len = 0, frag_len = 0;
  134. bool is_frag, is_first_msdu;
  135. msdu = 0;
  136. last_ppdu_id = dp_pdev->ppdu_info.com_info.last_ppdu_id;
  137. last = NULL;
  138. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  139. &p_last_buf_addr_info, &msdu_cnt);
  140. is_frag = false;
  141. is_first_msdu = true;
  142. do {
  143. rx_msdu_link_desc =
  144. dp_rx_cookie_2_mon_link_desc_va(dp_pdev, &buf_info);
  145. qdf_assert(rx_msdu_link_desc);
  146. hal_rx_msdu_list_get(rx_msdu_link_desc, &msdu_list, &num_msdus);
  147. for (i = 0; i < num_msdus; i++) {
  148. uint32_t l2_hdr_offset;
  149. struct dp_rx_desc *rx_desc =
  150. dp_rx_cookie_2_va_mon_buf(soc,
  151. msdu_list.sw_cookie[i]);
  152. qdf_assert(rx_desc);
  153. msdu = rx_desc->nbuf;
  154. if (rx_desc->unmapped == 0) {
  155. qdf_nbuf_unmap_single(soc->osdev, msdu,
  156. QDF_DMA_FROM_DEVICE);
  157. rx_desc->unmapped = 1;
  158. }
  159. data = qdf_nbuf_data(msdu);
  160. rx_desc_tlv = HAL_RX_MON_DEST_GET_DESC(data);
  161. if (is_first_msdu) {
  162. msdu_ppdu_id =
  163. HAL_RX_MON_HW_DESC_GET_PPDUID_GET(rx_desc_tlv);
  164. is_first_msdu = false;
  165. }
  166. QDF_TRACE(QDF_MODULE_ID_DP,
  167. QDF_TRACE_LEVEL_DEBUG,
  168. "[%s][%d] i=%d, ppdu_id=%x, msdu_ppdu_id=%x last_ppdu_id=%x num msdus = %u",
  169. __func__, __LINE__, i,
  170. *ppdu_id, msdu_ppdu_id, last_ppdu_id,
  171. num_msdus);
  172. if (*ppdu_id > msdu_ppdu_id)
  173. QDF_TRACE(QDF_MODULE_ID_DP,
  174. QDF_TRACE_LEVEL_WARN,
  175. "[%s][%d] ppdu_id=%d msdu_ppdu_id=%d",
  176. __func__, __LINE__, *ppdu_id,
  177. msdu_ppdu_id);
  178. if ((*ppdu_id < msdu_ppdu_id) && (*ppdu_id >
  179. last_ppdu_id)) {
  180. *ppdu_id = msdu_ppdu_id;
  181. return rx_bufs_used;
  182. }
  183. if (hal_rx_desc_is_first_msdu(rx_desc_tlv))
  184. hal_rx_mon_hw_desc_get_mpdu_status(rx_desc_tlv,
  185. &(dp_pdev->ppdu_info.rx_status));
  186. if (msdu_list.msdu_info[i].msdu_flags &
  187. HAL_MSDU_F_MSDU_CONTINUATION) {
  188. if (!is_frag) {
  189. total_frag_len =
  190. msdu_list.msdu_info[i].msdu_len;
  191. is_frag = true;
  192. }
  193. dp_mon_adjust_frag_len(
  194. &total_frag_len, &frag_len);
  195. } else {
  196. if (is_frag) {
  197. dp_mon_adjust_frag_len(
  198. &total_frag_len, &frag_len);
  199. } else {
  200. frag_len =
  201. msdu_list.msdu_info[i].msdu_len;
  202. }
  203. is_frag = false;
  204. msdu_cnt--;
  205. }
  206. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  207. "%s total_len %u frag_len %u flags %u",
  208. __func__, total_frag_len, frag_len,
  209. msdu_list.msdu_info[i].msdu_flags);
  210. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  211. /*
  212. * HW structures call this L3 header padding
  213. * -- even though this is actually the offset
  214. * from the buffer beginning where the L2
  215. * header begins.
  216. */
  217. l2_hdr_offset =
  218. hal_rx_msdu_end_l3_hdr_padding_get(data);
  219. rx_buf_size = rx_pkt_offset + l2_hdr_offset
  220. + frag_len;
  221. qdf_nbuf_set_pktlen(msdu, rx_buf_size);
  222. #if 0
  223. /* Disble it.see packet on msdu done set to 0 */
  224. /*
  225. * Check if DMA completed -- msdu_done is the
  226. * last bit to be written
  227. */
  228. if (!hal_rx_attn_msdu_done_get(rx_desc_tlv)) {
  229. QDF_TRACE(QDF_MODULE_ID_DP,
  230. QDF_TRACE_LEVEL_ERROR,
  231. "%s:%d: Pkt Desc\n",
  232. __func__, __LINE__);
  233. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP,
  234. QDF_TRACE_LEVEL_ERROR,
  235. rx_desc_tlv, 128);
  236. qdf_assert_always(0);
  237. }
  238. #endif
  239. rx_bufs_used++;
  240. QDF_TRACE(QDF_MODULE_ID_DP,
  241. QDF_TRACE_LEVEL_DEBUG,
  242. "%s: rx_pkt_offset=%d, l2_hdr_offset=%d, msdu_len=%d, addr=%p skb->len %lu",
  243. __func__, rx_pkt_offset, l2_hdr_offset,
  244. msdu_list.msdu_info[i].msdu_len,
  245. qdf_nbuf_data(msdu), qdf_nbuf_len(msdu));
  246. if (*head_msdu == NULL)
  247. *head_msdu = msdu;
  248. else
  249. qdf_nbuf_set_next(last, msdu);
  250. last = msdu;
  251. dp_rx_add_to_free_desc_list(head,
  252. tail, rx_desc);
  253. }
  254. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  255. &p_buf_addr_info);
  256. if (dp_rx_mon_link_desc_return(dp_pdev, p_last_buf_addr_info)
  257. != QDF_STATUS_SUCCESS) {
  258. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  259. "dp_rx_mon_link_desc_return failed\n");
  260. }
  261. p_last_buf_addr_info = p_buf_addr_info;
  262. } while (buf_info.paddr && msdu_cnt);
  263. qdf_nbuf_set_next(last, NULL);
  264. *tail_msdu = msdu;
  265. return rx_bufs_used;
  266. }
  267. static inline
  268. void dp_rx_msdus_set_payload(qdf_nbuf_t msdu)
  269. {
  270. uint8_t *data;
  271. uint32_t rx_pkt_offset, l2_hdr_offset;
  272. data = qdf_nbuf_data(msdu);
  273. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  274. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(data);
  275. qdf_nbuf_pull_head(msdu, rx_pkt_offset + l2_hdr_offset);
  276. }
  277. static inline
  278. qdf_nbuf_t dp_rx_mon_restitch_mpdu_from_msdus(struct dp_soc *soc,
  279. uint32_t mac_id, qdf_nbuf_t head_msdu, qdf_nbuf_t last_msdu,
  280. struct cdp_mon_status *rx_status)
  281. {
  282. qdf_nbuf_t msdu, mpdu_buf, prev_buf, msdu_orig, head_frag_list;
  283. uint32_t decap_format, wifi_hdr_len, sec_hdr_len, msdu_llc_len,
  284. mpdu_buf_len, decap_hdr_pull_bytes, frag_list_sum_len, dir,
  285. is_amsdu, is_first_frag, amsdu_pad;
  286. void *rx_desc;
  287. char *hdr_desc;
  288. unsigned char *dest;
  289. struct ieee80211_frame *wh;
  290. struct ieee80211_qoscntl *qos;
  291. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  292. head_frag_list = NULL;
  293. /* The nbuf has been pulled just beyond the status and points to the
  294. * payload
  295. */
  296. msdu_orig = head_msdu;
  297. rx_desc = qdf_nbuf_data(msdu_orig);
  298. if (HAL_RX_DESC_GET_MPDU_LENGTH_ERR(rx_desc)) {
  299. /* It looks like there is some issue on MPDU len err */
  300. /* Need further investigate if drop the packet */
  301. /* return NULL; */
  302. }
  303. rx_desc = qdf_nbuf_data(last_msdu);
  304. rx_status->cdp_rs_fcs_err = HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  305. dp_pdev->ppdu_info.rx_status.rs_fcs_err =
  306. HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  307. /* Fill out the rx_status from the PPDU start and end fields */
  308. /* HAL_RX_GET_PPDU_STATUS(soc, mac_id, rx_status); */
  309. rx_desc = qdf_nbuf_data(head_msdu);
  310. decap_format = HAL_RX_DESC_GET_DECAP_FORMAT(rx_desc);
  311. /* Easy case - The MSDU status indicates that this is a non-decapped
  312. * packet in RAW mode.
  313. */
  314. if (decap_format == HAL_HW_RX_DECAP_FORMAT_RAW) {
  315. /* Note that this path might suffer from headroom unavailabilty
  316. * - but the RX status is usually enough
  317. */
  318. dp_rx_msdus_set_payload(head_msdu);
  319. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  320. "[%s][%d] decap format raw head %pK head->next %pK last_msdu %pK last_msdu->next %pK",
  321. __func__, __LINE__, head_msdu, head_msdu->next,
  322. last_msdu, last_msdu->next);
  323. mpdu_buf = head_msdu;
  324. if (!mpdu_buf)
  325. goto mpdu_stitch_fail;
  326. prev_buf = mpdu_buf;
  327. frag_list_sum_len = 0;
  328. msdu = qdf_nbuf_next(head_msdu);
  329. is_first_frag = 1;
  330. while (msdu) {
  331. dp_rx_msdus_set_payload(msdu);
  332. if (is_first_frag) {
  333. is_first_frag = 0;
  334. head_frag_list = msdu;
  335. }
  336. frag_list_sum_len += qdf_nbuf_len(msdu);
  337. /* Maintain the linking of the cloned MSDUS */
  338. qdf_nbuf_set_next_ext(prev_buf, msdu);
  339. /* Move to the next */
  340. prev_buf = msdu;
  341. msdu = qdf_nbuf_next(msdu);
  342. }
  343. qdf_nbuf_trim_tail(prev_buf, HAL_RX_FCS_LEN);
  344. /* If there were more fragments to this RAW frame */
  345. if (head_frag_list) {
  346. frag_list_sum_len -= HAL_RX_FCS_LEN;
  347. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  348. frag_list_sum_len);
  349. qdf_nbuf_set_next(mpdu_buf, NULL);
  350. }
  351. goto mpdu_stitch_done;
  352. }
  353. /* Decap mode:
  354. * Calculate the amount of header in decapped packet to knock off based
  355. * on the decap type and the corresponding number of raw bytes to copy
  356. * status header
  357. */
  358. rx_desc = qdf_nbuf_data(head_msdu);
  359. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  360. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  361. "[%s][%d] decap format not raw",
  362. __func__, __LINE__);
  363. /* Base size */
  364. wifi_hdr_len = sizeof(struct ieee80211_frame);
  365. wh = (struct ieee80211_frame *)hdr_desc;
  366. dir = wh->i_fc[1] & IEEE80211_FC1_DIR_MASK;
  367. if (dir == IEEE80211_FC1_DIR_DSTODS)
  368. wifi_hdr_len += 6;
  369. is_amsdu = 0;
  370. if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
  371. qos = (struct ieee80211_qoscntl *)
  372. (hdr_desc + wifi_hdr_len);
  373. wifi_hdr_len += 2;
  374. is_amsdu = (qos->i_qos[0] & IEEE80211_QOS_AMSDU);
  375. }
  376. /*Calculate security header length based on 'Protected'
  377. * and 'EXT_IV' flag
  378. * */
  379. if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
  380. char *iv = (char *)wh + wifi_hdr_len;
  381. if (iv[3] & KEY_EXTIV)
  382. sec_hdr_len = 8;
  383. else
  384. sec_hdr_len = 4;
  385. } else {
  386. sec_hdr_len = 0;
  387. }
  388. wifi_hdr_len += sec_hdr_len;
  389. /* MSDU related stuff LLC - AMSDU subframe header etc */
  390. msdu_llc_len = is_amsdu ? (14 + 8) : 8;
  391. mpdu_buf_len = wifi_hdr_len + msdu_llc_len;
  392. /* "Decap" header to remove from MSDU buffer */
  393. decap_hdr_pull_bytes = 14;
  394. /* Allocate a new nbuf for holding the 802.11 header retrieved from the
  395. * status of the now decapped first msdu. Leave enough headroom for
  396. * accomodating any radio-tap /prism like PHY header
  397. */
  398. #define MAX_MONITOR_HEADER (512)
  399. mpdu_buf = qdf_nbuf_alloc(soc->osdev,
  400. MAX_MONITOR_HEADER + mpdu_buf_len,
  401. MAX_MONITOR_HEADER, 4, FALSE);
  402. if (!mpdu_buf)
  403. goto mpdu_stitch_done;
  404. /* Copy the MPDU related header and enc headers into the first buffer
  405. * - Note that there can be a 2 byte pad between heaader and enc header
  406. */
  407. prev_buf = mpdu_buf;
  408. dest = qdf_nbuf_put_tail(prev_buf, wifi_hdr_len);
  409. if (!dest)
  410. goto mpdu_stitch_fail;
  411. qdf_mem_copy(dest, hdr_desc, wifi_hdr_len);
  412. hdr_desc += wifi_hdr_len;
  413. #if 0
  414. dest = qdf_nbuf_put_tail(prev_buf, sec_hdr_len);
  415. adf_os_mem_copy(dest, hdr_desc, sec_hdr_len);
  416. hdr_desc += sec_hdr_len;
  417. #endif
  418. /* The first LLC len is copied into the MPDU buffer */
  419. frag_list_sum_len = 0;
  420. frag_list_sum_len -= msdu_llc_len;
  421. msdu_orig = head_msdu;
  422. is_first_frag = 1;
  423. amsdu_pad = 0;
  424. while (msdu_orig) {
  425. /* TODO: intra AMSDU padding - do we need it ??? */
  426. msdu = msdu_orig;
  427. if (is_first_frag) {
  428. head_frag_list = msdu;
  429. } else {
  430. /* Reload the hdr ptr only on non-first MSDUs */
  431. rx_desc = qdf_nbuf_data(msdu_orig);
  432. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  433. }
  434. /* Copy this buffers MSDU related status into the prev buffer */
  435. if (is_first_frag) {
  436. is_first_frag = 0;
  437. }
  438. dest = qdf_nbuf_put_tail(prev_buf,
  439. msdu_llc_len + amsdu_pad);
  440. if (!dest)
  441. goto mpdu_stitch_fail;
  442. dest += amsdu_pad;
  443. qdf_mem_copy(dest, hdr_desc, msdu_llc_len);
  444. dp_rx_msdus_set_payload(msdu);
  445. /* Push the MSDU buffer beyond the decap header */
  446. qdf_nbuf_pull_head(msdu, decap_hdr_pull_bytes);
  447. frag_list_sum_len += msdu_llc_len + qdf_nbuf_len(msdu)
  448. + amsdu_pad;
  449. /* Set up intra-AMSDU pad to be added to start of next buffer -
  450. * AMSDU pad is 4 byte pad on AMSDU subframe */
  451. amsdu_pad = (msdu_llc_len + qdf_nbuf_len(msdu)) & 0x3;
  452. amsdu_pad = amsdu_pad ? (4 - amsdu_pad) : 0;
  453. /* TODO FIXME How do we handle MSDUs that have fraglist - Should
  454. * probably iterate all the frags cloning them along the way and
  455. * and also updating the prev_buf pointer
  456. */
  457. /* Move to the next */
  458. prev_buf = msdu;
  459. msdu_orig = qdf_nbuf_next(msdu_orig);
  460. }
  461. #if 0
  462. /* Add in the trailer section - encryption trailer + FCS */
  463. qdf_nbuf_put_tail(prev_buf, HAL_RX_FCS_LEN);
  464. frag_list_sum_len += HAL_RX_FCS_LEN;
  465. #endif
  466. /* TODO: Convert this to suitable adf routines */
  467. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  468. frag_list_sum_len);
  469. mpdu_stitch_done:
  470. /* Check if this buffer contains the PPDU end status for TSF */
  471. /* Need revist this code to see where we can get tsf timestamp */
  472. #if 0
  473. /* PPDU end TLV will be retrived from monitor status ring */
  474. last_mpdu =
  475. (*(((u_int32_t *)&rx_desc->attention)) &
  476. RX_ATTENTION_0_LAST_MPDU_MASK) >>
  477. RX_ATTENTION_0_LAST_MPDU_LSB;
  478. if (last_mpdu)
  479. rx_status->rs_tstamp.tsf = rx_desc->ppdu_end.tsf_timestamp;
  480. #endif
  481. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  482. "%s %d mpdu_buf %pK mpdu_buf->len %u",
  483. __func__, __LINE__,
  484. mpdu_buf, mpdu_buf->len);
  485. return mpdu_buf;
  486. mpdu_stitch_fail:
  487. if ((mpdu_buf) && (decap_format != HAL_HW_RX_DECAP_FORMAT_RAW)) {
  488. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  489. "%s mpdu_stitch_fail mpdu_buf %pK",
  490. __func__, mpdu_buf);
  491. /* Free the head buffer */
  492. qdf_nbuf_free(mpdu_buf);
  493. }
  494. return NULL;
  495. }
  496. /**
  497. * dp_rx_extract_radiotap_info(): Extract and populate information in
  498. * struct mon_rx_status type
  499. * @rx_status: Receive status
  500. * @mon_rx_status: Monitor mode status
  501. *
  502. * Returns: None
  503. */
  504. static inline
  505. void dp_rx_extract_radiotap_info(struct cdp_mon_status *rx_status,
  506. struct mon_rx_status *rx_mon_status)
  507. {
  508. rx_mon_status->tsft = rx_status->cdp_rs_tstamp.cdp_tsf;
  509. rx_mon_status->chan_freq = rx_status->rs_freq;
  510. rx_mon_status->chan_num = rx_status->rs_channel;
  511. rx_mon_status->chan_flags = rx_status->rs_flags;
  512. rx_mon_status->rate = rx_status->rs_datarate;
  513. /* TODO: rx_mon_status->ant_signal_db */
  514. /* TODO: rx_mon_status->nr_ant */
  515. rx_mon_status->mcs = rx_status->cdf_rs_rate_mcs;
  516. rx_mon_status->is_stbc = rx_status->cdp_rs_stbc;
  517. rx_mon_status->sgi = rx_status->cdp_rs_sgi;
  518. /* TODO: rx_mon_status->ldpc */
  519. /* TODO: rx_mon_status->beamformed */
  520. /* TODO: rx_mon_status->vht_flags */
  521. /* TODO: rx_mon_status->vht_flag_values1 */
  522. }
  523. QDF_STATUS dp_rx_mon_deliver(struct dp_soc *soc, uint32_t mac_id,
  524. qdf_nbuf_t head_msdu, qdf_nbuf_t tail_msdu)
  525. {
  526. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  527. struct cdp_mon_status *rs = &pdev->rx_mon_recv_status;
  528. qdf_nbuf_t mon_skb, skb_next;
  529. qdf_nbuf_t mon_mpdu = NULL;
  530. if ((pdev->monitor_vdev == NULL) ||
  531. (pdev->monitor_vdev->osif_rx_mon == NULL)) {
  532. goto mon_deliver_fail;
  533. }
  534. /* restitch mon MPDU for delivery via monitor interface */
  535. mon_mpdu = dp_rx_mon_restitch_mpdu_from_msdus(soc, mac_id, head_msdu,
  536. tail_msdu, rs);
  537. if (mon_mpdu && pdev->monitor_vdev && pdev->monitor_vdev->osif_vdev) {
  538. qdf_nbuf_update_radiotap(&(pdev->ppdu_info.rx_status),
  539. mon_mpdu, sizeof(struct rx_pkt_tlvs));
  540. pdev->monitor_vdev->osif_rx_mon(
  541. pdev->monitor_vdev->osif_vdev, mon_mpdu, NULL);
  542. } else {
  543. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  544. "[%s][%d] mon_mpdu=%p pdev->monitor_vdev %p osif_vdev %p",
  545. __func__, __LINE__, mon_mpdu, pdev->monitor_vdev,
  546. pdev->monitor_vdev->osif_vdev);
  547. goto mon_deliver_fail;
  548. }
  549. return QDF_STATUS_SUCCESS;
  550. mon_deliver_fail:
  551. mon_skb = head_msdu;
  552. while (mon_skb) {
  553. skb_next = qdf_nbuf_next(mon_skb);
  554. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  555. "[%s][%d] mon_skb=%p len %u", __func__, __LINE__,
  556. mon_skb, mon_skb->len);
  557. qdf_nbuf_free(mon_skb);
  558. mon_skb = skb_next;
  559. }
  560. return QDF_STATUS_E_INVAL;
  561. }
  562. /**
  563. * dp_rx_mon_dest_process() - Brain of the Rx processing functionality
  564. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  565. * @soc: core txrx main contex
  566. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  567. * @quota: No. of units (packets) that can be serviced in one shot.
  568. *
  569. * This function implements the core of Rx functionality. This is
  570. * expected to handle only non-error frames.
  571. *
  572. * Return: none
  573. */
  574. void dp_rx_mon_dest_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  575. {
  576. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  577. uint8_t pdev_id;
  578. void *hal_soc;
  579. void *rxdma_dst_ring_desc;
  580. void *mon_dst_srng;
  581. union dp_rx_desc_list_elem_t *head = NULL;
  582. union dp_rx_desc_list_elem_t *tail = NULL;
  583. uint32_t ppdu_id;
  584. uint32_t rx_bufs_used;
  585. pdev_id = pdev->pdev_id;
  586. mon_dst_srng = pdev->rxdma_mon_dst_ring.hal_srng;
  587. if (!mon_dst_srng || !hal_srng_initialized(mon_dst_srng)) {
  588. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  589. "%s %d : HAL Monitor Destination Ring Init Failed -- %pK\n",
  590. __func__, __LINE__, mon_dst_srng);
  591. return;
  592. }
  593. hal_soc = soc->hal_soc;
  594. qdf_assert(hal_soc);
  595. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_dst_srng))) {
  596. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  597. "%s %d : HAL Monitor Destination Ring access Failed -- %pK\n",
  598. __func__, __LINE__, mon_dst_srng);
  599. return;
  600. }
  601. ppdu_id = pdev->ppdu_info.com_info.ppdu_id;
  602. rx_bufs_used = 0;
  603. while (qdf_likely(rxdma_dst_ring_desc =
  604. hal_srng_dst_peek(hal_soc, mon_dst_srng))) {
  605. qdf_nbuf_t head_msdu, tail_msdu;
  606. uint32_t npackets;
  607. head_msdu = (qdf_nbuf_t) NULL;
  608. tail_msdu = (qdf_nbuf_t) NULL;
  609. rx_bufs_used += dp_rx_mon_mpdu_pop(soc, mac_id,
  610. rxdma_dst_ring_desc,
  611. &head_msdu, &tail_msdu,
  612. &npackets, &ppdu_id,
  613. &head, &tail);
  614. if (ppdu_id != pdev->ppdu_info.com_info.ppdu_id) {
  615. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  616. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  617. sizeof(pdev->ppdu_info.rx_status));
  618. pdev->ppdu_info.com_info.last_ppdu_id =
  619. pdev->ppdu_info.com_info.ppdu_id;
  620. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  621. "%s %d ppdu_id %x != ppdu_info.com_info .ppdu_id %x",
  622. __func__, __LINE__,
  623. ppdu_id, pdev->ppdu_info.com_info.ppdu_id);
  624. break;
  625. }
  626. dp_rx_mon_deliver(soc, mac_id, head_msdu, tail_msdu);
  627. rxdma_dst_ring_desc = hal_srng_dst_get_next(hal_soc,
  628. mon_dst_srng);
  629. }
  630. hal_srng_access_end(hal_soc, mon_dst_srng);
  631. if (rx_bufs_used) {
  632. dp_rx_buffers_replenish(soc, pdev_id,
  633. &pdev->rxdma_mon_buf_ring, &soc->rx_desc_mon[pdev_id],
  634. rx_bufs_used, &head, &tail, HAL_RX_BUF_RBM_SW3_BM);
  635. }
  636. }
  637. static QDF_STATUS
  638. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev) {
  639. uint8_t pdev_id = pdev->pdev_id;
  640. struct dp_soc *soc = pdev->soc;
  641. union dp_rx_desc_list_elem_t *desc_list = NULL;
  642. union dp_rx_desc_list_elem_t *tail = NULL;
  643. struct dp_srng *rxdma_srng;
  644. uint32_t rxdma_entries;
  645. struct rx_desc_pool *rx_desc_pool;
  646. QDF_STATUS status;
  647. rxdma_srng = &pdev->rxdma_mon_buf_ring;
  648. rxdma_entries = rxdma_srng->alloc_size/hal_srng_get_entrysize(
  649. soc->hal_soc,
  650. RXDMA_MONITOR_BUF);
  651. rx_desc_pool = &soc->rx_desc_mon[pdev_id];
  652. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  653. "%s: Mon RX Desc Pool[%d] allocation size=%d"
  654. , __func__, pdev_id, rxdma_entries*3);
  655. status = dp_rx_desc_pool_alloc(soc, pdev_id,
  656. rxdma_entries*3, rx_desc_pool);
  657. if (!QDF_IS_STATUS_SUCCESS(status)) {
  658. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  659. "%s: dp_rx_desc_pool_alloc() failed \n", __func__);
  660. return status;
  661. }
  662. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  663. "%s: Mon RX Buffers Replenish pdev_id=%d",
  664. __func__, pdev_id);
  665. status = dp_rx_buffers_replenish(soc, pdev_id, rxdma_srng, rx_desc_pool,
  666. rxdma_entries, &desc_list, &tail,
  667. HAL_RX_BUF_RBM_SW3_BM);
  668. if (!QDF_IS_STATUS_SUCCESS(status)) {
  669. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  670. "%s: dp_rx_buffers_replenish() failed \n", __func__);
  671. return status;
  672. }
  673. return QDF_STATUS_SUCCESS;
  674. }
  675. static QDF_STATUS
  676. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev) {
  677. uint8_t pdev_id = pdev->pdev_id;
  678. struct dp_soc *soc = pdev->soc;
  679. struct rx_desc_pool *rx_desc_pool;
  680. rx_desc_pool = &soc->rx_desc_mon[pdev_id];
  681. if (rx_desc_pool->pool_size != 0) {
  682. dp_rx_desc_pool_free(soc, pdev_id, rx_desc_pool);
  683. }
  684. return QDF_STATUS_SUCCESS;
  685. }
  686. /*
  687. * Allocate and setup link descriptor pool that will be used by HW for
  688. * various link and queue descriptors and managed by WBM
  689. */
  690. static int dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  691. {
  692. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  693. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  694. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  695. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  696. uint32_t total_link_descs, total_mem_size;
  697. uint32_t num_link_desc_banks;
  698. uint32_t last_bank_size = 0;
  699. uint32_t entry_size, num_entries;
  700. void *mon_desc_srng;
  701. uint32_t num_replenish_buf;
  702. struct dp_srng *dp_srng;
  703. int i;
  704. dp_srng = &dp_pdev->rxdma_mon_desc_ring;
  705. num_entries = dp_srng->alloc_size/hal_srng_get_entrysize(
  706. soc->hal_soc, RXDMA_MONITOR_DESC);
  707. /* Round up to power of 2 */
  708. total_link_descs = 1;
  709. while (total_link_descs < num_entries)
  710. total_link_descs <<= 1;
  711. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  712. "%s: total_link_descs: %u, link_desc_size: %d\n",
  713. __func__, total_link_descs, link_desc_size);
  714. total_mem_size = total_link_descs * link_desc_size;
  715. total_mem_size += link_desc_align;
  716. if (total_mem_size <= max_alloc_size) {
  717. num_link_desc_banks = 0;
  718. last_bank_size = total_mem_size;
  719. } else {
  720. num_link_desc_banks = (total_mem_size) /
  721. (max_alloc_size - link_desc_align);
  722. last_bank_size = total_mem_size %
  723. (max_alloc_size - link_desc_align);
  724. }
  725. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  726. "%s: total_mem_size: %d, num_link_desc_banks: %u, \
  727. max_alloc_size: %d last_bank_size: %d\n",
  728. __func__, total_mem_size, num_link_desc_banks, max_alloc_size,
  729. last_bank_size);
  730. for (i = 0; i < num_link_desc_banks; i++) {
  731. dp_pdev->link_desc_banks[i].base_vaddr_unaligned =
  732. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  733. max_alloc_size,
  734. &(dp_pdev->link_desc_banks[i].base_paddr_unaligned));
  735. if (!dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  736. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  737. "%s: Link desc memory allocation failed\n",
  738. __func__);
  739. goto fail;
  740. }
  741. dp_pdev->link_desc_banks[i].size = max_alloc_size;
  742. dp_pdev->link_desc_banks[i].base_vaddr =
  743. (void *)((unsigned long)
  744. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) +
  745. ((unsigned long)
  746. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) %
  747. link_desc_align));
  748. dp_pdev->link_desc_banks[i].base_paddr =
  749. (unsigned long)
  750. (dp_pdev->link_desc_banks[i].base_paddr_unaligned) +
  751. ((unsigned long)
  752. (dp_pdev->link_desc_banks[i].base_vaddr) -
  753. (unsigned long)
  754. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned));
  755. }
  756. if (last_bank_size) {
  757. /* Allocate last bank in case total memory required is not exact
  758. * multiple of max_alloc_size
  759. */
  760. dp_pdev->link_desc_banks[i].base_vaddr_unaligned =
  761. qdf_mem_alloc_consistent(soc->osdev,
  762. soc->osdev->dev, last_bank_size,
  763. &(dp_pdev->link_desc_banks[i].base_paddr_unaligned));
  764. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned == NULL) {
  765. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  766. "%s: allocation failed for mon link desc pool\n",
  767. __func__);
  768. goto fail;
  769. }
  770. dp_pdev->link_desc_banks[i].size = last_bank_size;
  771. dp_pdev->link_desc_banks[i].base_vaddr =
  772. (void *)((unsigned long)
  773. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) +
  774. ((unsigned long)
  775. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) %
  776. link_desc_align));
  777. dp_pdev->link_desc_banks[i].base_paddr =
  778. (unsigned long)
  779. (dp_pdev->link_desc_banks[i].base_paddr_unaligned) +
  780. ((unsigned long)
  781. (dp_pdev->link_desc_banks[i].base_vaddr) -
  782. (unsigned long)
  783. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned));
  784. }
  785. /* Allocate and setup link descriptor idle list for HW internal use */
  786. entry_size = hal_srng_get_entrysize(soc->hal_soc, RXDMA_MONITOR_DESC);
  787. total_mem_size = entry_size * total_link_descs;
  788. mon_desc_srng = dp_pdev->rxdma_mon_desc_ring.hal_srng;
  789. num_replenish_buf = 0;
  790. if (total_mem_size <= max_alloc_size) {
  791. void *desc;
  792. hal_srng_access_start_unlocked(soc->hal_soc, mon_desc_srng);
  793. for (i = 0; i < MAX_MON_LINK_DESC_BANKS &&
  794. dp_pdev->link_desc_banks[i].base_paddr; i++) {
  795. uint32_t num_entries =
  796. (dp_pdev->link_desc_banks[i].size -
  797. (unsigned long)
  798. (dp_pdev->link_desc_banks[i].base_vaddr) -
  799. (unsigned long)
  800. (dp_pdev->link_desc_banks[i].base_vaddr_unaligned))
  801. / link_desc_size;
  802. unsigned long paddr =
  803. (unsigned long)
  804. (dp_pdev->link_desc_banks[i].base_paddr);
  805. unsigned long vaddr =
  806. (unsigned long)
  807. (dp_pdev->link_desc_banks[i].base_vaddr);
  808. while (num_entries && (desc =
  809. hal_srng_src_get_next(soc->hal_soc,
  810. mon_desc_srng))) {
  811. hal_set_link_desc_addr(desc, i, paddr);
  812. num_entries--;
  813. num_replenish_buf++;
  814. paddr += link_desc_size;
  815. vaddr += link_desc_size;
  816. }
  817. }
  818. hal_srng_access_end_unlocked(soc->hal_soc, mon_desc_srng);
  819. } else {
  820. qdf_assert(0);
  821. }
  822. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  823. "%s: successfully replenished %d buffer\n",
  824. __func__, num_replenish_buf);
  825. return 0;
  826. fail:
  827. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  828. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  829. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  830. dp_pdev->link_desc_banks[i].size,
  831. dp_pdev->link_desc_banks[i].base_vaddr_unaligned,
  832. dp_pdev->link_desc_banks[i].base_paddr_unaligned, 0);
  833. dp_pdev->link_desc_banks[i].base_vaddr_unaligned = NULL;
  834. }
  835. }
  836. return QDF_STATUS_E_FAILURE;
  837. }
  838. /*
  839. * Free link descriptor pool that was setup HW
  840. */
  841. static void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  842. {
  843. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  844. int i;
  845. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  846. if (dp_pdev->link_desc_banks[i].base_vaddr_unaligned) {
  847. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  848. dp_pdev->link_desc_banks[i].size,
  849. dp_pdev->link_desc_banks[i].base_vaddr_unaligned,
  850. dp_pdev->link_desc_banks[i].base_paddr_unaligned, 0);
  851. dp_pdev->link_desc_banks[i].base_vaddr_unaligned = NULL;
  852. }
  853. }
  854. }
  855. /**
  856. * dp_rx_pdev_mon_attach() - attach DP RX for monitor mode
  857. * @pdev: core txrx pdev context
  858. *
  859. * This function will attach a DP RX for monitor mode instance into
  860. * the main device (SOC) context. Will allocate dp rx resource and
  861. * initialize resources.
  862. *
  863. * Return: QDF_STATUS_SUCCESS: success
  864. * QDF_STATUS_E_RESOURCES: Error return
  865. */
  866. QDF_STATUS
  867. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  868. uint8_t pdev_id = pdev->pdev_id;
  869. struct dp_soc *soc = pdev->soc;
  870. QDF_STATUS status;
  871. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  872. "%s: pdev attach id=%d\n", __func__, pdev_id);
  873. status = dp_rx_pdev_mon_buf_attach(pdev);
  874. if (!QDF_IS_STATUS_SUCCESS(status)) {
  875. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  876. "%s: dp_rx_pdev_mon_buf_attach() failed \n", __func__);
  877. return status;
  878. }
  879. status = dp_rx_pdev_mon_status_attach(pdev);
  880. if (!QDF_IS_STATUS_SUCCESS(status)) {
  881. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  882. "%s: dp_rx_pdev_mon_status_attach() failed \n",
  883. __func__);
  884. return status;
  885. }
  886. status = dp_mon_link_desc_pool_setup(soc, pdev_id);
  887. if (!QDF_IS_STATUS_SUCCESS(status)) {
  888. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  889. "%s: dp_mon_link_desc_pool_setup() failed \n",
  890. __func__);
  891. return status;
  892. }
  893. return QDF_STATUS_SUCCESS;
  894. }
  895. /**
  896. * dp_rx_pdev_mon_detach() - detach dp rx for monitor mode
  897. * @pdev: core txrx pdev context
  898. *
  899. * This function will detach DP RX for monitor mode from
  900. * main device context. will free DP Rx resources for
  901. * monitor mode
  902. *
  903. * Return: QDF_STATUS_SUCCESS: success
  904. * QDF_STATUS_E_RESOURCES: Error return
  905. */
  906. QDF_STATUS
  907. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  908. uint8_t pdev_id = pdev->pdev_id;
  909. struct dp_soc *soc = pdev->soc;
  910. dp_mon_link_desc_pool_cleanup(soc, pdev_id);
  911. dp_rx_pdev_mon_status_detach(pdev);
  912. dp_rx_pdev_mon_buf_detach(pdev);
  913. return QDF_STATUS_SUCCESS;
  914. }