dp_rx_err.c 37 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371
  1. /*
  2. * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "dp_internal.h"
  22. #include "hal_api.h"
  23. #include "qdf_trace.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef CONFIG_MCL
  26. #include <cds_ieee80211_common.h>
  27. #else
  28. #include <linux/ieee80211.h>
  29. #endif
  30. #include "dp_rx_defrag.h"
  31. #include <enet.h> /* LLC_SNAP_HDR_LEN */
  32. #ifdef RX_DESC_DEBUG_CHECK
  33. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  34. {
  35. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC)) {
  36. return false;
  37. }
  38. rx_desc->magic = 0;
  39. return true;
  40. }
  41. #else
  42. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  43. {
  44. return true;
  45. }
  46. #endif
  47. /**
  48. * dp_rx_mcast_echo_check() - check if the mcast pkt is a loop
  49. * back on same vap or a different vap.
  50. *
  51. * @soc: core DP main context
  52. * @peer: dp peer handler
  53. * @rx_tlv_hdr: start of the rx TLV header
  54. * @nbuf: pkt buffer
  55. *
  56. * Return: bool (true if it is a looped back pkt else false)
  57. *
  58. */
  59. static inline bool dp_rx_mcast_echo_check(struct dp_soc *soc,
  60. struct dp_peer *peer,
  61. uint8_t *rx_tlv_hdr,
  62. qdf_nbuf_t nbuf)
  63. {
  64. struct dp_vdev *vdev = peer->vdev;
  65. struct dp_ast_entry *ase;
  66. uint16_t sa_idx = 0;
  67. uint8_t *data;
  68. /*
  69. * Multicast Echo Check is required only if vdev is STA and
  70. * received pkt is a multicast/broadcast pkt. otherwise
  71. * skip the MEC check.
  72. */
  73. if (vdev->opmode != wlan_op_mode_sta)
  74. return false;
  75. if (!hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))
  76. return false;
  77. data = qdf_nbuf_data(nbuf);
  78. /*
  79. * if the received pkts src mac addr matches with vdev
  80. * mac address then drop the pkt as it is looped back
  81. */
  82. if (!(qdf_mem_cmp(&data[DP_MAC_ADDR_LEN],
  83. vdev->mac_addr.raw,
  84. DP_MAC_ADDR_LEN)))
  85. return true;
  86. /* if the received pkts src mac addr matches with the
  87. * wired PCs MAC addr which is behind the STA or with
  88. * wireless STAs MAC addr which are behind the Repeater,
  89. * then drop the pkt as it is looped back
  90. */
  91. qdf_spin_lock_bh(&soc->ast_lock);
  92. if (hal_rx_msdu_end_sa_is_valid_get(rx_tlv_hdr)) {
  93. sa_idx = hal_rx_msdu_end_sa_idx_get(rx_tlv_hdr);
  94. if ((sa_idx < 0) ||
  95. (sa_idx >= (WLAN_UMAC_PSOC_MAX_PEERS * 2))) {
  96. qdf_spin_unlock_bh(&soc->ast_lock);
  97. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  98. "invalid sa_idx: %d", sa_idx);
  99. qdf_assert_always(0);
  100. }
  101. ase = soc->ast_table[sa_idx];
  102. if (!ase) {
  103. /* We do not get a peer map event for STA and without
  104. * this event we don't know what is STA's sa_idx.
  105. * For this reason the AST is still not associated to
  106. * any index postion in ast_table.
  107. * In these kind of scenarios where sa is valid but
  108. * ast is not in ast_table, we use the below API to get
  109. * AST entry for STA's own mac_address.
  110. */
  111. ase = dp_peer_ast_hash_find(soc,
  112. &data[DP_MAC_ADDR_LEN]);
  113. }
  114. } else
  115. ase = dp_peer_ast_hash_find(soc, &data[DP_MAC_ADDR_LEN]);
  116. if (ase) {
  117. ase->ast_idx = sa_idx;
  118. soc->ast_table[sa_idx] = ase;
  119. if (ase->pdev_id != vdev->pdev->pdev_id) {
  120. qdf_spin_unlock_bh(&soc->ast_lock);
  121. QDF_TRACE(QDF_MODULE_ID_DP,
  122. QDF_TRACE_LEVEL_INFO,
  123. "Detected DBDC Root AP %pM, %d %d",
  124. &data[DP_MAC_ADDR_LEN], vdev->pdev->pdev_id,
  125. ase->pdev_id);
  126. return false;
  127. }
  128. if ((ase->type == CDP_TXRX_AST_TYPE_MEC) ||
  129. (ase->peer != peer)) {
  130. qdf_spin_unlock_bh(&soc->ast_lock);
  131. QDF_TRACE(QDF_MODULE_ID_DP,
  132. QDF_TRACE_LEVEL_INFO,
  133. "received pkt with same src mac %pM",
  134. &data[DP_MAC_ADDR_LEN]);
  135. return true;
  136. }
  137. }
  138. qdf_spin_unlock_bh(&soc->ast_lock);
  139. return false;
  140. }
  141. /**
  142. * dp_rx_link_desc_return_by_addr - Return a MPDU link descriptor to
  143. * (WBM) by address
  144. *
  145. * @soc: core DP main context
  146. * @link_desc_addr: link descriptor addr
  147. *
  148. * Return: QDF_STATUS
  149. */
  150. QDF_STATUS
  151. dp_rx_link_desc_return_by_addr(struct dp_soc *soc, void *link_desc_addr,
  152. uint8_t bm_action)
  153. {
  154. struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
  155. void *wbm_rel_srng = wbm_desc_rel_ring->hal_srng;
  156. void *hal_soc = soc->hal_soc;
  157. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  158. void *src_srng_desc;
  159. if (!wbm_rel_srng) {
  160. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  161. "WBM RELEASE RING not initialized");
  162. return status;
  163. }
  164. if (qdf_unlikely(hal_srng_access_start(hal_soc, wbm_rel_srng))) {
  165. /* TODO */
  166. /*
  167. * Need API to convert from hal_ring pointer to
  168. * Ring Type / Ring Id combo
  169. */
  170. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  171. FL("HAL RING Access For WBM Release SRNG Failed - %pK"),
  172. wbm_rel_srng);
  173. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  174. goto done;
  175. }
  176. src_srng_desc = hal_srng_src_get_next(hal_soc, wbm_rel_srng);
  177. if (qdf_likely(src_srng_desc)) {
  178. /* Return link descriptor through WBM ring (SW2WBM)*/
  179. hal_rx_msdu_link_desc_set(hal_soc,
  180. src_srng_desc, link_desc_addr, bm_action);
  181. status = QDF_STATUS_SUCCESS;
  182. } else {
  183. struct hal_srng *srng = (struct hal_srng *)wbm_rel_srng;
  184. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  185. FL("WBM Release Ring (Id %d) Full"), srng->ring_id);
  186. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  187. "HP 0x%x Reap HP 0x%x TP 0x%x Cached TP 0x%x",
  188. *srng->u.src_ring.hp_addr, srng->u.src_ring.reap_hp,
  189. *srng->u.src_ring.tp_addr, srng->u.src_ring.cached_tp);
  190. }
  191. done:
  192. hal_srng_access_end(hal_soc, wbm_rel_srng);
  193. return status;
  194. }
  195. /**
  196. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  197. * (WBM), following error handling
  198. *
  199. * @soc: core DP main context
  200. * @ring_desc: opaque pointer to the REO error ring descriptor
  201. *
  202. * Return: QDF_STATUS
  203. */
  204. QDF_STATUS
  205. dp_rx_link_desc_return(struct dp_soc *soc, void *ring_desc, uint8_t bm_action)
  206. {
  207. void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
  208. return dp_rx_link_desc_return_by_addr(soc, buf_addr_info, bm_action);
  209. }
  210. /**
  211. * dp_rx_msdus_drop() - Drops all MSDU's per MPDU
  212. *
  213. * @soc: core txrx main context
  214. * @ring_desc: opaque pointer to the REO error ring descriptor
  215. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  216. * @head: head of the local descriptor free-list
  217. * @tail: tail of the local descriptor free-list
  218. * @quota: No. of units (packets) that can be serviced in one shot.
  219. *
  220. * This function is used to drop all MSDU in an MPDU
  221. *
  222. * Return: uint32_t: No. of elements processed
  223. */
  224. static uint32_t dp_rx_msdus_drop(struct dp_soc *soc, void *ring_desc,
  225. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  226. union dp_rx_desc_list_elem_t **head,
  227. union dp_rx_desc_list_elem_t **tail,
  228. uint32_t quota)
  229. {
  230. uint32_t rx_bufs_used = 0;
  231. void *link_desc_va;
  232. struct hal_buf_info buf_info;
  233. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  234. int i;
  235. uint8_t *rx_tlv_hdr;
  236. uint32_t tid;
  237. hal_rx_reo_buf_paddr_get(ring_desc, &buf_info);
  238. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  239. /* No UNMAP required -- this is "malloc_consistent" memory */
  240. hal_rx_msdu_list_get(link_desc_va, &msdu_list,
  241. &mpdu_desc_info->msdu_count);
  242. for (i = 0; (i < mpdu_desc_info->msdu_count) && quota--; i++) {
  243. struct dp_rx_desc *rx_desc =
  244. dp_rx_cookie_2_va_rxdma_buf(soc,
  245. msdu_list.sw_cookie[i]);
  246. qdf_assert(rx_desc);
  247. if (!dp_rx_desc_check_magic(rx_desc)) {
  248. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  249. FL("Invalid rx_desc cookie=%d"),
  250. msdu_list.sw_cookie[i]);
  251. return rx_bufs_used;
  252. }
  253. rx_bufs_used++;
  254. tid = hal_rx_mpdu_start_tid_get(rx_desc->rx_buf_start);
  255. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  256. "Packet received with PN error for tid :%d", tid);
  257. rx_tlv_hdr = qdf_nbuf_data(rx_desc->nbuf);
  258. if (hal_rx_encryption_info_valid(rx_tlv_hdr))
  259. hal_rx_print_pn(rx_tlv_hdr);
  260. /* Just free the buffers */
  261. qdf_nbuf_free(rx_desc->nbuf);
  262. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  263. }
  264. /* Return link descriptor through WBM ring (SW2WBM)*/
  265. dp_rx_link_desc_return(soc, ring_desc, HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  266. return rx_bufs_used;
  267. }
  268. /**
  269. * dp_rx_pn_error_handle() - Handles PN check errors
  270. *
  271. * @soc: core txrx main context
  272. * @ring_desc: opaque pointer to the REO error ring descriptor
  273. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  274. * @head: head of the local descriptor free-list
  275. * @tail: tail of the local descriptor free-list
  276. * @quota: No. of units (packets) that can be serviced in one shot.
  277. *
  278. * This function implements PN error handling
  279. * If the peer is configured to ignore the PN check errors
  280. * or if DP feels, that this frame is still OK, the frame can be
  281. * re-injected back to REO to use some of the other features
  282. * of REO e.g. duplicate detection/routing to other cores
  283. *
  284. * Return: uint32_t: No. of elements processed
  285. */
  286. static uint32_t
  287. dp_rx_pn_error_handle(struct dp_soc *soc, void *ring_desc,
  288. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  289. union dp_rx_desc_list_elem_t **head,
  290. union dp_rx_desc_list_elem_t **tail,
  291. uint32_t quota)
  292. {
  293. uint16_t peer_id;
  294. uint32_t rx_bufs_used = 0;
  295. struct dp_peer *peer;
  296. bool peer_pn_policy = false;
  297. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  298. mpdu_desc_info->peer_meta_data);
  299. peer = dp_peer_find_by_id(soc, peer_id);
  300. if (qdf_likely(peer)) {
  301. /*
  302. * TODO: Check for peer specific policies & set peer_pn_policy
  303. */
  304. }
  305. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  306. "Packet received with PN error");
  307. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  308. "discard rx due to PN error for peer %pK "
  309. "(%02x:%02x:%02x:%02x:%02x:%02x)\n",
  310. peer,
  311. peer->mac_addr.raw[0], peer->mac_addr.raw[1],
  312. peer->mac_addr.raw[2], peer->mac_addr.raw[3],
  313. peer->mac_addr.raw[4], peer->mac_addr.raw[5]);
  314. /* No peer PN policy -- definitely drop */
  315. if (!peer_pn_policy)
  316. rx_bufs_used = dp_rx_msdus_drop(soc, ring_desc,
  317. mpdu_desc_info,
  318. head, tail, quota);
  319. return rx_bufs_used;
  320. }
  321. /**
  322. * dp_rx_2k_jump_handle() - Handles Sequence Number Jump by 2K
  323. *
  324. * @soc: core txrx main context
  325. * @ring_desc: opaque pointer to the REO error ring descriptor
  326. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  327. * @head: head of the local descriptor free-list
  328. * @tail: tail of the local descriptor free-list
  329. * @quota: No. of units (packets) that can be serviced in one shot.
  330. *
  331. * This function implements the error handling when sequence number
  332. * of the MPDU jumps suddenly by 2K.Today there are 2 cases that
  333. * need to be handled:
  334. * A) CSN (Current Sequence Number) = Last Valid SN (LSN) + 2K
  335. * B) CSN = LSN + 2K, but falls within a "BA sized window" of the SSN
  336. * For case A) the protocol stack is invoked to generate DELBA/DEAUTH frame
  337. * For case B), the frame is normally dropped, no more action is taken
  338. *
  339. * Return: uint32_t: No. of elements processed
  340. */
  341. static uint32_t
  342. dp_rx_2k_jump_handle(struct dp_soc *soc, void *ring_desc,
  343. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  344. union dp_rx_desc_list_elem_t **head,
  345. union dp_rx_desc_list_elem_t **tail,
  346. uint32_t quota)
  347. {
  348. return dp_rx_msdus_drop(soc, ring_desc, mpdu_desc_info,
  349. head, tail, quota);
  350. }
  351. static bool
  352. dp_rx_chain_msdus(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr,
  353. uint8_t mac_id)
  354. {
  355. bool mpdu_done = false;
  356. /* TODO: Currently only single radio is supported, hence
  357. * pdev hard coded to '0' index
  358. */
  359. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  360. if (hal_rx_msdu_end_first_msdu_get(rx_tlv_hdr)) {
  361. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  362. dp_pdev->invalid_peer_head_msdu = NULL;
  363. dp_pdev->invalid_peer_tail_msdu = NULL;
  364. hal_rx_mon_hw_desc_get_mpdu_status(rx_tlv_hdr,
  365. &(dp_pdev->ppdu_info.rx_status));
  366. }
  367. if (hal_rx_msdu_end_last_msdu_get(rx_tlv_hdr)) {
  368. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  369. mpdu_done = true;
  370. }
  371. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  372. dp_pdev->invalid_peer_tail_msdu,
  373. nbuf);
  374. return mpdu_done;
  375. }
  376. /**
  377. * dp_rx_null_q_desc_handle() - Function to handle NULL Queue
  378. * descriptor violation on either a
  379. * REO or WBM ring
  380. *
  381. * @soc: core DP main context
  382. * @rx_desc : pointer to the sw rx descriptor
  383. * @head: pointer to head of rx descriptors to be added to free list
  384. * @tail: pointer to tail of rx descriptors to be added to free list
  385. * quota: upper limit of descriptors that can be reaped
  386. *
  387. * This function handles NULL queue descriptor violations arising out
  388. * a missing REO queue for a given peer or a given TID. This typically
  389. * may happen if a packet is received on a QOS enabled TID before the
  390. * ADDBA negotiation for that TID, when the TID queue is setup. Or
  391. * it may also happen for MC/BC frames if they are not routed to the
  392. * non-QOS TID queue, in the absence of any other default TID queue.
  393. * This error can show up both in a REO destination or WBM release ring.
  394. *
  395. * Return: uint32_t: No. of Rx buffers reaped
  396. */
  397. static void
  398. dp_rx_null_q_desc_handle(struct dp_soc *soc,
  399. qdf_nbuf_t nbuf,
  400. uint8_t *rx_tlv_hdr,
  401. uint8_t pool_id)
  402. {
  403. uint32_t pkt_len, l2_hdr_offset;
  404. uint16_t msdu_len;
  405. struct dp_vdev *vdev;
  406. uint16_t peer_id = 0xFFFF;
  407. struct dp_peer *peer = NULL;
  408. uint8_t tid;
  409. qdf_nbuf_set_rx_chfrag_start(nbuf,
  410. hal_rx_msdu_end_first_msdu_get(rx_tlv_hdr));
  411. qdf_nbuf_set_rx_chfrag_end(nbuf,
  412. hal_rx_msdu_end_last_msdu_get(rx_tlv_hdr));
  413. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  414. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  415. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  416. /* Set length in nbuf */
  417. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  418. /*
  419. * Check if DMA completed -- msdu_done is the last bit
  420. * to be written
  421. */
  422. if (!hal_rx_attn_msdu_done_get(rx_tlv_hdr)) {
  423. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  424. FL("MSDU DONE failure"));
  425. hal_rx_dump_pkt_tlvs(rx_tlv_hdr, QDF_TRACE_LEVEL_INFO);
  426. qdf_assert(0);
  427. }
  428. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_tlv_hdr);
  429. peer = dp_peer_find_by_id(soc, peer_id);
  430. if (!peer) {
  431. bool mpdu_done = false;
  432. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  433. FL("peer is NULL"));
  434. mpdu_done = dp_rx_chain_msdus(soc, nbuf, rx_tlv_hdr, pool_id);
  435. /* Trigger invalid peer handler wrapper */
  436. dp_rx_process_invalid_peer_wrapper(soc, nbuf, mpdu_done);
  437. return;
  438. }
  439. vdev = peer->vdev;
  440. if (!vdev) {
  441. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  442. FL("INVALID vdev %pK OR osif_rx"), vdev);
  443. /* Drop & free packet */
  444. qdf_nbuf_free(nbuf);
  445. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  446. return;
  447. }
  448. /*
  449. * Advance the packet start pointer by total size of
  450. * pre-header TLV's
  451. */
  452. qdf_nbuf_pull_head(nbuf, (l2_hdr_offset + RX_PKT_TLVS_LEN));
  453. if (dp_rx_mcast_echo_check(soc, peer, rx_tlv_hdr, nbuf)) {
  454. /* this is a looped back MCBC pkt, drop it */
  455. qdf_nbuf_free(nbuf);
  456. return;
  457. }
  458. /*
  459. * In qwrap mode if the received packet matches with any of the vdev
  460. * mac addresses, drop it. Donot receive multicast packets originated
  461. * from any proxysta.
  462. */
  463. if (check_qwrap_multicast_loopback(vdev, nbuf)) {
  464. qdf_nbuf_free(nbuf);
  465. return;
  466. }
  467. if (qdf_unlikely((peer->nawds_enabled == true) &&
  468. hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  469. QDF_TRACE(QDF_MODULE_ID_DP,
  470. QDF_TRACE_LEVEL_DEBUG,
  471. "%s free buffer for multicast packet",
  472. __func__);
  473. DP_STATS_INC_PKT(peer, rx.nawds_mcast_drop,
  474. 1, qdf_nbuf_len(nbuf));
  475. qdf_nbuf_free(nbuf);
  476. return;
  477. }
  478. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer,
  479. hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr))) {
  480. QDF_TRACE(QDF_MODULE_ID_DP,
  481. QDF_TRACE_LEVEL_ERROR,
  482. FL("mcast Policy Check Drop pkt"));
  483. /* Drop & free packet */
  484. qdf_nbuf_free(nbuf);
  485. return;
  486. }
  487. /* WDS Source Port Learning */
  488. if (qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet &&
  489. vdev->wds_enabled))
  490. dp_rx_wds_srcport_learn(soc, rx_tlv_hdr, peer, nbuf);
  491. if (hal_rx_mpdu_start_mpdu_qos_control_valid_get(rx_tlv_hdr)) {
  492. /* TODO: Assuming that qos_control_valid also indicates
  493. * unicast. Should we check this?
  494. */
  495. tid = hal_rx_mpdu_start_tid_get(rx_tlv_hdr);
  496. if (peer &&
  497. peer->rx_tid[tid].hw_qdesc_vaddr_unaligned == NULL) {
  498. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  499. dp_rx_tid_setup_wifi3(peer, tid, 1, IEEE80211_SEQ_MAX);
  500. }
  501. }
  502. #ifdef QCA_WIFI_NAPIER_EMULATION /* Debug code, remove later */
  503. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  504. "%s: p_id %d msdu_len %d hdr_off %d",
  505. __func__, peer_id, msdu_len, l2_hdr_offset);
  506. print_hex_dump(KERN_ERR, "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  507. qdf_nbuf_data(nbuf), 128, false);
  508. #endif /* NAPIER_EMULATION */
  509. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  510. qdf_nbuf_set_next(nbuf, NULL);
  511. dp_rx_deliver_raw(vdev, nbuf, peer);
  512. } else {
  513. if (qdf_unlikely(peer->bss_peer)) {
  514. QDF_TRACE(QDF_MODULE_ID_DP,
  515. QDF_TRACE_LEVEL_INFO,
  516. FL("received pkt with same src MAC"));
  517. /* Drop & free packet */
  518. qdf_nbuf_free(nbuf);
  519. return;
  520. }
  521. if (vdev->osif_rx) {
  522. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  523. FL("vdev %pK osif_rx %pK"), vdev,
  524. vdev->osif_rx);
  525. qdf_nbuf_set_next(nbuf, NULL);
  526. vdev->osif_rx(vdev->osif_vdev, nbuf);
  527. DP_STATS_INCC_PKT(vdev->pdev, rx.multicast, 1,
  528. qdf_nbuf_len(nbuf),
  529. hal_rx_msdu_end_da_is_mcbc_get(
  530. rx_tlv_hdr));
  531. DP_STATS_INC_PKT(vdev->pdev, rx.to_stack, 1,
  532. qdf_nbuf_len(nbuf));
  533. } else {
  534. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  535. FL("INVALID vdev %pK OR osif_rx"), vdev);
  536. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  537. }
  538. }
  539. return;
  540. }
  541. /**
  542. * dp_rx_err_deliver() - Function to deliver error frames to OS
  543. *
  544. * @soc: core DP main context
  545. * @rx_desc : pointer to the sw rx descriptor
  546. * @head: pointer to head of rx descriptors to be added to free list
  547. * @tail: pointer to tail of rx descriptors to be added to free list
  548. * quota: upper limit of descriptors that can be reaped
  549. *
  550. * Return: uint32_t: No. of Rx buffers reaped
  551. */
  552. static void
  553. dp_rx_err_deliver(struct dp_soc *soc, qdf_nbuf_t nbuf, uint8_t *rx_tlv_hdr)
  554. {
  555. uint32_t pkt_len, l2_hdr_offset;
  556. uint16_t msdu_len;
  557. struct dp_vdev *vdev;
  558. uint16_t peer_id = 0xFFFF;
  559. struct dp_peer *peer = NULL;
  560. struct ether_header *eh;
  561. bool isBroadcast;
  562. /*
  563. * Check if DMA completed -- msdu_done is the last bit
  564. * to be written
  565. */
  566. if (!hal_rx_attn_msdu_done_get(rx_tlv_hdr)) {
  567. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  568. FL("MSDU DONE failure"));
  569. hal_rx_dump_pkt_tlvs(rx_tlv_hdr, QDF_TRACE_LEVEL_INFO);
  570. qdf_assert(0);
  571. }
  572. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_tlv_hdr);
  573. peer = dp_peer_find_by_id(soc, peer_id);
  574. if (!peer) {
  575. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  576. FL("peer is NULL"));
  577. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  578. qdf_nbuf_len(nbuf));
  579. /* Drop & free packet */
  580. qdf_nbuf_free(nbuf);
  581. return;
  582. }
  583. vdev = peer->vdev;
  584. if (!vdev) {
  585. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  586. FL("INVALID vdev %pK OR osif_rx"), vdev);
  587. /* Drop & free packet */
  588. qdf_nbuf_free(nbuf);
  589. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  590. return;
  591. }
  592. /* Drop & free packet if mesh mode not enabled */
  593. if (!vdev->mesh_vdev) {
  594. qdf_nbuf_free(nbuf);
  595. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  596. return;
  597. }
  598. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(rx_tlv_hdr);
  599. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_tlv_hdr);
  600. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  601. /* Set length in nbuf */
  602. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  603. qdf_nbuf_set_next(nbuf, NULL);
  604. /*
  605. * Advance the packet start pointer by total size of
  606. * pre-header TLV's
  607. */
  608. qdf_nbuf_pull_head(nbuf, (l2_hdr_offset + RX_PKT_TLVS_LEN));
  609. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  610. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  611. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  612. == QDF_STATUS_SUCCESS) {
  613. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_MED,
  614. FL("mesh pkt filtered"));
  615. DP_STATS_INC(vdev->pdev, dropped.mesh_filter, 1);
  616. qdf_nbuf_free(nbuf);
  617. return;
  618. }
  619. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  620. if (qdf_unlikely(hal_rx_msdu_end_da_is_mcbc_get(rx_tlv_hdr) &&
  621. (vdev->rx_decap_type ==
  622. htt_cmn_pkt_type_ethernet))) {
  623. eh = (struct ether_header *)qdf_nbuf_data(nbuf);
  624. isBroadcast = (IEEE80211_IS_BROADCAST
  625. (eh->ether_dhost)) ? 1 : 0 ;
  626. if (isBroadcast) {
  627. DP_STATS_INC_PKT(peer, rx.bcast, 1,
  628. qdf_nbuf_len(nbuf));
  629. }
  630. }
  631. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  632. dp_rx_deliver_raw(vdev, nbuf, peer);
  633. } else {
  634. DP_STATS_INC(vdev->pdev, rx.to_stack.num, 1);
  635. vdev->osif_rx(vdev->osif_vdev, nbuf);
  636. }
  637. return;
  638. }
  639. /**
  640. * dp_rx_process_mic_error(): Function to pass mic error indication to umac
  641. * @soc: DP SOC handle
  642. * @rx_desc : pointer to the sw rx descriptor
  643. * @head: pointer to head of rx descriptors to be added to free list
  644. * @tail: pointer to tail of rx descriptors to be added to free list
  645. *
  646. * return: void
  647. */
  648. void
  649. dp_rx_process_mic_error(struct dp_soc *soc,
  650. qdf_nbuf_t nbuf,
  651. uint8_t *rx_tlv_hdr)
  652. {
  653. struct dp_vdev *vdev = NULL;
  654. struct dp_pdev *pdev = NULL;
  655. struct ol_if_ops *tops = NULL;
  656. struct ieee80211_frame *wh;
  657. uint8_t *rx_pkt_hdr;
  658. struct dp_peer *peer;
  659. uint16_t peer_id;
  660. if (!hal_rx_msdu_end_first_msdu_get(rx_tlv_hdr))
  661. return;
  662. rx_pkt_hdr = hal_rx_pkt_hdr_get(qdf_nbuf_data(nbuf));
  663. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  664. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_tlv_hdr);
  665. peer = dp_peer_find_by_id(soc, peer_id);
  666. if (!peer) {
  667. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  668. "peer not found");
  669. goto fail;
  670. }
  671. vdev = peer->vdev;
  672. if (!vdev) {
  673. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  674. "VDEV not found");
  675. goto fail;
  676. }
  677. pdev = vdev->pdev;
  678. if (!pdev) {
  679. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  680. "PDEV not found");
  681. goto fail;
  682. }
  683. tops = pdev->soc->cdp_soc.ol_ops;
  684. if (tops->rx_mic_error)
  685. tops->rx_mic_error(pdev->osif_pdev, vdev->vdev_id, wh);
  686. fail:
  687. qdf_nbuf_free(nbuf);
  688. return;
  689. }
  690. /**
  691. * dp_rx_err_process() - Processes error frames routed to REO error ring
  692. *
  693. * @soc: core txrx main context
  694. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  695. * @quota: No. of units (packets) that can be serviced in one shot.
  696. *
  697. * This function implements error processing and top level demultiplexer
  698. * for all the frames routed to REO error ring.
  699. *
  700. * Return: uint32_t: No. of elements processed
  701. */
  702. uint32_t
  703. dp_rx_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  704. {
  705. void *hal_soc;
  706. void *ring_desc;
  707. union dp_rx_desc_list_elem_t *head = NULL;
  708. union dp_rx_desc_list_elem_t *tail = NULL;
  709. uint32_t rx_bufs_used = 0;
  710. uint8_t buf_type;
  711. uint8_t error, rbm;
  712. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  713. struct hal_buf_info hbi;
  714. struct dp_pdev *dp_pdev;
  715. struct dp_srng *dp_rxdma_srng;
  716. struct rx_desc_pool *rx_desc_pool;
  717. uint32_t cookie = 0;
  718. void *link_desc_va;
  719. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  720. uint16_t num_msdus;
  721. /* Debug -- Remove later */
  722. qdf_assert(soc && hal_ring);
  723. hal_soc = soc->hal_soc;
  724. /* Debug -- Remove later */
  725. qdf_assert(hal_soc);
  726. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  727. /* TODO */
  728. /*
  729. * Need API to convert from hal_ring pointer to
  730. * Ring Type / Ring Id combo
  731. */
  732. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  733. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  734. FL("HAL RING Access Failed -- %pK"), hal_ring);
  735. goto done;
  736. }
  737. while (qdf_likely(quota-- && (ring_desc =
  738. hal_srng_dst_get_next(hal_soc, hal_ring)))) {
  739. DP_STATS_INC(soc, rx.err_ring_pkts, 1);
  740. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  741. qdf_assert(error == HAL_REO_ERROR_DETECTED);
  742. buf_type = HAL_RX_REO_BUF_TYPE_GET(ring_desc);
  743. /*
  744. * For REO error ring, expect only MSDU LINK DESC
  745. */
  746. qdf_assert_always(buf_type == HAL_RX_REO_MSDU_LINK_DESC_TYPE);
  747. cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  748. /*
  749. * check for the magic number in the sw cookie
  750. */
  751. qdf_assert_always((cookie >> LINK_DESC_ID_SHIFT) &
  752. LINK_DESC_ID_START);
  753. /*
  754. * Check if the buffer is to be processed on this processor
  755. */
  756. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  757. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  758. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &hbi);
  759. hal_rx_msdu_list_get(link_desc_va, &msdu_list, &num_msdus);
  760. if (qdf_unlikely((msdu_list.rbm[0] !=
  761. HAL_RX_BUF_RBM_SW3_BM) &&
  762. (msdu_list.rbm[0] !=
  763. HAL_RX_BUF_RBM_WBM_IDLE_DESC_LIST))) {
  764. /* TODO */
  765. /* Call appropriate handler */
  766. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  767. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  768. FL("Invalid RBM %d"), rbm);
  769. /* Return link descriptor through WBM ring (SW2WBM)*/
  770. dp_rx_link_desc_return(soc, ring_desc,
  771. HAL_BM_ACTION_RELEASE_MSDU_LIST);
  772. continue;
  773. }
  774. /* Get the MPDU DESC info */
  775. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  776. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_FRAGMENT) {
  777. /* TODO */
  778. rx_bufs_used += dp_rx_frag_handle(soc,
  779. ring_desc, &mpdu_desc_info,
  780. &head, &tail, quota);
  781. DP_STATS_INC(soc, rx.rx_frags, 1);
  782. continue;
  783. }
  784. if (hal_rx_reo_is_pn_error(ring_desc)) {
  785. /* TOD0 */
  786. DP_STATS_INC(soc,
  787. rx.err.
  788. reo_error[HAL_REO_ERR_PN_CHECK_FAILED],
  789. 1);
  790. rx_bufs_used += dp_rx_pn_error_handle(soc,
  791. ring_desc, &mpdu_desc_info,
  792. &head, &tail, quota);
  793. continue;
  794. }
  795. if (hal_rx_reo_is_2k_jump(ring_desc)) {
  796. /* TOD0 */
  797. DP_STATS_INC(soc,
  798. rx.err.
  799. reo_error[HAL_REO_ERR_REGULAR_FRAME_2K_JUMP],
  800. 1);
  801. rx_bufs_used += dp_rx_2k_jump_handle(soc,
  802. ring_desc, &mpdu_desc_info,
  803. &head, &tail, quota);
  804. continue;
  805. }
  806. }
  807. done:
  808. hal_srng_access_end(hal_soc, hal_ring);
  809. if (soc->rx.flags.defrag_timeout_check)
  810. dp_rx_defrag_waitlist_flush(soc);
  811. /* Assume MAC id = 0, owner = 0 */
  812. if (rx_bufs_used) {
  813. dp_pdev = soc->pdev_list[0];
  814. dp_rxdma_srng = &dp_pdev->rx_refill_buf_ring;
  815. rx_desc_pool = &soc->rx_desc_buf[0];
  816. dp_rx_buffers_replenish(soc, 0, dp_rxdma_srng, rx_desc_pool,
  817. rx_bufs_used, &head, &tail, HAL_RX_BUF_RBM_SW3_BM);
  818. }
  819. return rx_bufs_used; /* Assume no scale factor for now */
  820. }
  821. /**
  822. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  823. *
  824. * @soc: core txrx main context
  825. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  826. * @quota: No. of units (packets) that can be serviced in one shot.
  827. *
  828. * This function implements error processing and top level demultiplexer
  829. * for all the frames routed to WBM2HOST sw release ring.
  830. *
  831. * Return: uint32_t: No. of elements processed
  832. */
  833. uint32_t
  834. dp_rx_wbm_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  835. {
  836. void *hal_soc;
  837. void *ring_desc;
  838. struct dp_rx_desc *rx_desc;
  839. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  840. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  841. uint32_t rx_bufs_used = 0;
  842. uint32_t rx_bufs_reaped[MAX_PDEV_CNT] = { 0 };
  843. uint8_t buf_type, rbm;
  844. uint32_t rx_buf_cookie;
  845. uint8_t mac_id;
  846. struct dp_pdev *dp_pdev;
  847. struct dp_srng *dp_rxdma_srng;
  848. struct rx_desc_pool *rx_desc_pool;
  849. uint8_t *rx_tlv_hdr;
  850. qdf_nbuf_t nbuf_head = NULL;
  851. qdf_nbuf_t nbuf_tail = NULL;
  852. qdf_nbuf_t nbuf, next;
  853. struct hal_wbm_err_desc_info wbm_err_info = { 0 };
  854. uint8_t pool_id;
  855. /* Debug -- Remove later */
  856. qdf_assert(soc && hal_ring);
  857. hal_soc = soc->hal_soc;
  858. /* Debug -- Remove later */
  859. qdf_assert(hal_soc);
  860. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  861. /* TODO */
  862. /*
  863. * Need API to convert from hal_ring pointer to
  864. * Ring Type / Ring Id combo
  865. */
  866. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  867. FL("HAL RING Access Failed -- %pK"), hal_ring);
  868. goto done;
  869. }
  870. while (qdf_likely(quota-- && (ring_desc =
  871. hal_srng_dst_get_next(hal_soc, hal_ring)))) {
  872. /* XXX */
  873. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  874. /*
  875. * For WBM ring, expect only MSDU buffers
  876. */
  877. qdf_assert_always(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
  878. qdf_assert((HAL_RX_WBM_ERR_SRC_GET(ring_desc)
  879. == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  880. (HAL_RX_WBM_ERR_SRC_GET(ring_desc)
  881. == HAL_RX_WBM_ERR_SRC_REO));
  882. /*
  883. * Check if the buffer is to be processed on this processor
  884. */
  885. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  886. if (qdf_unlikely(rbm != HAL_RX_BUF_RBM_SW3_BM)) {
  887. /* TODO */
  888. /* Call appropriate handler */
  889. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  890. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  891. FL("Invalid RBM %d"), rbm);
  892. continue;
  893. }
  894. rx_buf_cookie = HAL_RX_WBM_BUF_COOKIE_GET(ring_desc);
  895. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  896. qdf_assert(rx_desc);
  897. if (!dp_rx_desc_check_magic(rx_desc)) {
  898. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  899. FL("Invalid rx_desc cookie=%d"),
  900. rx_buf_cookie);
  901. continue;
  902. }
  903. nbuf = rx_desc->nbuf;
  904. qdf_nbuf_unmap_single(soc->osdev, nbuf, QDF_DMA_BIDIRECTIONAL);
  905. /*
  906. * save the wbm desc info in nbuf TLV. We will need this
  907. * info when we do the actual nbuf processing
  908. */
  909. hal_rx_wbm_err_info_get(ring_desc, &wbm_err_info);
  910. wbm_err_info.pool_id = rx_desc->pool_id;
  911. hal_rx_wbm_err_info_set_in_tlv(qdf_nbuf_data(nbuf),
  912. &wbm_err_info);
  913. rx_bufs_reaped[rx_desc->pool_id]++;
  914. DP_RX_LIST_APPEND(nbuf_head, nbuf_tail, rx_desc->nbuf);
  915. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  916. &tail[rx_desc->pool_id],
  917. rx_desc);
  918. }
  919. done:
  920. hal_srng_access_end(hal_soc, hal_ring);
  921. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  922. if (rx_bufs_reaped[mac_id]) {
  923. dp_pdev = soc->pdev_list[mac_id];
  924. dp_rxdma_srng = &dp_pdev->rx_refill_buf_ring;
  925. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  926. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  927. rx_desc_pool, rx_bufs_reaped[mac_id],
  928. &head[mac_id], &tail[mac_id],
  929. HAL_RX_BUF_RBM_SW3_BM);
  930. rx_bufs_used += rx_bufs_reaped[mac_id];
  931. }
  932. }
  933. nbuf = nbuf_head;
  934. while (nbuf) {
  935. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  936. /*
  937. * retrieve the wbm desc info from nbuf TLV, so we can
  938. * handle error cases appropriately
  939. */
  940. hal_rx_wbm_err_info_get_from_tlv(rx_tlv_hdr, &wbm_err_info);
  941. next = nbuf->next;
  942. if (wbm_err_info.wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) {
  943. if (wbm_err_info.reo_psh_rsn
  944. == HAL_RX_WBM_REO_PSH_RSN_ERROR) {
  945. DP_STATS_INC(soc,
  946. rx.err.reo_error
  947. [wbm_err_info.reo_err_code], 1);
  948. switch (wbm_err_info.reo_err_code) {
  949. /*
  950. * Handling for packets which have NULL REO
  951. * queue descriptor
  952. */
  953. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  954. pool_id = wbm_err_info.pool_id;
  955. QDF_TRACE(QDF_MODULE_ID_DP,
  956. QDF_TRACE_LEVEL_WARN,
  957. "Got pkt with REO ERROR: %d",
  958. wbm_err_info.reo_err_code);
  959. dp_rx_null_q_desc_handle(soc,
  960. nbuf,
  961. rx_tlv_hdr,
  962. pool_id);
  963. nbuf = next;
  964. continue;
  965. /* TODO */
  966. /* Add per error code accounting */
  967. default:
  968. QDF_TRACE(QDF_MODULE_ID_DP,
  969. QDF_TRACE_LEVEL_DEBUG,
  970. "REO error %d detected",
  971. wbm_err_info.reo_err_code);
  972. }
  973. }
  974. } else if (wbm_err_info.wbm_err_src ==
  975. HAL_RX_WBM_ERR_SRC_RXDMA) {
  976. if (wbm_err_info.rxdma_psh_rsn
  977. == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  978. struct dp_peer *peer = NULL;
  979. uint16_t peer_id = 0xFFFF;
  980. DP_STATS_INC(soc,
  981. rx.err.rxdma_error
  982. [wbm_err_info.rxdma_err_code], 1);
  983. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_tlv_hdr);
  984. peer = dp_peer_find_by_id(soc, peer_id);
  985. switch (wbm_err_info.rxdma_err_code) {
  986. case HAL_RXDMA_ERR_UNENCRYPTED:
  987. dp_rx_err_deliver(soc,
  988. nbuf,
  989. rx_tlv_hdr);
  990. nbuf = next;
  991. continue;
  992. case HAL_RXDMA_ERR_TKIP_MIC:
  993. dp_rx_process_mic_error(soc,
  994. nbuf,
  995. rx_tlv_hdr);
  996. nbuf = next;
  997. if (peer)
  998. DP_STATS_INC(peer, rx.err.mic_err, 1);
  999. continue;
  1000. case HAL_RXDMA_ERR_DECRYPT:
  1001. if (peer)
  1002. DP_STATS_INC(peer, rx.err.decrypt_err, 1);
  1003. QDF_TRACE(QDF_MODULE_ID_DP,
  1004. QDF_TRACE_LEVEL_DEBUG,
  1005. "Packet received with Decrypt error");
  1006. break;
  1007. default:
  1008. QDF_TRACE(QDF_MODULE_ID_DP,
  1009. QDF_TRACE_LEVEL_DEBUG,
  1010. "RXDMA error %d",
  1011. wbm_err_info.
  1012. rxdma_err_code);
  1013. }
  1014. }
  1015. } else {
  1016. /* Should not come here */
  1017. qdf_assert(0);
  1018. }
  1019. qdf_nbuf_free(nbuf);
  1020. nbuf = next;
  1021. hal_rx_dump_pkt_tlvs(rx_tlv_hdr, QDF_TRACE_LEVEL_DEBUG);
  1022. }
  1023. return rx_bufs_used; /* Assume no scale factor for now */
  1024. }
  1025. /**
  1026. * dp_rx_err_mpdu_pop() - extract the MSDU's from link descs
  1027. *
  1028. * @soc: core DP main context
  1029. * @mac_id: mac id which is one of 3 mac_ids
  1030. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  1031. * @head: head of descs list to be freed
  1032. * @tail: tail of decs list to be freed
  1033. * Return: number of msdu in MPDU to be popped
  1034. */
  1035. static inline uint32_t
  1036. dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  1037. void *rxdma_dst_ring_desc,
  1038. union dp_rx_desc_list_elem_t **head,
  1039. union dp_rx_desc_list_elem_t **tail)
  1040. {
  1041. void *rx_msdu_link_desc;
  1042. qdf_nbuf_t msdu;
  1043. qdf_nbuf_t last;
  1044. struct hal_rx_msdu_list msdu_list;
  1045. uint16_t num_msdus;
  1046. struct hal_buf_info buf_info;
  1047. void *p_buf_addr_info;
  1048. void *p_last_buf_addr_info;
  1049. uint32_t rx_bufs_used = 0;
  1050. uint32_t msdu_cnt;
  1051. uint32_t i;
  1052. uint8_t push_reason;
  1053. uint8_t rxdma_error_code = 0;
  1054. uint8_t bm_action = HAL_BM_ACTION_PUT_IN_IDLE_LIST;
  1055. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  1056. msdu = 0;
  1057. last = NULL;
  1058. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  1059. &p_last_buf_addr_info, &msdu_cnt);
  1060. push_reason =
  1061. hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc);
  1062. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  1063. rxdma_error_code =
  1064. hal_rx_reo_ent_rxdma_error_code_get(rxdma_dst_ring_desc);
  1065. }
  1066. do {
  1067. rx_msdu_link_desc =
  1068. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  1069. qdf_assert(rx_msdu_link_desc);
  1070. hal_rx_msdu_list_get(rx_msdu_link_desc, &msdu_list, &num_msdus);
  1071. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  1072. /* if the msdus belongs to NSS offloaded radio &&
  1073. * the rbm is not SW3_BM then return the msdu_link
  1074. * descriptor without freeing the msdus (nbufs). let
  1075. * these buffers be given to NSS completion ring for
  1076. * NSS to free them.
  1077. * else iterate through the msdu link desc list and
  1078. * free each msdu in the list.
  1079. */
  1080. if (msdu_list.rbm[0] != HAL_RX_BUF_RBM_SW3_BM &&
  1081. wlan_cfg_get_dp_pdev_nss_enabled(
  1082. pdev->wlan_cfg_ctx))
  1083. bm_action = HAL_BM_ACTION_RELEASE_MSDU_LIST;
  1084. else {
  1085. for (i = 0; i < num_msdus; i++) {
  1086. struct dp_rx_desc *rx_desc =
  1087. dp_rx_cookie_2_va_rxdma_buf(soc,
  1088. msdu_list.sw_cookie[i]);
  1089. qdf_assert(rx_desc);
  1090. msdu = rx_desc->nbuf;
  1091. qdf_nbuf_unmap_single(soc->osdev, msdu,
  1092. QDF_DMA_FROM_DEVICE);
  1093. QDF_TRACE(QDF_MODULE_ID_DP,
  1094. QDF_TRACE_LEVEL_DEBUG,
  1095. "[%s][%d] msdu_nbuf=%pK \n",
  1096. __func__, __LINE__, msdu);
  1097. qdf_nbuf_free(msdu);
  1098. rx_bufs_used++;
  1099. dp_rx_add_to_free_desc_list(head,
  1100. tail, rx_desc);
  1101. }
  1102. }
  1103. } else {
  1104. rxdma_error_code = HAL_RXDMA_ERR_WAR;
  1105. }
  1106. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  1107. &p_buf_addr_info);
  1108. dp_rx_link_desc_return(soc, p_last_buf_addr_info, bm_action);
  1109. p_last_buf_addr_info = p_buf_addr_info;
  1110. } while (buf_info.paddr);
  1111. DP_STATS_INC(soc, rx.err.rxdma_error[rxdma_error_code], 1);
  1112. if (rxdma_error_code == HAL_RXDMA_ERR_DECRYPT) {
  1113. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1114. "Packet received with Decrypt error");
  1115. }
  1116. return rx_bufs_used;
  1117. }
  1118. /**
  1119. * dp_rxdma_err_process() - RxDMA error processing functionality
  1120. *
  1121. * @soc: core txrx main contex
  1122. * @mac_id: mac id which is one of 3 mac_ids
  1123. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1124. * @quota: No. of units (packets) that can be serviced in one shot.
  1125. * Return: num of buffers processed
  1126. */
  1127. uint32_t
  1128. dp_rxdma_err_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  1129. {
  1130. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  1131. int ring_idx = dp_get_ring_id_for_mac_id(soc, mac_id);
  1132. uint8_t pdev_id;
  1133. void *hal_soc;
  1134. void *rxdma_dst_ring_desc;
  1135. void *err_dst_srng;
  1136. union dp_rx_desc_list_elem_t *head = NULL;
  1137. union dp_rx_desc_list_elem_t *tail = NULL;
  1138. struct dp_srng *dp_rxdma_srng;
  1139. struct rx_desc_pool *rx_desc_pool;
  1140. uint32_t work_done = 0;
  1141. uint32_t rx_bufs_used = 0;
  1142. #ifdef DP_INTR_POLL_BASED
  1143. if (!pdev)
  1144. return 0;
  1145. #endif
  1146. pdev_id = pdev->pdev_id;
  1147. err_dst_srng = pdev->rxdma_err_dst_ring[ring_idx].hal_srng;
  1148. if (!err_dst_srng) {
  1149. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1150. "%s %d : HAL Monitor Destination Ring Init \
  1151. Failed -- %pK\n",
  1152. __func__, __LINE__, err_dst_srng);
  1153. return 0;
  1154. }
  1155. hal_soc = soc->hal_soc;
  1156. qdf_assert(hal_soc);
  1157. if (qdf_unlikely(hal_srng_access_start(hal_soc, err_dst_srng))) {
  1158. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1159. "%s %d : HAL Monitor Destination Ring Init \
  1160. Failed -- %pK\n",
  1161. __func__, __LINE__, err_dst_srng);
  1162. return 0;
  1163. }
  1164. while (qdf_likely(quota-- && (rxdma_dst_ring_desc =
  1165. hal_srng_dst_get_next(hal_soc, err_dst_srng)))) {
  1166. rx_bufs_used += dp_rx_err_mpdu_pop(soc, mac_id,
  1167. rxdma_dst_ring_desc,
  1168. &head, &tail);
  1169. }
  1170. hal_srng_access_end(hal_soc, err_dst_srng);
  1171. if (rx_bufs_used) {
  1172. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1173. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1174. dp_rx_buffers_replenish(soc, pdev_id, dp_rxdma_srng,
  1175. rx_desc_pool, rx_bufs_used, &head, &tail,
  1176. HAL_RX_BUF_RBM_SW3_BM);
  1177. work_done += rx_bufs_used;
  1178. }
  1179. return work_done;
  1180. }