dp_main.c 69 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include <qdf_types.h>
  19. #include <qdf_lock.h>
  20. #include <hal_api.h>
  21. #include <hif.h>
  22. #include <htt.h>
  23. #include <wdi_event.h>
  24. #include <queue.h>
  25. #include "dp_htt.h"
  26. #include "dp_types.h"
  27. #include "dp_internal.h"
  28. #include "dp_tx.h"
  29. #include "dp_rx.h"
  30. #include <cdp_txrx_handle.h>
  31. #include <wlan_cfg.h>
  32. #include "cdp_txrx_cmn_struct.h"
  33. #define DP_INTR_POLL_TIMER_MS 100
  34. #define DP_MCS_LENGTH (6*MAX_MCS)
  35. #define DP_NSS_LENGTH (6*SS_COUNT)
  36. #define DP_RXDMA_ERR_LENGTH (6*MAX_RXDMA_ERRORS)
  37. #define DP_REO_ERR_LENGTH (6*HAL_REO_ERR_QUEUE_DESC_BLOCKED_SET)
  38. /**
  39. * dp_setup_srng - Internal function to setup SRNG rings used by data path
  40. */
  41. static int dp_srng_setup(struct dp_soc *soc, struct dp_srng *srng,
  42. int ring_type, int ring_num, int mac_id, uint32_t num_entries)
  43. {
  44. void *hal_soc = soc->hal_soc;
  45. uint32_t entry_size = hal_srng_get_entrysize(hal_soc, ring_type);
  46. /* TODO: See if we should get align size from hal */
  47. uint32_t ring_base_align = 8;
  48. struct hal_srng_params ring_params;
  49. uint32_t max_entries = hal_srng_max_entries(hal_soc, ring_type);
  50. num_entries = (num_entries > max_entries) ? max_entries : num_entries;
  51. srng->hal_srng = NULL;
  52. srng->alloc_size = (num_entries * entry_size) + ring_base_align - 1;
  53. srng->base_vaddr_unaligned = qdf_mem_alloc_consistent(
  54. soc->osdev, soc->osdev->dev, srng->alloc_size,
  55. &(srng->base_paddr_unaligned));
  56. if (!srng->base_vaddr_unaligned) {
  57. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  58. FL("alloc failed - ring_type: %d, ring_num %d"),
  59. ring_type, ring_num);
  60. return QDF_STATUS_E_NOMEM;
  61. }
  62. ring_params.ring_base_vaddr = srng->base_vaddr_unaligned +
  63. ((unsigned long)srng->base_vaddr_unaligned % ring_base_align);
  64. ring_params.ring_base_paddr = srng->base_paddr_unaligned +
  65. ((unsigned long)(ring_params.ring_base_vaddr) -
  66. (unsigned long)srng->base_vaddr_unaligned);
  67. ring_params.num_entries = num_entries;
  68. /* TODO: Check MSI support and get MSI settings from HIF layer */
  69. ring_params.msi_data = 0;
  70. ring_params.msi_addr = 0;
  71. /* TODO: Setup interrupt timer and batch counter thresholds for
  72. * interrupt mitigation based on ring type
  73. */
  74. ring_params.intr_timer_thres_us = 8;
  75. ring_params.intr_batch_cntr_thres_entries = 1;
  76. /* TODO: Currently hal layer takes care of endianness related settings.
  77. * See if these settings need to passed from DP layer
  78. */
  79. ring_params.flags = 0;
  80. /* Enable low threshold interrupts for rx buffer rings (regular and
  81. * monitor buffer rings.
  82. * TODO: See if this is required for any other ring
  83. */
  84. if ((ring_type == RXDMA_BUF) || (ring_type == RXDMA_MONITOR_BUF)) {
  85. /* TODO: Setting low threshold to 1/8th of ring size
  86. * see if this needs to be configurable
  87. */
  88. ring_params.low_threshold = num_entries >> 3;
  89. ring_params.flags |= HAL_SRNG_LOW_THRES_INTR_ENABLE;
  90. }
  91. srng->hal_srng = hal_srng_setup(hal_soc, ring_type, ring_num,
  92. mac_id, &ring_params);
  93. return 0;
  94. }
  95. /**
  96. * dp_srng_cleanup - Internal function to cleanup SRNG rings used by data path
  97. * Any buffers allocated and attached to ring entries are expected to be freed
  98. * before calling this function.
  99. */
  100. static void dp_srng_cleanup(struct dp_soc *soc, struct dp_srng *srng,
  101. int ring_type, int ring_num)
  102. {
  103. if (!srng->hal_srng) {
  104. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  105. FL("Ring type: %d, num:%d not setup"),
  106. ring_type, ring_num);
  107. return;
  108. }
  109. hal_srng_cleanup(soc->hal_soc, srng->hal_srng);
  110. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  111. srng->alloc_size,
  112. srng->base_vaddr_unaligned,
  113. srng->base_paddr_unaligned, 0);
  114. }
  115. /* TODO: Need this interface from HIF */
  116. void *hif_get_hal_handle(void *hif_handle);
  117. /*
  118. * dp_service_srngs() - Top level interrupt handler for DP Ring interrupts
  119. * @dp_ctx: DP SOC handle
  120. * @budget: Number of frames/descriptors that can be processed in one shot
  121. *
  122. * Return: remaining budget/quota for the soc device
  123. */
  124. static uint32_t dp_service_srngs(void *dp_ctx, uint32_t dp_budget)
  125. {
  126. struct dp_intr *int_ctx = (struct dp_intr *)dp_ctx;
  127. struct dp_soc *soc = int_ctx->soc;
  128. int ring = 0;
  129. uint32_t work_done = 0;
  130. uint32_t budget = dp_budget;
  131. uint8_t tx_mask = int_ctx->tx_ring_mask;
  132. uint8_t rx_mask = int_ctx->rx_ring_mask;
  133. uint8_t rx_err_mask = int_ctx->rx_err_ring_mask;
  134. uint8_t rx_wbm_rel_mask = int_ctx->rx_wbm_rel_ring_mask;
  135. uint8_t reo_status_mask = int_ctx->reo_status_ring_mask;
  136. /* Process Tx completion interrupts first to return back buffers */
  137. if (tx_mask) {
  138. for (ring = 0; ring < soc->num_tcl_data_rings; ring++) {
  139. if (tx_mask & (1 << ring)) {
  140. work_done =
  141. dp_tx_comp_handler(soc, ring, budget);
  142. budget -= work_done;
  143. if (work_done)
  144. QDF_TRACE(QDF_MODULE_ID_DP,
  145. QDF_TRACE_LEVEL_INFO,
  146. "tx mask 0x%x ring %d,"
  147. "budget %d",
  148. tx_mask, ring, budget);
  149. if (budget <= 0)
  150. goto budget_done;
  151. }
  152. }
  153. }
  154. /* Process REO Exception ring interrupt */
  155. if (rx_err_mask) {
  156. work_done = dp_rx_err_process(soc,
  157. soc->reo_exception_ring.hal_srng, budget);
  158. budget -= work_done;
  159. if (work_done)
  160. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  161. "REO Exception Ring: work_done %d budget %d",
  162. work_done, budget);
  163. if (budget <= 0) {
  164. goto budget_done;
  165. }
  166. }
  167. /* Process Rx WBM release ring interrupt */
  168. if (rx_wbm_rel_mask) {
  169. work_done = dp_rx_wbm_err_process(soc,
  170. soc->rx_rel_ring.hal_srng, budget);
  171. budget -= work_done;
  172. if (work_done)
  173. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  174. "WBM Release Ring: work_done %d budget %d",
  175. work_done, budget);
  176. if (budget <= 0) {
  177. goto budget_done;
  178. }
  179. }
  180. /* Process Rx interrupts */
  181. if (rx_mask) {
  182. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  183. if (rx_mask & (1 << ring)) {
  184. work_done =
  185. dp_rx_process(soc,
  186. soc->reo_dest_ring[ring].hal_srng,
  187. budget);
  188. budget -= work_done;
  189. if (work_done)
  190. QDF_TRACE(QDF_MODULE_ID_DP,
  191. QDF_TRACE_LEVEL_INFO,
  192. "rx mask 0x%x ring %d,"
  193. "budget %d",
  194. tx_mask, ring, budget);
  195. if (budget <= 0)
  196. goto budget_done;
  197. }
  198. }
  199. }
  200. if (reo_status_mask)
  201. dp_reo_status_ring_handler(soc);
  202. budget_done:
  203. return dp_budget - budget;
  204. }
  205. /* dp_interrupt_timer()- timer poll for interrupts
  206. *
  207. * @arg: SoC Handle
  208. *
  209. * Return:
  210. *
  211. */
  212. #ifdef DP_INTR_POLL_BASED
  213. static void dp_interrupt_timer(void *arg)
  214. {
  215. struct dp_soc *soc = (struct dp_soc *) arg;
  216. int i;
  217. if (qdf_atomic_read(&soc->cmn_init_done)) {
  218. for (i = 0;
  219. i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++)
  220. dp_service_srngs(&soc->intr_ctx[i], 0xffff);
  221. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  222. }
  223. }
  224. /*
  225. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  226. * @txrx_soc: DP SOC handle
  227. *
  228. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  229. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  230. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  231. *
  232. * Return: 0 for success. nonzero for failure.
  233. */
  234. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  235. {
  236. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  237. int i;
  238. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  239. soc->intr_ctx[i].tx_ring_mask = 0xF;
  240. soc->intr_ctx[i].rx_ring_mask = 0xF;
  241. soc->intr_ctx[i].rx_mon_ring_mask = 0xF;
  242. soc->intr_ctx[i].rx_err_ring_mask = 0x1;
  243. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0x1;
  244. soc->intr_ctx[i].reo_status_ring_mask = 0x1;
  245. soc->intr_ctx[i].soc = soc;
  246. }
  247. qdf_timer_init(soc->osdev, &soc->int_timer,
  248. dp_interrupt_timer, (void *)soc,
  249. QDF_TIMER_TYPE_WAKE_APPS);
  250. return QDF_STATUS_SUCCESS;
  251. }
  252. /*
  253. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  254. * @txrx_soc: DP SOC handle
  255. *
  256. * Return: void
  257. */
  258. static void dp_soc_interrupt_detach(void *txrx_soc)
  259. {
  260. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  261. qdf_timer_stop(&soc->int_timer);
  262. qdf_timer_free(&soc->int_timer);
  263. }
  264. #else
  265. /*
  266. * dp_soc_interrupt_attach() - Register handlers for DP interrupts
  267. * @txrx_soc: DP SOC handle
  268. *
  269. * Host driver will register for “DP_NUM_INTERRUPT_CONTEXTS” number of NAPI
  270. * contexts. Each NAPI context will have a tx_ring_mask , rx_ring_mask ,and
  271. * rx_monitor_ring mask to indicate the rings that are processed by the handler.
  272. *
  273. * Return: 0 for success. nonzero for failure.
  274. */
  275. static QDF_STATUS dp_soc_interrupt_attach(void *txrx_soc)
  276. {
  277. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  278. int i = 0;
  279. int num_irq = 0;
  280. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  281. int j = 0;
  282. int ret = 0;
  283. /* Map of IRQ ids registered with one interrupt context */
  284. int irq_id_map[HIF_MAX_GRP_IRQ];
  285. int tx_mask =
  286. wlan_cfg_get_tx_ring_mask(soc->wlan_cfg_ctx, i);
  287. int rx_mask =
  288. wlan_cfg_get_rx_ring_mask(soc->wlan_cfg_ctx, i);
  289. int rx_mon_mask =
  290. wlan_cfg_get_rx_mon_ring_mask(soc->wlan_cfg_ctx, i);
  291. soc->intr_ctx[i].tx_ring_mask = tx_mask;
  292. soc->intr_ctx[i].rx_ring_mask = rx_mask;
  293. soc->intr_ctx[i].rx_mon_ring_mask = rx_mon_mask;
  294. soc->intr_ctx[i].soc = soc;
  295. num_irq = 0;
  296. for (j = 0; j < HIF_MAX_GRP_IRQ; j++) {
  297. if (tx_mask & (1 << j)) {
  298. irq_id_map[num_irq++] =
  299. (wbm2host_tx_completions_ring1 - j);
  300. }
  301. if (rx_mask & (1 << j)) {
  302. irq_id_map[num_irq++] =
  303. (reo2host_destination_ring1 - j);
  304. }
  305. if (rx_mon_mask & (1 << j)) {
  306. irq_id_map[num_irq++] =
  307. (rxdma2host_monitor_destination_mac1
  308. - j);
  309. }
  310. }
  311. ret = hif_register_ext_group_int_handler(soc->hif_handle,
  312. num_irq, irq_id_map,
  313. dp_service_srngs,
  314. &soc->intr_ctx[i]);
  315. if (ret) {
  316. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  317. FL("failed, ret = %d"), ret);
  318. return QDF_STATUS_E_FAILURE;
  319. }
  320. }
  321. return QDF_STATUS_SUCCESS;
  322. }
  323. /*
  324. * dp_soc_interrupt_detach() - Deregister any allocations done for interrupts
  325. * @txrx_soc: DP SOC handle
  326. *
  327. * Return: void
  328. */
  329. static void dp_soc_interrupt_detach(void *txrx_soc)
  330. {
  331. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  332. int i;
  333. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  334. soc->intr_ctx[i].tx_ring_mask = 0;
  335. soc->intr_ctx[i].rx_ring_mask = 0;
  336. soc->intr_ctx[i].rx_mon_ring_mask = 0;
  337. }
  338. }
  339. #endif
  340. #define AVG_MAX_MPDUS_PER_TID 128
  341. #define AVG_TIDS_PER_CLIENT 2
  342. #define AVG_FLOWS_PER_TID 2
  343. #define AVG_MSDUS_PER_FLOW 128
  344. #define AVG_MSDUS_PER_MPDU 4
  345. /*
  346. * Allocate and setup link descriptor pool that will be used by HW for
  347. * various link and queue descriptors and managed by WBM
  348. */
  349. static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
  350. {
  351. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  352. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  353. uint32_t max_clients = wlan_cfg_get_max_clients(soc->wlan_cfg_ctx);
  354. uint32_t num_mpdus_per_link_desc =
  355. hal_num_mpdus_per_link_desc(soc->hal_soc);
  356. uint32_t num_msdus_per_link_desc =
  357. hal_num_msdus_per_link_desc(soc->hal_soc);
  358. uint32_t num_mpdu_links_per_queue_desc =
  359. hal_num_mpdu_links_per_queue_desc(soc->hal_soc);
  360. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  361. uint32_t total_link_descs, total_mem_size;
  362. uint32_t num_mpdu_link_descs, num_mpdu_queue_descs;
  363. uint32_t num_tx_msdu_link_descs, num_rx_msdu_link_descs;
  364. uint32_t num_link_desc_banks;
  365. uint32_t last_bank_size = 0;
  366. uint32_t entry_size, num_entries;
  367. int i;
  368. /* Only Tx queue descriptors are allocated from common link descriptor
  369. * pool Rx queue descriptors are not included in this because (REO queue
  370. * extension descriptors) they are expected to be allocated contiguously
  371. * with REO queue descriptors
  372. */
  373. num_mpdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  374. AVG_MAX_MPDUS_PER_TID) / num_mpdus_per_link_desc;
  375. num_mpdu_queue_descs = num_mpdu_link_descs /
  376. num_mpdu_links_per_queue_desc;
  377. num_tx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  378. AVG_FLOWS_PER_TID * AVG_MSDUS_PER_FLOW) /
  379. num_msdus_per_link_desc;
  380. num_rx_msdu_link_descs = (max_clients * AVG_TIDS_PER_CLIENT *
  381. AVG_MAX_MPDUS_PER_TID * AVG_MSDUS_PER_MPDU) / 6;
  382. num_entries = num_mpdu_link_descs + num_mpdu_queue_descs +
  383. num_tx_msdu_link_descs + num_rx_msdu_link_descs;
  384. /* Round up to power of 2 */
  385. total_link_descs = 1;
  386. while (total_link_descs < num_entries)
  387. total_link_descs <<= 1;
  388. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  389. FL("total_link_descs: %u, link_desc_size: %d"),
  390. total_link_descs, link_desc_size);
  391. total_mem_size = total_link_descs * link_desc_size;
  392. total_mem_size += link_desc_align;
  393. if (total_mem_size <= max_alloc_size) {
  394. num_link_desc_banks = 0;
  395. last_bank_size = total_mem_size;
  396. } else {
  397. num_link_desc_banks = (total_mem_size) /
  398. (max_alloc_size - link_desc_align);
  399. last_bank_size = total_mem_size %
  400. (max_alloc_size - link_desc_align);
  401. }
  402. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  403. FL("total_mem_size: %d, num_link_desc_banks: %u"),
  404. total_mem_size, num_link_desc_banks);
  405. for (i = 0; i < num_link_desc_banks; i++) {
  406. soc->link_desc_banks[i].base_vaddr_unaligned =
  407. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  408. max_alloc_size,
  409. &(soc->link_desc_banks[i].base_paddr_unaligned));
  410. soc->link_desc_banks[i].size = max_alloc_size;
  411. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)(
  412. soc->link_desc_banks[i].base_vaddr_unaligned) +
  413. ((unsigned long)(
  414. soc->link_desc_banks[i].base_vaddr_unaligned) %
  415. link_desc_align));
  416. soc->link_desc_banks[i].base_paddr = (unsigned long)(
  417. soc->link_desc_banks[i].base_paddr_unaligned) +
  418. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  419. (unsigned long)(
  420. soc->link_desc_banks[i].base_vaddr_unaligned));
  421. if (!soc->link_desc_banks[i].base_vaddr_unaligned) {
  422. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  423. FL("Link descriptor memory alloc failed"));
  424. goto fail;
  425. }
  426. }
  427. if (last_bank_size) {
  428. /* Allocate last bank in case total memory required is not exact
  429. * multiple of max_alloc_size
  430. */
  431. soc->link_desc_banks[i].base_vaddr_unaligned =
  432. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  433. last_bank_size,
  434. &(soc->link_desc_banks[i].base_paddr_unaligned));
  435. soc->link_desc_banks[i].size = last_bank_size;
  436. soc->link_desc_banks[i].base_vaddr = (void *)((unsigned long)
  437. (soc->link_desc_banks[i].base_vaddr_unaligned) +
  438. ((unsigned long)(
  439. soc->link_desc_banks[i].base_vaddr_unaligned) %
  440. link_desc_align));
  441. soc->link_desc_banks[i].base_paddr =
  442. (unsigned long)(
  443. soc->link_desc_banks[i].base_paddr_unaligned) +
  444. ((unsigned long)(soc->link_desc_banks[i].base_vaddr) -
  445. (unsigned long)(
  446. soc->link_desc_banks[i].base_vaddr_unaligned));
  447. }
  448. /* Allocate and setup link descriptor idle list for HW internal use */
  449. entry_size = hal_srng_get_entrysize(soc->hal_soc, WBM_IDLE_LINK);
  450. total_mem_size = entry_size * total_link_descs;
  451. if (total_mem_size <= max_alloc_size) {
  452. void *desc;
  453. if (dp_srng_setup(soc, &soc->wbm_idle_link_ring,
  454. WBM_IDLE_LINK, 0, 0, total_link_descs)) {
  455. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  456. FL("Link desc idle ring setup failed"));
  457. goto fail;
  458. }
  459. hal_srng_access_start_unlocked(soc->hal_soc,
  460. soc->wbm_idle_link_ring.hal_srng);
  461. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  462. soc->link_desc_banks[i].base_paddr; i++) {
  463. uint32_t num_entries = (soc->link_desc_banks[i].size -
  464. (unsigned long)(
  465. soc->link_desc_banks[i].base_vaddr) -
  466. (unsigned long)(
  467. soc->link_desc_banks[i].base_vaddr_unaligned))
  468. / link_desc_size;
  469. unsigned long paddr = (unsigned long)(
  470. soc->link_desc_banks[i].base_paddr);
  471. while (num_entries && (desc = hal_srng_src_get_next(
  472. soc->hal_soc,
  473. soc->wbm_idle_link_ring.hal_srng))) {
  474. hal_set_link_desc_addr(desc, i, paddr);
  475. num_entries--;
  476. paddr += link_desc_size;
  477. }
  478. }
  479. hal_srng_access_end_unlocked(soc->hal_soc,
  480. soc->wbm_idle_link_ring.hal_srng);
  481. } else {
  482. uint32_t num_scatter_bufs;
  483. uint32_t num_entries_per_buf;
  484. uint32_t rem_entries;
  485. uint8_t *scatter_buf_ptr;
  486. uint16_t scatter_buf_num;
  487. soc->wbm_idle_scatter_buf_size =
  488. hal_idle_list_scatter_buf_size(soc->hal_soc);
  489. num_entries_per_buf = hal_idle_scatter_buf_num_entries(
  490. soc->hal_soc, soc->wbm_idle_scatter_buf_size);
  491. num_scatter_bufs = (total_mem_size /
  492. soc->wbm_idle_scatter_buf_size) + (total_mem_size %
  493. soc->wbm_idle_scatter_buf_size) ? 1 : 0;
  494. for (i = 0; i < num_scatter_bufs; i++) {
  495. soc->wbm_idle_scatter_buf_base_vaddr[i] =
  496. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  497. soc->wbm_idle_scatter_buf_size,
  498. &(soc->wbm_idle_scatter_buf_base_paddr[i]));
  499. if (soc->wbm_idle_scatter_buf_base_vaddr[i] == NULL) {
  500. QDF_TRACE(QDF_MODULE_ID_DP,
  501. QDF_TRACE_LEVEL_ERROR,
  502. FL("Scatter list memory alloc failed"));
  503. goto fail;
  504. }
  505. }
  506. /* Populate idle list scatter buffers with link descriptor
  507. * pointers
  508. */
  509. scatter_buf_num = 0;
  510. scatter_buf_ptr = (uint8_t *)(
  511. soc->wbm_idle_scatter_buf_base_vaddr[scatter_buf_num]);
  512. rem_entries = num_entries_per_buf;
  513. for (i = 0; i < MAX_LINK_DESC_BANKS &&
  514. soc->link_desc_banks[i].base_paddr; i++) {
  515. uint32_t num_link_descs =
  516. (soc->link_desc_banks[i].size -
  517. (unsigned long)(
  518. soc->link_desc_banks[i].base_vaddr) -
  519. (unsigned long)(
  520. soc->link_desc_banks[i].base_vaddr_unaligned)) /
  521. link_desc_size;
  522. unsigned long paddr = (unsigned long)(
  523. soc->link_desc_banks[i].base_paddr);
  524. void *desc = NULL;
  525. while (num_link_descs && (desc =
  526. hal_srng_src_get_next(soc->hal_soc,
  527. soc->wbm_idle_link_ring.hal_srng))) {
  528. hal_set_link_desc_addr((void *)scatter_buf_ptr,
  529. i, paddr);
  530. num_link_descs--;
  531. paddr += link_desc_size;
  532. if (rem_entries) {
  533. rem_entries--;
  534. scatter_buf_ptr += link_desc_size;
  535. } else {
  536. rem_entries = num_entries_per_buf;
  537. scatter_buf_num++;
  538. scatter_buf_ptr = (uint8_t *)(
  539. soc->wbm_idle_scatter_buf_base_vaddr[
  540. scatter_buf_num]);
  541. }
  542. }
  543. }
  544. /* Setup link descriptor idle list in HW */
  545. hal_setup_link_idle_list(soc->hal_soc,
  546. soc->wbm_idle_scatter_buf_base_paddr,
  547. soc->wbm_idle_scatter_buf_base_vaddr,
  548. num_scatter_bufs, soc->wbm_idle_scatter_buf_size,
  549. (uint32_t)(scatter_buf_ptr -
  550. (uint8_t *)(soc->wbm_idle_scatter_buf_base_vaddr[
  551. scatter_buf_num])));
  552. }
  553. return 0;
  554. fail:
  555. if (soc->wbm_idle_link_ring.hal_srng) {
  556. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  557. WBM_IDLE_LINK, 0);
  558. }
  559. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  560. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  561. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  562. soc->wbm_idle_scatter_buf_size,
  563. soc->wbm_idle_scatter_buf_base_vaddr[i],
  564. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  565. }
  566. }
  567. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  568. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  569. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  570. soc->link_desc_banks[i].size,
  571. soc->link_desc_banks[i].base_vaddr_unaligned,
  572. soc->link_desc_banks[i].base_paddr_unaligned,
  573. 0);
  574. }
  575. }
  576. return QDF_STATUS_E_FAILURE;
  577. }
  578. #ifdef notused
  579. /*
  580. * Free link descriptor pool that was setup HW
  581. */
  582. static void dp_hw_link_desc_pool_cleanup(struct dp_soc *soc)
  583. {
  584. int i;
  585. if (soc->wbm_idle_link_ring.hal_srng) {
  586. dp_srng_cleanup(soc->hal_soc, &soc->wbm_idle_link_ring,
  587. WBM_IDLE_LINK, 0);
  588. }
  589. for (i = 0; i < MAX_IDLE_SCATTER_BUFS; i++) {
  590. if (soc->wbm_idle_scatter_buf_base_vaddr[i]) {
  591. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  592. soc->wbm_idle_scatter_buf_size,
  593. soc->wbm_idle_scatter_buf_base_vaddr[i],
  594. soc->wbm_idle_scatter_buf_base_paddr[i], 0);
  595. }
  596. }
  597. for (i = 0; i < MAX_LINK_DESC_BANKS; i++) {
  598. if (soc->link_desc_banks[i].base_vaddr_unaligned) {
  599. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  600. soc->link_desc_banks[i].size,
  601. soc->link_desc_banks[i].base_vaddr_unaligned,
  602. soc->link_desc_banks[i].base_paddr_unaligned,
  603. 0);
  604. }
  605. }
  606. }
  607. #endif /* notused */
  608. /* TODO: Following should be configurable */
  609. #define WBM_RELEASE_RING_SIZE 64
  610. #define TCL_DATA_RING_SIZE 512
  611. #define TX_COMP_RING_SIZE 1024
  612. #define TCL_CMD_RING_SIZE 32
  613. #define TCL_STATUS_RING_SIZE 32
  614. #define REO_DST_RING_SIZE 2048
  615. #define REO_REINJECT_RING_SIZE 32
  616. #define RX_RELEASE_RING_SIZE 1024
  617. #define REO_EXCEPTION_RING_SIZE 128
  618. #define REO_CMD_RING_SIZE 32
  619. #define REO_STATUS_RING_SIZE 32
  620. #define RXDMA_BUF_RING_SIZE 1024
  621. #define RXDMA_REFILL_RING_SIZE 2048
  622. #define RXDMA_MONITOR_BUF_RING_SIZE 2048
  623. #define RXDMA_MONITOR_DST_RING_SIZE 2048
  624. #define RXDMA_MONITOR_STATUS_RING_SIZE 2048
  625. /*
  626. * dp_soc_cmn_setup() - Common SoC level initializion
  627. * @soc: Datapath SOC handle
  628. *
  629. * This is an internal function used to setup common SOC data structures,
  630. * to be called from PDEV attach after receiving HW mode capabilities from FW
  631. */
  632. static int dp_soc_cmn_setup(struct dp_soc *soc)
  633. {
  634. int i;
  635. if (qdf_atomic_read(&soc->cmn_init_done))
  636. return 0;
  637. if (dp_peer_find_attach(soc))
  638. goto fail0;
  639. if (dp_hw_link_desc_pool_setup(soc))
  640. goto fail1;
  641. /* Setup SRNG rings */
  642. /* Common rings */
  643. if (dp_srng_setup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0, 0,
  644. WBM_RELEASE_RING_SIZE)) {
  645. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  646. FL("dp_srng_setup failed for wbm_desc_rel_ring"));
  647. goto fail1;
  648. }
  649. soc->num_tcl_data_rings = 0;
  650. /* Tx data rings */
  651. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  652. soc->num_tcl_data_rings =
  653. wlan_cfg_num_tcl_data_rings(soc->wlan_cfg_ctx);
  654. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  655. if (dp_srng_setup(soc, &soc->tcl_data_ring[i],
  656. TCL_DATA, i, 0, TCL_DATA_RING_SIZE)) {
  657. QDF_TRACE(QDF_MODULE_ID_DP,
  658. QDF_TRACE_LEVEL_ERROR,
  659. FL("dp_srng_setup failed for tcl_data_ring[%d]"), i);
  660. goto fail1;
  661. }
  662. if (dp_srng_setup(soc, &soc->tx_comp_ring[i],
  663. WBM2SW_RELEASE, i, 0, TX_COMP_RING_SIZE)) {
  664. QDF_TRACE(QDF_MODULE_ID_DP,
  665. QDF_TRACE_LEVEL_ERROR,
  666. FL("dp_srng_setup failed for tx_comp_ring[%d]"), i);
  667. goto fail1;
  668. }
  669. }
  670. } else {
  671. /* This will be incremented during per pdev ring setup */
  672. soc->num_tcl_data_rings = 0;
  673. }
  674. if (dp_tx_soc_attach(soc)) {
  675. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  676. FL("dp_tx_soc_attach failed"));
  677. goto fail1;
  678. }
  679. /* TCL command and status rings */
  680. if (dp_srng_setup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0, 0,
  681. TCL_CMD_RING_SIZE)) {
  682. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  683. FL("dp_srng_setup failed for tcl_cmd_ring"));
  684. goto fail1;
  685. }
  686. if (dp_srng_setup(soc, &soc->tcl_status_ring, TCL_STATUS, 0, 0,
  687. TCL_STATUS_RING_SIZE)) {
  688. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  689. FL("dp_srng_setup failed for tcl_status_ring"));
  690. goto fail1;
  691. }
  692. /* TBD: call dp_tx_init to setup Tx SW descriptors and MSDU extension
  693. * descriptors
  694. */
  695. /* Rx data rings */
  696. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  697. soc->num_reo_dest_rings =
  698. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  699. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  700. if (dp_srng_setup(soc, &soc->reo_dest_ring[i], REO_DST,
  701. i, 0, REO_DST_RING_SIZE)) {
  702. QDF_TRACE(QDF_MODULE_ID_DP,
  703. QDF_TRACE_LEVEL_ERROR,
  704. FL("dp_srng_setup failed for reo_dest_ring[%d]"), i);
  705. goto fail1;
  706. }
  707. }
  708. } else {
  709. /* This will be incremented during per pdev ring setup */
  710. soc->num_reo_dest_rings = 0;
  711. }
  712. /* TBD: call dp_rx_init to setup Rx SW descriptors */
  713. /* REO reinjection ring */
  714. if (dp_srng_setup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0, 0,
  715. REO_REINJECT_RING_SIZE)) {
  716. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  717. FL("dp_srng_setup failed for reo_reinject_ring"));
  718. goto fail1;
  719. }
  720. /* Rx release ring */
  721. if (dp_srng_setup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 3, 0,
  722. RX_RELEASE_RING_SIZE)) {
  723. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  724. FL("dp_srng_setup failed for rx_rel_ring"));
  725. goto fail1;
  726. }
  727. /* Rx exception ring */
  728. if (dp_srng_setup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0,
  729. MAX_REO_DEST_RINGS, REO_EXCEPTION_RING_SIZE)) {
  730. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  731. FL("dp_srng_setup failed for reo_exception_ring"));
  732. goto fail1;
  733. }
  734. /* REO command and status rings */
  735. if (dp_srng_setup(soc, &soc->reo_cmd_ring, REO_CMD, 0, 0,
  736. REO_CMD_RING_SIZE)) {
  737. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  738. FL("dp_srng_setup failed for reo_cmd_ring"));
  739. goto fail1;
  740. }
  741. hal_reo_init_cmd_ring(soc->hal_soc, soc->reo_cmd_ring.hal_srng);
  742. TAILQ_INIT(&soc->rx.reo_cmd_list);
  743. qdf_spinlock_create(&soc->rx.reo_cmd_lock);
  744. if (dp_srng_setup(soc, &soc->reo_status_ring, REO_STATUS, 0, 0,
  745. REO_STATUS_RING_SIZE)) {
  746. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  747. FL("dp_srng_setup failed for reo_status_ring"));
  748. goto fail1;
  749. }
  750. dp_soc_interrupt_attach(soc);
  751. /* Setup HW REO */
  752. hal_reo_setup(soc->hal_soc);
  753. qdf_atomic_set(&soc->cmn_init_done, 1);
  754. return 0;
  755. fail1:
  756. /*
  757. * Cleanup will be done as part of soc_detach, which will
  758. * be called on pdev attach failure
  759. */
  760. fail0:
  761. return QDF_STATUS_E_FAILURE;
  762. }
  763. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force);
  764. /*
  765. * dp_rxdma_ring_setup() - configure the RX DMA rings
  766. * @soc: data path SoC handle
  767. * @pdev: Physical device handle
  768. *
  769. * Return: 0 - success, > 0 - failure
  770. */
  771. #ifdef QCA_HOST2FW_RXBUF_RING
  772. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  773. struct dp_pdev *pdev)
  774. {
  775. int max_mac_rings =
  776. wlan_cfg_get_num_mac_rings
  777. (pdev->wlan_cfg_ctx);
  778. int i;
  779. for (i = 0; i < max_mac_rings; i++) {
  780. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  781. "%s: pdev_id %d mac_id %d\n",
  782. __func__, pdev->pdev_id, i);
  783. if (dp_srng_setup(soc, &pdev->rx_mac_buf_ring[i],
  784. RXDMA_BUF, 1, i, RXDMA_BUF_RING_SIZE)) {
  785. QDF_TRACE(QDF_MODULE_ID_DP,
  786. QDF_TRACE_LEVEL_ERROR,
  787. FL("failed rx mac ring setup"));
  788. return QDF_STATUS_E_FAILURE;
  789. }
  790. }
  791. return QDF_STATUS_SUCCESS;
  792. }
  793. #else
  794. static int dp_rxdma_ring_setup(struct dp_soc *soc,
  795. struct dp_pdev *pdev)
  796. {
  797. return QDF_STATUS_SUCCESS;
  798. }
  799. #endif
  800. /*
  801. * dp_pdev_attach_wifi3() - attach txrx pdev
  802. * @osif_pdev: Opaque PDEV handle from OSIF/HDD
  803. * @txrx_soc: Datapath SOC handle
  804. * @htc_handle: HTC handle for host-target interface
  805. * @qdf_osdev: QDF OS device
  806. * @pdev_id: PDEV ID
  807. *
  808. * Return: DP PDEV handle on success, NULL on failure
  809. */
  810. static struct cdp_pdev *dp_pdev_attach_wifi3(struct cdp_soc_t *txrx_soc,
  811. struct cdp_cfg *ctrl_pdev,
  812. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev, uint8_t pdev_id)
  813. {
  814. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  815. struct dp_pdev *pdev = qdf_mem_malloc(sizeof(*pdev));
  816. if (!pdev) {
  817. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  818. FL("DP PDEV memory allocation failed"));
  819. goto fail0;
  820. }
  821. pdev->wlan_cfg_ctx = wlan_cfg_pdev_attach();
  822. if (!pdev->wlan_cfg_ctx) {
  823. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  824. FL("pdev cfg_attach failed"));
  825. qdf_mem_free(pdev);
  826. goto fail0;
  827. }
  828. pdev->soc = soc;
  829. pdev->osif_pdev = ctrl_pdev;
  830. pdev->pdev_id = pdev_id;
  831. soc->pdev_list[pdev_id] = pdev;
  832. TAILQ_INIT(&pdev->vdev_list);
  833. pdev->vdev_count = 0;
  834. if (dp_soc_cmn_setup(soc)) {
  835. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  836. FL("dp_soc_cmn_setup failed"));
  837. goto fail1;
  838. }
  839. /* Setup per PDEV TCL rings if configured */
  840. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  841. if (dp_srng_setup(soc, &soc->tcl_data_ring[pdev_id], TCL_DATA,
  842. pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  843. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  844. FL("dp_srng_setup failed for tcl_data_ring"));
  845. goto fail1;
  846. }
  847. if (dp_srng_setup(soc, &soc->tx_comp_ring[pdev_id],
  848. WBM2SW_RELEASE, pdev_id, pdev_id, TCL_DATA_RING_SIZE)) {
  849. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  850. FL("dp_srng_setup failed for tx_comp_ring"));
  851. goto fail1;
  852. }
  853. soc->num_tcl_data_rings++;
  854. }
  855. /* Tx specific init */
  856. if (dp_tx_pdev_attach(pdev)) {
  857. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  858. FL("dp_tx_pdev_attach failed"));
  859. goto fail1;
  860. }
  861. /* Setup per PDEV REO rings if configured */
  862. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  863. if (dp_srng_setup(soc, &soc->reo_dest_ring[pdev_id], REO_DST,
  864. pdev_id, pdev_id, REO_DST_RING_SIZE)) {
  865. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  866. FL("dp_srng_setup failed for reo_dest_ringn"));
  867. goto fail1;
  868. }
  869. soc->num_reo_dest_rings++;
  870. }
  871. if (dp_srng_setup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0, pdev_id,
  872. RXDMA_REFILL_RING_SIZE)) {
  873. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  874. FL("dp_srng_setup failed rx refill ring"));
  875. goto fail1;
  876. }
  877. if (dp_rxdma_ring_setup(soc, pdev)) {
  878. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  879. FL("RXDMA ring config failed"));
  880. goto fail1;
  881. }
  882. if (dp_srng_setup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0,
  883. pdev_id, RXDMA_MONITOR_BUF_RING_SIZE)) {
  884. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  885. FL("dp_srng_setup failed for rxdma_mon_buf_ring"));
  886. goto fail1;
  887. }
  888. if (dp_srng_setup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0,
  889. pdev_id, RXDMA_MONITOR_DST_RING_SIZE)) {
  890. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  891. FL("dp_srng_setup failed for rxdma_mon_dst_ring"));
  892. goto fail1;
  893. }
  894. if (dp_srng_setup(soc, &pdev->rxdma_mon_status_ring,
  895. RXDMA_MONITOR_STATUS, 0, pdev_id,
  896. RXDMA_MONITOR_STATUS_RING_SIZE)) {
  897. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  898. FL("dp_srng_setup failed for rxdma_mon_status_ring"));
  899. goto fail1;
  900. }
  901. /* Rx specific init */
  902. if (dp_rx_pdev_attach(pdev)) {
  903. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  904. FL("dp_rx_pdev_attach failed "));
  905. goto fail0;
  906. }
  907. DP_STATS_INIT(pdev);
  908. #ifndef CONFIG_WIN
  909. /* MCL */
  910. dp_local_peer_id_pool_init(pdev);
  911. #endif
  912. return (struct cdp_pdev *)pdev;
  913. fail1:
  914. dp_pdev_detach_wifi3((struct cdp_pdev *)pdev, 0);
  915. fail0:
  916. return NULL;
  917. }
  918. /*
  919. * dp_rxdma_ring_cleanup() - configure the RX DMA rings
  920. * @soc: data path SoC handle
  921. * @pdev: Physical device handle
  922. *
  923. * Return: void
  924. */
  925. #ifdef QCA_HOST2FW_RXBUF_RING
  926. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  927. struct dp_pdev *pdev)
  928. {
  929. int max_mac_rings =
  930. wlan_cfg_get_num_mac_rings(pdev->wlan_cfg_ctx);
  931. int i;
  932. max_mac_rings = max_mac_rings < MAX_RX_MAC_RINGS ?
  933. max_mac_rings : MAX_RX_MAC_RINGS;
  934. for (i = 0; i < MAX_RX_MAC_RINGS; i++)
  935. dp_srng_cleanup(soc, &pdev->rx_mac_buf_ring[i],
  936. RXDMA_BUF, 1);
  937. }
  938. #else
  939. static void dp_rxdma_ring_cleanup(struct dp_soc *soc,
  940. struct dp_pdev *pdev)
  941. {
  942. }
  943. #endif
  944. /*
  945. * dp_pdev_detach_wifi3() - detach txrx pdev
  946. * @txrx_pdev: Datapath PDEV handle
  947. * @force: Force detach
  948. *
  949. */
  950. static void dp_pdev_detach_wifi3(struct cdp_pdev *txrx_pdev, int force)
  951. {
  952. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  953. struct dp_soc *soc = pdev->soc;
  954. dp_tx_pdev_detach(pdev);
  955. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  956. dp_srng_cleanup(soc, &soc->tcl_data_ring[pdev->pdev_id],
  957. TCL_DATA, pdev->pdev_id);
  958. dp_srng_cleanup(soc, &soc->tx_comp_ring[pdev->pdev_id],
  959. WBM2SW_RELEASE, pdev->pdev_id);
  960. }
  961. dp_rx_pdev_detach(pdev);
  962. /* Setup per PDEV REO rings if configured */
  963. if (wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  964. dp_srng_cleanup(soc, &soc->reo_dest_ring[pdev->pdev_id],
  965. REO_DST, pdev->pdev_id);
  966. }
  967. dp_srng_cleanup(soc, &pdev->rx_refill_buf_ring, RXDMA_BUF, 0);
  968. dp_rxdma_ring_cleanup(soc, pdev);
  969. dp_srng_cleanup(soc, &pdev->rxdma_mon_buf_ring, RXDMA_MONITOR_BUF, 0);
  970. dp_srng_cleanup(soc, &pdev->rxdma_mon_dst_ring, RXDMA_MONITOR_DST, 0);
  971. dp_srng_cleanup(soc, &pdev->rxdma_mon_status_ring,
  972. RXDMA_MONITOR_STATUS, 0);
  973. soc->pdev_list[pdev->pdev_id] = NULL;
  974. qdf_mem_free(pdev);
  975. }
  976. /*
  977. * dp_reo_desc_freelist_destroy() - Flush REO descriptors from deferred freelist
  978. * @soc: DP SOC handle
  979. */
  980. static inline void dp_reo_desc_freelist_destroy(struct dp_soc *soc)
  981. {
  982. struct reo_desc_list_node *desc;
  983. struct dp_rx_tid *rx_tid;
  984. qdf_spin_lock_bh(&soc->reo_desc_freelist_lock);
  985. while (qdf_list_remove_front(&soc->reo_desc_freelist,
  986. (qdf_list_node_t **)&desc) == QDF_STATUS_SUCCESS) {
  987. rx_tid = &desc->rx_tid;
  988. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  989. rx_tid->hw_qdesc_alloc_size,
  990. rx_tid->hw_qdesc_vaddr_unaligned,
  991. rx_tid->hw_qdesc_paddr_unaligned, 0);
  992. qdf_mem_free(desc);
  993. }
  994. qdf_spin_unlock_bh(&soc->reo_desc_freelist_lock);
  995. qdf_list_destroy(&soc->reo_desc_freelist);
  996. qdf_spinlock_destroy(&soc->reo_desc_freelist_lock);
  997. }
  998. /*
  999. * dp_soc_detach_wifi3() - Detach txrx SOC
  1000. * @txrx_soc: DP SOC handle
  1001. *
  1002. */
  1003. static void dp_soc_detach_wifi3(void *txrx_soc)
  1004. {
  1005. struct dp_soc *soc = (struct dp_soc *)txrx_soc;
  1006. int i;
  1007. qdf_atomic_set(&soc->cmn_init_done, 0);
  1008. dp_soc_interrupt_detach(soc);
  1009. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1010. if (soc->pdev_list[i])
  1011. dp_pdev_detach_wifi3(
  1012. (struct cdp_pdev *)soc->pdev_list[i], 1);
  1013. }
  1014. dp_peer_find_detach(soc);
  1015. /* TBD: Call Tx and Rx cleanup functions to free buffers and
  1016. * SW descriptors
  1017. */
  1018. /* Free the ring memories */
  1019. /* Common rings */
  1020. dp_srng_cleanup(soc, &soc->wbm_desc_rel_ring, SW2WBM_RELEASE, 0);
  1021. /* Tx data rings */
  1022. if (!wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  1023. dp_tx_soc_detach(soc);
  1024. for (i = 0; i < soc->num_tcl_data_rings; i++) {
  1025. dp_srng_cleanup(soc, &soc->tcl_data_ring[i],
  1026. TCL_DATA, i);
  1027. dp_srng_cleanup(soc, &soc->tx_comp_ring[i],
  1028. WBM2SW_RELEASE, i);
  1029. }
  1030. }
  1031. /* TCL command and status rings */
  1032. dp_srng_cleanup(soc, &soc->tcl_cmd_ring, TCL_CMD, 0);
  1033. dp_srng_cleanup(soc, &soc->tcl_status_ring, TCL_STATUS, 0);
  1034. /* Rx data rings */
  1035. if (!wlan_cfg_per_pdev_rx_ring(soc->wlan_cfg_ctx)) {
  1036. soc->num_reo_dest_rings =
  1037. wlan_cfg_num_reo_dest_rings(soc->wlan_cfg_ctx);
  1038. for (i = 0; i < soc->num_reo_dest_rings; i++) {
  1039. /* TODO: Get number of rings and ring sizes
  1040. * from wlan_cfg
  1041. */
  1042. dp_srng_cleanup(soc, &soc->reo_dest_ring[i],
  1043. REO_DST, i);
  1044. }
  1045. }
  1046. /* REO reinjection ring */
  1047. dp_srng_cleanup(soc, &soc->reo_reinject_ring, REO_REINJECT, 0);
  1048. /* Rx release ring */
  1049. dp_srng_cleanup(soc, &soc->rx_rel_ring, WBM2SW_RELEASE, 0);
  1050. /* Rx exception ring */
  1051. /* TODO: Better to store ring_type and ring_num in
  1052. * dp_srng during setup
  1053. */
  1054. dp_srng_cleanup(soc, &soc->reo_exception_ring, REO_EXCEPTION, 0);
  1055. /* REO command and status rings */
  1056. dp_srng_cleanup(soc, &soc->reo_cmd_ring, REO_CMD, 0);
  1057. dp_srng_cleanup(soc, &soc->reo_status_ring, REO_STATUS, 0);
  1058. qdf_spinlock_destroy(&soc->rx.reo_cmd_lock);
  1059. qdf_spinlock_destroy(&soc->peer_ref_mutex);
  1060. htt_soc_detach(soc->htt_handle);
  1061. dp_reo_desc_freelist_destroy(soc);
  1062. }
  1063. /*
  1064. * dp_rxdma_ring_config() - configure the RX DMA rings
  1065. *
  1066. * This function is used to configure the MAC rings.
  1067. * On MCL host provides buffers in Host2FW ring
  1068. * FW refills (copies) buffers to the ring and updates
  1069. * ring_idx in register
  1070. *
  1071. * @soc: data path SoC handle
  1072. * @pdev: Physical device handle
  1073. *
  1074. * Return: void
  1075. */
  1076. #ifdef QCA_HOST2FW_RXBUF_RING
  1077. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1078. {
  1079. int i;
  1080. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1081. struct dp_pdev *pdev = soc->pdev_list[i];
  1082. if (pdev) {
  1083. int mac_id = 0;
  1084. int j;
  1085. int max_mac_rings =
  1086. wlan_cfg_get_num_mac_rings
  1087. (pdev->wlan_cfg_ctx);
  1088. htt_srng_setup(soc->htt_handle, 0,
  1089. pdev->rx_refill_buf_ring.hal_srng,
  1090. RXDMA_BUF);
  1091. if (!soc->cdp_soc.ol_ops->
  1092. is_hw_dbs_2x2_capable()) {
  1093. max_mac_rings = 1;
  1094. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1095. QDF_TRACE_LEVEL_ERROR,
  1096. FL("DBS enabled, max_mac_rings %d\n"),
  1097. max_mac_rings);
  1098. } else {
  1099. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1100. QDF_TRACE_LEVEL_ERROR,
  1101. FL("DBS disabled max_mac_rings %d\n"),
  1102. max_mac_rings);
  1103. }
  1104. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1105. FL("pdev_id %d max_mac_rings %d\n"),
  1106. pdev->pdev_id, max_mac_rings);
  1107. for (j = 0; j < max_mac_rings; j++) {
  1108. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1109. QDF_TRACE_LEVEL_ERROR,
  1110. FL("mac_id %d\n"), mac_id);
  1111. htt_srng_setup(soc->htt_handle, mac_id,
  1112. pdev->rx_mac_buf_ring[j]
  1113. .hal_srng,
  1114. RXDMA_BUF);
  1115. mac_id++;
  1116. }
  1117. }
  1118. }
  1119. }
  1120. #else
  1121. static void dp_rxdma_ring_config(struct dp_soc *soc)
  1122. {
  1123. int i;
  1124. for (i = 0; i < MAX_PDEV_CNT; i++) {
  1125. struct dp_pdev *pdev = soc->pdev_list[i];
  1126. if (pdev) {
  1127. htt_srng_setup(soc->htt_handle, i,
  1128. pdev->rx_refill_buf_ring.hal_srng, RXDMA_BUF);
  1129. }
  1130. }
  1131. }
  1132. #endif
  1133. /*
  1134. * dp_soc_attach_target_wifi3() - SOC initialization in the target
  1135. * @txrx_soc: Datapath SOC handle
  1136. */
  1137. static int dp_soc_attach_target_wifi3(struct cdp_soc_t *cdp_soc)
  1138. {
  1139. struct dp_soc *soc = (struct dp_soc *)cdp_soc;
  1140. htt_soc_attach_target(soc->htt_handle);
  1141. dp_rxdma_ring_config(soc);
  1142. DP_STATS_INIT(soc);
  1143. return 0;
  1144. }
  1145. /*
  1146. * dp_vdev_attach_wifi3() - attach txrx vdev
  1147. * @txrx_pdev: Datapath PDEV handle
  1148. * @vdev_mac_addr: MAC address of the virtual interface
  1149. * @vdev_id: VDEV Id
  1150. * @wlan_op_mode: VDEV operating mode
  1151. *
  1152. * Return: DP VDEV handle on success, NULL on failure
  1153. */
  1154. static struct cdp_vdev *dp_vdev_attach_wifi3(struct cdp_pdev *txrx_pdev,
  1155. uint8_t *vdev_mac_addr, uint8_t vdev_id, enum wlan_op_mode op_mode)
  1156. {
  1157. struct dp_pdev *pdev = (struct dp_pdev *)txrx_pdev;
  1158. struct dp_soc *soc = pdev->soc;
  1159. struct dp_vdev *vdev = qdf_mem_malloc(sizeof(*vdev));
  1160. if (!vdev) {
  1161. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1162. FL("DP VDEV memory allocation failed"));
  1163. goto fail0;
  1164. }
  1165. vdev->pdev = pdev;
  1166. vdev->vdev_id = vdev_id;
  1167. vdev->opmode = op_mode;
  1168. vdev->osdev = soc->osdev;
  1169. vdev->osif_rx = NULL;
  1170. vdev->osif_rsim_rx_decap = NULL;
  1171. vdev->osif_rx_mon = NULL;
  1172. vdev->osif_tx_free_ext = NULL;
  1173. vdev->osif_vdev = NULL;
  1174. vdev->delete.pending = 0;
  1175. vdev->safemode = 0;
  1176. vdev->drop_unenc = 1;
  1177. #ifdef notyet
  1178. vdev->filters_num = 0;
  1179. #endif
  1180. qdf_mem_copy(
  1181. &vdev->mac_addr.raw[0], vdev_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1182. vdev->tx_encap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1183. vdev->rx_decap_type = wlan_cfg_pkt_type(soc->wlan_cfg_ctx);
  1184. /* TODO: Initialize default HTT meta data that will be used in
  1185. * TCL descriptors for packets transmitted from this VDEV
  1186. */
  1187. TAILQ_INIT(&vdev->peer_list);
  1188. /* add this vdev into the pdev's list */
  1189. TAILQ_INSERT_TAIL(&pdev->vdev_list, vdev, vdev_list_elem);
  1190. pdev->vdev_count++;
  1191. dp_tx_vdev_attach(vdev);
  1192. #ifdef DP_INTR_POLL_BASED
  1193. if (pdev->vdev_count == 1)
  1194. qdf_timer_mod(&soc->int_timer, DP_INTR_POLL_TIMER_MS);
  1195. #endif
  1196. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1197. "Created vdev %p (%pM)", vdev, vdev->mac_addr.raw);
  1198. return (struct cdp_vdev *)vdev;
  1199. fail0:
  1200. return NULL;
  1201. }
  1202. /**
  1203. * dp_vdev_register_wifi3() - Register VDEV operations from osif layer
  1204. * @vdev: Datapath VDEV handle
  1205. * @osif_vdev: OSIF vdev handle
  1206. * @txrx_ops: Tx and Rx operations
  1207. *
  1208. * Return: DP VDEV handle on success, NULL on failure
  1209. */
  1210. static void dp_vdev_register_wifi3(struct cdp_vdev *vdev_handle,
  1211. void *osif_vdev,
  1212. struct ol_txrx_ops *txrx_ops)
  1213. {
  1214. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1215. vdev->osif_vdev = osif_vdev;
  1216. vdev->osif_rx = txrx_ops->rx.rx;
  1217. vdev->osif_rsim_rx_decap = txrx_ops->rx.rsim_rx_decap;
  1218. vdev->osif_rx_mon = txrx_ops->rx.mon;
  1219. vdev->osif_tx_free_ext = txrx_ops->tx.tx_free_ext;
  1220. #ifdef notyet
  1221. #if ATH_SUPPORT_WAPI
  1222. vdev->osif_check_wai = txrx_ops->rx.wai_check;
  1223. #endif
  1224. #if UMAC_SUPPORT_PROXY_ARP
  1225. vdev->osif_proxy_arp = txrx_ops->proxy_arp;
  1226. #endif
  1227. #endif
  1228. /* TODO: Enable the following once Tx code is integrated */
  1229. txrx_ops->tx.tx = dp_tx_send;
  1230. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1231. "DP Vdev Register success");
  1232. }
  1233. /*
  1234. * dp_vdev_detach_wifi3() - Detach txrx vdev
  1235. * @txrx_vdev: Datapath VDEV handle
  1236. * @callback: Callback OL_IF on completion of detach
  1237. * @cb_context: Callback context
  1238. *
  1239. */
  1240. static void dp_vdev_detach_wifi3(struct cdp_vdev *vdev_handle,
  1241. ol_txrx_vdev_delete_cb callback, void *cb_context)
  1242. {
  1243. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1244. struct dp_pdev *pdev = vdev->pdev;
  1245. struct dp_soc *soc = pdev->soc;
  1246. /* preconditions */
  1247. qdf_assert(vdev);
  1248. /* remove the vdev from its parent pdev's list */
  1249. TAILQ_REMOVE(&pdev->vdev_list, vdev, vdev_list_elem);
  1250. /*
  1251. * Use peer_ref_mutex while accessing peer_list, in case
  1252. * a peer is in the process of being removed from the list.
  1253. */
  1254. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1255. /* check that the vdev has no peers allocated */
  1256. if (!TAILQ_EMPTY(&vdev->peer_list)) {
  1257. /* debug print - will be removed later */
  1258. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1259. FL("not deleting vdev object %p (%pM)"
  1260. "until deletion finishes for all its peers"),
  1261. vdev, vdev->mac_addr.raw);
  1262. /* indicate that the vdev needs to be deleted */
  1263. vdev->delete.pending = 1;
  1264. vdev->delete.callback = callback;
  1265. vdev->delete.context = cb_context;
  1266. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1267. return;
  1268. }
  1269. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1270. dp_tx_vdev_detach(vdev);
  1271. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1272. FL("deleting vdev object %p (%pM)"), vdev, vdev->mac_addr.raw);
  1273. qdf_mem_free(vdev);
  1274. if (callback)
  1275. callback(cb_context);
  1276. }
  1277. /*
  1278. * dp_peer_create_wifi3() - attach txrx peer
  1279. * @txrx_vdev: Datapath VDEV handle
  1280. * @peer_mac_addr: Peer MAC address
  1281. *
  1282. * Return: DP peeer handle on success, NULL on failure
  1283. */
  1284. static void *dp_peer_create_wifi3(struct cdp_vdev *vdev_handle,
  1285. uint8_t *peer_mac_addr)
  1286. {
  1287. struct dp_peer *peer;
  1288. int i;
  1289. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1290. struct dp_pdev *pdev;
  1291. struct dp_soc *soc;
  1292. /* preconditions */
  1293. qdf_assert(vdev);
  1294. qdf_assert(peer_mac_addr);
  1295. pdev = vdev->pdev;
  1296. soc = pdev->soc;
  1297. #ifdef notyet
  1298. peer = (struct dp_peer *)qdf_mempool_alloc(soc->osdev,
  1299. soc->mempool_ol_ath_peer);
  1300. #else
  1301. peer = (struct dp_peer *)qdf_mem_malloc(sizeof(*peer));
  1302. #endif
  1303. if (!peer)
  1304. return NULL; /* failure */
  1305. qdf_mem_zero(peer, sizeof(struct dp_peer));
  1306. qdf_spinlock_create(&peer->peer_info_lock);
  1307. /* store provided params */
  1308. peer->vdev = vdev;
  1309. qdf_mem_copy(
  1310. &peer->mac_addr.raw[0], peer_mac_addr, OL_TXRX_MAC_ADDR_LEN);
  1311. /* TODO: See of rx_opt_proc is really required */
  1312. peer->rx_opt_proc = soc->rx_opt_proc;
  1313. /* initialize the peer_id */
  1314. for (i = 0; i < MAX_NUM_PEER_ID_PER_PEER; i++)
  1315. peer->peer_ids[i] = HTT_INVALID_PEER;
  1316. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1317. qdf_atomic_init(&peer->ref_cnt);
  1318. /* keep one reference for attach */
  1319. qdf_atomic_inc(&peer->ref_cnt);
  1320. /* add this peer into the vdev's list */
  1321. TAILQ_INSERT_TAIL(&vdev->peer_list, peer, peer_list_elem);
  1322. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1323. /* TODO: See if hash based search is required */
  1324. dp_peer_find_hash_add(soc, peer);
  1325. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1326. "vdev %p created peer %p (%pM) ref_cnt: %d",
  1327. vdev, peer, peer->mac_addr.raw,
  1328. qdf_atomic_read(&peer->ref_cnt));
  1329. /*
  1330. * For every peer MAp message search and set if bss_peer
  1331. */
  1332. if (memcmp(peer->mac_addr.raw, vdev->mac_addr.raw, 6) == 0) {
  1333. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1334. "vdev bss_peer!!!!");
  1335. peer->bss_peer = 1;
  1336. vdev->vap_bss_peer = peer;
  1337. }
  1338. #ifndef CONFIG_WIN
  1339. dp_local_peer_id_alloc(pdev, peer);
  1340. #endif
  1341. return (void *)peer;
  1342. }
  1343. /*
  1344. * dp_peer_setup_wifi3() - initialize the peer
  1345. * @vdev_hdl: virtual device object
  1346. * @peer: Peer object
  1347. *
  1348. * Return: void
  1349. */
  1350. static void dp_peer_setup_wifi3(struct cdp_vdev *vdev_hdl, void *peer_hdl)
  1351. {
  1352. struct dp_peer *peer = (struct dp_peer *)peer_hdl;
  1353. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1354. struct dp_pdev *pdev;
  1355. struct dp_soc *soc;
  1356. /* preconditions */
  1357. qdf_assert(vdev);
  1358. qdf_assert(peer);
  1359. pdev = vdev->pdev;
  1360. soc = pdev->soc;
  1361. dp_peer_rx_init(pdev, peer);
  1362. peer->last_assoc_rcvd = 0;
  1363. peer->last_disassoc_rcvd = 0;
  1364. peer->last_deauth_rcvd = 0;
  1365. if (soc->cdp_soc.ol_ops->peer_set_default_routing) {
  1366. /* TODO: Check the destination ring number to be passed to FW */
  1367. soc->cdp_soc.ol_ops->peer_set_default_routing(pdev->osif_pdev,
  1368. peer->mac_addr.raw, peer->vdev->vdev_id, 0, 1);
  1369. }
  1370. return;
  1371. }
  1372. /*
  1373. * dp_set_vdev_tx_encap_type() - set the encap type of the vdev
  1374. * @vdev_handle: virtual device object
  1375. * @htt_pkt_type: type of pkt
  1376. *
  1377. * Return: void
  1378. */
  1379. static void dp_set_vdev_tx_encap_type(struct cdp_vdev *vdev_handle,
  1380. enum htt_cmn_pkt_type val)
  1381. {
  1382. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1383. vdev->tx_encap_type = val;
  1384. }
  1385. /*
  1386. * dp_set_vdev_rx_decap_type() - set the decap type of the vdev
  1387. * @vdev_handle: virtual device object
  1388. * @htt_pkt_type: type of pkt
  1389. *
  1390. * Return: void
  1391. */
  1392. static void dp_set_vdev_rx_decap_type(struct cdp_vdev *vdev_handle,
  1393. enum htt_cmn_pkt_type val)
  1394. {
  1395. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1396. vdev->rx_decap_type = val;
  1397. }
  1398. /*
  1399. * dp_peer_authorize() - authorize txrx peer
  1400. * @peer_handle: Datapath peer handle
  1401. * @authorize
  1402. *
  1403. */
  1404. static void dp_peer_authorize(void *peer_handle, uint32_t authorize)
  1405. {
  1406. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1407. struct dp_soc *soc;
  1408. if (peer != NULL) {
  1409. soc = peer->vdev->pdev->soc;
  1410. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1411. peer->authorize = authorize ? 1 : 0;
  1412. #ifdef notyet /* ATH_BAND_STEERING */
  1413. peer->peer_bs_inact_flag = 0;
  1414. peer->peer_bs_inact = soc->pdev_bs_inact_reload;
  1415. #endif
  1416. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1417. }
  1418. }
  1419. /*
  1420. * dp_peer_unref_delete() - unref and delete peer
  1421. * @peer_handle: Datapath peer handle
  1422. *
  1423. */
  1424. void dp_peer_unref_delete(void *peer_handle)
  1425. {
  1426. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1427. struct dp_vdev *vdev = peer->vdev;
  1428. struct dp_soc *soc = vdev->pdev->soc;
  1429. struct dp_peer *tmppeer;
  1430. int found = 0;
  1431. uint16_t peer_id;
  1432. /*
  1433. * Hold the lock all the way from checking if the peer ref count
  1434. * is zero until the peer references are removed from the hash
  1435. * table and vdev list (if the peer ref count is zero).
  1436. * This protects against a new HL tx operation starting to use the
  1437. * peer object just after this function concludes it's done being used.
  1438. * Furthermore, the lock needs to be held while checking whether the
  1439. * vdev's list of peers is empty, to make sure that list is not modified
  1440. * concurrently with the empty check.
  1441. */
  1442. qdf_spin_lock_bh(&soc->peer_ref_mutex);
  1443. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1444. "%s: peer %p ref_cnt(before decrement): %d\n", __func__,
  1445. peer, qdf_atomic_read(&peer->ref_cnt));
  1446. if (qdf_atomic_dec_and_test(&peer->ref_cnt)) {
  1447. peer_id = peer->peer_ids[0];
  1448. /*
  1449. * Make sure that the reference to the peer in
  1450. * peer object map is removed
  1451. */
  1452. if (peer_id != HTT_INVALID_PEER)
  1453. soc->peer_id_to_obj_map[peer_id] = NULL;
  1454. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1455. "Deleting peer %p (%pM)", peer, peer->mac_addr.raw);
  1456. /* remove the reference to the peer from the hash table */
  1457. dp_peer_find_hash_remove(soc, peer);
  1458. TAILQ_FOREACH(tmppeer, &peer->vdev->peer_list, peer_list_elem) {
  1459. if (tmppeer == peer) {
  1460. found = 1;
  1461. break;
  1462. }
  1463. }
  1464. if (found) {
  1465. TAILQ_REMOVE(&peer->vdev->peer_list, peer,
  1466. peer_list_elem);
  1467. } else {
  1468. /*Ignoring the remove operation as peer not found*/
  1469. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1470. "peer %p not found in vdev (%p)->peer_list:%p",
  1471. peer, vdev, &peer->vdev->peer_list);
  1472. }
  1473. /* cleanup the peer data */
  1474. dp_peer_cleanup(vdev, peer);
  1475. /* check whether the parent vdev has no peers left */
  1476. if (TAILQ_EMPTY(&vdev->peer_list)) {
  1477. /*
  1478. * Now that there are no references to the peer, we can
  1479. * release the peer reference lock.
  1480. */
  1481. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1482. /*
  1483. * Check if the parent vdev was waiting for its peers
  1484. * to be deleted, in order for it to be deleted too.
  1485. */
  1486. if (vdev->delete.pending) {
  1487. ol_txrx_vdev_delete_cb vdev_delete_cb =
  1488. vdev->delete.callback;
  1489. void *vdev_delete_context =
  1490. vdev->delete.context;
  1491. QDF_TRACE(QDF_MODULE_ID_DP,
  1492. QDF_TRACE_LEVEL_INFO_HIGH,
  1493. FL("deleting vdev object %p (%pM)"
  1494. " - its last peer is done"),
  1495. vdev, vdev->mac_addr.raw);
  1496. /* all peers are gone, go ahead and delete it */
  1497. qdf_mem_free(vdev);
  1498. if (vdev_delete_cb)
  1499. vdev_delete_cb(vdev_delete_context);
  1500. }
  1501. } else {
  1502. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1503. }
  1504. #ifdef notyet
  1505. qdf_mempool_free(soc->osdev, soc->mempool_ol_ath_peer, peer);
  1506. #else
  1507. qdf_mem_free(peer);
  1508. #endif
  1509. if (soc->cdp_soc.ol_ops->peer_unref_delete) {
  1510. soc->cdp_soc.ol_ops->peer_unref_delete(soc->osif_soc,
  1511. vdev->vdev_id, peer->mac_addr.raw);
  1512. }
  1513. } else {
  1514. qdf_spin_unlock_bh(&soc->peer_ref_mutex);
  1515. }
  1516. }
  1517. /*
  1518. * dp_peer_detach_wifi3() – Detach txrx peer
  1519. * @peer_handle: Datapath peer handle
  1520. *
  1521. */
  1522. static void dp_peer_delete_wifi3(void *peer_handle)
  1523. {
  1524. struct dp_peer *peer = (struct dp_peer *)peer_handle;
  1525. /* redirect the peer's rx delivery function to point to a
  1526. * discard func
  1527. */
  1528. peer->rx_opt_proc = dp_rx_discard;
  1529. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_HIGH,
  1530. FL("peer %p (%pM)"), peer, peer->mac_addr.raw);
  1531. #ifndef CONFIG_WIN
  1532. dp_local_peer_id_free(peer->vdev->pdev, peer);
  1533. #endif
  1534. qdf_spinlock_destroy(&peer->peer_info_lock);
  1535. /*
  1536. * Remove the reference added during peer_attach.
  1537. * The peer will still be left allocated until the
  1538. * PEER_UNMAP message arrives to remove the other
  1539. * reference, added by the PEER_MAP message.
  1540. */
  1541. dp_peer_unref_delete(peer_handle);
  1542. }
  1543. /*
  1544. * dp_get_vdev_mac_addr_wifi3() – Detach txrx peer
  1545. * @peer_handle: Datapath peer handle
  1546. *
  1547. */
  1548. static uint8 *dp_get_vdev_mac_addr_wifi3(struct cdp_vdev *pvdev)
  1549. {
  1550. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  1551. return vdev->mac_addr.raw;
  1552. }
  1553. /*
  1554. * dp_get_vdev_from_vdev_id_wifi3() – Detach txrx peer
  1555. * @peer_handle: Datapath peer handle
  1556. *
  1557. */
  1558. static struct cdp_vdev *dp_get_vdev_from_vdev_id_wifi3(struct cdp_pdev *dev,
  1559. uint8_t vdev_id)
  1560. {
  1561. struct dp_pdev *pdev = (struct dp_pdev *)dev;
  1562. struct dp_vdev *vdev = NULL;
  1563. if (qdf_unlikely(!pdev))
  1564. return NULL;
  1565. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1566. if (vdev->vdev_id == vdev_id)
  1567. break;
  1568. }
  1569. return (struct cdp_vdev *)vdev;
  1570. }
  1571. static int dp_get_opmode(struct cdp_vdev *vdev_handle)
  1572. {
  1573. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1574. return vdev->opmode;
  1575. }
  1576. static struct cdp_cfg *dp_get_ctrl_pdev_from_vdev_wifi3(struct cdp_vdev *pvdev)
  1577. {
  1578. struct dp_vdev *vdev = (struct dp_vdev *)pvdev;
  1579. struct dp_pdev *pdev = vdev->pdev;
  1580. return (struct cdp_cfg *)pdev->wlan_cfg_ctx;
  1581. }
  1582. #ifdef MESH_MODE_SUPPORT
  1583. void dp_peer_set_mesh_mode(struct cdp_vdev *vdev_hdl, uint32_t val)
  1584. {
  1585. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1586. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1587. FL("%s: val %d"), __func__, val);
  1588. vdev->mesh_vdev = val;
  1589. }
  1590. /*
  1591. * dp_peer_set_mesh_rx_filter() - to set the mesh rx filter
  1592. * @vdev_hdl: virtual device object
  1593. * @val: value to be set
  1594. *
  1595. * Return: void
  1596. */
  1597. void dp_peer_set_mesh_rx_filter(struct cdp_vdev *vdev_hdl, uint32_t val)
  1598. {
  1599. struct dp_vdev *vdev = (struct dp_vdev *)vdev_hdl;
  1600. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  1601. FL("val %d"), val);
  1602. vdev->mesh_rx_filter = val;
  1603. }
  1604. #endif
  1605. static struct cdp_cmn_ops dp_ops_cmn = {
  1606. .txrx_soc_attach_target = dp_soc_attach_target_wifi3,
  1607. .txrx_vdev_attach = dp_vdev_attach_wifi3,
  1608. .txrx_vdev_detach = dp_vdev_detach_wifi3,
  1609. .txrx_pdev_attach = dp_pdev_attach_wifi3,
  1610. .txrx_pdev_detach = dp_pdev_detach_wifi3,
  1611. .txrx_peer_create = dp_peer_create_wifi3,
  1612. .txrx_peer_setup = dp_peer_setup_wifi3,
  1613. .txrx_peer_teardown = NULL,
  1614. .txrx_peer_delete = dp_peer_delete_wifi3,
  1615. .txrx_vdev_register = dp_vdev_register_wifi3,
  1616. .txrx_soc_detach = dp_soc_detach_wifi3,
  1617. .txrx_get_vdev_mac_addr = dp_get_vdev_mac_addr_wifi3,
  1618. .txrx_get_vdev_from_vdev_id = dp_get_vdev_from_vdev_id_wifi3,
  1619. .txrx_get_ctrl_pdev_from_vdev = dp_get_ctrl_pdev_from_vdev_wifi3,
  1620. .addba_requestprocess = dp_addba_requestprocess_wifi3,
  1621. .addba_responsesetup = dp_addba_responsesetup_wifi3,
  1622. .delba_process = dp_delba_process_wifi3,
  1623. /* TODO: Add other functions */
  1624. };
  1625. static struct cdp_ctrl_ops dp_ops_ctrl = {
  1626. .txrx_peer_authorize = dp_peer_authorize,
  1627. .txrx_set_vdev_rx_decap_type = dp_set_vdev_rx_decap_type,
  1628. .txrx_set_tx_encap_type = dp_set_vdev_tx_encap_type,
  1629. #ifdef MESH_MODE_SUPPORT
  1630. .txrx_set_mesh_mode = dp_peer_set_mesh_mode,
  1631. .txrx_set_mesh_rx_filter = dp_peer_set_mesh_rx_filter,
  1632. #endif
  1633. /* TODO: Add other functions */
  1634. };
  1635. static struct cdp_me_ops dp_ops_me = {
  1636. /* TODO */
  1637. };
  1638. static struct cdp_mon_ops dp_ops_mon = {
  1639. /* TODO */
  1640. };
  1641. static struct cdp_host_stats_ops dp_ops_host_stats = {
  1642. .txrx_host_stats_get = dp_print_host_stats,
  1643. /* TODO */
  1644. };
  1645. static struct cdp_wds_ops dp_ops_wds = {
  1646. /* TODO */
  1647. };
  1648. static struct cdp_raw_ops dp_ops_raw = {
  1649. /* TODO */
  1650. };
  1651. #ifdef CONFIG_WIN
  1652. static struct cdp_pflow_ops dp_ops_pflow = {
  1653. /* TODO */
  1654. };
  1655. #endif /* CONFIG_WIN */
  1656. #ifndef CONFIG_WIN
  1657. static struct cdp_misc_ops dp_ops_misc = {
  1658. .get_opmode = dp_get_opmode,
  1659. };
  1660. static struct cdp_flowctl_ops dp_ops_flowctl = {
  1661. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1662. };
  1663. static struct cdp_lflowctl_ops dp_ops_l_flowctl = {
  1664. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1665. };
  1666. static struct cdp_ipa_ops dp_ops_ipa = {
  1667. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1668. };
  1669. static struct cdp_lro_ops dp_ops_lro = {
  1670. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1671. };
  1672. /**
  1673. * dp_dummy_bus_suspend() - dummy bus suspend op
  1674. *
  1675. * FIXME - This is a placeholder for the actual logic!
  1676. *
  1677. * Return: QDF_STATUS_SUCCESS
  1678. */
  1679. inline QDF_STATUS dp_dummy_bus_suspend(void)
  1680. {
  1681. return QDF_STATUS_SUCCESS;
  1682. }
  1683. /**
  1684. * dp_dummy_bus_resume() - dummy bus resume
  1685. *
  1686. * FIXME - This is a placeholder for the actual logic!
  1687. *
  1688. * Return: QDF_STATUS_SUCCESS
  1689. */
  1690. inline QDF_STATUS dp_dummy_bus_resume(void)
  1691. {
  1692. return QDF_STATUS_SUCCESS;
  1693. }
  1694. static struct cdp_bus_ops dp_ops_bus = {
  1695. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1696. .bus_suspend = dp_dummy_bus_suspend,
  1697. .bus_resume = dp_dummy_bus_resume
  1698. };
  1699. static struct cdp_ocb_ops dp_ops_ocb = {
  1700. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1701. };
  1702. static struct cdp_throttle_ops dp_ops_throttle = {
  1703. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1704. };
  1705. static struct cdp_mob_stats_ops dp_ops_mob_stats = {
  1706. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1707. };
  1708. static struct cdp_cfg_ops dp_ops_cfg = {
  1709. /* WIFI 3.0 DP NOT IMPLEMENTED YET */
  1710. };
  1711. static struct cdp_peer_ops dp_ops_peer = {
  1712. .register_peer = dp_register_peer,
  1713. .clear_peer = dp_clear_peer,
  1714. .find_peer_by_addr = dp_find_peer_by_addr,
  1715. .find_peer_by_addr_and_vdev = dp_find_peer_by_addr_and_vdev,
  1716. .local_peer_id = dp_local_peer_id,
  1717. .peer_find_by_local_id = dp_peer_find_by_local_id,
  1718. .peer_state_update = dp_peer_state_update,
  1719. .get_vdevid = dp_get_vdevid,
  1720. .peer_get_peer_mac_addr = dp_peer_get_peer_mac_addr,
  1721. .get_vdev_for_peer = dp_get_vdev_for_peer,
  1722. .get_peer_state = dp_get_peer_state,
  1723. .last_assoc_received = dp_get_last_assoc_received,
  1724. .last_disassoc_received = dp_get_last_disassoc_received,
  1725. .last_deauth_received = dp_get_last_deauth_received,
  1726. };
  1727. #endif
  1728. static struct cdp_ops dp_txrx_ops = {
  1729. .cmn_drv_ops = &dp_ops_cmn,
  1730. .ctrl_ops = &dp_ops_ctrl,
  1731. .me_ops = &dp_ops_me,
  1732. .mon_ops = &dp_ops_mon,
  1733. .host_stats_ops = &dp_ops_host_stats,
  1734. .wds_ops = &dp_ops_wds,
  1735. .raw_ops = &dp_ops_raw,
  1736. #ifdef CONFIG_WIN
  1737. .pflow_ops = &dp_ops_pflow,
  1738. #endif /* CONFIG_WIN */
  1739. #ifndef CONFIG_WIN
  1740. .misc_ops = &dp_ops_misc,
  1741. .cfg_ops = &dp_ops_cfg,
  1742. .flowctl_ops = &dp_ops_flowctl,
  1743. .l_flowctl_ops = &dp_ops_l_flowctl,
  1744. .ipa_ops = &dp_ops_ipa,
  1745. .lro_ops = &dp_ops_lro,
  1746. .bus_ops = &dp_ops_bus,
  1747. .ocb_ops = &dp_ops_ocb,
  1748. .peer_ops = &dp_ops_peer,
  1749. .throttle_ops = &dp_ops_throttle,
  1750. .mob_stats_ops = &dp_ops_mob_stats,
  1751. #endif
  1752. };
  1753. /*
  1754. * dp_soc_attach_wifi3() - Attach txrx SOC
  1755. * @osif_soc: Opaque SOC handle from OSIF/HDD
  1756. * @htc_handle: Opaque HTC handle
  1757. * @hif_handle: Opaque HIF handle
  1758. * @qdf_osdev: QDF device
  1759. *
  1760. * Return: DP SOC handle on success, NULL on failure
  1761. */
  1762. /*
  1763. * Local prototype added to temporarily address warning caused by
  1764. * -Wmissing-prototypes. A more correct solution, namely to expose
  1765. * a prototype in an appropriate header file, will come later.
  1766. */
  1767. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  1768. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  1769. struct ol_if_ops *ol_ops);
  1770. void *dp_soc_attach_wifi3(void *osif_soc, void *hif_handle,
  1771. HTC_HANDLE htc_handle, qdf_device_t qdf_osdev,
  1772. struct ol_if_ops *ol_ops)
  1773. {
  1774. struct dp_soc *soc = qdf_mem_malloc(sizeof(*soc));
  1775. if (!soc) {
  1776. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1777. FL("DP SOC memory allocation failed"));
  1778. goto fail0;
  1779. }
  1780. soc->cdp_soc.ops = &dp_txrx_ops;
  1781. soc->cdp_soc.ol_ops = ol_ops;
  1782. soc->osif_soc = osif_soc;
  1783. soc->osdev = qdf_osdev;
  1784. soc->hif_handle = hif_handle;
  1785. soc->hal_soc = hif_get_hal_handle(hif_handle);
  1786. soc->htt_handle = htt_soc_attach(soc, osif_soc, htc_handle,
  1787. soc->hal_soc, qdf_osdev);
  1788. if (!soc->htt_handle) {
  1789. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1790. FL("HTT attach failed"));
  1791. goto fail1;
  1792. }
  1793. soc->wlan_cfg_ctx = wlan_cfg_soc_attach();
  1794. if (!soc->wlan_cfg_ctx) {
  1795. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1796. FL("wlan_cfg_soc_attach failed"));
  1797. goto fail2;
  1798. }
  1799. qdf_spinlock_create(&soc->peer_ref_mutex);
  1800. if (dp_soc_interrupt_attach(soc) != QDF_STATUS_SUCCESS) {
  1801. goto fail2;
  1802. }
  1803. qdf_spinlock_create(&soc->reo_desc_freelist_lock);
  1804. qdf_list_create(&soc->reo_desc_freelist, REO_DESC_FREELIST_SIZE);
  1805. return (void *)soc;
  1806. fail2:
  1807. htt_soc_detach(soc->htt_handle);
  1808. fail1:
  1809. qdf_mem_free(soc);
  1810. fail0:
  1811. return NULL;
  1812. }
  1813. /*
  1814. * dp_print_host_stats()- Function to print the stats aggregated at host
  1815. * @vdev_handle: DP_VDEV handle
  1816. * @req: ol_txrx_stats_req
  1817. * @type: host stats type
  1818. *
  1819. * Available Stat types
  1820. * TXRX_RX_RATE_STATS: Print Rx Rate Info
  1821. * TXRX_TX_RATE_STATS: Print Tx Rate Info
  1822. * TXRX_TX_HOST_STATS: Print Tx Stats
  1823. * TXRX_RX_HOST_STATS: Print Rx Stats
  1824. * TXRX_CLEAR_STATS: Clear the stats
  1825. *
  1826. * Return: 0 on success
  1827. */
  1828. int
  1829. dp_print_host_stats(struct cdp_vdev *vdev_handle, struct ol_txrx_stats_req *req,
  1830. enum cdp_host_txrx_stats type)
  1831. {
  1832. struct dp_vdev *vdev = (struct dp_vdev *)vdev_handle;
  1833. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  1834. switch (type) {
  1835. case TXRX_RX_RATE_STATS:
  1836. dp_print_rx_rates(vdev);
  1837. break;
  1838. case TXRX_TX_RATE_STATS:
  1839. dp_print_tx_rates(vdev);
  1840. break;
  1841. case TXRX_TX_HOST_STATS:
  1842. dp_print_pdev_tx_stats(pdev);
  1843. dp_print_soc_tx_stats(pdev->soc);
  1844. break;
  1845. case TXRX_RX_HOST_STATS:
  1846. dp_print_pdev_rx_stats(pdev);
  1847. dp_print_soc_rx_stats(pdev->soc);
  1848. break;
  1849. case TXRX_CLEAR_STATS:
  1850. dp_txrx_host_stats_clr(vdev);
  1851. break;
  1852. default:
  1853. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1854. "Wrong Input For TxRx Host Stats");
  1855. break;
  1856. }
  1857. return 0;
  1858. }
  1859. /*
  1860. * dp_print_pdev_tx_stats(): Print Pdev level TX stats
  1861. * @pdev: DP_PDEV Handle
  1862. *
  1863. * Return:void
  1864. */
  1865. void
  1866. dp_print_pdev_tx_stats(struct dp_pdev *pdev)
  1867. {
  1868. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1869. "\n WLAN Tx Stats\n");
  1870. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1871. " Received From Stack\n");
  1872. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1873. " Total Packets Received: %d ",
  1874. pdev->stats.tx.rcvd.num);
  1875. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1876. " Bytes Sent: %d ",
  1877. pdev->stats.tx.rcvd.bytes);
  1878. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1879. " Processed\n");
  1880. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1881. " Msdu Processed: %d ", pdev->stats.tx.processed.num);
  1882. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1883. " Bytes Processed: %d ",
  1884. pdev->stats.tx.processed.bytes);
  1885. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1886. " Completions\n");
  1887. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1888. " Msdu Sent: %d ", pdev->stats.tx.comp.comp_pkt.num);
  1889. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1890. " Bytes Sent: %d ",
  1891. pdev->stats.tx.comp.comp_pkt.bytes);
  1892. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1893. " Freed\n");
  1894. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1895. " Msdus Freed: %d ", pdev->stats.tx.freed.num);
  1896. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1897. " Bytes Freed: %d ", pdev->stats.tx.freed.bytes);
  1898. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1899. " Dropped\n");
  1900. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1901. " Total Packets Dropped: %d ",
  1902. pdev->stats.tx.dropped.dropped_pkt.num);
  1903. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1904. " Bytes Dropped: %d ",
  1905. pdev->stats.tx.dropped.dropped_pkt.bytes);
  1906. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1907. " Dma_map_error: %d ",
  1908. pdev->stats.tx.dropped.dma_map_error);
  1909. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1910. " Ring Full: %d ", pdev->stats.tx.dropped.ring_full);
  1911. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1912. " Fw Discard: %d ",
  1913. pdev->stats.tx.dropped.fw_discard);
  1914. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1915. " Fw Discard Retired: %d ",
  1916. pdev->stats.tx.dropped.fw_discard_retired);
  1917. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1918. " Firmware Discard Untransmitted: %d ",
  1919. pdev->stats.tx.dropped.firmware_discard_untransmitted);
  1920. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1921. " Mpdu Age Out: %d ",
  1922. pdev->stats.tx.dropped.mpdu_age_out);
  1923. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1924. " Firmware Discard Reason1: %d ",
  1925. pdev->stats.tx.dropped.firmware_discard_reason1);
  1926. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1927. " Firmware Discard Reason2: %d ",
  1928. pdev->stats.tx.dropped.firmware_discard_reason2);
  1929. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1930. " Firmware Discard Reason3: %d ",
  1931. pdev->stats.tx.dropped.firmware_discard_reason3);
  1932. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1933. " Scatter Gather\n");
  1934. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1935. " Total Packets: %d ", pdev->stats.tx.sg.sg_pkt.num);
  1936. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1937. " Total Bytes: %d ", pdev->stats.tx.sg.sg_pkt.bytes);
  1938. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1939. " Dropped By Host: %d ",
  1940. pdev->stats.tx.sg.dropped_host);
  1941. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1942. " Dropped By Target: %d ",
  1943. pdev->stats.tx.sg.dropped_target);
  1944. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1945. " Tso\n");
  1946. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1947. " Number of Segments: %d ",
  1948. pdev->stats.tx.tso.num_seg);
  1949. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1950. " Number Packets: %d ",
  1951. pdev->stats.tx.tso.tso_pkt.num);
  1952. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1953. " Total Bytes: %d ",
  1954. pdev->stats.tx.tso.tso_pkt.bytes);
  1955. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1956. " Dropped By Host: %d ",
  1957. pdev->stats.tx.tso.dropped_host);
  1958. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1959. " Mcast Enhancement\n");
  1960. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1961. " Dropped: Map Errors: %d ",
  1962. pdev->stats.tx.mcast_en.dropped_map_error);
  1963. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1964. " Dropped: Self Mac: %d ",
  1965. pdev->stats.tx.mcast_en.dropped_self_mac);
  1966. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1967. " Dropped: Send Fail: %d ",
  1968. pdev->stats.tx.mcast_en.dropped_send_fail);
  1969. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1970. " Total Unicast sent: %d ",
  1971. pdev->stats.tx.mcast_en.ucast);
  1972. }
  1973. /*
  1974. * dp_print_pdev_rx_stats(): Print Pdev level RX stats
  1975. * @pdev: DP_PDEV Handle
  1976. *
  1977. * Return: void
  1978. */
  1979. void
  1980. dp_print_pdev_rx_stats(struct dp_pdev *pdev)
  1981. {
  1982. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1983. "\n WLAN Rx Stats\n");
  1984. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1985. " Received From HW (Reo Dest Ring)\n");
  1986. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1987. " Total Packets Received: %d ",
  1988. pdev->stats.rx.rcvd_reo.num);
  1989. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1990. " Bytes Sent: %d ", pdev->stats.rx.rcvd_reo.bytes);
  1991. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1992. " Replenished\n");
  1993. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1994. " Total Packets Replenished: %d ",
  1995. pdev->stats.rx.replenished.num);
  1996. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1997. " Bytes Sent: %d ", pdev->stats.rx.replenished.bytes);
  1998. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  1999. " Buffers Added To Freelist: %d ",
  2000. pdev->stats.rx.buf_freelist);
  2001. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2002. " Dropped\n");
  2003. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2004. " Total Packets With No Peer: %d ",
  2005. pdev->stats.rx.dropped.no_peer.num);
  2006. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2007. " Bytes Sent With No Peer: %d ",
  2008. pdev->stats.rx.dropped.no_peer.bytes);
  2009. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2010. " Total Packets With Msdu Not Done: %d ",
  2011. pdev->stats.rx.dropped.msdu_not_done.num);
  2012. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2013. " Bytes Sent With Msdu Not Done: %d ",
  2014. pdev->stats.rx.dropped.msdu_not_done.bytes);
  2015. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2016. " Sent To Stack\n");
  2017. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2018. " Packets Sent To Stack: %d ",
  2019. pdev->stats.rx.to_stack.num);
  2020. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2021. " Bytes Sent To Stack: %d ",
  2022. pdev->stats.rx.to_stack.bytes);
  2023. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2024. " Errors\n");
  2025. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2026. " Rxdma Ring Unititalized: %d",
  2027. pdev->stats.rx.err.rxdma_unitialized);
  2028. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2029. " Desc Alloc Failed: %d",
  2030. pdev->stats.rx.err.desc_alloc_fail);
  2031. }
  2032. /*
  2033. * dp_print_soc_tx_stats(): Print SOC level stats
  2034. * @soc DP_SOC Handle
  2035. *
  2036. * Return: void
  2037. */
  2038. void
  2039. dp_print_soc_tx_stats(struct dp_soc *soc)
  2040. {
  2041. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2042. "\n SOC Tx Stats\n");
  2043. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2044. " Tx Descriptors In Use: %d ",
  2045. soc->stats.tx.desc_in_use);
  2046. }
  2047. /*
  2048. * dp_print_soc_rx_stats: Print SOC level Rx stats
  2049. * @soc: DP_SOC Handle
  2050. *
  2051. * Return:void
  2052. */
  2053. void
  2054. dp_print_soc_rx_stats(struct dp_soc *soc)
  2055. {
  2056. uint32_t i;
  2057. char reo_error[DP_REO_ERR_LENGTH];
  2058. char rxdma_error[DP_RXDMA_ERR_LENGTH];
  2059. uint8_t index = 0;
  2060. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2061. "\n SOC Rx Stats\n");
  2062. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2063. " Errors\n");
  2064. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2065. " Invalid RBM: %d ", soc->stats.rx.err.invalid_rbm);
  2066. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2067. " Invalid Vdev: %d ", soc->stats.rx.err.invalid_vdev);
  2068. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2069. " Invalid Pdev: %d ", soc->stats.rx.err.invalid_pdev);
  2070. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2071. " HAL Ring Access Fail: %d ",
  2072. soc->stats.rx.err.hal_ring_access_fail);
  2073. for (i = 0; i < MAX_RXDMA_ERRORS; i++) {
  2074. index += qdf_snprint(&rxdma_error[index],
  2075. DP_RXDMA_ERR_LENGTH - index,
  2076. " %d,", soc->stats.rx.err.rxdma_error[i]);
  2077. }
  2078. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2079. " RXDMA Error (0-31):%s", rxdma_error);
  2080. index = 0;
  2081. for (i = 0; i <= HAL_REO_ERR_QUEUE_DESC_BLOCKED_SET; i++) {
  2082. index += qdf_snprint(&reo_error[index],
  2083. DP_REO_ERR_LENGTH - index,
  2084. " %d,", soc->stats.rx.err.reo_error[i]);
  2085. }
  2086. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2087. " REO Error(0-14):%s", reo_error);
  2088. }
  2089. /*
  2090. * dp_txrx_host_stats_clr(): Reinitialize the txrx stats
  2091. * @vdev: DP_VDEV handle
  2092. *
  2093. * Return:void
  2094. */
  2095. void
  2096. dp_txrx_host_stats_clr(struct dp_vdev *vdev)
  2097. {
  2098. DP_STATS_CLR(vdev->pdev);
  2099. DP_STATS_CLR(vdev->pdev->soc);
  2100. }
  2101. /*
  2102. * dp_print_rx_rates(): Print Rx rate stats
  2103. * @vdev: DP_VDEV handle
  2104. *
  2105. * Return:void
  2106. */
  2107. void
  2108. dp_print_rx_rates(struct dp_vdev *vdev)
  2109. {
  2110. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2111. uint8_t i;
  2112. uint8_t index = 0;
  2113. char mcs[DP_MCS_LENGTH];
  2114. char nss[DP_NSS_LENGTH];
  2115. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2116. "\n Rx Rate Info\n");
  2117. for (i = 0; i < MAX_MCS; i++) {
  2118. index += qdf_snprint(&mcs[index], DP_MCS_LENGTH - index,
  2119. " %d,", pdev->stats.rx.mcs_count[i]);
  2120. }
  2121. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2122. " MCS(0-11):%s", mcs);
  2123. index = 0;
  2124. for (i = 0; i < SS_COUNT; i++) {
  2125. index += qdf_snprint(&nss[index], DP_NSS_LENGTH - index,
  2126. " %d,", pdev->stats.rx.nss[i]);
  2127. }
  2128. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2129. " NSS(0-7):%s", nss);
  2130. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2131. "SGI: 0.8us:%d, 0.4us:%d, 1.6us:%d, 3.2us:%d,",
  2132. pdev->stats.rx.sgi_count[0],
  2133. pdev->stats.rx.sgi_count[1],
  2134. pdev->stats.rx.sgi_count[2],
  2135. pdev->stats.rx.sgi_count[3]);
  2136. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2137. "BW Counts: 20MHZ %d, 40MHZ %d, 80MHZ %d, 160MHZ %d",
  2138. pdev->stats.rx.bw[0], pdev->stats.rx.bw[1],
  2139. pdev->stats.rx.bw[2], pdev->stats.rx.bw[3]);
  2140. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2141. "Reception Type:"
  2142. " SU:%d,"
  2143. " MU_MIMO:%d,"
  2144. " MU_OFDMA:%d,"
  2145. " MU_OFDMA_MIMO:%d",
  2146. pdev->stats.rx.reception_type[0],
  2147. pdev->stats.rx.reception_type[1],
  2148. pdev->stats.rx.reception_type[2],
  2149. pdev->stats.rx.reception_type[3]);
  2150. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2151. " Aggregation\n");
  2152. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2153. " Number of Msdu's Part of Ampdu: %d ",
  2154. pdev->stats.rx.ampdu_cnt);
  2155. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2156. " Number of Msdu's With No Mpdu Level Aggregation : %d",
  2157. pdev->stats.rx.non_ampdu_cnt);
  2158. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2159. " Number of Msdu's Part of Amsdu: %d",
  2160. pdev->stats.rx.amsdu_cnt);
  2161. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2162. " Number of Msdu's With No Msdu Level Aggregation: %d",
  2163. pdev->stats.rx.non_amsdu_cnt);
  2164. }
  2165. /*
  2166. * dp_print_tx_rates(): Print tx rates
  2167. * @vdev: DP_VDEV handle
  2168. *
  2169. * Return:void
  2170. */
  2171. void
  2172. dp_print_tx_rates(struct dp_vdev *vdev)
  2173. {
  2174. struct dp_pdev *pdev = (struct dp_pdev *)vdev->pdev;
  2175. uint8_t i;
  2176. char mcs[DP_MCS_LENGTH];
  2177. uint8_t index = 0;
  2178. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2179. "\n Tx Rate Info\n");
  2180. for (i = 0; i < MAX_MCS; i++) {
  2181. index += qdf_snprint(&mcs[index], DP_MCS_LENGTH - index,
  2182. " %d ", pdev->stats.tx.comp.mcs_count[i]);
  2183. }
  2184. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2185. " MCS(0-11):%s", mcs);
  2186. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_NONE,
  2187. " MCS Invalid: %d ",
  2188. pdev->stats.tx.comp.mcs_count[MAX_MCS]);
  2189. }