dp_rx.c 85 KB

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  1. /*
  2. * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef MESH_MODE_SUPPORT
  26. #include "if_meta_hdr.h"
  27. #endif
  28. #include "dp_internal.h"
  29. #include "dp_rx_mon.h"
  30. #include "dp_ipa.h"
  31. #ifdef FEATURE_WDS
  32. #include "dp_txrx_wds.h"
  33. #endif
  34. #include "dp_hist.h"
  35. #include "dp_rx_buffer_pool.h"
  36. #ifdef ATH_RX_PRI_SAVE
  37. #define DP_RX_TID_SAVE(_nbuf, _tid) \
  38. (qdf_nbuf_set_priority(_nbuf, _tid))
  39. #else
  40. #define DP_RX_TID_SAVE(_nbuf, _tid)
  41. #endif
  42. #ifdef DP_RX_DISABLE_NDI_MDNS_FORWARDING
  43. static inline
  44. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  45. {
  46. if (ta_peer->vdev->opmode == wlan_op_mode_ndi &&
  47. qdf_nbuf_is_ipv6_mdns_pkt(nbuf)) {
  48. DP_STATS_INC(ta_peer, rx.intra_bss.mdns_no_fwd, 1);
  49. return false;
  50. }
  51. return true;
  52. }
  53. #else
  54. static inline
  55. bool dp_rx_check_ndi_mdns_fwding(struct dp_peer *ta_peer, qdf_nbuf_t nbuf)
  56. {
  57. return true;
  58. }
  59. #endif
  60. static inline bool dp_rx_check_ap_bridge(struct dp_vdev *vdev)
  61. {
  62. return vdev->ap_bridge_enabled;
  63. }
  64. #ifdef DUP_RX_DESC_WAR
  65. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  66. hal_ring_handle_t hal_ring,
  67. hal_ring_desc_t ring_desc,
  68. struct dp_rx_desc *rx_desc)
  69. {
  70. void *hal_soc = soc->hal_soc;
  71. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  72. dp_rx_desc_dump(rx_desc);
  73. }
  74. #else
  75. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  76. hal_ring_handle_t hal_ring_hdl,
  77. hal_ring_desc_t ring_desc,
  78. struct dp_rx_desc *rx_desc)
  79. {
  80. hal_soc_handle_t hal_soc = soc->hal_soc;
  81. dp_rx_desc_dump(rx_desc);
  82. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  83. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  84. qdf_assert_always(0);
  85. }
  86. #endif
  87. #ifdef RX_DESC_SANITY_WAR
  88. static inline
  89. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  90. hal_ring_handle_t hal_ring_hdl,
  91. hal_ring_desc_t ring_desc,
  92. struct dp_rx_desc *rx_desc)
  93. {
  94. uint8_t return_buffer_manager;
  95. if (qdf_unlikely(!rx_desc)) {
  96. /*
  97. * This is an unlikely case where the cookie obtained
  98. * from the ring_desc is invalid and hence we are not
  99. * able to find the corresponding rx_desc
  100. */
  101. goto fail;
  102. }
  103. return_buffer_manager = hal_rx_ret_buf_manager_get(ring_desc);
  104. if (qdf_unlikely(!(return_buffer_manager == HAL_RX_BUF_RBM_SW1_BM ||
  105. return_buffer_manager == HAL_RX_BUF_RBM_SW3_BM))) {
  106. goto fail;
  107. }
  108. return QDF_STATUS_SUCCESS;
  109. fail:
  110. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  111. dp_err("Ring Desc:");
  112. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl,
  113. ring_desc);
  114. return QDF_STATUS_E_NULL_VALUE;
  115. }
  116. #else
  117. static inline
  118. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  119. hal_ring_handle_t hal_ring_hdl,
  120. hal_ring_desc_t ring_desc,
  121. struct dp_rx_desc *rx_desc)
  122. {
  123. return QDF_STATUS_SUCCESS;
  124. }
  125. #endif
  126. /*
  127. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  128. * called during dp rx initialization
  129. * and at the end of dp_rx_process.
  130. *
  131. * @soc: core txrx main context
  132. * @mac_id: mac_id which is one of 3 mac_ids
  133. * @dp_rxdma_srng: dp rxdma circular ring
  134. * @rx_desc_pool: Pointer to free Rx descriptor pool
  135. * @num_req_buffers: number of buffer to be replenished
  136. * @desc_list: list of descs if called from dp_rx_process
  137. * or NULL during dp rx initialization or out of buffer
  138. * interrupt.
  139. * @tail: tail of descs list
  140. * @func_name: name of the caller function
  141. * Return: return success or failure
  142. */
  143. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  144. struct dp_srng *dp_rxdma_srng,
  145. struct rx_desc_pool *rx_desc_pool,
  146. uint32_t num_req_buffers,
  147. union dp_rx_desc_list_elem_t **desc_list,
  148. union dp_rx_desc_list_elem_t **tail,
  149. const char *func_name)
  150. {
  151. uint32_t num_alloc_desc;
  152. uint16_t num_desc_to_free = 0;
  153. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  154. uint32_t num_entries_avail;
  155. uint32_t count;
  156. int sync_hw_ptr = 1;
  157. qdf_dma_addr_t paddr;
  158. qdf_nbuf_t rx_netbuf;
  159. void *rxdma_ring_entry;
  160. union dp_rx_desc_list_elem_t *next;
  161. QDF_STATUS ret;
  162. uint16_t buf_size = rx_desc_pool->buf_size;
  163. void *rxdma_srng;
  164. rxdma_srng = dp_rxdma_srng->hal_srng;
  165. if (!rxdma_srng) {
  166. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  167. "rxdma srng not initialized");
  168. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  169. return QDF_STATUS_E_FAILURE;
  170. }
  171. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  172. "requested %d buffers for replenish", num_req_buffers);
  173. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  174. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  175. rxdma_srng,
  176. sync_hw_ptr);
  177. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  178. "no of available entries in rxdma ring: %d",
  179. num_entries_avail);
  180. if (!(*desc_list) && (num_entries_avail >
  181. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  182. num_req_buffers = num_entries_avail;
  183. } else if (num_entries_avail < num_req_buffers) {
  184. num_desc_to_free = num_req_buffers - num_entries_avail;
  185. num_req_buffers = num_entries_avail;
  186. }
  187. if (qdf_unlikely(!num_req_buffers)) {
  188. num_desc_to_free = num_req_buffers;
  189. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  190. goto free_descs;
  191. }
  192. /*
  193. * if desc_list is NULL, allocate the descs from freelist
  194. */
  195. if (!(*desc_list)) {
  196. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  197. rx_desc_pool,
  198. num_req_buffers,
  199. desc_list,
  200. tail);
  201. if (!num_alloc_desc) {
  202. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  203. "no free rx_descs in freelist");
  204. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  205. num_req_buffers);
  206. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  207. return QDF_STATUS_E_NOMEM;
  208. }
  209. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  210. "%d rx desc allocated", num_alloc_desc);
  211. num_req_buffers = num_alloc_desc;
  212. }
  213. count = 0;
  214. while (count < num_req_buffers) {
  215. rx_netbuf = dp_rx_buffer_pool_nbuf_alloc(dp_soc, mac_id,
  216. rx_desc_pool,
  217. num_entries_avail);
  218. if (qdf_unlikely(!rx_netbuf)) {
  219. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  220. break;
  221. }
  222. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev, rx_netbuf,
  223. QDF_DMA_FROM_DEVICE, buf_size);
  224. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  225. dp_rx_buffer_pool_nbuf_free(dp_soc, rx_netbuf, mac_id);
  226. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  227. continue;
  228. }
  229. paddr = qdf_nbuf_get_frag_paddr(rx_netbuf, 0);
  230. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc, rx_netbuf,
  231. buf_size, true);
  232. /*
  233. * check if the physical address of nbuf->data is
  234. * less then 0x50000000 then free the nbuf and try
  235. * allocating new nbuf. We can try for 100 times.
  236. * this is a temp WAR till we fix it properly.
  237. */
  238. ret = check_x86_paddr(dp_soc, &rx_netbuf, &paddr, rx_desc_pool);
  239. if (ret == QDF_STATUS_E_FAILURE) {
  240. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  241. break;
  242. }
  243. count++;
  244. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  245. rxdma_srng);
  246. qdf_assert_always(rxdma_ring_entry);
  247. next = (*desc_list)->next;
  248. dp_rx_desc_prep(&((*desc_list)->rx_desc), rx_netbuf);
  249. /* rx_desc.in_use should be zero at this time*/
  250. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  251. (*desc_list)->rx_desc.in_use = 1;
  252. (*desc_list)->rx_desc.in_err_state = 0;
  253. dp_rx_desc_update_dbg_info(&(*desc_list)->rx_desc,
  254. func_name, RX_DESC_REPLENISHED);
  255. dp_verbose_debug("rx_netbuf=%pK, buf=%pK, paddr=0x%llx, cookie=%d",
  256. rx_netbuf, qdf_nbuf_data(rx_netbuf),
  257. (unsigned long long)paddr,
  258. (*desc_list)->rx_desc.cookie);
  259. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  260. (*desc_list)->rx_desc.cookie,
  261. rx_desc_pool->owner);
  262. *desc_list = next;
  263. }
  264. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  265. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  266. count, num_desc_to_free);
  267. /* No need to count the number of bytes received during replenish.
  268. * Therefore set replenish.pkts.bytes as 0.
  269. */
  270. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  271. free_descs:
  272. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  273. /*
  274. * add any available free desc back to the free list
  275. */
  276. if (*desc_list)
  277. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  278. mac_id, rx_desc_pool);
  279. return QDF_STATUS_SUCCESS;
  280. }
  281. /*
  282. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  283. * pkts to RAW mode simulation to
  284. * decapsulate the pkt.
  285. *
  286. * @vdev: vdev on which RAW mode is enabled
  287. * @nbuf_list: list of RAW pkts to process
  288. * @peer: peer object from which the pkt is rx
  289. *
  290. * Return: void
  291. */
  292. void
  293. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  294. struct dp_peer *peer)
  295. {
  296. qdf_nbuf_t deliver_list_head = NULL;
  297. qdf_nbuf_t deliver_list_tail = NULL;
  298. qdf_nbuf_t nbuf;
  299. nbuf = nbuf_list;
  300. while (nbuf) {
  301. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  302. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  303. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  304. DP_STATS_INC_PKT(peer, rx.raw, 1, qdf_nbuf_len(nbuf));
  305. /*
  306. * reset the chfrag_start and chfrag_end bits in nbuf cb
  307. * as this is a non-amsdu pkt and RAW mode simulation expects
  308. * these bit s to be 0 for non-amsdu pkt.
  309. */
  310. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  311. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  312. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  313. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  314. }
  315. nbuf = next;
  316. }
  317. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  318. &deliver_list_tail, peer->mac_addr.raw);
  319. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  320. }
  321. #ifdef DP_LFR
  322. /*
  323. * In case of LFR, data of a new peer might be sent up
  324. * even before peer is added.
  325. */
  326. static inline struct dp_vdev *
  327. dp_get_vdev_from_peer(struct dp_soc *soc,
  328. uint16_t peer_id,
  329. struct dp_peer *peer,
  330. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  331. {
  332. struct dp_vdev *vdev;
  333. uint8_t vdev_id;
  334. if (unlikely(!peer)) {
  335. if (peer_id != HTT_INVALID_PEER) {
  336. vdev_id = DP_PEER_METADATA_VDEV_ID_GET(
  337. mpdu_desc_info.peer_meta_data);
  338. QDF_TRACE(QDF_MODULE_ID_DP,
  339. QDF_TRACE_LEVEL_DEBUG,
  340. FL("PeerID %d not found use vdevID %d"),
  341. peer_id, vdev_id);
  342. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc,
  343. vdev_id);
  344. } else {
  345. QDF_TRACE(QDF_MODULE_ID_DP,
  346. QDF_TRACE_LEVEL_DEBUG,
  347. FL("Invalid PeerID %d"),
  348. peer_id);
  349. return NULL;
  350. }
  351. } else {
  352. vdev = peer->vdev;
  353. }
  354. return vdev;
  355. }
  356. #else
  357. static inline struct dp_vdev *
  358. dp_get_vdev_from_peer(struct dp_soc *soc,
  359. uint16_t peer_id,
  360. struct dp_peer *peer,
  361. struct hal_rx_mpdu_desc_info mpdu_desc_info)
  362. {
  363. if (unlikely(!peer)) {
  364. QDF_TRACE(QDF_MODULE_ID_DP,
  365. QDF_TRACE_LEVEL_DEBUG,
  366. FL("Peer not found for peerID %d"),
  367. peer_id);
  368. return NULL;
  369. } else {
  370. return peer->vdev;
  371. }
  372. }
  373. #endif
  374. #ifndef FEATURE_WDS
  375. static void
  376. dp_rx_da_learn(struct dp_soc *soc,
  377. uint8_t *rx_tlv_hdr,
  378. struct dp_peer *ta_peer,
  379. qdf_nbuf_t nbuf)
  380. {
  381. }
  382. #endif
  383. /*
  384. * dp_rx_intrabss_fwd() - Implements the Intra-BSS forwarding logic
  385. *
  386. * @soc: core txrx main context
  387. * @ta_peer : source peer entry
  388. * @rx_tlv_hdr : start address of rx tlvs
  389. * @nbuf : nbuf that has to be intrabss forwarded
  390. *
  391. * Return: bool: true if it is forwarded else false
  392. */
  393. static bool
  394. dp_rx_intrabss_fwd(struct dp_soc *soc,
  395. struct dp_peer *ta_peer,
  396. uint8_t *rx_tlv_hdr,
  397. qdf_nbuf_t nbuf,
  398. struct hal_rx_msdu_metadata msdu_metadata)
  399. {
  400. uint16_t len;
  401. uint8_t is_frag;
  402. struct dp_peer *da_peer;
  403. struct dp_ast_entry *ast_entry;
  404. qdf_nbuf_t nbuf_copy;
  405. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  406. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  407. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  408. tid_stats.tid_rx_stats[ring_id][tid];
  409. /* check if the destination peer is available in peer table
  410. * and also check if the source peer and destination peer
  411. * belong to the same vap and destination peer is not bss peer.
  412. */
  413. if ((qdf_nbuf_is_da_valid(nbuf) && !qdf_nbuf_is_da_mcbc(nbuf))) {
  414. ast_entry = soc->ast_table[msdu_metadata.da_idx];
  415. if (!ast_entry)
  416. return false;
  417. if (ast_entry->type == CDP_TXRX_AST_TYPE_DA) {
  418. ast_entry->is_active = TRUE;
  419. return false;
  420. }
  421. da_peer = ast_entry->peer;
  422. if (!da_peer)
  423. return false;
  424. /* TA peer cannot be same as peer(DA) on which AST is present
  425. * this indicates a change in topology and that AST entries
  426. * are yet to be updated.
  427. */
  428. if (da_peer == ta_peer)
  429. return false;
  430. if (da_peer->vdev == ta_peer->vdev && !da_peer->bss_peer) {
  431. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  432. is_frag = qdf_nbuf_is_frag(nbuf);
  433. memset(nbuf->cb, 0x0, sizeof(nbuf->cb));
  434. /* If the source or destination peer in the isolation
  435. * list then dont forward instead push to bridge stack.
  436. */
  437. if (dp_get_peer_isolation(ta_peer) ||
  438. dp_get_peer_isolation(da_peer))
  439. return false;
  440. /* linearize the nbuf just before we send to
  441. * dp_tx_send()
  442. */
  443. if (qdf_unlikely(is_frag)) {
  444. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  445. return false;
  446. nbuf = qdf_nbuf_unshare(nbuf);
  447. if (!nbuf) {
  448. DP_STATS_INC_PKT(ta_peer,
  449. rx.intra_bss.fail,
  450. 1,
  451. len);
  452. /* return true even though the pkt is
  453. * not forwarded. Basically skb_unshare
  454. * failed and we want to continue with
  455. * next nbuf.
  456. */
  457. tid_stats->fail_cnt[INTRABSS_DROP]++;
  458. return true;
  459. }
  460. }
  461. if (!dp_tx_send((struct cdp_soc_t *)soc,
  462. ta_peer->vdev->vdev_id, nbuf)) {
  463. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  464. len);
  465. return true;
  466. } else {
  467. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  468. len);
  469. tid_stats->fail_cnt[INTRABSS_DROP]++;
  470. return false;
  471. }
  472. }
  473. }
  474. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  475. * source, then clone the pkt and send the cloned pkt for
  476. * intra BSS forwarding and original pkt up the network stack
  477. * Note: how do we handle multicast pkts. do we forward
  478. * all multicast pkts as is or let a higher layer module
  479. * like igmpsnoop decide whether to forward or not with
  480. * Mcast enhancement.
  481. */
  482. else if (qdf_unlikely((qdf_nbuf_is_da_mcbc(nbuf) &&
  483. !ta_peer->bss_peer))) {
  484. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf))
  485. goto end;
  486. /* If the source peer in the isolation list
  487. * then dont forward instead push to bridge stack
  488. */
  489. if (dp_get_peer_isolation(ta_peer))
  490. goto end;
  491. nbuf_copy = qdf_nbuf_copy(nbuf);
  492. if (!nbuf_copy)
  493. goto end;
  494. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  495. memset(nbuf_copy->cb, 0x0, sizeof(nbuf_copy->cb));
  496. /* Set cb->ftype to intrabss FWD */
  497. qdf_nbuf_set_tx_ftype(nbuf_copy, CB_FTYPE_INTRABSS_FWD);
  498. if (dp_tx_send((struct cdp_soc_t *)soc,
  499. ta_peer->vdev->vdev_id, nbuf_copy)) {
  500. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1, len);
  501. tid_stats->fail_cnt[INTRABSS_DROP]++;
  502. qdf_nbuf_free(nbuf_copy);
  503. } else {
  504. DP_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1, len);
  505. tid_stats->intrabss_cnt++;
  506. }
  507. }
  508. end:
  509. /* return false as we have to still send the original pkt
  510. * up the stack
  511. */
  512. return false;
  513. }
  514. #ifdef MESH_MODE_SUPPORT
  515. /**
  516. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  517. *
  518. * @vdev: DP Virtual device handle
  519. * @nbuf: Buffer pointer
  520. * @rx_tlv_hdr: start of rx tlv header
  521. * @peer: pointer to peer
  522. *
  523. * This function allocated memory for mesh receive stats and fill the
  524. * required stats. Stores the memory address in skb cb.
  525. *
  526. * Return: void
  527. */
  528. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  529. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  530. {
  531. struct mesh_recv_hdr_s *rx_info = NULL;
  532. uint32_t pkt_type;
  533. uint32_t nss;
  534. uint32_t rate_mcs;
  535. uint32_t bw;
  536. uint8_t primary_chan_num;
  537. uint32_t center_chan_freq;
  538. struct dp_soc *soc;
  539. /* fill recv mesh stats */
  540. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  541. /* upper layers are resposible to free this memory */
  542. if (!rx_info) {
  543. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  544. "Memory allocation failed for mesh rx stats");
  545. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  546. return;
  547. }
  548. rx_info->rs_flags = MESH_RXHDR_VER1;
  549. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  550. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  551. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  552. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  553. if (hal_rx_attn_msdu_get_is_decrypted(rx_tlv_hdr)) {
  554. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  555. rx_info->rs_keyix = hal_rx_msdu_get_keyid(rx_tlv_hdr);
  556. if (vdev->osif_get_key)
  557. vdev->osif_get_key(vdev->osif_vdev,
  558. &rx_info->rs_decryptkey[0],
  559. &peer->mac_addr.raw[0],
  560. rx_info->rs_keyix);
  561. }
  562. rx_info->rs_rssi = hal_rx_msdu_start_get_rssi(rx_tlv_hdr);
  563. soc = vdev->pdev->soc;
  564. primary_chan_num = hal_rx_msdu_start_get_freq(rx_tlv_hdr);
  565. center_chan_freq = hal_rx_msdu_start_get_freq(rx_tlv_hdr) >> 16;
  566. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  567. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  568. soc->ctrl_psoc,
  569. vdev->pdev->pdev_id,
  570. center_chan_freq);
  571. }
  572. rx_info->rs_channel = primary_chan_num;
  573. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  574. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  575. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  576. nss = hal_rx_msdu_start_nss_get(vdev->pdev->soc->hal_soc, rx_tlv_hdr);
  577. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  578. (bw << 24);
  579. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  580. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  581. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x"),
  582. rx_info->rs_flags,
  583. rx_info->rs_rssi,
  584. rx_info->rs_channel,
  585. rx_info->rs_ratephy1,
  586. rx_info->rs_keyix);
  587. }
  588. /**
  589. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  590. *
  591. * @vdev: DP Virtual device handle
  592. * @nbuf: Buffer pointer
  593. * @rx_tlv_hdr: start of rx tlv header
  594. *
  595. * This checks if the received packet is matching any filter out
  596. * catogery and and drop the packet if it matches.
  597. *
  598. * Return: status(0 indicates drop, 1 indicate to no drop)
  599. */
  600. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  601. uint8_t *rx_tlv_hdr)
  602. {
  603. union dp_align_mac_addr mac_addr;
  604. struct dp_soc *soc = vdev->pdev->soc;
  605. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  606. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  607. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  608. rx_tlv_hdr))
  609. return QDF_STATUS_SUCCESS;
  610. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  611. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  612. rx_tlv_hdr))
  613. return QDF_STATUS_SUCCESS;
  614. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  615. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  616. rx_tlv_hdr) &&
  617. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  618. rx_tlv_hdr))
  619. return QDF_STATUS_SUCCESS;
  620. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  621. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  622. rx_tlv_hdr,
  623. &mac_addr.raw[0]))
  624. return QDF_STATUS_E_FAILURE;
  625. if (!qdf_mem_cmp(&mac_addr.raw[0],
  626. &vdev->mac_addr.raw[0],
  627. QDF_MAC_ADDR_SIZE))
  628. return QDF_STATUS_SUCCESS;
  629. }
  630. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  631. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  632. rx_tlv_hdr,
  633. &mac_addr.raw[0]))
  634. return QDF_STATUS_E_FAILURE;
  635. if (!qdf_mem_cmp(&mac_addr.raw[0],
  636. &vdev->mac_addr.raw[0],
  637. QDF_MAC_ADDR_SIZE))
  638. return QDF_STATUS_SUCCESS;
  639. }
  640. }
  641. return QDF_STATUS_E_FAILURE;
  642. }
  643. #else
  644. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  645. uint8_t *rx_tlv_hdr, struct dp_peer *peer)
  646. {
  647. }
  648. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  649. uint8_t *rx_tlv_hdr)
  650. {
  651. return QDF_STATUS_E_FAILURE;
  652. }
  653. #endif
  654. #ifdef FEATURE_NAC_RSSI
  655. /**
  656. * dp_rx_nac_filter(): Function to perform filtering of non-associated
  657. * clients
  658. * @pdev: DP pdev handle
  659. * @rx_pkt_hdr: Rx packet Header
  660. *
  661. * return: dp_vdev*
  662. */
  663. static
  664. struct dp_vdev *dp_rx_nac_filter(struct dp_pdev *pdev,
  665. uint8_t *rx_pkt_hdr)
  666. {
  667. struct ieee80211_frame *wh;
  668. struct dp_neighbour_peer *peer = NULL;
  669. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  670. if ((wh->i_fc[1] & IEEE80211_FC1_DIR_MASK) != IEEE80211_FC1_DIR_TODS)
  671. return NULL;
  672. qdf_spin_lock_bh(&pdev->neighbour_peer_mutex);
  673. TAILQ_FOREACH(peer, &pdev->neighbour_peers_list,
  674. neighbour_peer_list_elem) {
  675. if (qdf_mem_cmp(&peer->neighbour_peers_macaddr.raw[0],
  676. wh->i_addr2, QDF_MAC_ADDR_SIZE) == 0) {
  677. QDF_TRACE(
  678. QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  679. FL("NAC configuration matched for mac-%2x:%2x:%2x:%2x:%2x:%2x"),
  680. peer->neighbour_peers_macaddr.raw[0],
  681. peer->neighbour_peers_macaddr.raw[1],
  682. peer->neighbour_peers_macaddr.raw[2],
  683. peer->neighbour_peers_macaddr.raw[3],
  684. peer->neighbour_peers_macaddr.raw[4],
  685. peer->neighbour_peers_macaddr.raw[5]);
  686. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  687. return pdev->monitor_vdev;
  688. }
  689. }
  690. qdf_spin_unlock_bh(&pdev->neighbour_peer_mutex);
  691. return NULL;
  692. }
  693. /**
  694. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  695. * @soc: DP SOC handle
  696. * @mpdu: mpdu for which peer is invalid
  697. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  698. * pool_id has same mapping)
  699. *
  700. * return: integer type
  701. */
  702. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  703. uint8_t mac_id)
  704. {
  705. struct dp_invalid_peer_msg msg;
  706. struct dp_vdev *vdev = NULL;
  707. struct dp_pdev *pdev = NULL;
  708. struct ieee80211_frame *wh;
  709. qdf_nbuf_t curr_nbuf, next_nbuf;
  710. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  711. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  712. rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  713. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  714. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  715. "Drop decapped frames");
  716. goto free;
  717. }
  718. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  719. if (!DP_FRAME_IS_DATA(wh)) {
  720. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  721. "NAWDS valid only for data frames");
  722. goto free;
  723. }
  724. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  725. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  726. "Invalid nbuf length");
  727. goto free;
  728. }
  729. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  730. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  731. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  732. "PDEV %s", !pdev ? "not found" : "down");
  733. goto free;
  734. }
  735. if (pdev->filter_neighbour_peers) {
  736. /* Next Hop scenario not yet handle */
  737. vdev = dp_rx_nac_filter(pdev, rx_pkt_hdr);
  738. if (vdev) {
  739. dp_rx_mon_deliver(soc, pdev->pdev_id,
  740. pdev->invalid_peer_head_msdu,
  741. pdev->invalid_peer_tail_msdu);
  742. pdev->invalid_peer_head_msdu = NULL;
  743. pdev->invalid_peer_tail_msdu = NULL;
  744. return 0;
  745. }
  746. }
  747. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  748. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  749. QDF_MAC_ADDR_SIZE) == 0) {
  750. goto out;
  751. }
  752. }
  753. if (!vdev) {
  754. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  755. "VDEV not found");
  756. goto free;
  757. }
  758. out:
  759. msg.wh = wh;
  760. qdf_nbuf_pull_head(mpdu, RX_PKT_TLVS_LEN);
  761. msg.nbuf = mpdu;
  762. msg.vdev_id = vdev->vdev_id;
  763. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer)
  764. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  765. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  766. pdev->pdev_id, &msg);
  767. free:
  768. /* Drop and free packet */
  769. curr_nbuf = mpdu;
  770. while (curr_nbuf) {
  771. next_nbuf = qdf_nbuf_next(curr_nbuf);
  772. qdf_nbuf_free(curr_nbuf);
  773. curr_nbuf = next_nbuf;
  774. }
  775. return 0;
  776. }
  777. /**
  778. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  779. * @soc: DP SOC handle
  780. * @mpdu: mpdu for which peer is invalid
  781. * @mpdu_done: if an mpdu is completed
  782. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  783. * pool_id has same mapping)
  784. *
  785. * return: integer type
  786. */
  787. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  788. qdf_nbuf_t mpdu, bool mpdu_done,
  789. uint8_t mac_id)
  790. {
  791. /* Only trigger the process when mpdu is completed */
  792. if (mpdu_done)
  793. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  794. }
  795. #else
  796. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  797. uint8_t mac_id)
  798. {
  799. qdf_nbuf_t curr_nbuf, next_nbuf;
  800. struct dp_pdev *pdev;
  801. struct dp_vdev *vdev = NULL;
  802. struct ieee80211_frame *wh;
  803. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  804. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(rx_tlv_hdr);
  805. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  806. if (!DP_FRAME_IS_DATA(wh)) {
  807. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  808. "only for data frames");
  809. goto free;
  810. }
  811. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  812. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  813. "Invalid nbuf length");
  814. goto free;
  815. }
  816. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  817. if (!pdev) {
  818. QDF_TRACE(QDF_MODULE_ID_DP,
  819. QDF_TRACE_LEVEL_ERROR,
  820. "PDEV not found");
  821. goto free;
  822. }
  823. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  824. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  825. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  826. QDF_MAC_ADDR_SIZE) == 0) {
  827. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  828. goto out;
  829. }
  830. }
  831. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  832. if (!vdev) {
  833. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  834. "VDEV not found");
  835. goto free;
  836. }
  837. out:
  838. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  839. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  840. free:
  841. /* reset the head and tail pointers */
  842. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  843. if (pdev) {
  844. pdev->invalid_peer_head_msdu = NULL;
  845. pdev->invalid_peer_tail_msdu = NULL;
  846. }
  847. /* Drop and free packet */
  848. curr_nbuf = mpdu;
  849. while (curr_nbuf) {
  850. next_nbuf = qdf_nbuf_next(curr_nbuf);
  851. qdf_nbuf_free(curr_nbuf);
  852. curr_nbuf = next_nbuf;
  853. }
  854. /* Reset the head and tail pointers */
  855. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  856. if (pdev) {
  857. pdev->invalid_peer_head_msdu = NULL;
  858. pdev->invalid_peer_tail_msdu = NULL;
  859. }
  860. return 0;
  861. }
  862. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  863. qdf_nbuf_t mpdu, bool mpdu_done,
  864. uint8_t mac_id)
  865. {
  866. /* Process the nbuf */
  867. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  868. }
  869. #endif
  870. #ifdef RECEIVE_OFFLOAD
  871. /**
  872. * dp_rx_print_offload_info() - Print offload info from RX TLV
  873. * @soc: dp soc handle
  874. * @rx_tlv: RX TLV for which offload information is to be printed
  875. *
  876. * Return: None
  877. */
  878. static void dp_rx_print_offload_info(struct dp_soc *soc, uint8_t *rx_tlv)
  879. {
  880. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  881. dp_verbose_debug("lro_eligible 0x%x", HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv));
  882. dp_verbose_debug("pure_ack 0x%x", HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv));
  883. dp_verbose_debug("chksum 0x%x", hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  884. rx_tlv));
  885. dp_verbose_debug("TCP seq num 0x%x", HAL_RX_TLV_GET_TCP_SEQ(rx_tlv));
  886. dp_verbose_debug("TCP ack num 0x%x", HAL_RX_TLV_GET_TCP_ACK(rx_tlv));
  887. dp_verbose_debug("TCP window 0x%x", HAL_RX_TLV_GET_TCP_WIN(rx_tlv));
  888. dp_verbose_debug("TCP protocol 0x%x", HAL_RX_TLV_GET_TCP_PROTO(rx_tlv));
  889. dp_verbose_debug("TCP offset 0x%x", HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv));
  890. dp_verbose_debug("toeplitz 0x%x", HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv));
  891. dp_verbose_debug("---------------------------------------------------------");
  892. }
  893. /**
  894. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  895. * @soc: DP SOC handle
  896. * @rx_tlv: RX TLV received for the msdu
  897. * @msdu: msdu for which GRO info needs to be filled
  898. * @rx_ol_pkt_cnt: counter to be incremented for GRO eligible packets
  899. *
  900. * Return: None
  901. */
  902. static
  903. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  904. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  905. {
  906. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  907. return;
  908. /* Filling up RX offload info only for TCP packets */
  909. if (!HAL_RX_TLV_GET_TCP_PROTO(rx_tlv))
  910. return;
  911. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  912. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) =
  913. HAL_RX_TLV_GET_LRO_ELIGIBLE(rx_tlv);
  914. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) =
  915. HAL_RX_TLV_GET_TCP_PURE_ACK(rx_tlv);
  916. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  917. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  918. rx_tlv);
  919. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) =
  920. HAL_RX_TLV_GET_TCP_SEQ(rx_tlv);
  921. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) =
  922. HAL_RX_TLV_GET_TCP_ACK(rx_tlv);
  923. QDF_NBUF_CB_RX_TCP_WIN(msdu) =
  924. HAL_RX_TLV_GET_TCP_WIN(rx_tlv);
  925. QDF_NBUF_CB_RX_TCP_PROTO(msdu) =
  926. HAL_RX_TLV_GET_TCP_PROTO(rx_tlv);
  927. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) =
  928. HAL_RX_TLV_GET_IPV6(rx_tlv);
  929. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) =
  930. HAL_RX_TLV_GET_TCP_OFFSET(rx_tlv);
  931. QDF_NBUF_CB_RX_FLOW_ID(msdu) =
  932. HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(rx_tlv);
  933. dp_rx_print_offload_info(soc, rx_tlv);
  934. }
  935. #else
  936. static void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  937. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  938. {
  939. }
  940. #endif /* RECEIVE_OFFLOAD */
  941. /**
  942. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  943. *
  944. * @nbuf: pointer to msdu.
  945. * @mpdu_len: mpdu length
  946. *
  947. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  948. */
  949. static inline bool dp_rx_adjust_nbuf_len(qdf_nbuf_t nbuf, uint16_t *mpdu_len)
  950. {
  951. bool last_nbuf;
  952. if (*mpdu_len > (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  953. qdf_nbuf_set_pktlen(nbuf, RX_DATA_BUFFER_SIZE);
  954. last_nbuf = false;
  955. } else {
  956. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + RX_PKT_TLVS_LEN));
  957. last_nbuf = true;
  958. }
  959. *mpdu_len -= (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN);
  960. return last_nbuf;
  961. }
  962. /**
  963. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  964. * multiple nbufs.
  965. * @nbuf: pointer to the first msdu of an amsdu.
  966. *
  967. * This function implements the creation of RX frag_list for cases
  968. * where an MSDU is spread across multiple nbufs.
  969. *
  970. * Return: returns the head nbuf which contains complete frag_list.
  971. */
  972. qdf_nbuf_t dp_rx_sg_create(qdf_nbuf_t nbuf)
  973. {
  974. qdf_nbuf_t parent, frag_list, next = NULL;
  975. uint16_t frag_list_len = 0;
  976. uint16_t mpdu_len;
  977. bool last_nbuf;
  978. /*
  979. * Use msdu len got from REO entry descriptor instead since
  980. * there is case the RX PKT TLV is corrupted while msdu_len
  981. * from REO descriptor is right for non-raw RX scatter msdu.
  982. */
  983. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  984. /*
  985. * this is a case where the complete msdu fits in one single nbuf.
  986. * in this case HW sets both start and end bit and we only need to
  987. * reset these bits for RAW mode simulator to decap the pkt
  988. */
  989. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  990. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  991. qdf_nbuf_set_pktlen(nbuf, mpdu_len + RX_PKT_TLVS_LEN);
  992. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  993. return nbuf;
  994. }
  995. /*
  996. * This is a case where we have multiple msdus (A-MSDU) spread across
  997. * multiple nbufs. here we create a fraglist out of these nbufs.
  998. *
  999. * the moment we encounter a nbuf with continuation bit set we
  1000. * know for sure we have an MSDU which is spread across multiple
  1001. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  1002. */
  1003. parent = nbuf;
  1004. frag_list = nbuf->next;
  1005. nbuf = nbuf->next;
  1006. /*
  1007. * set the start bit in the first nbuf we encounter with continuation
  1008. * bit set. This has the proper mpdu length set as it is the first
  1009. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  1010. * nbufs will form the frag_list of the parent nbuf.
  1011. */
  1012. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  1013. last_nbuf = dp_rx_adjust_nbuf_len(parent, &mpdu_len);
  1014. /*
  1015. * this is where we set the length of the fragments which are
  1016. * associated to the parent nbuf. We iterate through the frag_list
  1017. * till we hit the last_nbuf of the list.
  1018. */
  1019. do {
  1020. last_nbuf = dp_rx_adjust_nbuf_len(nbuf, &mpdu_len);
  1021. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  1022. frag_list_len += qdf_nbuf_len(nbuf);
  1023. if (last_nbuf) {
  1024. next = nbuf->next;
  1025. nbuf->next = NULL;
  1026. break;
  1027. }
  1028. nbuf = nbuf->next;
  1029. } while (!last_nbuf);
  1030. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  1031. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  1032. parent->next = next;
  1033. qdf_nbuf_pull_head(parent, RX_PKT_TLVS_LEN);
  1034. return parent;
  1035. }
  1036. #ifdef QCA_PEER_EXT_STATS
  1037. /*
  1038. * dp_rx_compute_tid_delay - Computer per TID delay stats
  1039. * @peer: DP soc context
  1040. * @nbuf: NBuffer
  1041. *
  1042. * Return: Void
  1043. */
  1044. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1045. qdf_nbuf_t nbuf)
  1046. {
  1047. struct cdp_delay_rx_stats *rx_delay = &stats->rx_delay;
  1048. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1049. dp_hist_update_stats(&rx_delay->to_stack_delay, to_stack);
  1050. }
  1051. #endif /* QCA_PEER_EXT_STATS */
  1052. /**
  1053. * dp_rx_compute_delay() - Compute and fill in all timestamps
  1054. * to pass in correct fields
  1055. *
  1056. * @vdev: pdev handle
  1057. * @tx_desc: tx descriptor
  1058. * @tid: tid value
  1059. * Return: none
  1060. */
  1061. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1062. {
  1063. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1064. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  1065. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1066. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1067. uint32_t interframe_delay =
  1068. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  1069. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  1070. CDP_DELAY_STATS_REAP_STACK, ring_id);
  1071. /*
  1072. * Update interframe delay stats calculated at deliver_data_ol point.
  1073. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1074. * interframe delay will not be calculate correctly for 1st frame.
  1075. * On the other side, this will help in avoiding extra per packet check
  1076. * of vdev->prev_rx_deliver_tstamp.
  1077. */
  1078. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  1079. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  1080. vdev->prev_rx_deliver_tstamp = current_ts;
  1081. }
  1082. /**
  1083. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1084. * @pdev: dp pdev reference
  1085. * @buf_list: buffer list to be dropepd
  1086. *
  1087. * Return: int (number of bufs dropped)
  1088. */
  1089. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1090. qdf_nbuf_t buf_list)
  1091. {
  1092. struct cdp_tid_rx_stats *stats = NULL;
  1093. uint8_t tid = 0, ring_id = 0;
  1094. int num_dropped = 0;
  1095. qdf_nbuf_t buf, next_buf;
  1096. buf = buf_list;
  1097. while (buf) {
  1098. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1099. next_buf = qdf_nbuf_queue_next(buf);
  1100. tid = qdf_nbuf_get_tid_val(buf);
  1101. if (qdf_likely(pdev)) {
  1102. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1103. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1104. stats->delivered_to_stack--;
  1105. }
  1106. qdf_nbuf_free(buf);
  1107. buf = next_buf;
  1108. num_dropped++;
  1109. }
  1110. return num_dropped;
  1111. }
  1112. #ifdef PEER_CACHE_RX_PKTS
  1113. /**
  1114. * dp_rx_flush_rx_cached() - flush cached rx frames
  1115. * @peer: peer
  1116. * @drop: flag to drop frames or forward to net stack
  1117. *
  1118. * Return: None
  1119. */
  1120. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1121. {
  1122. struct dp_peer_cached_bufq *bufqi;
  1123. struct dp_rx_cached_buf *cache_buf = NULL;
  1124. ol_txrx_rx_fp data_rx = NULL;
  1125. int num_buff_elem;
  1126. QDF_STATUS status;
  1127. if (qdf_atomic_inc_return(&peer->flush_in_progress) > 1) {
  1128. qdf_atomic_dec(&peer->flush_in_progress);
  1129. return;
  1130. }
  1131. qdf_spin_lock_bh(&peer->peer_info_lock);
  1132. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1133. data_rx = peer->vdev->osif_rx;
  1134. else
  1135. drop = true;
  1136. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1137. bufqi = &peer->bufq_info;
  1138. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1139. qdf_list_remove_front(&bufqi->cached_bufq,
  1140. (qdf_list_node_t **)&cache_buf);
  1141. while (cache_buf) {
  1142. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1143. cache_buf->buf);
  1144. bufqi->entries -= num_buff_elem;
  1145. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1146. if (drop) {
  1147. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1148. cache_buf->buf);
  1149. } else {
  1150. /* Flush the cached frames to OSIF DEV */
  1151. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1152. if (status != QDF_STATUS_SUCCESS)
  1153. bufqi->dropped = dp_rx_drop_nbuf_list(
  1154. peer->vdev->pdev,
  1155. cache_buf->buf);
  1156. }
  1157. qdf_mem_free(cache_buf);
  1158. cache_buf = NULL;
  1159. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1160. qdf_list_remove_front(&bufqi->cached_bufq,
  1161. (qdf_list_node_t **)&cache_buf);
  1162. }
  1163. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1164. qdf_atomic_dec(&peer->flush_in_progress);
  1165. }
  1166. /**
  1167. * dp_rx_enqueue_rx() - cache rx frames
  1168. * @peer: peer
  1169. * @rx_buf_list: cache buffer list
  1170. *
  1171. * Return: None
  1172. */
  1173. static QDF_STATUS
  1174. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1175. {
  1176. struct dp_rx_cached_buf *cache_buf;
  1177. struct dp_peer_cached_bufq *bufqi = &peer->bufq_info;
  1178. int num_buff_elem;
  1179. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1180. bufqi->dropped);
  1181. if (!peer->valid) {
  1182. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1183. rx_buf_list);
  1184. return QDF_STATUS_E_INVAL;
  1185. }
  1186. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1187. if (bufqi->entries >= bufqi->thresh) {
  1188. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1189. rx_buf_list);
  1190. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1191. return QDF_STATUS_E_RESOURCES;
  1192. }
  1193. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1194. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1195. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1196. if (!cache_buf) {
  1197. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1198. "Failed to allocate buf to cache rx frames");
  1199. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1200. rx_buf_list);
  1201. return QDF_STATUS_E_NOMEM;
  1202. }
  1203. cache_buf->buf = rx_buf_list;
  1204. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1205. qdf_list_insert_back(&bufqi->cached_bufq,
  1206. &cache_buf->node);
  1207. bufqi->entries += num_buff_elem;
  1208. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1209. return QDF_STATUS_SUCCESS;
  1210. }
  1211. static inline
  1212. bool dp_rx_is_peer_cache_bufq_supported(void)
  1213. {
  1214. return true;
  1215. }
  1216. #else
  1217. static inline
  1218. bool dp_rx_is_peer_cache_bufq_supported(void)
  1219. {
  1220. return false;
  1221. }
  1222. static inline QDF_STATUS
  1223. dp_rx_enqueue_rx(struct dp_peer *peer, qdf_nbuf_t rx_buf_list)
  1224. {
  1225. return QDF_STATUS_SUCCESS;
  1226. }
  1227. #endif
  1228. #ifndef DELIVERY_TO_STACK_STATUS_CHECK
  1229. /**
  1230. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1231. * using the appropriate call back functions.
  1232. * @soc: soc
  1233. * @vdev: vdev
  1234. * @peer: peer
  1235. * @nbuf_head: skb list head
  1236. * @nbuf_tail: skb list tail
  1237. *
  1238. * Return: None
  1239. */
  1240. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1241. struct dp_vdev *vdev,
  1242. struct dp_peer *peer,
  1243. qdf_nbuf_t nbuf_head)
  1244. {
  1245. /* Function pointer initialized only when FISA is enabled */
  1246. if (vdev->osif_fisa_rx)
  1247. /* on failure send it via regular path */
  1248. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1249. else
  1250. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1251. }
  1252. #else
  1253. /**
  1254. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1255. * using the appropriate call back functions.
  1256. * @soc: soc
  1257. * @vdev: vdev
  1258. * @peer: peer
  1259. * @nbuf_head: skb list head
  1260. * @nbuf_tail: skb list tail
  1261. *
  1262. * Check the return status of the call back function and drop
  1263. * the packets if the return status indicates a failure.
  1264. *
  1265. * Return: None
  1266. */
  1267. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1268. struct dp_vdev *vdev,
  1269. struct dp_peer *peer,
  1270. qdf_nbuf_t nbuf_head)
  1271. {
  1272. int num_nbuf = 0;
  1273. QDF_STATUS ret_val = QDF_STATUS_E_FAILURE;
  1274. /* Function pointer initialized only when FISA is enabled */
  1275. if (vdev->osif_fisa_rx)
  1276. /* on failure send it via regular path */
  1277. ret_val = vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1278. else if (vdev->osif_rx)
  1279. ret_val = vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1280. if (!QDF_IS_STATUS_SUCCESS(ret_val)) {
  1281. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1282. DP_STATS_INC(soc, rx.err.rejected, num_nbuf);
  1283. if (peer)
  1284. DP_STATS_DEC(peer, rx.to_stack.num, num_nbuf);
  1285. }
  1286. }
  1287. #endif /* ifdef DELIVERY_TO_STACK_STATUS_CHECK */
  1288. void dp_rx_deliver_to_stack(struct dp_soc *soc,
  1289. struct dp_vdev *vdev,
  1290. struct dp_peer *peer,
  1291. qdf_nbuf_t nbuf_head,
  1292. qdf_nbuf_t nbuf_tail)
  1293. {
  1294. int num_nbuf = 0;
  1295. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  1296. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  1297. /*
  1298. * This is a special case where vdev is invalid,
  1299. * so we cannot know the pdev to which this packet
  1300. * belonged. Hence we update the soc rx error stats.
  1301. */
  1302. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  1303. return;
  1304. }
  1305. /*
  1306. * highly unlikely to have a vdev without a registered rx
  1307. * callback function. if so let us free the nbuf_list.
  1308. */
  1309. if (qdf_unlikely(!vdev->osif_rx)) {
  1310. if (peer && dp_rx_is_peer_cache_bufq_supported()) {
  1311. dp_rx_enqueue_rx(peer, nbuf_head);
  1312. } else {
  1313. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  1314. nbuf_head);
  1315. DP_STATS_DEC(peer, rx.to_stack.num, num_nbuf);
  1316. }
  1317. return;
  1318. }
  1319. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1320. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1321. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1322. &nbuf_tail, peer->mac_addr.raw);
  1323. }
  1324. dp_rx_check_delivery_to_stack(soc, vdev, peer, nbuf_head);
  1325. }
  1326. /**
  1327. * dp_rx_cksum_offload() - set the nbuf checksum as defined by hardware.
  1328. * @nbuf: pointer to the first msdu of an amsdu.
  1329. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1330. *
  1331. * The ipsumed field of the skb is set based on whether HW validated the
  1332. * IP/TCP/UDP checksum.
  1333. *
  1334. * Return: void
  1335. */
  1336. static inline void dp_rx_cksum_offload(struct dp_pdev *pdev,
  1337. qdf_nbuf_t nbuf,
  1338. uint8_t *rx_tlv_hdr)
  1339. {
  1340. qdf_nbuf_rx_cksum_t cksum = {0};
  1341. bool ip_csum_err = hal_rx_attn_ip_cksum_fail_get(rx_tlv_hdr);
  1342. bool tcp_udp_csum_er = hal_rx_attn_tcp_udp_cksum_fail_get(rx_tlv_hdr);
  1343. if (qdf_likely(!ip_csum_err && !tcp_udp_csum_er)) {
  1344. cksum.l4_result = QDF_NBUF_RX_CKSUM_TCP_UDP_UNNECESSARY;
  1345. qdf_nbuf_set_rx_cksum(nbuf, &cksum);
  1346. } else {
  1347. DP_STATS_INCC(pdev, err.ip_csum_err, 1, ip_csum_err);
  1348. DP_STATS_INCC(pdev, err.tcp_udp_csum_err, 1, tcp_udp_csum_er);
  1349. }
  1350. }
  1351. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1352. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer) \
  1353. { \
  1354. qdf_nbuf_t nbuf_local; \
  1355. struct dp_peer *peer_local; \
  1356. struct dp_vdev *vdev_local = vdev_hdl; \
  1357. do { \
  1358. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  1359. break; \
  1360. nbuf_local = nbuf; \
  1361. peer_local = peer; \
  1362. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  1363. break; \
  1364. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  1365. break; \
  1366. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  1367. (nbuf_local), \
  1368. (peer_local), 0, 1); \
  1369. } while (0); \
  1370. }
  1371. #else
  1372. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, peer)
  1373. #endif
  1374. /**
  1375. * dp_rx_msdu_stats_update() - update per msdu stats.
  1376. * @soc: core txrx main context
  1377. * @nbuf: pointer to the first msdu of an amsdu.
  1378. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1379. * @peer: pointer to the peer object.
  1380. * @ring_id: reo dest ring number on which pkt is reaped.
  1381. * @tid_stats: per tid rx stats.
  1382. *
  1383. * update all the per msdu stats for that nbuf.
  1384. * Return: void
  1385. */
  1386. static void dp_rx_msdu_stats_update(struct dp_soc *soc,
  1387. qdf_nbuf_t nbuf,
  1388. uint8_t *rx_tlv_hdr,
  1389. struct dp_peer *peer,
  1390. uint8_t ring_id,
  1391. struct cdp_tid_rx_stats *tid_stats)
  1392. {
  1393. bool is_ampdu, is_not_amsdu;
  1394. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1395. struct dp_vdev *vdev = peer->vdev;
  1396. qdf_ether_header_t *eh;
  1397. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1398. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, peer);
  1399. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1400. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1401. DP_STATS_INC_PKT(peer, rx.rcvd_reo[ring_id], 1, msdu_len);
  1402. DP_STATS_INCC(peer, rx.non_amsdu_cnt, 1, is_not_amsdu);
  1403. DP_STATS_INCC(peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1404. DP_STATS_INCC(peer, rx.rx_retries, 1, qdf_nbuf_is_rx_retry_flag(nbuf));
  1405. tid_stats->msdu_cnt++;
  1406. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1407. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1408. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1409. DP_STATS_INC_PKT(peer, rx.multicast, 1, msdu_len);
  1410. tid_stats->mcast_msdu_cnt++;
  1411. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1412. DP_STATS_INC_PKT(peer, rx.bcast, 1, msdu_len);
  1413. tid_stats->bcast_msdu_cnt++;
  1414. }
  1415. }
  1416. /*
  1417. * currently we can return from here as we have similar stats
  1418. * updated at per ppdu level instead of msdu level
  1419. */
  1420. if (!soc->process_rx_status)
  1421. return;
  1422. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(rx_tlv_hdr);
  1423. DP_STATS_INCC(peer, rx.ampdu_cnt, 1, is_ampdu);
  1424. DP_STATS_INCC(peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1425. sgi = hal_rx_msdu_start_sgi_get(rx_tlv_hdr);
  1426. mcs = hal_rx_msdu_start_rate_mcs_get(rx_tlv_hdr);
  1427. tid = qdf_nbuf_get_tid_val(nbuf);
  1428. bw = hal_rx_msdu_start_bw_get(rx_tlv_hdr);
  1429. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1430. rx_tlv_hdr);
  1431. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1432. pkt_type = hal_rx_msdu_start_get_pkt_type(rx_tlv_hdr);
  1433. DP_STATS_INCC(peer, rx.rx_mpdu_cnt[mcs], 1,
  1434. ((mcs < MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1435. DP_STATS_INCC(peer, rx.rx_mpdu_cnt[MAX_MCS - 1], 1,
  1436. ((mcs >= MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1437. DP_STATS_INC(peer, rx.bw[bw], 1);
  1438. /*
  1439. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1440. * then increase index [nss - 1] in array counter.
  1441. */
  1442. if (nss > 0 && (pkt_type == DOT11_N ||
  1443. pkt_type == DOT11_AC ||
  1444. pkt_type == DOT11_AX))
  1445. DP_STATS_INC(peer, rx.nss[nss - 1], 1);
  1446. DP_STATS_INC(peer, rx.sgi_count[sgi], 1);
  1447. DP_STATS_INCC(peer, rx.err.mic_err, 1,
  1448. hal_rx_mpdu_end_mic_err_get(rx_tlv_hdr));
  1449. DP_STATS_INCC(peer, rx.err.decrypt_err, 1,
  1450. hal_rx_mpdu_end_decrypt_err_get(rx_tlv_hdr));
  1451. DP_STATS_INC(peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1452. DP_STATS_INC(peer, rx.reception_type[reception_type], 1);
  1453. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1454. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1455. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1456. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1457. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1458. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1459. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1460. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1461. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1462. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1463. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1464. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1465. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1466. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1467. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1468. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1469. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1470. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1471. DP_STATS_INCC(peer, rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1472. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1473. if ((soc->process_rx_status) &&
  1474. hal_rx_attn_first_mpdu_get(rx_tlv_hdr)) {
  1475. #if defined(FEATURE_PERPKT_INFO) && WDI_EVENT_ENABLE
  1476. if (!vdev->pdev)
  1477. return;
  1478. dp_wdi_event_handler(WDI_EVENT_UPDATE_DP_STATS, vdev->pdev->soc,
  1479. &peer->stats, peer->peer_id,
  1480. UPDATE_PEER_STATS,
  1481. vdev->pdev->pdev_id);
  1482. #endif
  1483. }
  1484. }
  1485. static inline bool is_sa_da_idx_valid(struct dp_soc *soc,
  1486. uint8_t *rx_tlv_hdr,
  1487. qdf_nbuf_t nbuf,
  1488. struct hal_rx_msdu_metadata msdu_info)
  1489. {
  1490. if ((qdf_nbuf_is_sa_valid(nbuf) &&
  1491. (msdu_info.sa_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))) ||
  1492. (!qdf_nbuf_is_da_mcbc(nbuf) &&
  1493. qdf_nbuf_is_da_valid(nbuf) &&
  1494. (msdu_info.da_idx > wlan_cfg_get_max_ast_idx(soc->wlan_cfg_ctx))))
  1495. return false;
  1496. return true;
  1497. }
  1498. #ifndef WDS_VENDOR_EXTENSION
  1499. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1500. struct dp_vdev *vdev,
  1501. struct dp_peer *peer)
  1502. {
  1503. return 1;
  1504. }
  1505. #endif
  1506. #ifdef RX_DESC_DEBUG_CHECK
  1507. /**
  1508. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1509. * corruption
  1510. *
  1511. * @ring_desc: REO ring descriptor
  1512. * @rx_desc: Rx descriptor
  1513. *
  1514. * Return: NONE
  1515. */
  1516. static inline
  1517. QDF_STATUS dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1518. struct dp_rx_desc *rx_desc)
  1519. {
  1520. struct hal_buf_info hbi;
  1521. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  1522. /* Sanity check for possible buffer paddr corruption */
  1523. if ((&hbi)->paddr ==
  1524. qdf_nbuf_get_frag_paddr(rx_desc->nbuf, 0))
  1525. return QDF_STATUS_SUCCESS;
  1526. return QDF_STATUS_E_FAILURE;
  1527. }
  1528. #else
  1529. static inline
  1530. QDF_STATUS dp_rx_desc_nbuf_sanity_check(hal_ring_desc_t ring_desc,
  1531. struct dp_rx_desc *rx_desc)
  1532. {
  1533. return QDF_STATUS_SUCCESS;
  1534. }
  1535. #endif
  1536. #ifdef WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
  1537. static inline
  1538. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1539. {
  1540. bool limit_hit = false;
  1541. struct wlan_cfg_dp_soc_ctxt *cfg = soc->wlan_cfg_ctx;
  1542. limit_hit =
  1543. (num_reaped >= cfg->rx_reap_loop_pkt_limit) ? true : false;
  1544. if (limit_hit)
  1545. DP_STATS_INC(soc, rx.reap_loop_pkt_limit_hit, 1)
  1546. return limit_hit;
  1547. }
  1548. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1549. {
  1550. return soc->wlan_cfg_ctx->rx_enable_eol_data_check;
  1551. }
  1552. #else
  1553. static inline
  1554. bool dp_rx_reap_loop_pkt_limit_hit(struct dp_soc *soc, int num_reaped)
  1555. {
  1556. return false;
  1557. }
  1558. static inline bool dp_rx_enable_eol_data_check(struct dp_soc *soc)
  1559. {
  1560. return false;
  1561. }
  1562. #endif /* WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT */
  1563. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1564. /**
  1565. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1566. * no corresbonding peer found
  1567. * @soc: core txrx main context
  1568. * @nbuf: pkt skb pointer
  1569. *
  1570. * This function will try to deliver some RX special frames to stack
  1571. * even there is no peer matched found. for instance, LFR case, some
  1572. * eapol data will be sent to host before peer_map done.
  1573. *
  1574. * Return: None
  1575. */
  1576. static
  1577. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1578. {
  1579. uint16_t peer_id;
  1580. uint8_t vdev_id;
  1581. struct dp_vdev *vdev;
  1582. uint32_t l2_hdr_offset = 0;
  1583. uint16_t msdu_len = 0;
  1584. uint32_t pkt_len = 0;
  1585. uint8_t *rx_tlv_hdr;
  1586. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  1587. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  1588. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  1589. if (peer_id > soc->max_peers)
  1590. goto deliver_fail;
  1591. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  1592. vdev = dp_get_vdev_from_soc_vdev_id_wifi3(soc, vdev_id);
  1593. if (!vdev || vdev->delete.pending || !vdev->osif_rx)
  1594. goto deliver_fail;
  1595. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  1596. goto deliver_fail;
  1597. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1598. l2_hdr_offset =
  1599. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  1600. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1601. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  1602. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  1603. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  1604. qdf_nbuf_pull_head(nbuf,
  1605. RX_PKT_TLVS_LEN +
  1606. l2_hdr_offset);
  1607. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  1608. qdf_nbuf_set_exc_frame(nbuf, 1);
  1609. if (QDF_STATUS_SUCCESS !=
  1610. vdev->osif_rx(vdev->osif_vdev, nbuf))
  1611. goto deliver_fail;
  1612. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  1613. return;
  1614. }
  1615. deliver_fail:
  1616. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1617. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1618. qdf_nbuf_free(nbuf);
  1619. }
  1620. #else
  1621. static inline
  1622. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1623. {
  1624. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  1625. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  1626. qdf_nbuf_free(nbuf);
  1627. }
  1628. #endif
  1629. /**
  1630. * dp_rx_srng_get_num_pending() - get number of pending entries
  1631. * @hal_soc: hal soc opaque pointer
  1632. * @hal_ring: opaque pointer to the HAL Rx Ring
  1633. * @num_entries: number of entries in the hal_ring.
  1634. * @near_full: pointer to a boolean. This is set if ring is near full.
  1635. *
  1636. * The function returns the number of entries in a destination ring which are
  1637. * yet to be reaped. The function also checks if the ring is near full.
  1638. * If more than half of the ring needs to be reaped, the ring is considered
  1639. * approaching full.
  1640. * The function useses hal_srng_dst_num_valid_locked to get the number of valid
  1641. * entries. It should not be called within a SRNG lock. HW pointer value is
  1642. * synced into cached_hp.
  1643. *
  1644. * Return: Number of pending entries if any
  1645. */
  1646. static
  1647. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  1648. hal_ring_handle_t hal_ring_hdl,
  1649. uint32_t num_entries,
  1650. bool *near_full)
  1651. {
  1652. uint32_t num_pending = 0;
  1653. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  1654. hal_ring_hdl,
  1655. true);
  1656. if (num_entries && (num_pending >= num_entries >> 1))
  1657. *near_full = true;
  1658. else
  1659. *near_full = false;
  1660. return num_pending;
  1661. }
  1662. #ifdef WLAN_SUPPORT_RX_FISA
  1663. void dp_rx_skip_tlvs(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1664. {
  1665. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1666. qdf_nbuf_pull_head(nbuf, l3_padding + RX_PKT_TLVS_LEN);
  1667. }
  1668. /**
  1669. * dp_rx_set_hdr_pad() - set l3 padding in nbuf cb
  1670. * @nbuf: pkt skb pointer
  1671. * @l3_padding: l3 padding
  1672. *
  1673. * Return: None
  1674. */
  1675. static inline
  1676. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1677. {
  1678. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  1679. }
  1680. #else
  1681. void dp_rx_skip_tlvs(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1682. {
  1683. qdf_nbuf_pull_head(nbuf, l3_padding + RX_PKT_TLVS_LEN);
  1684. }
  1685. static inline
  1686. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  1687. {
  1688. }
  1689. #endif
  1690. #ifdef DP_RX_DROP_RAW_FRM
  1691. /**
  1692. * dp_rx_is_raw_frame_dropped() - if raw frame nbuf, free and drop
  1693. * @nbuf: pkt skb pointer
  1694. *
  1695. * Return: true - raw frame, dropped
  1696. * false - not raw frame, do nothing
  1697. */
  1698. static inline
  1699. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1700. {
  1701. if (qdf_nbuf_is_raw_frame(nbuf)) {
  1702. qdf_nbuf_free(nbuf);
  1703. return true;
  1704. }
  1705. return false;
  1706. }
  1707. #else
  1708. static inline
  1709. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  1710. {
  1711. return false;
  1712. }
  1713. #endif
  1714. /**
  1715. * dp_rx_process() - Brain of the Rx processing functionality
  1716. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  1717. * @int_ctx: per interrupt context
  1718. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1719. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  1720. * @quota: No. of units (packets) that can be serviced in one shot.
  1721. *
  1722. * This function implements the core of Rx functionality. This is
  1723. * expected to handle only non-error frames.
  1724. *
  1725. * Return: uint32_t: No. of elements processed
  1726. */
  1727. uint32_t dp_rx_process(struct dp_intr *int_ctx, hal_ring_handle_t hal_ring_hdl,
  1728. uint8_t reo_ring_num, uint32_t quota)
  1729. {
  1730. hal_ring_desc_t ring_desc;
  1731. hal_soc_handle_t hal_soc;
  1732. struct dp_rx_desc *rx_desc = NULL;
  1733. qdf_nbuf_t nbuf, next;
  1734. bool near_full;
  1735. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT];
  1736. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT];
  1737. uint32_t num_pending;
  1738. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  1739. uint16_t msdu_len = 0;
  1740. uint16_t peer_id;
  1741. uint8_t vdev_id;
  1742. struct dp_peer *peer;
  1743. struct dp_vdev *vdev;
  1744. uint32_t pkt_len = 0;
  1745. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  1746. struct hal_rx_msdu_desc_info msdu_desc_info;
  1747. enum hal_reo_error_status error;
  1748. uint32_t peer_mdata;
  1749. uint8_t *rx_tlv_hdr;
  1750. uint32_t rx_bufs_reaped[MAX_PDEV_CNT];
  1751. uint8_t mac_id = 0;
  1752. struct dp_pdev *rx_pdev;
  1753. struct dp_srng *dp_rxdma_srng;
  1754. struct rx_desc_pool *rx_desc_pool;
  1755. struct dp_soc *soc = int_ctx->soc;
  1756. uint8_t ring_id = 0;
  1757. uint8_t core_id = 0;
  1758. struct cdp_tid_rx_stats *tid_stats;
  1759. qdf_nbuf_t nbuf_head;
  1760. qdf_nbuf_t nbuf_tail;
  1761. qdf_nbuf_t deliver_list_head;
  1762. qdf_nbuf_t deliver_list_tail;
  1763. uint32_t num_rx_bufs_reaped = 0;
  1764. uint32_t intr_id;
  1765. struct hif_opaque_softc *scn;
  1766. int32_t tid = 0;
  1767. bool is_prev_msdu_last = true;
  1768. uint32_t num_entries_avail = 0;
  1769. uint32_t rx_ol_pkt_cnt = 0;
  1770. uint32_t num_entries = 0;
  1771. struct hal_rx_msdu_metadata msdu_metadata;
  1772. QDF_STATUS status;
  1773. qdf_nbuf_t ebuf_head;
  1774. qdf_nbuf_t ebuf_tail;
  1775. DP_HIST_INIT();
  1776. qdf_assert_always(soc && hal_ring_hdl);
  1777. hal_soc = soc->hal_soc;
  1778. qdf_assert_always(hal_soc);
  1779. scn = soc->hif_handle;
  1780. hif_pm_runtime_mark_dp_rx_busy(scn);
  1781. intr_id = int_ctx->dp_intr_id;
  1782. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  1783. more_data:
  1784. /* reset local variables here to be re-used in the function */
  1785. nbuf_head = NULL;
  1786. nbuf_tail = NULL;
  1787. deliver_list_head = NULL;
  1788. deliver_list_tail = NULL;
  1789. peer = NULL;
  1790. vdev = NULL;
  1791. num_rx_bufs_reaped = 0;
  1792. ebuf_head = NULL;
  1793. ebuf_tail = NULL;
  1794. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  1795. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  1796. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  1797. qdf_mem_zero(head, sizeof(head));
  1798. qdf_mem_zero(tail, sizeof(tail));
  1799. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  1800. /*
  1801. * Need API to convert from hal_ring pointer to
  1802. * Ring Type / Ring Id combo
  1803. */
  1804. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  1805. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1806. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  1807. goto done;
  1808. }
  1809. /*
  1810. * start reaping the buffers from reo ring and queue
  1811. * them in per vdev queue.
  1812. * Process the received pkts in a different per vdev loop.
  1813. */
  1814. while (qdf_likely(quota &&
  1815. (ring_desc = hal_srng_dst_peek(hal_soc,
  1816. hal_ring_hdl)))) {
  1817. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  1818. ring_id = hal_srng_ring_id_get(hal_ring_hdl);
  1819. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  1820. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1821. FL("HAL RING 0x%pK:error %d"), hal_ring_hdl, error);
  1822. DP_STATS_INC(soc, rx.err.hal_reo_error[ring_id], 1);
  1823. /* Don't know how to deal with this -- assert */
  1824. qdf_assert(0);
  1825. }
  1826. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  1827. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  1828. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1829. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  1830. break;
  1831. }
  1832. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  1833. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  1834. ring_desc, rx_desc);
  1835. if (QDF_IS_STATUS_ERROR(status)) {
  1836. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  1837. qdf_assert_always(rx_desc->unmapped);
  1838. dp_ipa_handle_rx_buf_smmu_mapping(
  1839. soc,
  1840. rx_desc->nbuf,
  1841. RX_DATA_BUFFER_SIZE,
  1842. false);
  1843. qdf_nbuf_unmap_nbytes_single(
  1844. soc->osdev,
  1845. rx_desc->nbuf,
  1846. QDF_DMA_FROM_DEVICE,
  1847. RX_DATA_BUFFER_SIZE);
  1848. rx_desc->unmapped = 1;
  1849. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  1850. rx_desc->pool_id);
  1851. dp_rx_add_to_free_desc_list(
  1852. &head[rx_desc->pool_id],
  1853. &tail[rx_desc->pool_id],
  1854. rx_desc);
  1855. }
  1856. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1857. continue;
  1858. }
  1859. /*
  1860. * this is a unlikely scenario where the host is reaping
  1861. * a descriptor which it already reaped just a while ago
  1862. * but is yet to replenish it back to HW.
  1863. * In this case host will dump the last 128 descriptors
  1864. * including the software descriptor rx_desc and assert.
  1865. */
  1866. if (qdf_unlikely(!rx_desc->in_use)) {
  1867. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  1868. dp_info_rl("Reaping rx_desc not in use!");
  1869. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1870. ring_desc, rx_desc);
  1871. /* ignore duplicate RX desc and continue to process */
  1872. /* Pop out the descriptor */
  1873. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1874. continue;
  1875. }
  1876. status = dp_rx_desc_nbuf_sanity_check(ring_desc, rx_desc);
  1877. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  1878. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  1879. rx_desc->in_err_state = 1;
  1880. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1881. continue;
  1882. }
  1883. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  1884. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  1885. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  1886. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  1887. ring_desc, rx_desc);
  1888. }
  1889. /* Get MPDU DESC info */
  1890. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  1891. /* Get MSDU DESC info */
  1892. hal_rx_msdu_desc_info_get(ring_desc, &msdu_desc_info);
  1893. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  1894. HAL_MSDU_F_MSDU_CONTINUATION)) {
  1895. /* previous msdu has end bit set, so current one is
  1896. * the new MPDU
  1897. */
  1898. if (is_prev_msdu_last) {
  1899. /* Get number of entries available in HW ring */
  1900. num_entries_avail =
  1901. hal_srng_dst_num_valid(hal_soc,
  1902. hal_ring_hdl, 1);
  1903. /* For new MPDU check if we can read complete
  1904. * MPDU by comparing the number of buffers
  1905. * available and number of buffers needed to
  1906. * reap this MPDU
  1907. */
  1908. if (((msdu_desc_info.msdu_len /
  1909. (RX_DATA_BUFFER_SIZE - RX_PKT_TLVS_LEN) +
  1910. 1)) > num_entries_avail) {
  1911. DP_STATS_INC(
  1912. soc,
  1913. rx.msdu_scatter_wait_break,
  1914. 1);
  1915. break;
  1916. }
  1917. is_prev_msdu_last = false;
  1918. }
  1919. }
  1920. core_id = smp_processor_id();
  1921. DP_STATS_INC(soc, rx.ring_packets[core_id][ring_id], 1);
  1922. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  1923. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  1924. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  1925. HAL_MPDU_F_RAW_AMPDU))
  1926. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  1927. if (!is_prev_msdu_last &&
  1928. msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1929. is_prev_msdu_last = true;
  1930. /* Pop out the descriptor*/
  1931. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  1932. rx_bufs_reaped[rx_desc->pool_id]++;
  1933. peer_mdata = mpdu_desc_info.peer_meta_data;
  1934. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  1935. DP_PEER_METADATA_PEER_ID_GET(peer_mdata);
  1936. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  1937. DP_PEER_METADATA_VDEV_ID_GET(peer_mdata);
  1938. /*
  1939. * save msdu flags first, last and continuation msdu in
  1940. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  1941. * length to nbuf->cb. This ensures the info required for
  1942. * per pkt processing is always in the same cache line.
  1943. * This helps in improving throughput for smaller pkt
  1944. * sizes.
  1945. */
  1946. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  1947. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  1948. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  1949. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  1950. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  1951. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  1952. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  1953. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  1954. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  1955. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  1956. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  1957. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  1958. qdf_nbuf_set_tid_val(rx_desc->nbuf,
  1959. HAL_RX_REO_QUEUE_NUMBER_GET(ring_desc));
  1960. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  1961. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  1962. /*
  1963. * move unmap after scattered msdu waiting break logic
  1964. * in case double skb unmap happened.
  1965. */
  1966. rx_desc_pool = &soc->rx_desc_buf[rx_desc->pool_id];
  1967. dp_ipa_handle_rx_buf_smmu_mapping(soc, rx_desc->nbuf,
  1968. rx_desc_pool->buf_size,
  1969. false);
  1970. qdf_nbuf_unmap_nbytes_single(soc->osdev, rx_desc->nbuf,
  1971. QDF_DMA_FROM_DEVICE,
  1972. rx_desc_pool->buf_size);
  1973. rx_desc->unmapped = 1;
  1974. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  1975. ebuf_tail, rx_desc);
  1976. /*
  1977. * if continuation bit is set then we have MSDU spread
  1978. * across multiple buffers, let us not decrement quota
  1979. * till we reap all buffers of that MSDU.
  1980. */
  1981. if (qdf_likely(!qdf_nbuf_is_rx_chfrag_cont(rx_desc->nbuf)))
  1982. quota -= 1;
  1983. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  1984. &tail[rx_desc->pool_id],
  1985. rx_desc);
  1986. num_rx_bufs_reaped++;
  1987. /*
  1988. * only if complete msdu is received for scatter case,
  1989. * then allow break.
  1990. */
  1991. if (is_prev_msdu_last &&
  1992. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped))
  1993. break;
  1994. }
  1995. done:
  1996. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  1997. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  1998. /*
  1999. * continue with next mac_id if no pkts were reaped
  2000. * from that pool
  2001. */
  2002. if (!rx_bufs_reaped[mac_id])
  2003. continue;
  2004. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_id];
  2005. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  2006. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  2007. rx_desc_pool, rx_bufs_reaped[mac_id],
  2008. &head[mac_id], &tail[mac_id]);
  2009. }
  2010. dp_verbose_debug("replenished %u\n", rx_bufs_reaped[0]);
  2011. /* Peer can be NULL is case of LFR */
  2012. if (qdf_likely(peer))
  2013. vdev = NULL;
  2014. /*
  2015. * BIG loop where each nbuf is dequeued from global queue,
  2016. * processed and queued back on a per vdev basis. These nbufs
  2017. * are sent to stack as and when we run out of nbufs
  2018. * or a new nbuf dequeued from global queue has a different
  2019. * vdev when compared to previous nbuf.
  2020. */
  2021. nbuf = nbuf_head;
  2022. while (nbuf) {
  2023. next = nbuf->next;
  2024. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  2025. nbuf = next;
  2026. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  2027. continue;
  2028. }
  2029. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2030. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  2031. if (deliver_list_head && vdev && (vdev->vdev_id != vdev_id)) {
  2032. dp_rx_deliver_to_stack(soc, vdev, peer,
  2033. deliver_list_head,
  2034. deliver_list_tail);
  2035. deliver_list_head = NULL;
  2036. deliver_list_tail = NULL;
  2037. }
  2038. /* Get TID from struct cb->tid_val, save to tid */
  2039. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  2040. tid = qdf_nbuf_get_tid_val(nbuf);
  2041. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  2042. if (qdf_unlikely(!peer)) {
  2043. peer = dp_peer_find_by_id(soc, peer_id);
  2044. } else if (peer && peer->peer_id != peer_id) {
  2045. dp_peer_unref_del_find_by_id(peer);
  2046. peer = dp_peer_find_by_id(soc, peer_id);
  2047. }
  2048. if (peer) {
  2049. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  2050. qdf_dp_trace_set_track(nbuf, QDF_RX);
  2051. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  2052. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  2053. QDF_NBUF_RX_PKT_DATA_TRACK;
  2054. }
  2055. rx_bufs_used++;
  2056. if (qdf_likely(peer)) {
  2057. vdev = peer->vdev;
  2058. } else {
  2059. nbuf->next = NULL;
  2060. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2061. nbuf = next;
  2062. continue;
  2063. }
  2064. if (qdf_unlikely(!vdev)) {
  2065. qdf_nbuf_free(nbuf);
  2066. nbuf = next;
  2067. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  2068. continue;
  2069. }
  2070. rx_pdev = vdev->pdev;
  2071. DP_RX_TID_SAVE(nbuf, tid);
  2072. if (qdf_unlikely(rx_pdev->delay_stats_flag) ||
  2073. qdf_unlikely(wlan_cfg_is_peer_ext_stats_enabled(
  2074. soc->wlan_cfg_ctx)))
  2075. qdf_nbuf_set_timestamp(nbuf);
  2076. ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  2077. tid_stats =
  2078. &rx_pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  2079. /*
  2080. * Check if DMA completed -- msdu_done is the last bit
  2081. * to be written
  2082. */
  2083. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  2084. !hal_rx_attn_msdu_done_get(rx_tlv_hdr))) {
  2085. dp_err("MSDU DONE failure");
  2086. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  2087. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  2088. QDF_TRACE_LEVEL_INFO);
  2089. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  2090. qdf_nbuf_free(nbuf);
  2091. qdf_assert(0);
  2092. nbuf = next;
  2093. continue;
  2094. }
  2095. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  2096. /*
  2097. * First IF condition:
  2098. * 802.11 Fragmented pkts are reinjected to REO
  2099. * HW block as SG pkts and for these pkts we only
  2100. * need to pull the RX TLVS header length.
  2101. * Second IF condition:
  2102. * The below condition happens when an MSDU is spread
  2103. * across multiple buffers. This can happen in two cases
  2104. * 1. The nbuf size is smaller then the received msdu.
  2105. * ex: we have set the nbuf size to 2048 during
  2106. * nbuf_alloc. but we received an msdu which is
  2107. * 2304 bytes in size then this msdu is spread
  2108. * across 2 nbufs.
  2109. *
  2110. * 2. AMSDUs when RAW mode is enabled.
  2111. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  2112. * across 1st nbuf and 2nd nbuf and last MSDU is
  2113. * spread across 2nd nbuf and 3rd nbuf.
  2114. *
  2115. * for these scenarios let us create a skb frag_list and
  2116. * append these buffers till the last MSDU of the AMSDU
  2117. * Third condition:
  2118. * This is the most likely case, we receive 802.3 pkts
  2119. * decapsulated by HW, here we need to set the pkt length.
  2120. */
  2121. hal_rx_msdu_metadata_get(hal_soc, rx_tlv_hdr, &msdu_metadata);
  2122. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2123. bool is_mcbc, is_sa_vld, is_da_vld;
  2124. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  2125. rx_tlv_hdr);
  2126. is_sa_vld =
  2127. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  2128. rx_tlv_hdr);
  2129. is_da_vld =
  2130. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  2131. rx_tlv_hdr);
  2132. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  2133. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  2134. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  2135. qdf_nbuf_pull_head(nbuf, RX_PKT_TLVS_LEN);
  2136. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  2137. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2138. nbuf = dp_rx_sg_create(nbuf);
  2139. next = nbuf->next;
  2140. if (qdf_nbuf_is_raw_frame(nbuf)) {
  2141. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  2142. DP_STATS_INC_PKT(peer, rx.raw, 1, msdu_len);
  2143. } else {
  2144. qdf_nbuf_free(nbuf);
  2145. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  2146. dp_info_rl("scatter msdu len %d, dropped",
  2147. msdu_len);
  2148. nbuf = next;
  2149. continue;
  2150. }
  2151. } else {
  2152. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2153. pkt_len = msdu_len +
  2154. msdu_metadata.l3_hdr_pad +
  2155. RX_PKT_TLVS_LEN;
  2156. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  2157. dp_rx_skip_tlvs(nbuf, msdu_metadata.l3_hdr_pad);
  2158. }
  2159. /*
  2160. * process frame for mulitpass phrase processing
  2161. */
  2162. if (qdf_unlikely(vdev->multipass_en)) {
  2163. if (dp_rx_multipass_process(peer, nbuf, tid) == false) {
  2164. DP_STATS_INC(peer, rx.multipass_rx_pkt_drop, 1);
  2165. qdf_nbuf_free(nbuf);
  2166. nbuf = next;
  2167. continue;
  2168. }
  2169. }
  2170. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, peer)) {
  2171. QDF_TRACE(QDF_MODULE_ID_DP,
  2172. QDF_TRACE_LEVEL_ERROR,
  2173. FL("Policy Check Drop pkt"));
  2174. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  2175. /* Drop & free packet */
  2176. qdf_nbuf_free(nbuf);
  2177. /* Statistics */
  2178. nbuf = next;
  2179. continue;
  2180. }
  2181. if (qdf_unlikely(peer && (peer->nawds_enabled) &&
  2182. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  2183. (hal_rx_get_mpdu_mac_ad4_valid(soc->hal_soc,
  2184. rx_tlv_hdr) ==
  2185. false))) {
  2186. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  2187. DP_STATS_INC(peer, rx.nawds_mcast_drop, 1);
  2188. qdf_nbuf_free(nbuf);
  2189. nbuf = next;
  2190. continue;
  2191. }
  2192. if (soc->process_rx_status)
  2193. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  2194. /* Update the protocol tag in SKB based on CCE metadata */
  2195. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  2196. reo_ring_num, false, true);
  2197. /* Update the flow tag in SKB based on FSE metadata */
  2198. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  2199. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, peer,
  2200. ring_id, tid_stats);
  2201. if (qdf_unlikely(vdev->mesh_vdev)) {
  2202. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  2203. == QDF_STATUS_SUCCESS) {
  2204. QDF_TRACE(QDF_MODULE_ID_DP,
  2205. QDF_TRACE_LEVEL_INFO_MED,
  2206. FL("mesh pkt filtered"));
  2207. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  2208. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  2209. 1);
  2210. qdf_nbuf_free(nbuf);
  2211. nbuf = next;
  2212. continue;
  2213. }
  2214. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr, peer);
  2215. }
  2216. if (qdf_likely(vdev->rx_decap_type ==
  2217. htt_cmn_pkt_type_ethernet) &&
  2218. qdf_likely(!vdev->mesh_vdev)) {
  2219. /* WDS Destination Address Learning */
  2220. dp_rx_da_learn(soc, rx_tlv_hdr, peer, nbuf);
  2221. /* Due to HW issue, sometimes we see that the sa_idx
  2222. * and da_idx are invalid with sa_valid and da_valid
  2223. * bits set
  2224. *
  2225. * in this case we also see that value of
  2226. * sa_sw_peer_id is set as 0
  2227. *
  2228. * Drop the packet if sa_idx and da_idx OOB or
  2229. * sa_sw_peerid is 0
  2230. */
  2231. if (!is_sa_da_idx_valid(soc, rx_tlv_hdr, nbuf,
  2232. msdu_metadata)) {
  2233. qdf_nbuf_free(nbuf);
  2234. nbuf = next;
  2235. DP_STATS_INC(soc, rx.err.invalid_sa_da_idx, 1);
  2236. continue;
  2237. }
  2238. /* WDS Source Port Learning */
  2239. if (qdf_likely(vdev->wds_enabled))
  2240. dp_rx_wds_srcport_learn(soc,
  2241. rx_tlv_hdr,
  2242. peer,
  2243. nbuf,
  2244. msdu_metadata);
  2245. /* Intrabss-fwd */
  2246. if (dp_rx_check_ap_bridge(vdev))
  2247. if (dp_rx_intrabss_fwd(soc,
  2248. peer,
  2249. rx_tlv_hdr,
  2250. nbuf,
  2251. msdu_metadata)) {
  2252. nbuf = next;
  2253. tid_stats->intrabss_cnt++;
  2254. continue; /* Get next desc */
  2255. }
  2256. }
  2257. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  2258. DP_RX_LIST_APPEND(deliver_list_head,
  2259. deliver_list_tail,
  2260. nbuf);
  2261. DP_STATS_INC_PKT(peer, rx.to_stack, 1,
  2262. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2263. tid_stats->delivered_to_stack++;
  2264. nbuf = next;
  2265. }
  2266. if (qdf_likely(deliver_list_head)) {
  2267. if (qdf_likely(peer))
  2268. dp_rx_deliver_to_stack(soc, vdev, peer,
  2269. deliver_list_head,
  2270. deliver_list_tail);
  2271. else {
  2272. nbuf = deliver_list_head;
  2273. while (nbuf) {
  2274. next = nbuf->next;
  2275. nbuf->next = NULL;
  2276. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  2277. nbuf = next;
  2278. }
  2279. }
  2280. }
  2281. if (qdf_likely(peer))
  2282. dp_peer_unref_del_find_by_id(peer);
  2283. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  2284. if (quota) {
  2285. num_pending =
  2286. dp_rx_srng_get_num_pending(hal_soc,
  2287. hal_ring_hdl,
  2288. num_entries,
  2289. &near_full);
  2290. if (num_pending) {
  2291. DP_STATS_INC(soc, rx.hp_oos2, 1);
  2292. if (!hif_exec_should_yield(scn, intr_id))
  2293. goto more_data;
  2294. if (qdf_unlikely(near_full)) {
  2295. DP_STATS_INC(soc, rx.near_full, 1);
  2296. goto more_data;
  2297. }
  2298. }
  2299. }
  2300. if (vdev && vdev->osif_fisa_flush)
  2301. vdev->osif_fisa_flush(soc, reo_ring_num);
  2302. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  2303. vdev->osif_gro_flush(vdev->osif_vdev,
  2304. reo_ring_num);
  2305. }
  2306. }
  2307. /* Update histogram statistics by looping through pdev's */
  2308. DP_RX_HIST_STATS_PER_PDEV();
  2309. return rx_bufs_used; /* Assume no scale factor for now */
  2310. }
  2311. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  2312. {
  2313. QDF_STATUS ret;
  2314. if (vdev->osif_rx_flush) {
  2315. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  2316. if (!QDF_IS_STATUS_SUCCESS(ret)) {
  2317. dp_err("Failed to flush rx pkts for vdev %d\n",
  2318. vdev->vdev_id);
  2319. return ret;
  2320. }
  2321. }
  2322. return QDF_STATUS_SUCCESS;
  2323. }
  2324. static QDF_STATUS
  2325. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc, qdf_nbuf_t *nbuf,
  2326. struct dp_pdev *dp_pdev,
  2327. struct rx_desc_pool *rx_desc_pool)
  2328. {
  2329. qdf_dma_addr_t paddr;
  2330. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2331. *nbuf = qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  2332. RX_BUFFER_RESERVATION,
  2333. rx_desc_pool->buf_alignment, FALSE);
  2334. if (!(*nbuf)) {
  2335. dp_err("nbuf alloc failed");
  2336. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2337. return ret;
  2338. }
  2339. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev, *nbuf,
  2340. QDF_DMA_FROM_DEVICE,
  2341. rx_desc_pool->buf_size);
  2342. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2343. qdf_nbuf_free(*nbuf);
  2344. dp_err("nbuf map failed");
  2345. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2346. return ret;
  2347. }
  2348. paddr = qdf_nbuf_get_frag_paddr(*nbuf, 0);
  2349. ret = check_x86_paddr(dp_soc, nbuf, &paddr, rx_desc_pool);
  2350. if (ret == QDF_STATUS_E_FAILURE) {
  2351. qdf_nbuf_unmap_nbytes_single(dp_soc->osdev, *nbuf,
  2352. QDF_DMA_FROM_DEVICE,
  2353. rx_desc_pool->buf_size);
  2354. qdf_nbuf_free(*nbuf);
  2355. dp_err("nbuf check x86 failed");
  2356. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2357. return ret;
  2358. }
  2359. return QDF_STATUS_SUCCESS;
  2360. }
  2361. QDF_STATUS
  2362. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2363. struct dp_srng *dp_rxdma_srng,
  2364. struct rx_desc_pool *rx_desc_pool,
  2365. uint32_t num_req_buffers)
  2366. {
  2367. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2368. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2369. union dp_rx_desc_list_elem_t *next;
  2370. void *rxdma_ring_entry;
  2371. qdf_dma_addr_t paddr;
  2372. qdf_nbuf_t *rx_nbuf_arr;
  2373. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2374. uint32_t buffer_index, nbuf_ptrs_per_page;
  2375. qdf_nbuf_t nbuf;
  2376. QDF_STATUS ret;
  2377. int page_idx, total_pages;
  2378. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2379. union dp_rx_desc_list_elem_t *tail = NULL;
  2380. int sync_hw_ptr = 1;
  2381. uint32_t num_entries_avail;
  2382. if (qdf_unlikely(!rxdma_srng)) {
  2383. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2384. return QDF_STATUS_E_FAILURE;
  2385. }
  2386. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2387. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2388. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  2389. rxdma_srng,
  2390. sync_hw_ptr);
  2391. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2392. if (!num_entries_avail) {
  2393. dp_err("Num of available entries is zero, nothing to do");
  2394. return QDF_STATUS_E_NOMEM;
  2395. }
  2396. if (num_entries_avail < num_req_buffers)
  2397. num_req_buffers = num_entries_avail;
  2398. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2399. num_req_buffers, &desc_list, &tail);
  2400. if (!nr_descs) {
  2401. dp_err("no free rx_descs in freelist");
  2402. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2403. return QDF_STATUS_E_NOMEM;
  2404. }
  2405. dp_debug("got %u RX descs for driver attach", nr_descs);
  2406. /*
  2407. * Try to allocate pointers to the nbuf one page at a time.
  2408. * Take pointers that can fit in one page of memory and
  2409. * iterate through the total descriptors that need to be
  2410. * allocated in order of pages. Reuse the pointers that
  2411. * have been allocated to fit in one page across each
  2412. * iteration to index into the nbuf.
  2413. */
  2414. total_pages = (nr_descs * sizeof(*rx_nbuf_arr)) / PAGE_SIZE;
  2415. /*
  2416. * Add an extra page to store the remainder if any
  2417. */
  2418. if ((nr_descs * sizeof(*rx_nbuf_arr)) % PAGE_SIZE)
  2419. total_pages++;
  2420. rx_nbuf_arr = qdf_mem_malloc(PAGE_SIZE);
  2421. if (!rx_nbuf_arr) {
  2422. dp_err("failed to allocate nbuf array");
  2423. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2424. QDF_BUG(0);
  2425. return QDF_STATUS_E_NOMEM;
  2426. }
  2427. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*rx_nbuf_arr);
  2428. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2429. qdf_mem_zero(rx_nbuf_arr, PAGE_SIZE);
  2430. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2431. /*
  2432. * The last page of buffer pointers may not be required
  2433. * completely based on the number of descriptors. Below
  2434. * check will ensure we are allocating only the
  2435. * required number of descriptors.
  2436. */
  2437. if (nr_nbuf_total >= nr_descs)
  2438. break;
  2439. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2440. &rx_nbuf_arr[nr_nbuf],
  2441. dp_pdev, rx_desc_pool);
  2442. if (QDF_IS_STATUS_ERROR(ret))
  2443. break;
  2444. nr_nbuf_total++;
  2445. }
  2446. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2447. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2448. rxdma_ring_entry =
  2449. hal_srng_src_get_next(dp_soc->hal_soc,
  2450. rxdma_srng);
  2451. qdf_assert_always(rxdma_ring_entry);
  2452. next = desc_list->next;
  2453. nbuf = rx_nbuf_arr[buffer_index];
  2454. paddr = qdf_nbuf_get_frag_paddr(nbuf, 0);
  2455. dp_rx_desc_prep(&desc_list->rx_desc, nbuf);
  2456. desc_list->rx_desc.in_use = 1;
  2457. dp_rx_desc_alloc_dbg_info(&desc_list->rx_desc);
  2458. dp_rx_desc_update_dbg_info(&desc_list->rx_desc,
  2459. __func__,
  2460. RX_DESC_REPLENISHED);
  2461. hal_rxdma_buff_addr_info_set(rxdma_ring_entry, paddr,
  2462. desc_list->rx_desc.cookie,
  2463. rx_desc_pool->owner);
  2464. dp_ipa_handle_rx_buf_smmu_mapping(
  2465. dp_soc, nbuf,
  2466. rx_desc_pool->buf_size,
  2467. true);
  2468. desc_list = next;
  2469. }
  2470. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2471. }
  2472. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2473. qdf_mem_free(rx_nbuf_arr);
  2474. if (!nr_nbuf_total) {
  2475. dp_err("No nbuf's allocated");
  2476. QDF_BUG(0);
  2477. return QDF_STATUS_E_RESOURCES;
  2478. }
  2479. /* No need to count the number of bytes received during replenish.
  2480. * Therefore set replenish.pkts.bytes as 0.
  2481. */
  2482. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2483. return QDF_STATUS_SUCCESS;
  2484. }
  2485. /*
  2486. * dp_rx_pdev_desc_pool_alloc() - allocate memory for software rx descriptor
  2487. * pool
  2488. *
  2489. * @pdev: core txrx pdev context
  2490. *
  2491. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2492. * QDF_STATUS_E_NOMEM
  2493. */
  2494. QDF_STATUS
  2495. dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev)
  2496. {
  2497. struct dp_soc *soc = pdev->soc;
  2498. uint32_t rxdma_entries;
  2499. uint32_t rx_sw_desc_weight;
  2500. struct dp_srng *dp_rxdma_srng;
  2501. struct rx_desc_pool *rx_desc_pool;
  2502. uint32_t status = QDF_STATUS_SUCCESS;
  2503. int mac_for_pdev;
  2504. mac_for_pdev = pdev->lmac_id;
  2505. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2506. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2507. "nss-wifi<4> skip Rx refil %d", mac_for_pdev);
  2508. return status;
  2509. }
  2510. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2511. rxdma_entries = dp_rxdma_srng->num_entries;
  2512. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2513. rx_sw_desc_weight = wlan_cfg_get_dp_soc_rx_sw_desc_weight(soc->wlan_cfg_ctx);
  2514. status = dp_rx_desc_pool_alloc(soc,
  2515. rx_sw_desc_weight * rxdma_entries,
  2516. rx_desc_pool);
  2517. if (status != QDF_STATUS_SUCCESS)
  2518. return status;
  2519. return status;
  2520. }
  2521. /*
  2522. * dp_rx_pdev_desc_pool_free() - free software rx descriptor pool
  2523. *
  2524. * @pdev: core txrx pdev context
  2525. */
  2526. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev)
  2527. {
  2528. int mac_for_pdev = pdev->lmac_id;
  2529. struct dp_soc *soc = pdev->soc;
  2530. struct rx_desc_pool *rx_desc_pool;
  2531. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2532. dp_rx_desc_pool_free(soc, rx_desc_pool);
  2533. }
  2534. /*
  2535. * dp_rx_pdev_desc_pool_init() - initialize software rx descriptors
  2536. *
  2537. * @pdev: core txrx pdev context
  2538. *
  2539. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2540. * QDF_STATUS_E_NOMEM
  2541. */
  2542. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev)
  2543. {
  2544. int mac_for_pdev = pdev->lmac_id;
  2545. struct dp_soc *soc = pdev->soc;
  2546. uint32_t rxdma_entries;
  2547. uint32_t rx_sw_desc_weight;
  2548. struct dp_srng *dp_rxdma_srng;
  2549. struct rx_desc_pool *rx_desc_pool;
  2550. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2551. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  2552. "nss-wifi<4> skip Rx refil %d", mac_for_pdev);
  2553. return QDF_STATUS_SUCCESS;
  2554. }
  2555. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2556. if (dp_rx_desc_pool_is_allocated(rx_desc_pool) == QDF_STATUS_E_NOMEM)
  2557. return QDF_STATUS_E_NOMEM;
  2558. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2559. rxdma_entries = dp_rxdma_srng->num_entries;
  2560. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2561. rx_sw_desc_weight =
  2562. wlan_cfg_get_dp_soc_rx_sw_desc_weight(soc->wlan_cfg_ctx);
  2563. rx_desc_pool->owner = DP_WBM2SW_RBM;
  2564. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  2565. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2566. dp_rx_desc_pool_init(soc, mac_for_pdev,
  2567. rx_sw_desc_weight * rxdma_entries,
  2568. rx_desc_pool);
  2569. return QDF_STATUS_SUCCESS;
  2570. }
  2571. /*
  2572. * dp_rx_pdev_desc_pool_deinit() - de-initialize software rx descriptor pools
  2573. * @pdev: core txrx pdev context
  2574. *
  2575. * This function resets the freelist of rx descriptors and destroys locks
  2576. * associated with this list of descriptors.
  2577. */
  2578. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev)
  2579. {
  2580. int mac_for_pdev = pdev->lmac_id;
  2581. struct dp_soc *soc = pdev->soc;
  2582. struct rx_desc_pool *rx_desc_pool;
  2583. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2584. dp_rx_desc_pool_deinit(soc, rx_desc_pool);
  2585. }
  2586. /*
  2587. * dp_rx_pdev_buffers_alloc() - Allocate nbufs (skbs) and replenish RxDMA ring
  2588. *
  2589. * @pdev: core txrx pdev context
  2590. *
  2591. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2592. * QDF_STATUS_E_NOMEM
  2593. */
  2594. QDF_STATUS
  2595. dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev)
  2596. {
  2597. int mac_for_pdev = pdev->lmac_id;
  2598. struct dp_soc *soc = pdev->soc;
  2599. struct dp_srng *dp_rxdma_srng;
  2600. struct rx_desc_pool *rx_desc_pool;
  2601. uint32_t rxdma_entries;
  2602. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2603. rxdma_entries = dp_rxdma_srng->num_entries;
  2604. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2605. /* Initialize RX buffer pool which will be
  2606. * used during low memory conditions
  2607. */
  2608. dp_rx_buffer_pool_init(soc, mac_for_pdev);
  2609. return dp_pdev_rx_buffers_attach(soc, mac_for_pdev, dp_rxdma_srng,
  2610. rx_desc_pool, rxdma_entries - 1);
  2611. }
  2612. /*
  2613. * dp_rx_pdev_buffers_free - Free nbufs (skbs)
  2614. *
  2615. * @pdev: core txrx pdev context
  2616. */
  2617. void
  2618. dp_rx_pdev_buffers_free(struct dp_pdev *pdev)
  2619. {
  2620. int mac_for_pdev = pdev->lmac_id;
  2621. struct dp_soc *soc = pdev->soc;
  2622. struct rx_desc_pool *rx_desc_pool;
  2623. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2624. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  2625. dp_rx_buffer_pool_deinit(soc, mac_for_pdev);
  2626. }
  2627. /*
  2628. * dp_rx_nbuf_prepare() - prepare RX nbuf
  2629. * @soc: core txrx main context
  2630. * @pdev: core txrx pdev context
  2631. *
  2632. * This function alloc & map nbuf for RX dma usage, retry it if failed
  2633. * until retry times reaches max threshold or succeeded.
  2634. *
  2635. * Return: qdf_nbuf_t pointer if succeeded, NULL if failed.
  2636. */
  2637. qdf_nbuf_t
  2638. dp_rx_nbuf_prepare(struct dp_soc *soc, struct dp_pdev *pdev)
  2639. {
  2640. uint8_t *buf;
  2641. int32_t nbuf_retry_count;
  2642. QDF_STATUS ret;
  2643. qdf_nbuf_t nbuf = NULL;
  2644. for (nbuf_retry_count = 0; nbuf_retry_count <
  2645. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD;
  2646. nbuf_retry_count++) {
  2647. /* Allocate a new skb */
  2648. nbuf = qdf_nbuf_alloc(soc->osdev,
  2649. RX_DATA_BUFFER_SIZE,
  2650. RX_BUFFER_RESERVATION,
  2651. RX_DATA_BUFFER_ALIGNMENT,
  2652. FALSE);
  2653. if (!nbuf) {
  2654. DP_STATS_INC(pdev,
  2655. replenish.nbuf_alloc_fail, 1);
  2656. continue;
  2657. }
  2658. buf = qdf_nbuf_data(nbuf);
  2659. memset(buf, 0, RX_DATA_BUFFER_SIZE);
  2660. ret = qdf_nbuf_map_nbytes_single(soc->osdev, nbuf,
  2661. QDF_DMA_FROM_DEVICE,
  2662. RX_DATA_BUFFER_SIZE);
  2663. /* nbuf map failed */
  2664. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2665. qdf_nbuf_free(nbuf);
  2666. DP_STATS_INC(pdev, replenish.map_err, 1);
  2667. continue;
  2668. }
  2669. /* qdf_nbuf alloc and map succeeded */
  2670. break;
  2671. }
  2672. /* qdf_nbuf still alloc or map failed */
  2673. if (qdf_unlikely(nbuf_retry_count >=
  2674. QDF_NBUF_ALLOC_MAP_RETRY_THRESHOLD))
  2675. return NULL;
  2676. return nbuf;
  2677. }
  2678. #ifdef DP_RX_SPECIAL_FRAME_NEED
  2679. bool dp_rx_deliver_special_frame(struct dp_soc *soc, struct dp_peer *peer,
  2680. qdf_nbuf_t nbuf, uint32_t frame_mask,
  2681. uint8_t *rx_tlv_hdr)
  2682. {
  2683. uint32_t l2_hdr_offset = 0;
  2684. uint16_t msdu_len = 0;
  2685. uint32_t skip_len;
  2686. l2_hdr_offset =
  2687. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2688. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2689. skip_len = l2_hdr_offset;
  2690. } else {
  2691. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2692. skip_len = l2_hdr_offset + RX_PKT_TLVS_LEN;
  2693. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  2694. }
  2695. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2696. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  2697. qdf_nbuf_pull_head(nbuf, skip_len);
  2698. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2699. qdf_nbuf_set_exc_frame(nbuf, 1);
  2700. dp_rx_deliver_to_stack(soc, peer->vdev, peer,
  2701. nbuf, NULL);
  2702. return true;
  2703. }
  2704. return false;
  2705. }
  2706. #endif