d78db319d7
WLAN chip components are little-endian based. When such a chip is attached to a big-endian Host platform, there will be a mismatch in the order of bytes for the data that is transferred between the Host and target. Direct DMA framework writes 64-bit values to its DMA ring entries. These DMA ring entries are present in the shared memory between the Host and the FW and the data transfer doesn't go through any copy engine. So, to avoid invalid reads at the FW side on a big-endian platform, write ring entries in little-endian format so that the FW reads them correctly. Change-Id: I9c9189f914fdda335723c25fc05484487985447c CRs-Fixed: 2828746
This is CNSS WLAN Host Driver for products starting from iHelium