wcd937x.c 46 KB

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  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/platform_device.h>
  16. #include <linux/device.h>
  17. #include <linux/delay.h>
  18. #include <linux/kernel.h>
  19. #include <linux/component.h>
  20. #include <sound/soc.h>
  21. #include <sound/tlv.h>
  22. #include <soc/soundwire.h>
  23. #include <linux/regmap.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include "internal.h"
  27. #include "../wcdcal-hwdep.h"
  28. #include "wcd937x-registers.h"
  29. #include "../msm-cdc-pinctrl.h"
  30. #define WCD9370_VARIANT 0
  31. #define WCD9375_VARIANT 5
  32. static const DECLARE_TLV_DB_SCALE(line_gain, 0, 7, 1);
  33. static const DECLARE_TLV_DB_SCALE(analog_gain, 0, 25, 1);
  34. static int wcd937x_handle_pre_irq(void *data);
  35. static int wcd937x_handle_post_irq(void *data);
  36. static const struct regmap_irq wcd937x_irqs[WCD937X_NUM_IRQS] = {
  37. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_PRESS_DET, 0, 0x01),
  38. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_BUTTON_RELEASE_DET, 0, 0x02),
  39. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_DET, 0, 0x04),
  40. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_ELECT_INS_REM_LEG_DET, 0, 0x08),
  41. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_SW_DET, 0, 0x10),
  42. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_OCP_INT, 0, 0x20),
  43. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_CNP_INT, 0, 0x40),
  44. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_OCP_INT, 0, 0x80),
  45. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_CNP_INT, 1, 0x01),
  46. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_CNP_INT, 1, 0x02),
  47. REGMAP_IRQ_REG(WCD937X_IRQ_EAR_SCD_INT, 1, 0x04),
  48. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_CNP_INT, 1, 0x08),
  49. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_SCD_INT, 1, 0x10),
  50. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_PDM_WD_INT, 1, 0x20),
  51. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_PDM_WD_INT, 1, 0x40),
  52. REGMAP_IRQ_REG(WCD937X_IRQ_AUX_PDM_WD_INT, 1, 0x80),
  53. REGMAP_IRQ_REG(WCD937X_IRQ_LDORT_SCD_INT, 2, 0x01),
  54. REGMAP_IRQ_REG(WCD937X_IRQ_MBHC_MOISTURE_INT, 2, 0x02),
  55. REGMAP_IRQ_REG(WCD937X_IRQ_HPHL_SURGE_DET_INT, 2, 0x04),
  56. REGMAP_IRQ_REG(WCD937X_IRQ_HPHR_SURGE_DET_INT, 2, 0x08),
  57. };
  58. static struct regmap_irq_chip wcd937x_regmap_irq_chip = {
  59. .name = "wcd937x",
  60. .irqs = wcd937x_irqs,
  61. .num_irqs = ARRAY_SIZE(wcd937x_irqs),
  62. .num_regs = 3,
  63. .status_base = WCD937X_DIGITAL_INTR_STATUS_0,
  64. .mask_base = WCD937X_DIGITAL_INTR_MASK_0,
  65. .type_base = WCD937X_DIGITAL_INTR_LEVEL_0,
  66. .runtime_pm = true,
  67. .handle_post_irq = wcd937x_handle_post_irq,
  68. .handle_pre_irq = wcd937x_handle_pre_irq,
  69. };
  70. static int wcd937x_handle_pre_irq(void *data)
  71. {
  72. struct wcd937x_priv *wcd937x = data;
  73. int num_irq_regs = wcd937x->num_irq_regs;
  74. int ret = 0;
  75. u8 sts[num_irq_regs];
  76. struct wcd937x_pdata *pdata;
  77. pdata = dev_get_platdata(wcd937x->dev);
  78. memset(sts, 0, sizeof(sts));
  79. ret = regmap_bulk_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0,
  80. sts, num_irq_regs);
  81. if (ret < 0) {
  82. dev_err(wcd937x->dev, "%s: Failed to read intr status: %d\n",
  83. __func__, ret);
  84. } else if (ret == 0) {
  85. dev_dbg(wcd937x->dev,
  86. "%s: clear interrupts except OCP and SCD\n", __func__);
  87. /* Do not affect OCP and SCD interrupts */
  88. sts[0] = sts[0] & 0x5F;
  89. sts[1] = sts[1] & 0xEB;
  90. regmap_write(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_0,
  91. sts[0]);
  92. regmap_write(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_1,
  93. sts[1]);
  94. regmap_write(wcd937x->regmap, WCD937X_DIGITAL_INTR_CLEAR_2,
  95. sts[2]);
  96. }
  97. return IRQ_HANDLED;
  98. }
  99. static int wcd937x_handle_post_irq(void *data)
  100. {
  101. struct wcd937x_priv *wcd937x = data;
  102. int val = 0;
  103. struct wcd937x_pdata *pdata = NULL;
  104. pdata = dev_get_platdata(wcd937x->dev);
  105. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_0, &val);
  106. if ((val & 0xA0) != 0) {
  107. dev_dbg(wcd937x->dev, "%s Clear OCP interupts\n", __func__);
  108. regmap_update_bits(wcd937x->regmap,
  109. WCD937X_DIGITAL_INTR_CLEAR_0, 0xA0, 0x00);
  110. }
  111. regmap_read(wcd937x->regmap, WCD937X_DIGITAL_INTR_STATUS_1, &val);
  112. if ((val & 0x14) != 0) {
  113. dev_dbg(wcd937x->dev, "%s Clear SCD interupts\n", __func__);
  114. regmap_update_bits(wcd937x->regmap,
  115. WCD937X_DIGITAL_INTR_CLEAR_1, 0x14, 0x00);
  116. }
  117. return IRQ_HANDLED;
  118. }
  119. static int wcd937x_init_reg(struct snd_soc_codec *codec)
  120. {
  121. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x0E, 0x0E);
  122. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x80, 0x80);
  123. usleep_range(1000, 1010);
  124. snd_soc_update_bits(codec, WCD937X_SLEEP_CTL, 0x40, 0x40);
  125. usleep_range(1000, 1010);
  126. snd_soc_update_bits(codec, WCD937X_LDORXTX_CONFIG, 0x10, 0x00);
  127. snd_soc_update_bits(codec, WCD937X_BIAS_VBG_FINE_ADJ, 0xF0, 0x80);
  128. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x80, 0x80);
  129. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x40);
  130. usleep_range(10000, 10010);
  131. snd_soc_update_bits(codec, WCD937X_ANA_BIAS, 0x40, 0x00);
  132. return 0;
  133. }
  134. static int wcd937x_rx_clk_enable(struct snd_soc_codec *codec)
  135. {
  136. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  137. if (wcd937x->rx_clk_cnt == 0) {
  138. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  139. 0x08, 0x08);
  140. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  141. 0x01, 0x01);
  142. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x01);
  143. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_RX0_CTL,
  144. 0x40, 0x00);
  145. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  146. 0x02, 0x02);
  147. }
  148. wcd937x->rx_clk_cnt++;
  149. return 0;
  150. }
  151. static int wcd937x_rx_clk_disable(struct snd_soc_codec *codec)
  152. {
  153. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  154. wcd937x->rx_clk_cnt--;
  155. if (wcd937x->rx_clk_cnt == 0) {
  156. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x40, 0x00);
  157. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x80, 0x00);
  158. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES, 0x01, 0x00);
  159. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  160. 0x02, 0x00);
  161. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  162. 0x01, 0x00);
  163. }
  164. return 0;
  165. }
  166. /*
  167. * wcd937x_soc_get_mbhc: get wcd937x_mbhc handle of corresponding codec
  168. * @codec: handle to snd_soc_codec *
  169. *
  170. * return wcd937x_mbhc handle or error code in case of failure
  171. */
  172. struct wcd937x_mbhc *wcd937x_soc_get_mbhc(struct snd_soc_codec *codec)
  173. {
  174. struct wcd937x_priv *wcd937x;
  175. if (!codec) {
  176. pr_err("%s: Invalid params, NULL codec\n", __func__);
  177. return NULL;
  178. }
  179. wcd937x = snd_soc_codec_get_drvdata(codec);
  180. if (!wcd937x) {
  181. pr_err("%s: Invalid params, NULL tavil\n", __func__);
  182. return NULL;
  183. }
  184. return wcd937x->mbhc;
  185. }
  186. EXPORT_SYMBOL(wcd937x_soc_get_mbhc);
  187. static int wcd937x_codec_hphl_dac_event(struct snd_soc_dapm_widget *w,
  188. struct snd_kcontrol *kcontrol,
  189. int event)
  190. {
  191. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  192. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  193. w->name, event);
  194. switch (event) {
  195. case SND_SOC_DAPM_PRE_PMU:
  196. wcd937x_rx_clk_enable(codec);
  197. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  198. 0x01, 0x01);
  199. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  200. 0x04, 0x04);
  201. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  202. 0x80, 0x00);
  203. break;
  204. case SND_SOC_DAPM_POST_PMU:
  205. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L,
  206. 0x0F, 0x02);
  207. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  208. 0x02, 0x02);
  209. usleep_range(5000, 5010);
  210. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  211. 0x02, 0x00);
  212. break;
  213. }
  214. return 0;
  215. }
  216. static int wcd937x_codec_hphr_dac_event(struct snd_soc_dapm_widget *w,
  217. struct snd_kcontrol *kcontrol,
  218. int event)
  219. {
  220. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  221. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  222. w->name, event);
  223. switch (event) {
  224. case SND_SOC_DAPM_PRE_PMU:
  225. wcd937x_rx_clk_enable(codec);
  226. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  227. 0x02, 0x02);
  228. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  229. 0x08, 0x08);
  230. snd_soc_update_bits(codec, WCD937X_HPH_RDAC_CLK_CTL1,
  231. 0x80, 0x00);
  232. break;
  233. case SND_SOC_DAPM_POST_PMU:
  234. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_R,
  235. 0x0F, 0x02);
  236. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  237. 0x01, 0x01);
  238. usleep_range(5000, 5010);
  239. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  240. 0x02, 0x00);
  241. break;
  242. }
  243. return 0;
  244. }
  245. static int wcd937x_codec_ear_dac_event(struct snd_soc_dapm_widget *w,
  246. struct snd_kcontrol *kcontrol,
  247. int event)
  248. {
  249. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  250. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  251. w->name, event);
  252. switch (event) {
  253. case SND_SOC_DAPM_PRE_PMU:
  254. wcd937x_rx_clk_enable(codec);
  255. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_HPH_GAIN_CTL,
  256. 0x04, 0x04);
  257. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  258. 0x01, 0x01);
  259. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_COMP_CTL_0,
  260. 0x02, 0x02);
  261. usleep_range(5000, 5010);
  262. break;
  263. };
  264. return 0;
  265. }
  266. static int wcd937x_codec_aux_dac_event(struct snd_soc_dapm_widget *w,
  267. struct snd_kcontrol *kcontrol,
  268. int event)
  269. {
  270. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  271. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  272. w->name, event);
  273. switch (event) {
  274. case SND_SOC_DAPM_PRE_PMU:
  275. wcd937x_rx_clk_enable(codec);
  276. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  277. 0x04, 0x04);
  278. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  279. 0x04, 0x04);
  280. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_AUX_GAIN_CTL,
  281. 0x01, 0x01);
  282. break;
  283. case SND_SOC_DAPM_POST_PMD:
  284. wcd937x_rx_clk_disable(codec);
  285. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  286. 0x04, 0x00);
  287. break;
  288. };
  289. return 0;
  290. }
  291. static int wcd937x_codec_enable_hphr_pa(struct snd_soc_dapm_widget *w,
  292. struct snd_kcontrol *kcontrol,
  293. int event)
  294. {
  295. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  296. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  297. w->name, event);
  298. switch (event) {
  299. case SND_SOC_DAPM_PRE_PMU:
  300. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x10);
  301. usleep_range(100, 110);
  302. break;
  303. case SND_SOC_DAPM_POST_PMU:
  304. usleep_range(7000, 7010);
  305. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  306. 0x02, 0x02);
  307. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  308. 0x02, 0x02);
  309. break;
  310. case SND_SOC_DAPM_POST_PMD:
  311. usleep_range(7000, 7010);
  312. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x10, 0x00);
  313. break;
  314. };
  315. return 0;
  316. }
  317. static int wcd937x_codec_enable_hphl_pa(struct snd_soc_dapm_widget *w,
  318. struct snd_kcontrol *kcontrol,
  319. int event)
  320. {
  321. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  322. switch (event) {
  323. case SND_SOC_DAPM_PRE_PMU:
  324. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x0C, 0x08);
  325. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x20);
  326. usleep_range(100, 110);
  327. break;
  328. case SND_SOC_DAPM_POST_PMU:
  329. usleep_range(7000, 7010);
  330. snd_soc_update_bits(codec, WCD937X_HPH_NEW_INT_HPH_TIMER1,
  331. 0x02, 0x02);
  332. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  333. 0x02, 0x02);
  334. break;
  335. case SND_SOC_DAPM_POST_PMD:
  336. usleep_range(7000, 7010);
  337. snd_soc_update_bits(codec, WCD937X_ANA_HPH, 0x20, 0x00);
  338. break;
  339. };
  340. return 0;
  341. }
  342. static int wcd937x_codec_enable_aux_pa(struct snd_soc_dapm_widget *w,
  343. struct snd_kcontrol *kcontrol,
  344. int event)
  345. {
  346. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  347. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  348. w->name, event);
  349. switch (event) {
  350. case SND_SOC_DAPM_PRE_PMU:
  351. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  352. 0x80, 0x80);
  353. usleep_range(500, 510);
  354. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  355. usleep_range(500, 510);
  356. break;
  357. case SND_SOC_DAPM_POST_PMU:
  358. usleep_range(1000, 1010);
  359. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  360. 0x20, 0x20);
  361. break;
  362. case SND_SOC_DAPM_POST_PMD:
  363. usleep_range(1000, 1010);
  364. usleep_range(1000, 1010);
  365. break;
  366. };
  367. return 0;
  368. }
  369. static int wcd937x_codec_enable_ear_pa(struct snd_soc_dapm_widget *w,
  370. struct snd_kcontrol *kcontrol,
  371. int event)
  372. {
  373. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  374. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  375. w->name, event);
  376. switch (event) {
  377. case SND_SOC_DAPM_PRE_PMU:
  378. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  379. 0x08, 0x08);
  380. usleep_range(500, 510);
  381. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  382. usleep_range(500, 510);
  383. break;
  384. case SND_SOC_DAPM_POST_PMU:
  385. usleep_range(6000, 6010);
  386. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  387. 0x02, 0x02);
  388. break;
  389. case SND_SOC_DAPM_POST_PMD:
  390. usleep_range(7000, 7010);
  391. break;
  392. };
  393. return 0;
  394. }
  395. static int wcd937x_enable_rx1(struct snd_soc_dapm_widget *w,
  396. struct snd_kcontrol *kcontrol,
  397. int event)
  398. {
  399. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  400. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  401. w->name, event);
  402. switch (event) {
  403. case SND_SOC_DAPM_PRE_PMU:
  404. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_4,
  405. 0xF0, 0x80);
  406. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  407. 0xE0, 0xA0);
  408. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3,
  409. 0x02, 0x02);
  410. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2,
  411. 0xFF, 0x1C);
  412. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  413. 0x40, 0x40);
  414. usleep_range(100, 110);
  415. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  416. 0xE0, 0xE0);
  417. usleep_range(100, 110);
  418. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  419. 0x80, 0x80);
  420. usleep_range(500, 510);
  421. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  422. usleep_range(500, 510);
  423. break;
  424. case SND_SOC_DAPM_POST_PMD:
  425. wcd937x_rx_clk_disable(codec);
  426. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  427. 0x01, 0x00);
  428. break;
  429. };
  430. return 0;
  431. }
  432. static int wcd937x_enable_rx2(struct snd_soc_dapm_widget *w,
  433. struct snd_kcontrol *kcontrol, int event)
  434. {
  435. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  436. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  437. w->name, event);
  438. switch (event) {
  439. case SND_SOC_DAPM_PRE_PMU:
  440. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_4,
  441. 0xF0, 0x80);
  442. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  443. 0xE0, 0xA0);
  444. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3, 0x02, 0x02);
  445. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x1C);
  446. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  447. 0x40, 0x40);
  448. usleep_range(100, 110);
  449. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEGDAC_CTRL_2,
  450. 0xE0, 0xE0);
  451. usleep_range(100, 110);
  452. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  453. 0x80, 0x80);
  454. usleep_range(500, 510);
  455. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x3A);
  456. usleep_range(500, 510);
  457. break;
  458. case SND_SOC_DAPM_POST_PMD:
  459. wcd937x_rx_clk_disable(codec);
  460. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  461. 0x02, 0x00);
  462. break;
  463. };
  464. return 0;
  465. }
  466. static int wcd937x_enable_rx3(struct snd_soc_dapm_widget *w,
  467. struct snd_kcontrol *kcontrol,
  468. int event)
  469. {
  470. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  471. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  472. w->name, event);
  473. switch (event) {
  474. case SND_SOC_DAPM_PRE_PMU:
  475. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_2,
  476. 0xE0, 0xA0);
  477. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_3, 0x02, 0x02);
  478. snd_soc_update_bits(codec, WCD937X_CLASSH_MODE_2, 0xFF, 0x1C);
  479. snd_soc_update_bits(codec, WCD937X_ANA_RX_SUPPLIES,
  480. 0x40, 0x40);
  481. usleep_range(100, 110);
  482. snd_soc_update_bits(codec, WCD937X_FLYBACK_VNEG_CTRL_2,
  483. 0xE0, 0xE0);
  484. usleep_range(100, 110);
  485. break;
  486. case SND_SOC_DAPM_POST_PMD:
  487. usleep_range(6000, 6010);
  488. wcd937x_rx_clk_disable(codec);
  489. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  490. 0x04, 0x00);
  491. break;
  492. }
  493. return 0;
  494. }
  495. static int wcd937x_codec_enable_dmic(struct snd_soc_dapm_widget *w,
  496. struct snd_kcontrol *kcontrol,
  497. int event)
  498. {
  499. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  500. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  501. u16 dmic_clk_reg;
  502. s32 *dmic_clk_cnt;
  503. unsigned int dmic;
  504. char *wname;
  505. int ret = 0;
  506. wname = strpbrk(w->name, "012345");
  507. if (!wname) {
  508. dev_err(codec->dev, "%s: widget not found\n", __func__);
  509. return -EINVAL;
  510. }
  511. ret = kstrtouint(wname, 10, &dmic);
  512. if (ret < 0) {
  513. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  514. __func__);
  515. return -EINVAL;
  516. }
  517. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  518. w->name, event);
  519. switch (dmic) {
  520. case 0:
  521. case 1:
  522. dmic_clk_cnt = &(wcd937x->dmic_0_1_clk_cnt);
  523. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC0_CTL;
  524. break;
  525. case 2:
  526. case 3:
  527. dmic_clk_cnt = &(wcd937x->dmic_2_3_clk_cnt);
  528. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC1_CTL;
  529. break;
  530. case 4:
  531. case 5:
  532. dmic_clk_cnt = &(wcd937x->dmic_4_5_clk_cnt);
  533. dmic_clk_reg = WCD937X_DIGITAL_CDC_DMIC2_CTL;
  534. break;
  535. default:
  536. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  537. __func__);
  538. return -EINVAL;
  539. };
  540. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_clk_cnt %d\n",
  541. __func__, event, dmic, *dmic_clk_cnt);
  542. switch (event) {
  543. case SND_SOC_DAPM_PRE_PMU:
  544. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  545. 0x80, 0x80);
  546. snd_soc_update_bits(codec, dmic_clk_reg, 0x07, 0x02);
  547. snd_soc_update_bits(codec, dmic_clk_reg, 0x08, 0x08);
  548. snd_soc_update_bits(codec, dmic_clk_reg, 0x70, 0x20);
  549. break;
  550. case SND_SOC_DAPM_POST_PMD:
  551. break;
  552. };
  553. return 0;
  554. }
  555. /*
  556. * wcd937x_get_micb_vout_ctl_val: converts micbias from volts to register value
  557. * @micb_mv: micbias in mv
  558. *
  559. * return register value converted
  560. */
  561. int wcd937x_get_micb_vout_ctl_val(u32 micb_mv)
  562. {
  563. /* min micbias voltage is 1V and maximum is 2.85V */
  564. if (micb_mv < 1000 || micb_mv > 2850) {
  565. pr_err("%s: unsupported micbias voltage\n", __func__);
  566. return -EINVAL;
  567. }
  568. return (micb_mv - 1000) / 50;
  569. }
  570. EXPORT_SYMBOL(wcd937x_get_micb_vout_ctl_val);
  571. /*
  572. * wcd937x_mbhc_micb_adjust_voltage: adjust specific micbias voltage
  573. * @codec: handle to snd_soc_codec *
  574. * @req_volt: micbias voltage to be set
  575. * @micb_num: micbias to be set, e.g. micbias1 or micbias2
  576. *
  577. * return 0 if adjustment is success or error code in case of failure
  578. */
  579. int wcd937x_mbhc_micb_adjust_voltage(struct snd_soc_codec *codec,
  580. int req_volt, int micb_num)
  581. {
  582. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  583. int cur_vout_ctl, req_vout_ctl;
  584. int micb_reg, micb_val, micb_en;
  585. int ret = 0;
  586. switch (micb_num) {
  587. case MIC_BIAS_1:
  588. micb_reg = WCD937X_ANA_MICB1;
  589. break;
  590. case MIC_BIAS_2:
  591. micb_reg = WCD937X_ANA_MICB2;
  592. break;
  593. case MIC_BIAS_3:
  594. micb_reg = WCD937X_ANA_MICB3;
  595. break;
  596. default:
  597. return -EINVAL;
  598. }
  599. mutex_lock(&wcd937x->micb_lock);
  600. /*
  601. * If requested micbias voltage is same as current micbias
  602. * voltage, then just return. Otherwise, adjust voltage as
  603. * per requested value. If micbias is already enabled, then
  604. * to avoid slow micbias ramp-up or down enable pull-up
  605. * momentarily, change the micbias value and then re-enable
  606. * micbias.
  607. */
  608. micb_val = snd_soc_read(codec, micb_reg);
  609. micb_en = (micb_val & 0xC0) >> 6;
  610. cur_vout_ctl = micb_val & 0x3F;
  611. req_vout_ctl = wcd937x_get_micb_vout_ctl_val(req_volt);
  612. if (req_vout_ctl < 0) {
  613. ret = -EINVAL;
  614. goto exit;
  615. }
  616. if (cur_vout_ctl == req_vout_ctl) {
  617. ret = 0;
  618. goto exit;
  619. }
  620. dev_dbg(codec->dev, "%s: micb_num: %d, cur_mv: %d, req_mv: %d, micb_en: %d\n",
  621. __func__, micb_num, WCD_VOUT_CTL_TO_MICB(cur_vout_ctl),
  622. req_volt, micb_en);
  623. if (micb_en == 0x1)
  624. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  625. snd_soc_update_bits(codec, micb_reg, 0x3F, req_vout_ctl);
  626. if (micb_en == 0x1) {
  627. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  628. /*
  629. * Add 2ms delay as per HW requirement after enabling
  630. * micbias
  631. */
  632. usleep_range(2000, 2100);
  633. }
  634. exit:
  635. mutex_unlock(&wcd937x->micb_lock);
  636. return ret;
  637. }
  638. EXPORT_SYMBOL(wcd937x_mbhc_micb_adjust_voltage);
  639. static int wcd937x_codec_enable_adc(struct snd_soc_dapm_widget *w,
  640. struct snd_kcontrol *kcontrol,
  641. int event){
  642. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  643. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  644. w->name, event);
  645. switch (event) {
  646. case SND_SOC_DAPM_PRE_PMU:
  647. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  648. 0x80, 0x80);
  649. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  650. 0x08, 0x08);
  651. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  652. 0x10, 0x10);
  653. break;
  654. case SND_SOC_DAPM_POST_PMD:
  655. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  656. 0x08, 0x00);
  657. break;
  658. };
  659. return 0;
  660. }
  661. static int wcd937x_enable_req(struct snd_soc_dapm_widget *w,
  662. struct snd_kcontrol *kcontrol, int event)
  663. {
  664. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  665. dev_dbg(codec->dev, "%s wname: %s event: %d\n", __func__,
  666. w->name, event);
  667. switch (event) {
  668. case SND_SOC_DAPM_PRE_PMU:
  669. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL,
  670. 0x02, 0x02);
  671. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_REQ_CTL, 0x01,
  672. 0x00);
  673. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x40);
  674. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  675. 0x10, 0x10);
  676. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x80);
  677. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH2, 0x40, 0x00);
  678. break;
  679. case SND_SOC_DAPM_POST_PMD:
  680. snd_soc_update_bits(codec, WCD937X_ANA_TX_CH1, 0x80, 0x00);
  681. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  682. 0x10, 0x00);
  683. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_ANA_CLK_CTL,
  684. 0x10, 0x00);
  685. snd_soc_update_bits(codec, WCD937X_DIGITAL_CDC_DIG_CLK_CTL,
  686. 0x80, 0x00);
  687. break;
  688. };
  689. return 0;
  690. }
  691. int wcd937x_micbias_control(struct snd_soc_codec *codec,
  692. int micb_num, int req, bool is_dapm)
  693. {
  694. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  695. int micb_index = micb_num - 1;
  696. u16 micb_reg;
  697. int pre_off_event = 0, post_off_event = 0;
  698. int post_on_event = 0, post_dapm_off = 0;
  699. int post_dapm_on = 0;
  700. if ((micb_index < 0) || (micb_index > WCD937X_MAX_MICBIAS - 1)) {
  701. dev_err(codec->dev, "%s: Invalid micbias index, micb_ind:%d\n",
  702. __func__, micb_index);
  703. return -EINVAL;
  704. }
  705. switch (micb_num) {
  706. case MIC_BIAS_1:
  707. micb_reg = WCD937X_ANA_MICB1;
  708. break;
  709. case MIC_BIAS_2:
  710. micb_reg = WCD937X_ANA_MICB2;
  711. pre_off_event = WCD_EVENT_PRE_MICBIAS_2_OFF;
  712. post_off_event = WCD_EVENT_POST_MICBIAS_2_OFF;
  713. post_on_event = WCD_EVENT_POST_MICBIAS_2_ON;
  714. post_dapm_on = WCD_EVENT_POST_DAPM_MICBIAS_2_ON;
  715. post_dapm_off = WCD_EVENT_POST_DAPM_MICBIAS_2_OFF;
  716. break;
  717. case MIC_BIAS_3:
  718. micb_reg = WCD937X_ANA_MICB3;
  719. break;
  720. default:
  721. dev_err(codec->dev, "%s: Invalid micbias number: %d\n",
  722. __func__, micb_num);
  723. return -EINVAL;
  724. };
  725. mutex_lock(&wcd937x->micb_lock);
  726. switch (req) {
  727. case MICB_PULLUP_ENABLE:
  728. wcd937x->pullup_ref[micb_index]++;
  729. if ((wcd937x->pullup_ref[micb_index] == 1) &&
  730. (wcd937x->micb_ref[micb_index] == 0))
  731. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  732. break;
  733. case MICB_PULLUP_DISABLE:
  734. if (wcd937x->pullup_ref[micb_index] > 0)
  735. wcd937x->pullup_ref[micb_index]--;
  736. if ((wcd937x->pullup_ref[micb_index] == 0) &&
  737. (wcd937x->micb_ref[micb_index] == 0))
  738. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  739. break;
  740. case MICB_ENABLE:
  741. wcd937x->micb_ref[micb_index]++;
  742. if (wcd937x->micb_ref[micb_index] == 1) {
  743. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x40);
  744. if (post_on_event)
  745. blocking_notifier_call_chain(&wcd937x->notifier,
  746. post_on_event,
  747. &wcd937x->mbhc);
  748. }
  749. if (is_dapm && post_dapm_on)
  750. blocking_notifier_call_chain(&wcd937x->notifier,
  751. post_dapm_on,
  752. &wcd937x->mbhc);
  753. break;
  754. case MICB_DISABLE:
  755. if (wcd937x->micb_ref[micb_index] > 0)
  756. wcd937x->micb_ref[micb_index]--;
  757. if ((wcd937x->micb_ref[micb_index] == 0) &&
  758. (wcd937x->pullup_ref[micb_index] > 0))
  759. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x80);
  760. else if ((wcd937x->micb_ref[micb_index] == 0) &&
  761. (wcd937x->pullup_ref[micb_index] == 0)) {
  762. if (pre_off_event)
  763. blocking_notifier_call_chain(&wcd937x->notifier,
  764. pre_off_event,
  765. &wcd937x->mbhc);
  766. snd_soc_update_bits(codec, micb_reg, 0xC0, 0x00);
  767. if (post_off_event)
  768. blocking_notifier_call_chain(&wcd937x->notifier,
  769. post_off_event,
  770. &wcd937x->mbhc);
  771. }
  772. if (is_dapm && post_dapm_off)
  773. blocking_notifier_call_chain(&wcd937x->notifier,
  774. post_dapm_off,
  775. &wcd937x->mbhc);
  776. break;
  777. };
  778. dev_dbg(codec->dev, "%s: micb_num:%d, micb_ref: %d, pullup_ref: %d\n",
  779. __func__, micb_num, wcd937x->micb_ref[micb_index],
  780. wcd937x->pullup_ref[micb_index]);
  781. mutex_unlock(&wcd937x->micb_lock);
  782. return 0;
  783. }
  784. EXPORT_SYMBOL(wcd937x_micbias_control);
  785. static int __wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  786. int event)
  787. {
  788. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  789. int micb_num;
  790. dev_dbg(codec->dev, "%s: wname: %s, event: %d\n",
  791. __func__, w->name, event);
  792. if (strnstr(w->name, "MIC BIAS1", sizeof("MIC BIAS1")))
  793. micb_num = MIC_BIAS_1;
  794. else if (strnstr(w->name, "MIC BIAS2", sizeof("MIC BIAS2")))
  795. micb_num = MIC_BIAS_2;
  796. else if (strnstr(w->name, "MIC BIAS3", sizeof("MIC BIAS3")))
  797. micb_num = MIC_BIAS_3;
  798. else
  799. return -EINVAL;
  800. switch (event) {
  801. case SND_SOC_DAPM_PRE_PMU:
  802. wcd937x_micbias_control(codec, micb_num, MICB_ENABLE, true);
  803. break;
  804. case SND_SOC_DAPM_POST_PMU:
  805. usleep_range(1000, 1100);
  806. break;
  807. case SND_SOC_DAPM_POST_PMD:
  808. wcd937x_micbias_control(codec, micb_num, MICB_DISABLE, true);
  809. break;
  810. };
  811. return 0;
  812. }
  813. static int wcd937x_codec_enable_micbias(struct snd_soc_dapm_widget *w,
  814. struct snd_kcontrol *kcontrol,
  815. int event)
  816. {
  817. return __wcd937x_codec_enable_micbias(w, event);
  818. }
  819. static int wcd937x_rx_hph_mode_get(struct snd_kcontrol *kcontrol,
  820. struct snd_ctl_elem_value *ucontrol)
  821. {
  822. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  823. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  824. ucontrol->value.integer.value[0] = wcd937x->hph_mode;
  825. return 0;
  826. }
  827. static int wcd937x_rx_hph_mode_put(struct snd_kcontrol *kcontrol,
  828. struct snd_ctl_elem_value *ucontrol)
  829. {
  830. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  831. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  832. u32 mode_val;
  833. mode_val = ucontrol->value.enumerated.item[0];
  834. dev_dbg(codec->dev, "%s: mode: %d\n", __func__, mode_val);
  835. if (mode_val == 0) {
  836. dev_warn(codec->dev, "%s:Invalid HPH Mode, default to class_AB\n",
  837. __func__);
  838. mode_val = 3; /* enum will be updated later */
  839. }
  840. wcd937x->hph_mode = mode_val;
  841. return 0;
  842. }
  843. static const char * const rx_hph_mode_mux_text[] = {
  844. "CLS_H_INVALID", "CLS_H_HIFI", "CLS_H_LP", "CLS_AB", "CLS_H_LOHIFI",
  845. "CLS_H_ULP", "CLS_AB_HIFI",
  846. };
  847. static const struct soc_enum rx_hph_mode_mux_enum =
  848. SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(rx_hph_mode_mux_text),
  849. rx_hph_mode_mux_text);
  850. static const struct snd_kcontrol_new wcd937x_snd_controls[] = {
  851. SOC_ENUM_EXT("RX HPH Mode", rx_hph_mode_mux_enum,
  852. wcd937x_rx_hph_mode_get, wcd937x_rx_hph_mode_put),
  853. SOC_SINGLE_TLV("HPHL Volume", WCD937X_HPH_L_EN, 0, 20, 1, line_gain),
  854. SOC_SINGLE_TLV("HPHR Volume", WCD937X_HPH_R_EN, 0, 20, 1, line_gain),
  855. SOC_SINGLE_TLV("ADC1 Volume", WCD937X_ANA_TX_CH1, 0, 20, 0, analog_gain),
  856. SOC_SINGLE_TLV("ADC2 Volume", WCD937X_ANA_TX_CH2, 0, 20, 0, analog_gain),
  857. SOC_SINGLE_TLV("ADC3 Volume", WCD937X_ANA_TX_CH3, 0, 20, 0, analog_gain),
  858. };
  859. static const struct snd_kcontrol_new adc1_switch[] = {
  860. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  861. };
  862. static const struct snd_kcontrol_new adc2_switch[] = {
  863. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  864. };
  865. static const struct snd_kcontrol_new adc3_switch[] = {
  866. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  867. };
  868. static const struct snd_kcontrol_new dmic1_switch[] = {
  869. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  870. };
  871. static const struct snd_kcontrol_new dmic2_switch[] = {
  872. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  873. };
  874. static const struct snd_kcontrol_new dmic3_switch[] = {
  875. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  876. };
  877. static const struct snd_kcontrol_new dmic4_switch[] = {
  878. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  879. };
  880. static const struct snd_kcontrol_new dmic5_switch[] = {
  881. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  882. };
  883. static const struct snd_kcontrol_new dmic6_switch[] = {
  884. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  885. };
  886. static const struct snd_kcontrol_new ear_rdac_switch[] = {
  887. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  888. };
  889. static const struct snd_kcontrol_new aux_rdac_switch[] = {
  890. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  891. };
  892. static const struct snd_kcontrol_new hphl_rdac_switch[] = {
  893. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  894. };
  895. static const struct snd_kcontrol_new hphr_rdac_switch[] = {
  896. SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0)
  897. };
  898. static const char * const adc2_mux_text[] = {
  899. "INP2", "INP3"
  900. };
  901. static const char * const rdac3_mux_text[] = {
  902. "RX1", "RX3"
  903. };
  904. static const struct soc_enum adc2_enum =
  905. SOC_ENUM_SINGLE(WCD937X_TX_NEW_TX_CH2_SEL, 7,
  906. ARRAY_SIZE(adc2_mux_text), adc2_mux_text);
  907. static const struct soc_enum rdac3_enum =
  908. SOC_ENUM_SINGLE(WCD937X_DIGITAL_CDC_EAR_PATH_CTL, 0,
  909. ARRAY_SIZE(rdac3_mux_text), rdac3_mux_text);
  910. static const struct snd_kcontrol_new tx_adc2_mux =
  911. SOC_DAPM_ENUM("ADC2 MUX Mux", adc2_enum);
  912. static const struct snd_kcontrol_new rx_rdac3_mux =
  913. SOC_DAPM_ENUM("RDAC3_MUX Mux", rdac3_enum);
  914. static const struct snd_soc_dapm_widget wcd937x_dapm_widgets[] = {
  915. /*input widgets*/
  916. SND_SOC_DAPM_INPUT("AMIC1"),
  917. SND_SOC_DAPM_INPUT("AMIC2"),
  918. SND_SOC_DAPM_INPUT("AMIC3"),
  919. SND_SOC_DAPM_INPUT("IN1_HPHL"),
  920. SND_SOC_DAPM_INPUT("IN2_HPHR"),
  921. SND_SOC_DAPM_INPUT("IN3_AUX"),
  922. /*tx widgets*/
  923. SND_SOC_DAPM_ADC_E("ADC1", NULL, SND_SOC_NOPM, 0, 0,
  924. wcd937x_codec_enable_adc,
  925. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  926. SND_SOC_DAPM_ADC_E("ADC2", NULL, SND_SOC_NOPM, 0, 0,
  927. wcd937x_codec_enable_adc,
  928. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  929. SND_SOC_DAPM_MIXER_E("ADC1 REQ", SND_SOC_NOPM, 0, 0,
  930. NULL, 0, wcd937x_enable_req,
  931. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  932. SND_SOC_DAPM_MIXER_E("ADC2 REQ", SND_SOC_NOPM, 0, 0,
  933. NULL, 0, wcd937x_enable_req,
  934. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  935. SND_SOC_DAPM_MUX("ADC2 MUX", SND_SOC_NOPM, 0, 0,
  936. &tx_adc2_mux),
  937. /*tx mixers*/
  938. SND_SOC_DAPM_MIXER("ADC1_MIXER", SND_SOC_NOPM, 0,
  939. 0, adc1_switch, ARRAY_SIZE(adc1_switch)),
  940. SND_SOC_DAPM_MIXER("ADC2_MIXER", SND_SOC_NOPM, 0,
  941. 0, adc2_switch, ARRAY_SIZE(adc2_switch)),
  942. /* micbias widgets*/
  943. SND_SOC_DAPM_MICBIAS_E("MIC BIAS1", SND_SOC_NOPM, 0, 0,
  944. wcd937x_codec_enable_micbias,
  945. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  946. SND_SOC_DAPM_POST_PMD),
  947. SND_SOC_DAPM_MICBIAS_E("MIC BIAS2", SND_SOC_NOPM, 0, 0,
  948. wcd937x_codec_enable_micbias,
  949. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  950. SND_SOC_DAPM_POST_PMD),
  951. SND_SOC_DAPM_MICBIAS_E("MIC BIAS3", SND_SOC_NOPM, 0, 0,
  952. wcd937x_codec_enable_micbias,
  953. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  954. SND_SOC_DAPM_POST_PMD),
  955. /*rx widgets*/
  956. SND_SOC_DAPM_PGA_E("EAR PGA", WCD937X_ANA_EAR, 7, 0, NULL, 0,
  957. wcd937x_codec_enable_ear_pa,
  958. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  959. SND_SOC_DAPM_POST_PMD),
  960. SND_SOC_DAPM_PGA_E("AUX PGA", WCD937X_AUX_AUXPA, 7, 0, NULL, 0,
  961. wcd937x_codec_enable_aux_pa,
  962. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  963. SND_SOC_DAPM_POST_PMD),
  964. SND_SOC_DAPM_PGA_E("HPHL PGA", WCD937X_ANA_HPH, 7, 0, NULL, 0,
  965. wcd937x_codec_enable_hphl_pa,
  966. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  967. SND_SOC_DAPM_POST_PMD),
  968. SND_SOC_DAPM_PGA_E("HPHR PGA", WCD937X_ANA_HPH, 6, 0, NULL, 0,
  969. wcd937x_codec_enable_hphr_pa,
  970. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  971. SND_SOC_DAPM_POST_PMD),
  972. SND_SOC_DAPM_DAC_E("RDAC1", NULL, SND_SOC_NOPM, 0, 0,
  973. wcd937x_codec_hphl_dac_event,
  974. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  975. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  976. SND_SOC_DAPM_DAC_E("RDAC2", NULL, SND_SOC_NOPM, 0, 0,
  977. wcd937x_codec_hphr_dac_event,
  978. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  979. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  980. SND_SOC_DAPM_DAC_E("RDAC3", NULL, SND_SOC_NOPM, 0, 0,
  981. wcd937x_codec_ear_dac_event,
  982. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  983. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  984. SND_SOC_DAPM_DAC_E("RDAC4", NULL, SND_SOC_NOPM, 0, 0,
  985. wcd937x_codec_aux_dac_event,
  986. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
  987. SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
  988. SND_SOC_DAPM_MUX("RDAC3_MUX", SND_SOC_NOPM, 0, 0, &rx_rdac3_mux),
  989. SND_SOC_DAPM_MIXER_E("RX1", SND_SOC_NOPM, 0, 0, NULL, 0,
  990. wcd937x_enable_rx1, SND_SOC_DAPM_PRE_PMU |
  991. SND_SOC_DAPM_POST_PMD),
  992. SND_SOC_DAPM_MIXER_E("RX2", SND_SOC_NOPM, 0, 0, NULL, 0,
  993. wcd937x_enable_rx2, SND_SOC_DAPM_PRE_PMU |
  994. SND_SOC_DAPM_POST_PMD),
  995. SND_SOC_DAPM_MIXER_E("RX3", SND_SOC_NOPM, 0, 0, NULL, 0,
  996. wcd937x_enable_rx3, SND_SOC_DAPM_PRE_PMU |
  997. SND_SOC_DAPM_POST_PMD),
  998. /* rx mixer widgets*/
  999. SND_SOC_DAPM_MIXER("EAR_RDAC", SND_SOC_NOPM, 0, 0,
  1000. ear_rdac_switch, ARRAY_SIZE(ear_rdac_switch)),
  1001. SND_SOC_DAPM_MIXER("AUX_RDAC", SND_SOC_NOPM, 0, 0,
  1002. aux_rdac_switch, ARRAY_SIZE(aux_rdac_switch)),
  1003. SND_SOC_DAPM_MIXER("HPHL_RDAC", SND_SOC_NOPM, 0, 0,
  1004. hphl_rdac_switch, ARRAY_SIZE(hphl_rdac_switch)),
  1005. SND_SOC_DAPM_MIXER("HPHR_RDAC", SND_SOC_NOPM, 0, 0,
  1006. hphr_rdac_switch, ARRAY_SIZE(hphr_rdac_switch)),
  1007. /*output widgets tx*/
  1008. SND_SOC_DAPM_OUTPUT("ADC1_OUTPUT"),
  1009. SND_SOC_DAPM_OUTPUT("ADC2_OUTPUT"),
  1010. /*output widgets rx*/
  1011. SND_SOC_DAPM_OUTPUT("EAR"),
  1012. SND_SOC_DAPM_OUTPUT("AUX"),
  1013. SND_SOC_DAPM_OUTPUT("HPHL"),
  1014. SND_SOC_DAPM_OUTPUT("HPHR"),
  1015. };
  1016. static const struct snd_soc_dapm_widget wcd9375_dapm_widgets[] = {
  1017. /*input widgets*/
  1018. SND_SOC_DAPM_INPUT("AMIC4"),
  1019. /*tx widgets*/
  1020. SND_SOC_DAPM_ADC_E("ADC3", NULL, SND_SOC_NOPM, 0, 0,
  1021. wcd937x_codec_enable_adc,
  1022. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1023. SND_SOC_DAPM_MIXER_E("ADC3 REQ", SND_SOC_NOPM, 0, 0,
  1024. NULL, 0, wcd937x_enable_req,
  1025. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1026. SND_SOC_DAPM_ADC_E("DMIC1", NULL, SND_SOC_NOPM, 0, 0,
  1027. wcd937x_codec_enable_dmic,
  1028. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1029. SND_SOC_DAPM_ADC_E("DMIC2", NULL, SND_SOC_NOPM, 0, 0,
  1030. wcd937x_codec_enable_dmic,
  1031. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1032. SND_SOC_DAPM_ADC_E("DMIC3", NULL, SND_SOC_NOPM, 0, 0,
  1033. wcd937x_codec_enable_dmic,
  1034. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1035. SND_SOC_DAPM_ADC_E("DMIC4", NULL, SND_SOC_NOPM, 0, 0,
  1036. wcd937x_codec_enable_dmic,
  1037. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1038. SND_SOC_DAPM_ADC_E("DMIC5", NULL, SND_SOC_NOPM, 0, 0,
  1039. wcd937x_codec_enable_dmic,
  1040. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1041. SND_SOC_DAPM_ADC_E("DMIC6", NULL, SND_SOC_NOPM, 0, 0,
  1042. wcd937x_codec_enable_dmic,
  1043. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  1044. /*tx mixer widgets*/
  1045. SND_SOC_DAPM_MIXER("DMIC1_MIXER", SND_SOC_NOPM, 0,
  1046. 0, dmic1_switch, ARRAY_SIZE(dmic1_switch)),
  1047. SND_SOC_DAPM_MIXER("DMIC2_MIXER", SND_SOC_NOPM, 0,
  1048. 0, dmic2_switch, ARRAY_SIZE(dmic2_switch)),
  1049. SND_SOC_DAPM_MIXER("DMIC3_MIXER", SND_SOC_NOPM, 0,
  1050. 0, dmic3_switch, ARRAY_SIZE(dmic3_switch)),
  1051. SND_SOC_DAPM_MIXER("DMIC4_MIXER", SND_SOC_NOPM, 0,
  1052. 0, dmic4_switch, ARRAY_SIZE(dmic4_switch)),
  1053. SND_SOC_DAPM_MIXER("DMIC5_MIXER", SND_SOC_NOPM, 0,
  1054. 0, dmic5_switch, ARRAY_SIZE(dmic5_switch)),
  1055. SND_SOC_DAPM_MIXER("DMIC6_MIXER", SND_SOC_NOPM, 0,
  1056. 0, dmic6_switch, ARRAY_SIZE(dmic6_switch)),
  1057. SND_SOC_DAPM_MIXER("ADC3_MIXER", SND_SOC_NOPM, 0,
  1058. 0, adc3_switch, ARRAY_SIZE(adc3_switch)),
  1059. /*output widgets*/
  1060. SND_SOC_DAPM_OUTPUT("DMIC1_OUTPUT"),
  1061. SND_SOC_DAPM_OUTPUT("DMIC2_OUTPUT"),
  1062. SND_SOC_DAPM_OUTPUT("DMIC3_OUTPUT"),
  1063. SND_SOC_DAPM_OUTPUT("DMIC4_OUTPUT"),
  1064. SND_SOC_DAPM_OUTPUT("DMIC5_OUTPUT"),
  1065. SND_SOC_DAPM_OUTPUT("DMIC6_OUTPUT"),
  1066. SND_SOC_DAPM_OUTPUT("ADC3_OUTPUT"),
  1067. };
  1068. static const struct snd_soc_dapm_route wcd937x_audio_map[] = {
  1069. {"ADC2_OUTPUT", NULL, "ADC2_MIXER"},
  1070. {"ADC2_MIXER", "Switch", "ADC2 REQ"},
  1071. {"ADC2 REQ", "NULL", "ADC2"},
  1072. {"ADC2", "NULL", "ADC2 MUX"},
  1073. {"ADC2 MUX", "INP3", "AMIC3"},
  1074. {"ADC2 MUX", "INP2", "AMIC2"},
  1075. {"ADC1_OUTPUT", NULL, "ADC1_MIXER"},
  1076. {"ADC1_MIXER", "Switch", "ADC1 REQ"},
  1077. {"ADC1 REQ", NULL, "ADC1"},
  1078. {"ADC1", NULL, "AMIC1"},
  1079. {"RX1", NULL, "IN1_HPHL"},
  1080. {"RDAC1", NULL, "RX1"},
  1081. {"HPHL_RDAC", "Switch", "RDAC1"},
  1082. {"HPHL PGA", NULL, "HPHL_RDAC"},
  1083. {"HPHL", NULL, "HPHL PGA"},
  1084. {"RX2", NULL, "IN2_HPHR"},
  1085. {"RDAC2", NULL, "RX2"},
  1086. {"HPHR_RDAC", "Switch", "RDAC2"},
  1087. {"HPHR PGA", NULL, "HPHR_RDAC"},
  1088. {"HPHR", NULL, "HPHR PGA"},
  1089. {"RX3", NULL, "IN3_AUX"},
  1090. {"RDAC4", NULL, "RX3"},
  1091. {"AUX_RDAC", "Switch", "RDAC4"},
  1092. {"AUX PGA", NULL, "AUX_RDAC"},
  1093. {"AUX", NULL, "AUX PGA"},
  1094. {"RDAC3_MUX", "RX3", "RX3"},
  1095. {"RDAC3_MUX", "RX1", "RX1"},
  1096. {"RDAC3", NULL, "RDAC3_MUX"},
  1097. {"EAR_RDAC", "Switch", "RDAC3"},
  1098. {"EAR PGA", NULL, "EAR_RDAC"},
  1099. {"EAR", NULL, "EAR PGA"},
  1100. };
  1101. static const struct snd_soc_dapm_route wcd9375_audio_map[] = {
  1102. {"ADC3_OUTPUT", NULL, "ADC3_MIXER"},
  1103. {"ADC3_MIXER", "Switch", "ADC3 REQ"},
  1104. {"ADC3 REQ", NULL, "ADC3"},
  1105. {"ADC3", NULL, "AMIC4"},
  1106. {"DMIC1_OUTPUT", NULL, "DMIC1_MIXER"},
  1107. {"DMIC1_MIXER", "Switch", "DMIC1"},
  1108. {"DMIC2_OUTPUT", NULL, "DMIC2_MIXER"},
  1109. {"DMIC2_MIXER", "Switch", "DMIC2"},
  1110. {"DMIC3_OUTPUT", NULL, "DMIC3_MIXER"},
  1111. {"DMIC3_MIXER", "Switch", "DMIC3"},
  1112. {"DMIC4_OUTPUT", NULL, "DMIC4_MIXER"},
  1113. {"DMIC4_MIXER", "Switch", "DMIC4"},
  1114. {"DMIC5_OUTPUT", NULL, "DMIC5_MIXER"},
  1115. {"DMIC5_MIXER", "Switch", "DMIC5"},
  1116. {"DMIC6_OUTPUT", NULL, "DMIC6_MIXER"},
  1117. {"DMIC6_MIXER", "Switch", "DMIC6"},
  1118. };
  1119. static int wcd937x_soc_codec_probe(struct snd_soc_codec *codec)
  1120. {
  1121. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1122. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  1123. int variant;
  1124. int ret = -EINVAL;
  1125. dev_info(codec->dev, "%s()\n", __func__);
  1126. wcd937x = snd_soc_codec_get_drvdata(codec);
  1127. if (!wcd937x)
  1128. return -EINVAL;
  1129. wcd937x->codec = codec;
  1130. variant = (snd_soc_read(codec, WCD937X_DIGITAL_EFUSE_REG_0) & 0x0E) >> 1;
  1131. wcd937x->variant = variant;
  1132. wcd937x->fw_data = devm_kzalloc(codec->dev,
  1133. sizeof(*(wcd937x->fw_data)),
  1134. GFP_KERNEL);
  1135. if (!wcd937x->fw_data) {
  1136. dev_err(codec->dev, "Failed to allocate fw_data\n");
  1137. ret = -ENOMEM;
  1138. goto err;
  1139. }
  1140. set_bit(WCD9XXX_MBHC_CAL, wcd937x->fw_data->cal_bit);
  1141. ret = wcd_cal_create_hwdep(wcd937x->fw_data,
  1142. WCD9XXX_CODEC_HWDEP_NODE, codec);
  1143. if (ret < 0) {
  1144. dev_err(codec->dev, "%s hwdep failed %d\n", __func__, ret);
  1145. goto err_hwdep;
  1146. }
  1147. ret = wcd937x_mbhc_init(&wcd937x->mbhc, codec, wcd937x->fw_data);
  1148. if (ret) {
  1149. pr_err("%s: mbhc initialization failed\n", __func__);
  1150. goto err_hwdep;
  1151. }
  1152. wcd937x_init_reg(codec);
  1153. if (wcd937x->variant == WCD9375_VARIANT) {
  1154. ret = snd_soc_dapm_new_controls(dapm, wcd9375_dapm_widgets,
  1155. ARRAY_SIZE(wcd9375_dapm_widgets));
  1156. if (ret < 0) {
  1157. dev_err(codec->dev, "%s: Failed to add snd_ctls\n",
  1158. __func__);
  1159. goto err_hwdep;
  1160. }
  1161. ret = snd_soc_dapm_add_routes(dapm, wcd9375_audio_map,
  1162. ARRAY_SIZE(wcd9375_audio_map));
  1163. if (ret < 0) {
  1164. dev_err(codec->dev, "%s: Failed to add routes\n",
  1165. __func__);
  1166. goto err_hwdep;
  1167. }
  1168. ret = snd_soc_dapm_new_widgets(dapm->card);
  1169. if (ret < 0) {
  1170. dev_err(codec->dev, "%s: Failed to add widgets\n",
  1171. __func__);
  1172. goto err_hwdep;
  1173. }
  1174. }
  1175. return ret;
  1176. err_hwdep:
  1177. wcd937x->fw_data = NULL;
  1178. err:
  1179. return ret;
  1180. }
  1181. static int wcd937x_soc_codec_remove(struct snd_soc_codec *codec)
  1182. {
  1183. struct wcd937x_priv *wcd937x = snd_soc_codec_get_drvdata(codec);
  1184. if (!wcd937x)
  1185. return -EINVAL;
  1186. return 0;
  1187. }
  1188. static struct regmap *wcd937x_get_regmap(struct device *dev)
  1189. {
  1190. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  1191. return wcd937x->regmap;
  1192. }
  1193. static struct snd_soc_codec_driver soc_codec_dev_wcd937x = {
  1194. .probe = wcd937x_soc_codec_probe,
  1195. .remove = wcd937x_soc_codec_remove,
  1196. .get_regmap = wcd937x_get_regmap,
  1197. .component_driver = {
  1198. .controls = wcd937x_snd_controls,
  1199. .num_controls = ARRAY_SIZE(wcd937x_snd_controls),
  1200. .dapm_widgets = wcd937x_dapm_widgets,
  1201. .num_dapm_widgets = ARRAY_SIZE(wcd937x_dapm_widgets),
  1202. .dapm_routes = wcd937x_audio_map,
  1203. .num_dapm_routes = ARRAY_SIZE(wcd937x_audio_map),
  1204. },
  1205. };
  1206. int wcd937x_reset(struct device *dev)
  1207. {
  1208. struct wcd937x_priv *wcd937x = NULL;
  1209. int rc = 0;
  1210. int value = 0;
  1211. if (!dev)
  1212. return -ENODEV;
  1213. wcd937x = dev_get_drvdata(dev);
  1214. if (!wcd937x)
  1215. return -EINVAL;
  1216. if (!wcd937x->rst_np) {
  1217. dev_err(dev, "%s: reset gpio device node not specified\n",
  1218. __func__);
  1219. return -EINVAL;
  1220. }
  1221. value = msm_cdc_pinctrl_get_state(wcd937x->rst_np);
  1222. if (value > 0)
  1223. return 0;
  1224. rc = msm_cdc_pinctrl_select_sleep_state(wcd937x->rst_np);
  1225. if (rc) {
  1226. dev_err(dev, "%s: wcd sleep state request fail!\n",
  1227. __func__);
  1228. return rc;
  1229. }
  1230. /* 20ms sleep required after pulling the reset gpio to LOW */
  1231. usleep_range(20, 30);
  1232. rc = msm_cdc_pinctrl_select_active_state(wcd937x->rst_np);
  1233. if (rc) {
  1234. dev_err(dev, "%s: wcd active state request fail!\n",
  1235. __func__);
  1236. return rc;
  1237. }
  1238. /* 20ms sleep required after pulling the reset gpio to HIGH */
  1239. usleep_range(20, 30);
  1240. return rc;
  1241. }
  1242. struct wcd937x_pdata *wcd937x_populate_dt_data(struct device *dev)
  1243. {
  1244. struct wcd937x_pdata *pdata = NULL;
  1245. pdata = devm_kzalloc(dev, sizeof(struct wcd937x_pdata),
  1246. GFP_KERNEL);
  1247. if (!pdata)
  1248. return NULL;
  1249. pdata->rst_np = of_parse_phandle(dev->of_node,
  1250. "qcom,wcd937x-reset-node", 0);
  1251. if (!pdata->rst_np) {
  1252. dev_err(dev, "%s: Looking up %s property in node %s failed\n",
  1253. __func__, "qcom,wcd937x-reset-node",
  1254. dev->of_node->full_name);
  1255. return NULL;
  1256. }
  1257. pdata->rx_slave = of_parse_phandle(dev->of_node, "qcom,rx-slave", 0);
  1258. pdata->tx_slave = of_parse_phandle(dev->of_node, "qcom,tx-slave", 0);
  1259. return pdata;
  1260. }
  1261. static int wcd937x_bind(struct device *dev)
  1262. {
  1263. int ret = 0, i = 0;
  1264. struct wcd937x_priv *wcd937x = NULL;
  1265. struct wcd937x_pdata *pdata = NULL;
  1266. wcd937x = devm_kzalloc(dev, sizeof(struct wcd937x_priv), GFP_KERNEL);
  1267. if (!wcd937x)
  1268. return -ENOMEM;
  1269. dev_set_drvdata(dev, wcd937x);
  1270. pdata = wcd937x_populate_dt_data(dev);
  1271. if (!pdata) {
  1272. dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
  1273. return -EINVAL;
  1274. }
  1275. wcd937x->rst_np = pdata->rst_np;
  1276. wcd937x_reset(dev);
  1277. /*
  1278. * Add 5msec delay to provide sufficient time for
  1279. * soundwire auto enumeration of slave devices as
  1280. * as per HW requirement.
  1281. */
  1282. usleep_range(5000, 5010);
  1283. ret = component_bind_all(dev, wcd937x);
  1284. if (ret) {
  1285. dev_err(dev, "%s: Slave bind failed, ret = %d\n",
  1286. __func__, ret);
  1287. return ret;
  1288. }
  1289. wcd937x->rx_swr_dev = get_matching_swr_slave_device(pdata->rx_slave);
  1290. if (!wcd937x->rx_swr_dev) {
  1291. dev_err(dev, "%s: Could not find RX swr slave device\n",
  1292. __func__);
  1293. ret = -ENODEV;
  1294. goto err;
  1295. }
  1296. wcd937x->tx_swr_dev = get_matching_swr_slave_device(pdata->tx_slave);
  1297. if (!wcd937x->tx_swr_dev) {
  1298. dev_err(dev, "%s: Could not find TX swr slave device\n",
  1299. __func__);
  1300. ret = -ENODEV;
  1301. goto err;
  1302. }
  1303. wcd937x->regmap = devm_regmap_init_swr(wcd937x->tx_swr_dev,
  1304. &wcd937x_regmap_config);
  1305. if (!wcd937x->regmap) {
  1306. dev_err(dev, "%s: Regmap init failed\n",
  1307. __func__);
  1308. goto err;
  1309. }
  1310. /* Set all interupts as edge triggered */
  1311. for (i = 0; i < wcd937x_regmap_irq_chip.num_regs; i++)
  1312. regmap_write(wcd937x->regmap,
  1313. (WCD937X_DIGITAL_INTR_LEVEL_0 + i), 0);
  1314. wcd937x->irq_info->wcd_regmap_irq_chip = &wcd937x_regmap_irq_chip;
  1315. wcd937x->irq_info->codec_name = "WCD937X";
  1316. wcd937x->irq_info->regmap = wcd937x->regmap;
  1317. wcd937x->irq_info->dev = dev;
  1318. ret = wcd_irq_init(wcd937x->irq_info, &wcd937x->virq);
  1319. if (ret) {
  1320. dev_err(wcd937x->dev, "%s: IRQ init failed: %d\n",
  1321. __func__, ret);
  1322. goto err;
  1323. }
  1324. wcd937x->tx_swr_dev->slave_irq = wcd937x->virq;
  1325. ret = snd_soc_register_codec(dev, &soc_codec_dev_wcd937x,
  1326. NULL, 0);
  1327. if (ret) {
  1328. dev_err(dev, "%s: Codec registration failed\n",
  1329. __func__);
  1330. goto err_irq;
  1331. }
  1332. return ret;
  1333. err_irq:
  1334. wcd_irq_exit(wcd937x->irq_info, wcd937x->virq);
  1335. err:
  1336. component_unbind_all(dev, wcd937x);
  1337. return ret;
  1338. }
  1339. static void wcd937x_unbind(struct device *dev)
  1340. {
  1341. struct wcd937x_priv *wcd937x = dev_get_drvdata(dev);
  1342. wcd_irq_exit(wcd937x->irq_info, wcd937x->virq);
  1343. snd_soc_unregister_codec(dev);
  1344. component_unbind_all(dev, wcd937x);
  1345. }
  1346. static const struct of_device_id wcd937x_dt_match[] = {
  1347. { .compatible = "qcom,wcd937x-codec" },
  1348. {}
  1349. };
  1350. static const struct component_master_ops wcd937x_comp_ops = {
  1351. .bind = wcd937x_bind,
  1352. .unbind = wcd937x_unbind,
  1353. };
  1354. static int wcd937x_compare_of(struct device *dev, void *data)
  1355. {
  1356. return dev->of_node == data;
  1357. }
  1358. static void wcd937x_release_of(struct device *dev, void *data)
  1359. {
  1360. of_node_put(data);
  1361. }
  1362. static int wcd937x_add_slave_components(struct device *dev,
  1363. struct component_match **matchptr)
  1364. {
  1365. struct device_node *np, *rx_node, *tx_node;
  1366. np = dev->of_node;
  1367. rx_node = of_parse_phandle(np, "qcom,rx-slave", 0);
  1368. if (!rx_node) {
  1369. dev_err(dev, "%s: Rx-slave node not defined\n", __func__);
  1370. return -ENODEV;
  1371. }
  1372. of_node_get(rx_node);
  1373. component_match_add_release(dev, matchptr,
  1374. wcd937x_release_of,
  1375. wcd937x_compare_of,
  1376. rx_node);
  1377. tx_node = of_parse_phandle(np, "qcom,tx-slave", 0);
  1378. if (!tx_node) {
  1379. dev_err(dev, "%s: Tx-slave node not defined\n", __func__);
  1380. return -ENODEV;
  1381. }
  1382. of_node_get(tx_node);
  1383. component_match_add_release(dev, matchptr,
  1384. wcd937x_release_of,
  1385. wcd937x_compare_of,
  1386. tx_node);
  1387. return 0;
  1388. }
  1389. static int wcd937x_probe(struct platform_device *pdev)
  1390. {
  1391. struct component_match *match = NULL;
  1392. int ret;
  1393. ret = wcd937x_add_slave_components(&pdev->dev, &match);
  1394. if (ret)
  1395. return ret;
  1396. return component_master_add_with_match(&pdev->dev,
  1397. &wcd937x_comp_ops, match);
  1398. }
  1399. static int wcd937x_remove(struct platform_device *pdev)
  1400. {
  1401. component_master_del(&pdev->dev, &wcd937x_comp_ops);
  1402. return 0;
  1403. }
  1404. static struct platform_driver wcd937x_codec_driver = {
  1405. .probe = wcd937x_probe,
  1406. .remove = wcd937x_remove,
  1407. .driver = {
  1408. .name = "wcd937x_codec",
  1409. .owner = THIS_MODULE,
  1410. .of_match_table = of_match_ptr(wcd937x_dt_match),
  1411. },
  1412. };
  1413. module_platform_driver(wcd937x_codec_driver);
  1414. MODULE_DESCRIPTION("WCD937X Codec driver");
  1415. MODULE_LICENSE("GPL v2");