dsi_panel.c 114 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/delay.h>
  6. #include <linux/slab.h>
  7. #include <linux/gpio.h>
  8. #include <linux/of_gpio.h>
  9. #include <linux/pwm.h>
  10. #include <video/mipi_display.h>
  11. #include "dsi_panel.h"
  12. #include "dsi_ctrl_hw.h"
  13. #include "dsi_parser.h"
  14. #include "sde_dsc_helper.h"
  15. #include "sde_vdc_helper.h"
  16. /**
  17. * topology is currently defined by a set of following 3 values:
  18. * 1. num of layer mixers
  19. * 2. num of compression encoders
  20. * 3. num of interfaces
  21. */
  22. #define TOPOLOGY_SET_LEN 3
  23. #define MAX_TOPOLOGY 5
  24. #define DSI_PANEL_DEFAULT_LABEL "Default dsi panel"
  25. #define DEFAULT_PANEL_JITTER_NUMERATOR 2
  26. #define DEFAULT_PANEL_JITTER_DENOMINATOR 1
  27. #define DEFAULT_PANEL_JITTER_ARRAY_SIZE 2
  28. #define MAX_PANEL_JITTER 10
  29. #define DEFAULT_PANEL_PREFILL_LINES 25
  30. #define HIGH_REFRESH_RATE_THRESHOLD_TIME_US 500
  31. #define MIN_PREFILL_LINES 40
  32. static void dsi_dce_prepare_pps_header(char *buf, u32 pps_delay_ms)
  33. {
  34. char *bp;
  35. bp = buf;
  36. /* First 7 bytes are cmd header */
  37. *bp++ = 0x0A;
  38. *bp++ = 1;
  39. *bp++ = 0;
  40. *bp++ = 0;
  41. *bp++ = pps_delay_ms;
  42. *bp++ = 0;
  43. *bp++ = 128;
  44. }
  45. static int dsi_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc,
  46. char *buf, int pps_id, u32 size)
  47. {
  48. dsi_dce_prepare_pps_header(buf, dsc->pps_delay_ms);
  49. buf += DSI_CMD_PPS_HDR_SIZE;
  50. return sde_dsc_create_pps_buf_cmd(dsc, buf, pps_id,
  51. size);
  52. }
  53. static int dsi_vdc_create_pps_buf_cmd(struct msm_display_vdc_info *vdc,
  54. char *buf, int pps_id, u32 size)
  55. {
  56. dsi_dce_prepare_pps_header(buf, vdc->pps_delay_ms);
  57. buf += DSI_CMD_PPS_HDR_SIZE;
  58. return sde_vdc_create_pps_buf_cmd(vdc, buf, pps_id,
  59. size);
  60. }
  61. static int dsi_panel_vreg_get(struct dsi_panel *panel)
  62. {
  63. int rc = 0;
  64. int i;
  65. struct regulator *vreg = NULL;
  66. for (i = 0; i < panel->power_info.count; i++) {
  67. vreg = devm_regulator_get(panel->parent,
  68. panel->power_info.vregs[i].vreg_name);
  69. rc = PTR_RET(vreg);
  70. if (rc) {
  71. DSI_ERR("failed to get %s regulator\n",
  72. panel->power_info.vregs[i].vreg_name);
  73. goto error_put;
  74. }
  75. panel->power_info.vregs[i].vreg = vreg;
  76. }
  77. return rc;
  78. error_put:
  79. for (i = i - 1; i >= 0; i--) {
  80. devm_regulator_put(panel->power_info.vregs[i].vreg);
  81. panel->power_info.vregs[i].vreg = NULL;
  82. }
  83. return rc;
  84. }
  85. static int dsi_panel_vreg_put(struct dsi_panel *panel)
  86. {
  87. int rc = 0;
  88. int i;
  89. for (i = panel->power_info.count - 1; i >= 0; i--)
  90. devm_regulator_put(panel->power_info.vregs[i].vreg);
  91. return rc;
  92. }
  93. static int dsi_panel_gpio_request(struct dsi_panel *panel)
  94. {
  95. int rc = 0;
  96. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  97. if (gpio_is_valid(r_config->reset_gpio)) {
  98. rc = gpio_request(r_config->reset_gpio, "reset_gpio");
  99. if (rc) {
  100. DSI_ERR("request for reset_gpio failed, rc=%d\n", rc);
  101. goto error;
  102. }
  103. }
  104. if (gpio_is_valid(r_config->disp_en_gpio)) {
  105. rc = gpio_request(r_config->disp_en_gpio, "disp_en_gpio");
  106. if (rc) {
  107. DSI_ERR("request for disp_en_gpio failed, rc=%d\n", rc);
  108. goto error_release_reset;
  109. }
  110. }
  111. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  112. rc = gpio_request(panel->bl_config.en_gpio, "bklt_en_gpio");
  113. if (rc) {
  114. DSI_ERR("request for bklt_en_gpio failed, rc=%d\n", rc);
  115. goto error_release_disp_en;
  116. }
  117. }
  118. if (gpio_is_valid(r_config->lcd_mode_sel_gpio)) {
  119. rc = gpio_request(r_config->lcd_mode_sel_gpio, "mode_gpio");
  120. if (rc) {
  121. DSI_ERR("request for mode_gpio failed, rc=%d\n", rc);
  122. goto error_release_mode_sel;
  123. }
  124. }
  125. if (gpio_is_valid(panel->panel_test_gpio)) {
  126. rc = gpio_request(panel->panel_test_gpio, "panel_test_gpio");
  127. if (rc) {
  128. DSI_WARN("request for panel_test_gpio failed, rc=%d\n",
  129. rc);
  130. panel->panel_test_gpio = -1;
  131. rc = 0;
  132. }
  133. }
  134. goto error;
  135. error_release_mode_sel:
  136. if (gpio_is_valid(panel->bl_config.en_gpio))
  137. gpio_free(panel->bl_config.en_gpio);
  138. error_release_disp_en:
  139. if (gpio_is_valid(r_config->disp_en_gpio))
  140. gpio_free(r_config->disp_en_gpio);
  141. error_release_reset:
  142. if (gpio_is_valid(r_config->reset_gpio))
  143. gpio_free(r_config->reset_gpio);
  144. error:
  145. return rc;
  146. }
  147. static int dsi_panel_gpio_release(struct dsi_panel *panel)
  148. {
  149. int rc = 0;
  150. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  151. if (gpio_is_valid(r_config->reset_gpio))
  152. gpio_free(r_config->reset_gpio);
  153. if (gpio_is_valid(r_config->disp_en_gpio))
  154. gpio_free(r_config->disp_en_gpio);
  155. if (gpio_is_valid(panel->bl_config.en_gpio))
  156. gpio_free(panel->bl_config.en_gpio);
  157. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  158. gpio_free(panel->reset_config.lcd_mode_sel_gpio);
  159. if (gpio_is_valid(panel->panel_test_gpio))
  160. gpio_free(panel->panel_test_gpio);
  161. return rc;
  162. }
  163. int dsi_panel_trigger_esd_attack(struct dsi_panel *panel)
  164. {
  165. struct dsi_panel_reset_config *r_config;
  166. if (!panel) {
  167. DSI_ERR("Invalid panel param\n");
  168. return -EINVAL;
  169. }
  170. r_config = &panel->reset_config;
  171. if (!r_config) {
  172. DSI_ERR("Invalid panel reset configuration\n");
  173. return -EINVAL;
  174. }
  175. if (gpio_is_valid(r_config->reset_gpio)) {
  176. gpio_set_value(r_config->reset_gpio, 0);
  177. DSI_INFO("GPIO pulled low to simulate ESD\n");
  178. return 0;
  179. }
  180. DSI_ERR("failed to pull down gpio\n");
  181. return -EINVAL;
  182. }
  183. static int dsi_panel_reset(struct dsi_panel *panel)
  184. {
  185. int rc = 0;
  186. struct dsi_panel_reset_config *r_config = &panel->reset_config;
  187. int i;
  188. if (gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  189. rc = gpio_direction_output(panel->reset_config.disp_en_gpio, 1);
  190. if (rc) {
  191. DSI_ERR("unable to set dir for disp gpio rc=%d\n", rc);
  192. goto exit;
  193. }
  194. }
  195. if (r_config->count) {
  196. rc = gpio_direction_output(r_config->reset_gpio,
  197. r_config->sequence[0].level);
  198. if (rc) {
  199. DSI_ERR("unable to set dir for rst gpio rc=%d\n", rc);
  200. goto exit;
  201. }
  202. }
  203. for (i = 0; i < r_config->count; i++) {
  204. gpio_set_value(r_config->reset_gpio,
  205. r_config->sequence[i].level);
  206. if (r_config->sequence[i].sleep_ms)
  207. usleep_range(r_config->sequence[i].sleep_ms * 1000,
  208. (r_config->sequence[i].sleep_ms * 1000) + 100);
  209. }
  210. if (gpio_is_valid(panel->bl_config.en_gpio)) {
  211. rc = gpio_direction_output(panel->bl_config.en_gpio, 1);
  212. if (rc)
  213. DSI_ERR("unable to set dir for bklt gpio rc=%d\n", rc);
  214. }
  215. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio)) {
  216. bool out = true;
  217. if ((panel->reset_config.mode_sel_state == MODE_SEL_DUAL_PORT)
  218. || (panel->reset_config.mode_sel_state
  219. == MODE_GPIO_LOW))
  220. out = false;
  221. else if ((panel->reset_config.mode_sel_state
  222. == MODE_SEL_SINGLE_PORT) ||
  223. (panel->reset_config.mode_sel_state
  224. == MODE_GPIO_HIGH))
  225. out = true;
  226. rc = gpio_direction_output(
  227. panel->reset_config.lcd_mode_sel_gpio, out);
  228. if (rc)
  229. DSI_ERR("unable to set dir for mode gpio rc=%d\n", rc);
  230. }
  231. if (gpio_is_valid(panel->panel_test_gpio)) {
  232. rc = gpio_direction_input(panel->panel_test_gpio);
  233. if (rc)
  234. DSI_WARN("unable to set dir for panel test gpio rc=%d\n",
  235. rc);
  236. }
  237. exit:
  238. return rc;
  239. }
  240. static int dsi_panel_set_pinctrl_state(struct dsi_panel *panel, bool enable)
  241. {
  242. int rc = 0;
  243. struct pinctrl_state *state;
  244. if (panel->host_config.ext_bridge_mode)
  245. return 0;
  246. if (!panel->pinctrl.pinctrl)
  247. return 0;
  248. if (enable)
  249. state = panel->pinctrl.active;
  250. else
  251. state = panel->pinctrl.suspend;
  252. rc = pinctrl_select_state(panel->pinctrl.pinctrl, state);
  253. if (rc)
  254. DSI_ERR("[%s] failed to set pin state, rc=%d\n",
  255. panel->name, rc);
  256. return rc;
  257. }
  258. static int dsi_panel_power_on(struct dsi_panel *panel)
  259. {
  260. int rc = 0;
  261. rc = dsi_pwr_enable_regulator(&panel->power_info, true);
  262. if (rc) {
  263. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  264. panel->name, rc);
  265. goto exit;
  266. }
  267. rc = dsi_panel_set_pinctrl_state(panel, true);
  268. if (rc) {
  269. DSI_ERR("[%s] failed to set pinctrl, rc=%d\n", panel->name, rc);
  270. goto error_disable_vregs;
  271. }
  272. rc = dsi_panel_reset(panel);
  273. if (rc) {
  274. DSI_ERR("[%s] failed to reset panel, rc=%d\n", panel->name, rc);
  275. goto error_disable_gpio;
  276. }
  277. goto exit;
  278. error_disable_gpio:
  279. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  280. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  281. if (gpio_is_valid(panel->bl_config.en_gpio))
  282. gpio_set_value(panel->bl_config.en_gpio, 0);
  283. (void)dsi_panel_set_pinctrl_state(panel, false);
  284. error_disable_vregs:
  285. (void)dsi_pwr_enable_regulator(&panel->power_info, false);
  286. exit:
  287. return rc;
  288. }
  289. static int dsi_panel_power_off(struct dsi_panel *panel)
  290. {
  291. int rc = 0;
  292. if (gpio_is_valid(panel->reset_config.disp_en_gpio))
  293. gpio_set_value(panel->reset_config.disp_en_gpio, 0);
  294. if (gpio_is_valid(panel->reset_config.reset_gpio) &&
  295. !panel->reset_gpio_always_on)
  296. gpio_set_value(panel->reset_config.reset_gpio, 0);
  297. if (gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  298. gpio_set_value(panel->reset_config.lcd_mode_sel_gpio, 0);
  299. if (gpio_is_valid(panel->panel_test_gpio)) {
  300. rc = gpio_direction_input(panel->panel_test_gpio);
  301. if (rc)
  302. DSI_WARN("set dir for panel test gpio failed rc=%d\n",
  303. rc);
  304. }
  305. rc = dsi_panel_set_pinctrl_state(panel, false);
  306. if (rc) {
  307. DSI_ERR("[%s] failed set pinctrl state, rc=%d\n", panel->name,
  308. rc);
  309. }
  310. rc = dsi_pwr_enable_regulator(&panel->power_info, false);
  311. if (rc)
  312. DSI_ERR("[%s] failed to enable vregs, rc=%d\n",
  313. panel->name, rc);
  314. return rc;
  315. }
  316. static int dsi_panel_tx_cmd_set(struct dsi_panel *panel,
  317. enum dsi_cmd_set_type type)
  318. {
  319. int rc = 0, i = 0;
  320. ssize_t len;
  321. struct dsi_cmd_desc *cmds;
  322. u32 count;
  323. enum dsi_cmd_set_state state;
  324. struct dsi_display_mode *mode;
  325. const struct mipi_dsi_host_ops *ops = panel->host->ops;
  326. if (!panel || !panel->cur_mode)
  327. return -EINVAL;
  328. mode = panel->cur_mode;
  329. cmds = mode->priv_info->cmd_sets[type].cmds;
  330. count = mode->priv_info->cmd_sets[type].count;
  331. state = mode->priv_info->cmd_sets[type].state;
  332. if (count == 0) {
  333. DSI_DEBUG("[%s] No commands to be sent for state(%d)\n",
  334. panel->name, type);
  335. goto error;
  336. }
  337. for (i = 0; i < count; i++) {
  338. if (state == DSI_CMD_SET_STATE_LP)
  339. cmds->msg.flags |= MIPI_DSI_MSG_USE_LPM;
  340. if (cmds->last_command)
  341. cmds->msg.flags |= MIPI_DSI_MSG_LASTCOMMAND;
  342. if (type == DSI_CMD_SET_VID_TO_CMD_SWITCH)
  343. cmds->msg.flags |= MIPI_DSI_MSG_ASYNC_OVERRIDE;
  344. len = ops->transfer(panel->host, &cmds->msg);
  345. if (len < 0) {
  346. rc = len;
  347. DSI_ERR("failed to set cmds(%d), rc=%d\n", type, rc);
  348. goto error;
  349. }
  350. if (cmds->post_wait_ms)
  351. usleep_range(cmds->post_wait_ms*1000,
  352. ((cmds->post_wait_ms*1000)+10));
  353. cmds++;
  354. }
  355. error:
  356. return rc;
  357. }
  358. static int dsi_panel_pinctrl_deinit(struct dsi_panel *panel)
  359. {
  360. int rc = 0;
  361. if (panel->host_config.ext_bridge_mode)
  362. return 0;
  363. devm_pinctrl_put(panel->pinctrl.pinctrl);
  364. return rc;
  365. }
  366. static int dsi_panel_pinctrl_init(struct dsi_panel *panel)
  367. {
  368. int rc = 0;
  369. if (panel->host_config.ext_bridge_mode)
  370. return 0;
  371. /* TODO: pinctrl is defined in dsi dt node */
  372. panel->pinctrl.pinctrl = devm_pinctrl_get(panel->parent);
  373. if (IS_ERR_OR_NULL(panel->pinctrl.pinctrl)) {
  374. rc = PTR_ERR(panel->pinctrl.pinctrl);
  375. DSI_ERR("failed to get pinctrl, rc=%d\n", rc);
  376. goto error;
  377. }
  378. panel->pinctrl.active = pinctrl_lookup_state(panel->pinctrl.pinctrl,
  379. "panel_active");
  380. if (IS_ERR_OR_NULL(panel->pinctrl.active)) {
  381. rc = PTR_ERR(panel->pinctrl.active);
  382. DSI_ERR("failed to get pinctrl active state, rc=%d\n", rc);
  383. goto error;
  384. }
  385. panel->pinctrl.suspend =
  386. pinctrl_lookup_state(panel->pinctrl.pinctrl, "panel_suspend");
  387. if (IS_ERR_OR_NULL(panel->pinctrl.suspend)) {
  388. rc = PTR_ERR(panel->pinctrl.suspend);
  389. DSI_ERR("failed to get pinctrl suspend state, rc=%d\n", rc);
  390. goto error;
  391. }
  392. panel->pinctrl.pwm_pin =
  393. pinctrl_lookup_state(panel->pinctrl.pinctrl, "pwm_pin");
  394. if (IS_ERR_OR_NULL(panel->pinctrl.pwm_pin)) {
  395. panel->pinctrl.pwm_pin = NULL;
  396. DSI_DEBUG("failed to get pinctrl pwm_pin");
  397. }
  398. error:
  399. return rc;
  400. }
  401. static int dsi_panel_wled_register(struct dsi_panel *panel,
  402. struct dsi_backlight_config *bl)
  403. {
  404. struct backlight_device *bd;
  405. bd = backlight_device_get_by_type(BACKLIGHT_RAW);
  406. if (!bd) {
  407. DSI_ERR("[%s] fail raw backlight register rc=%d\n",
  408. panel->name, -EPROBE_DEFER);
  409. return -EPROBE_DEFER;
  410. }
  411. bl->raw_bd = bd;
  412. return 0;
  413. }
  414. static int dsi_panel_update_backlight(struct dsi_panel *panel,
  415. u32 bl_lvl)
  416. {
  417. int rc = 0;
  418. unsigned long mode_flags = 0;
  419. struct mipi_dsi_device *dsi = NULL;
  420. if (!panel || (bl_lvl > 0xffff)) {
  421. DSI_ERR("invalid params\n");
  422. return -EINVAL;
  423. }
  424. dsi = &panel->mipi_device;
  425. if (unlikely(panel->bl_config.lp_mode)) {
  426. mode_flags = dsi->mode_flags;
  427. dsi->mode_flags |= MIPI_DSI_MODE_LPM;
  428. }
  429. if (panel->bl_config.bl_inverted_dbv)
  430. bl_lvl = (((bl_lvl & 0xff) << 8) | (bl_lvl >> 8));
  431. rc = mipi_dsi_dcs_set_display_brightness(dsi, bl_lvl);
  432. if (rc < 0)
  433. DSI_ERR("failed to update dcs backlight:%d\n", bl_lvl);
  434. if (unlikely(panel->bl_config.lp_mode))
  435. dsi->mode_flags = mode_flags;
  436. return rc;
  437. }
  438. static int dsi_panel_update_pwm_backlight(struct dsi_panel *panel,
  439. u32 bl_lvl)
  440. {
  441. int rc = 0;
  442. u32 duty = 0;
  443. u32 period_ns = 0;
  444. struct dsi_backlight_config *bl;
  445. if (!panel) {
  446. DSI_ERR("Invalid Params\n");
  447. return -EINVAL;
  448. }
  449. bl = &panel->bl_config;
  450. if (!bl->pwm_bl) {
  451. DSI_ERR("pwm device not found\n");
  452. return -EINVAL;
  453. }
  454. period_ns = bl->pwm_period_usecs * NSEC_PER_USEC;
  455. duty = bl_lvl * period_ns;
  456. duty /= bl->bl_max_level;
  457. rc = pwm_config(bl->pwm_bl, duty, period_ns);
  458. if (rc) {
  459. DSI_ERR("[%s] failed to change pwm config, rc=\n", panel->name,
  460. rc);
  461. goto error;
  462. }
  463. if (bl_lvl == 0 && bl->pwm_enabled) {
  464. pwm_disable(bl->pwm_bl);
  465. bl->pwm_enabled = false;
  466. return 0;
  467. }
  468. if (!bl->pwm_enabled) {
  469. rc = pwm_enable(bl->pwm_bl);
  470. if (rc) {
  471. DSI_ERR("[%s] failed to enable pwm, rc=\n", panel->name,
  472. rc);
  473. goto error;
  474. }
  475. bl->pwm_enabled = true;
  476. }
  477. error:
  478. return rc;
  479. }
  480. int dsi_panel_set_backlight(struct dsi_panel *panel, u32 bl_lvl)
  481. {
  482. int rc = 0;
  483. struct dsi_backlight_config *bl = &panel->bl_config;
  484. if (panel->host_config.ext_bridge_mode)
  485. return 0;
  486. DSI_DEBUG("backlight type:%d lvl:%d\n", bl->type, bl_lvl);
  487. switch (bl->type) {
  488. case DSI_BACKLIGHT_WLED:
  489. rc = backlight_device_set_brightness(bl->raw_bd, bl_lvl);
  490. break;
  491. case DSI_BACKLIGHT_DCS:
  492. rc = dsi_panel_update_backlight(panel, bl_lvl);
  493. break;
  494. case DSI_BACKLIGHT_EXTERNAL:
  495. break;
  496. case DSI_BACKLIGHT_PWM:
  497. rc = dsi_panel_update_pwm_backlight(panel, bl_lvl);
  498. break;
  499. default:
  500. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  501. rc = -ENOTSUPP;
  502. }
  503. return rc;
  504. }
  505. static u32 dsi_panel_get_brightness(struct dsi_backlight_config *bl)
  506. {
  507. u32 cur_bl_level;
  508. struct backlight_device *bd = bl->raw_bd;
  509. /* default the brightness level to 50% */
  510. cur_bl_level = bl->bl_max_level >> 1;
  511. switch (bl->type) {
  512. case DSI_BACKLIGHT_WLED:
  513. /* Try to query the backlight level from the backlight device */
  514. if (bd->ops && bd->ops->get_brightness)
  515. cur_bl_level = bd->ops->get_brightness(bd);
  516. break;
  517. case DSI_BACKLIGHT_DCS:
  518. case DSI_BACKLIGHT_EXTERNAL:
  519. case DSI_BACKLIGHT_PWM:
  520. default:
  521. /*
  522. * Ideally, we should read the backlight level from the
  523. * panel. For now, just set it default value.
  524. */
  525. break;
  526. }
  527. DSI_DEBUG("cur_bl_level=%d\n", cur_bl_level);
  528. return cur_bl_level;
  529. }
  530. void dsi_panel_bl_handoff(struct dsi_panel *panel)
  531. {
  532. struct dsi_backlight_config *bl = &panel->bl_config;
  533. bl->bl_level = dsi_panel_get_brightness(bl);
  534. }
  535. static int dsi_panel_pwm_register(struct dsi_panel *panel)
  536. {
  537. int rc = 0;
  538. struct dsi_backlight_config *bl = &panel->bl_config;
  539. bl->pwm_bl = devm_of_pwm_get(panel->parent, panel->panel_of_node, NULL);
  540. if (IS_ERR_OR_NULL(bl->pwm_bl)) {
  541. rc = PTR_ERR(bl->pwm_bl);
  542. DSI_ERR("[%s] failed to request pwm, rc=%d\n", panel->name,
  543. rc);
  544. return rc;
  545. }
  546. if (panel->pinctrl.pwm_pin) {
  547. rc = pinctrl_select_state(panel->pinctrl.pinctrl,
  548. panel->pinctrl.pwm_pin);
  549. if (rc)
  550. DSI_ERR("[%s] failed to set pwm pinctrl, rc=%d\n",
  551. panel->name, rc);
  552. }
  553. return 0;
  554. }
  555. static int dsi_panel_bl_register(struct dsi_panel *panel)
  556. {
  557. int rc = 0;
  558. struct dsi_backlight_config *bl = &panel->bl_config;
  559. if (panel->host_config.ext_bridge_mode)
  560. return 0;
  561. switch (bl->type) {
  562. case DSI_BACKLIGHT_WLED:
  563. rc = dsi_panel_wled_register(panel, bl);
  564. break;
  565. case DSI_BACKLIGHT_DCS:
  566. break;
  567. case DSI_BACKLIGHT_EXTERNAL:
  568. break;
  569. case DSI_BACKLIGHT_PWM:
  570. rc = dsi_panel_pwm_register(panel);
  571. break;
  572. default:
  573. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  574. rc = -ENOTSUPP;
  575. goto error;
  576. }
  577. error:
  578. return rc;
  579. }
  580. static void dsi_panel_pwm_unregister(struct dsi_panel *panel)
  581. {
  582. struct dsi_backlight_config *bl = &panel->bl_config;
  583. devm_pwm_put(panel->parent, bl->pwm_bl);
  584. }
  585. static int dsi_panel_bl_unregister(struct dsi_panel *panel)
  586. {
  587. int rc = 0;
  588. struct dsi_backlight_config *bl = &panel->bl_config;
  589. if (panel->host_config.ext_bridge_mode)
  590. return 0;
  591. switch (bl->type) {
  592. case DSI_BACKLIGHT_WLED:
  593. break;
  594. case DSI_BACKLIGHT_DCS:
  595. break;
  596. case DSI_BACKLIGHT_EXTERNAL:
  597. break;
  598. case DSI_BACKLIGHT_PWM:
  599. dsi_panel_pwm_unregister(panel);
  600. break;
  601. default:
  602. DSI_ERR("Backlight type(%d) not supported\n", bl->type);
  603. rc = -ENOTSUPP;
  604. goto error;
  605. }
  606. error:
  607. return rc;
  608. }
  609. static int dsi_panel_parse_timing(struct dsi_mode_info *mode,
  610. struct dsi_parser_utils *utils)
  611. {
  612. int rc = 0;
  613. u64 tmp64 = 0;
  614. struct dsi_display_mode *display_mode;
  615. struct dsi_display_mode_priv_info *priv_info;
  616. display_mode = container_of(mode, struct dsi_display_mode, timing);
  617. priv_info = display_mode->priv_info;
  618. rc = utils->read_u64(utils->data,
  619. "qcom,mdss-dsi-panel-clockrate", &tmp64);
  620. if (rc == -EOVERFLOW) {
  621. tmp64 = 0;
  622. rc = utils->read_u32(utils->data,
  623. "qcom,mdss-dsi-panel-clockrate", (u32 *)&tmp64);
  624. }
  625. mode->clk_rate_hz = !rc ? tmp64 : 0;
  626. display_mode->priv_info->clk_rate_hz = mode->clk_rate_hz;
  627. mode->pclk_scale.numer = 1;
  628. mode->pclk_scale.denom = 1;
  629. display_mode->priv_info->pclk_scale = mode->pclk_scale;
  630. rc = utils->read_u32(utils->data, "qcom,mdss-mdp-transfer-time-us",
  631. &mode->mdp_transfer_time_us);
  632. if (!rc)
  633. display_mode->priv_info->mdp_transfer_time_us =
  634. mode->mdp_transfer_time_us;
  635. else
  636. display_mode->priv_info->mdp_transfer_time_us = 0;
  637. rc = utils->read_u32(utils->data,
  638. "qcom,mdss-dsi-panel-framerate",
  639. &mode->refresh_rate);
  640. if (rc) {
  641. DSI_ERR("failed to read qcom,mdss-dsi-panel-framerate, rc=%d\n",
  642. rc);
  643. goto error;
  644. }
  645. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-width",
  646. &mode->h_active);
  647. if (rc) {
  648. DSI_ERR("failed to read qcom,mdss-dsi-panel-width, rc=%d\n",
  649. rc);
  650. goto error;
  651. }
  652. rc = utils->read_u32(utils->data,
  653. "qcom,mdss-dsi-h-front-porch",
  654. &mode->h_front_porch);
  655. if (rc) {
  656. DSI_ERR("failed to read qcom,mdss-dsi-h-front-porch, rc=%d\n",
  657. rc);
  658. goto error;
  659. }
  660. rc = utils->read_u32(utils->data,
  661. "qcom,mdss-dsi-h-back-porch",
  662. &mode->h_back_porch);
  663. if (rc) {
  664. DSI_ERR("failed to read qcom,mdss-dsi-h-back-porch, rc=%d\n",
  665. rc);
  666. goto error;
  667. }
  668. rc = utils->read_u32(utils->data,
  669. "qcom,mdss-dsi-h-pulse-width",
  670. &mode->h_sync_width);
  671. if (rc) {
  672. DSI_ERR("failed to read qcom,mdss-dsi-h-pulse-width, rc=%d\n",
  673. rc);
  674. goto error;
  675. }
  676. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-skew",
  677. &mode->h_skew);
  678. if (rc)
  679. DSI_DEBUG("qcom,mdss-dsi-h-sync-skew is not defined, rc=%d\n",
  680. rc);
  681. DSI_DEBUG("panel horz active:%d front_portch:%d back_porch:%d sync_skew:%d\n",
  682. mode->h_active, mode->h_front_porch, mode->h_back_porch,
  683. mode->h_sync_width);
  684. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-height",
  685. &mode->v_active);
  686. if (rc) {
  687. DSI_ERR("failed to read qcom,mdss-dsi-panel-height, rc=%d\n",
  688. rc);
  689. goto error;
  690. }
  691. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-back-porch",
  692. &mode->v_back_porch);
  693. if (rc) {
  694. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  695. rc);
  696. goto error;
  697. }
  698. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-front-porch",
  699. &mode->v_front_porch);
  700. if (rc) {
  701. DSI_ERR("failed to read qcom,mdss-dsi-v-back-porch, rc=%d\n",
  702. rc);
  703. goto error;
  704. }
  705. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-v-pulse-width",
  706. &mode->v_sync_width);
  707. if (rc) {
  708. DSI_ERR("failed to read qcom,mdss-dsi-v-pulse-width, rc=%d\n",
  709. rc);
  710. goto error;
  711. }
  712. DSI_DEBUG("panel vert active:%d front_portch:%d back_porch:%d pulse_width:%d\n",
  713. mode->v_active, mode->v_front_porch, mode->v_back_porch,
  714. mode->v_sync_width);
  715. error:
  716. return rc;
  717. }
  718. static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
  719. struct dsi_parser_utils *utils,
  720. const char *name)
  721. {
  722. int rc = 0;
  723. u32 bpp = 0;
  724. enum dsi_pixel_format fmt;
  725. const char *packing;
  726. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bpp", &bpp);
  727. if (rc) {
  728. DSI_ERR("[%s] failed to read qcom,mdss-dsi-bpp, rc=%d\n",
  729. name, rc);
  730. return rc;
  731. }
  732. host->bpp = bpp;
  733. switch (bpp) {
  734. case 3:
  735. fmt = DSI_PIXEL_FORMAT_RGB111;
  736. break;
  737. case 8:
  738. fmt = DSI_PIXEL_FORMAT_RGB332;
  739. break;
  740. case 12:
  741. fmt = DSI_PIXEL_FORMAT_RGB444;
  742. break;
  743. case 16:
  744. fmt = DSI_PIXEL_FORMAT_RGB565;
  745. break;
  746. case 18:
  747. fmt = DSI_PIXEL_FORMAT_RGB666;
  748. break;
  749. case 24:
  750. default:
  751. fmt = DSI_PIXEL_FORMAT_RGB888;
  752. break;
  753. }
  754. if (fmt == DSI_PIXEL_FORMAT_RGB666) {
  755. packing = utils->get_property(utils->data,
  756. "qcom,mdss-dsi-pixel-packing",
  757. NULL);
  758. if (packing && !strcmp(packing, "loose"))
  759. fmt = DSI_PIXEL_FORMAT_RGB666_LOOSE;
  760. }
  761. host->dst_format = fmt;
  762. return rc;
  763. }
  764. static int dsi_panel_parse_lane_states(struct dsi_host_common_cfg *host,
  765. struct dsi_parser_utils *utils,
  766. const char *name)
  767. {
  768. int rc = 0;
  769. bool lane_enabled;
  770. u32 num_of_lanes = 0;
  771. lane_enabled = utils->read_bool(utils->data,
  772. "qcom,mdss-dsi-lane-0-state");
  773. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_0 : 0);
  774. lane_enabled = utils->read_bool(utils->data,
  775. "qcom,mdss-dsi-lane-1-state");
  776. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_1 : 0);
  777. lane_enabled = utils->read_bool(utils->data,
  778. "qcom,mdss-dsi-lane-2-state");
  779. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_2 : 0);
  780. lane_enabled = utils->read_bool(utils->data,
  781. "qcom,mdss-dsi-lane-3-state");
  782. host->data_lanes |= (lane_enabled ? DSI_DATA_LANE_3 : 0);
  783. if (host->data_lanes & DSI_DATA_LANE_0)
  784. num_of_lanes++;
  785. if (host->data_lanes & DSI_DATA_LANE_1)
  786. num_of_lanes++;
  787. if (host->data_lanes & DSI_DATA_LANE_2)
  788. num_of_lanes++;
  789. if (host->data_lanes & DSI_DATA_LANE_3)
  790. num_of_lanes++;
  791. host->num_data_lanes = num_of_lanes;
  792. if (host->data_lanes == 0) {
  793. DSI_ERR("[%s] No data lanes are enabled, rc=%d\n", name, rc);
  794. rc = -EINVAL;
  795. }
  796. return rc;
  797. }
  798. static int dsi_panel_parse_color_swap(struct dsi_host_common_cfg *host,
  799. struct dsi_parser_utils *utils,
  800. const char *name)
  801. {
  802. int rc = 0;
  803. const char *swap_mode;
  804. swap_mode = utils->get_property(utils->data,
  805. "qcom,mdss-dsi-color-order", NULL);
  806. if (swap_mode) {
  807. if (!strcmp(swap_mode, "rgb_swap_rgb")) {
  808. host->swap_mode = DSI_COLOR_SWAP_RGB;
  809. } else if (!strcmp(swap_mode, "rgb_swap_rbg")) {
  810. host->swap_mode = DSI_COLOR_SWAP_RBG;
  811. } else if (!strcmp(swap_mode, "rgb_swap_brg")) {
  812. host->swap_mode = DSI_COLOR_SWAP_BRG;
  813. } else if (!strcmp(swap_mode, "rgb_swap_grb")) {
  814. host->swap_mode = DSI_COLOR_SWAP_GRB;
  815. } else if (!strcmp(swap_mode, "rgb_swap_gbr")) {
  816. host->swap_mode = DSI_COLOR_SWAP_GBR;
  817. } else {
  818. DSI_ERR("[%s] Unrecognized color order-%s\n",
  819. name, swap_mode);
  820. rc = -EINVAL;
  821. }
  822. } else {
  823. DSI_DEBUG("[%s] Falling back to default color order\n", name);
  824. host->swap_mode = DSI_COLOR_SWAP_RGB;
  825. }
  826. /* bit swap on color channel is not defined in dt */
  827. host->bit_swap_red = false;
  828. host->bit_swap_green = false;
  829. host->bit_swap_blue = false;
  830. return rc;
  831. }
  832. static int dsi_panel_parse_triggers(struct dsi_host_common_cfg *host,
  833. struct dsi_parser_utils *utils,
  834. const char *name)
  835. {
  836. const char *trig;
  837. int rc = 0;
  838. trig = utils->get_property(utils->data,
  839. "qcom,mdss-dsi-mdp-trigger", NULL);
  840. if (trig) {
  841. if (!strcmp(trig, "none")) {
  842. host->mdp_cmd_trigger = DSI_TRIGGER_NONE;
  843. } else if (!strcmp(trig, "trigger_te")) {
  844. host->mdp_cmd_trigger = DSI_TRIGGER_TE;
  845. } else if (!strcmp(trig, "trigger_sw")) {
  846. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  847. } else if (!strcmp(trig, "trigger_sw_te")) {
  848. host->mdp_cmd_trigger = DSI_TRIGGER_SW_TE;
  849. } else {
  850. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  851. name, trig);
  852. rc = -EINVAL;
  853. }
  854. } else {
  855. DSI_DEBUG("[%s] Falling back to default MDP trigger\n",
  856. name);
  857. host->mdp_cmd_trigger = DSI_TRIGGER_SW;
  858. }
  859. trig = utils->get_property(utils->data,
  860. "qcom,mdss-dsi-dma-trigger", NULL);
  861. if (trig) {
  862. if (!strcmp(trig, "none")) {
  863. host->dma_cmd_trigger = DSI_TRIGGER_NONE;
  864. } else if (!strcmp(trig, "trigger_te")) {
  865. host->dma_cmd_trigger = DSI_TRIGGER_TE;
  866. } else if (!strcmp(trig, "trigger_sw")) {
  867. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  868. } else if (!strcmp(trig, "trigger_sw_seof")) {
  869. host->dma_cmd_trigger = DSI_TRIGGER_SW_SEOF;
  870. } else if (!strcmp(trig, "trigger_sw_te")) {
  871. host->dma_cmd_trigger = DSI_TRIGGER_SW_TE;
  872. } else {
  873. DSI_ERR("[%s] Unrecognized mdp trigger type (%s)\n",
  874. name, trig);
  875. rc = -EINVAL;
  876. }
  877. } else {
  878. DSI_DEBUG("[%s] Falling back to default MDP trigger\n", name);
  879. host->dma_cmd_trigger = DSI_TRIGGER_SW;
  880. }
  881. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-pin-select",
  882. &host->te_mode);
  883. if (rc) {
  884. DSI_WARN("[%s] fallback to default te-pin-select\n", name);
  885. host->te_mode = 1;
  886. rc = 0;
  887. }
  888. return rc;
  889. }
  890. static int dsi_panel_parse_misc_host_config(struct dsi_host_common_cfg *host,
  891. struct dsi_parser_utils *utils,
  892. const char *name)
  893. {
  894. u32 val = 0, line_no = 0, window = 0;
  895. int rc = 0;
  896. bool panel_cphy_mode = false;
  897. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-post", &val);
  898. if (!rc) {
  899. host->t_clk_post = val;
  900. DSI_DEBUG("[%s] t_clk_post = %d\n", name, val);
  901. }
  902. val = 0;
  903. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-t-clk-pre", &val);
  904. if (!rc) {
  905. host->t_clk_pre = val;
  906. DSI_DEBUG("[%s] t_clk_pre = %d\n", name, val);
  907. }
  908. host->ignore_rx_eot = utils->read_bool(utils->data,
  909. "qcom,mdss-dsi-rx-eot-ignore");
  910. host->append_tx_eot = utils->read_bool(utils->data,
  911. "qcom,mdss-dsi-tx-eot-append");
  912. host->ext_bridge_mode = utils->read_bool(utils->data,
  913. "qcom,mdss-dsi-ext-bridge-mode");
  914. host->force_hs_clk_lane = utils->read_bool(utils->data,
  915. "qcom,mdss-dsi-force-clock-lane-hs");
  916. panel_cphy_mode = utils->read_bool(utils->data,
  917. "qcom,panel-cphy-mode");
  918. host->phy_type = panel_cphy_mode ? DSI_PHY_TYPE_CPHY
  919. : DSI_PHY_TYPE_DPHY;
  920. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-line",
  921. &line_no);
  922. if (rc)
  923. host->dma_sched_line = 0;
  924. else
  925. host->dma_sched_line = line_no;
  926. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-dma-schedule-window",
  927. &window);
  928. if (rc)
  929. host->dma_sched_window = 0;
  930. else
  931. host->dma_sched_window = window;
  932. DSI_DEBUG("[%s] DMA scheduling parameters Line: %d Window: %d\n", name,
  933. host->dma_sched_line, host->dma_sched_window);
  934. return 0;
  935. }
  936. static void dsi_panel_parse_split_link_config(struct dsi_host_common_cfg *host,
  937. struct dsi_parser_utils *utils,
  938. const char *name)
  939. {
  940. int rc = 0;
  941. u32 val = 0;
  942. bool supported = false;
  943. struct dsi_split_link_config *split_link = &host->split_link;
  944. supported = utils->read_bool(utils->data, "qcom,split-link-enabled");
  945. if (!supported) {
  946. DSI_DEBUG("[%s] Split link is not supported\n", name);
  947. split_link->split_link_enabled = false;
  948. return;
  949. }
  950. rc = utils->read_u32(utils->data, "qcom,sublinks-count", &val);
  951. if (rc || val < 1) {
  952. DSI_DEBUG("[%s] Using default sublinks count\n", name);
  953. split_link->num_sublinks = 2;
  954. } else {
  955. split_link->num_sublinks = val;
  956. }
  957. rc = utils->read_u32(utils->data, "qcom,lanes-per-sublink", &val);
  958. if (rc || val < 1) {
  959. DSI_DEBUG("[%s] Using default lanes per sublink\n", name);
  960. split_link->lanes_per_sublink = 2;
  961. } else {
  962. split_link->lanes_per_sublink = val;
  963. }
  964. DSI_DEBUG("[%s] Split link is supported %d-%d\n", name,
  965. split_link->num_sublinks, split_link->lanes_per_sublink);
  966. split_link->split_link_enabled = true;
  967. }
  968. static int dsi_panel_parse_host_config(struct dsi_panel *panel)
  969. {
  970. int rc = 0;
  971. struct dsi_parser_utils *utils = &panel->utils;
  972. rc = dsi_panel_parse_pixel_format(&panel->host_config, utils,
  973. panel->name);
  974. if (rc) {
  975. DSI_ERR("[%s] failed to get pixel format, rc=%d\n",
  976. panel->name, rc);
  977. goto error;
  978. }
  979. rc = dsi_panel_parse_lane_states(&panel->host_config, utils,
  980. panel->name);
  981. if (rc) {
  982. DSI_ERR("[%s] failed to parse lane states, rc=%d\n",
  983. panel->name, rc);
  984. goto error;
  985. }
  986. rc = dsi_panel_parse_color_swap(&panel->host_config, utils,
  987. panel->name);
  988. if (rc) {
  989. DSI_ERR("[%s] failed to parse color swap config, rc=%d\n",
  990. panel->name, rc);
  991. goto error;
  992. }
  993. rc = dsi_panel_parse_triggers(&panel->host_config, utils,
  994. panel->name);
  995. if (rc) {
  996. DSI_ERR("[%s] failed to parse triggers, rc=%d\n",
  997. panel->name, rc);
  998. goto error;
  999. }
  1000. rc = dsi_panel_parse_misc_host_config(&panel->host_config, utils,
  1001. panel->name);
  1002. if (rc) {
  1003. DSI_ERR("[%s] failed to parse misc host config, rc=%d\n",
  1004. panel->name, rc);
  1005. goto error;
  1006. }
  1007. dsi_panel_parse_split_link_config(&panel->host_config, utils,
  1008. panel->name);
  1009. error:
  1010. return rc;
  1011. }
  1012. static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
  1013. struct device_node *of_node)
  1014. {
  1015. int rc = 0;
  1016. u32 val = 0;
  1017. rc = of_property_read_u32(of_node,
  1018. "qcom,mdss-dsi-qsync-min-refresh-rate",
  1019. &val);
  1020. if (rc)
  1021. DSI_DEBUG("[%s] qsync min fps not defined rc:%d\n",
  1022. panel->name, rc);
  1023. panel->qsync_min_fps = val;
  1024. return rc;
  1025. }
  1026. static int dsi_panel_parse_dyn_clk_caps(struct dsi_panel *panel)
  1027. {
  1028. int rc = 0;
  1029. bool supported = false;
  1030. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  1031. struct dsi_parser_utils *utils = &panel->utils;
  1032. const char *name = panel->name;
  1033. const char *type;
  1034. supported = utils->read_bool(utils->data, "qcom,dsi-dyn-clk-enable");
  1035. if (!supported) {
  1036. dyn_clk_caps->dyn_clk_support = false;
  1037. return rc;
  1038. }
  1039. dyn_clk_caps->bit_clk_list_len = utils->count_u32_elems(utils->data,
  1040. "qcom,dsi-dyn-clk-list");
  1041. if (dyn_clk_caps->bit_clk_list_len < 1) {
  1042. DSI_ERR("[%s] failed to get supported bit clk list\n", name);
  1043. return -EINVAL;
  1044. }
  1045. dyn_clk_caps->bit_clk_list = kcalloc(dyn_clk_caps->bit_clk_list_len,
  1046. sizeof(u32), GFP_KERNEL);
  1047. if (!dyn_clk_caps->bit_clk_list)
  1048. return -ENOMEM;
  1049. rc = utils->read_u32_array(utils->data, "qcom,dsi-dyn-clk-list",
  1050. dyn_clk_caps->bit_clk_list,
  1051. dyn_clk_caps->bit_clk_list_len);
  1052. if (rc) {
  1053. DSI_ERR("[%s] failed to parse supported bit clk list\n", name);
  1054. return -EINVAL;
  1055. }
  1056. dyn_clk_caps->dyn_clk_support = true;
  1057. type = utils->get_property(utils->data,
  1058. "qcom,dsi-dyn-clk-type", NULL);
  1059. if (!type) {
  1060. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1061. dyn_clk_caps->maintain_const_fps = false;
  1062. return 0;
  1063. }
  1064. if (!strcmp(type, "constant-fps-adjust-hfp")) {
  1065. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_HFP;
  1066. dyn_clk_caps->maintain_const_fps = true;
  1067. } else if (!strcmp(type, "constant-fps-adjust-vfp")) {
  1068. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_CONST_FPS_ADJUST_VFP;
  1069. dyn_clk_caps->maintain_const_fps = true;
  1070. } else {
  1071. dyn_clk_caps->type = DSI_DYN_CLK_TYPE_LEGACY;
  1072. dyn_clk_caps->maintain_const_fps = false;
  1073. }
  1074. DSI_DEBUG("Dynamic clock type is [%s]\n", type);
  1075. return 0;
  1076. }
  1077. static int dsi_panel_parse_dfps_caps(struct dsi_panel *panel)
  1078. {
  1079. int rc = 0;
  1080. bool supported = false;
  1081. struct dsi_dfps_capabilities *dfps_caps = &panel->dfps_caps;
  1082. struct dsi_parser_utils *utils = &panel->utils;
  1083. const char *name = panel->name;
  1084. const char *type;
  1085. u32 i;
  1086. supported = utils->read_bool(utils->data,
  1087. "qcom,mdss-dsi-pan-enable-dynamic-fps");
  1088. if (!supported) {
  1089. DSI_DEBUG("[%s] DFPS is not supported\n", name);
  1090. dfps_caps->dfps_support = false;
  1091. return rc;
  1092. }
  1093. type = utils->get_property(utils->data,
  1094. "qcom,mdss-dsi-pan-fps-update", NULL);
  1095. if (!type) {
  1096. DSI_ERR("[%s] dfps type not defined\n", name);
  1097. rc = -EINVAL;
  1098. goto error;
  1099. } else if (!strcmp(type, "dfps_suspend_resume_mode")) {
  1100. dfps_caps->type = DSI_DFPS_SUSPEND_RESUME;
  1101. } else if (!strcmp(type, "dfps_immediate_clk_mode")) {
  1102. dfps_caps->type = DSI_DFPS_IMMEDIATE_CLK;
  1103. } else if (!strcmp(type, "dfps_immediate_porch_mode_hfp")) {
  1104. dfps_caps->type = DSI_DFPS_IMMEDIATE_HFP;
  1105. } else if (!strcmp(type, "dfps_immediate_porch_mode_vfp")) {
  1106. dfps_caps->type = DSI_DFPS_IMMEDIATE_VFP;
  1107. } else {
  1108. DSI_ERR("[%s] dfps type is not recognized\n", name);
  1109. rc = -EINVAL;
  1110. goto error;
  1111. }
  1112. dfps_caps->dfps_list_len = utils->count_u32_elems(utils->data,
  1113. "qcom,dsi-supported-dfps-list");
  1114. if (dfps_caps->dfps_list_len < 1) {
  1115. DSI_ERR("[%s] dfps refresh list not present\n", name);
  1116. rc = -EINVAL;
  1117. goto error;
  1118. }
  1119. dfps_caps->dfps_list = kcalloc(dfps_caps->dfps_list_len, sizeof(u32),
  1120. GFP_KERNEL);
  1121. if (!dfps_caps->dfps_list) {
  1122. rc = -ENOMEM;
  1123. goto error;
  1124. }
  1125. rc = utils->read_u32_array(utils->data,
  1126. "qcom,dsi-supported-dfps-list",
  1127. dfps_caps->dfps_list,
  1128. dfps_caps->dfps_list_len);
  1129. if (rc) {
  1130. DSI_ERR("[%s] dfps refresh rate list parse failed\n", name);
  1131. rc = -EINVAL;
  1132. goto error;
  1133. }
  1134. dfps_caps->dfps_support = true;
  1135. /* calculate max and min fps */
  1136. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[0];
  1137. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[0];
  1138. for (i = 1; i < dfps_caps->dfps_list_len; i++) {
  1139. if (dfps_caps->dfps_list[i] < dfps_caps->min_refresh_rate)
  1140. dfps_caps->min_refresh_rate = dfps_caps->dfps_list[i];
  1141. else if (dfps_caps->dfps_list[i] > dfps_caps->max_refresh_rate)
  1142. dfps_caps->max_refresh_rate = dfps_caps->dfps_list[i];
  1143. }
  1144. error:
  1145. return rc;
  1146. }
  1147. static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg,
  1148. struct dsi_parser_utils *utils,
  1149. const char *name)
  1150. {
  1151. int rc = 0;
  1152. const char *traffic_mode;
  1153. u32 vc_id = 0;
  1154. u32 val = 0;
  1155. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-h-sync-pulse", &val);
  1156. if (rc) {
  1157. DSI_DEBUG("[%s] fallback to default h-sync-pulse\n", name);
  1158. cfg->pulse_mode_hsa_he = false;
  1159. } else if (val == 1) {
  1160. cfg->pulse_mode_hsa_he = true;
  1161. } else if (val == 0) {
  1162. cfg->pulse_mode_hsa_he = false;
  1163. } else {
  1164. DSI_ERR("[%s] Unrecognized value for mdss-dsi-h-sync-pulse\n",
  1165. name);
  1166. rc = -EINVAL;
  1167. goto error;
  1168. }
  1169. cfg->hfp_lp11_en = utils->read_bool(utils->data,
  1170. "qcom,mdss-dsi-hfp-power-mode");
  1171. cfg->hbp_lp11_en = utils->read_bool(utils->data,
  1172. "qcom,mdss-dsi-hbp-power-mode");
  1173. cfg->hsa_lp11_en = utils->read_bool(utils->data,
  1174. "qcom,mdss-dsi-hsa-power-mode");
  1175. cfg->last_line_interleave_en = utils->read_bool(utils->data,
  1176. "qcom,mdss-dsi-last-line-interleave");
  1177. cfg->eof_bllp_lp11_en = utils->read_bool(utils->data,
  1178. "qcom,mdss-dsi-bllp-eof-power-mode");
  1179. cfg->bllp_lp11_en = utils->read_bool(utils->data,
  1180. "qcom,mdss-dsi-bllp-power-mode");
  1181. traffic_mode = utils->get_property(utils->data,
  1182. "qcom,mdss-dsi-traffic-mode",
  1183. NULL);
  1184. if (!traffic_mode) {
  1185. DSI_DEBUG("[%s] Falling back to default traffic mode\n", name);
  1186. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1187. } else if (!strcmp(traffic_mode, "non_burst_sync_pulse")) {
  1188. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_PULSES;
  1189. } else if (!strcmp(traffic_mode, "non_burst_sync_event")) {
  1190. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_SYNC_START_EVENTS;
  1191. } else if (!strcmp(traffic_mode, "burst_mode")) {
  1192. cfg->traffic_mode = DSI_VIDEO_TRAFFIC_BURST_MODE;
  1193. } else {
  1194. DSI_ERR("[%s] Unrecognized traffic mode-%s\n", name,
  1195. traffic_mode);
  1196. rc = -EINVAL;
  1197. goto error;
  1198. }
  1199. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-virtual-channel-id",
  1200. &vc_id);
  1201. if (rc) {
  1202. DSI_DEBUG("[%s] Fallback to default vc id\n", name);
  1203. cfg->vc_id = 0;
  1204. } else {
  1205. cfg->vc_id = vc_id;
  1206. }
  1207. error:
  1208. return rc;
  1209. }
  1210. static int dsi_panel_parse_cmd_host_config(struct dsi_cmd_engine_cfg *cfg,
  1211. struct dsi_parser_utils *utils,
  1212. const char *name)
  1213. {
  1214. u32 val = 0;
  1215. int rc = 0;
  1216. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-start", &val);
  1217. if (rc) {
  1218. DSI_DEBUG("[%s] Fallback to default wr-mem-start\n", name);
  1219. cfg->wr_mem_start = 0x2C;
  1220. } else {
  1221. cfg->wr_mem_start = val;
  1222. }
  1223. val = 0;
  1224. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-wr-mem-continue",
  1225. &val);
  1226. if (rc) {
  1227. DSI_DEBUG("[%s] Fallback to default wr-mem-continue\n", name);
  1228. cfg->wr_mem_continue = 0x3C;
  1229. } else {
  1230. cfg->wr_mem_continue = val;
  1231. }
  1232. /* TODO: fix following */
  1233. cfg->max_cmd_packets_interleave = 0;
  1234. val = 0;
  1235. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-te-dcs-command",
  1236. &val);
  1237. if (rc) {
  1238. DSI_DEBUG("[%s] fallback to default te-dcs-cmd\n", name);
  1239. cfg->insert_dcs_command = true;
  1240. } else if (val == 1) {
  1241. cfg->insert_dcs_command = true;
  1242. } else if (val == 0) {
  1243. cfg->insert_dcs_command = false;
  1244. } else {
  1245. DSI_ERR("[%s] Unrecognized value for mdss-dsi-te-dcs-command\n",
  1246. name);
  1247. rc = -EINVAL;
  1248. goto error;
  1249. }
  1250. error:
  1251. return rc;
  1252. }
  1253. static int dsi_panel_parse_panel_mode(struct dsi_panel *panel)
  1254. {
  1255. int rc = 0;
  1256. struct dsi_parser_utils *utils = &panel->utils;
  1257. bool panel_mode_switch_enabled;
  1258. enum dsi_op_mode panel_mode;
  1259. const char *mode;
  1260. mode = utils->get_property(utils->data,
  1261. "qcom,mdss-dsi-panel-type", NULL);
  1262. if (!mode) {
  1263. DSI_DEBUG("[%s] Fallback to default panel mode\n", panel->name);
  1264. panel_mode = DSI_OP_VIDEO_MODE;
  1265. } else if (!strcmp(mode, "dsi_video_mode")) {
  1266. panel_mode = DSI_OP_VIDEO_MODE;
  1267. } else if (!strcmp(mode, "dsi_cmd_mode")) {
  1268. panel_mode = DSI_OP_CMD_MODE;
  1269. } else {
  1270. DSI_ERR("[%s] Unrecognized panel type-%s\n", panel->name, mode);
  1271. rc = -EINVAL;
  1272. goto error;
  1273. }
  1274. panel_mode_switch_enabled = utils->read_bool(utils->data,
  1275. "qcom,mdss-dsi-panel-mode-switch");
  1276. DSI_DEBUG("%s: panel operating mode switch feature %s\n", __func__,
  1277. (panel_mode_switch_enabled ? "enabled" : "disabled"));
  1278. if (panel_mode == DSI_OP_VIDEO_MODE || panel_mode_switch_enabled) {
  1279. rc = dsi_panel_parse_video_host_config(&panel->video_config,
  1280. utils,
  1281. panel->name);
  1282. if (rc) {
  1283. DSI_ERR("[%s] Failed to parse video host cfg, rc=%d\n",
  1284. panel->name, rc);
  1285. goto error;
  1286. }
  1287. }
  1288. if (panel_mode == DSI_OP_CMD_MODE || panel_mode_switch_enabled) {
  1289. rc = dsi_panel_parse_cmd_host_config(&panel->cmd_config,
  1290. utils,
  1291. panel->name);
  1292. if (rc) {
  1293. DSI_ERR("[%s] Failed to parse cmd host config, rc=%d\n",
  1294. panel->name, rc);
  1295. goto error;
  1296. }
  1297. }
  1298. panel->poms_align_vsync = utils->read_bool(utils->data,
  1299. "qcom,poms-align-panel-vsync");
  1300. panel->panel_mode = panel_mode;
  1301. panel->panel_mode_switch_enabled = panel_mode_switch_enabled;
  1302. error:
  1303. return rc;
  1304. }
  1305. static int dsi_panel_parse_phy_props(struct dsi_panel *panel)
  1306. {
  1307. int rc = 0;
  1308. u32 val = 0;
  1309. const char *str;
  1310. struct dsi_panel_phy_props *props = &panel->phy_props;
  1311. struct dsi_parser_utils *utils = &panel->utils;
  1312. const char *name = panel->name;
  1313. rc = utils->read_u32(utils->data,
  1314. "qcom,mdss-pan-physical-width-dimension", &val);
  1315. if (rc) {
  1316. DSI_DEBUG("[%s] Physical panel width is not defined\n", name);
  1317. props->panel_width_mm = 0;
  1318. rc = 0;
  1319. } else {
  1320. props->panel_width_mm = val;
  1321. }
  1322. rc = utils->read_u32(utils->data,
  1323. "qcom,mdss-pan-physical-height-dimension",
  1324. &val);
  1325. if (rc) {
  1326. DSI_DEBUG("[%s] Physical panel height is not defined\n", name);
  1327. props->panel_height_mm = 0;
  1328. rc = 0;
  1329. } else {
  1330. props->panel_height_mm = val;
  1331. }
  1332. str = utils->get_property(utils->data,
  1333. "qcom,mdss-dsi-panel-orientation", NULL);
  1334. if (!str) {
  1335. props->rotation = DSI_PANEL_ROTATE_NONE;
  1336. } else if (!strcmp(str, "180")) {
  1337. props->rotation = DSI_PANEL_ROTATE_HV_FLIP;
  1338. } else if (!strcmp(str, "hflip")) {
  1339. props->rotation = DSI_PANEL_ROTATE_H_FLIP;
  1340. } else if (!strcmp(str, "vflip")) {
  1341. props->rotation = DSI_PANEL_ROTATE_V_FLIP;
  1342. } else {
  1343. DSI_ERR("[%s] Unrecognized panel rotation-%s\n", name, str);
  1344. rc = -EINVAL;
  1345. goto error;
  1346. }
  1347. error:
  1348. return rc;
  1349. }
  1350. const char *cmd_set_prop_map[DSI_CMD_SET_MAX] = {
  1351. "qcom,mdss-dsi-pre-on-command",
  1352. "qcom,mdss-dsi-on-command",
  1353. "qcom,mdss-dsi-post-panel-on-command",
  1354. "qcom,mdss-dsi-pre-off-command",
  1355. "qcom,mdss-dsi-off-command",
  1356. "qcom,mdss-dsi-post-off-command",
  1357. "qcom,mdss-dsi-pre-res-switch",
  1358. "qcom,mdss-dsi-res-switch",
  1359. "qcom,mdss-dsi-post-res-switch",
  1360. "qcom,cmd-to-video-mode-switch-commands",
  1361. "qcom,cmd-to-video-mode-post-switch-commands",
  1362. "qcom,video-to-cmd-mode-switch-commands",
  1363. "qcom,video-to-cmd-mode-post-switch-commands",
  1364. "qcom,mdss-dsi-panel-status-command",
  1365. "qcom,mdss-dsi-lp1-command",
  1366. "qcom,mdss-dsi-lp2-command",
  1367. "qcom,mdss-dsi-nolp-command",
  1368. "PPS not parsed from DTSI, generated dynamically",
  1369. "ROI not parsed from DTSI, generated dynamically",
  1370. "qcom,mdss-dsi-timing-switch-command",
  1371. "qcom,mdss-dsi-post-mode-switch-on-command",
  1372. "qcom,mdss-dsi-qsync-on-commands",
  1373. "qcom,mdss-dsi-qsync-off-commands",
  1374. };
  1375. const char *cmd_set_state_map[DSI_CMD_SET_MAX] = {
  1376. "qcom,mdss-dsi-pre-on-command-state",
  1377. "qcom,mdss-dsi-on-command-state",
  1378. "qcom,mdss-dsi-post-on-command-state",
  1379. "qcom,mdss-dsi-pre-off-command-state",
  1380. "qcom,mdss-dsi-off-command-state",
  1381. "qcom,mdss-dsi-post-off-command-state",
  1382. "qcom,mdss-dsi-pre-res-switch-state",
  1383. "qcom,mdss-dsi-res-switch-state",
  1384. "qcom,mdss-dsi-post-res-switch-state",
  1385. "qcom,cmd-to-video-mode-switch-commands-state",
  1386. "qcom,cmd-to-video-mode-post-switch-commands-state",
  1387. "qcom,video-to-cmd-mode-switch-commands-state",
  1388. "qcom,video-to-cmd-mode-post-switch-commands-state",
  1389. "qcom,mdss-dsi-panel-status-command-state",
  1390. "qcom,mdss-dsi-lp1-command-state",
  1391. "qcom,mdss-dsi-lp2-command-state",
  1392. "qcom,mdss-dsi-nolp-command-state",
  1393. "PPS not parsed from DTSI, generated dynamically",
  1394. "ROI not parsed from DTSI, generated dynamically",
  1395. "qcom,mdss-dsi-timing-switch-command-state",
  1396. "qcom,mdss-dsi-post-mode-switch-on-command-state",
  1397. "qcom,mdss-dsi-qsync-on-commands-state",
  1398. "qcom,mdss-dsi-qsync-off-commands-state",
  1399. };
  1400. static int dsi_panel_get_cmd_pkt_count(const char *data, u32 length, u32 *cnt)
  1401. {
  1402. const u32 cmd_set_min_size = 7;
  1403. u32 count = 0;
  1404. u32 packet_length;
  1405. u32 tmp;
  1406. while (length >= cmd_set_min_size) {
  1407. packet_length = cmd_set_min_size;
  1408. tmp = ((data[5] << 8) | (data[6]));
  1409. packet_length += tmp;
  1410. if (packet_length > length) {
  1411. DSI_ERR("format error\n");
  1412. return -EINVAL;
  1413. }
  1414. length -= packet_length;
  1415. data += packet_length;
  1416. count++;
  1417. }
  1418. *cnt = count;
  1419. return 0;
  1420. }
  1421. static int dsi_panel_create_cmd_packets(const char *data,
  1422. u32 length,
  1423. u32 count,
  1424. struct dsi_cmd_desc *cmd)
  1425. {
  1426. int rc = 0;
  1427. int i, j;
  1428. u8 *payload;
  1429. for (i = 0; i < count; i++) {
  1430. u32 size;
  1431. cmd[i].msg.type = data[0];
  1432. cmd[i].last_command = (data[1] == 1);
  1433. cmd[i].msg.channel = data[2];
  1434. cmd[i].msg.flags |= data[3];
  1435. cmd[i].msg.ctrl = 0;
  1436. cmd[i].post_wait_ms = cmd[i].msg.wait_ms = data[4];
  1437. cmd[i].msg.tx_len = ((data[5] << 8) | (data[6]));
  1438. size = cmd[i].msg.tx_len * sizeof(u8);
  1439. payload = kzalloc(size, GFP_KERNEL);
  1440. if (!payload) {
  1441. rc = -ENOMEM;
  1442. goto error_free_payloads;
  1443. }
  1444. for (j = 0; j < cmd[i].msg.tx_len; j++)
  1445. payload[j] = data[7 + j];
  1446. cmd[i].msg.tx_buf = payload;
  1447. data += (7 + cmd[i].msg.tx_len);
  1448. }
  1449. return rc;
  1450. error_free_payloads:
  1451. for (i = i - 1; i >= 0; i--) {
  1452. cmd--;
  1453. kfree(cmd->msg.tx_buf);
  1454. }
  1455. return rc;
  1456. }
  1457. static void dsi_panel_destroy_cmd_packets(struct dsi_panel_cmd_set *set)
  1458. {
  1459. u32 i = 0;
  1460. struct dsi_cmd_desc *cmd;
  1461. for (i = 0; i < set->count; i++) {
  1462. cmd = &set->cmds[i];
  1463. kfree(cmd->msg.tx_buf);
  1464. }
  1465. }
  1466. static void dsi_panel_dealloc_cmd_packets(struct dsi_panel_cmd_set *set)
  1467. {
  1468. kfree(set->cmds);
  1469. }
  1470. static int dsi_panel_alloc_cmd_packets(struct dsi_panel_cmd_set *cmd,
  1471. u32 packet_count)
  1472. {
  1473. u32 size;
  1474. size = packet_count * sizeof(*cmd->cmds);
  1475. cmd->cmds = kzalloc(size, GFP_KERNEL);
  1476. if (!cmd->cmds)
  1477. return -ENOMEM;
  1478. cmd->count = packet_count;
  1479. return 0;
  1480. }
  1481. static int dsi_panel_parse_cmd_sets_sub(struct dsi_panel_cmd_set *cmd,
  1482. enum dsi_cmd_set_type type,
  1483. struct dsi_parser_utils *utils)
  1484. {
  1485. int rc = 0;
  1486. u32 length = 0;
  1487. const char *data;
  1488. const char *state;
  1489. u32 packet_count = 0;
  1490. data = utils->get_property(utils->data, cmd_set_prop_map[type],
  1491. &length);
  1492. if (!data) {
  1493. DSI_DEBUG("%s commands not defined\n", cmd_set_prop_map[type]);
  1494. rc = -ENOTSUPP;
  1495. goto error;
  1496. }
  1497. DSI_DEBUG("type=%d, name=%s, length=%d\n", type,
  1498. cmd_set_prop_map[type], length);
  1499. print_hex_dump_debug("", DUMP_PREFIX_NONE,
  1500. 8, 1, data, length, false);
  1501. rc = dsi_panel_get_cmd_pkt_count(data, length, &packet_count);
  1502. if (rc) {
  1503. DSI_ERR("commands failed, rc=%d\n", rc);
  1504. goto error;
  1505. }
  1506. DSI_DEBUG("[%s] packet-count=%d, %d\n", cmd_set_prop_map[type],
  1507. packet_count, length);
  1508. rc = dsi_panel_alloc_cmd_packets(cmd, packet_count);
  1509. if (rc) {
  1510. DSI_ERR("failed to allocate cmd packets, rc=%d\n", rc);
  1511. goto error;
  1512. }
  1513. rc = dsi_panel_create_cmd_packets(data, length, packet_count,
  1514. cmd->cmds);
  1515. if (rc) {
  1516. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  1517. goto error_free_mem;
  1518. }
  1519. state = utils->get_property(utils->data, cmd_set_state_map[type], NULL);
  1520. if (!state || !strcmp(state, "dsi_lp_mode")) {
  1521. cmd->state = DSI_CMD_SET_STATE_LP;
  1522. } else if (!strcmp(state, "dsi_hs_mode")) {
  1523. cmd->state = DSI_CMD_SET_STATE_HS;
  1524. } else {
  1525. DSI_ERR("[%s] command state unrecognized-%s\n",
  1526. cmd_set_state_map[type], state);
  1527. goto error_free_mem;
  1528. }
  1529. return rc;
  1530. error_free_mem:
  1531. kfree(cmd->cmds);
  1532. cmd->cmds = NULL;
  1533. error:
  1534. return rc;
  1535. }
  1536. static int dsi_panel_parse_cmd_sets(
  1537. struct dsi_display_mode_priv_info *priv_info,
  1538. struct dsi_parser_utils *utils)
  1539. {
  1540. int rc = 0;
  1541. struct dsi_panel_cmd_set *set;
  1542. u32 i;
  1543. if (!priv_info) {
  1544. DSI_ERR("invalid mode priv info\n");
  1545. return -EINVAL;
  1546. }
  1547. for (i = DSI_CMD_SET_PRE_ON; i < DSI_CMD_SET_MAX; i++) {
  1548. set = &priv_info->cmd_sets[i];
  1549. set->type = i;
  1550. set->count = 0;
  1551. if (i == DSI_CMD_SET_PPS) {
  1552. rc = dsi_panel_alloc_cmd_packets(set, 1);
  1553. if (rc)
  1554. DSI_ERR("failed to allocate cmd set %d, rc = %d\n",
  1555. i, rc);
  1556. set->state = DSI_CMD_SET_STATE_LP;
  1557. } else {
  1558. rc = dsi_panel_parse_cmd_sets_sub(set, i, utils);
  1559. if (rc)
  1560. DSI_DEBUG("failed to parse set %d\n", i);
  1561. }
  1562. }
  1563. rc = 0;
  1564. return rc;
  1565. }
  1566. static int dsi_panel_parse_reset_sequence(struct dsi_panel *panel)
  1567. {
  1568. int rc = 0;
  1569. int i;
  1570. u32 length = 0;
  1571. u32 count = 0;
  1572. u32 size = 0;
  1573. u32 *arr_32 = NULL;
  1574. const u32 *arr;
  1575. struct dsi_parser_utils *utils = &panel->utils;
  1576. struct dsi_reset_seq *seq;
  1577. if (panel->host_config.ext_bridge_mode)
  1578. return 0;
  1579. arr = utils->get_property(utils->data,
  1580. "qcom,mdss-dsi-reset-sequence", &length);
  1581. if (!arr) {
  1582. DSI_ERR("[%s] dsi-reset-sequence not found\n", panel->name);
  1583. rc = -EINVAL;
  1584. goto error;
  1585. }
  1586. if (length & 0x1) {
  1587. DSI_ERR("[%s] syntax error for dsi-reset-sequence\n",
  1588. panel->name);
  1589. rc = -EINVAL;
  1590. goto error;
  1591. }
  1592. DSI_DEBUG("RESET SEQ LENGTH = %d\n", length);
  1593. length = length / sizeof(u32);
  1594. size = length * sizeof(u32);
  1595. arr_32 = kzalloc(size, GFP_KERNEL);
  1596. if (!arr_32) {
  1597. rc = -ENOMEM;
  1598. goto error;
  1599. }
  1600. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-reset-sequence",
  1601. arr_32, length);
  1602. if (rc) {
  1603. DSI_ERR("[%s] cannot read dso-reset-seqience\n", panel->name);
  1604. goto error_free_arr_32;
  1605. }
  1606. count = length / 2;
  1607. size = count * sizeof(*seq);
  1608. seq = kzalloc(size, GFP_KERNEL);
  1609. if (!seq) {
  1610. rc = -ENOMEM;
  1611. goto error_free_arr_32;
  1612. }
  1613. panel->reset_config.sequence = seq;
  1614. panel->reset_config.count = count;
  1615. for (i = 0; i < length; i += 2) {
  1616. seq->level = arr_32[i];
  1617. seq->sleep_ms = arr_32[i + 1];
  1618. seq++;
  1619. }
  1620. error_free_arr_32:
  1621. kfree(arr_32);
  1622. error:
  1623. return rc;
  1624. }
  1625. static int dsi_panel_parse_misc_features(struct dsi_panel *panel)
  1626. {
  1627. struct dsi_parser_utils *utils = &panel->utils;
  1628. const char *string;
  1629. int i, rc = 0;
  1630. panel->ulps_feature_enabled =
  1631. utils->read_bool(utils->data, "qcom,ulps-enabled");
  1632. DSI_DEBUG("%s: ulps feature %s\n", __func__,
  1633. (panel->ulps_feature_enabled ? "enabled" : "disabled"));
  1634. panel->ulps_suspend_enabled =
  1635. utils->read_bool(utils->data, "qcom,suspend-ulps-enabled");
  1636. DSI_DEBUG("%s: ulps during suspend feature %s\n", __func__,
  1637. (panel->ulps_suspend_enabled ? "enabled" : "disabled"));
  1638. panel->te_using_watchdog_timer = utils->read_bool(utils->data,
  1639. "qcom,mdss-dsi-te-using-wd");
  1640. panel->sync_broadcast_en = utils->read_bool(utils->data,
  1641. "qcom,cmd-sync-wait-broadcast");
  1642. panel->lp11_init = utils->read_bool(utils->data,
  1643. "qcom,mdss-dsi-lp11-init");
  1644. panel->reset_gpio_always_on = utils->read_bool(utils->data,
  1645. "qcom,platform-reset-gpio-always-on");
  1646. panel->spr_info.enable = false;
  1647. panel->spr_info.pack_type = MSM_DISPLAY_SPR_TYPE_MAX;
  1648. rc = utils->read_string(utils->data, "qcom,spr-pack-type", &string);
  1649. if (!rc) {
  1650. // find match for pack-type string
  1651. for (i = 0; i < MSM_DISPLAY_SPR_TYPE_MAX; i++) {
  1652. if (msm_spr_pack_type_str[i] &&
  1653. (!strcmp(string, msm_spr_pack_type_str[i]))) {
  1654. panel->spr_info.enable = true;
  1655. panel->spr_info.pack_type = i;
  1656. break;
  1657. }
  1658. }
  1659. }
  1660. pr_debug("%s source side spr packing, pack-type %s\n",
  1661. panel->spr_info.enable ? "enable" : "disable",
  1662. panel->spr_info.enable ?
  1663. msm_spr_pack_type_str[panel->spr_info.pack_type] : "none");
  1664. return 0;
  1665. }
  1666. static int dsi_panel_parse_jitter_config(
  1667. struct dsi_display_mode *mode,
  1668. struct dsi_parser_utils *utils)
  1669. {
  1670. int rc;
  1671. struct dsi_display_mode_priv_info *priv_info;
  1672. u32 jitter[DEFAULT_PANEL_JITTER_ARRAY_SIZE] = {0, 0};
  1673. u64 jitter_val = 0;
  1674. priv_info = mode->priv_info;
  1675. rc = utils->read_u32_array(utils->data, "qcom,mdss-dsi-panel-jitter",
  1676. jitter, DEFAULT_PANEL_JITTER_ARRAY_SIZE);
  1677. if (rc) {
  1678. DSI_DEBUG("panel jitter not defined rc=%d\n", rc);
  1679. } else {
  1680. jitter_val = jitter[0];
  1681. jitter_val = div_u64(jitter_val, jitter[1]);
  1682. }
  1683. if (rc || !jitter_val || (jitter_val > MAX_PANEL_JITTER)) {
  1684. priv_info->panel_jitter_numer = DEFAULT_PANEL_JITTER_NUMERATOR;
  1685. priv_info->panel_jitter_denom =
  1686. DEFAULT_PANEL_JITTER_DENOMINATOR;
  1687. } else {
  1688. priv_info->panel_jitter_numer = jitter[0];
  1689. priv_info->panel_jitter_denom = jitter[1];
  1690. }
  1691. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-panel-prefill-lines",
  1692. &priv_info->panel_prefill_lines);
  1693. if (rc) {
  1694. DSI_DEBUG("panel prefill lines are not defined rc=%d\n", rc);
  1695. priv_info->panel_prefill_lines = mode->timing.v_back_porch +
  1696. mode->timing.v_sync_width + mode->timing.v_front_porch;
  1697. } else if (priv_info->panel_prefill_lines >=
  1698. DSI_V_TOTAL(&mode->timing)) {
  1699. DSI_DEBUG("invalid prefill lines config=%d setting to:%d\n",
  1700. priv_info->panel_prefill_lines, DEFAULT_PANEL_PREFILL_LINES);
  1701. priv_info->panel_prefill_lines = DEFAULT_PANEL_PREFILL_LINES;
  1702. }
  1703. return 0;
  1704. }
  1705. static int dsi_panel_parse_power_cfg(struct dsi_panel *panel)
  1706. {
  1707. int rc = 0;
  1708. char *supply_name;
  1709. if (panel->host_config.ext_bridge_mode)
  1710. return 0;
  1711. if (!strcmp(panel->type, "primary"))
  1712. supply_name = "qcom,panel-supply-entries";
  1713. else
  1714. supply_name = "qcom,panel-sec-supply-entries";
  1715. rc = dsi_pwr_of_get_vreg_data(&panel->utils,
  1716. &panel->power_info, supply_name);
  1717. if (rc) {
  1718. DSI_ERR("[%s] failed to parse vregs\n", panel->name);
  1719. goto error;
  1720. }
  1721. error:
  1722. return rc;
  1723. }
  1724. int dsi_panel_get_io_resources(struct dsi_panel *panel,
  1725. struct msm_io_res *io_res)
  1726. {
  1727. struct list_head temp_head;
  1728. struct msm_io_mem_entry *io_mem, *pos, *tmp;
  1729. struct list_head *mem_list = &io_res->mem;
  1730. int i, rc = 0, address_count, pin_count;
  1731. u32 *pins = NULL, *address = NULL;
  1732. u32 base, size;
  1733. struct dsi_parser_utils *utils = &panel->utils;
  1734. INIT_LIST_HEAD(&temp_head);
  1735. address_count = utils->count_u32_elems(utils->data,
  1736. "qcom,dsi-panel-gpio-address");
  1737. if (address_count != 2) {
  1738. DSI_DEBUG("panel gpio address not defined\n");
  1739. return 0;
  1740. }
  1741. address = kzalloc(sizeof(u32) * address_count, GFP_KERNEL);
  1742. if (!address)
  1743. return -ENOMEM;
  1744. rc = utils->read_u32_array(utils->data, "qcom,dsi-panel-gpio-address",
  1745. address, address_count);
  1746. if (rc) {
  1747. DSI_ERR("panel gpio address not defined correctly\n");
  1748. goto end;
  1749. }
  1750. base = address[0];
  1751. size = address[1];
  1752. pin_count = utils->count_u32_elems(utils->data,
  1753. "qcom,dsi-panel-gpio-pins");
  1754. if (pin_count < 0) {
  1755. DSI_ERR("panel gpio pins not defined\n");
  1756. rc = pin_count;
  1757. goto end;
  1758. }
  1759. pins = kzalloc(sizeof(u32) * pin_count, GFP_KERNEL);
  1760. if (!pins) {
  1761. rc = -ENOMEM;
  1762. goto end;
  1763. }
  1764. rc = utils->read_u32_array(utils->data, "qcom,dsi-panel-gpio-pins",
  1765. pins, pin_count);
  1766. if (rc) {
  1767. DSI_ERR("panel gpio pins not defined correctly\n");
  1768. goto end;
  1769. }
  1770. for (i = 0; i < pin_count; i++) {
  1771. io_mem = kzalloc(sizeof(*io_mem), GFP_KERNEL);
  1772. if (!io_mem) {
  1773. rc = -ENOMEM;
  1774. goto parse_fail;
  1775. }
  1776. io_mem->base = base + (pins[i] * size);
  1777. io_mem->size = size;
  1778. list_add(&io_mem->list, &temp_head);
  1779. }
  1780. list_splice(&temp_head, mem_list);
  1781. goto end;
  1782. parse_fail:
  1783. list_for_each_entry_safe(pos, tmp, &temp_head, list) {
  1784. list_del(&pos->list);
  1785. kzfree(pos);
  1786. }
  1787. end:
  1788. kzfree(pins);
  1789. kzfree(address);
  1790. return rc;
  1791. }
  1792. static int dsi_panel_parse_gpios(struct dsi_panel *panel)
  1793. {
  1794. int rc = 0;
  1795. const char *data;
  1796. struct dsi_parser_utils *utils = &panel->utils;
  1797. char *reset_gpio_name, *mode_set_gpio_name;
  1798. if (!strcmp(panel->type, "primary")) {
  1799. reset_gpio_name = "qcom,platform-reset-gpio";
  1800. mode_set_gpio_name = "qcom,panel-mode-gpio";
  1801. } else {
  1802. reset_gpio_name = "qcom,platform-sec-reset-gpio";
  1803. mode_set_gpio_name = "qcom,panel-sec-mode-gpio";
  1804. }
  1805. panel->reset_config.reset_gpio = utils->get_named_gpio(utils->data,
  1806. reset_gpio_name, 0);
  1807. if (!gpio_is_valid(panel->reset_config.reset_gpio) &&
  1808. !panel->host_config.ext_bridge_mode) {
  1809. rc = panel->reset_config.reset_gpio;
  1810. DSI_ERR("[%s] failed get reset gpio, rc=%d\n", panel->name, rc);
  1811. goto error;
  1812. }
  1813. panel->reset_config.disp_en_gpio = utils->get_named_gpio(utils->data,
  1814. "qcom,5v-boost-gpio",
  1815. 0);
  1816. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1817. DSI_DEBUG("[%s] 5v-boot-gpio is not set, rc=%d\n",
  1818. panel->name, rc);
  1819. panel->reset_config.disp_en_gpio =
  1820. utils->get_named_gpio(utils->data,
  1821. "qcom,platform-en-gpio", 0);
  1822. if (!gpio_is_valid(panel->reset_config.disp_en_gpio)) {
  1823. DSI_DEBUG("[%s] platform-en-gpio is not set, rc=%d\n",
  1824. panel->name, rc);
  1825. }
  1826. }
  1827. panel->reset_config.lcd_mode_sel_gpio = utils->get_named_gpio(
  1828. utils->data, mode_set_gpio_name, 0);
  1829. if (!gpio_is_valid(panel->reset_config.lcd_mode_sel_gpio))
  1830. DSI_DEBUG("mode gpio not specified\n");
  1831. DSI_DEBUG("mode gpio=%d\n", panel->reset_config.lcd_mode_sel_gpio);
  1832. data = utils->get_property(utils->data,
  1833. "qcom,mdss-dsi-mode-sel-gpio-state", NULL);
  1834. if (data) {
  1835. if (!strcmp(data, "single_port"))
  1836. panel->reset_config.mode_sel_state =
  1837. MODE_SEL_SINGLE_PORT;
  1838. else if (!strcmp(data, "dual_port"))
  1839. panel->reset_config.mode_sel_state =
  1840. MODE_SEL_DUAL_PORT;
  1841. else if (!strcmp(data, "high"))
  1842. panel->reset_config.mode_sel_state =
  1843. MODE_GPIO_HIGH;
  1844. else if (!strcmp(data, "low"))
  1845. panel->reset_config.mode_sel_state =
  1846. MODE_GPIO_LOW;
  1847. } else {
  1848. /* Set default mode as SPLIT mode */
  1849. panel->reset_config.mode_sel_state = MODE_SEL_DUAL_PORT;
  1850. }
  1851. /* TODO: release memory */
  1852. rc = dsi_panel_parse_reset_sequence(panel);
  1853. if (rc) {
  1854. DSI_ERR("[%s] failed to parse reset sequence, rc=%d\n",
  1855. panel->name, rc);
  1856. goto error;
  1857. }
  1858. panel->panel_test_gpio = utils->get_named_gpio(utils->data,
  1859. "qcom,mdss-dsi-panel-test-pin",
  1860. 0);
  1861. if (!gpio_is_valid(panel->panel_test_gpio))
  1862. DSI_DEBUG("%s:%d panel test gpio not specified\n", __func__,
  1863. __LINE__);
  1864. error:
  1865. return rc;
  1866. }
  1867. static int dsi_panel_parse_bl_pwm_config(struct dsi_panel *panel)
  1868. {
  1869. int rc = 0;
  1870. u32 val;
  1871. struct dsi_backlight_config *config = &panel->bl_config;
  1872. struct dsi_parser_utils *utils = &panel->utils;
  1873. rc = utils->read_u32(utils->data, "qcom,bl-pmic-pwm-period-usecs",
  1874. &val);
  1875. if (rc) {
  1876. DSI_ERR("bl-pmic-pwm-period-usecs is not defined, rc=%d\n", rc);
  1877. goto error;
  1878. }
  1879. config->pwm_period_usecs = val;
  1880. error:
  1881. return rc;
  1882. }
  1883. static int dsi_panel_parse_bl_config(struct dsi_panel *panel)
  1884. {
  1885. int rc = 0;
  1886. u32 val = 0;
  1887. const char *bl_type = NULL;
  1888. const char *data = NULL;
  1889. const char *state = NULL;
  1890. struct dsi_parser_utils *utils = &panel->utils;
  1891. char *bl_name = NULL;
  1892. if (!strcmp(panel->type, "primary"))
  1893. bl_name = "qcom,mdss-dsi-bl-pmic-control-type";
  1894. else
  1895. bl_name = "qcom,mdss-dsi-sec-bl-pmic-control-type";
  1896. bl_type = utils->get_property(utils->data, bl_name, NULL);
  1897. if (!bl_type) {
  1898. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1899. } else if (!strcmp(bl_type, "bl_ctrl_pwm")) {
  1900. panel->bl_config.type = DSI_BACKLIGHT_PWM;
  1901. } else if (!strcmp(bl_type, "bl_ctrl_wled")) {
  1902. panel->bl_config.type = DSI_BACKLIGHT_WLED;
  1903. } else if (!strcmp(bl_type, "bl_ctrl_dcs")) {
  1904. panel->bl_config.type = DSI_BACKLIGHT_DCS;
  1905. } else if (!strcmp(bl_type, "bl_ctrl_external")) {
  1906. panel->bl_config.type = DSI_BACKLIGHT_EXTERNAL;
  1907. } else {
  1908. DSI_DEBUG("[%s] bl-pmic-control-type unknown-%s\n",
  1909. panel->name, bl_type);
  1910. panel->bl_config.type = DSI_BACKLIGHT_UNKNOWN;
  1911. }
  1912. data = utils->get_property(utils->data, "qcom,bl-update-flag", NULL);
  1913. if (!data) {
  1914. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1915. } else if (!strcmp(data, "delay_until_first_frame")) {
  1916. panel->bl_config.bl_update = BL_UPDATE_DELAY_UNTIL_FIRST_FRAME;
  1917. } else {
  1918. DSI_DEBUG("[%s] No valid bl-update-flag: %s\n",
  1919. panel->name, data);
  1920. panel->bl_config.bl_update = BL_UPDATE_NONE;
  1921. }
  1922. panel->bl_config.bl_scale = MAX_BL_SCALE_LEVEL;
  1923. panel->bl_config.bl_scale_sv = MAX_SV_BL_SCALE_LEVEL;
  1924. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-min-level", &val);
  1925. if (rc) {
  1926. DSI_DEBUG("[%s] bl-min-level unspecified, defaulting to zero\n",
  1927. panel->name);
  1928. panel->bl_config.bl_min_level = 0;
  1929. } else {
  1930. panel->bl_config.bl_min_level = val;
  1931. }
  1932. rc = utils->read_u32(utils->data, "qcom,mdss-dsi-bl-max-level", &val);
  1933. if (rc) {
  1934. DSI_DEBUG("[%s] bl-max-level unspecified, defaulting to max level\n",
  1935. panel->name);
  1936. panel->bl_config.bl_max_level = MAX_BL_LEVEL;
  1937. } else {
  1938. panel->bl_config.bl_max_level = val;
  1939. }
  1940. rc = utils->read_u32(utils->data, "qcom,mdss-brightness-max-level",
  1941. &val);
  1942. if (rc) {
  1943. DSI_DEBUG("[%s] brigheness-max-level unspecified, defaulting to 255\n",
  1944. panel->name);
  1945. panel->bl_config.brightness_max_level = 255;
  1946. rc = 0;
  1947. } else {
  1948. panel->bl_config.brightness_max_level = val;
  1949. }
  1950. panel->bl_config.bl_inverted_dbv = utils->read_bool(utils->data,
  1951. "qcom,mdss-dsi-bl-inverted-dbv");
  1952. state = utils->get_property(utils->data, "qcom,bl-dsc-cmd-state", NULL);
  1953. if (!state || !strcmp(state, "dsi_hs_mode"))
  1954. panel->bl_config.lp_mode = false;
  1955. else if (!strcmp(state, "dsi_lp_mode"))
  1956. panel->bl_config.lp_mode = true;
  1957. else
  1958. DSI_ERR("bl-dsc-cmd-state command state unrecognized-%s\n",
  1959. state);
  1960. if (panel->bl_config.type == DSI_BACKLIGHT_PWM) {
  1961. rc = dsi_panel_parse_bl_pwm_config(panel);
  1962. if (rc) {
  1963. DSI_ERR("[%s] failed to parse pwm config, rc=%d\n",
  1964. panel->name, rc);
  1965. goto error;
  1966. }
  1967. }
  1968. panel->bl_config.en_gpio = utils->get_named_gpio(utils->data,
  1969. "qcom,platform-bklight-en-gpio",
  1970. 0);
  1971. if (!gpio_is_valid(panel->bl_config.en_gpio)) {
  1972. if (panel->bl_config.en_gpio == -EPROBE_DEFER) {
  1973. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1974. panel->name, rc);
  1975. rc = -EPROBE_DEFER;
  1976. goto error;
  1977. } else {
  1978. DSI_DEBUG("[%s] failed to get bklt gpio, rc=%d\n",
  1979. panel->name, rc);
  1980. rc = 0;
  1981. goto error;
  1982. }
  1983. }
  1984. error:
  1985. return rc;
  1986. }
  1987. static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
  1988. struct dsi_parser_utils *utils)
  1989. {
  1990. const char *data;
  1991. u32 len, i;
  1992. int rc = 0;
  1993. struct dsi_display_mode_priv_info *priv_info;
  1994. u64 pixel_clk_khz;
  1995. if (!mode || !mode->priv_info)
  1996. return -EINVAL;
  1997. priv_info = mode->priv_info;
  1998. data = utils->get_property(utils->data,
  1999. "qcom,mdss-dsi-panel-phy-timings", &len);
  2000. if (!data) {
  2001. DSI_DEBUG("Unable to read Phy timing settings\n");
  2002. } else {
  2003. priv_info->phy_timing_val =
  2004. kzalloc((sizeof(u32) * len), GFP_KERNEL);
  2005. if (!priv_info->phy_timing_val)
  2006. return -EINVAL;
  2007. for (i = 0; i < len; i++)
  2008. priv_info->phy_timing_val[i] = data[i];
  2009. priv_info->phy_timing_len = len;
  2010. }
  2011. if (mode->panel_mode == DSI_OP_VIDEO_MODE) {
  2012. /*
  2013. * For command mode we update the pclk as part of
  2014. * function dsi_panel_calc_dsi_transfer_time( )
  2015. * as we set it based on dsi clock or mdp transfer time.
  2016. */
  2017. pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
  2018. DSI_V_TOTAL(&mode->timing) *
  2019. mode->timing.refresh_rate);
  2020. do_div(pixel_clk_khz, 1000);
  2021. mode->pixel_clk_khz = pixel_clk_khz;
  2022. }
  2023. return rc;
  2024. }
  2025. static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
  2026. struct dsi_parser_utils *utils)
  2027. {
  2028. u32 data;
  2029. int rc = -EINVAL;
  2030. int intf_width;
  2031. const char *compression;
  2032. struct dsi_display_mode_priv_info *priv_info;
  2033. if (!mode || !mode->priv_info)
  2034. return -EINVAL;
  2035. priv_info = mode->priv_info;
  2036. priv_info->dsc_enabled = false;
  2037. compression = utils->get_property(utils->data,
  2038. "qcom,compression-mode", NULL);
  2039. if (compression && !strcmp(compression, "dsc"))
  2040. priv_info->dsc_enabled = true;
  2041. if (!priv_info->dsc_enabled) {
  2042. DSI_DEBUG("dsc compression is not enabled for the mode\n");
  2043. return 0;
  2044. }
  2045. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-version", &data);
  2046. if (rc) {
  2047. priv_info->dsc.config.dsc_version_major = 0x1;
  2048. priv_info->dsc.config.dsc_version_minor = 0x1;
  2049. rc = 0;
  2050. } else {
  2051. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2052. * major version information
  2053. */
  2054. priv_info->dsc.config.dsc_version_major = (data >> 4) & 0x0F;
  2055. priv_info->dsc.config.dsc_version_minor = data & 0x0F;
  2056. if ((priv_info->dsc.config.dsc_version_major != 0x1) &&
  2057. ((priv_info->dsc.config.dsc_version_minor
  2058. != 0x1) ||
  2059. (priv_info->dsc.config.dsc_version_minor
  2060. != 0x2))) {
  2061. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2062. __func__,
  2063. priv_info->dsc.config.dsc_version_major,
  2064. priv_info->dsc.config.dsc_version_minor
  2065. );
  2066. rc = -EINVAL;
  2067. goto error;
  2068. }
  2069. }
  2070. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-scr-version", &data);
  2071. if (rc) {
  2072. priv_info->dsc.scr_rev = 0x0;
  2073. rc = 0;
  2074. } else {
  2075. priv_info->dsc.scr_rev = data & 0xff;
  2076. /* only one scr rev supported */
  2077. if (priv_info->dsc.scr_rev > 0x1) {
  2078. DSI_ERR("%s: DSC scr version:%d not supported\n",
  2079. __func__, priv_info->dsc.scr_rev);
  2080. rc = -EINVAL;
  2081. goto error;
  2082. }
  2083. }
  2084. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-height", &data);
  2085. if (rc) {
  2086. DSI_ERR("failed to parse qcom,mdss-dsc-slice-height\n");
  2087. goto error;
  2088. }
  2089. priv_info->dsc.config.slice_height = data;
  2090. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-width", &data);
  2091. if (rc) {
  2092. DSI_ERR("failed to parse qcom,mdss-dsc-slice-width\n");
  2093. goto error;
  2094. }
  2095. priv_info->dsc.config.slice_width = data;
  2096. intf_width = mode->timing.h_active;
  2097. if (intf_width % priv_info->dsc.config.slice_width) {
  2098. DSI_ERR("invalid slice width for the intf width:%d slice width:%d\n",
  2099. intf_width, priv_info->dsc.config.slice_width);
  2100. rc = -EINVAL;
  2101. goto error;
  2102. }
  2103. priv_info->dsc.config.pic_width = mode->timing.h_active;
  2104. priv_info->dsc.config.pic_height = mode->timing.v_active;
  2105. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-slice-per-pkt", &data);
  2106. if (rc) {
  2107. DSI_ERR("failed to parse qcom,mdss-dsc-slice-per-pkt\n");
  2108. goto error;
  2109. } else if (!data || (data > 2)) {
  2110. DSI_ERR("invalid dsc slice-per-pkt:%d\n", data);
  2111. goto error;
  2112. }
  2113. priv_info->dsc.slice_per_pkt = data;
  2114. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-component",
  2115. &data);
  2116. if (rc) {
  2117. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-component\n");
  2118. goto error;
  2119. }
  2120. priv_info->dsc.config.bits_per_component = data;
  2121. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2122. if (rc) {
  2123. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2124. data = 0;
  2125. }
  2126. priv_info->dsc.pps_delay_ms = data;
  2127. rc = utils->read_u32(utils->data, "qcom,mdss-dsc-bit-per-pixel",
  2128. &data);
  2129. if (rc) {
  2130. DSI_ERR("failed to parse qcom,mdss-dsc-bit-per-pixel\n");
  2131. goto error;
  2132. }
  2133. priv_info->dsc.config.bits_per_pixel = data << 4;
  2134. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2135. &data);
  2136. if (rc) {
  2137. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2138. rc = 0;
  2139. data = MSM_CHROMA_444;
  2140. }
  2141. priv_info->dsc.chroma_format = data;
  2142. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2143. &data);
  2144. if (rc) {
  2145. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2146. rc = 0;
  2147. data = MSM_RGB;
  2148. }
  2149. priv_info->dsc.source_color_space = data;
  2150. priv_info->dsc.config.block_pred_enable = utils->read_bool(utils->data,
  2151. "qcom,mdss-dsc-block-prediction-enable");
  2152. priv_info->dsc.config.slice_count = DIV_ROUND_UP(intf_width,
  2153. priv_info->dsc.config.slice_width);
  2154. rc = sde_dsc_populate_dsc_config(&priv_info->dsc.config,
  2155. priv_info->dsc.scr_rev);
  2156. if (rc) {
  2157. DSI_DEBUG("failed populating dsc params\n");
  2158. rc = -EINVAL;
  2159. goto error;
  2160. }
  2161. rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
  2162. if (rc) {
  2163. DSI_DEBUG("failed populating other dsc params\n");
  2164. rc = -EINVAL;
  2165. goto error;
  2166. }
  2167. priv_info->pclk_scale.numer =
  2168. priv_info->dsc.config.bits_per_pixel >> 4;
  2169. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2170. priv_info->dsc.chroma_format,
  2171. priv_info->dsc.config.bits_per_component);
  2172. mode->timing.dsc_enabled = true;
  2173. mode->timing.dsc = &priv_info->dsc;
  2174. mode->timing.pclk_scale = priv_info->pclk_scale;
  2175. error:
  2176. return rc;
  2177. }
  2178. static int dsi_panel_parse_vdc_params(struct dsi_display_mode *mode,
  2179. struct dsi_parser_utils *utils, int traffic_mode, int panel_mode)
  2180. {
  2181. u32 data;
  2182. int rc = -EINVAL;
  2183. const char *compression;
  2184. struct dsi_display_mode_priv_info *priv_info;
  2185. int intf_width;
  2186. if (!mode || !mode->priv_info)
  2187. return -EINVAL;
  2188. priv_info = mode->priv_info;
  2189. priv_info->vdc_enabled = false;
  2190. compression = utils->get_property(utils->data,
  2191. "qcom,compression-mode", NULL);
  2192. if (compression && !strcmp(compression, "vdc"))
  2193. priv_info->vdc_enabled = true;
  2194. if (!priv_info->vdc_enabled) {
  2195. DSI_DEBUG("vdc compression is not enabled for the mode\n");
  2196. return 0;
  2197. }
  2198. priv_info->vdc.panel_mode = panel_mode;
  2199. priv_info->vdc.traffic_mode = traffic_mode;
  2200. rc = utils->read_u32(utils->data, "qcom,vdc-version", &data);
  2201. if (rc) {
  2202. priv_info->vdc.version_major = 0x1;
  2203. priv_info->vdc.version_minor = 0x2;
  2204. priv_info->vdc.version_release = 0x0;
  2205. rc = 0;
  2206. } else {
  2207. /* BITS[0..3] provides minor version and BITS[4..7] provide
  2208. * major version information
  2209. */
  2210. priv_info->vdc.version_major = (data >> 4) & 0x0F;
  2211. priv_info->vdc.version_minor = data & 0x0F;
  2212. if ((priv_info->vdc.version_major != 0x1) &&
  2213. ((priv_info->vdc.version_minor
  2214. != 0x2))) {
  2215. DSI_ERR("%s:unsupported major:%d minor:%d version\n",
  2216. __func__,
  2217. priv_info->vdc.version_major,
  2218. priv_info->vdc.version_minor
  2219. );
  2220. rc = -EINVAL;
  2221. goto error;
  2222. }
  2223. }
  2224. rc = utils->read_u32(utils->data, "qcom,vdc-version-release", &data);
  2225. if (rc) {
  2226. priv_info->vdc.version_release = 0x0;
  2227. rc = 0;
  2228. } else {
  2229. priv_info->vdc.version_release = data & 0xff;
  2230. /* only one release version is supported */
  2231. if (priv_info->vdc.version_release != 0x0) {
  2232. DSI_ERR("unsupported vdc release version %d\n",
  2233. priv_info->vdc.version_release);
  2234. rc = -EINVAL;
  2235. goto error;
  2236. }
  2237. }
  2238. DSI_INFO("vdc major: 0x%x minor : 0x%x release : 0x%x\n",
  2239. priv_info->vdc.version_major,
  2240. priv_info->vdc.version_minor,
  2241. priv_info->vdc.version_release);
  2242. rc = utils->read_u32(utils->data, "qcom,vdc-slice-height", &data);
  2243. if (rc) {
  2244. DSI_ERR("failed to parse qcom,vdc-slice-height\n");
  2245. goto error;
  2246. }
  2247. priv_info->vdc.slice_height = data;
  2248. /* slice height should be atleast 16 lines */
  2249. if (priv_info->vdc.slice_height < 16) {
  2250. DSI_ERR("invalid slice height %d\n",
  2251. priv_info->vdc.slice_height);
  2252. rc = -EINVAL;
  2253. goto error;
  2254. }
  2255. rc = utils->read_u32(utils->data, "qcom,vdc-slice-width", &data);
  2256. if (rc) {
  2257. DSI_ERR("failed to parse qcom,vdc-slice-width\n");
  2258. goto error;
  2259. }
  2260. priv_info->vdc.slice_width = data;
  2261. /*
  2262. * slide-width should be multiple of 8
  2263. * slice-width should be atlease 64 pixels
  2264. */
  2265. if ((priv_info->vdc.slice_width & 7) ||
  2266. (priv_info->vdc.slice_width < 64)) {
  2267. DSI_ERR("invalid slice width:%d\n", priv_info->vdc.slice_width);
  2268. rc = -EINVAL;
  2269. goto error;
  2270. }
  2271. rc = utils->read_u32(utils->data, "qcom,vdc-slice-per-pkt", &data);
  2272. if (rc) {
  2273. DSI_ERR("failed to parse qcom,vdc-slice-per-pkt\n");
  2274. goto error;
  2275. } else if (!data || (data > 2)) {
  2276. DSI_ERR("invalid vdc slice-per-pkt:%d\n", data);
  2277. rc = -EINVAL;
  2278. goto error;
  2279. }
  2280. intf_width = mode->timing.h_active;
  2281. priv_info->vdc.slice_per_pkt = data;
  2282. priv_info->vdc.frame_width = mode->timing.h_active;
  2283. priv_info->vdc.frame_height = mode->timing.v_active;
  2284. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-component",
  2285. &data);
  2286. if (rc) {
  2287. DSI_ERR("failed to parse qcom,vdc-bit-per-component\n");
  2288. goto error;
  2289. }
  2290. priv_info->vdc.bits_per_component = data;
  2291. rc = utils->read_u32(utils->data, "qcom,mdss-pps-delay-ms", &data);
  2292. if (rc) {
  2293. DSI_DEBUG("pps-delay-ms not specified, defaulting to 0\n");
  2294. data = 0;
  2295. }
  2296. priv_info->vdc.pps_delay_ms = data;
  2297. rc = utils->read_u32(utils->data, "qcom,vdc-bit-per-pixel",
  2298. &data);
  2299. if (rc) {
  2300. DSI_ERR("failed to parse qcom,vdc-bit-per-pixel\n");
  2301. goto error;
  2302. }
  2303. priv_info->vdc.bits_per_pixel = data << 4;
  2304. rc = utils->read_u32(utils->data, "qcom,src-chroma-format",
  2305. &data);
  2306. if (rc) {
  2307. DSI_DEBUG("failed to parse qcom,src-chroma-format\n");
  2308. rc = 0;
  2309. data = MSM_CHROMA_444;
  2310. }
  2311. priv_info->vdc.chroma_format = data;
  2312. rc = utils->read_u32(utils->data, "qcom,src-color-space",
  2313. &data);
  2314. if (rc) {
  2315. DSI_DEBUG("failed to parse qcom,src-color-space\n");
  2316. rc = 0;
  2317. data = MSM_RGB;
  2318. }
  2319. priv_info->vdc.source_color_space = data;
  2320. rc = sde_vdc_populate_config(&priv_info->vdc,
  2321. intf_width, traffic_mode);
  2322. if (rc) {
  2323. DSI_DEBUG("failed populating vdc config\n");
  2324. rc = -EINVAL;
  2325. goto error;
  2326. }
  2327. priv_info->pclk_scale.numer =
  2328. priv_info->vdc.bits_per_pixel >> 4;
  2329. priv_info->pclk_scale.denom = msm_get_src_bpc(
  2330. priv_info->vdc.chroma_format,
  2331. priv_info->vdc.bits_per_component);
  2332. mode->timing.vdc_enabled = true;
  2333. mode->timing.vdc = &priv_info->vdc;
  2334. mode->timing.pclk_scale = priv_info->pclk_scale;
  2335. error:
  2336. return rc;
  2337. }
  2338. static int dsi_panel_parse_hdr_config(struct dsi_panel *panel)
  2339. {
  2340. int rc = 0;
  2341. struct drm_panel_hdr_properties *hdr_prop;
  2342. struct dsi_parser_utils *utils = &panel->utils;
  2343. hdr_prop = &panel->hdr_props;
  2344. hdr_prop->hdr_enabled = utils->read_bool(utils->data,
  2345. "qcom,mdss-dsi-panel-hdr-enabled");
  2346. if (hdr_prop->hdr_enabled) {
  2347. rc = utils->read_u32_array(utils->data,
  2348. "qcom,mdss-dsi-panel-hdr-color-primaries",
  2349. hdr_prop->display_primaries,
  2350. DISPLAY_PRIMARIES_MAX);
  2351. if (rc) {
  2352. DSI_ERR("%s:%d, Unable to read color primaries,rc:%u\n",
  2353. __func__, __LINE__, rc);
  2354. hdr_prop->hdr_enabled = false;
  2355. return rc;
  2356. }
  2357. rc = utils->read_u32(utils->data,
  2358. "qcom,mdss-dsi-panel-peak-brightness",
  2359. &(hdr_prop->peak_brightness));
  2360. if (rc) {
  2361. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2362. __func__, __LINE__, rc);
  2363. hdr_prop->hdr_enabled = false;
  2364. return rc;
  2365. }
  2366. rc = utils->read_u32(utils->data,
  2367. "qcom,mdss-dsi-panel-blackness-level",
  2368. &(hdr_prop->blackness_level));
  2369. if (rc) {
  2370. DSI_ERR("%s:%d, Unable to read hdr brightness, rc:%u\n",
  2371. __func__, __LINE__, rc);
  2372. hdr_prop->hdr_enabled = false;
  2373. return rc;
  2374. }
  2375. }
  2376. return 0;
  2377. }
  2378. static int dsi_panel_parse_topology(
  2379. struct dsi_display_mode_priv_info *priv_info,
  2380. struct dsi_parser_utils *utils,
  2381. int topology_override)
  2382. {
  2383. struct msm_display_topology *topology;
  2384. u32 top_count, top_sel, *array = NULL;
  2385. int i, len = 0;
  2386. int rc = -EINVAL;
  2387. len = utils->count_u32_elems(utils->data, "qcom,display-topology");
  2388. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  2389. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY)) {
  2390. DSI_ERR("invalid topology list for the panel, rc = %d\n", rc);
  2391. return rc;
  2392. }
  2393. top_count = len / TOPOLOGY_SET_LEN;
  2394. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  2395. if (!array)
  2396. return -ENOMEM;
  2397. rc = utils->read_u32_array(utils->data,
  2398. "qcom,display-topology", array, len);
  2399. if (rc) {
  2400. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  2401. goto read_fail;
  2402. }
  2403. topology = kcalloc(top_count, sizeof(*topology), GFP_KERNEL);
  2404. if (!topology) {
  2405. rc = -ENOMEM;
  2406. goto read_fail;
  2407. }
  2408. for (i = 0; i < top_count; i++) {
  2409. struct msm_display_topology *top = &topology[i];
  2410. top->num_lm = array[i * TOPOLOGY_SET_LEN];
  2411. top->num_enc = array[i * TOPOLOGY_SET_LEN + 1];
  2412. top->num_intf = array[i * TOPOLOGY_SET_LEN + 2];
  2413. }
  2414. if (topology_override >= 0 && topology_override < top_count) {
  2415. DSI_INFO("override topology: cfg:%d lm:%d comp_enc:%d intf:%d\n",
  2416. topology_override,
  2417. topology[topology_override].num_lm,
  2418. topology[topology_override].num_enc,
  2419. topology[topology_override].num_intf);
  2420. top_sel = topology_override;
  2421. goto parse_done;
  2422. }
  2423. rc = utils->read_u32(utils->data,
  2424. "qcom,default-topology-index", &top_sel);
  2425. if (rc) {
  2426. DSI_ERR("no default topology selected, rc = %d\n", rc);
  2427. goto parse_fail;
  2428. }
  2429. if (top_sel >= top_count) {
  2430. rc = -EINVAL;
  2431. DSI_ERR("default topology is specified is not valid, rc = %d\n",
  2432. rc);
  2433. goto parse_fail;
  2434. }
  2435. DSI_INFO("default topology: lm: %d comp_enc:%d intf: %d\n",
  2436. topology[top_sel].num_lm,
  2437. topology[top_sel].num_enc,
  2438. topology[top_sel].num_intf);
  2439. parse_done:
  2440. memcpy(&priv_info->topology, &topology[top_sel],
  2441. sizeof(struct msm_display_topology));
  2442. parse_fail:
  2443. kfree(topology);
  2444. read_fail:
  2445. kfree(array);
  2446. return rc;
  2447. }
  2448. static int dsi_panel_parse_roi_alignment(struct dsi_parser_utils *utils,
  2449. struct msm_roi_alignment *align)
  2450. {
  2451. int len = 0, rc = 0;
  2452. u32 value[6];
  2453. struct property *data;
  2454. if (!align)
  2455. return -EINVAL;
  2456. memset(align, 0, sizeof(*align));
  2457. data = utils->find_property(utils->data,
  2458. "qcom,panel-roi-alignment", &len);
  2459. len /= sizeof(u32);
  2460. if (!data) {
  2461. DSI_ERR("panel roi alignment not found\n");
  2462. rc = -EINVAL;
  2463. } else if (len != 6) {
  2464. DSI_ERR("incorrect roi alignment len %d\n", len);
  2465. rc = -EINVAL;
  2466. } else {
  2467. rc = utils->read_u32_array(utils->data,
  2468. "qcom,panel-roi-alignment", value, len);
  2469. if (rc)
  2470. DSI_DEBUG("error reading panel roi alignment values\n");
  2471. else {
  2472. align->xstart_pix_align = value[0];
  2473. align->ystart_pix_align = value[1];
  2474. align->width_pix_align = value[2];
  2475. align->height_pix_align = value[3];
  2476. align->min_width = value[4];
  2477. align->min_height = value[5];
  2478. }
  2479. DSI_INFO("roi alignment: [%d, %d, %d, %d, %d, %d]\n",
  2480. align->xstart_pix_align,
  2481. align->width_pix_align,
  2482. align->ystart_pix_align,
  2483. align->height_pix_align,
  2484. align->min_width,
  2485. align->min_height);
  2486. }
  2487. return rc;
  2488. }
  2489. static int dsi_panel_parse_partial_update_caps(struct dsi_display_mode *mode,
  2490. struct dsi_parser_utils *utils)
  2491. {
  2492. struct msm_roi_caps *roi_caps = NULL;
  2493. const char *data;
  2494. int rc = 0;
  2495. if (!mode || !mode->priv_info) {
  2496. DSI_ERR("invalid arguments\n");
  2497. return -EINVAL;
  2498. }
  2499. roi_caps = &mode->priv_info->roi_caps;
  2500. memset(roi_caps, 0, sizeof(*roi_caps));
  2501. data = utils->get_property(utils->data,
  2502. "qcom,partial-update-enabled", NULL);
  2503. if (data) {
  2504. if (!strcmp(data, "dual_roi"))
  2505. roi_caps->num_roi = 2;
  2506. else if (!strcmp(data, "single_roi"))
  2507. roi_caps->num_roi = 1;
  2508. else {
  2509. DSI_INFO(
  2510. "invalid value for qcom,partial-update-enabled: %s\n",
  2511. data);
  2512. return 0;
  2513. }
  2514. } else {
  2515. DSI_DEBUG("partial update disabled as the property is not set\n");
  2516. return 0;
  2517. }
  2518. roi_caps->merge_rois = utils->read_bool(utils->data,
  2519. "qcom,partial-update-roi-merge");
  2520. roi_caps->enabled = roi_caps->num_roi > 0;
  2521. DSI_DEBUG("partial update num_rois=%d enabled=%d\n", roi_caps->num_roi,
  2522. roi_caps->enabled);
  2523. if (roi_caps->enabled)
  2524. rc = dsi_panel_parse_roi_alignment(utils,
  2525. &roi_caps->align);
  2526. if (rc)
  2527. memset(roi_caps, 0, sizeof(*roi_caps));
  2528. return rc;
  2529. }
  2530. static int dsi_panel_parse_panel_mode_caps(struct dsi_display_mode *mode,
  2531. struct dsi_parser_utils *utils)
  2532. {
  2533. bool vid_mode_support, cmd_mode_support;
  2534. if (!mode || !mode->priv_info) {
  2535. DSI_ERR("invalid arguments\n");
  2536. return -EINVAL;
  2537. }
  2538. vid_mode_support = utils->read_bool(utils->data,
  2539. "qcom,mdss-dsi-video-mode");
  2540. cmd_mode_support = utils->read_bool(utils->data,
  2541. "qcom,mdss-dsi-cmd-mode");
  2542. if (cmd_mode_support)
  2543. mode->panel_mode = DSI_OP_CMD_MODE;
  2544. else if (vid_mode_support)
  2545. mode->panel_mode = DSI_OP_VIDEO_MODE;
  2546. else
  2547. return -EINVAL;
  2548. return 0;
  2549. };
  2550. static int dsi_panel_parse_dms_info(struct dsi_panel *panel)
  2551. {
  2552. int dms_enabled;
  2553. const char *data;
  2554. struct dsi_parser_utils *utils = &panel->utils;
  2555. panel->dms_mode = DSI_DMS_MODE_DISABLED;
  2556. dms_enabled = utils->read_bool(utils->data,
  2557. "qcom,dynamic-mode-switch-enabled");
  2558. if (!dms_enabled)
  2559. return 0;
  2560. data = utils->get_property(utils->data,
  2561. "qcom,dynamic-mode-switch-type", NULL);
  2562. if (data && !strcmp(data, "dynamic-resolution-switch-immediate")) {
  2563. panel->dms_mode = DSI_DMS_MODE_RES_SWITCH_IMMEDIATE;
  2564. } else {
  2565. DSI_ERR("[%s] unsupported dynamic switch mode: %s\n",
  2566. panel->name, data);
  2567. return -EINVAL;
  2568. }
  2569. return 0;
  2570. };
  2571. /*
  2572. * The length of all the valid values to be checked should not be greater
  2573. * than the length of returned data from read command.
  2574. */
  2575. static bool
  2576. dsi_panel_parse_esd_check_valid_params(struct dsi_panel *panel, u32 count)
  2577. {
  2578. int i;
  2579. struct drm_panel_esd_config *config = &panel->esd_config;
  2580. for (i = 0; i < count; ++i) {
  2581. if (config->status_valid_params[i] >
  2582. config->status_cmds_rlen[i]) {
  2583. DSI_DEBUG("ignore valid params\n");
  2584. return false;
  2585. }
  2586. }
  2587. return true;
  2588. }
  2589. static bool dsi_panel_parse_esd_status_len(struct dsi_parser_utils *utils,
  2590. char *prop_key, u32 **target, u32 cmd_cnt)
  2591. {
  2592. int tmp;
  2593. if (!utils->find_property(utils->data, prop_key, &tmp))
  2594. return false;
  2595. tmp /= sizeof(u32);
  2596. if (tmp != cmd_cnt) {
  2597. DSI_ERR("request property(%d) do not match cmd count(%d)\n",
  2598. tmp, cmd_cnt);
  2599. return false;
  2600. }
  2601. *target = kcalloc(tmp, sizeof(u32), GFP_KERNEL);
  2602. if (IS_ERR_OR_NULL(*target)) {
  2603. DSI_ERR("Error allocating memory for property\n");
  2604. return false;
  2605. }
  2606. if (utils->read_u32_array(utils->data, prop_key, *target, tmp)) {
  2607. DSI_ERR("cannot get values from dts\n");
  2608. kfree(*target);
  2609. *target = NULL;
  2610. return false;
  2611. }
  2612. return true;
  2613. }
  2614. static void dsi_panel_esd_config_deinit(struct drm_panel_esd_config *esd_config)
  2615. {
  2616. kfree(esd_config->status_buf);
  2617. kfree(esd_config->return_buf);
  2618. kfree(esd_config->status_value);
  2619. kfree(esd_config->status_valid_params);
  2620. kfree(esd_config->status_cmds_rlen);
  2621. kfree(esd_config->status_cmd.cmds);
  2622. }
  2623. int dsi_panel_parse_esd_reg_read_configs(struct dsi_panel *panel)
  2624. {
  2625. struct drm_panel_esd_config *esd_config;
  2626. int rc = 0;
  2627. u32 tmp;
  2628. u32 i, status_len, *lenp;
  2629. struct property *data;
  2630. struct dsi_parser_utils *utils = &panel->utils;
  2631. if (!panel) {
  2632. DSI_ERR("Invalid Params\n");
  2633. return -EINVAL;
  2634. }
  2635. esd_config = &panel->esd_config;
  2636. if (!esd_config)
  2637. return -EINVAL;
  2638. dsi_panel_parse_cmd_sets_sub(&esd_config->status_cmd,
  2639. DSI_CMD_SET_PANEL_STATUS, utils);
  2640. if (!esd_config->status_cmd.count) {
  2641. DSI_ERR("panel status command parsing failed\n");
  2642. rc = -EINVAL;
  2643. goto error;
  2644. }
  2645. if (!dsi_panel_parse_esd_status_len(utils,
  2646. "qcom,mdss-dsi-panel-status-read-length",
  2647. &panel->esd_config.status_cmds_rlen,
  2648. esd_config->status_cmd.count)) {
  2649. DSI_ERR("Invalid status read length\n");
  2650. rc = -EINVAL;
  2651. goto error1;
  2652. }
  2653. if (dsi_panel_parse_esd_status_len(utils,
  2654. "qcom,mdss-dsi-panel-status-valid-params",
  2655. &panel->esd_config.status_valid_params,
  2656. esd_config->status_cmd.count)) {
  2657. if (!dsi_panel_parse_esd_check_valid_params(panel,
  2658. esd_config->status_cmd.count)) {
  2659. rc = -EINVAL;
  2660. goto error2;
  2661. }
  2662. }
  2663. status_len = 0;
  2664. lenp = esd_config->status_valid_params ?: esd_config->status_cmds_rlen;
  2665. for (i = 0; i < esd_config->status_cmd.count; ++i)
  2666. status_len += lenp[i];
  2667. if (!status_len) {
  2668. rc = -EINVAL;
  2669. goto error2;
  2670. }
  2671. /*
  2672. * Some panel may need multiple read commands to properly
  2673. * check panel status. Do a sanity check for proper status
  2674. * value which will be compared with the value read by dsi
  2675. * controller during ESD check. Also check if multiple read
  2676. * commands are there then, there should be corresponding
  2677. * status check values for each read command.
  2678. */
  2679. data = utils->find_property(utils->data,
  2680. "qcom,mdss-dsi-panel-status-value", &tmp);
  2681. tmp /= sizeof(u32);
  2682. if (!IS_ERR_OR_NULL(data) && tmp != 0 && (tmp % status_len) == 0) {
  2683. esd_config->groups = tmp / status_len;
  2684. } else {
  2685. DSI_ERR("error parse panel-status-value\n");
  2686. rc = -EINVAL;
  2687. goto error2;
  2688. }
  2689. esd_config->status_value =
  2690. kzalloc(sizeof(u32) * status_len * esd_config->groups,
  2691. GFP_KERNEL);
  2692. if (!esd_config->status_value) {
  2693. rc = -ENOMEM;
  2694. goto error2;
  2695. }
  2696. esd_config->return_buf = kcalloc(status_len * esd_config->groups,
  2697. sizeof(unsigned char), GFP_KERNEL);
  2698. if (!esd_config->return_buf) {
  2699. rc = -ENOMEM;
  2700. goto error3;
  2701. }
  2702. esd_config->status_buf = kzalloc(SZ_4K, GFP_KERNEL);
  2703. if (!esd_config->status_buf) {
  2704. rc = -ENOMEM;
  2705. goto error4;
  2706. }
  2707. rc = utils->read_u32_array(utils->data,
  2708. "qcom,mdss-dsi-panel-status-value",
  2709. esd_config->status_value, esd_config->groups * status_len);
  2710. if (rc) {
  2711. DSI_DEBUG("error reading panel status values\n");
  2712. memset(esd_config->status_value, 0,
  2713. esd_config->groups * status_len);
  2714. }
  2715. return 0;
  2716. error4:
  2717. kfree(esd_config->return_buf);
  2718. error3:
  2719. kfree(esd_config->status_value);
  2720. error2:
  2721. kfree(esd_config->status_valid_params);
  2722. kfree(esd_config->status_cmds_rlen);
  2723. error1:
  2724. kfree(esd_config->status_cmd.cmds);
  2725. error:
  2726. return rc;
  2727. }
  2728. static int dsi_panel_parse_esd_config(struct dsi_panel *panel)
  2729. {
  2730. int rc = 0;
  2731. const char *string;
  2732. struct drm_panel_esd_config *esd_config;
  2733. struct dsi_parser_utils *utils = &panel->utils;
  2734. u8 *esd_mode = NULL;
  2735. esd_config = &panel->esd_config;
  2736. esd_config->status_mode = ESD_MODE_MAX;
  2737. esd_config->esd_enabled = utils->read_bool(utils->data,
  2738. "qcom,esd-check-enabled");
  2739. if (!esd_config->esd_enabled)
  2740. return 0;
  2741. rc = utils->read_string(utils->data,
  2742. "qcom,mdss-dsi-panel-status-check-mode", &string);
  2743. if (!rc) {
  2744. if (!strcmp(string, "bta_check")) {
  2745. esd_config->status_mode = ESD_MODE_SW_BTA;
  2746. } else if (!strcmp(string, "reg_read")) {
  2747. esd_config->status_mode = ESD_MODE_REG_READ;
  2748. } else if (!strcmp(string, "te_signal_check")) {
  2749. if (panel->panel_mode == DSI_OP_CMD_MODE) {
  2750. esd_config->status_mode = ESD_MODE_PANEL_TE;
  2751. } else {
  2752. DSI_ERR("TE-ESD not valid for video mode\n");
  2753. rc = -EINVAL;
  2754. goto error;
  2755. }
  2756. } else {
  2757. DSI_ERR("No valid panel-status-check-mode string\n");
  2758. rc = -EINVAL;
  2759. goto error;
  2760. }
  2761. } else {
  2762. DSI_DEBUG("status check method not defined!\n");
  2763. rc = -EINVAL;
  2764. goto error;
  2765. }
  2766. if (panel->esd_config.status_mode == ESD_MODE_REG_READ) {
  2767. rc = dsi_panel_parse_esd_reg_read_configs(panel);
  2768. if (rc) {
  2769. DSI_ERR("failed to parse esd reg read mode params, rc=%d\n",
  2770. rc);
  2771. goto error;
  2772. }
  2773. esd_mode = "register_read";
  2774. } else if (panel->esd_config.status_mode == ESD_MODE_SW_BTA) {
  2775. esd_mode = "bta_trigger";
  2776. } else if (panel->esd_config.status_mode == ESD_MODE_PANEL_TE) {
  2777. esd_mode = "te_check";
  2778. }
  2779. DSI_DEBUG("ESD enabled with mode: %s\n", esd_mode);
  2780. return 0;
  2781. error:
  2782. panel->esd_config.esd_enabled = false;
  2783. return rc;
  2784. }
  2785. static void dsi_panel_update_util(struct dsi_panel *panel,
  2786. struct device_node *parser_node)
  2787. {
  2788. struct dsi_parser_utils *utils = &panel->utils;
  2789. if (parser_node) {
  2790. *utils = *dsi_parser_get_parser_utils();
  2791. utils->data = parser_node;
  2792. DSI_DEBUG("switching to parser APIs\n");
  2793. goto end;
  2794. }
  2795. *utils = *dsi_parser_get_of_utils();
  2796. utils->data = panel->panel_of_node;
  2797. end:
  2798. utils->node = panel->panel_of_node;
  2799. }
  2800. static int dsi_panel_vm_stub(struct dsi_panel *panel)
  2801. {
  2802. return 0;
  2803. }
  2804. static void dsi_panel_setup_vm_ops(struct dsi_panel *panel, bool trusted_vm_env)
  2805. {
  2806. if (trusted_vm_env) {
  2807. panel->panel_ops.pinctrl_init = dsi_panel_vm_stub;
  2808. panel->panel_ops.gpio_request = dsi_panel_vm_stub;
  2809. panel->panel_ops.pinctrl_deinit = dsi_panel_vm_stub;
  2810. panel->panel_ops.gpio_release = dsi_panel_vm_stub;
  2811. panel->panel_ops.bl_register = dsi_panel_vm_stub;
  2812. panel->panel_ops.bl_unregister = dsi_panel_vm_stub;
  2813. panel->panel_ops.parse_gpios = dsi_panel_vm_stub;
  2814. } else {
  2815. panel->panel_ops.pinctrl_init = dsi_panel_pinctrl_init;
  2816. panel->panel_ops.gpio_request = dsi_panel_gpio_request;
  2817. panel->panel_ops.pinctrl_deinit = dsi_panel_pinctrl_deinit;
  2818. panel->panel_ops.gpio_release = dsi_panel_gpio_release;
  2819. panel->panel_ops.bl_register = dsi_panel_bl_register;
  2820. panel->panel_ops.bl_unregister = dsi_panel_bl_unregister;
  2821. panel->panel_ops.parse_gpios = dsi_panel_parse_gpios;
  2822. }
  2823. }
  2824. struct dsi_panel *dsi_panel_get(struct device *parent,
  2825. struct device_node *of_node,
  2826. struct device_node *parser_node,
  2827. const char *type,
  2828. int topology_override,
  2829. bool trusted_vm_env)
  2830. {
  2831. struct dsi_panel *panel;
  2832. struct dsi_parser_utils *utils;
  2833. const char *panel_physical_type;
  2834. int rc = 0;
  2835. panel = kzalloc(sizeof(*panel), GFP_KERNEL);
  2836. if (!panel)
  2837. return ERR_PTR(-ENOMEM);
  2838. dsi_panel_setup_vm_ops(panel, trusted_vm_env);
  2839. panel->panel_of_node = of_node;
  2840. panel->parent = parent;
  2841. panel->type = type;
  2842. dsi_panel_update_util(panel, parser_node);
  2843. utils = &panel->utils;
  2844. panel->name = utils->get_property(utils->data,
  2845. "qcom,mdss-dsi-panel-name", NULL);
  2846. if (!panel->name)
  2847. panel->name = DSI_PANEL_DEFAULT_LABEL;
  2848. /*
  2849. * Set panel type to LCD as default.
  2850. */
  2851. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_LCD;
  2852. panel_physical_type = utils->get_property(utils->data,
  2853. "qcom,mdss-dsi-panel-physical-type", NULL);
  2854. if (panel_physical_type && !strcmp(panel_physical_type, "oled"))
  2855. panel->panel_type = DSI_DISPLAY_PANEL_TYPE_OLED;
  2856. rc = dsi_panel_parse_host_config(panel);
  2857. if (rc) {
  2858. DSI_ERR("failed to parse host configuration, rc=%d\n",
  2859. rc);
  2860. goto error;
  2861. }
  2862. rc = dsi_panel_parse_panel_mode(panel);
  2863. if (rc) {
  2864. DSI_ERR("failed to parse panel mode configuration, rc=%d\n",
  2865. rc);
  2866. goto error;
  2867. }
  2868. rc = dsi_panel_parse_dfps_caps(panel);
  2869. if (rc)
  2870. DSI_ERR("failed to parse dfps configuration, rc=%d\n", rc);
  2871. rc = dsi_panel_parse_qsync_caps(panel, of_node);
  2872. if (rc)
  2873. DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
  2874. /* allow qsync support only if DFPS is with VFP approach */
  2875. if ((panel->dfps_caps.dfps_support) &&
  2876. !(panel->dfps_caps.type == DSI_DFPS_IMMEDIATE_VFP))
  2877. panel->qsync_min_fps = 0;
  2878. rc = dsi_panel_parse_dyn_clk_caps(panel);
  2879. if (rc)
  2880. DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
  2881. rc = dsi_panel_parse_phy_props(panel);
  2882. if (rc) {
  2883. DSI_ERR("failed to parse panel physical dimension, rc=%d\n",
  2884. rc);
  2885. goto error;
  2886. }
  2887. rc = panel->panel_ops.parse_gpios(panel);
  2888. if (rc) {
  2889. DSI_ERR("failed to parse panel gpios, rc=%d\n", rc);
  2890. goto error;
  2891. }
  2892. rc = dsi_panel_parse_power_cfg(panel);
  2893. if (rc)
  2894. DSI_ERR("failed to parse power config, rc=%d\n", rc);
  2895. rc = dsi_panel_parse_bl_config(panel);
  2896. if (rc) {
  2897. DSI_ERR("failed to parse backlight config, rc=%d\n", rc);
  2898. if (rc == -EPROBE_DEFER)
  2899. goto error;
  2900. }
  2901. rc = dsi_panel_parse_misc_features(panel);
  2902. if (rc)
  2903. DSI_ERR("failed to parse misc features, rc=%d\n", rc);
  2904. rc = dsi_panel_parse_hdr_config(panel);
  2905. if (rc)
  2906. DSI_ERR("failed to parse hdr config, rc=%d\n", rc);
  2907. rc = dsi_panel_get_mode_count(panel);
  2908. if (rc) {
  2909. DSI_ERR("failed to get mode count, rc=%d\n", rc);
  2910. goto error;
  2911. }
  2912. rc = dsi_panel_parse_dms_info(panel);
  2913. if (rc)
  2914. DSI_DEBUG("failed to get dms info, rc=%d\n", rc);
  2915. rc = dsi_panel_parse_esd_config(panel);
  2916. if (rc)
  2917. DSI_DEBUG("failed to parse esd config, rc=%d\n", rc);
  2918. rc = dsi_panel_vreg_get(panel);
  2919. if (rc) {
  2920. DSI_ERR("[%s] failed to get panel regulators, rc=%d\n",
  2921. panel->name, rc);
  2922. goto error;
  2923. }
  2924. panel->power_mode = SDE_MODE_DPMS_OFF;
  2925. drm_panel_init(&panel->drm_panel);
  2926. panel->drm_panel.dev = &panel->mipi_device.dev;
  2927. panel->mipi_device.dev.of_node = of_node;
  2928. rc = drm_panel_add(&panel->drm_panel);
  2929. if (rc)
  2930. goto error_vreg_put;
  2931. mutex_init(&panel->panel_lock);
  2932. return panel;
  2933. error_vreg_put:
  2934. (void)dsi_panel_vreg_put(panel);
  2935. error:
  2936. kfree(panel);
  2937. return ERR_PTR(rc);
  2938. }
  2939. void dsi_panel_put(struct dsi_panel *panel)
  2940. {
  2941. drm_panel_remove(&panel->drm_panel);
  2942. /* free resources allocated for ESD check */
  2943. dsi_panel_esd_config_deinit(&panel->esd_config);
  2944. kfree(panel);
  2945. }
  2946. int dsi_panel_drv_init(struct dsi_panel *panel,
  2947. struct mipi_dsi_host *host)
  2948. {
  2949. int rc = 0;
  2950. struct mipi_dsi_device *dev;
  2951. if (!panel || !host) {
  2952. DSI_ERR("invalid params\n");
  2953. return -EINVAL;
  2954. }
  2955. mutex_lock(&panel->panel_lock);
  2956. dev = &panel->mipi_device;
  2957. dev->host = host;
  2958. /*
  2959. * We dont have device structure since panel is not a device node.
  2960. * When using drm panel framework, the device is probed when the host is
  2961. * create.
  2962. */
  2963. dev->channel = 0;
  2964. dev->lanes = 4;
  2965. panel->host = host;
  2966. rc = panel->panel_ops.pinctrl_init(panel);
  2967. if (rc) {
  2968. DSI_ERR("[%s] failed to init pinctrl, rc=%d\n",
  2969. panel->name, rc);
  2970. goto exit;
  2971. }
  2972. rc = panel->panel_ops.gpio_request(panel);
  2973. if (rc) {
  2974. DSI_ERR("[%s] failed to request gpios, rc=%d\n", panel->name,
  2975. rc);
  2976. goto error_pinctrl_deinit;
  2977. }
  2978. rc = panel->panel_ops.bl_register(panel);
  2979. if (rc) {
  2980. if (rc != -EPROBE_DEFER)
  2981. DSI_ERR("[%s] failed to register backlight, rc=%d\n",
  2982. panel->name, rc);
  2983. goto error_gpio_release;
  2984. }
  2985. goto exit;
  2986. error_gpio_release:
  2987. (void)dsi_panel_gpio_release(panel);
  2988. error_pinctrl_deinit:
  2989. (void)dsi_panel_pinctrl_deinit(panel);
  2990. exit:
  2991. mutex_unlock(&panel->panel_lock);
  2992. return rc;
  2993. }
  2994. int dsi_panel_drv_deinit(struct dsi_panel *panel)
  2995. {
  2996. int rc = 0;
  2997. if (!panel) {
  2998. DSI_ERR("invalid params\n");
  2999. return -EINVAL;
  3000. }
  3001. mutex_lock(&panel->panel_lock);
  3002. rc = panel->panel_ops.bl_unregister(panel);
  3003. if (rc)
  3004. DSI_ERR("[%s] failed to unregister backlight, rc=%d\n",
  3005. panel->name, rc);
  3006. rc = panel->panel_ops.gpio_release(panel);
  3007. if (rc)
  3008. DSI_ERR("[%s] failed to release gpios, rc=%d\n", panel->name,
  3009. rc);
  3010. rc = panel->panel_ops.pinctrl_deinit(panel);
  3011. if (rc)
  3012. DSI_ERR("[%s] failed to deinit gpios, rc=%d\n", panel->name,
  3013. rc);
  3014. rc = dsi_panel_vreg_put(panel);
  3015. if (rc)
  3016. DSI_ERR("[%s] failed to put regs, rc=%d\n", panel->name, rc);
  3017. panel->host = NULL;
  3018. memset(&panel->mipi_device, 0x0, sizeof(panel->mipi_device));
  3019. mutex_unlock(&panel->panel_lock);
  3020. return rc;
  3021. }
  3022. int dsi_panel_validate_mode(struct dsi_panel *panel,
  3023. struct dsi_display_mode *mode)
  3024. {
  3025. return 0;
  3026. }
  3027. static int dsi_panel_get_max_res_count(struct dsi_parser_utils *utils,
  3028. struct device_node *node, u32 *dsc_count, u32 *lm_count)
  3029. {
  3030. const char *compression;
  3031. u32 *array = NULL, top_count, len, i;
  3032. int rc = -EINVAL;
  3033. bool dsc_enable = false;
  3034. *dsc_count = 0;
  3035. *lm_count = 0;
  3036. compression = utils->get_property(node, "qcom,compression-mode", NULL);
  3037. if (compression && !strcmp(compression, "dsc"))
  3038. dsc_enable = true;
  3039. len = utils->count_u32_elems(node, "qcom,display-topology");
  3040. if (len <= 0 || len % TOPOLOGY_SET_LEN ||
  3041. len > (TOPOLOGY_SET_LEN * MAX_TOPOLOGY))
  3042. return rc;
  3043. top_count = len / TOPOLOGY_SET_LEN;
  3044. array = kcalloc(len, sizeof(u32), GFP_KERNEL);
  3045. if (!array)
  3046. return -ENOMEM;
  3047. rc = utils->read_u32_array(node, "qcom,display-topology", array, len);
  3048. if (rc) {
  3049. DSI_ERR("unable to read the display topologies, rc = %d\n", rc);
  3050. goto read_fail;
  3051. }
  3052. for (i = 0; i < top_count; i++) {
  3053. *lm_count = max(*lm_count, array[i * TOPOLOGY_SET_LEN]);
  3054. if (dsc_enable)
  3055. *dsc_count = max(*dsc_count,
  3056. array[i * TOPOLOGY_SET_LEN + 1]);
  3057. }
  3058. read_fail:
  3059. kfree(array);
  3060. return 0;
  3061. }
  3062. int dsi_panel_get_mode_count(struct dsi_panel *panel)
  3063. {
  3064. const u32 SINGLE_MODE_SUPPORT = 1;
  3065. struct dsi_parser_utils *utils;
  3066. struct device_node *timings_np, *child_np;
  3067. int num_dfps_rates, num_bit_clks;
  3068. int num_video_modes = 0, num_cmd_modes = 0;
  3069. int count, rc = 0;
  3070. u32 dsc_count = 0, lm_count = 0;
  3071. if (!panel) {
  3072. DSI_ERR("invalid params\n");
  3073. return -EINVAL;
  3074. }
  3075. utils = &panel->utils;
  3076. panel->num_timing_nodes = 0;
  3077. timings_np = utils->get_child_by_name(utils->data,
  3078. "qcom,mdss-dsi-display-timings");
  3079. if (!timings_np && !panel->host_config.ext_bridge_mode) {
  3080. DSI_ERR("no display timing nodes defined\n");
  3081. rc = -EINVAL;
  3082. goto error;
  3083. }
  3084. count = utils->get_child_count(timings_np);
  3085. if ((!count && !panel->host_config.ext_bridge_mode) ||
  3086. count > DSI_MODE_MAX) {
  3087. DSI_ERR("invalid count of timing nodes: %d\n", count);
  3088. rc = -EINVAL;
  3089. goto error;
  3090. }
  3091. /* No multiresolution support is available for video mode panels.
  3092. * Multi-mode is supported for video mode during POMS is enabled.
  3093. */
  3094. if (panel->panel_mode != DSI_OP_CMD_MODE &&
  3095. !panel->host_config.ext_bridge_mode &&
  3096. !panel->panel_mode_switch_enabled)
  3097. count = SINGLE_MODE_SUPPORT;
  3098. panel->num_timing_nodes = count;
  3099. dsi_for_each_child_node(timings_np, child_np) {
  3100. if (utils->read_bool(child_np, "qcom,mdss-dsi-video-mode"))
  3101. num_video_modes++;
  3102. else if (utils->read_bool(child_np,
  3103. "qcom,mdss-dsi-cmd-mode"))
  3104. num_cmd_modes++;
  3105. else if (panel->panel_mode == DSI_OP_VIDEO_MODE)
  3106. num_video_modes++;
  3107. else if (panel->panel_mode == DSI_OP_CMD_MODE)
  3108. num_cmd_modes++;
  3109. dsi_panel_get_max_res_count(utils, child_np,
  3110. &dsc_count, &lm_count);
  3111. panel->dsc_count = max(dsc_count, panel->dsc_count);
  3112. panel->lm_count = max(lm_count, panel->lm_count);
  3113. }
  3114. num_dfps_rates = !panel->dfps_caps.dfps_support ? 1 :
  3115. panel->dfps_caps.dfps_list_len;
  3116. num_bit_clks = !panel->dyn_clk_caps.dyn_clk_support ? 1 :
  3117. panel->dyn_clk_caps.bit_clk_list_len;
  3118. /*
  3119. * Inflate num_of_modes by fps and bit clks in dfps.
  3120. * Single command mode for video mode panels supporting
  3121. * panel operating mode switch.
  3122. */
  3123. num_video_modes = num_video_modes * num_bit_clks * num_dfps_rates;
  3124. if ((panel->panel_mode == DSI_OP_VIDEO_MODE) &&
  3125. (panel->panel_mode_switch_enabled))
  3126. num_cmd_modes = 1;
  3127. else
  3128. num_cmd_modes = num_cmd_modes * num_bit_clks;
  3129. panel->num_display_modes = num_video_modes + num_cmd_modes;
  3130. error:
  3131. return rc;
  3132. }
  3133. int dsi_panel_get_phy_props(struct dsi_panel *panel,
  3134. struct dsi_panel_phy_props *phy_props)
  3135. {
  3136. int rc = 0;
  3137. if (!panel || !phy_props) {
  3138. DSI_ERR("invalid params\n");
  3139. return -EINVAL;
  3140. }
  3141. memcpy(phy_props, &panel->phy_props, sizeof(*phy_props));
  3142. return rc;
  3143. }
  3144. int dsi_panel_get_dfps_caps(struct dsi_panel *panel,
  3145. struct dsi_dfps_capabilities *dfps_caps)
  3146. {
  3147. int rc = 0;
  3148. if (!panel || !dfps_caps) {
  3149. DSI_ERR("invalid params\n");
  3150. return -EINVAL;
  3151. }
  3152. memcpy(dfps_caps, &panel->dfps_caps, sizeof(*dfps_caps));
  3153. return rc;
  3154. }
  3155. void dsi_panel_put_mode(struct dsi_display_mode *mode)
  3156. {
  3157. int i;
  3158. if (!mode->priv_info)
  3159. return;
  3160. for (i = 0; i < DSI_CMD_SET_MAX; i++) {
  3161. dsi_panel_destroy_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3162. dsi_panel_dealloc_cmd_packets(&mode->priv_info->cmd_sets[i]);
  3163. }
  3164. kfree(mode->priv_info);
  3165. }
  3166. void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
  3167. struct dsi_display_mode *mode, u32 frame_threshold_us)
  3168. {
  3169. u32 frame_time_us, nslices;
  3170. u64 min_bitclk_hz, total_active_pixels, bits_per_line, pclk_rate_hz,
  3171. dsi_transfer_time_us, pixel_clk_khz;
  3172. struct msm_display_dsc_info *dsc = mode->timing.dsc;
  3173. struct dsi_mode_info *timing = &mode->timing;
  3174. struct dsi_display_mode *display_mode;
  3175. u32 jitter_numer, jitter_denom, prefill_lines;
  3176. u32 min_threshold_us, prefill_time_us, max_transfer_us;
  3177. u16 bpp;
  3178. /* Packet overlead in bits,2 bytes header + 2 bytes checksum
  3179. * + 1 byte dcs data command.
  3180. */
  3181. const u32 packet_overhead = 56;
  3182. display_mode = container_of(timing, struct dsi_display_mode, timing);
  3183. jitter_numer = display_mode->priv_info->panel_jitter_numer;
  3184. jitter_denom = display_mode->priv_info->panel_jitter_denom;
  3185. frame_time_us = mult_frac(1000, 1000, (timing->refresh_rate));
  3186. if (timing->refresh_rate >= 120)
  3187. frame_threshold_us = HIGH_REFRESH_RATE_THRESHOLD_TIME_US;
  3188. if (timing->dsc_enabled) {
  3189. nslices = (timing->h_active)/(dsc->config.slice_width);
  3190. /* (slice width x bit-per-pixel + packet overhead) x
  3191. * number of slices x height x fps / lane
  3192. */
  3193. bpp = DSC_BPP(dsc->config);
  3194. bits_per_line = ((dsc->config.slice_width * bpp) +
  3195. packet_overhead) * nslices;
  3196. bits_per_line = bits_per_line / (config->num_data_lanes);
  3197. min_bitclk_hz = (bits_per_line * timing->v_active *
  3198. timing->refresh_rate);
  3199. } else {
  3200. total_active_pixels = ((dsi_h_active_dce(timing)
  3201. * timing->v_active));
  3202. /* calculate the actual bitclk needed to transfer the frame */
  3203. min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
  3204. (config->bpp));
  3205. do_div(min_bitclk_hz, config->num_data_lanes);
  3206. }
  3207. timing->min_dsi_clk_hz = min_bitclk_hz;
  3208. min_threshold_us = mult_frac(frame_time_us,
  3209. jitter_numer, (jitter_denom * 100));
  3210. /*
  3211. * Increase the prefill_lines proportionately as recommended
  3212. * 35lines for 60fps, 52 for 90fps, 70lines for 120fps.
  3213. */
  3214. prefill_lines = mult_frac(MIN_PREFILL_LINES,
  3215. timing->refresh_rate, 60);
  3216. prefill_time_us = mult_frac(frame_time_us, prefill_lines,
  3217. (timing->v_active));
  3218. /*
  3219. * Threshold is sum of panel jitter time, prefill line time
  3220. * plus 64usec buffer time.
  3221. */
  3222. min_threshold_us = min_threshold_us + 64 + prefill_time_us;
  3223. DSI_DEBUG("min threshold time=%d\n", min_threshold_us);
  3224. if (timing->clk_rate_hz) {
  3225. /* adjust the transfer time proportionately for bit clk*/
  3226. dsi_transfer_time_us = frame_time_us * min_bitclk_hz;
  3227. do_div(dsi_transfer_time_us, timing->clk_rate_hz);
  3228. timing->dsi_transfer_time_us = dsi_transfer_time_us;
  3229. } else if (mode->priv_info->mdp_transfer_time_us) {
  3230. max_transfer_us = frame_time_us - min_threshold_us;
  3231. mode->priv_info->mdp_transfer_time_us = min(
  3232. mode->priv_info->mdp_transfer_time_us,
  3233. max_transfer_us);
  3234. timing->dsi_transfer_time_us =
  3235. mode->priv_info->mdp_transfer_time_us;
  3236. } else {
  3237. if (min_threshold_us > frame_threshold_us)
  3238. frame_threshold_us = min_threshold_us;
  3239. timing->dsi_transfer_time_us = frame_time_us -
  3240. frame_threshold_us;
  3241. }
  3242. timing->mdp_transfer_time_us = timing->dsi_transfer_time_us;
  3243. /* Force update mdp xfer time to hal,if clk and mdp xfer time is set */
  3244. if (mode->priv_info->mdp_transfer_time_us && timing->clk_rate_hz) {
  3245. timing->mdp_transfer_time_us =
  3246. mode->priv_info->mdp_transfer_time_us;
  3247. }
  3248. /* Calculate pclk_khz to update modeinfo */
  3249. pclk_rate_hz = min_bitclk_hz * frame_time_us;
  3250. do_div(pclk_rate_hz, timing->dsi_transfer_time_us);
  3251. pixel_clk_khz = pclk_rate_hz * config->num_data_lanes;
  3252. do_div(pixel_clk_khz, config->bpp);
  3253. display_mode->pixel_clk_khz = pixel_clk_khz;
  3254. display_mode->pixel_clk_khz = display_mode->pixel_clk_khz / 1000;
  3255. }
  3256. int dsi_panel_get_mode(struct dsi_panel *panel,
  3257. u32 index, struct dsi_display_mode *mode,
  3258. int topology_override)
  3259. {
  3260. struct device_node *timings_np, *child_np;
  3261. struct dsi_parser_utils *utils;
  3262. struct dsi_display_mode_priv_info *prv_info;
  3263. u32 child_idx = 0;
  3264. int rc = 0, num_timings;
  3265. int traffic_mode;
  3266. int panel_mode;
  3267. void *utils_data = NULL;
  3268. if (!panel || !mode) {
  3269. DSI_ERR("invalid params\n");
  3270. return -EINVAL;
  3271. }
  3272. mutex_lock(&panel->panel_lock);
  3273. utils = &panel->utils;
  3274. mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
  3275. if (!mode->priv_info) {
  3276. rc = -ENOMEM;
  3277. goto done;
  3278. }
  3279. prv_info = mode->priv_info;
  3280. timings_np = utils->get_child_by_name(utils->data,
  3281. "qcom,mdss-dsi-display-timings");
  3282. if (!timings_np) {
  3283. DSI_ERR("no display timing nodes defined\n");
  3284. rc = -EINVAL;
  3285. goto parse_fail;
  3286. }
  3287. num_timings = utils->get_child_count(timings_np);
  3288. if (!num_timings || num_timings > DSI_MODE_MAX) {
  3289. DSI_ERR("invalid count of timing nodes: %d\n", num_timings);
  3290. rc = -EINVAL;
  3291. goto parse_fail;
  3292. }
  3293. utils_data = utils->data;
  3294. traffic_mode = panel->video_config.traffic_mode;
  3295. panel_mode = panel->panel_mode;
  3296. dsi_for_each_child_node(timings_np, child_np) {
  3297. if (index != child_idx++)
  3298. continue;
  3299. utils->data = child_np;
  3300. rc = dsi_panel_parse_timing(&mode->timing, utils);
  3301. if (rc) {
  3302. DSI_ERR("failed to parse panel timing, rc=%d\n", rc);
  3303. goto parse_fail;
  3304. }
  3305. rc = dsi_panel_parse_dsc_params(mode, utils);
  3306. if (rc) {
  3307. DSI_ERR("failed to parse dsc params, rc=%d\n", rc);
  3308. goto parse_fail;
  3309. }
  3310. rc = dsi_panel_parse_vdc_params(mode, utils, traffic_mode,
  3311. panel_mode);
  3312. if (rc) {
  3313. DSI_ERR("failed to parse vdc params, rc=%d\n", rc);
  3314. goto parse_fail;
  3315. }
  3316. rc = dsi_panel_parse_topology(prv_info, utils,
  3317. topology_override);
  3318. if (rc) {
  3319. DSI_ERR("failed to parse panel topology, rc=%d\n", rc);
  3320. goto parse_fail;
  3321. }
  3322. rc = dsi_panel_parse_cmd_sets(prv_info, utils);
  3323. if (rc) {
  3324. DSI_ERR("failed to parse command sets, rc=%d\n", rc);
  3325. goto parse_fail;
  3326. }
  3327. rc = dsi_panel_parse_jitter_config(mode, utils);
  3328. if (rc)
  3329. DSI_ERR(
  3330. "failed to parse panel jitter config, rc=%d\n", rc);
  3331. rc = dsi_panel_parse_phy_timing(mode, utils);
  3332. if (rc) {
  3333. DSI_ERR(
  3334. "failed to parse panel phy timings, rc=%d\n", rc);
  3335. goto parse_fail;
  3336. }
  3337. rc = dsi_panel_parse_partial_update_caps(mode, utils);
  3338. if (rc)
  3339. DSI_ERR("failed to partial update caps, rc=%d\n", rc);
  3340. if (panel->panel_mode_switch_enabled) {
  3341. rc = dsi_panel_parse_panel_mode_caps(mode, utils);
  3342. if (rc) {
  3343. rc = 0;
  3344. mode->panel_mode = panel->panel_mode;
  3345. DSI_INFO(
  3346. "POMS: panel mode isn't specified in timing[%d]\n",
  3347. child_idx);
  3348. }
  3349. } else {
  3350. mode->panel_mode = panel->panel_mode;
  3351. }
  3352. }
  3353. goto done;
  3354. parse_fail:
  3355. kfree(mode->priv_info);
  3356. mode->priv_info = NULL;
  3357. done:
  3358. utils->data = utils_data;
  3359. mutex_unlock(&panel->panel_lock);
  3360. return rc;
  3361. }
  3362. int dsi_panel_get_host_cfg_for_mode(struct dsi_panel *panel,
  3363. struct dsi_display_mode *mode,
  3364. struct dsi_host_config *config)
  3365. {
  3366. int rc = 0;
  3367. struct dsi_dyn_clk_caps *dyn_clk_caps = &panel->dyn_clk_caps;
  3368. if (!panel || !mode || !config) {
  3369. DSI_ERR("invalid params\n");
  3370. return -EINVAL;
  3371. }
  3372. mutex_lock(&panel->panel_lock);
  3373. config->panel_mode = panel->panel_mode;
  3374. memcpy(&config->common_config, &panel->host_config,
  3375. sizeof(config->common_config));
  3376. if (panel->panel_mode == DSI_OP_VIDEO_MODE) {
  3377. memcpy(&config->u.video_engine, &panel->video_config,
  3378. sizeof(config->u.video_engine));
  3379. } else {
  3380. memcpy(&config->u.cmd_engine, &panel->cmd_config,
  3381. sizeof(config->u.cmd_engine));
  3382. }
  3383. memcpy(&config->video_timing, &mode->timing,
  3384. sizeof(config->video_timing));
  3385. config->video_timing.mdp_transfer_time_us =
  3386. mode->priv_info->mdp_transfer_time_us;
  3387. config->video_timing.dsc_enabled = mode->priv_info->dsc_enabled;
  3388. config->video_timing.dsc = &mode->priv_info->dsc;
  3389. config->video_timing.vdc_enabled = mode->priv_info->vdc_enabled;
  3390. config->video_timing.vdc = &mode->priv_info->vdc;
  3391. if (dyn_clk_caps->dyn_clk_support)
  3392. config->bit_clk_rate_hz_override = mode->timing.clk_rate_hz;
  3393. else
  3394. config->bit_clk_rate_hz_override = mode->priv_info->clk_rate_hz;
  3395. config->esc_clk_rate_hz = 19200000;
  3396. mutex_unlock(&panel->panel_lock);
  3397. return rc;
  3398. }
  3399. int dsi_panel_pre_prepare(struct dsi_panel *panel)
  3400. {
  3401. int rc = 0;
  3402. if (!panel) {
  3403. DSI_ERR("invalid params\n");
  3404. return -EINVAL;
  3405. }
  3406. mutex_lock(&panel->panel_lock);
  3407. /* If LP11_INIT is set, panel will be powered up during prepare() */
  3408. if (panel->lp11_init)
  3409. goto error;
  3410. rc = dsi_panel_power_on(panel);
  3411. if (rc) {
  3412. DSI_ERR("[%s] panel power on failed, rc=%d\n", panel->name, rc);
  3413. goto error;
  3414. }
  3415. error:
  3416. mutex_unlock(&panel->panel_lock);
  3417. return rc;
  3418. }
  3419. int dsi_panel_update_pps(struct dsi_panel *panel)
  3420. {
  3421. int rc = 0;
  3422. struct dsi_panel_cmd_set *set = NULL;
  3423. struct dsi_display_mode_priv_info *priv_info = NULL;
  3424. if (!panel || !panel->cur_mode) {
  3425. DSI_ERR("invalid params\n");
  3426. return -EINVAL;
  3427. }
  3428. mutex_lock(&panel->panel_lock);
  3429. priv_info = panel->cur_mode->priv_info;
  3430. set = &priv_info->cmd_sets[DSI_CMD_SET_PPS];
  3431. if (priv_info->dsc_enabled)
  3432. dsi_dsc_create_pps_buf_cmd(&priv_info->dsc,
  3433. panel->dce_pps_cmd, 0,
  3434. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3435. else if (priv_info->vdc_enabled)
  3436. dsi_vdc_create_pps_buf_cmd(&priv_info->vdc,
  3437. panel->dce_pps_cmd, 0,
  3438. DSI_CMD_PPS_SIZE - DSI_CMD_PPS_HDR_SIZE);
  3439. if (priv_info->dsc_enabled || priv_info->vdc_enabled) {
  3440. rc = dsi_panel_create_cmd_packets(panel->dce_pps_cmd,
  3441. DSI_CMD_PPS_SIZE, 1, set->cmds);
  3442. if (rc) {
  3443. DSI_ERR("failed to create cmd packets, rc=%d\n", rc);
  3444. goto error;
  3445. }
  3446. }
  3447. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PPS);
  3448. if (rc) {
  3449. DSI_ERR("[%s] failed to send DSI_CMD_SET_PPS cmds, rc=%d\n",
  3450. panel->name, rc);
  3451. }
  3452. dsi_panel_destroy_cmd_packets(set);
  3453. error:
  3454. mutex_unlock(&panel->panel_lock);
  3455. return rc;
  3456. }
  3457. int dsi_panel_set_lp1(struct dsi_panel *panel)
  3458. {
  3459. int rc = 0;
  3460. if (!panel) {
  3461. DSI_ERR("invalid params\n");
  3462. return -EINVAL;
  3463. }
  3464. mutex_lock(&panel->panel_lock);
  3465. if (!panel->panel_initialized)
  3466. goto exit;
  3467. /*
  3468. * Consider LP1->LP2->LP1.
  3469. * If the panel is already in LP mode, do not need to
  3470. * set the regulator.
  3471. * IBB and AB power mode would be set at the same time
  3472. * in PMIC driver, so we only call ibb setting that is enough.
  3473. */
  3474. if (dsi_panel_is_type_oled(panel) &&
  3475. panel->power_mode != SDE_MODE_DPMS_LP2)
  3476. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3477. "ibb", REGULATOR_MODE_IDLE);
  3478. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP1);
  3479. if (rc)
  3480. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP1 cmd, rc=%d\n",
  3481. panel->name, rc);
  3482. exit:
  3483. mutex_unlock(&panel->panel_lock);
  3484. return rc;
  3485. }
  3486. int dsi_panel_set_lp2(struct dsi_panel *panel)
  3487. {
  3488. int rc = 0;
  3489. if (!panel) {
  3490. DSI_ERR("invalid params\n");
  3491. return -EINVAL;
  3492. }
  3493. mutex_lock(&panel->panel_lock);
  3494. if (!panel->panel_initialized)
  3495. goto exit;
  3496. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_LP2);
  3497. if (rc)
  3498. DSI_ERR("[%s] failed to send DSI_CMD_SET_LP2 cmd, rc=%d\n",
  3499. panel->name, rc);
  3500. exit:
  3501. mutex_unlock(&panel->panel_lock);
  3502. return rc;
  3503. }
  3504. int dsi_panel_set_nolp(struct dsi_panel *panel)
  3505. {
  3506. int rc = 0;
  3507. if (!panel) {
  3508. DSI_ERR("invalid params\n");
  3509. return -EINVAL;
  3510. }
  3511. mutex_lock(&panel->panel_lock);
  3512. if (!panel->panel_initialized)
  3513. goto exit;
  3514. /*
  3515. * Consider about LP1->LP2->NOLP.
  3516. */
  3517. if (dsi_panel_is_type_oled(panel) &&
  3518. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3519. panel->power_mode == SDE_MODE_DPMS_LP2))
  3520. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3521. "ibb", REGULATOR_MODE_NORMAL);
  3522. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_NOLP);
  3523. if (rc)
  3524. DSI_ERR("[%s] failed to send DSI_CMD_SET_NOLP cmd, rc=%d\n",
  3525. panel->name, rc);
  3526. exit:
  3527. mutex_unlock(&panel->panel_lock);
  3528. return rc;
  3529. }
  3530. int dsi_panel_prepare(struct dsi_panel *panel)
  3531. {
  3532. int rc = 0;
  3533. if (!panel) {
  3534. DSI_ERR("invalid params\n");
  3535. return -EINVAL;
  3536. }
  3537. mutex_lock(&panel->panel_lock);
  3538. if (panel->lp11_init) {
  3539. rc = dsi_panel_power_on(panel);
  3540. if (rc) {
  3541. DSI_ERR("[%s] panel power on failed, rc=%d\n",
  3542. panel->name, rc);
  3543. goto error;
  3544. }
  3545. }
  3546. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_ON);
  3547. if (rc) {
  3548. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_ON cmds, rc=%d\n",
  3549. panel->name, rc);
  3550. goto error;
  3551. }
  3552. error:
  3553. mutex_unlock(&panel->panel_lock);
  3554. return rc;
  3555. }
  3556. static int dsi_panel_roi_prepare_dcs_cmds(struct dsi_panel_cmd_set *set,
  3557. struct dsi_rect *roi, int ctrl_idx, int unicast)
  3558. {
  3559. static const int ROI_CMD_LEN = 5;
  3560. int rc = 0;
  3561. /* DTYPE_DCS_LWRITE */
  3562. char *caset, *paset;
  3563. set->cmds = NULL;
  3564. caset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3565. if (!caset) {
  3566. rc = -ENOMEM;
  3567. goto exit;
  3568. }
  3569. caset[0] = 0x2a;
  3570. caset[1] = (roi->x & 0xFF00) >> 8;
  3571. caset[2] = roi->x & 0xFF;
  3572. caset[3] = ((roi->x - 1 + roi->w) & 0xFF00) >> 8;
  3573. caset[4] = (roi->x - 1 + roi->w) & 0xFF;
  3574. paset = kzalloc(ROI_CMD_LEN, GFP_KERNEL);
  3575. if (!paset) {
  3576. rc = -ENOMEM;
  3577. goto error_free_mem;
  3578. }
  3579. paset[0] = 0x2b;
  3580. paset[1] = (roi->y & 0xFF00) >> 8;
  3581. paset[2] = roi->y & 0xFF;
  3582. paset[3] = ((roi->y - 1 + roi->h) & 0xFF00) >> 8;
  3583. paset[4] = (roi->y - 1 + roi->h) & 0xFF;
  3584. set->type = DSI_CMD_SET_ROI;
  3585. set->state = DSI_CMD_SET_STATE_LP;
  3586. set->count = 2; /* send caset + paset together */
  3587. set->cmds = kcalloc(set->count, sizeof(*set->cmds), GFP_KERNEL);
  3588. if (!set->cmds) {
  3589. rc = -ENOMEM;
  3590. goto error_free_mem;
  3591. }
  3592. set->cmds[0].msg.channel = 0;
  3593. set->cmds[0].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3594. set->cmds[0].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3595. set->cmds[0].msg.ctrl = unicast ? ctrl_idx : 0;
  3596. set->cmds[0].msg.tx_len = ROI_CMD_LEN;
  3597. set->cmds[0].msg.tx_buf = caset;
  3598. set->cmds[0].msg.rx_len = 0;
  3599. set->cmds[0].msg.rx_buf = 0;
  3600. set->cmds[0].msg.wait_ms = 0;
  3601. set->cmds[0].last_command = 0;
  3602. set->cmds[0].post_wait_ms = 0;
  3603. set->cmds[1].msg.channel = 0;
  3604. set->cmds[1].msg.type = MIPI_DSI_DCS_LONG_WRITE;
  3605. set->cmds[1].msg.flags = unicast ? MIPI_DSI_MSG_UNICAST : 0;
  3606. set->cmds[1].msg.ctrl = unicast ? ctrl_idx : 0;
  3607. set->cmds[1].msg.tx_len = ROI_CMD_LEN;
  3608. set->cmds[1].msg.tx_buf = paset;
  3609. set->cmds[1].msg.rx_len = 0;
  3610. set->cmds[1].msg.rx_buf = 0;
  3611. set->cmds[1].msg.wait_ms = 0;
  3612. set->cmds[1].last_command = 1;
  3613. set->cmds[1].post_wait_ms = 0;
  3614. goto exit;
  3615. error_free_mem:
  3616. kfree(caset);
  3617. kfree(paset);
  3618. kfree(set->cmds);
  3619. exit:
  3620. return rc;
  3621. }
  3622. int dsi_panel_send_qsync_on_dcs(struct dsi_panel *panel,
  3623. int ctrl_idx)
  3624. {
  3625. int rc = 0;
  3626. if (!panel) {
  3627. DSI_ERR("invalid params\n");
  3628. return -EINVAL;
  3629. }
  3630. mutex_lock(&panel->panel_lock);
  3631. DSI_DEBUG("ctrl:%d qsync on\n", ctrl_idx);
  3632. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_ON);
  3633. if (rc)
  3634. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_ON cmds rc=%d\n",
  3635. panel->name, rc);
  3636. mutex_unlock(&panel->panel_lock);
  3637. return rc;
  3638. }
  3639. int dsi_panel_send_qsync_off_dcs(struct dsi_panel *panel,
  3640. int ctrl_idx)
  3641. {
  3642. int rc = 0;
  3643. if (!panel) {
  3644. DSI_ERR("invalid params\n");
  3645. return -EINVAL;
  3646. }
  3647. mutex_lock(&panel->panel_lock);
  3648. DSI_DEBUG("ctrl:%d qsync off\n", ctrl_idx);
  3649. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_QSYNC_OFF);
  3650. if (rc)
  3651. DSI_ERR("[%s] failed to send DSI_CMD_SET_QSYNC_OFF cmds rc=%d\n",
  3652. panel->name, rc);
  3653. mutex_unlock(&panel->panel_lock);
  3654. return rc;
  3655. }
  3656. int dsi_panel_send_roi_dcs(struct dsi_panel *panel, int ctrl_idx,
  3657. struct dsi_rect *roi)
  3658. {
  3659. int rc = 0;
  3660. struct dsi_panel_cmd_set *set;
  3661. struct dsi_display_mode_priv_info *priv_info;
  3662. if (!panel || !panel->cur_mode) {
  3663. DSI_ERR("Invalid params\n");
  3664. return -EINVAL;
  3665. }
  3666. priv_info = panel->cur_mode->priv_info;
  3667. set = &priv_info->cmd_sets[DSI_CMD_SET_ROI];
  3668. rc = dsi_panel_roi_prepare_dcs_cmds(set, roi, ctrl_idx, true);
  3669. if (rc) {
  3670. DSI_ERR("[%s] failed to prepare DSI_CMD_SET_ROI cmds, rc=%d\n",
  3671. panel->name, rc);
  3672. return rc;
  3673. }
  3674. DSI_DEBUG("[%s] send roi x %d y %d w %d h %d\n", panel->name,
  3675. roi->x, roi->y, roi->w, roi->h);
  3676. mutex_lock(&panel->panel_lock);
  3677. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ROI);
  3678. if (rc)
  3679. DSI_ERR("[%s] failed to send DSI_CMD_SET_ROI cmds, rc=%d\n",
  3680. panel->name, rc);
  3681. mutex_unlock(&panel->panel_lock);
  3682. dsi_panel_destroy_cmd_packets(set);
  3683. dsi_panel_dealloc_cmd_packets(set);
  3684. return rc;
  3685. }
  3686. int dsi_panel_pre_mode_switch_to_video(struct dsi_panel *panel)
  3687. {
  3688. int rc = 0;
  3689. if (!panel) {
  3690. DSI_ERR("Invalid params\n");
  3691. return -EINVAL;
  3692. }
  3693. mutex_lock(&panel->panel_lock);
  3694. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_CMD_TO_VID_SWITCH);
  3695. if (rc)
  3696. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3697. panel->name, rc);
  3698. mutex_unlock(&panel->panel_lock);
  3699. return rc;
  3700. }
  3701. int dsi_panel_pre_mode_switch_to_cmd(struct dsi_panel *panel)
  3702. {
  3703. int rc = 0;
  3704. if (!panel) {
  3705. DSI_ERR("Invalid params\n");
  3706. return -EINVAL;
  3707. }
  3708. mutex_lock(&panel->panel_lock);
  3709. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_VID_TO_CMD_SWITCH);
  3710. if (rc)
  3711. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3712. panel->name, rc);
  3713. mutex_unlock(&panel->panel_lock);
  3714. return rc;
  3715. }
  3716. int dsi_panel_mode_switch_to_cmd(struct dsi_panel *panel)
  3717. {
  3718. int rc = 0;
  3719. if (!panel) {
  3720. DSI_ERR("Invalid params\n");
  3721. return -EINVAL;
  3722. }
  3723. mutex_lock(&panel->panel_lock);
  3724. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_VID_TO_CMD_SWITCH);
  3725. if (rc)
  3726. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3727. panel->name, rc);
  3728. mutex_unlock(&panel->panel_lock);
  3729. return rc;
  3730. }
  3731. int dsi_panel_mode_switch_to_vid(struct dsi_panel *panel)
  3732. {
  3733. int rc = 0;
  3734. if (!panel) {
  3735. DSI_ERR("Invalid params\n");
  3736. return -EINVAL;
  3737. }
  3738. mutex_lock(&panel->panel_lock);
  3739. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_CMD_TO_VID_SWITCH);
  3740. if (rc)
  3741. DSI_ERR("[%s] failed to send DSI_CMD_SET_CMD_TO_VID_SWITCH cmds, rc=%d\n",
  3742. panel->name, rc);
  3743. mutex_unlock(&panel->panel_lock);
  3744. return rc;
  3745. }
  3746. int dsi_panel_switch(struct dsi_panel *panel)
  3747. {
  3748. int rc = 0;
  3749. if (!panel) {
  3750. DSI_ERR("Invalid params\n");
  3751. return -EINVAL;
  3752. }
  3753. mutex_lock(&panel->panel_lock);
  3754. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_TIMING_SWITCH);
  3755. if (rc)
  3756. DSI_ERR("[%s] failed to send DSI_CMD_SET_TIMING_SWITCH cmds, rc=%d\n",
  3757. panel->name, rc);
  3758. mutex_unlock(&panel->panel_lock);
  3759. return rc;
  3760. }
  3761. int dsi_panel_post_switch(struct dsi_panel *panel)
  3762. {
  3763. int rc = 0;
  3764. if (!panel) {
  3765. DSI_ERR("Invalid params\n");
  3766. return -EINVAL;
  3767. }
  3768. mutex_lock(&panel->panel_lock);
  3769. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_TIMING_SWITCH);
  3770. if (rc)
  3771. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_TIMING_SWITCH cmds, rc=%d\n",
  3772. panel->name, rc);
  3773. mutex_unlock(&panel->panel_lock);
  3774. return rc;
  3775. }
  3776. int dsi_panel_enable(struct dsi_panel *panel)
  3777. {
  3778. int rc = 0;
  3779. if (!panel) {
  3780. DSI_ERR("Invalid params\n");
  3781. return -EINVAL;
  3782. }
  3783. mutex_lock(&panel->panel_lock);
  3784. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_ON);
  3785. if (rc)
  3786. DSI_ERR("[%s] failed to send DSI_CMD_SET_ON cmds, rc=%d\n",
  3787. panel->name, rc);
  3788. else
  3789. panel->panel_initialized = true;
  3790. mutex_unlock(&panel->panel_lock);
  3791. return rc;
  3792. }
  3793. int dsi_panel_post_enable(struct dsi_panel *panel)
  3794. {
  3795. int rc = 0;
  3796. if (!panel) {
  3797. DSI_ERR("invalid params\n");
  3798. return -EINVAL;
  3799. }
  3800. mutex_lock(&panel->panel_lock);
  3801. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_ON);
  3802. if (rc) {
  3803. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_ON cmds, rc=%d\n",
  3804. panel->name, rc);
  3805. goto error;
  3806. }
  3807. error:
  3808. mutex_unlock(&panel->panel_lock);
  3809. return rc;
  3810. }
  3811. int dsi_panel_pre_disable(struct dsi_panel *panel)
  3812. {
  3813. int rc = 0;
  3814. if (!panel) {
  3815. DSI_ERR("invalid params\n");
  3816. return -EINVAL;
  3817. }
  3818. mutex_lock(&panel->panel_lock);
  3819. if (gpio_is_valid(panel->bl_config.en_gpio))
  3820. gpio_set_value(panel->bl_config.en_gpio, 0);
  3821. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_PRE_OFF);
  3822. if (rc) {
  3823. DSI_ERR("[%s] failed to send DSI_CMD_SET_PRE_OFF cmds, rc=%d\n",
  3824. panel->name, rc);
  3825. goto error;
  3826. }
  3827. error:
  3828. mutex_unlock(&panel->panel_lock);
  3829. return rc;
  3830. }
  3831. int dsi_panel_disable(struct dsi_panel *panel)
  3832. {
  3833. int rc = 0;
  3834. if (!panel) {
  3835. DSI_ERR("invalid params\n");
  3836. return -EINVAL;
  3837. }
  3838. mutex_lock(&panel->panel_lock);
  3839. /* Avoid sending panel off commands when ESD recovery is underway */
  3840. if (!atomic_read(&panel->esd_recovery_pending)) {
  3841. /*
  3842. * Need to set IBB/AB regulator mode to STANDBY,
  3843. * if panel is going off from AOD mode.
  3844. */
  3845. if (dsi_panel_is_type_oled(panel) &&
  3846. (panel->power_mode == SDE_MODE_DPMS_LP1 ||
  3847. panel->power_mode == SDE_MODE_DPMS_LP2))
  3848. dsi_pwr_panel_regulator_mode_set(&panel->power_info,
  3849. "ibb", REGULATOR_MODE_STANDBY);
  3850. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_OFF);
  3851. if (rc) {
  3852. /*
  3853. * Sending panel off commands may fail when DSI
  3854. * controller is in a bad state. These failures can be
  3855. * ignored since controller will go for full reset on
  3856. * subsequent display enable anyway.
  3857. */
  3858. pr_warn_ratelimited("[%s] failed to send DSI_CMD_SET_OFF cmds, rc=%d\n",
  3859. panel->name, rc);
  3860. rc = 0;
  3861. }
  3862. }
  3863. panel->panel_initialized = false;
  3864. panel->power_mode = SDE_MODE_DPMS_OFF;
  3865. mutex_unlock(&panel->panel_lock);
  3866. return rc;
  3867. }
  3868. int dsi_panel_unprepare(struct dsi_panel *panel)
  3869. {
  3870. int rc = 0;
  3871. if (!panel) {
  3872. DSI_ERR("invalid params\n");
  3873. return -EINVAL;
  3874. }
  3875. mutex_lock(&panel->panel_lock);
  3876. rc = dsi_panel_tx_cmd_set(panel, DSI_CMD_SET_POST_OFF);
  3877. if (rc) {
  3878. DSI_ERR("[%s] failed to send DSI_CMD_SET_POST_OFF cmds, rc=%d\n",
  3879. panel->name, rc);
  3880. goto error;
  3881. }
  3882. error:
  3883. mutex_unlock(&panel->panel_lock);
  3884. return rc;
  3885. }
  3886. int dsi_panel_post_unprepare(struct dsi_panel *panel)
  3887. {
  3888. int rc = 0;
  3889. if (!panel) {
  3890. DSI_ERR("invalid params\n");
  3891. return -EINVAL;
  3892. }
  3893. mutex_lock(&panel->panel_lock);
  3894. rc = dsi_panel_power_off(panel);
  3895. if (rc) {
  3896. DSI_ERR("[%s] panel power_Off failed, rc=%d\n",
  3897. panel->name, rc);
  3898. goto error;
  3899. }
  3900. error:
  3901. mutex_unlock(&panel->panel_lock);
  3902. return rc;
  3903. }