main.c 128 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2015-2020, 2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #define pr_fmt(fmt) "icnss2: " fmt
  7. #include <linux/of_address.h>
  8. #include <linux/clk.h>
  9. #include <linux/iommu.h>
  10. #include <linux/export.h>
  11. #include <linux/err.h>
  12. #include <linux/of.h>
  13. #include <linux/of_device.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/kernel.h>
  18. #include <linux/debugfs.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/slab.h>
  21. #include <linux/regulator/consumer.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/sched.h>
  24. #include <linux/delay.h>
  25. #include <linux/dma-mapping.h>
  26. #include <linux/thread_info.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/etherdevice.h>
  29. #include <linux/of.h>
  30. #include <linux/of_irq.h>
  31. #include <linux/pm_runtime.h>
  32. #include <linux/soc/qcom/qmi.h>
  33. #include <linux/sysfs.h>
  34. #include <linux/thermal.h>
  35. #include <soc/qcom/memory_dump.h>
  36. #include <soc/qcom/secure_buffer.h>
  37. #include <soc/qcom/socinfo.h>
  38. #include <soc/qcom/qcom_ramdump.h>
  39. #include <linux/soc/qcom/smem.h>
  40. #include <linux/soc/qcom/smem_state.h>
  41. #include <linux/remoteproc.h>
  42. #include <linux/remoteproc/qcom_rproc.h>
  43. #include <linux/soc/qcom/pdr.h>
  44. #include <linux/remoteproc.h>
  45. #include <linux/version.h>
  46. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  47. #include <trace/hooks/remoteproc.h>
  48. #endif
  49. #ifdef SLATE_MODULE_ENABLED
  50. #include <linux/soc/qcom/slatecom_interface.h>
  51. #include <linux/soc/qcom/slate_events_bridge_intf.h>
  52. #include <uapi/linux/slatecom_interface.h>
  53. #endif
  54. #include "main.h"
  55. #include "qmi.h"
  56. #include "debug.h"
  57. #include "power.h"
  58. #include "genl.h"
  59. #define MAX_PROP_SIZE 32
  60. #define NUM_LOG_PAGES 10
  61. #define NUM_LOG_LONG_PAGES 4
  62. #define ICNSS_MAGIC 0x5abc5abc
  63. #define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
  64. #define ICNSS_WLANPD_NAME "msm/modem/wlan_pd"
  65. #define ICNSS_DEFAULT_FEATURE_MASK 0x01
  66. #define ICNSS_M3_SEGMENT(segment) "wcnss_"segment
  67. #define ICNSS_M3_SEGMENT_PHYAREG "phyareg"
  68. #define ICNSS_M3_SEGMENT_PHYA "phydbg"
  69. #define ICNSS_M3_SEGMENT_WMACREG "wmac0reg"
  70. #define ICNSS_M3_SEGMENT_WCSSDBG "WCSSDBG"
  71. #define ICNSS_M3_SEGMENT_PHYAM3 "PHYAPDMEM"
  72. #define ICNSS_QUIRKS_DEFAULT BIT(FW_REJUVENATE_ENABLE)
  73. #define ICNSS_MAX_PROBE_CNT 2
  74. #define ICNSS_BDF_TYPE_DEFAULT ICNSS_BDF_ELF
  75. #define PROBE_TIMEOUT 15000
  76. #define SMP2P_SOC_WAKE_TIMEOUT 500
  77. #ifdef CONFIG_ICNSS2_DEBUG
  78. static unsigned long qmi_timeout = 3000;
  79. module_param(qmi_timeout, ulong, 0600);
  80. #define WLFW_TIMEOUT msecs_to_jiffies(qmi_timeout)
  81. #else
  82. #define WLFW_TIMEOUT msecs_to_jiffies(3000)
  83. #endif
  84. #define ICNSS_RECOVERY_TIMEOUT 60000
  85. #define ICNSS_WPSS_SSR_TIMEOUT 5000
  86. #define ICNSS_CAL_TIMEOUT 40000
  87. static struct icnss_priv *penv;
  88. static struct work_struct wpss_loader;
  89. static struct work_struct wpss_ssr_work;
  90. uint64_t dynamic_feature_mask = ICNSS_DEFAULT_FEATURE_MASK;
  91. #define ICNSS_EVENT_PENDING 2989
  92. #define ICNSS_EVENT_SYNC BIT(0)
  93. #define ICNSS_EVENT_UNINTERRUPTIBLE BIT(1)
  94. #define ICNSS_EVENT_SYNC_UNINTERRUPTIBLE (ICNSS_EVENT_UNINTERRUPTIBLE | \
  95. ICNSS_EVENT_SYNC)
  96. #define ICNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  97. #define ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  98. #define SMP2P_GET_MAX_RETRY 4
  99. #define SMP2P_GET_RETRY_DELAY_MS 500
  100. #define RAMDUMP_NUM_DEVICES 256
  101. #define ICNSS_RAMDUMP_NAME "icnss_ramdump"
  102. #define WLAN_EN_TEMP_THRESHOLD 5000
  103. #define WLAN_EN_DELAY 500
  104. #define ICNSS_RPROC_LEN 10
  105. static DEFINE_IDA(rd_minor_id);
  106. enum icnss_pdr_cause_index {
  107. ICNSS_FW_CRASH,
  108. ICNSS_ROOT_PD_CRASH,
  109. ICNSS_ROOT_PD_SHUTDOWN,
  110. ICNSS_HOST_ERROR,
  111. };
  112. static const char * const icnss_pdr_cause[] = {
  113. [ICNSS_FW_CRASH] = "FW crash",
  114. [ICNSS_ROOT_PD_CRASH] = "Root PD crashed",
  115. [ICNSS_ROOT_PD_SHUTDOWN] = "Root PD shutdown",
  116. [ICNSS_HOST_ERROR] = "Host error",
  117. };
  118. static void icnss_set_plat_priv(struct icnss_priv *priv)
  119. {
  120. penv = priv;
  121. }
  122. static struct icnss_priv *icnss_get_plat_priv(void)
  123. {
  124. return penv;
  125. }
  126. static inline void icnss_wpss_unload(struct icnss_priv *priv)
  127. {
  128. if (priv && priv->rproc) {
  129. rproc_shutdown(priv->rproc);
  130. rproc_put(priv->rproc);
  131. priv->rproc = NULL;
  132. }
  133. }
  134. static ssize_t icnss_sysfs_store(struct kobject *kobj,
  135. struct kobj_attribute *attr,
  136. const char *buf, size_t count)
  137. {
  138. struct icnss_priv *priv = icnss_get_plat_priv();
  139. if (!priv)
  140. return count;
  141. icnss_pr_dbg("Received shutdown indication");
  142. atomic_set(&priv->is_shutdown, true);
  143. if ((priv->wpss_supported || priv->rproc_fw_download) &&
  144. priv->device_id == ADRASTEA_DEVICE_ID)
  145. icnss_wpss_unload(priv);
  146. return count;
  147. }
  148. static struct kobj_attribute icnss_sysfs_attribute =
  149. __ATTR(shutdown, 0660, NULL, icnss_sysfs_store);
  150. static void icnss_pm_stay_awake(struct icnss_priv *priv)
  151. {
  152. if (atomic_inc_return(&priv->pm_count) != 1)
  153. return;
  154. icnss_pr_vdbg("PM stay awake, state: 0x%lx, count: %d\n", priv->state,
  155. atomic_read(&priv->pm_count));
  156. pm_stay_awake(&priv->pdev->dev);
  157. priv->stats.pm_stay_awake++;
  158. }
  159. static void icnss_pm_relax(struct icnss_priv *priv)
  160. {
  161. int r = atomic_dec_return(&priv->pm_count);
  162. WARN_ON(r < 0);
  163. if (r != 0)
  164. return;
  165. icnss_pr_vdbg("PM relax, state: 0x%lx, count: %d\n", priv->state,
  166. atomic_read(&priv->pm_count));
  167. pm_relax(&priv->pdev->dev);
  168. priv->stats.pm_relax++;
  169. }
  170. char *icnss_driver_event_to_str(enum icnss_driver_event_type type)
  171. {
  172. switch (type) {
  173. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  174. return "SERVER_ARRIVE";
  175. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  176. return "SERVER_EXIT";
  177. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  178. return "FW_READY";
  179. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  180. return "REGISTER_DRIVER";
  181. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  182. return "UNREGISTER_DRIVER";
  183. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  184. return "PD_SERVICE_DOWN";
  185. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  186. return "FW_EARLY_CRASH_IND";
  187. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  188. return "IDLE_SHUTDOWN";
  189. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  190. return "IDLE_RESTART";
  191. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  192. return "FW_INIT_DONE";
  193. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  194. return "QDSS_TRACE_REQ_MEM";
  195. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  196. return "QDSS_TRACE_SAVE";
  197. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  198. return "QDSS_TRACE_FREE";
  199. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  200. return "M3_DUMP_UPLOAD";
  201. case ICNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  202. return "IMS_WFC_CALL_IND";
  203. case ICNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  204. return "WLFW_TWC_CFG_IND";
  205. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  206. return "QDSS_TRACE_REQ_DATA";
  207. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  208. return "SUBSYS_RESTART_LEVEL";
  209. case ICNSS_DRIVER_EVENT_MAX:
  210. return "EVENT_MAX";
  211. }
  212. return "UNKNOWN";
  213. };
  214. char *icnss_soc_wake_event_to_str(enum icnss_soc_wake_event_type type)
  215. {
  216. switch (type) {
  217. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  218. return "SOC_WAKE_REQUEST";
  219. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  220. return "SOC_WAKE_RELEASE";
  221. case ICNSS_SOC_WAKE_EVENT_MAX:
  222. return "SOC_EVENT_MAX";
  223. }
  224. return "UNKNOWN";
  225. };
  226. int icnss_driver_event_post(struct icnss_priv *priv,
  227. enum icnss_driver_event_type type,
  228. u32 flags, void *data)
  229. {
  230. struct icnss_driver_event *event;
  231. unsigned long irq_flags;
  232. int gfp = GFP_KERNEL;
  233. int ret = 0;
  234. if (!priv)
  235. return -ENODEV;
  236. icnss_pr_dbg("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  237. icnss_driver_event_to_str(type), type, current->comm,
  238. flags, priv->state);
  239. if (type >= ICNSS_DRIVER_EVENT_MAX) {
  240. icnss_pr_err("Invalid Event type: %d, can't post", type);
  241. return -EINVAL;
  242. }
  243. if (in_interrupt() || irqs_disabled())
  244. gfp = GFP_ATOMIC;
  245. event = kzalloc(sizeof(*event), gfp);
  246. if (event == NULL)
  247. return -ENOMEM;
  248. icnss_pm_stay_awake(priv);
  249. event->type = type;
  250. event->data = data;
  251. init_completion(&event->complete);
  252. event->ret = ICNSS_EVENT_PENDING;
  253. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  254. spin_lock_irqsave(&priv->event_lock, irq_flags);
  255. list_add_tail(&event->list, &priv->event_list);
  256. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  257. priv->stats.events[type].posted++;
  258. queue_work(priv->event_wq, &priv->event_work);
  259. if (!(flags & ICNSS_EVENT_SYNC))
  260. goto out;
  261. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  262. wait_for_completion(&event->complete);
  263. else
  264. ret = wait_for_completion_interruptible(&event->complete);
  265. icnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  266. icnss_driver_event_to_str(type), type, priv->state, ret,
  267. event->ret);
  268. spin_lock_irqsave(&priv->event_lock, irq_flags);
  269. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  270. event->sync = false;
  271. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  272. ret = -EINTR;
  273. goto out;
  274. }
  275. spin_unlock_irqrestore(&priv->event_lock, irq_flags);
  276. ret = event->ret;
  277. kfree(event);
  278. out:
  279. icnss_pm_relax(priv);
  280. return ret;
  281. }
  282. int icnss_soc_wake_event_post(struct icnss_priv *priv,
  283. enum icnss_soc_wake_event_type type,
  284. u32 flags, void *data)
  285. {
  286. struct icnss_soc_wake_event *event;
  287. unsigned long irq_flags;
  288. int gfp = GFP_KERNEL;
  289. int ret = 0;
  290. if (!priv)
  291. return -ENODEV;
  292. icnss_pr_soc_wake("Posting event: %s(%d), %s, flags: 0x%x, state: 0x%lx\n",
  293. icnss_soc_wake_event_to_str(type),
  294. type, current->comm, flags, priv->state);
  295. if (type >= ICNSS_SOC_WAKE_EVENT_MAX) {
  296. icnss_pr_err("Invalid Event type: %d, can't post", type);
  297. return -EINVAL;
  298. }
  299. if (in_interrupt() || irqs_disabled())
  300. gfp = GFP_ATOMIC;
  301. event = kzalloc(sizeof(*event), gfp);
  302. if (!event)
  303. return -ENOMEM;
  304. icnss_pm_stay_awake(priv);
  305. event->type = type;
  306. event->data = data;
  307. init_completion(&event->complete);
  308. event->ret = ICNSS_EVENT_PENDING;
  309. event->sync = !!(flags & ICNSS_EVENT_SYNC);
  310. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  311. list_add_tail(&event->list, &priv->soc_wake_msg_list);
  312. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  313. priv->stats.soc_wake_events[type].posted++;
  314. queue_work(priv->soc_wake_wq, &priv->soc_wake_msg_work);
  315. if (!(flags & ICNSS_EVENT_SYNC))
  316. goto out;
  317. if (flags & ICNSS_EVENT_UNINTERRUPTIBLE)
  318. wait_for_completion(&event->complete);
  319. else
  320. ret = wait_for_completion_interruptible(&event->complete);
  321. icnss_pr_soc_wake("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  322. icnss_soc_wake_event_to_str(type),
  323. type, priv->state, ret, event->ret);
  324. spin_lock_irqsave(&priv->soc_wake_msg_lock, irq_flags);
  325. if (ret == -ERESTARTSYS && event->ret == ICNSS_EVENT_PENDING) {
  326. event->sync = false;
  327. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  328. ret = -EINTR;
  329. goto out;
  330. }
  331. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, irq_flags);
  332. ret = event->ret;
  333. kfree(event);
  334. out:
  335. icnss_pm_relax(priv);
  336. return ret;
  337. }
  338. bool icnss_is_fw_ready(void)
  339. {
  340. if (!penv)
  341. return false;
  342. else
  343. return test_bit(ICNSS_FW_READY, &penv->state);
  344. }
  345. EXPORT_SYMBOL(icnss_is_fw_ready);
  346. void icnss_block_shutdown(bool status)
  347. {
  348. if (!penv)
  349. return;
  350. if (status) {
  351. set_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  352. reinit_completion(&penv->unblock_shutdown);
  353. } else {
  354. clear_bit(ICNSS_BLOCK_SHUTDOWN, &penv->state);
  355. complete(&penv->unblock_shutdown);
  356. }
  357. }
  358. EXPORT_SYMBOL(icnss_block_shutdown);
  359. bool icnss_is_fw_down(void)
  360. {
  361. struct icnss_priv *priv = icnss_get_plat_priv();
  362. if (!priv)
  363. return false;
  364. return test_bit(ICNSS_FW_DOWN, &priv->state) ||
  365. test_bit(ICNSS_PD_RESTART, &priv->state) ||
  366. test_bit(ICNSS_REJUVENATE, &priv->state);
  367. }
  368. EXPORT_SYMBOL(icnss_is_fw_down);
  369. unsigned long icnss_get_device_config(void)
  370. {
  371. struct icnss_priv *priv = icnss_get_plat_priv();
  372. if (!priv)
  373. return 0;
  374. return priv->device_config;
  375. }
  376. EXPORT_SYMBOL(icnss_get_device_config);
  377. bool icnss_is_rejuvenate(void)
  378. {
  379. if (!penv)
  380. return false;
  381. else
  382. return test_bit(ICNSS_REJUVENATE, &penv->state);
  383. }
  384. EXPORT_SYMBOL(icnss_is_rejuvenate);
  385. bool icnss_is_pdr(void)
  386. {
  387. if (!penv)
  388. return false;
  389. else
  390. return test_bit(ICNSS_PDR, &penv->state);
  391. }
  392. EXPORT_SYMBOL(icnss_is_pdr);
  393. static int icnss_send_smp2p(struct icnss_priv *priv,
  394. enum icnss_smp2p_msg_id msg_id,
  395. enum smp2p_out_entry smp2p_entry)
  396. {
  397. unsigned int value = 0;
  398. int ret;
  399. if (!priv || IS_ERR(priv->smp2p_info[smp2p_entry].smem_state))
  400. return -EINVAL;
  401. /* No Need to check FW_DOWN for ICNSS_RESET_MSG */
  402. if (msg_id == ICNSS_RESET_MSG) {
  403. priv->smp2p_info[smp2p_entry].seq = 0;
  404. ret = qcom_smem_state_update_bits(
  405. priv->smp2p_info[smp2p_entry].smem_state,
  406. ICNSS_SMEM_VALUE_MASK,
  407. 0);
  408. if (ret)
  409. icnss_pr_err("Error in SMP2P sent. ret: %d, %s\n",
  410. ret, icnss_smp2p_str[smp2p_entry]);
  411. return ret;
  412. }
  413. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  414. !test_bit(ICNSS_FW_READY, &priv->state)) {
  415. icnss_pr_smp2p("FW down, ignoring sending SMP2P state: 0x%lx\n",
  416. priv->state);
  417. return -EINVAL;
  418. }
  419. value |= priv->smp2p_info[smp2p_entry].seq++;
  420. value <<= ICNSS_SMEM_SEQ_NO_POS;
  421. value |= msg_id;
  422. icnss_pr_smp2p("Sending SMP2P value: 0x%X\n", value);
  423. if (msg_id == ICNSS_SOC_WAKE_REQ || msg_id == ICNSS_SOC_WAKE_REL)
  424. reinit_completion(&penv->smp2p_soc_wake_wait);
  425. ret = qcom_smem_state_update_bits(
  426. priv->smp2p_info[smp2p_entry].smem_state,
  427. ICNSS_SMEM_VALUE_MASK,
  428. value);
  429. if (ret) {
  430. icnss_pr_smp2p("Error in SMP2P send ret: %d, %s\n", ret,
  431. icnss_smp2p_str[smp2p_entry]);
  432. } else {
  433. if (msg_id == ICNSS_SOC_WAKE_REQ ||
  434. msg_id == ICNSS_SOC_WAKE_REL) {
  435. if (!wait_for_completion_timeout(
  436. &priv->smp2p_soc_wake_wait,
  437. msecs_to_jiffies(SMP2P_SOC_WAKE_TIMEOUT))) {
  438. icnss_pr_err("SMP2P Soc Wake timeout msg %d, %s\n", msg_id,
  439. icnss_smp2p_str[smp2p_entry]);
  440. if (!test_bit(ICNSS_FW_DOWN, &priv->state))
  441. ICNSS_ASSERT(0);
  442. }
  443. }
  444. }
  445. return ret;
  446. }
  447. bool icnss_is_low_power(void)
  448. {
  449. if (!penv)
  450. return false;
  451. else
  452. return test_bit(ICNSS_LOW_POWER, &penv->state);
  453. }
  454. EXPORT_SYMBOL(icnss_is_low_power);
  455. static irqreturn_t fw_error_fatal_handler(int irq, void *ctx)
  456. {
  457. struct icnss_priv *priv = ctx;
  458. if (priv)
  459. priv->force_err_fatal = true;
  460. icnss_pr_err("Received force error fatal request from FW\n");
  461. return IRQ_HANDLED;
  462. }
  463. static irqreturn_t fw_crash_indication_handler(int irq, void *ctx)
  464. {
  465. struct icnss_priv *priv = ctx;
  466. struct icnss_uevent_fw_down_data fw_down_data = {0};
  467. icnss_pr_err("Received early crash indication from FW\n");
  468. if (priv) {
  469. if (priv->wpss_self_recovery_enabled)
  470. mod_timer(&priv->wpss_ssr_timer,
  471. jiffies + msecs_to_jiffies(ICNSS_WPSS_SSR_TIMEOUT));
  472. set_bit(ICNSS_FW_DOWN, &priv->state);
  473. icnss_ignore_fw_timeout(true);
  474. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  475. clear_bit(ICNSS_FW_READY, &priv->state);
  476. fw_down_data.crashed = true;
  477. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  478. &fw_down_data);
  479. }
  480. }
  481. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND,
  482. 0, NULL);
  483. return IRQ_HANDLED;
  484. }
  485. static void register_fw_error_notifications(struct device *dev)
  486. {
  487. struct icnss_priv *priv = dev_get_drvdata(dev);
  488. struct device_node *dev_node;
  489. int irq = 0, ret = 0;
  490. if (!priv)
  491. return;
  492. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  493. if (!dev_node) {
  494. icnss_pr_err("Failed to get smp2p node for force-fatal-error\n");
  495. return;
  496. }
  497. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  498. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  499. ret = irq = of_irq_get_byname(dev_node,
  500. "qcom,smp2p-force-fatal-error");
  501. if (ret < 0) {
  502. icnss_pr_err("Unable to get force-fatal-error irq %d\n",
  503. irq);
  504. return;
  505. }
  506. }
  507. ret = devm_request_threaded_irq(dev, irq, NULL, fw_error_fatal_handler,
  508. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  509. "wlanfw-err", priv);
  510. if (ret < 0) {
  511. icnss_pr_err("Unable to register for error fatal IRQ handler %d ret = %d",
  512. irq, ret);
  513. return;
  514. }
  515. icnss_pr_dbg("FW force error fatal handler registered irq = %d\n", irq);
  516. priv->fw_error_fatal_irq = irq;
  517. }
  518. static void register_early_crash_notifications(struct device *dev)
  519. {
  520. struct icnss_priv *priv = dev_get_drvdata(dev);
  521. struct device_node *dev_node;
  522. int irq = 0, ret = 0;
  523. if (!priv)
  524. return;
  525. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_1_in");
  526. if (!dev_node) {
  527. icnss_pr_err("Failed to get smp2p node for early-crash-ind\n");
  528. return;
  529. }
  530. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  531. if (strcmp("qcom,smp2p_map_wlan_1_in", dev_node->name) == 0) {
  532. ret = irq = of_irq_get_byname(dev_node,
  533. "qcom,smp2p-early-crash-ind");
  534. if (ret < 0) {
  535. icnss_pr_err("Unable to get early-crash-ind irq %d\n",
  536. irq);
  537. return;
  538. }
  539. }
  540. ret = devm_request_threaded_irq(dev, irq, NULL,
  541. fw_crash_indication_handler,
  542. IRQF_ONESHOT | IRQF_TRIGGER_RISING,
  543. "wlanfw-early-crash-ind", priv);
  544. if (ret < 0) {
  545. icnss_pr_err("Unable to register for early crash indication IRQ handler %d ret = %d",
  546. irq, ret);
  547. return;
  548. }
  549. icnss_pr_dbg("FW crash indication handler registered irq = %d\n", irq);
  550. priv->fw_early_crash_irq = irq;
  551. }
  552. static int icnss_get_temperature(struct icnss_priv *priv, int *temp)
  553. {
  554. struct thermal_zone_device *thermal_dev;
  555. const char *tsens;
  556. int ret;
  557. ret = of_property_read_string(priv->pdev->dev.of_node,
  558. "tsens",
  559. &tsens);
  560. if (ret)
  561. return ret;
  562. icnss_pr_dbg("Thermal Sensor is %s\n", tsens);
  563. thermal_dev = thermal_zone_get_zone_by_name(tsens);
  564. if (IS_ERR(thermal_dev)) {
  565. icnss_pr_err("Fail to get thermal zone. ret: %d",
  566. PTR_ERR(thermal_dev));
  567. return PTR_ERR(thermal_dev);
  568. }
  569. ret = thermal_zone_get_temp(thermal_dev, temp);
  570. if (ret)
  571. icnss_pr_err("Fail to get temperature. ret: %d", ret);
  572. return ret;
  573. }
  574. static irqreturn_t fw_soc_wake_ack_handler(int irq, void *ctx)
  575. {
  576. struct icnss_priv *priv = ctx;
  577. if (priv)
  578. complete(&priv->smp2p_soc_wake_wait);
  579. return IRQ_HANDLED;
  580. }
  581. static void register_soc_wake_notif(struct device *dev)
  582. {
  583. struct icnss_priv *priv = dev_get_drvdata(dev);
  584. struct device_node *dev_node;
  585. int irq = 0, ret = 0;
  586. if (!priv)
  587. return;
  588. dev_node = of_find_node_by_name(NULL, "qcom,smp2p_map_wlan_2_in");
  589. if (!dev_node) {
  590. icnss_pr_err("Failed to get smp2p node for soc-wake-ack\n");
  591. return;
  592. }
  593. icnss_pr_dbg("smp2p node->name=%s\n", dev_node->name);
  594. if (strcmp("qcom,smp2p_map_wlan_2_in", dev_node->name) == 0) {
  595. ret = irq = of_irq_get_byname(dev_node,
  596. "qcom,smp2p-soc-wake-ack");
  597. if (ret < 0) {
  598. icnss_pr_err("Unable to get soc wake ack irq %d\n",
  599. irq);
  600. return;
  601. }
  602. }
  603. ret = devm_request_threaded_irq(dev, irq, NULL,
  604. fw_soc_wake_ack_handler,
  605. IRQF_ONESHOT | IRQF_TRIGGER_RISING |
  606. IRQF_TRIGGER_FALLING,
  607. "wlanfw-soc-wake-ack", priv);
  608. if (ret < 0) {
  609. icnss_pr_err("Unable to register for SOC Wake ACK IRQ handler %d ret = %d",
  610. irq, ret);
  611. return;
  612. }
  613. icnss_pr_dbg("FW SOC Wake ACK handler registered irq = %d\n", irq);
  614. priv->fw_soc_wake_ack_irq = irq;
  615. }
  616. int icnss_call_driver_uevent(struct icnss_priv *priv,
  617. enum icnss_uevent uevent, void *data)
  618. {
  619. struct icnss_uevent_data uevent_data;
  620. if (!priv->ops || !priv->ops->uevent)
  621. return 0;
  622. icnss_pr_dbg("Calling driver uevent state: 0x%lx, uevent: %d\n",
  623. priv->state, uevent);
  624. uevent_data.uevent = uevent;
  625. uevent_data.data = data;
  626. return priv->ops->uevent(&priv->pdev->dev, &uevent_data);
  627. }
  628. static int icnss_setup_dms_mac(struct icnss_priv *priv)
  629. {
  630. int i;
  631. int ret = 0;
  632. ret = icnss_qmi_get_dms_mac(priv);
  633. if (ret == 0 && priv->dms.mac_valid)
  634. goto qmi_send;
  635. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  636. * Thus assert on failure to get MAC from DMS even after retries
  637. */
  638. if (priv->use_nv_mac) {
  639. for (i = 0; i < ICNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  640. if (priv->dms.mac_valid)
  641. break;
  642. ret = icnss_qmi_get_dms_mac(priv);
  643. if (ret != -EAGAIN)
  644. break;
  645. msleep(ICNSS_DMS_QMI_CONNECTION_WAIT_MS);
  646. }
  647. if (!priv->dms.nv_mac_not_prov && !priv->dms.mac_valid) {
  648. icnss_pr_err("Unable to get MAC from DMS after retries\n");
  649. ICNSS_ASSERT(0);
  650. return -EINVAL;
  651. }
  652. }
  653. qmi_send:
  654. if (priv->dms.mac_valid)
  655. ret =
  656. icnss_wlfw_wlan_mac_req_send_sync(priv, priv->dms.mac,
  657. ARRAY_SIZE(priv->dms.mac));
  658. return ret;
  659. }
  660. static void icnss_get_smp2p_info(struct icnss_priv *priv,
  661. enum smp2p_out_entry smp2p_entry)
  662. {
  663. int retry = 0;
  664. int error;
  665. if (priv->smp2p_info[smp2p_entry].smem_state)
  666. return;
  667. retry:
  668. priv->smp2p_info[smp2p_entry].smem_state =
  669. qcom_smem_state_get(&priv->pdev->dev,
  670. icnss_smp2p_str[smp2p_entry],
  671. &priv->smp2p_info[smp2p_entry].smem_bit);
  672. if (IS_ERR(priv->smp2p_info[smp2p_entry].smem_state)) {
  673. if (retry++ < SMP2P_GET_MAX_RETRY) {
  674. error = PTR_ERR(priv->smp2p_info[smp2p_entry].smem_state);
  675. icnss_pr_err("Failed to get smem state, ret: %d Entry: %s",
  676. error, icnss_smp2p_str[smp2p_entry]);
  677. msleep(SMP2P_GET_RETRY_DELAY_MS);
  678. goto retry;
  679. }
  680. ICNSS_ASSERT(0);
  681. return;
  682. }
  683. icnss_pr_dbg("smem state, Entry: %s", icnss_smp2p_str[smp2p_entry]);
  684. }
  685. static inline
  686. void icnss_set_wlan_en_delay(struct icnss_priv *priv)
  687. {
  688. if (priv->wlan_en_delay_ms_user > WLAN_EN_DELAY) {
  689. priv->wlan_en_delay_ms = priv->wlan_en_delay_ms_user;
  690. } else {
  691. priv->wlan_en_delay_ms = WLAN_EN_DELAY;
  692. }
  693. }
  694. static enum wlfw_wlan_rf_subtype_v01 icnss_rf_subtype_value_to_type(u32 val)
  695. {
  696. switch (val) {
  697. case WLAN_RF_SLATE:
  698. return WLFW_WLAN_RF_SLATE_V01;
  699. case WLAN_RF_APACHE:
  700. return WLFW_WLAN_RF_APACHE_V01;
  701. default:
  702. return WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01;
  703. }
  704. }
  705. #ifdef SLATE_MODULE_ENABLED
  706. static void icnss_send_wlan_boot_init(void)
  707. {
  708. send_wlan_state(GMI_MGR_WLAN_BOOT_INIT);
  709. icnss_pr_info("sent wlan boot init command\n");
  710. }
  711. static void icnss_send_wlan_boot_complete(void)
  712. {
  713. send_wlan_state(GMI_MGR_WLAN_BOOT_COMPLETE);
  714. icnss_pr_info("sent wlan boot complete command\n");
  715. }
  716. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  717. {
  718. if (!test_bit(ICNSS_SLATE_UP, &priv->state)) {
  719. reinit_completion(&priv->slate_boot_complete);
  720. icnss_pr_err("Waiting for slate boot up notification, 0x%lx\n",
  721. priv->state);
  722. wait_for_completion(&priv->slate_boot_complete);
  723. }
  724. if (!test_bit(ICNSS_SLATE_UP, &priv->state))
  725. return -EINVAL;
  726. icnss_send_wlan_boot_init();
  727. return 0;
  728. }
  729. #else
  730. static void icnss_send_wlan_boot_complete(void)
  731. {
  732. }
  733. static int icnss_wait_for_slate_complete(struct icnss_priv *priv)
  734. {
  735. return 0;
  736. }
  737. #endif
  738. static int icnss_driver_event_server_arrive(struct icnss_priv *priv,
  739. void *data)
  740. {
  741. int ret = 0;
  742. int temp = 0;
  743. bool ignore_assert = false;
  744. enum wlfw_wlan_rf_subtype_v01 rf_subtype;
  745. if (!priv)
  746. return -ENODEV;
  747. set_bit(ICNSS_WLFW_EXISTS, &priv->state);
  748. clear_bit(ICNSS_FW_DOWN, &priv->state);
  749. clear_bit(ICNSS_FW_READY, &priv->state);
  750. if (priv->is_slate_rfa) {
  751. ret = icnss_wait_for_slate_complete(priv);
  752. if (ret == -EINVAL) {
  753. icnss_pr_err("Slate complete failed\n");
  754. return ret;
  755. }
  756. }
  757. icnss_ignore_fw_timeout(false);
  758. if (test_bit(ICNSS_WLFW_CONNECTED, &priv->state)) {
  759. icnss_pr_err("QMI Server already in Connected State\n");
  760. ICNSS_ASSERT(0);
  761. }
  762. ret = icnss_connect_to_fw_server(priv, data);
  763. if (ret)
  764. goto fail;
  765. set_bit(ICNSS_WLFW_CONNECTED, &priv->state);
  766. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  767. ret = icnss_hw_power_on(priv);
  768. if (ret)
  769. goto fail;
  770. }
  771. ret = wlfw_ind_register_send_sync_msg(priv);
  772. if (ret < 0) {
  773. if (ret == -EALREADY) {
  774. ret = 0;
  775. goto qmi_registered;
  776. }
  777. ignore_assert = true;
  778. goto fail;
  779. }
  780. if (priv->is_rf_subtype_valid) {
  781. rf_subtype = icnss_rf_subtype_value_to_type(priv->rf_subtype);
  782. if (rf_subtype != WLFW_WLAN_RF_SUBTYPE_MAX_VAL_V01) {
  783. ret = wlfw_wlan_hw_init_cfg_msg(priv, rf_subtype);
  784. if (ret < 0)
  785. icnss_pr_dbg("Sending rf_subtype failed ret %d\n",
  786. ret);
  787. } else {
  788. icnss_pr_dbg("Invalid rf subtype %d in DT\n",
  789. priv->rf_subtype);
  790. }
  791. }
  792. if (priv->device_id == WCN6750_DEVICE_ID ||
  793. priv->device_id == WCN6450_DEVICE_ID) {
  794. if (!icnss_get_temperature(priv, &temp)) {
  795. icnss_pr_dbg("Temperature: %d\n", temp);
  796. if (temp < WLAN_EN_TEMP_THRESHOLD)
  797. icnss_set_wlan_en_delay(priv);
  798. }
  799. ret = wlfw_host_cap_send_sync(priv);
  800. if (ret < 0)
  801. goto fail;
  802. }
  803. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  804. if (!priv->msa_va) {
  805. icnss_pr_err("Invalid MSA address\n");
  806. ret = -EINVAL;
  807. goto fail;
  808. }
  809. ret = wlfw_msa_mem_info_send_sync_msg(priv);
  810. if (ret < 0) {
  811. ignore_assert = true;
  812. goto fail;
  813. }
  814. ret = wlfw_msa_ready_send_sync_msg(priv);
  815. if (ret < 0) {
  816. ignore_assert = true;
  817. goto fail;
  818. }
  819. }
  820. if (priv->device_id == WCN6450_DEVICE_ID)
  821. icnss_hw_power_off(priv);
  822. ret = wlfw_cap_send_sync_msg(priv);
  823. if (ret < 0) {
  824. ignore_assert = true;
  825. goto fail;
  826. }
  827. if (priv->device_id == ADRASTEA_DEVICE_ID && priv->is_chain1_supported) {
  828. ret = icnss_power_on_chain1_reg(priv);
  829. if (ret) {
  830. ignore_assert = true;
  831. goto fail;
  832. }
  833. }
  834. if (priv->device_id == WCN6750_DEVICE_ID ||
  835. priv->device_id == WCN6450_DEVICE_ID) {
  836. ret = icnss_hw_power_on(priv);
  837. if (ret)
  838. goto fail;
  839. ret = wlfw_device_info_send_msg(priv);
  840. if (ret < 0) {
  841. ignore_assert = true;
  842. goto device_info_failure;
  843. }
  844. priv->mem_base_va = devm_ioremap(&priv->pdev->dev,
  845. priv->mem_base_pa,
  846. priv->mem_base_size);
  847. if (!priv->mem_base_va) {
  848. icnss_pr_err("Ioremap failed for bar address\n");
  849. goto device_info_failure;
  850. }
  851. icnss_pr_dbg("Non-Secured Bar Address pa: %pa, va: 0x%pK\n",
  852. &priv->mem_base_pa,
  853. priv->mem_base_va);
  854. if (priv->mhi_state_info_pa)
  855. priv->mhi_state_info_va = devm_ioremap(&priv->pdev->dev,
  856. priv->mhi_state_info_pa,
  857. PAGE_SIZE);
  858. if (!priv->mhi_state_info_va)
  859. icnss_pr_err("Ioremap failed for MHI info address\n");
  860. icnss_pr_dbg("MHI state info Address pa: %pa, va: 0x%pK\n",
  861. &priv->mhi_state_info_pa,
  862. priv->mhi_state_info_va);
  863. }
  864. if (priv->bdf_download_support) {
  865. icnss_wlfw_bdf_dnld_send_sync(priv, ICNSS_BDF_REGDB);
  866. ret = icnss_wlfw_bdf_dnld_send_sync(priv,
  867. priv->ctrl_params.bdf_type);
  868. if (ret < 0)
  869. goto device_info_failure;
  870. }
  871. if (priv->device_id == WCN6450_DEVICE_ID) {
  872. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  873. if (ret < 0)
  874. icnss_pr_info("Failed to download qdss config file for WCN6450, ret = %d\n",
  875. ret);
  876. }
  877. if (priv->device_id == WCN6750_DEVICE_ID ||
  878. priv->device_id == WCN6450_DEVICE_ID) {
  879. if (!priv->fw_soc_wake_ack_irq)
  880. register_soc_wake_notif(&priv->pdev->dev);
  881. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_SOC_WAKE);
  882. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  883. }
  884. if (priv->wpss_supported)
  885. icnss_get_smp2p_info(priv, ICNSS_SMP2P_OUT_POWER_SAVE);
  886. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  887. if (priv->bdf_download_support) {
  888. ret = wlfw_cal_report_req(priv);
  889. if (ret < 0)
  890. goto device_info_failure;
  891. }
  892. wlfw_dynamic_feature_mask_send_sync_msg(priv,
  893. dynamic_feature_mask);
  894. }
  895. if (!priv->fw_error_fatal_irq)
  896. register_fw_error_notifications(&priv->pdev->dev);
  897. if (!priv->fw_early_crash_irq)
  898. register_early_crash_notifications(&priv->pdev->dev);
  899. if (priv->psf_supported)
  900. queue_work(priv->soc_update_wq, &priv->soc_update_work);
  901. return ret;
  902. device_info_failure:
  903. icnss_hw_power_off(priv);
  904. fail:
  905. ICNSS_ASSERT(ignore_assert);
  906. qmi_registered:
  907. return ret;
  908. }
  909. static int icnss_driver_event_server_exit(struct icnss_priv *priv)
  910. {
  911. if (!priv)
  912. return -ENODEV;
  913. icnss_pr_info("WLAN FW Service Disconnected: 0x%lx\n", priv->state);
  914. icnss_clear_server(priv);
  915. if (priv->psf_supported)
  916. priv->last_updated_voltage = 0;
  917. return 0;
  918. }
  919. static int icnss_call_driver_probe(struct icnss_priv *priv)
  920. {
  921. int ret = 0;
  922. int probe_cnt = 0;
  923. if (!priv->ops || !priv->ops->probe)
  924. return 0;
  925. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  926. return -EINVAL;
  927. icnss_pr_dbg("Calling driver probe state: 0x%lx\n", priv->state);
  928. icnss_hw_power_on(priv);
  929. icnss_block_shutdown(true);
  930. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  931. ret = priv->ops->probe(&priv->pdev->dev);
  932. probe_cnt++;
  933. if (ret != -EPROBE_DEFER)
  934. break;
  935. }
  936. if (ret < 0) {
  937. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  938. ret, priv->state, probe_cnt);
  939. icnss_block_shutdown(false);
  940. goto out;
  941. }
  942. icnss_block_shutdown(false);
  943. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  944. return 0;
  945. out:
  946. icnss_hw_power_off(priv);
  947. return ret;
  948. }
  949. static int icnss_call_driver_shutdown(struct icnss_priv *priv)
  950. {
  951. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  952. goto out;
  953. if (!priv->ops || !priv->ops->shutdown)
  954. goto out;
  955. if (test_bit(ICNSS_SHUTDOWN_DONE, &priv->state))
  956. goto out;
  957. icnss_pr_dbg("Calling driver shutdown state: 0x%lx\n", priv->state);
  958. priv->ops->shutdown(&priv->pdev->dev);
  959. set_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  960. out:
  961. return 0;
  962. }
  963. static int icnss_pd_restart_complete(struct icnss_priv *priv)
  964. {
  965. int ret = 0;
  966. icnss_pm_relax(priv);
  967. icnss_call_driver_shutdown(priv);
  968. clear_bit(ICNSS_PDR, &priv->state);
  969. clear_bit(ICNSS_REJUVENATE, &priv->state);
  970. clear_bit(ICNSS_PD_RESTART, &priv->state);
  971. clear_bit(ICNSS_LOW_POWER, &priv->state);
  972. priv->early_crash_ind = false;
  973. priv->is_ssr = false;
  974. if (!priv->ops || !priv->ops->reinit)
  975. goto out;
  976. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  977. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  978. priv->state);
  979. goto out;
  980. }
  981. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  982. goto call_probe;
  983. icnss_pr_dbg("Calling driver reinit state: 0x%lx\n", priv->state);
  984. icnss_hw_power_on(priv);
  985. icnss_block_shutdown(true);
  986. ret = priv->ops->reinit(&priv->pdev->dev);
  987. if (ret < 0) {
  988. icnss_fatal_err("Driver reinit failed: %d, state: 0x%lx\n",
  989. ret, priv->state);
  990. if (!priv->allow_recursive_recovery)
  991. ICNSS_ASSERT(false);
  992. icnss_block_shutdown(false);
  993. goto out_power_off;
  994. }
  995. icnss_block_shutdown(false);
  996. clear_bit(ICNSS_SHUTDOWN_DONE, &priv->state);
  997. return 0;
  998. call_probe:
  999. return icnss_call_driver_probe(priv);
  1000. out_power_off:
  1001. icnss_hw_power_off(priv);
  1002. out:
  1003. return ret;
  1004. }
  1005. static int icnss_driver_event_fw_ready_ind(struct icnss_priv *priv, void *data)
  1006. {
  1007. int ret = 0;
  1008. if (!priv)
  1009. return -ENODEV;
  1010. del_timer(&priv->recovery_timer);
  1011. set_bit(ICNSS_FW_READY, &priv->state);
  1012. clear_bit(ICNSS_MODE_ON, &priv->state);
  1013. atomic_set(&priv->soc_wake_ref_count, 0);
  1014. if (priv->device_id == WCN6750_DEVICE_ID ||
  1015. priv->device_id == WCN6450_DEVICE_ID)
  1016. icnss_free_qdss_mem(priv);
  1017. icnss_pr_info("WLAN FW is ready: 0x%lx\n", priv->state);
  1018. icnss_hw_power_off(priv);
  1019. if (!priv->pdev) {
  1020. icnss_pr_err("Device is not ready\n");
  1021. ret = -ENODEV;
  1022. goto out;
  1023. }
  1024. if (priv->is_slate_rfa && test_bit(ICNSS_SLATE_UP, &priv->state))
  1025. icnss_send_wlan_boot_complete();
  1026. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  1027. ret = icnss_pd_restart_complete(priv);
  1028. } else {
  1029. if (priv->wpss_supported)
  1030. icnss_setup_dms_mac(priv);
  1031. ret = icnss_call_driver_probe(priv);
  1032. }
  1033. icnss_vreg_unvote(priv);
  1034. out:
  1035. return ret;
  1036. }
  1037. static int icnss_driver_event_fw_init_done(struct icnss_priv *priv, void *data)
  1038. {
  1039. int ret = 0;
  1040. if (!priv)
  1041. return -ENODEV;
  1042. icnss_pr_info("WLAN FW Initialization done: 0x%lx\n", priv->state);
  1043. if (priv->device_id == WCN6750_DEVICE_ID) {
  1044. ret = icnss_wlfw_qdss_dnld_send_sync(priv);
  1045. if (ret < 0)
  1046. icnss_pr_info("Failed to download qdss config file for WCN6750, ret = %d\n",
  1047. ret);
  1048. }
  1049. if (test_bit(ICNSS_COLD_BOOT_CAL, &priv->state)) {
  1050. mod_timer(&priv->recovery_timer,
  1051. jiffies + msecs_to_jiffies(ICNSS_CAL_TIMEOUT));
  1052. ret = wlfw_wlan_mode_send_sync_msg(priv,
  1053. (enum wlfw_driver_mode_enum_v01)ICNSS_CALIBRATION);
  1054. } else {
  1055. icnss_driver_event_fw_ready_ind(priv, NULL);
  1056. }
  1057. return ret;
  1058. }
  1059. int icnss_alloc_qdss_mem(struct icnss_priv *priv)
  1060. {
  1061. struct platform_device *pdev = priv->pdev;
  1062. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1063. int i, j;
  1064. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1065. if (!qdss_mem[i].va && qdss_mem[i].size) {
  1066. qdss_mem[i].va =
  1067. dma_alloc_coherent(&pdev->dev,
  1068. qdss_mem[i].size,
  1069. &qdss_mem[i].pa,
  1070. GFP_KERNEL);
  1071. if (!qdss_mem[i].va) {
  1072. icnss_pr_err("Failed to allocate QDSS memory for FW, size: 0x%zx, type: %u, chuck-ID: %d\n",
  1073. qdss_mem[i].size,
  1074. qdss_mem[i].type, i);
  1075. break;
  1076. }
  1077. }
  1078. }
  1079. /* Best-effort allocation for QDSS trace */
  1080. if (i < priv->qdss_mem_seg_len) {
  1081. for (j = i; j < priv->qdss_mem_seg_len; j++) {
  1082. qdss_mem[j].type = 0;
  1083. qdss_mem[j].size = 0;
  1084. }
  1085. priv->qdss_mem_seg_len = i;
  1086. }
  1087. return 0;
  1088. }
  1089. void icnss_free_qdss_mem(struct icnss_priv *priv)
  1090. {
  1091. struct platform_device *pdev = priv->pdev;
  1092. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1093. int i;
  1094. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1095. if (qdss_mem[i].va && qdss_mem[i].size) {
  1096. icnss_pr_dbg("Freeing memory for QDSS: pa: %pa, size: 0x%zx, type: %u\n",
  1097. &qdss_mem[i].pa, qdss_mem[i].size,
  1098. qdss_mem[i].type);
  1099. dma_free_coherent(&pdev->dev,
  1100. qdss_mem[i].size, qdss_mem[i].va,
  1101. qdss_mem[i].pa);
  1102. qdss_mem[i].va = NULL;
  1103. qdss_mem[i].pa = 0;
  1104. qdss_mem[i].size = 0;
  1105. qdss_mem[i].type = 0;
  1106. }
  1107. }
  1108. priv->qdss_mem_seg_len = 0;
  1109. }
  1110. static int icnss_qdss_trace_req_mem_hdlr(struct icnss_priv *priv)
  1111. {
  1112. int ret = 0;
  1113. ret = icnss_alloc_qdss_mem(priv);
  1114. if (ret < 0)
  1115. return ret;
  1116. return wlfw_qdss_trace_mem_info_send_sync(priv);
  1117. }
  1118. static void *icnss_qdss_trace_pa_to_va(struct icnss_priv *priv,
  1119. u64 pa, u32 size, int *seg_id)
  1120. {
  1121. int i = 0;
  1122. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1123. u64 offset = 0;
  1124. void *va = NULL;
  1125. u64 local_pa;
  1126. u32 local_size;
  1127. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1128. local_pa = (u64)qdss_mem[i].pa;
  1129. local_size = (u32)qdss_mem[i].size;
  1130. if (pa == local_pa && size <= local_size) {
  1131. va = qdss_mem[i].va;
  1132. break;
  1133. }
  1134. if (pa > local_pa &&
  1135. pa < local_pa + local_size &&
  1136. pa + size <= local_pa + local_size) {
  1137. offset = pa - local_pa;
  1138. va = qdss_mem[i].va + offset;
  1139. break;
  1140. }
  1141. }
  1142. *seg_id = i;
  1143. return va;
  1144. }
  1145. static int icnss_qdss_trace_save_hdlr(struct icnss_priv *priv,
  1146. void *data)
  1147. {
  1148. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1149. struct icnss_fw_mem *qdss_mem = priv->qdss_mem;
  1150. int ret = 0;
  1151. int i;
  1152. void *va = NULL;
  1153. u64 pa;
  1154. u32 size;
  1155. int seg_id = 0;
  1156. if (!priv->qdss_mem_seg_len) {
  1157. icnss_pr_err("Memory for QDSS trace is not available\n");
  1158. return -ENOMEM;
  1159. }
  1160. if (event_data->mem_seg_len == 0) {
  1161. for (i = 0; i < priv->qdss_mem_seg_len; i++) {
  1162. ret = icnss_genl_send_msg(qdss_mem[i].va,
  1163. ICNSS_GENL_MSG_TYPE_QDSS,
  1164. event_data->file_name,
  1165. qdss_mem[i].size);
  1166. if (ret < 0) {
  1167. icnss_pr_err("Fail to save QDSS data: %d\n",
  1168. ret);
  1169. break;
  1170. }
  1171. }
  1172. } else {
  1173. for (i = 0; i < event_data->mem_seg_len; i++) {
  1174. pa = event_data->mem_seg[i].addr;
  1175. size = event_data->mem_seg[i].size;
  1176. va = icnss_qdss_trace_pa_to_va(priv, pa,
  1177. size, &seg_id);
  1178. if (!va) {
  1179. icnss_pr_err("Fail to find matching va for pa %pa\n",
  1180. &pa);
  1181. ret = -EINVAL;
  1182. break;
  1183. }
  1184. ret = icnss_genl_send_msg(va, ICNSS_GENL_MSG_TYPE_QDSS,
  1185. event_data->file_name, size);
  1186. if (ret < 0) {
  1187. icnss_pr_err("Fail to save QDSS data: %d\n",
  1188. ret);
  1189. break;
  1190. }
  1191. }
  1192. }
  1193. kfree(data);
  1194. return ret;
  1195. }
  1196. static inline int icnss_atomic_dec_if_greater_one(atomic_t *v)
  1197. {
  1198. int dec, c = atomic_read(v);
  1199. do {
  1200. dec = c - 1;
  1201. if (unlikely(dec < 1))
  1202. break;
  1203. } while (!atomic_try_cmpxchg(v, &c, dec));
  1204. return dec;
  1205. }
  1206. static int icnss_qdss_trace_req_data_hdlr(struct icnss_priv *priv,
  1207. void *data)
  1208. {
  1209. int ret = 0;
  1210. struct icnss_qmi_event_qdss_trace_save_data *event_data = data;
  1211. if (!priv)
  1212. return -ENODEV;
  1213. if (!data)
  1214. return -EINVAL;
  1215. ret = icnss_wlfw_qdss_data_send_sync(priv, event_data->file_name,
  1216. event_data->total_size);
  1217. kfree(data);
  1218. return ret;
  1219. }
  1220. static int icnss_event_soc_wake_request(struct icnss_priv *priv, void *data)
  1221. {
  1222. int ret = 0;
  1223. if (!priv)
  1224. return -ENODEV;
  1225. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  1226. icnss_pr_soc_wake("SOC awake after posting work, Ref count: %d",
  1227. atomic_read(&priv->soc_wake_ref_count));
  1228. return 0;
  1229. }
  1230. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REQ,
  1231. ICNSS_SMP2P_OUT_SOC_WAKE);
  1232. if (!ret)
  1233. atomic_inc(&priv->soc_wake_ref_count);
  1234. return ret;
  1235. }
  1236. static int icnss_event_soc_wake_release(struct icnss_priv *priv, void *data)
  1237. {
  1238. int ret = 0;
  1239. if (!priv)
  1240. return -ENODEV;
  1241. if (atomic_dec_if_positive(&priv->soc_wake_ref_count)) {
  1242. icnss_pr_soc_wake("Wake release not called. Ref count: %d",
  1243. priv->soc_wake_ref_count);
  1244. return 0;
  1245. }
  1246. ret = icnss_send_smp2p(priv, ICNSS_SOC_WAKE_REL,
  1247. ICNSS_SMP2P_OUT_SOC_WAKE);
  1248. return ret;
  1249. }
  1250. static int icnss_driver_event_register_driver(struct icnss_priv *priv,
  1251. void *data)
  1252. {
  1253. int ret = 0;
  1254. int probe_cnt = 0;
  1255. if (priv->ops)
  1256. return -EEXIST;
  1257. priv->ops = data;
  1258. if (test_bit(SKIP_QMI, &priv->ctrl_params.quirks))
  1259. set_bit(ICNSS_FW_READY, &priv->state);
  1260. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  1261. icnss_pr_err("FW is in bad state, state: 0x%lx\n",
  1262. priv->state);
  1263. return -ENODEV;
  1264. }
  1265. if (!test_bit(ICNSS_FW_READY, &priv->state)) {
  1266. icnss_pr_dbg("FW is not ready yet, state: 0x%lx\n",
  1267. priv->state);
  1268. goto out;
  1269. }
  1270. ret = icnss_hw_power_on(priv);
  1271. if (ret)
  1272. goto out;
  1273. icnss_block_shutdown(true);
  1274. while (probe_cnt < ICNSS_MAX_PROBE_CNT) {
  1275. ret = priv->ops->probe(&priv->pdev->dev);
  1276. probe_cnt++;
  1277. if (ret != -EPROBE_DEFER)
  1278. break;
  1279. }
  1280. if (ret) {
  1281. icnss_pr_err("Driver probe failed: %d, state: 0x%lx, probe_cnt: %d\n",
  1282. ret, priv->state, probe_cnt);
  1283. icnss_block_shutdown(false);
  1284. goto power_off;
  1285. }
  1286. icnss_block_shutdown(false);
  1287. set_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1288. return 0;
  1289. power_off:
  1290. icnss_hw_power_off(priv);
  1291. out:
  1292. return ret;
  1293. }
  1294. static int icnss_driver_event_unregister_driver(struct icnss_priv *priv,
  1295. void *data)
  1296. {
  1297. if (!test_bit(ICNSS_DRIVER_PROBED, &priv->state)) {
  1298. priv->ops = NULL;
  1299. goto out;
  1300. }
  1301. set_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1302. icnss_block_shutdown(true);
  1303. if (priv->ops)
  1304. priv->ops->remove(&priv->pdev->dev);
  1305. icnss_block_shutdown(false);
  1306. clear_bit(ICNSS_DRIVER_UNLOADING, &priv->state);
  1307. clear_bit(ICNSS_DRIVER_PROBED, &priv->state);
  1308. priv->ops = NULL;
  1309. icnss_hw_power_off(priv);
  1310. out:
  1311. return 0;
  1312. }
  1313. static int icnss_fw_crashed(struct icnss_priv *priv,
  1314. struct icnss_event_pd_service_down_data *event_data)
  1315. {
  1316. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1317. icnss_pr_dbg("FW crashed, state: 0x%lx\n", priv->state);
  1318. set_bit(ICNSS_PD_RESTART, &priv->state);
  1319. icnss_pm_stay_awake(priv);
  1320. if (test_bit(ICNSS_DRIVER_PROBED, &priv->state) &&
  1321. test_bit(ICNSS_FW_READY, &priv->state)) {
  1322. clear_bit(ICNSS_FW_READY, &priv->state);
  1323. fw_down_data.crashed = true;
  1324. icnss_call_driver_uevent(priv,
  1325. ICNSS_UEVENT_FW_DOWN,
  1326. &fw_down_data);
  1327. }
  1328. if (event_data && event_data->fw_rejuvenate)
  1329. wlfw_rejuvenate_ack_send_sync_msg(priv);
  1330. return 0;
  1331. }
  1332. int icnss_update_hang_event_data(struct icnss_priv *priv,
  1333. struct icnss_uevent_hang_data *hang_data)
  1334. {
  1335. if (!priv->hang_event_data_va)
  1336. return -EINVAL;
  1337. priv->hang_event_data = kmemdup(priv->hang_event_data_va,
  1338. priv->hang_event_data_len,
  1339. GFP_ATOMIC);
  1340. if (!priv->hang_event_data)
  1341. return -ENOMEM;
  1342. // Update the hang event params
  1343. hang_data->hang_event_data = priv->hang_event_data;
  1344. hang_data->hang_event_data_len = priv->hang_event_data_len;
  1345. return 0;
  1346. }
  1347. int icnss_send_hang_event_data(struct icnss_priv *priv)
  1348. {
  1349. struct icnss_uevent_hang_data hang_data = {0};
  1350. int ret = 0xFF;
  1351. if (priv->early_crash_ind) {
  1352. ret = icnss_update_hang_event_data(priv, &hang_data);
  1353. if (ret)
  1354. icnss_pr_err("Unable to allocate memory for Hang event data\n");
  1355. }
  1356. icnss_call_driver_uevent(priv, ICNSS_UEVENT_HANG_DATA,
  1357. &hang_data);
  1358. if (!ret) {
  1359. kfree(priv->hang_event_data);
  1360. priv->hang_event_data = NULL;
  1361. }
  1362. return 0;
  1363. }
  1364. static int icnss_driver_event_pd_service_down(struct icnss_priv *priv,
  1365. void *data)
  1366. {
  1367. struct icnss_event_pd_service_down_data *event_data = data;
  1368. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1369. icnss_ignore_fw_timeout(false);
  1370. goto out;
  1371. }
  1372. if (priv->force_err_fatal)
  1373. ICNSS_ASSERT(0);
  1374. if (priv->device_id == WCN6750_DEVICE_ID ||
  1375. priv->device_id == WCN6450_DEVICE_ID) {
  1376. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1377. ICNSS_SMP2P_OUT_SOC_WAKE);
  1378. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1379. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  1380. }
  1381. if (priv->wpss_supported)
  1382. icnss_send_smp2p(priv, ICNSS_RESET_MSG,
  1383. ICNSS_SMP2P_OUT_POWER_SAVE);
  1384. icnss_send_hang_event_data(priv);
  1385. if (priv->early_crash_ind) {
  1386. icnss_pr_dbg("PD Down ignored as early indication is processed: %d, state: 0x%lx\n",
  1387. event_data->crashed, priv->state);
  1388. goto out;
  1389. }
  1390. if (test_bit(ICNSS_PD_RESTART, &priv->state) && event_data->crashed) {
  1391. icnss_fatal_err("PD Down while recovery inprogress, crashed: %d, state: 0x%lx\n",
  1392. event_data->crashed, priv->state);
  1393. if (!priv->allow_recursive_recovery)
  1394. ICNSS_ASSERT(0);
  1395. goto out;
  1396. }
  1397. if (!test_bit(ICNSS_PD_RESTART, &priv->state))
  1398. icnss_fw_crashed(priv, event_data);
  1399. out:
  1400. kfree(data);
  1401. return 0;
  1402. }
  1403. static int icnss_driver_event_early_crash_ind(struct icnss_priv *priv,
  1404. void *data)
  1405. {
  1406. if (!test_bit(ICNSS_WLFW_EXISTS, &priv->state)) {
  1407. icnss_ignore_fw_timeout(false);
  1408. goto out;
  1409. }
  1410. priv->early_crash_ind = true;
  1411. icnss_fw_crashed(priv, NULL);
  1412. out:
  1413. kfree(data);
  1414. return 0;
  1415. }
  1416. static int icnss_driver_event_idle_shutdown(struct icnss_priv *priv,
  1417. void *data)
  1418. {
  1419. int ret = 0;
  1420. if (!priv->ops || !priv->ops->idle_shutdown)
  1421. return 0;
  1422. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1423. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1424. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown callback\n");
  1425. ret = -EBUSY;
  1426. } else {
  1427. icnss_pr_dbg("Calling driver idle shutdown, state: 0x%lx\n",
  1428. priv->state);
  1429. icnss_block_shutdown(true);
  1430. ret = priv->ops->idle_shutdown(&priv->pdev->dev);
  1431. icnss_block_shutdown(false);
  1432. }
  1433. return ret;
  1434. }
  1435. static int icnss_driver_event_idle_restart(struct icnss_priv *priv,
  1436. void *data)
  1437. {
  1438. int ret = 0;
  1439. if (!priv->ops || !priv->ops->idle_restart)
  1440. return 0;
  1441. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  1442. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  1443. icnss_pr_err("SSR/PDR is already in-progress during idle restart callback\n");
  1444. ret = -EBUSY;
  1445. } else {
  1446. icnss_pr_dbg("Calling driver idle restart, state: 0x%lx\n",
  1447. priv->state);
  1448. icnss_block_shutdown(true);
  1449. ret = priv->ops->idle_restart(&priv->pdev->dev);
  1450. icnss_block_shutdown(false);
  1451. }
  1452. return ret;
  1453. }
  1454. static int icnss_qdss_trace_free_hdlr(struct icnss_priv *priv)
  1455. {
  1456. icnss_free_qdss_mem(priv);
  1457. return 0;
  1458. }
  1459. static int icnss_m3_dump_upload_req_hdlr(struct icnss_priv *priv,
  1460. void *data)
  1461. {
  1462. struct icnss_m3_upload_segments_req_data *event_data = data;
  1463. struct qcom_dump_segment segment;
  1464. int i, status = 0, ret = 0;
  1465. struct list_head head;
  1466. if (!dump_enabled()) {
  1467. icnss_pr_info("Dump collection is not enabled\n");
  1468. return ret;
  1469. }
  1470. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  1471. IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  1472. IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  1473. IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  1474. IS_ERR_OR_NULL(priv->m3_dump_phyapdmem))
  1475. return ret;
  1476. INIT_LIST_HEAD(&head);
  1477. for (i = 0; i < event_data->no_of_valid_segments; i++) {
  1478. memset(&segment, 0, sizeof(segment));
  1479. segment.va = devm_ioremap(&priv->pdev->dev,
  1480. event_data->m3_segment[i].addr,
  1481. event_data->m3_segment[i].size);
  1482. if (!segment.va) {
  1483. icnss_pr_err("Failed to ioremap M3 Dump region");
  1484. ret = -ENOMEM;
  1485. goto send_resp;
  1486. }
  1487. segment.size = event_data->m3_segment[i].size;
  1488. list_add(&segment.node, &head);
  1489. icnss_pr_dbg("Started Dump colletcion for %s segment",
  1490. event_data->m3_segment[i].name);
  1491. switch (event_data->m3_segment[i].type) {
  1492. case QMI_M3_SEGMENT_PHYAREG_V01:
  1493. ret = qcom_dump(&head, priv->m3_dump_phyareg->dev);
  1494. break;
  1495. case QMI_M3_SEGMENT_PHYDBG_V01:
  1496. ret = qcom_dump(&head, priv->m3_dump_phydbg->dev);
  1497. break;
  1498. case QMI_M3_SEGMENT_WMAC0_REG_V01:
  1499. ret = qcom_dump(&head, priv->m3_dump_wmac0reg->dev);
  1500. break;
  1501. case QMI_M3_SEGMENT_WCSSDBG_V01:
  1502. ret = qcom_dump(&head, priv->m3_dump_wcssdbg->dev);
  1503. break;
  1504. case QMI_M3_SEGMENT_PHYAPDMEM_V01:
  1505. ret = qcom_dump(&head, priv->m3_dump_phyapdmem->dev);
  1506. break;
  1507. default:
  1508. icnss_pr_err("Invalid Segment type: %d",
  1509. event_data->m3_segment[i].type);
  1510. }
  1511. if (ret) {
  1512. status = ret;
  1513. icnss_pr_err("Failed to dump m3 %s segment, err = %d\n",
  1514. event_data->m3_segment[i].name, ret);
  1515. }
  1516. list_del(&segment.node);
  1517. }
  1518. send_resp:
  1519. icnss_wlfw_m3_dump_upload_done_send_sync(priv, event_data->pdev_id,
  1520. status);
  1521. return ret;
  1522. }
  1523. static int icnss_subsys_restart_level(struct icnss_priv *priv, void *data)
  1524. {
  1525. int ret = 0;
  1526. struct icnss_subsys_restart_level_data *event_data = data;
  1527. if (!priv)
  1528. return -ENODEV;
  1529. if (!data)
  1530. return -EINVAL;
  1531. ret = wlfw_subsys_restart_level_msg(priv, event_data->restart_level);
  1532. kfree(data);
  1533. return ret;
  1534. }
  1535. static void icnss_wpss_self_recovery(struct work_struct *wpss_load_work)
  1536. {
  1537. int ret;
  1538. struct icnss_priv *priv = icnss_get_plat_priv();
  1539. rproc_shutdown(priv->rproc);
  1540. ret = rproc_boot(priv->rproc);
  1541. if (ret) {
  1542. icnss_pr_err("Failed to self recover wpss rproc, ret: %d", ret);
  1543. rproc_put(priv->rproc);
  1544. }
  1545. }
  1546. static void icnss_driver_event_work(struct work_struct *work)
  1547. {
  1548. struct icnss_priv *priv =
  1549. container_of(work, struct icnss_priv, event_work);
  1550. struct icnss_driver_event *event;
  1551. unsigned long flags;
  1552. int ret;
  1553. icnss_pm_stay_awake(priv);
  1554. spin_lock_irqsave(&priv->event_lock, flags);
  1555. while (!list_empty(&priv->event_list)) {
  1556. event = list_first_entry(&priv->event_list,
  1557. struct icnss_driver_event, list);
  1558. list_del(&event->list);
  1559. spin_unlock_irqrestore(&priv->event_lock, flags);
  1560. icnss_pr_dbg("Processing event: %s%s(%d), state: 0x%lx\n",
  1561. icnss_driver_event_to_str(event->type),
  1562. event->sync ? "-sync" : "", event->type,
  1563. priv->state);
  1564. switch (event->type) {
  1565. case ICNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1566. ret = icnss_driver_event_server_arrive(priv,
  1567. event->data);
  1568. break;
  1569. case ICNSS_DRIVER_EVENT_SERVER_EXIT:
  1570. ret = icnss_driver_event_server_exit(priv);
  1571. break;
  1572. case ICNSS_DRIVER_EVENT_FW_READY_IND:
  1573. ret = icnss_driver_event_fw_ready_ind(priv,
  1574. event->data);
  1575. break;
  1576. case ICNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1577. ret = icnss_driver_event_register_driver(priv,
  1578. event->data);
  1579. break;
  1580. case ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1581. ret = icnss_driver_event_unregister_driver(priv,
  1582. event->data);
  1583. break;
  1584. case ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN:
  1585. ret = icnss_driver_event_pd_service_down(priv,
  1586. event->data);
  1587. break;
  1588. case ICNSS_DRIVER_EVENT_FW_EARLY_CRASH_IND:
  1589. ret = icnss_driver_event_early_crash_ind(priv,
  1590. event->data);
  1591. break;
  1592. case ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1593. ret = icnss_driver_event_idle_shutdown(priv,
  1594. event->data);
  1595. break;
  1596. case ICNSS_DRIVER_EVENT_IDLE_RESTART:
  1597. ret = icnss_driver_event_idle_restart(priv,
  1598. event->data);
  1599. break;
  1600. case ICNSS_DRIVER_EVENT_FW_INIT_DONE_IND:
  1601. ret = icnss_driver_event_fw_init_done(priv,
  1602. event->data);
  1603. break;
  1604. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1605. ret = icnss_qdss_trace_req_mem_hdlr(priv);
  1606. break;
  1607. case ICNSS_DRIVER_EVENT_QDSS_TRACE_SAVE:
  1608. ret = icnss_qdss_trace_save_hdlr(priv,
  1609. event->data);
  1610. break;
  1611. case ICNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1612. ret = icnss_qdss_trace_free_hdlr(priv);
  1613. break;
  1614. case ICNSS_DRIVER_EVENT_M3_DUMP_UPLOAD_REQ:
  1615. ret = icnss_m3_dump_upload_req_hdlr(priv, event->data);
  1616. break;
  1617. case ICNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1618. ret = icnss_qdss_trace_req_data_hdlr(priv,
  1619. event->data);
  1620. break;
  1621. case ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL:
  1622. ret = icnss_subsys_restart_level(priv, event->data);
  1623. break;
  1624. case ICNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1625. ret = icnss_process_wfc_call_ind_event(priv,
  1626. event->data);
  1627. break;
  1628. case ICNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1629. ret = icnss_process_twt_cfg_ind_event(priv,
  1630. event->data);
  1631. break;
  1632. default:
  1633. icnss_pr_err("Invalid Event type: %d", event->type);
  1634. kfree(event);
  1635. continue;
  1636. }
  1637. priv->stats.events[event->type].processed++;
  1638. icnss_pr_dbg("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1639. icnss_driver_event_to_str(event->type),
  1640. event->sync ? "-sync" : "", event->type, ret,
  1641. priv->state);
  1642. spin_lock_irqsave(&priv->event_lock, flags);
  1643. if (event->sync) {
  1644. event->ret = ret;
  1645. complete(&event->complete);
  1646. continue;
  1647. }
  1648. spin_unlock_irqrestore(&priv->event_lock, flags);
  1649. kfree(event);
  1650. spin_lock_irqsave(&priv->event_lock, flags);
  1651. }
  1652. spin_unlock_irqrestore(&priv->event_lock, flags);
  1653. icnss_pm_relax(priv);
  1654. }
  1655. static void icnss_soc_wake_msg_work(struct work_struct *work)
  1656. {
  1657. struct icnss_priv *priv =
  1658. container_of(work, struct icnss_priv, soc_wake_msg_work);
  1659. struct icnss_soc_wake_event *event;
  1660. unsigned long flags;
  1661. int ret;
  1662. icnss_pm_stay_awake(priv);
  1663. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1664. while (!list_empty(&priv->soc_wake_msg_list)) {
  1665. event = list_first_entry(&priv->soc_wake_msg_list,
  1666. struct icnss_soc_wake_event, list);
  1667. list_del(&event->list);
  1668. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1669. icnss_pr_soc_wake("Processing event: %s%s(%d), state: 0x%lx\n",
  1670. icnss_soc_wake_event_to_str(event->type),
  1671. event->sync ? "-sync" : "", event->type,
  1672. priv->state);
  1673. switch (event->type) {
  1674. case ICNSS_SOC_WAKE_REQUEST_EVENT:
  1675. ret = icnss_event_soc_wake_request(priv,
  1676. event->data);
  1677. break;
  1678. case ICNSS_SOC_WAKE_RELEASE_EVENT:
  1679. ret = icnss_event_soc_wake_release(priv,
  1680. event->data);
  1681. break;
  1682. default:
  1683. icnss_pr_err("Invalid Event type: %d", event->type);
  1684. kfree(event);
  1685. continue;
  1686. }
  1687. priv->stats.soc_wake_events[event->type].processed++;
  1688. icnss_pr_soc_wake("Event Processed: %s%s(%d), ret: %d, state: 0x%lx\n",
  1689. icnss_soc_wake_event_to_str(event->type),
  1690. event->sync ? "-sync" : "", event->type, ret,
  1691. priv->state);
  1692. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1693. if (event->sync) {
  1694. event->ret = ret;
  1695. complete(&event->complete);
  1696. continue;
  1697. }
  1698. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1699. kfree(event);
  1700. spin_lock_irqsave(&priv->soc_wake_msg_lock, flags);
  1701. }
  1702. spin_unlock_irqrestore(&priv->soc_wake_msg_lock, flags);
  1703. icnss_pm_relax(priv);
  1704. }
  1705. static int icnss_msa0_ramdump(struct icnss_priv *priv)
  1706. {
  1707. int ret = 0;
  1708. struct qcom_dump_segment segment;
  1709. struct icnss_ramdump_info *msa0_dump_dev = priv->msa0_dump_dev;
  1710. struct list_head head;
  1711. if (!dump_enabled()) {
  1712. icnss_pr_info("Dump collection is not enabled\n");
  1713. return ret;
  1714. }
  1715. if (IS_ERR_OR_NULL(msa0_dump_dev))
  1716. return ret;
  1717. INIT_LIST_HEAD(&head);
  1718. memset(&segment, 0, sizeof(segment));
  1719. segment.va = priv->msa_va;
  1720. segment.size = priv->msa_mem_size;
  1721. list_add(&segment.node, &head);
  1722. if (!msa0_dump_dev->dev) {
  1723. icnss_pr_err("Created Dump Device not found\n");
  1724. return 0;
  1725. }
  1726. ret = qcom_dump(&head, msa0_dump_dev->dev);
  1727. if (ret) {
  1728. icnss_pr_err("Failed to dump msa0, err = %d\n", ret);
  1729. return ret;
  1730. }
  1731. list_del(&segment.node);
  1732. return ret;
  1733. }
  1734. static void icnss_update_state_send_modem_shutdown(struct icnss_priv *priv,
  1735. void *data)
  1736. {
  1737. struct qcom_ssr_notify_data *notif = data;
  1738. int ret = 0;
  1739. if (!notif->crashed) {
  1740. if (atomic_read(&priv->is_shutdown)) {
  1741. atomic_set(&priv->is_shutdown, false);
  1742. if (!test_bit(ICNSS_PD_RESTART, &priv->state) &&
  1743. !test_bit(ICNSS_SHUTDOWN_DONE, &priv->state) &&
  1744. !test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1745. clear_bit(ICNSS_FW_READY, &priv->state);
  1746. icnss_driver_event_post(priv,
  1747. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  1748. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE,
  1749. NULL);
  1750. }
  1751. }
  1752. if (test_bit(ICNSS_BLOCK_SHUTDOWN, &priv->state)) {
  1753. if (!wait_for_completion_timeout(
  1754. &priv->unblock_shutdown,
  1755. msecs_to_jiffies(PROBE_TIMEOUT)))
  1756. icnss_pr_err("modem block shutdown timeout\n");
  1757. }
  1758. ret = wlfw_send_modem_shutdown_msg(priv);
  1759. if (ret < 0)
  1760. icnss_pr_err("Fail to send modem shutdown Indication %d\n",
  1761. ret);
  1762. }
  1763. }
  1764. static char *icnss_qcom_ssr_notify_state_to_str(enum qcom_ssr_notify_type code)
  1765. {
  1766. switch (code) {
  1767. case QCOM_SSR_BEFORE_POWERUP:
  1768. return "BEFORE_POWERUP";
  1769. case QCOM_SSR_AFTER_POWERUP:
  1770. return "AFTER_POWERUP";
  1771. case QCOM_SSR_BEFORE_SHUTDOWN:
  1772. return "BEFORE_SHUTDOWN";
  1773. case QCOM_SSR_AFTER_SHUTDOWN:
  1774. return "AFTER_SHUTDOWN";
  1775. default:
  1776. return "UNKNOWN";
  1777. }
  1778. };
  1779. static int icnss_wpss_early_notifier_nb(struct notifier_block *nb,
  1780. unsigned long code,
  1781. void *data)
  1782. {
  1783. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1784. wpss_early_ssr_nb);
  1785. icnss_pr_vdbg("WPSS-EARLY-Notify: event %s(%lu)\n",
  1786. icnss_qcom_ssr_notify_state_to_str(code), code);
  1787. if (code == QCOM_SSR_BEFORE_SHUTDOWN) {
  1788. set_bit(ICNSS_FW_DOWN, &priv->state);
  1789. icnss_ignore_fw_timeout(true);
  1790. }
  1791. return NOTIFY_DONE;
  1792. }
  1793. static int icnss_wpss_notifier_nb(struct notifier_block *nb,
  1794. unsigned long code,
  1795. void *data)
  1796. {
  1797. struct icnss_event_pd_service_down_data *event_data;
  1798. struct qcom_ssr_notify_data *notif = data;
  1799. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1800. wpss_ssr_nb);
  1801. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1802. icnss_pr_vdbg("WPSS-Notify: event %s(%lu)\n",
  1803. icnss_qcom_ssr_notify_state_to_str(code), code);
  1804. if (code == QCOM_SSR_AFTER_SHUTDOWN) {
  1805. icnss_pr_info("Collecting msa0 segment dump\n");
  1806. icnss_msa0_ramdump(priv);
  1807. goto out;
  1808. }
  1809. if (code != QCOM_SSR_BEFORE_SHUTDOWN)
  1810. goto out;
  1811. if (priv->wpss_self_recovery_enabled)
  1812. del_timer(&priv->wpss_ssr_timer);
  1813. priv->is_ssr = true;
  1814. icnss_pr_info("WPSS went down, state: 0x%lx, crashed: %d\n",
  1815. priv->state, notif->crashed);
  1816. if (priv->device_id == ADRASTEA_DEVICE_ID)
  1817. icnss_update_state_send_modem_shutdown(priv, data);
  1818. set_bit(ICNSS_FW_DOWN, &priv->state);
  1819. icnss_ignore_fw_timeout(true);
  1820. if (notif->crashed)
  1821. priv->stats.recovery.root_pd_crash++;
  1822. else
  1823. priv->stats.recovery.root_pd_shutdown++;
  1824. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1825. if (event_data == NULL)
  1826. return notifier_from_errno(-ENOMEM);
  1827. event_data->crashed = notif->crashed;
  1828. fw_down_data.crashed = !!notif->crashed;
  1829. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1830. clear_bit(ICNSS_FW_READY, &priv->state);
  1831. fw_down_data.crashed = !!notif->crashed;
  1832. icnss_call_driver_uevent(priv,
  1833. ICNSS_UEVENT_FW_DOWN,
  1834. &fw_down_data);
  1835. }
  1836. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1837. ICNSS_EVENT_SYNC, event_data);
  1838. if (notif->crashed)
  1839. mod_timer(&priv->recovery_timer,
  1840. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1841. out:
  1842. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1843. return NOTIFY_OK;
  1844. }
  1845. static int icnss_modem_notifier_nb(struct notifier_block *nb,
  1846. unsigned long code,
  1847. void *data)
  1848. {
  1849. struct icnss_event_pd_service_down_data *event_data;
  1850. struct qcom_ssr_notify_data *notif = data;
  1851. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1852. modem_ssr_nb);
  1853. struct icnss_uevent_fw_down_data fw_down_data = {0};
  1854. icnss_pr_vdbg("Modem-Notify: event %s(%lu)\n",
  1855. icnss_qcom_ssr_notify_state_to_str(code), code);
  1856. switch (code) {
  1857. case QCOM_SSR_BEFORE_SHUTDOWN:
  1858. if (priv->is_slate_rfa)
  1859. complete(&priv->slate_boot_complete);
  1860. if (!notif->crashed &&
  1861. priv->low_power_support) { /* Hibernate */
  1862. if (test_bit(ICNSS_MODE_ON, &priv->state))
  1863. icnss_driver_event_post(
  1864. priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1865. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1866. set_bit(ICNSS_LOW_POWER, &priv->state);
  1867. }
  1868. break;
  1869. case QCOM_SSR_AFTER_SHUTDOWN:
  1870. /* Collect ramdump only when there was a crash. */
  1871. if (notif->crashed) {
  1872. icnss_pr_info("Collecting msa0 segment dump\n");
  1873. icnss_msa0_ramdump(priv);
  1874. }
  1875. goto out;
  1876. default:
  1877. goto out;
  1878. }
  1879. priv->is_ssr = true;
  1880. if (notif->crashed) {
  1881. priv->stats.recovery.root_pd_crash++;
  1882. priv->root_pd_shutdown = false;
  1883. } else {
  1884. priv->stats.recovery.root_pd_shutdown++;
  1885. priv->root_pd_shutdown = true;
  1886. }
  1887. icnss_update_state_send_modem_shutdown(priv, data);
  1888. if (test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  1889. set_bit(ICNSS_FW_DOWN, &priv->state);
  1890. icnss_ignore_fw_timeout(true);
  1891. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1892. clear_bit(ICNSS_FW_READY, &priv->state);
  1893. fw_down_data.crashed = !!notif->crashed;
  1894. icnss_call_driver_uevent(priv,
  1895. ICNSS_UEVENT_FW_DOWN,
  1896. &fw_down_data);
  1897. }
  1898. goto out;
  1899. }
  1900. icnss_pr_info("Modem went down, state: 0x%lx, crashed: %d\n",
  1901. priv->state, notif->crashed);
  1902. set_bit(ICNSS_FW_DOWN, &priv->state);
  1903. icnss_ignore_fw_timeout(true);
  1904. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  1905. if (event_data == NULL)
  1906. return notifier_from_errno(-ENOMEM);
  1907. event_data->crashed = notif->crashed;
  1908. fw_down_data.crashed = !!notif->crashed;
  1909. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  1910. clear_bit(ICNSS_FW_READY, &priv->state);
  1911. fw_down_data.crashed = !!notif->crashed;
  1912. icnss_call_driver_uevent(priv,
  1913. ICNSS_UEVENT_FW_DOWN,
  1914. &fw_down_data);
  1915. }
  1916. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  1917. ICNSS_EVENT_SYNC, event_data);
  1918. if (notif->crashed)
  1919. mod_timer(&priv->recovery_timer,
  1920. jiffies + msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  1921. out:
  1922. icnss_pr_vdbg("Exit %s,state: 0x%lx\n", __func__, priv->state);
  1923. return NOTIFY_OK;
  1924. }
  1925. static int icnss_wpss_early_ssr_register_notifier(struct icnss_priv *priv)
  1926. {
  1927. int ret = 0;
  1928. priv->wpss_early_ssr_nb.notifier_call = icnss_wpss_early_notifier_nb;
  1929. priv->wpss_early_notify_handler =
  1930. qcom_register_early_ssr_notifier("wpss",
  1931. &priv->wpss_early_ssr_nb);
  1932. if (IS_ERR(priv->wpss_early_notify_handler)) {
  1933. ret = PTR_ERR(priv->wpss_early_notify_handler);
  1934. icnss_pr_err("WPSS register early notifier failed: %d\n", ret);
  1935. }
  1936. return ret;
  1937. }
  1938. static int icnss_wpss_ssr_register_notifier(struct icnss_priv *priv)
  1939. {
  1940. int ret = 0;
  1941. priv->wpss_ssr_nb.notifier_call = icnss_wpss_notifier_nb;
  1942. /*
  1943. * Assign priority of icnss wpss notifier callback over IPA
  1944. * modem notifier callback which is 0
  1945. */
  1946. priv->wpss_ssr_nb.priority = 1;
  1947. priv->wpss_notify_handler =
  1948. qcom_register_ssr_notifier("wpss", &priv->wpss_ssr_nb);
  1949. if (IS_ERR(priv->wpss_notify_handler)) {
  1950. ret = PTR_ERR(priv->wpss_notify_handler);
  1951. icnss_pr_err("WPSS register notifier failed: %d\n", ret);
  1952. }
  1953. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  1954. return ret;
  1955. }
  1956. #ifdef SLATE_MODULE_ENABLED
  1957. static int icnss_slate_event_notifier_nb(struct notifier_block *nb,
  1958. unsigned long event, void *data)
  1959. {
  1960. icnss_pr_info("Received slate event 0x%x\n", event);
  1961. if (event == SLATE_STATUS) {
  1962. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  1963. seb_nb);
  1964. enum boot_status status = *(enum boot_status *)data;
  1965. if (status == SLATE_READY) {
  1966. icnss_pr_dbg("Slate ready received, state: 0x%lx\n",
  1967. priv->state);
  1968. set_bit(ICNSS_SLATE_READY, &priv->state);
  1969. set_bit(ICNSS_SLATE_UP, &priv->state);
  1970. complete(&priv->slate_boot_complete);
  1971. }
  1972. }
  1973. return NOTIFY_OK;
  1974. }
  1975. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  1976. {
  1977. int ret = 0;
  1978. priv->seb_nb.notifier_call = icnss_slate_event_notifier_nb;
  1979. priv->seb_handle = seb_register_for_slate_event(SLATE_STATUS,
  1980. &priv->seb_nb);
  1981. if (IS_ERR_OR_NULL(priv->seb_handle)) {
  1982. ret = priv->seb_handle ? PTR_ERR(priv->seb_handle) : -EINVAL;
  1983. icnss_pr_err("SLATE event register notifier failed: %d\n",
  1984. ret);
  1985. }
  1986. return ret;
  1987. }
  1988. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  1989. {
  1990. int ret = 0;
  1991. ret = seb_unregister_for_slate_event(priv->seb_handle, &priv->seb_nb);
  1992. if (ret < 0)
  1993. icnss_pr_err("Slate event unregister failed: %d\n", ret);
  1994. return ret;
  1995. }
  1996. static int icnss_slate_notifier_nb(struct notifier_block *nb,
  1997. unsigned long code,
  1998. void *data)
  1999. {
  2000. struct icnss_priv *priv = container_of(nb, struct icnss_priv,
  2001. slate_ssr_nb);
  2002. int ret = 0;
  2003. icnss_pr_vdbg("Slate-subsys-notify: event %lu\n", code);
  2004. if (code == QCOM_SSR_AFTER_POWERUP &&
  2005. test_bit(ICNSS_SLATE_READY, &priv->state)) {
  2006. set_bit(ICNSS_SLATE_UP, &priv->state);
  2007. complete(&priv->slate_boot_complete);
  2008. icnss_pr_dbg("Slate boot complete, state: 0x%lx\n",
  2009. priv->state);
  2010. } else if (code == QCOM_SSR_BEFORE_SHUTDOWN &&
  2011. test_bit(ICNSS_SLATE_UP, &priv->state)) {
  2012. clear_bit(ICNSS_SLATE_UP, &priv->state);
  2013. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  2014. icnss_pr_err("PD_RESTART in progress 0x%lx\n",
  2015. priv->state);
  2016. goto skip_pdr;
  2017. }
  2018. icnss_pr_dbg("Initiating PDR 0x%lx\n", priv->state);
  2019. ret = icnss_trigger_recovery(&priv->pdev->dev);
  2020. if (ret < 0) {
  2021. icnss_fatal_err("Fail to trigger PDR: ret: %d, state: 0x%lx\n",
  2022. ret, priv->state);
  2023. goto skip_pdr;
  2024. }
  2025. }
  2026. skip_pdr:
  2027. return NOTIFY_OK;
  2028. }
  2029. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2030. {
  2031. int ret = 0;
  2032. priv->slate_ssr_nb.notifier_call = icnss_slate_notifier_nb;
  2033. priv->slate_notify_handler =
  2034. qcom_register_ssr_notifier("slatefw", &priv->slate_ssr_nb);
  2035. if (IS_ERR(priv->slate_notify_handler)) {
  2036. ret = PTR_ERR(priv->slate_notify_handler);
  2037. icnss_pr_err("SLATE register notifier failed: %d\n", ret);
  2038. }
  2039. set_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state);
  2040. return ret;
  2041. }
  2042. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2043. {
  2044. if (!test_and_clear_bit(ICNSS_SLATE_SSR_REGISTERED, &priv->state))
  2045. return 0;
  2046. qcom_unregister_ssr_notifier(priv->slate_notify_handler,
  2047. &priv->slate_ssr_nb);
  2048. priv->slate_notify_handler = NULL;
  2049. return 0;
  2050. }
  2051. #else
  2052. static int icnss_register_slate_event_notifier(struct icnss_priv *priv)
  2053. {
  2054. return 0;
  2055. }
  2056. static int icnss_unregister_slate_event_notifier(struct icnss_priv *priv)
  2057. {
  2058. return 0;
  2059. }
  2060. static int icnss_slate_ssr_register_notifier(struct icnss_priv *priv)
  2061. {
  2062. return 0;
  2063. }
  2064. static int icnss_slate_ssr_unregister_notifier(struct icnss_priv *priv)
  2065. {
  2066. return 0;
  2067. }
  2068. #endif
  2069. static int icnss_modem_ssr_register_notifier(struct icnss_priv *priv)
  2070. {
  2071. int ret = 0;
  2072. priv->modem_ssr_nb.notifier_call = icnss_modem_notifier_nb;
  2073. /*
  2074. * Assign priority of icnss modem notifier callback over IPA
  2075. * modem notifier callback which is 0
  2076. */
  2077. priv->modem_ssr_nb.priority = 1;
  2078. priv->modem_notify_handler =
  2079. qcom_register_ssr_notifier("mpss", &priv->modem_ssr_nb);
  2080. if (IS_ERR(priv->modem_notify_handler)) {
  2081. ret = PTR_ERR(priv->modem_notify_handler);
  2082. icnss_pr_err("Modem register notifier failed: %d\n", ret);
  2083. }
  2084. set_bit(ICNSS_SSR_REGISTERED, &priv->state);
  2085. return ret;
  2086. }
  2087. static void icnss_wpss_early_ssr_unregister_notifier(struct icnss_priv *priv)
  2088. {
  2089. if (IS_ERR(priv->wpss_early_notify_handler))
  2090. return;
  2091. qcom_unregister_early_ssr_notifier(priv->wpss_early_notify_handler,
  2092. &priv->wpss_early_ssr_nb);
  2093. priv->wpss_early_notify_handler = NULL;
  2094. }
  2095. static int icnss_wpss_ssr_unregister_notifier(struct icnss_priv *priv)
  2096. {
  2097. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2098. return 0;
  2099. qcom_unregister_ssr_notifier(priv->wpss_notify_handler,
  2100. &priv->wpss_ssr_nb);
  2101. priv->wpss_notify_handler = NULL;
  2102. return 0;
  2103. }
  2104. static int icnss_modem_ssr_unregister_notifier(struct icnss_priv *priv)
  2105. {
  2106. if (!test_and_clear_bit(ICNSS_SSR_REGISTERED, &priv->state))
  2107. return 0;
  2108. qcom_unregister_ssr_notifier(priv->modem_notify_handler,
  2109. &priv->modem_ssr_nb);
  2110. priv->modem_notify_handler = NULL;
  2111. return 0;
  2112. }
  2113. static void icnss_pdr_notifier_cb(int state, char *service_path, void *priv_cb)
  2114. {
  2115. struct icnss_priv *priv = priv_cb;
  2116. struct icnss_event_pd_service_down_data *event_data;
  2117. struct icnss_uevent_fw_down_data fw_down_data = {0};
  2118. enum icnss_pdr_cause_index cause = ICNSS_ROOT_PD_CRASH;
  2119. if (!priv)
  2120. return;
  2121. icnss_pr_dbg("PD service notification: 0x%lx state: 0x%lx\n",
  2122. state, priv->state);
  2123. switch (state) {
  2124. case SERVREG_SERVICE_STATE_DOWN:
  2125. event_data = kzalloc(sizeof(*event_data), GFP_KERNEL);
  2126. if (!event_data)
  2127. return;
  2128. event_data->crashed = true;
  2129. if (!priv->is_ssr) {
  2130. set_bit(ICNSS_PDR, &penv->state);
  2131. if (test_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state)) {
  2132. cause = ICNSS_HOST_ERROR;
  2133. priv->stats.recovery.pdr_host_error++;
  2134. } else {
  2135. cause = ICNSS_FW_CRASH;
  2136. priv->stats.recovery.pdr_fw_crash++;
  2137. }
  2138. } else if (priv->root_pd_shutdown) {
  2139. cause = ICNSS_ROOT_PD_SHUTDOWN;
  2140. event_data->crashed = false;
  2141. }
  2142. icnss_pr_info("PD service down, state: 0x%lx: cause: %s\n",
  2143. priv->state, icnss_pdr_cause[cause]);
  2144. if (!test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2145. set_bit(ICNSS_FW_DOWN, &priv->state);
  2146. icnss_ignore_fw_timeout(true);
  2147. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  2148. clear_bit(ICNSS_FW_READY, &priv->state);
  2149. fw_down_data.crashed = event_data->crashed;
  2150. icnss_call_driver_uevent(priv,
  2151. ICNSS_UEVENT_FW_DOWN,
  2152. &fw_down_data);
  2153. }
  2154. }
  2155. clear_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  2156. if (event_data->crashed)
  2157. mod_timer(&priv->recovery_timer,
  2158. jiffies +
  2159. msecs_to_jiffies(ICNSS_RECOVERY_TIMEOUT));
  2160. icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_PD_SERVICE_DOWN,
  2161. ICNSS_EVENT_SYNC, event_data);
  2162. break;
  2163. case SERVREG_SERVICE_STATE_UP:
  2164. clear_bit(ICNSS_FW_DOWN, &priv->state);
  2165. break;
  2166. default:
  2167. break;
  2168. }
  2169. return;
  2170. }
  2171. static int icnss_pd_restart_enable(struct icnss_priv *priv)
  2172. {
  2173. struct pdr_handle *handle = NULL;
  2174. struct pdr_service *service = NULL;
  2175. int err = 0;
  2176. handle = pdr_handle_alloc(icnss_pdr_notifier_cb, priv);
  2177. if (IS_ERR_OR_NULL(handle)) {
  2178. err = PTR_ERR(handle);
  2179. icnss_pr_err("Failed to alloc pdr handle, err %d", err);
  2180. goto out;
  2181. }
  2182. service = pdr_add_lookup(handle, ICNSS_WLAN_SERVICE_NAME, ICNSS_WLANPD_NAME);
  2183. if (IS_ERR_OR_NULL(service)) {
  2184. err = PTR_ERR(service);
  2185. icnss_pr_err("Failed to add lookup, err %d", err);
  2186. goto out;
  2187. }
  2188. priv->pdr_handle = handle;
  2189. priv->pdr_service = service;
  2190. set_bit(ICNSS_PDR_REGISTERED, &priv->state);
  2191. icnss_pr_info("PDR registration happened");
  2192. out:
  2193. return err;
  2194. }
  2195. static void icnss_pdr_unregister_notifier(struct icnss_priv *priv)
  2196. {
  2197. if (!test_and_clear_bit(ICNSS_PDR_REGISTERED, &priv->state))
  2198. return;
  2199. pdr_handle_release(priv->pdr_handle);
  2200. }
  2201. static int icnss_ramdump_devnode_init(struct icnss_priv *priv)
  2202. {
  2203. int ret = 0;
  2204. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  2205. priv->icnss_ramdump_class = class_create(THIS_MODULE, ICNSS_RAMDUMP_NAME);
  2206. #else
  2207. priv->icnss_ramdump_class = class_create(ICNSS_RAMDUMP_NAME);
  2208. #endif
  2209. if (IS_ERR_OR_NULL(priv->icnss_ramdump_class)) {
  2210. ret = PTR_ERR(priv->icnss_ramdump_class);
  2211. icnss_pr_err("%s:Class create failed for ramdump devices (%d)\n", __func__, ret);
  2212. return ret;
  2213. }
  2214. ret = alloc_chrdev_region(&priv->icnss_ramdump_dev, 0, RAMDUMP_NUM_DEVICES,
  2215. ICNSS_RAMDUMP_NAME);
  2216. if (ret < 0) {
  2217. icnss_pr_err("%s: Unable to allocate major\n", __func__);
  2218. goto fail_alloc_major;
  2219. }
  2220. return 0;
  2221. fail_alloc_major:
  2222. class_destroy(priv->icnss_ramdump_class);
  2223. return ret;
  2224. }
  2225. void *icnss_create_ramdump_device(struct icnss_priv *priv, const char *dev_name)
  2226. {
  2227. int ret = 0;
  2228. struct icnss_ramdump_info *ramdump_info;
  2229. ramdump_info = kzalloc(sizeof(*ramdump_info), GFP_KERNEL);
  2230. if (!ramdump_info)
  2231. return ERR_PTR(-ENOMEM);
  2232. if (!dev_name) {
  2233. icnss_pr_err("%s: Invalid device name.\n", __func__);
  2234. return NULL;
  2235. }
  2236. snprintf(ramdump_info->name, ARRAY_SIZE(ramdump_info->name), "icnss_%s", dev_name);
  2237. ramdump_info->minor = ida_simple_get(&rd_minor_id, 0, RAMDUMP_NUM_DEVICES, GFP_KERNEL);
  2238. if (ramdump_info->minor < 0) {
  2239. icnss_pr_err("%s: No more minor numbers left! rc:%d\n", __func__,
  2240. ramdump_info->minor);
  2241. ret = -ENODEV;
  2242. goto fail_out_of_minors;
  2243. }
  2244. ramdump_info->dev = device_create(priv->icnss_ramdump_class, NULL,
  2245. MKDEV(MAJOR(priv->icnss_ramdump_dev),
  2246. ramdump_info->minor),
  2247. ramdump_info, ramdump_info->name);
  2248. if (IS_ERR_OR_NULL(ramdump_info->dev)) {
  2249. ret = PTR_ERR(ramdump_info->dev);
  2250. icnss_pr_err("%s: Device create failed for %s (%d)\n", __func__,
  2251. ramdump_info->name, ret);
  2252. goto fail_device_create;
  2253. }
  2254. return (void *)ramdump_info;
  2255. fail_device_create:
  2256. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  2257. fail_out_of_minors:
  2258. kfree(ramdump_info);
  2259. return ERR_PTR(ret);
  2260. }
  2261. static int icnss_register_ramdump_devices(struct icnss_priv *priv)
  2262. {
  2263. int ret = 0;
  2264. if (!priv || !priv->pdev) {
  2265. icnss_pr_err("Platform priv or pdev is NULL\n");
  2266. return -EINVAL;
  2267. }
  2268. ret = icnss_ramdump_devnode_init(priv);
  2269. if (ret)
  2270. return ret;
  2271. priv->msa0_dump_dev = icnss_create_ramdump_device(priv, "wcss_msa0");
  2272. if (IS_ERR_OR_NULL(priv->msa0_dump_dev) || !priv->msa0_dump_dev->dev) {
  2273. icnss_pr_err("Failed to create msa0 dump device!");
  2274. return -ENOMEM;
  2275. }
  2276. if (priv->device_id == WCN6750_DEVICE_ID ||
  2277. priv->device_id == WCN6450_DEVICE_ID) {
  2278. priv->m3_dump_phyareg = icnss_create_ramdump_device(priv,
  2279. ICNSS_M3_SEGMENT(
  2280. ICNSS_M3_SEGMENT_PHYAREG));
  2281. if (IS_ERR_OR_NULL(priv->m3_dump_phyareg) ||
  2282. !priv->m3_dump_phyareg->dev) {
  2283. icnss_pr_err("Failed to create m3 dump for Phyareg segment device!");
  2284. return -ENOMEM;
  2285. }
  2286. priv->m3_dump_phydbg = icnss_create_ramdump_device(priv,
  2287. ICNSS_M3_SEGMENT(
  2288. ICNSS_M3_SEGMENT_PHYA));
  2289. if (IS_ERR_OR_NULL(priv->m3_dump_phydbg) ||
  2290. !priv->m3_dump_phydbg->dev) {
  2291. icnss_pr_err("Failed to create m3 dump for Phydbg segment device!");
  2292. return -ENOMEM;
  2293. }
  2294. priv->m3_dump_wmac0reg = icnss_create_ramdump_device(priv,
  2295. ICNSS_M3_SEGMENT(
  2296. ICNSS_M3_SEGMENT_WMACREG));
  2297. if (IS_ERR_OR_NULL(priv->m3_dump_wmac0reg) ||
  2298. !priv->m3_dump_wmac0reg->dev) {
  2299. icnss_pr_err("Failed to create m3 dump for Wmac0reg segment device!");
  2300. return -ENOMEM;
  2301. }
  2302. priv->m3_dump_wcssdbg = icnss_create_ramdump_device(priv,
  2303. ICNSS_M3_SEGMENT(
  2304. ICNSS_M3_SEGMENT_WCSSDBG));
  2305. if (IS_ERR_OR_NULL(priv->m3_dump_wcssdbg) ||
  2306. !priv->m3_dump_wcssdbg->dev) {
  2307. icnss_pr_err("Failed to create m3 dump for Wcssdbg segment device!");
  2308. return -ENOMEM;
  2309. }
  2310. priv->m3_dump_phyapdmem = icnss_create_ramdump_device(priv,
  2311. ICNSS_M3_SEGMENT(
  2312. ICNSS_M3_SEGMENT_PHYAM3));
  2313. if (IS_ERR_OR_NULL(priv->m3_dump_phyapdmem) ||
  2314. !priv->m3_dump_phyapdmem->dev) {
  2315. icnss_pr_err("Failed to create m3 dump for Phyapdmem segment device!");
  2316. return -ENOMEM;
  2317. }
  2318. }
  2319. return 0;
  2320. }
  2321. static int icnss_enable_recovery(struct icnss_priv *priv)
  2322. {
  2323. int ret;
  2324. if (test_bit(RECOVERY_DISABLE, &priv->ctrl_params.quirks)) {
  2325. icnss_pr_dbg("Recovery disabled through module parameter\n");
  2326. return 0;
  2327. }
  2328. if (test_bit(PDR_ONLY, &priv->ctrl_params.quirks)) {
  2329. icnss_pr_dbg("SSR disabled through module parameter\n");
  2330. goto enable_pdr;
  2331. }
  2332. ret = icnss_register_ramdump_devices(priv);
  2333. if (ret)
  2334. return ret;
  2335. if (priv->wpss_supported) {
  2336. icnss_wpss_early_ssr_register_notifier(priv);
  2337. icnss_wpss_ssr_register_notifier(priv);
  2338. return 0;
  2339. }
  2340. if (!(priv->rproc_fw_download))
  2341. icnss_modem_ssr_register_notifier(priv);
  2342. if (priv->is_slate_rfa) {
  2343. icnss_slate_ssr_register_notifier(priv);
  2344. icnss_register_slate_event_notifier(priv);
  2345. }
  2346. if (test_bit(SSR_ONLY, &priv->ctrl_params.quirks)) {
  2347. icnss_pr_dbg("PDR disabled through module parameter\n");
  2348. return 0;
  2349. }
  2350. enable_pdr:
  2351. ret = icnss_pd_restart_enable(priv);
  2352. if (ret)
  2353. return ret;
  2354. return 0;
  2355. }
  2356. static int icnss_dev_id_match(struct icnss_priv *priv,
  2357. struct device_info *dev_info)
  2358. {
  2359. while (dev_info->device_id) {
  2360. if (priv->device_id == dev_info->device_id)
  2361. return 1;
  2362. dev_info++;
  2363. }
  2364. return 0;
  2365. }
  2366. static int icnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  2367. unsigned long *thermal_state)
  2368. {
  2369. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2370. *thermal_state = icnss_tcdev->max_thermal_state;
  2371. return 0;
  2372. }
  2373. static int icnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  2374. unsigned long *thermal_state)
  2375. {
  2376. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2377. *thermal_state = icnss_tcdev->curr_thermal_state;
  2378. return 0;
  2379. }
  2380. static int icnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  2381. unsigned long thermal_state)
  2382. {
  2383. struct icnss_thermal_cdev *icnss_tcdev = tcdev->devdata;
  2384. struct device *dev = &penv->pdev->dev;
  2385. int ret = 0;
  2386. if (!penv->ops || !penv->ops->set_therm_cdev_state)
  2387. return 0;
  2388. if (thermal_state > icnss_tcdev->max_thermal_state)
  2389. return -EINVAL;
  2390. icnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  2391. thermal_state, icnss_tcdev->tcdev_id);
  2392. mutex_lock(&penv->tcdev_lock);
  2393. ret = penv->ops->set_therm_cdev_state(dev, thermal_state,
  2394. icnss_tcdev->tcdev_id);
  2395. if (!ret)
  2396. icnss_tcdev->curr_thermal_state = thermal_state;
  2397. mutex_unlock(&penv->tcdev_lock);
  2398. if (ret) {
  2399. icnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  2400. ret, icnss_tcdev->tcdev_id);
  2401. return ret;
  2402. }
  2403. return 0;
  2404. }
  2405. static struct thermal_cooling_device_ops icnss_cooling_ops = {
  2406. .get_max_state = icnss_tcdev_get_max_state,
  2407. .get_cur_state = icnss_tcdev_get_cur_state,
  2408. .set_cur_state = icnss_tcdev_set_cur_state,
  2409. };
  2410. int icnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  2411. int tcdev_id)
  2412. {
  2413. struct icnss_priv *priv = dev_get_drvdata(dev);
  2414. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2415. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  2416. struct device_node *dev_node;
  2417. int ret = 0;
  2418. icnss_tcdev = kzalloc(sizeof(*icnss_tcdev), GFP_KERNEL);
  2419. if (!icnss_tcdev)
  2420. return -ENOMEM;
  2421. icnss_tcdev->tcdev_id = tcdev_id;
  2422. icnss_tcdev->max_thermal_state = max_state;
  2423. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  2424. "qcom,icnss_cdev%d", tcdev_id);
  2425. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  2426. if (!dev_node) {
  2427. icnss_pr_err("Failed to get cooling device node\n");
  2428. return -EINVAL;
  2429. }
  2430. icnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  2431. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  2432. icnss_tcdev->tcdev = thermal_of_cooling_device_register(
  2433. dev_node,
  2434. cdev_node_name, icnss_tcdev,
  2435. &icnss_cooling_ops);
  2436. if (IS_ERR_OR_NULL(icnss_tcdev->tcdev)) {
  2437. ret = PTR_ERR(icnss_tcdev->tcdev);
  2438. icnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  2439. ret, icnss_tcdev->tcdev_id);
  2440. } else {
  2441. icnss_pr_dbg("Cooling device registered for cdev id %d",
  2442. icnss_tcdev->tcdev_id);
  2443. list_add(&icnss_tcdev->tcdev_list,
  2444. &priv->icnss_tcdev_list);
  2445. }
  2446. } else {
  2447. icnss_pr_dbg("Cooling device registration not supported");
  2448. ret = -EOPNOTSUPP;
  2449. }
  2450. return ret;
  2451. }
  2452. EXPORT_SYMBOL(icnss_thermal_cdev_register);
  2453. void icnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  2454. {
  2455. struct icnss_priv *priv = dev_get_drvdata(dev);
  2456. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2457. while (!list_empty(&priv->icnss_tcdev_list)) {
  2458. icnss_tcdev = list_first_entry(&priv->icnss_tcdev_list,
  2459. struct icnss_thermal_cdev,
  2460. tcdev_list);
  2461. thermal_cooling_device_unregister(icnss_tcdev->tcdev);
  2462. list_del(&icnss_tcdev->tcdev_list);
  2463. kfree(icnss_tcdev);
  2464. }
  2465. }
  2466. EXPORT_SYMBOL(icnss_thermal_cdev_unregister);
  2467. int icnss_get_curr_therm_cdev_state(struct device *dev,
  2468. unsigned long *thermal_state,
  2469. int tcdev_id)
  2470. {
  2471. struct icnss_priv *priv = dev_get_drvdata(dev);
  2472. struct icnss_thermal_cdev *icnss_tcdev = NULL;
  2473. mutex_lock(&priv->tcdev_lock);
  2474. list_for_each_entry(icnss_tcdev, &priv->icnss_tcdev_list, tcdev_list) {
  2475. if (icnss_tcdev->tcdev_id != tcdev_id)
  2476. continue;
  2477. *thermal_state = icnss_tcdev->curr_thermal_state;
  2478. mutex_unlock(&priv->tcdev_lock);
  2479. icnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  2480. icnss_tcdev->curr_thermal_state, tcdev_id);
  2481. return 0;
  2482. }
  2483. mutex_unlock(&priv->tcdev_lock);
  2484. icnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  2485. return -EINVAL;
  2486. }
  2487. EXPORT_SYMBOL(icnss_get_curr_therm_cdev_state);
  2488. int icnss_qmi_send(struct device *dev, int type, void *cmd,
  2489. int cmd_len, void *cb_ctx,
  2490. int (*cb)(void *ctx, void *event, int event_len))
  2491. {
  2492. struct icnss_priv *priv = icnss_get_plat_priv();
  2493. int ret;
  2494. if (!priv)
  2495. return -ENODEV;
  2496. if (!test_bit(ICNSS_WLFW_CONNECTED, &priv->state))
  2497. return -EINVAL;
  2498. priv->get_info_cb = cb;
  2499. priv->get_info_cb_ctx = cb_ctx;
  2500. ret = icnss_wlfw_get_info_send_sync(priv, type, cmd, cmd_len);
  2501. if (ret) {
  2502. priv->get_info_cb = NULL;
  2503. priv->get_info_cb_ctx = NULL;
  2504. }
  2505. return ret;
  2506. }
  2507. EXPORT_SYMBOL(icnss_qmi_send);
  2508. int __icnss_register_driver(struct icnss_driver_ops *ops,
  2509. struct module *owner, const char *mod_name)
  2510. {
  2511. int ret = 0;
  2512. struct icnss_priv *priv = icnss_get_plat_priv();
  2513. if (!priv || !priv->pdev) {
  2514. ret = -ENODEV;
  2515. goto out;
  2516. }
  2517. icnss_pr_dbg("Registering driver, state: 0x%lx\n", priv->state);
  2518. if (priv->ops) {
  2519. icnss_pr_err("Driver already registered\n");
  2520. ret = -EEXIST;
  2521. goto out;
  2522. }
  2523. if (!ops->dev_info) {
  2524. icnss_pr_err("WLAN driver devinfo is null, Reject wlan driver loading");
  2525. return -EINVAL;
  2526. }
  2527. if (!icnss_dev_id_match(priv, ops->dev_info)) {
  2528. icnss_pr_err("WLAN driver dev name is %s, not supported by platform driver\n",
  2529. ops->dev_info->name);
  2530. return -ENODEV;
  2531. }
  2532. if (!ops->probe || !ops->remove) {
  2533. ret = -EINVAL;
  2534. goto out;
  2535. }
  2536. ret = icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_REGISTER_DRIVER,
  2537. 0, ops);
  2538. if (ret == -EINTR)
  2539. ret = 0;
  2540. out:
  2541. return ret;
  2542. }
  2543. EXPORT_SYMBOL(__icnss_register_driver);
  2544. int icnss_unregister_driver(struct icnss_driver_ops *ops)
  2545. {
  2546. int ret;
  2547. struct icnss_priv *priv = icnss_get_plat_priv();
  2548. if (!priv || !priv->pdev) {
  2549. ret = -ENODEV;
  2550. goto out;
  2551. }
  2552. icnss_pr_dbg("Unregistering driver, state: 0x%lx\n", priv->state);
  2553. if (!priv->ops) {
  2554. icnss_pr_err("Driver not registered\n");
  2555. ret = -ENOENT;
  2556. goto out;
  2557. }
  2558. ret = icnss_driver_event_post(priv,
  2559. ICNSS_DRIVER_EVENT_UNREGISTER_DRIVER,
  2560. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  2561. out:
  2562. return ret;
  2563. }
  2564. EXPORT_SYMBOL(icnss_unregister_driver);
  2565. static struct icnss_msi_config msi_config_wcn6750 = {
  2566. .total_vectors = 28,
  2567. .total_users = 2,
  2568. .users = (struct icnss_msi_user[]) {
  2569. { .name = "CE", .num_vectors = 10, .base_vector = 0 },
  2570. { .name = "DP", .num_vectors = 18, .base_vector = 10 },
  2571. },
  2572. };
  2573. static struct icnss_msi_config msi_config_wcn6450 = {
  2574. .total_vectors = 14,
  2575. .total_users = 2,
  2576. .users = (struct icnss_msi_user[]) {
  2577. { .name = "CE", .num_vectors = 12, .base_vector = 0 },
  2578. { .name = "DP", .num_vectors = 2, .base_vector = 12 },
  2579. },
  2580. };
  2581. static int icnss_get_msi_assignment(struct icnss_priv *priv)
  2582. {
  2583. if (priv->device_id == WCN6750_DEVICE_ID)
  2584. priv->msi_config = &msi_config_wcn6750;
  2585. else
  2586. priv->msi_config = &msi_config_wcn6450;
  2587. return 0;
  2588. }
  2589. int icnss_get_user_msi_assignment(struct device *dev, char *user_name,
  2590. int *num_vectors, u32 *user_base_data,
  2591. u32 *base_vector)
  2592. {
  2593. struct icnss_priv *priv = dev_get_drvdata(dev);
  2594. struct icnss_msi_config *msi_config;
  2595. int idx;
  2596. if (!priv)
  2597. return -ENODEV;
  2598. msi_config = priv->msi_config;
  2599. if (!msi_config) {
  2600. icnss_pr_err("MSI is not supported.\n");
  2601. return -EINVAL;
  2602. }
  2603. for (idx = 0; idx < msi_config->total_users; idx++) {
  2604. if (strcmp(user_name, msi_config->users[idx].name) == 0) {
  2605. *num_vectors = msi_config->users[idx].num_vectors;
  2606. *user_base_data = msi_config->users[idx].base_vector
  2607. + priv->msi_base_data;
  2608. *base_vector = msi_config->users[idx].base_vector;
  2609. icnss_pr_dbg("Assign MSI to user: %s, num_vectors: %d, user_base_data: %u, base_vector: %u\n",
  2610. user_name, *num_vectors, *user_base_data,
  2611. *base_vector);
  2612. return 0;
  2613. }
  2614. }
  2615. icnss_pr_err("Failed to find MSI assignment for %s!\n", user_name);
  2616. return -EINVAL;
  2617. }
  2618. EXPORT_SYMBOL(icnss_get_user_msi_assignment);
  2619. int icnss_get_msi_irq(struct device *dev, unsigned int vector)
  2620. {
  2621. struct icnss_priv *priv = dev_get_drvdata(dev);
  2622. int irq_num;
  2623. irq_num = priv->srng_irqs[vector];
  2624. icnss_pr_dbg("Get IRQ number %d for vector index %d\n",
  2625. irq_num, vector);
  2626. return irq_num;
  2627. }
  2628. EXPORT_SYMBOL(icnss_get_msi_irq);
  2629. void icnss_get_msi_address(struct device *dev, u32 *msi_addr_low,
  2630. u32 *msi_addr_high)
  2631. {
  2632. struct icnss_priv *priv = dev_get_drvdata(dev);
  2633. *msi_addr_low = lower_32_bits(priv->msi_addr_iova);
  2634. *msi_addr_high = upper_32_bits(priv->msi_addr_iova);
  2635. }
  2636. EXPORT_SYMBOL(icnss_get_msi_address);
  2637. int icnss_ce_request_irq(struct device *dev, unsigned int ce_id,
  2638. irqreturn_t (*handler)(int, void *),
  2639. unsigned long flags, const char *name, void *ctx)
  2640. {
  2641. int ret = 0;
  2642. unsigned int irq;
  2643. struct ce_irq_list *irq_entry;
  2644. struct icnss_priv *priv = dev_get_drvdata(dev);
  2645. if (!priv || !priv->pdev) {
  2646. ret = -ENODEV;
  2647. goto out;
  2648. }
  2649. icnss_pr_vdbg("CE request IRQ: %d, state: 0x%lx\n", ce_id, priv->state);
  2650. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2651. icnss_pr_err("Invalid CE ID, ce_id: %d\n", ce_id);
  2652. ret = -EINVAL;
  2653. goto out;
  2654. }
  2655. irq = priv->ce_irqs[ce_id];
  2656. irq_entry = &priv->ce_irq_list[ce_id];
  2657. if (irq_entry->handler || irq_entry->irq) {
  2658. icnss_pr_err("IRQ already requested: %d, ce_id: %d\n",
  2659. irq, ce_id);
  2660. ret = -EEXIST;
  2661. goto out;
  2662. }
  2663. ret = request_irq(irq, handler, flags, name, ctx);
  2664. if (ret) {
  2665. icnss_pr_err("IRQ request failed: %d, ce_id: %d, ret: %d\n",
  2666. irq, ce_id, ret);
  2667. goto out;
  2668. }
  2669. irq_entry->irq = irq;
  2670. irq_entry->handler = handler;
  2671. icnss_pr_vdbg("IRQ requested: %d, ce_id: %d\n", irq, ce_id);
  2672. penv->stats.ce_irqs[ce_id].request++;
  2673. out:
  2674. return ret;
  2675. }
  2676. EXPORT_SYMBOL(icnss_ce_request_irq);
  2677. int icnss_ce_free_irq(struct device *dev, unsigned int ce_id, void *ctx)
  2678. {
  2679. int ret = 0;
  2680. unsigned int irq;
  2681. struct ce_irq_list *irq_entry;
  2682. if (!penv || !penv->pdev || !dev) {
  2683. ret = -ENODEV;
  2684. goto out;
  2685. }
  2686. icnss_pr_vdbg("CE free IRQ: %d, state: 0x%lx\n", ce_id, penv->state);
  2687. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2688. icnss_pr_err("Invalid CE ID to free, ce_id: %d\n", ce_id);
  2689. ret = -EINVAL;
  2690. goto out;
  2691. }
  2692. irq = penv->ce_irqs[ce_id];
  2693. irq_entry = &penv->ce_irq_list[ce_id];
  2694. if (!irq_entry->handler || !irq_entry->irq) {
  2695. icnss_pr_err("IRQ not requested: %d, ce_id: %d\n", irq, ce_id);
  2696. ret = -EEXIST;
  2697. goto out;
  2698. }
  2699. free_irq(irq, ctx);
  2700. irq_entry->irq = 0;
  2701. irq_entry->handler = NULL;
  2702. penv->stats.ce_irqs[ce_id].free++;
  2703. out:
  2704. return ret;
  2705. }
  2706. EXPORT_SYMBOL(icnss_ce_free_irq);
  2707. void icnss_enable_irq(struct device *dev, unsigned int ce_id)
  2708. {
  2709. unsigned int irq;
  2710. if (!penv || !penv->pdev || !dev) {
  2711. icnss_pr_err("Platform driver not initialized\n");
  2712. return;
  2713. }
  2714. icnss_pr_vdbg("Enable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2715. penv->state);
  2716. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2717. icnss_pr_err("Invalid CE ID to enable IRQ, ce_id: %d\n", ce_id);
  2718. return;
  2719. }
  2720. penv->stats.ce_irqs[ce_id].enable++;
  2721. irq = penv->ce_irqs[ce_id];
  2722. enable_irq(irq);
  2723. }
  2724. EXPORT_SYMBOL(icnss_enable_irq);
  2725. void icnss_disable_irq(struct device *dev, unsigned int ce_id)
  2726. {
  2727. unsigned int irq;
  2728. if (!penv || !penv->pdev || !dev) {
  2729. icnss_pr_err("Platform driver not initialized\n");
  2730. return;
  2731. }
  2732. icnss_pr_vdbg("Disable IRQ: ce_id: %d, state: 0x%lx\n", ce_id,
  2733. penv->state);
  2734. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS) {
  2735. icnss_pr_err("Invalid CE ID to disable IRQ, ce_id: %d\n",
  2736. ce_id);
  2737. return;
  2738. }
  2739. irq = penv->ce_irqs[ce_id];
  2740. disable_irq(irq);
  2741. penv->stats.ce_irqs[ce_id].disable++;
  2742. }
  2743. EXPORT_SYMBOL(icnss_disable_irq);
  2744. int icnss_get_soc_info(struct device *dev, struct icnss_soc_info *info)
  2745. {
  2746. char *fw_build_timestamp = NULL;
  2747. struct icnss_priv *priv = dev_get_drvdata(dev);
  2748. if (!priv) {
  2749. icnss_pr_err("Platform driver not initialized\n");
  2750. return -EINVAL;
  2751. }
  2752. info->v_addr = priv->mem_base_va;
  2753. info->p_addr = priv->mem_base_pa;
  2754. info->chip_id = priv->chip_info.chip_id;
  2755. info->chip_family = priv->chip_info.chip_family;
  2756. info->board_id = priv->board_id;
  2757. info->soc_id = priv->soc_id;
  2758. info->fw_version = priv->fw_version_info.fw_version;
  2759. fw_build_timestamp = priv->fw_version_info.fw_build_timestamp;
  2760. fw_build_timestamp[WLFW_MAX_TIMESTAMP_LEN] = '\0';
  2761. strlcpy(info->fw_build_timestamp,
  2762. priv->fw_version_info.fw_build_timestamp,
  2763. WLFW_MAX_TIMESTAMP_LEN + 1);
  2764. strlcpy(info->fw_build_id, priv->fw_build_id,
  2765. ICNSS_WLFW_MAX_BUILD_ID_LEN + 1);
  2766. info->rd_card_chain_cap = priv->rd_card_chain_cap;
  2767. info->phy_he_channel_width_cap = priv->phy_he_channel_width_cap;
  2768. info->phy_qam_cap = priv->phy_qam_cap;
  2769. return 0;
  2770. }
  2771. EXPORT_SYMBOL(icnss_get_soc_info);
  2772. int icnss_get_mhi_state(struct device *dev)
  2773. {
  2774. struct icnss_priv *priv = dev_get_drvdata(dev);
  2775. if (!priv) {
  2776. icnss_pr_err("Platform driver not initialized\n");
  2777. return -EINVAL;
  2778. }
  2779. if (!priv->mhi_state_info_va)
  2780. return -ENOMEM;
  2781. return ioread32(priv->mhi_state_info_va);
  2782. }
  2783. EXPORT_SYMBOL(icnss_get_mhi_state);
  2784. int icnss_set_fw_log_mode(struct device *dev, uint8_t fw_log_mode)
  2785. {
  2786. int ret;
  2787. struct icnss_priv *priv;
  2788. if (!dev)
  2789. return -ENODEV;
  2790. priv = dev_get_drvdata(dev);
  2791. if (!priv) {
  2792. icnss_pr_err("Platform driver not initialized\n");
  2793. return -EINVAL;
  2794. }
  2795. if (test_bit(ICNSS_FW_DOWN, &penv->state) ||
  2796. !test_bit(ICNSS_FW_READY, &penv->state)) {
  2797. icnss_pr_err("FW down, ignoring fw_log_mode state: 0x%lx\n",
  2798. priv->state);
  2799. return -EINVAL;
  2800. }
  2801. icnss_pr_dbg("FW log mode: %u\n", fw_log_mode);
  2802. ret = wlfw_ini_send_sync_msg(priv, fw_log_mode);
  2803. if (ret)
  2804. icnss_pr_err("Fail to send ini, ret = %d, fw_log_mode: %u\n",
  2805. ret, fw_log_mode);
  2806. return ret;
  2807. }
  2808. EXPORT_SYMBOL(icnss_set_fw_log_mode);
  2809. int icnss_force_wake_request(struct device *dev)
  2810. {
  2811. struct icnss_priv *priv;
  2812. if (!dev)
  2813. return -ENODEV;
  2814. priv = dev_get_drvdata(dev);
  2815. if (!priv) {
  2816. icnss_pr_err("Platform driver not initialized\n");
  2817. return -EINVAL;
  2818. }
  2819. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2820. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2821. icnss_pr_soc_wake("FW down, ignoring SOC Wake request state: 0x%lx\n",
  2822. priv->state);
  2823. return -EINVAL;
  2824. }
  2825. if (atomic_inc_not_zero(&priv->soc_wake_ref_count)) {
  2826. icnss_pr_soc_wake("SOC already awake, Ref count: %d",
  2827. atomic_read(&priv->soc_wake_ref_count));
  2828. return 0;
  2829. }
  2830. icnss_pr_soc_wake("Calling SOC Wake request");
  2831. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_REQUEST_EVENT,
  2832. 0, NULL);
  2833. return 0;
  2834. }
  2835. EXPORT_SYMBOL(icnss_force_wake_request);
  2836. int icnss_force_wake_release(struct device *dev)
  2837. {
  2838. struct icnss_priv *priv;
  2839. if (!dev)
  2840. return -ENODEV;
  2841. priv = dev_get_drvdata(dev);
  2842. if (!priv) {
  2843. icnss_pr_err("Platform driver not initialized\n");
  2844. return -EINVAL;
  2845. }
  2846. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2847. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2848. icnss_pr_soc_wake("FW down, ignoring SOC Wake release state: 0x%lx\n",
  2849. priv->state);
  2850. return -EINVAL;
  2851. }
  2852. icnss_pr_soc_wake("Calling SOC Wake response");
  2853. if (atomic_read(&priv->soc_wake_ref_count) &&
  2854. icnss_atomic_dec_if_greater_one(&priv->soc_wake_ref_count)) {
  2855. icnss_pr_soc_wake("SOC previous release pending, Ref count: %d",
  2856. atomic_read(&priv->soc_wake_ref_count));
  2857. return 0;
  2858. }
  2859. icnss_soc_wake_event_post(priv, ICNSS_SOC_WAKE_RELEASE_EVENT,
  2860. 0, NULL);
  2861. return 0;
  2862. }
  2863. EXPORT_SYMBOL(icnss_force_wake_release);
  2864. int icnss_is_device_awake(struct device *dev)
  2865. {
  2866. struct icnss_priv *priv = dev_get_drvdata(dev);
  2867. if (!priv) {
  2868. icnss_pr_err("Platform driver not initialized\n");
  2869. return -EINVAL;
  2870. }
  2871. return atomic_read(&priv->soc_wake_ref_count);
  2872. }
  2873. EXPORT_SYMBOL(icnss_is_device_awake);
  2874. int icnss_is_pci_ep_awake(struct device *dev)
  2875. {
  2876. struct icnss_priv *priv = dev_get_drvdata(dev);
  2877. if (!priv) {
  2878. icnss_pr_err("Platform driver not initialized\n");
  2879. return -EINVAL;
  2880. }
  2881. if (!priv->mhi_state_info_va)
  2882. return -ENOMEM;
  2883. return ioread32(priv->mhi_state_info_va + ICNSS_PCI_EP_WAKE_OFFSET);
  2884. }
  2885. EXPORT_SYMBOL(icnss_is_pci_ep_awake);
  2886. int icnss_athdiag_read(struct device *dev, uint32_t offset,
  2887. uint32_t mem_type, uint32_t data_len,
  2888. uint8_t *output)
  2889. {
  2890. int ret = 0;
  2891. struct icnss_priv *priv = dev_get_drvdata(dev);
  2892. if (priv->magic != ICNSS_MAGIC) {
  2893. icnss_pr_err("Invalid drvdata for diag read: dev %pK, data %pK, magic 0x%x\n",
  2894. dev, priv, priv->magic);
  2895. return -EINVAL;
  2896. }
  2897. if (!output || data_len == 0
  2898. || data_len > WLFW_MAX_DATA_SIZE) {
  2899. icnss_pr_err("Invalid parameters for diag read: output %pK, data_len %u\n",
  2900. output, data_len);
  2901. ret = -EINVAL;
  2902. goto out;
  2903. }
  2904. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2905. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2906. icnss_pr_err("Invalid state for diag read: 0x%lx\n",
  2907. priv->state);
  2908. ret = -EINVAL;
  2909. goto out;
  2910. }
  2911. ret = wlfw_athdiag_read_send_sync_msg(priv, offset, mem_type,
  2912. data_len, output);
  2913. out:
  2914. return ret;
  2915. }
  2916. EXPORT_SYMBOL(icnss_athdiag_read);
  2917. int icnss_athdiag_write(struct device *dev, uint32_t offset,
  2918. uint32_t mem_type, uint32_t data_len,
  2919. uint8_t *input)
  2920. {
  2921. int ret = 0;
  2922. struct icnss_priv *priv = dev_get_drvdata(dev);
  2923. if (priv->magic != ICNSS_MAGIC) {
  2924. icnss_pr_err("Invalid drvdata for diag write: dev %pK, data %pK, magic 0x%x\n",
  2925. dev, priv, priv->magic);
  2926. return -EINVAL;
  2927. }
  2928. if (!input || data_len == 0
  2929. || data_len > WLFW_MAX_DATA_SIZE) {
  2930. icnss_pr_err("Invalid parameters for diag write: input %pK, data_len %u\n",
  2931. input, data_len);
  2932. ret = -EINVAL;
  2933. goto out;
  2934. }
  2935. if (!test_bit(ICNSS_FW_READY, &priv->state) ||
  2936. !test_bit(ICNSS_POWER_ON, &priv->state)) {
  2937. icnss_pr_err("Invalid state for diag write: 0x%lx\n",
  2938. priv->state);
  2939. ret = -EINVAL;
  2940. goto out;
  2941. }
  2942. ret = wlfw_athdiag_write_send_sync_msg(priv, offset, mem_type,
  2943. data_len, input);
  2944. out:
  2945. return ret;
  2946. }
  2947. EXPORT_SYMBOL(icnss_athdiag_write);
  2948. int icnss_wlan_enable(struct device *dev, struct icnss_wlan_enable_cfg *config,
  2949. enum icnss_driver_mode mode,
  2950. const char *host_version)
  2951. {
  2952. struct icnss_priv *priv = dev_get_drvdata(dev);
  2953. int temp = 0, ret = 0;
  2954. if (test_bit(ICNSS_FW_DOWN, &priv->state) ||
  2955. !test_bit(ICNSS_FW_READY, &priv->state)) {
  2956. icnss_pr_err("FW down, ignoring wlan_enable state: 0x%lx\n",
  2957. priv->state);
  2958. return -EINVAL;
  2959. }
  2960. if (test_bit(ICNSS_MODE_ON, &priv->state)) {
  2961. icnss_pr_err("Already Mode on, ignoring wlan_enable state: 0x%lx\n",
  2962. priv->state);
  2963. return -EINVAL;
  2964. }
  2965. if (priv->wpss_supported &&
  2966. !priv->dms.nv_mac_not_prov && !priv->dms.mac_valid)
  2967. icnss_setup_dms_mac(priv);
  2968. if (priv->device_id == WCN6750_DEVICE_ID) {
  2969. if (!icnss_get_temperature(priv, &temp)) {
  2970. icnss_pr_dbg("Temperature: %d\n", temp);
  2971. if (temp < WLAN_EN_TEMP_THRESHOLD)
  2972. icnss_set_wlan_en_delay(priv);
  2973. }
  2974. }
  2975. if (priv->device_id == WCN6450_DEVICE_ID)
  2976. icnss_hw_power_off(priv);
  2977. ret = icnss_send_wlan_enable_to_fw(priv, config, mode, host_version);
  2978. if (priv->device_id == WCN6450_DEVICE_ID)
  2979. icnss_hw_power_on(priv);
  2980. return ret;
  2981. }
  2982. EXPORT_SYMBOL(icnss_wlan_enable);
  2983. int icnss_wlan_disable(struct device *dev, enum icnss_driver_mode mode)
  2984. {
  2985. struct icnss_priv *priv = dev_get_drvdata(dev);
  2986. if (test_bit(ICNSS_FW_DOWN, &priv->state)) {
  2987. icnss_pr_dbg("FW down, ignoring wlan_disable state: 0x%lx\n",
  2988. priv->state);
  2989. return 0;
  2990. }
  2991. return icnss_send_wlan_disable_to_fw(priv);
  2992. }
  2993. EXPORT_SYMBOL(icnss_wlan_disable);
  2994. bool icnss_is_qmi_disable(struct device *dev)
  2995. {
  2996. return test_bit(SKIP_QMI, &penv->ctrl_params.quirks) ? true : false;
  2997. }
  2998. EXPORT_SYMBOL(icnss_is_qmi_disable);
  2999. int icnss_get_ce_id(struct device *dev, int irq)
  3000. {
  3001. int i;
  3002. if (!penv || !penv->pdev || !dev)
  3003. return -ENODEV;
  3004. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3005. if (penv->ce_irqs[i] == irq)
  3006. return i;
  3007. }
  3008. icnss_pr_err("No matching CE id for irq %d\n", irq);
  3009. return -EINVAL;
  3010. }
  3011. EXPORT_SYMBOL(icnss_get_ce_id);
  3012. int icnss_get_irq(struct device *dev, int ce_id)
  3013. {
  3014. int irq;
  3015. if (!penv || !penv->pdev || !dev)
  3016. return -ENODEV;
  3017. if (ce_id >= ICNSS_MAX_IRQ_REGISTRATIONS)
  3018. return -EINVAL;
  3019. irq = penv->ce_irqs[ce_id];
  3020. return irq;
  3021. }
  3022. EXPORT_SYMBOL(icnss_get_irq);
  3023. struct iommu_domain *icnss_smmu_get_domain(struct device *dev)
  3024. {
  3025. struct icnss_priv *priv = dev_get_drvdata(dev);
  3026. if (!priv) {
  3027. icnss_pr_err("Invalid drvdata: dev %pK\n", dev);
  3028. return NULL;
  3029. }
  3030. return priv->iommu_domain;
  3031. }
  3032. EXPORT_SYMBOL(icnss_smmu_get_domain);
  3033. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  3034. int icnss_iommu_map(struct iommu_domain *domain,
  3035. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  3036. {
  3037. return iommu_map(domain, iova, paddr, size, prot);
  3038. }
  3039. #else
  3040. int icnss_iommu_map(struct iommu_domain *domain,
  3041. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  3042. {
  3043. return iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL);
  3044. }
  3045. #endif
  3046. int icnss_smmu_map(struct device *dev,
  3047. phys_addr_t paddr, uint32_t *iova_addr, size_t size)
  3048. {
  3049. struct icnss_priv *priv = dev_get_drvdata(dev);
  3050. int flag = IOMMU_READ | IOMMU_WRITE;
  3051. bool dma_coherent = false;
  3052. unsigned long iova;
  3053. int prop_len = 0;
  3054. size_t len;
  3055. int ret = 0;
  3056. if (!priv) {
  3057. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3058. dev, priv);
  3059. return -EINVAL;
  3060. }
  3061. if (!iova_addr) {
  3062. icnss_pr_err("iova_addr is NULL, paddr %pa, size %zu\n",
  3063. &paddr, size);
  3064. return -EINVAL;
  3065. }
  3066. len = roundup(size + paddr - rounddown(paddr, PAGE_SIZE), PAGE_SIZE);
  3067. iova = roundup(priv->smmu_iova_ipa_current, PAGE_SIZE);
  3068. if (of_get_property(dev->of_node, "qcom,iommu-geometry", &prop_len) &&
  3069. iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3070. icnss_pr_err("No IOVA space to map, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3071. iova,
  3072. &priv->smmu_iova_ipa_start,
  3073. priv->smmu_iova_ipa_len);
  3074. return -ENOMEM;
  3075. }
  3076. dma_coherent = of_property_read_bool(dev->of_node, "dma-coherent");
  3077. icnss_pr_dbg("dma-coherent is %s\n",
  3078. dma_coherent ? "enabled" : "disabled");
  3079. if (dma_coherent)
  3080. flag |= IOMMU_CACHE;
  3081. icnss_pr_dbg("IOMMU Map: iova %lx, len %zu\n", iova, len);
  3082. ret = icnss_iommu_map(priv->iommu_domain, iova,
  3083. rounddown(paddr, PAGE_SIZE), len,
  3084. flag);
  3085. if (ret) {
  3086. icnss_pr_err("PA to IOVA mapping failed, ret %d\n", ret);
  3087. return ret;
  3088. }
  3089. priv->smmu_iova_ipa_current = iova + len;
  3090. *iova_addr = (uint32_t)(iova + paddr - rounddown(paddr, PAGE_SIZE));
  3091. icnss_pr_dbg("IOVA addr mapped to physical addr %lx\n", *iova_addr);
  3092. return 0;
  3093. }
  3094. EXPORT_SYMBOL(icnss_smmu_map);
  3095. int icnss_smmu_unmap(struct device *dev,
  3096. uint32_t iova_addr, size_t size)
  3097. {
  3098. struct icnss_priv *priv = dev_get_drvdata(dev);
  3099. unsigned long iova;
  3100. size_t len, unmapped_len;
  3101. if (!priv) {
  3102. icnss_pr_err("Invalid drvdata: dev %pK, data %pK\n",
  3103. dev, priv);
  3104. return -EINVAL;
  3105. }
  3106. if (!iova_addr) {
  3107. icnss_pr_err("iova_addr is NULL, size %zu\n",
  3108. size);
  3109. return -EINVAL;
  3110. }
  3111. len = roundup(size + iova_addr - rounddown(iova_addr, PAGE_SIZE),
  3112. PAGE_SIZE);
  3113. iova = rounddown(iova_addr, PAGE_SIZE);
  3114. if (iova >= priv->smmu_iova_ipa_start + priv->smmu_iova_ipa_len) {
  3115. icnss_pr_err("Out of IOVA space during unmap, iova %lx, smmu_iova_ipa_start %pad, smmu_iova_ipa_len %zu\n",
  3116. iova,
  3117. &priv->smmu_iova_ipa_start,
  3118. priv->smmu_iova_ipa_len);
  3119. return -ENOMEM;
  3120. }
  3121. icnss_pr_dbg("IOMMU Unmap: iova %lx, len %zu\n",
  3122. iova, len);
  3123. unmapped_len = iommu_unmap(priv->iommu_domain, iova, len);
  3124. if (unmapped_len != len) {
  3125. icnss_pr_err("Failed to unmap, %zu\n", unmapped_len);
  3126. return -EINVAL;
  3127. }
  3128. priv->smmu_iova_ipa_current = iova;
  3129. return 0;
  3130. }
  3131. EXPORT_SYMBOL(icnss_smmu_unmap);
  3132. unsigned int icnss_socinfo_get_serial_number(struct device *dev)
  3133. {
  3134. return socinfo_get_serial_number();
  3135. }
  3136. EXPORT_SYMBOL(icnss_socinfo_get_serial_number);
  3137. int icnss_trigger_recovery(struct device *dev)
  3138. {
  3139. int ret = 0;
  3140. struct icnss_priv *priv = dev_get_drvdata(dev);
  3141. if (priv->magic != ICNSS_MAGIC) {
  3142. icnss_pr_err("Invalid drvdata: magic 0x%x\n", priv->magic);
  3143. ret = -EINVAL;
  3144. goto out;
  3145. }
  3146. if (test_bit(ICNSS_PD_RESTART, &priv->state)) {
  3147. icnss_pr_err("PD recovery already in progress: state: 0x%lx\n",
  3148. priv->state);
  3149. ret = -EPERM;
  3150. goto out;
  3151. }
  3152. if (priv->wpss_supported) {
  3153. icnss_pr_vdbg("Initiate Root PD restart");
  3154. ret = icnss_send_smp2p(priv, ICNSS_TRIGGER_SSR,
  3155. ICNSS_SMP2P_OUT_POWER_SAVE);
  3156. if (!ret)
  3157. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3158. return ret;
  3159. }
  3160. if (!test_bit(ICNSS_PDR_REGISTERED, &priv->state)) {
  3161. icnss_pr_err("PD restart not enabled to trigger recovery: state: 0x%lx\n",
  3162. priv->state);
  3163. ret = -EOPNOTSUPP;
  3164. goto out;
  3165. }
  3166. icnss_pr_warn("Initiate PD restart at WLAN FW, state: 0x%lx\n",
  3167. priv->state);
  3168. ret = pdr_restart_pd(priv->pdr_handle, priv->pdr_service);
  3169. if (!ret)
  3170. set_bit(ICNSS_HOST_TRIGGERED_PDR, &priv->state);
  3171. out:
  3172. return ret;
  3173. }
  3174. EXPORT_SYMBOL(icnss_trigger_recovery);
  3175. int icnss_idle_shutdown(struct device *dev)
  3176. {
  3177. struct icnss_priv *priv = dev_get_drvdata(dev);
  3178. if (!priv) {
  3179. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3180. return -EINVAL;
  3181. }
  3182. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3183. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3184. icnss_pr_err("SSR/PDR is already in-progress during idle shutdown\n");
  3185. return -EBUSY;
  3186. }
  3187. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  3188. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3189. }
  3190. EXPORT_SYMBOL(icnss_idle_shutdown);
  3191. int icnss_idle_restart(struct device *dev)
  3192. {
  3193. struct icnss_priv *priv = dev_get_drvdata(dev);
  3194. if (!priv) {
  3195. icnss_pr_err("Invalid drvdata: dev %pK", dev);
  3196. return -EINVAL;
  3197. }
  3198. if (priv->is_ssr || test_bit(ICNSS_PDR, &priv->state) ||
  3199. test_bit(ICNSS_REJUVENATE, &priv->state)) {
  3200. icnss_pr_err("SSR/PDR is already in-progress during idle restart\n");
  3201. return -EBUSY;
  3202. }
  3203. return icnss_driver_event_post(priv, ICNSS_DRIVER_EVENT_IDLE_RESTART,
  3204. ICNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  3205. }
  3206. EXPORT_SYMBOL(icnss_idle_restart);
  3207. int icnss_exit_power_save(struct device *dev)
  3208. {
  3209. struct icnss_priv *priv = dev_get_drvdata(dev);
  3210. icnss_pr_vdbg("Calling Exit Power Save\n");
  3211. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3212. !test_bit(ICNSS_MODE_ON, &priv->state))
  3213. return 0;
  3214. return icnss_send_smp2p(priv, ICNSS_POWER_SAVE_EXIT,
  3215. ICNSS_SMP2P_OUT_POWER_SAVE);
  3216. }
  3217. EXPORT_SYMBOL(icnss_exit_power_save);
  3218. int icnss_prevent_l1(struct device *dev)
  3219. {
  3220. struct icnss_priv *priv = dev_get_drvdata(dev);
  3221. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3222. !test_bit(ICNSS_MODE_ON, &priv->state))
  3223. return 0;
  3224. return icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_EXIT,
  3225. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3226. }
  3227. EXPORT_SYMBOL(icnss_prevent_l1);
  3228. void icnss_allow_l1(struct device *dev)
  3229. {
  3230. struct icnss_priv *priv = dev_get_drvdata(dev);
  3231. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  3232. !test_bit(ICNSS_MODE_ON, &priv->state))
  3233. return;
  3234. icnss_send_smp2p(priv, ICNSS_PCI_EP_POWER_SAVE_ENTER,
  3235. ICNSS_SMP2P_OUT_EP_POWER_SAVE);
  3236. }
  3237. EXPORT_SYMBOL(icnss_allow_l1);
  3238. void icnss_allow_recursive_recovery(struct device *dev)
  3239. {
  3240. struct icnss_priv *priv = dev_get_drvdata(dev);
  3241. priv->allow_recursive_recovery = true;
  3242. icnss_pr_info("Recursive recovery allowed for WLAN\n");
  3243. }
  3244. void icnss_disallow_recursive_recovery(struct device *dev)
  3245. {
  3246. struct icnss_priv *priv = dev_get_drvdata(dev);
  3247. priv->allow_recursive_recovery = false;
  3248. icnss_pr_info("Recursive recovery disallowed for WLAN\n");
  3249. }
  3250. static int icnss_create_shutdown_sysfs(struct icnss_priv *priv)
  3251. {
  3252. struct kobject *icnss_kobject;
  3253. int ret = 0;
  3254. atomic_set(&priv->is_shutdown, false);
  3255. icnss_kobject = kobject_create_and_add("shutdown_wlan", kernel_kobj);
  3256. if (!icnss_kobject) {
  3257. icnss_pr_err("Unable to create shutdown_wlan kernel object");
  3258. return -EINVAL;
  3259. }
  3260. priv->icnss_kobject = icnss_kobject;
  3261. ret = sysfs_create_file(icnss_kobject, &icnss_sysfs_attribute.attr);
  3262. if (ret) {
  3263. icnss_pr_err("Unable to create icnss sysfs file err:%d", ret);
  3264. return ret;
  3265. }
  3266. return ret;
  3267. }
  3268. static void icnss_destroy_shutdown_sysfs(struct icnss_priv *priv)
  3269. {
  3270. struct kobject *icnss_kobject;
  3271. icnss_kobject = priv->icnss_kobject;
  3272. if (icnss_kobject)
  3273. kobject_put(icnss_kobject);
  3274. }
  3275. static ssize_t qdss_tr_start_store(struct device *dev,
  3276. struct device_attribute *attr,
  3277. const char *buf, size_t count)
  3278. {
  3279. struct icnss_priv *priv = dev_get_drvdata(dev);
  3280. wlfw_qdss_trace_start(priv);
  3281. icnss_pr_dbg("Received QDSS start command\n");
  3282. return count;
  3283. }
  3284. static ssize_t qdss_tr_stop_store(struct device *dev,
  3285. struct device_attribute *attr,
  3286. const char *user_buf, size_t count)
  3287. {
  3288. struct icnss_priv *priv = dev_get_drvdata(dev);
  3289. u32 option = 0;
  3290. if (sscanf(user_buf, "%du", &option) != 1)
  3291. return -EINVAL;
  3292. wlfw_qdss_trace_stop(priv, option);
  3293. icnss_pr_dbg("Received QDSS stop command\n");
  3294. return count;
  3295. }
  3296. static ssize_t qdss_conf_download_store(struct device *dev,
  3297. struct device_attribute *attr,
  3298. const char *buf, size_t count)
  3299. {
  3300. struct icnss_priv *priv = dev_get_drvdata(dev);
  3301. icnss_wlfw_qdss_dnld_send_sync(priv);
  3302. icnss_pr_dbg("Received QDSS download config command\n");
  3303. return count;
  3304. }
  3305. static ssize_t hw_trc_override_store(struct device *dev,
  3306. struct device_attribute *attr,
  3307. const char *buf, size_t count)
  3308. {
  3309. struct icnss_priv *priv = dev_get_drvdata(dev);
  3310. int tmp = 0;
  3311. if (sscanf(buf, "%du", &tmp) != 1)
  3312. return -EINVAL;
  3313. priv->hw_trc_override = tmp;
  3314. icnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3315. return count;
  3316. }
  3317. static void icnss_wpss_load(struct work_struct *wpss_load_work)
  3318. {
  3319. struct icnss_priv *priv = icnss_get_plat_priv();
  3320. phandle rproc_phandle;
  3321. int ret;
  3322. if (of_property_read_u32(priv->pdev->dev.of_node, "qcom,rproc-handle",
  3323. &rproc_phandle)) {
  3324. icnss_pr_err("error reading rproc phandle\n");
  3325. return;
  3326. }
  3327. priv->rproc = rproc_get_by_phandle(rproc_phandle);
  3328. if (IS_ERR_OR_NULL(priv->rproc)) {
  3329. icnss_pr_err("rproc not found");
  3330. return;
  3331. }
  3332. ret = rproc_boot(priv->rproc);
  3333. if (ret) {
  3334. icnss_pr_err("Failed to boot wpss rproc, ret: %d", ret);
  3335. rproc_put(priv->rproc);
  3336. }
  3337. }
  3338. static ssize_t wpss_boot_store(struct device *dev,
  3339. struct device_attribute *attr,
  3340. const char *buf, size_t count)
  3341. {
  3342. struct icnss_priv *priv = dev_get_drvdata(dev);
  3343. int wpss_rproc = 0;
  3344. if (!priv->wpss_supported && !priv->rproc_fw_download)
  3345. return count;
  3346. if (sscanf(buf, "%du", &wpss_rproc) != 1) {
  3347. icnss_pr_err("Failed to read wpss rproc info");
  3348. return -EINVAL;
  3349. }
  3350. icnss_pr_dbg("WPSS Remote Processor: %s", wpss_rproc ? "GET" : "PUT");
  3351. if (wpss_rproc == 1)
  3352. schedule_work(&wpss_loader);
  3353. else if (wpss_rproc == 0)
  3354. icnss_wpss_unload(priv);
  3355. return count;
  3356. }
  3357. static ssize_t wlan_en_delay_store(struct device *dev,
  3358. struct device_attribute *attr,
  3359. const char *buf, size_t count)
  3360. {
  3361. struct icnss_priv *priv = dev_get_drvdata(dev);
  3362. uint32_t wlan_en_delay = 0;
  3363. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3364. return count;
  3365. if (sscanf(buf, "%du", &wlan_en_delay) != 1) {
  3366. icnss_pr_err("Failed to read wlan_en_delay");
  3367. return -EINVAL;
  3368. }
  3369. icnss_pr_dbg("WLAN_EN delay: %dms", wlan_en_delay);
  3370. priv->wlan_en_delay_ms_user = wlan_en_delay;
  3371. return count;
  3372. }
  3373. static DEVICE_ATTR_WO(qdss_tr_start);
  3374. static DEVICE_ATTR_WO(qdss_tr_stop);
  3375. static DEVICE_ATTR_WO(qdss_conf_download);
  3376. static DEVICE_ATTR_WO(hw_trc_override);
  3377. static DEVICE_ATTR_WO(wpss_boot);
  3378. static DEVICE_ATTR_WO(wlan_en_delay);
  3379. static struct attribute *icnss_attrs[] = {
  3380. &dev_attr_qdss_tr_start.attr,
  3381. &dev_attr_qdss_tr_stop.attr,
  3382. &dev_attr_qdss_conf_download.attr,
  3383. &dev_attr_hw_trc_override.attr,
  3384. &dev_attr_wpss_boot.attr,
  3385. &dev_attr_wlan_en_delay.attr,
  3386. NULL,
  3387. };
  3388. static struct attribute_group icnss_attr_group = {
  3389. .attrs = icnss_attrs,
  3390. };
  3391. static int icnss_create_sysfs_link(struct icnss_priv *priv)
  3392. {
  3393. struct device *dev = &priv->pdev->dev;
  3394. int ret;
  3395. ret = sysfs_create_link(kernel_kobj, &dev->kobj, "icnss");
  3396. if (ret) {
  3397. icnss_pr_err("Failed to create icnss link, err = %d\n",
  3398. ret);
  3399. goto out;
  3400. }
  3401. return 0;
  3402. out:
  3403. return ret;
  3404. }
  3405. static void icnss_remove_sysfs_link(struct icnss_priv *priv)
  3406. {
  3407. sysfs_remove_link(kernel_kobj, "icnss");
  3408. }
  3409. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0))
  3410. union icnss_device_group_devres {
  3411. const struct attribute_group *group;
  3412. };
  3413. static void devm_icnss_group_remove(struct device *dev, void *res)
  3414. {
  3415. union icnss_device_group_devres *devres = res;
  3416. const struct attribute_group *group = devres->group;
  3417. icnss_pr_dbg("%s: removing group %p\n", __func__, group);
  3418. sysfs_remove_group(&dev->kobj, group);
  3419. }
  3420. static int devm_icnss_group_match(struct device *dev, void *res, void *data)
  3421. {
  3422. return ((union icnss_device_group_devres *)res) == data;
  3423. }
  3424. static void icnss_devm_device_remove_group(struct icnss_priv *priv)
  3425. {
  3426. WARN_ON(devres_release(&priv->pdev->dev,
  3427. devm_icnss_group_remove, devm_icnss_group_match,
  3428. (void *)&icnss_attr_group));
  3429. }
  3430. #else
  3431. static void icnss_devm_device_remove_group(struct icnss_priv *priv)
  3432. {
  3433. devm_device_remove_group(&priv->pdev->dev, &icnss_attr_group);
  3434. }
  3435. #endif
  3436. static int icnss_sysfs_create(struct icnss_priv *priv)
  3437. {
  3438. int ret = 0;
  3439. ret = devm_device_add_group(&priv->pdev->dev,
  3440. &icnss_attr_group);
  3441. if (ret) {
  3442. icnss_pr_err("Failed to create icnss device group, err = %d\n",
  3443. ret);
  3444. goto out;
  3445. }
  3446. icnss_create_sysfs_link(priv);
  3447. ret = icnss_create_shutdown_sysfs(priv);
  3448. if (ret)
  3449. goto remove_icnss_group;
  3450. return 0;
  3451. remove_icnss_group:
  3452. icnss_devm_device_remove_group(priv);
  3453. out:
  3454. return ret;
  3455. }
  3456. static void icnss_sysfs_destroy(struct icnss_priv *priv)
  3457. {
  3458. icnss_destroy_shutdown_sysfs(priv);
  3459. icnss_remove_sysfs_link(priv);
  3460. icnss_devm_device_remove_group(priv);
  3461. }
  3462. static int icnss_resource_parse(struct icnss_priv *priv)
  3463. {
  3464. int ret = 0, i = 0, irq = 0;
  3465. struct platform_device *pdev = priv->pdev;
  3466. struct device *dev = &pdev->dev;
  3467. struct resource *res;
  3468. u32 int_prop;
  3469. ret = icnss_get_vreg(priv);
  3470. if (ret) {
  3471. icnss_pr_err("Failed to get vreg, err = %d\n", ret);
  3472. goto out;
  3473. }
  3474. ret = icnss_get_clk(priv);
  3475. if (ret) {
  3476. icnss_pr_err("Failed to get clocks, err = %d\n", ret);
  3477. goto put_vreg;
  3478. }
  3479. if (of_property_read_bool(pdev->dev.of_node, "qcom,psf-supported")) {
  3480. ret = icnss_get_psf_info(priv);
  3481. if (ret < 0)
  3482. goto out;
  3483. priv->psf_supported = true;
  3484. }
  3485. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  3486. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3487. "membase");
  3488. if (!res) {
  3489. icnss_pr_err("Memory base not found in DT\n");
  3490. ret = -EINVAL;
  3491. goto put_clk;
  3492. }
  3493. priv->mem_base_pa = res->start;
  3494. priv->mem_base_va = devm_ioremap(dev, priv->mem_base_pa,
  3495. resource_size(res));
  3496. if (!priv->mem_base_va) {
  3497. icnss_pr_err("Memory base ioremap failed: phy addr: %pa\n",
  3498. &priv->mem_base_pa);
  3499. ret = -EINVAL;
  3500. goto put_clk;
  3501. }
  3502. icnss_pr_dbg("MEM_BASE pa: %pa, va: 0x%pK\n",
  3503. &priv->mem_base_pa,
  3504. priv->mem_base_va);
  3505. for (i = 0; i < ICNSS_MAX_IRQ_REGISTRATIONS; i++) {
  3506. irq = platform_get_irq(pdev, i);
  3507. if (irq < 0) {
  3508. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3509. ret = -ENODEV;
  3510. goto put_clk;
  3511. } else {
  3512. priv->ce_irqs[i] = irq;
  3513. }
  3514. }
  3515. if (of_property_read_bool(pdev->dev.of_node,
  3516. "qcom,is_low_power")) {
  3517. priv->low_power_support = true;
  3518. icnss_pr_dbg("Deep Sleep/Hibernate mode supported\n");
  3519. }
  3520. if (of_property_read_u32(pdev->dev.of_node, "qcom,rf_subtype",
  3521. &priv->rf_subtype) == 0) {
  3522. priv->is_rf_subtype_valid = true;
  3523. icnss_pr_dbg("RF subtype 0x%x\n", priv->rf_subtype);
  3524. }
  3525. if (of_property_read_bool(pdev->dev.of_node,
  3526. "qcom,is_slate_rfa")) {
  3527. priv->is_slate_rfa = true;
  3528. icnss_pr_err("SLATE rfa is enabled\n");
  3529. }
  3530. } else if (priv->device_id == WCN6750_DEVICE_ID ||
  3531. priv->device_id == WCN6450_DEVICE_ID) {
  3532. res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
  3533. "msi_addr");
  3534. if (!res) {
  3535. icnss_pr_err("MSI address not found in DT\n");
  3536. ret = -EINVAL;
  3537. goto put_clk;
  3538. }
  3539. priv->msi_addr_pa = res->start;
  3540. priv->msi_addr_iova = dma_map_resource(dev, priv->msi_addr_pa,
  3541. PAGE_SIZE,
  3542. DMA_FROM_DEVICE, 0);
  3543. if (dma_mapping_error(dev, priv->msi_addr_iova)) {
  3544. icnss_pr_err("MSI: failed to map msi address\n");
  3545. priv->msi_addr_iova = 0;
  3546. ret = -ENOMEM;
  3547. goto put_clk;
  3548. }
  3549. icnss_pr_dbg("MSI Addr pa: %pa, iova: 0x%pK\n",
  3550. &priv->msi_addr_pa,
  3551. priv->msi_addr_iova);
  3552. ret = of_property_read_u32_index(dev->of_node,
  3553. "interrupts",
  3554. 1,
  3555. &int_prop);
  3556. if (ret) {
  3557. icnss_pr_dbg("Read interrupt prop failed");
  3558. goto put_clk;
  3559. }
  3560. priv->msi_base_data = int_prop + 32;
  3561. icnss_pr_dbg(" MSI Base Data: %d, IRQ Index: %d\n",
  3562. priv->msi_base_data, int_prop);
  3563. icnss_get_msi_assignment(priv);
  3564. for (i = 0; i < priv->msi_config->total_vectors; i++) {
  3565. irq = platform_get_irq(priv->pdev, i);
  3566. if (irq < 0) {
  3567. icnss_pr_err("Fail to get IRQ-%d\n", i);
  3568. ret = -ENODEV;
  3569. goto put_clk;
  3570. } else {
  3571. priv->srng_irqs[i] = irq;
  3572. }
  3573. }
  3574. }
  3575. return 0;
  3576. put_clk:
  3577. icnss_put_clk(priv);
  3578. put_vreg:
  3579. icnss_put_vreg(priv);
  3580. out:
  3581. return ret;
  3582. }
  3583. static int icnss_msa_dt_parse(struct icnss_priv *priv)
  3584. {
  3585. int ret = 0;
  3586. struct platform_device *pdev = priv->pdev;
  3587. struct device *dev = &pdev->dev;
  3588. struct device_node *np = NULL;
  3589. u64 prop_size = 0;
  3590. const __be32 *addrp = NULL;
  3591. np = of_parse_phandle(dev->of_node,
  3592. "qcom,wlan-msa-fixed-region", 0);
  3593. if (np) {
  3594. addrp = of_get_address(np, 0, &prop_size, NULL);
  3595. if (!addrp) {
  3596. icnss_pr_err("Failed to get assigned-addresses or property\n");
  3597. ret = -EINVAL;
  3598. of_node_put(np);
  3599. goto out;
  3600. }
  3601. priv->msa_pa = of_translate_address(np, addrp);
  3602. if (priv->msa_pa == OF_BAD_ADDR) {
  3603. icnss_pr_err("Failed to translate MSA PA from device-tree\n");
  3604. ret = -EINVAL;
  3605. of_node_put(np);
  3606. goto out;
  3607. }
  3608. of_node_put(np);
  3609. priv->msa_va = memremap(priv->msa_pa,
  3610. (unsigned long)prop_size, MEMREMAP_WT);
  3611. if (!priv->msa_va) {
  3612. icnss_pr_err("MSA PA ioremap failed: phy addr: %pa\n",
  3613. &priv->msa_pa);
  3614. ret = -EINVAL;
  3615. goto out;
  3616. }
  3617. priv->msa_mem_size = prop_size;
  3618. } else {
  3619. ret = of_property_read_u32(dev->of_node, "qcom,wlan-msa-memory",
  3620. &priv->msa_mem_size);
  3621. if (ret || priv->msa_mem_size == 0) {
  3622. icnss_pr_err("Fail to get MSA Memory Size: %u ret: %d\n",
  3623. priv->msa_mem_size, ret);
  3624. goto out;
  3625. }
  3626. priv->msa_va = dmam_alloc_coherent(&pdev->dev,
  3627. priv->msa_mem_size, &priv->msa_pa, GFP_KERNEL);
  3628. if (!priv->msa_va) {
  3629. icnss_pr_err("DMA alloc failed for MSA\n");
  3630. ret = -ENOMEM;
  3631. goto out;
  3632. }
  3633. }
  3634. icnss_pr_dbg("MSA pa: %pa, MSA va: 0x%pK MSA Memory Size: 0x%x\n",
  3635. &priv->msa_pa, (void *)priv->msa_va, priv->msa_mem_size);
  3636. priv->use_prefix_path = of_property_read_bool(priv->pdev->dev.of_node,
  3637. "qcom,fw-prefix");
  3638. return 0;
  3639. out:
  3640. return ret;
  3641. }
  3642. static int icnss_smmu_fault_handler(struct iommu_domain *domain,
  3643. struct device *dev, unsigned long iova,
  3644. int flags, void *handler_token)
  3645. {
  3646. struct icnss_priv *priv = handler_token;
  3647. struct icnss_uevent_fw_down_data fw_down_data = {0};
  3648. icnss_fatal_err("SMMU fault happened with IOVA 0x%lx\n", iova);
  3649. if (!priv) {
  3650. icnss_pr_err("priv is NULL\n");
  3651. return -ENODEV;
  3652. }
  3653. if (test_bit(ICNSS_FW_READY, &priv->state)) {
  3654. fw_down_data.crashed = true;
  3655. icnss_call_driver_uevent(priv, ICNSS_UEVENT_SMMU_FAULT,
  3656. &fw_down_data);
  3657. icnss_call_driver_uevent(priv, ICNSS_UEVENT_FW_DOWN,
  3658. &fw_down_data);
  3659. }
  3660. icnss_trigger_recovery(&priv->pdev->dev);
  3661. /* IOMMU driver requires -ENOSYS return value to print debug info. */
  3662. return -ENOSYS;
  3663. }
  3664. static int icnss_smmu_dt_parse(struct icnss_priv *priv)
  3665. {
  3666. int ret = 0;
  3667. struct platform_device *pdev = priv->pdev;
  3668. struct device *dev = &pdev->dev;
  3669. const char *iommu_dma_type;
  3670. struct resource *res;
  3671. u32 addr_win[2];
  3672. ret = of_property_read_u32_array(dev->of_node,
  3673. "qcom,iommu-dma-addr-pool",
  3674. addr_win,
  3675. ARRAY_SIZE(addr_win));
  3676. if (ret) {
  3677. icnss_pr_err("SMMU IOVA base not found\n");
  3678. } else {
  3679. priv->smmu_iova_start = addr_win[0];
  3680. priv->smmu_iova_len = addr_win[1];
  3681. icnss_pr_dbg("SMMU IOVA start: %pa, len: %zx\n",
  3682. &priv->smmu_iova_start,
  3683. priv->smmu_iova_len);
  3684. priv->iommu_domain =
  3685. iommu_get_domain_for_dev(&pdev->dev);
  3686. ret = of_property_read_string(dev->of_node, "qcom,iommu-dma",
  3687. &iommu_dma_type);
  3688. if (!ret && !strcmp("fastmap", iommu_dma_type)) {
  3689. icnss_pr_dbg("SMMU S1 stage enabled\n");
  3690. priv->smmu_s1_enable = true;
  3691. if (priv->device_id == WCN6750_DEVICE_ID ||
  3692. priv->device_id == WCN6450_DEVICE_ID)
  3693. iommu_set_fault_handler(priv->iommu_domain,
  3694. icnss_smmu_fault_handler,
  3695. priv);
  3696. }
  3697. res = platform_get_resource_byname(pdev,
  3698. IORESOURCE_MEM,
  3699. "smmu_iova_ipa");
  3700. if (!res) {
  3701. icnss_pr_err("SMMU IOVA IPA not found\n");
  3702. } else {
  3703. priv->smmu_iova_ipa_start = res->start;
  3704. priv->smmu_iova_ipa_current = res->start;
  3705. priv->smmu_iova_ipa_len = resource_size(res);
  3706. icnss_pr_dbg("SMMU IOVA IPA start: %pa, len: %zx\n",
  3707. &priv->smmu_iova_ipa_start,
  3708. priv->smmu_iova_ipa_len);
  3709. }
  3710. }
  3711. return 0;
  3712. }
  3713. int icnss_get_iova(struct icnss_priv *priv, u64 *addr, u64 *size)
  3714. {
  3715. if (!priv)
  3716. return -ENODEV;
  3717. if (!priv->smmu_iova_len)
  3718. return -EINVAL;
  3719. *addr = priv->smmu_iova_start;
  3720. *size = priv->smmu_iova_len;
  3721. return 0;
  3722. }
  3723. int icnss_get_iova_ipa(struct icnss_priv *priv, u64 *addr, u64 *size)
  3724. {
  3725. if (!priv)
  3726. return -ENODEV;
  3727. if (!priv->smmu_iova_ipa_len)
  3728. return -EINVAL;
  3729. *addr = priv->smmu_iova_ipa_start;
  3730. *size = priv->smmu_iova_ipa_len;
  3731. return 0;
  3732. }
  3733. void icnss_add_fw_prefix_name(struct icnss_priv *priv, char *prefix_name,
  3734. char *name)
  3735. {
  3736. if (!priv)
  3737. return;
  3738. if (!priv->use_prefix_path) {
  3739. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME, "%s", name);
  3740. return;
  3741. }
  3742. if (priv->device_id == ADRASTEA_DEVICE_ID)
  3743. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3744. ADRASTEA_PATH_PREFIX "%s", name);
  3745. else if (priv->device_id == WCN6750_DEVICE_ID)
  3746. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3747. QCA6750_PATH_PREFIX "%s", name);
  3748. else if (priv->device_id == WCN6450_DEVICE_ID)
  3749. scnprintf(prefix_name, ICNSS_MAX_FILE_NAME,
  3750. WCN6450_PATH_PREFIX "%s", name);
  3751. icnss_pr_dbg("File added with prefix: %s\n", prefix_name);
  3752. }
  3753. static const struct platform_device_id icnss_platform_id_table[] = {
  3754. { .name = "wcn6750", .driver_data = WCN6750_DEVICE_ID, },
  3755. { .name = "adrastea", .driver_data = ADRASTEA_DEVICE_ID, },
  3756. { .name = "wcn6450", .driver_data = WCN6450_DEVICE_ID, },
  3757. { },
  3758. };
  3759. static const struct of_device_id icnss_dt_match[] = {
  3760. {
  3761. .compatible = "qcom,wcn6750",
  3762. .data = (void *)&icnss_platform_id_table[0]},
  3763. {
  3764. .compatible = "qcom,icnss",
  3765. .data = (void *)&icnss_platform_id_table[1]},
  3766. {
  3767. .compatible = "qcom,wcn6450",
  3768. .data = (void *)&icnss_platform_id_table[2]},
  3769. { },
  3770. };
  3771. MODULE_DEVICE_TABLE(of, icnss_dt_match);
  3772. static void icnss_init_control_params(struct icnss_priv *priv)
  3773. {
  3774. priv->ctrl_params.qmi_timeout = WLFW_TIMEOUT;
  3775. priv->ctrl_params.quirks = ICNSS_QUIRKS_DEFAULT;
  3776. priv->ctrl_params.bdf_type = ICNSS_BDF_TYPE_DEFAULT;
  3777. if (priv->device_id == WCN6750_DEVICE_ID ||
  3778. priv->device_id == WCN6450_DEVICE_ID ||
  3779. of_property_read_bool(priv->pdev->dev.of_node,
  3780. "wpss-support-enable"))
  3781. priv->wpss_supported = true;
  3782. if (of_property_read_bool(priv->pdev->dev.of_node,
  3783. "bdf-download-support"))
  3784. priv->bdf_download_support = true;
  3785. if (of_property_read_bool(priv->pdev->dev.of_node,
  3786. "rproc-fw-download"))
  3787. priv->rproc_fw_download = true;
  3788. if (priv->bdf_download_support && priv->device_id == ADRASTEA_DEVICE_ID)
  3789. priv->ctrl_params.bdf_type = ICNSS_BDF_BIN;
  3790. }
  3791. static void icnss_read_device_configs(struct icnss_priv *priv)
  3792. {
  3793. if (of_property_read_bool(priv->pdev->dev.of_node,
  3794. "wlan-ipa-disabled")) {
  3795. set_bit(ICNSS_IPA_DISABLED, &priv->device_config);
  3796. }
  3797. if (of_property_read_bool(priv->pdev->dev.of_node,
  3798. "qcom,wpss-self-recovery"))
  3799. priv->wpss_self_recovery_enabled = true;
  3800. }
  3801. static inline void icnss_runtime_pm_init(struct icnss_priv *priv)
  3802. {
  3803. pm_runtime_get_sync(&priv->pdev->dev);
  3804. pm_runtime_forbid(&priv->pdev->dev);
  3805. pm_runtime_set_active(&priv->pdev->dev);
  3806. pm_runtime_enable(&priv->pdev->dev);
  3807. }
  3808. static inline void icnss_runtime_pm_deinit(struct icnss_priv *priv)
  3809. {
  3810. pm_runtime_disable(&priv->pdev->dev);
  3811. pm_runtime_allow(&priv->pdev->dev);
  3812. pm_runtime_put_sync(&priv->pdev->dev);
  3813. }
  3814. static inline bool icnss_use_nv_mac(struct icnss_priv *priv)
  3815. {
  3816. return of_property_read_bool(priv->pdev->dev.of_node,
  3817. "use-nv-mac");
  3818. }
  3819. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  3820. static void rproc_restart_level_notifier(void *data, struct rproc *rproc)
  3821. {
  3822. struct icnss_subsys_restart_level_data *restart_level_data;
  3823. icnss_pr_info("rproc name: %s recovery disable: %d",
  3824. rproc->name, rproc->recovery_disabled);
  3825. restart_level_data = kzalloc(sizeof(*restart_level_data), GFP_ATOMIC);
  3826. if (!restart_level_data)
  3827. return;
  3828. if (strnstr(rproc->name, "wpss", ICNSS_RPROC_LEN)) {
  3829. if (rproc->recovery_disabled)
  3830. restart_level_data->restart_level = ICNSS_DISABLE_M3_SSR;
  3831. else
  3832. restart_level_data->restart_level = ICNSS_ENABLE_M3_SSR;
  3833. icnss_driver_event_post(penv, ICNSS_DRIVER_EVENT_SUBSYS_RESTART_LEVEL,
  3834. 0, restart_level_data);
  3835. }
  3836. }
  3837. #endif
  3838. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  3839. static void icnss_initialize_mem_pool(unsigned long device_id)
  3840. {
  3841. cnss_initialize_prealloc_pool(device_id);
  3842. }
  3843. static void icnss_deinitialize_mem_pool(void)
  3844. {
  3845. cnss_deinitialize_prealloc_pool();
  3846. }
  3847. #else
  3848. static void icnss_initialize_mem_pool(unsigned long device_id)
  3849. {
  3850. }
  3851. static void icnss_deinitialize_mem_pool(void)
  3852. {
  3853. }
  3854. #endif
  3855. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  3856. static void register_rproc_restart_level_notifier(void)
  3857. {
  3858. register_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3859. }
  3860. #else
  3861. static void register_rproc_restart_level_notifier(void)
  3862. {
  3863. return;
  3864. }
  3865. #endif
  3866. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  3867. static void unregister_rproc_restart_level_notifier(void)
  3868. {
  3869. unregister_trace_android_vh_rproc_recovery_set(rproc_restart_level_notifier, NULL);
  3870. }
  3871. #else
  3872. static void unregister_rproc_restart_level_notifier(void)
  3873. {
  3874. return;
  3875. }
  3876. #endif
  3877. static int icnss_probe(struct platform_device *pdev)
  3878. {
  3879. int ret = 0;
  3880. struct device *dev = &pdev->dev;
  3881. struct icnss_priv *priv;
  3882. const struct of_device_id *of_id;
  3883. const struct platform_device_id *device_id;
  3884. if (dev_get_drvdata(dev)) {
  3885. icnss_pr_err("Driver is already initialized\n");
  3886. return -EEXIST;
  3887. }
  3888. of_id = of_match_device(icnss_dt_match, &pdev->dev);
  3889. if (!of_id || !of_id->data) {
  3890. icnss_pr_err("Failed to find of match device!\n");
  3891. ret = -ENODEV;
  3892. goto out_reset_drvdata;
  3893. }
  3894. device_id = of_id->data;
  3895. icnss_pr_dbg("Platform driver probe\n");
  3896. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  3897. if (!priv)
  3898. return -ENOMEM;
  3899. priv->magic = ICNSS_MAGIC;
  3900. dev_set_drvdata(dev, priv);
  3901. priv->pdev = pdev;
  3902. priv->device_id = device_id->driver_data;
  3903. priv->is_chain1_supported = true;
  3904. INIT_LIST_HEAD(&priv->vreg_list);
  3905. INIT_LIST_HEAD(&priv->clk_list);
  3906. icnss_allow_recursive_recovery(dev);
  3907. icnss_initialize_mem_pool(priv->device_id);
  3908. icnss_init_control_params(priv);
  3909. icnss_read_device_configs(priv);
  3910. ret = icnss_resource_parse(priv);
  3911. if (ret)
  3912. goto out_reset_drvdata;
  3913. ret = icnss_msa_dt_parse(priv);
  3914. if (ret)
  3915. goto out_free_resources;
  3916. ret = icnss_smmu_dt_parse(priv);
  3917. if (ret)
  3918. goto out_free_resources;
  3919. spin_lock_init(&priv->event_lock);
  3920. spin_lock_init(&priv->on_off_lock);
  3921. spin_lock_init(&priv->soc_wake_msg_lock);
  3922. mutex_init(&priv->dev_lock);
  3923. mutex_init(&priv->tcdev_lock);
  3924. priv->event_wq = alloc_workqueue("icnss_driver_event", WQ_UNBOUND, 1);
  3925. if (!priv->event_wq) {
  3926. icnss_pr_err("Workqueue creation failed\n");
  3927. ret = -EFAULT;
  3928. goto smmu_cleanup;
  3929. }
  3930. INIT_WORK(&priv->event_work, icnss_driver_event_work);
  3931. INIT_LIST_HEAD(&priv->event_list);
  3932. if (priv->is_slate_rfa)
  3933. init_completion(&priv->slate_boot_complete);
  3934. ret = icnss_register_fw_service(priv);
  3935. if (ret < 0) {
  3936. icnss_pr_err("fw service registration failed: %d\n", ret);
  3937. goto out_destroy_wq;
  3938. }
  3939. icnss_power_misc_params_init(priv);
  3940. icnss_enable_recovery(priv);
  3941. icnss_debugfs_create(priv);
  3942. icnss_sysfs_create(priv);
  3943. ret = device_init_wakeup(&priv->pdev->dev, true);
  3944. if (ret)
  3945. icnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  3946. ret);
  3947. icnss_set_plat_priv(priv);
  3948. init_completion(&priv->unblock_shutdown);
  3949. if (priv->device_id == WCN6750_DEVICE_ID ||
  3950. priv->device_id == WCN6450_DEVICE_ID) {
  3951. priv->soc_wake_wq = alloc_workqueue("icnss_soc_wake_event",
  3952. WQ_UNBOUND|WQ_HIGHPRI, 1);
  3953. if (!priv->soc_wake_wq) {
  3954. icnss_pr_err("Soc wake Workqueue creation failed\n");
  3955. ret = -EFAULT;
  3956. goto out_unregister_fw_service;
  3957. }
  3958. INIT_WORK(&priv->soc_wake_msg_work, icnss_soc_wake_msg_work);
  3959. INIT_LIST_HEAD(&priv->soc_wake_msg_list);
  3960. ret = icnss_genl_init();
  3961. if (ret < 0)
  3962. icnss_pr_err("ICNSS genl init failed %d\n", ret);
  3963. init_completion(&priv->smp2p_soc_wake_wait);
  3964. icnss_runtime_pm_init(priv);
  3965. icnss_aop_interface_init(priv);
  3966. set_bit(ICNSS_COLD_BOOT_CAL, &priv->state);
  3967. priv->bdf_download_support = true;
  3968. register_rproc_restart_level_notifier();
  3969. }
  3970. if (priv->wpss_supported) {
  3971. ret = icnss_dms_init(priv);
  3972. if (ret)
  3973. icnss_pr_err("ICNSS DMS init failed %d\n", ret);
  3974. priv->use_nv_mac = icnss_use_nv_mac(priv);
  3975. icnss_pr_dbg("NV MAC feature is %s\n",
  3976. priv->use_nv_mac ? "Mandatory":"Not Mandatory");
  3977. }
  3978. if (priv->wpss_supported || priv->rproc_fw_download)
  3979. INIT_WORK(&wpss_loader, icnss_wpss_load);
  3980. timer_setup(&priv->recovery_timer,
  3981. icnss_recovery_timeout_hdlr, 0);
  3982. if (priv->wpss_self_recovery_enabled) {
  3983. INIT_WORK(&wpss_ssr_work, icnss_wpss_self_recovery);
  3984. timer_setup(&priv->wpss_ssr_timer,
  3985. icnss_wpss_ssr_timeout_hdlr, 0);
  3986. }
  3987. icnss_register_ims_service(priv);
  3988. INIT_LIST_HEAD(&priv->icnss_tcdev_list);
  3989. icnss_pr_info("Platform driver probed successfully\n");
  3990. return 0;
  3991. out_unregister_fw_service:
  3992. icnss_unregister_fw_service(priv);
  3993. out_destroy_wq:
  3994. destroy_workqueue(priv->event_wq);
  3995. smmu_cleanup:
  3996. priv->iommu_domain = NULL;
  3997. out_free_resources:
  3998. icnss_put_resources(priv);
  3999. out_reset_drvdata:
  4000. icnss_deinitialize_mem_pool();
  4001. dev_set_drvdata(dev, NULL);
  4002. return ret;
  4003. }
  4004. void icnss_destroy_ramdump_device(struct icnss_ramdump_info *ramdump_info)
  4005. {
  4006. if (IS_ERR_OR_NULL(ramdump_info))
  4007. return;
  4008. device_unregister(ramdump_info->dev);
  4009. ida_simple_remove(&rd_minor_id, ramdump_info->minor);
  4010. kfree(ramdump_info);
  4011. }
  4012. static void icnss_unregister_power_supply_notifier(struct icnss_priv *priv)
  4013. {
  4014. if (priv->batt_psy)
  4015. power_supply_put(penv->batt_psy);
  4016. if (priv->psf_supported) {
  4017. flush_workqueue(priv->soc_update_wq);
  4018. destroy_workqueue(priv->soc_update_wq);
  4019. power_supply_unreg_notifier(&priv->psf_nb);
  4020. }
  4021. }
  4022. static int icnss_remove(struct platform_device *pdev)
  4023. {
  4024. struct icnss_priv *priv = dev_get_drvdata(&pdev->dev);
  4025. icnss_pr_info("Removing driver: state: 0x%lx\n", priv->state);
  4026. del_timer(&priv->recovery_timer);
  4027. if (priv->wpss_self_recovery_enabled)
  4028. del_timer(&priv->wpss_ssr_timer);
  4029. device_init_wakeup(&priv->pdev->dev, false);
  4030. icnss_unregister_ims_service(priv);
  4031. icnss_debugfs_destroy(priv);
  4032. icnss_unregister_power_supply_notifier(penv);
  4033. icnss_sysfs_destroy(priv);
  4034. complete_all(&priv->unblock_shutdown);
  4035. if (priv->is_slate_rfa) {
  4036. complete(&priv->slate_boot_complete);
  4037. icnss_slate_ssr_unregister_notifier(priv);
  4038. icnss_unregister_slate_event_notifier(priv);
  4039. }
  4040. icnss_destroy_ramdump_device(priv->msa0_dump_dev);
  4041. if (priv->wpss_supported) {
  4042. icnss_dms_deinit(priv);
  4043. icnss_wpss_early_ssr_unregister_notifier(priv);
  4044. icnss_wpss_ssr_unregister_notifier(priv);
  4045. } else {
  4046. icnss_modem_ssr_unregister_notifier(priv);
  4047. icnss_pdr_unregister_notifier(priv);
  4048. }
  4049. if (priv->device_id == WCN6750_DEVICE_ID ||
  4050. priv->device_id == WCN6450_DEVICE_ID) {
  4051. icnss_genl_exit();
  4052. icnss_runtime_pm_deinit(priv);
  4053. unregister_rproc_restart_level_notifier();
  4054. complete_all(&priv->smp2p_soc_wake_wait);
  4055. icnss_destroy_ramdump_device(priv->m3_dump_phyareg);
  4056. icnss_destroy_ramdump_device(priv->m3_dump_phydbg);
  4057. icnss_destroy_ramdump_device(priv->m3_dump_wmac0reg);
  4058. icnss_destroy_ramdump_device(priv->m3_dump_wcssdbg);
  4059. icnss_destroy_ramdump_device(priv->m3_dump_phyapdmem);
  4060. if (priv->soc_wake_wq)
  4061. destroy_workqueue(priv->soc_wake_wq);
  4062. icnss_aop_interface_deinit(priv);
  4063. }
  4064. class_destroy(priv->icnss_ramdump_class);
  4065. unregister_chrdev_region(priv->icnss_ramdump_dev, RAMDUMP_NUM_DEVICES);
  4066. icnss_unregister_fw_service(priv);
  4067. if (priv->event_wq)
  4068. destroy_workqueue(priv->event_wq);
  4069. priv->iommu_domain = NULL;
  4070. icnss_hw_power_off(priv);
  4071. icnss_put_resources(priv);
  4072. icnss_deinitialize_mem_pool();
  4073. dev_set_drvdata(&pdev->dev, NULL);
  4074. return 0;
  4075. }
  4076. void icnss_recovery_timeout_hdlr(struct timer_list *t)
  4077. {
  4078. struct icnss_priv *priv = from_timer(priv, t, recovery_timer);
  4079. /* This is to handle if slate is not up and modem SSR is triggered */
  4080. if (priv->is_slate_rfa && !test_bit(ICNSS_SLATE_UP, &priv->state))
  4081. return;
  4082. icnss_pr_err("Timeout waiting for FW Ready 0x%lx\n", priv->state);
  4083. ICNSS_ASSERT(0);
  4084. }
  4085. void icnss_wpss_ssr_timeout_hdlr(struct timer_list *t)
  4086. {
  4087. struct icnss_priv *priv = from_timer(priv, t, wpss_ssr_timer);
  4088. icnss_pr_err("Timeout waiting for WPSS SSR notification 0x%lx\n",
  4089. priv->state);
  4090. schedule_work(&wpss_ssr_work);
  4091. }
  4092. #ifdef CONFIG_PM_SLEEP
  4093. static int icnss_pm_suspend(struct device *dev)
  4094. {
  4095. struct icnss_priv *priv = dev_get_drvdata(dev);
  4096. int ret = 0;
  4097. if (priv->magic != ICNSS_MAGIC) {
  4098. icnss_pr_err("Invalid drvdata for pm suspend: dev %pK, data %pK, magic 0x%x\n",
  4099. dev, priv, priv->magic);
  4100. return -EINVAL;
  4101. }
  4102. icnss_pr_vdbg("PM Suspend, state: 0x%lx\n", priv->state);
  4103. if (!priv->ops || !priv->ops->pm_suspend ||
  4104. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  4105. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4106. return 0;
  4107. ret = priv->ops->pm_suspend(dev);
  4108. if (ret == 0) {
  4109. if (priv->device_id == WCN6750_DEVICE_ID ||
  4110. priv->device_id == WCN6450_DEVICE_ID) {
  4111. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4112. !test_bit(ICNSS_MODE_ON, &priv->state))
  4113. return 0;
  4114. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4115. ICNSS_SMP2P_OUT_POWER_SAVE);
  4116. }
  4117. priv->stats.pm_suspend++;
  4118. set_bit(ICNSS_PM_SUSPEND, &priv->state);
  4119. } else {
  4120. priv->stats.pm_suspend_err++;
  4121. }
  4122. return ret;
  4123. }
  4124. static int icnss_pm_resume(struct device *dev)
  4125. {
  4126. struct icnss_priv *priv = dev_get_drvdata(dev);
  4127. int ret = 0;
  4128. if (priv->magic != ICNSS_MAGIC) {
  4129. icnss_pr_err("Invalid drvdata for pm resume: dev %pK, data %pK, magic 0x%x\n",
  4130. dev, priv, priv->magic);
  4131. return -EINVAL;
  4132. }
  4133. icnss_pr_vdbg("PM resume, state: 0x%lx\n", priv->state);
  4134. if (!priv->ops || !priv->ops->pm_resume ||
  4135. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state) ||
  4136. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4137. goto out;
  4138. ret = priv->ops->pm_resume(dev);
  4139. out:
  4140. if (ret == 0) {
  4141. priv->stats.pm_resume++;
  4142. clear_bit(ICNSS_PM_SUSPEND, &priv->state);
  4143. } else {
  4144. priv->stats.pm_resume_err++;
  4145. }
  4146. return ret;
  4147. }
  4148. static int icnss_pm_suspend_noirq(struct device *dev)
  4149. {
  4150. struct icnss_priv *priv = dev_get_drvdata(dev);
  4151. int ret = 0;
  4152. if (priv->magic != ICNSS_MAGIC) {
  4153. icnss_pr_err("Invalid drvdata for pm suspend_noirq: dev %pK, data %pK, magic 0x%x\n",
  4154. dev, priv, priv->magic);
  4155. return -EINVAL;
  4156. }
  4157. icnss_pr_vdbg("PM suspend_noirq, state: 0x%lx\n", priv->state);
  4158. if (!priv->ops || !priv->ops->suspend_noirq ||
  4159. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4160. goto out;
  4161. ret = priv->ops->suspend_noirq(dev);
  4162. out:
  4163. if (ret == 0) {
  4164. priv->stats.pm_suspend_noirq++;
  4165. set_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4166. } else {
  4167. priv->stats.pm_suspend_noirq_err++;
  4168. }
  4169. return ret;
  4170. }
  4171. static int icnss_pm_resume_noirq(struct device *dev)
  4172. {
  4173. struct icnss_priv *priv = dev_get_drvdata(dev);
  4174. int ret = 0;
  4175. if (priv->magic != ICNSS_MAGIC) {
  4176. icnss_pr_err("Invalid drvdata for pm resume_noirq: dev %pK, data %pK, magic 0x%x\n",
  4177. dev, priv, priv->magic);
  4178. return -EINVAL;
  4179. }
  4180. icnss_pr_vdbg("PM resume_noirq, state: 0x%lx\n", priv->state);
  4181. if (!priv->ops || !priv->ops->resume_noirq ||
  4182. !test_bit(ICNSS_DRIVER_PROBED, &priv->state))
  4183. goto out;
  4184. ret = priv->ops->resume_noirq(dev);
  4185. out:
  4186. if (ret == 0) {
  4187. priv->stats.pm_resume_noirq++;
  4188. clear_bit(ICNSS_PM_SUSPEND_NOIRQ, &priv->state);
  4189. } else {
  4190. priv->stats.pm_resume_noirq_err++;
  4191. }
  4192. return ret;
  4193. }
  4194. static int icnss_pm_runtime_suspend(struct device *dev)
  4195. {
  4196. struct icnss_priv *priv = dev_get_drvdata(dev);
  4197. int ret = 0;
  4198. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4199. icnss_pr_err("Ignore runtime suspend:\n");
  4200. goto out;
  4201. }
  4202. if (priv->magic != ICNSS_MAGIC) {
  4203. icnss_pr_err("Invalid drvdata for runtime suspend: dev %pK, data %pK, magic 0x%x\n",
  4204. dev, priv, priv->magic);
  4205. return -EINVAL;
  4206. }
  4207. if (!priv->ops || !priv->ops->runtime_suspend ||
  4208. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4209. goto out;
  4210. icnss_pr_vdbg("Runtime suspend\n");
  4211. ret = priv->ops->runtime_suspend(dev);
  4212. if (!ret) {
  4213. if (test_bit(ICNSS_PD_RESTART, &priv->state) ||
  4214. !test_bit(ICNSS_MODE_ON, &priv->state))
  4215. return 0;
  4216. ret = icnss_send_smp2p(priv, ICNSS_POWER_SAVE_ENTER,
  4217. ICNSS_SMP2P_OUT_POWER_SAVE);
  4218. }
  4219. out:
  4220. return ret;
  4221. }
  4222. static int icnss_pm_runtime_resume(struct device *dev)
  4223. {
  4224. struct icnss_priv *priv = dev_get_drvdata(dev);
  4225. int ret = 0;
  4226. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4227. icnss_pr_err("Ignore runtime resume\n");
  4228. goto out;
  4229. }
  4230. if (priv->magic != ICNSS_MAGIC) {
  4231. icnss_pr_err("Invalid drvdata for runtime resume: dev %pK, data %pK, magic 0x%x\n",
  4232. dev, priv, priv->magic);
  4233. return -EINVAL;
  4234. }
  4235. if (!priv->ops || !priv->ops->runtime_resume ||
  4236. IS_ERR(priv->smp2p_info[ICNSS_SMP2P_OUT_POWER_SAVE].smem_state))
  4237. goto out;
  4238. icnss_pr_vdbg("Runtime resume, state: 0x%lx\n", priv->state);
  4239. ret = priv->ops->runtime_resume(dev);
  4240. out:
  4241. return ret;
  4242. }
  4243. static int icnss_pm_runtime_idle(struct device *dev)
  4244. {
  4245. struct icnss_priv *priv = dev_get_drvdata(dev);
  4246. if (priv->device_id == ADRASTEA_DEVICE_ID) {
  4247. icnss_pr_err("Ignore runtime idle\n");
  4248. goto out;
  4249. }
  4250. icnss_pr_vdbg("Runtime idle\n");
  4251. pm_request_autosuspend(dev);
  4252. out:
  4253. return -EBUSY;
  4254. }
  4255. #endif
  4256. static const struct dev_pm_ops icnss_pm_ops = {
  4257. SET_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend,
  4258. icnss_pm_resume)
  4259. SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(icnss_pm_suspend_noirq,
  4260. icnss_pm_resume_noirq)
  4261. SET_RUNTIME_PM_OPS(icnss_pm_runtime_suspend, icnss_pm_runtime_resume,
  4262. icnss_pm_runtime_idle)
  4263. };
  4264. static struct platform_driver icnss_driver = {
  4265. .probe = icnss_probe,
  4266. .remove = icnss_remove,
  4267. .driver = {
  4268. .name = "icnss2",
  4269. .pm = &icnss_pm_ops,
  4270. .of_match_table = icnss_dt_match,
  4271. },
  4272. };
  4273. static int __init icnss_initialize(void)
  4274. {
  4275. icnss_debug_init();
  4276. return platform_driver_register(&icnss_driver);
  4277. }
  4278. static void __exit icnss_exit(void)
  4279. {
  4280. platform_driver_unregister(&icnss_driver);
  4281. icnss_debug_deinit();
  4282. }
  4283. module_init(icnss_initialize);
  4284. module_exit(icnss_exit);
  4285. MODULE_LICENSE("GPL v2");
  4286. MODULE_DESCRIPTION("iWCN CORE platform driver");