sm6150.c 241 KB

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  1. /*
  2. * Copyright (c) 2018, The Linux Foundation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 and
  6. * only version 2 as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/gpio.h>
  16. #include <linux/of_gpio.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/slab.h>
  19. #include <linux/io.h>
  20. #include <linux/module.h>
  21. #include <linux/input.h>
  22. #include <linux/of_device.h>
  23. #include <linux/pm_qos.h>
  24. #include <linux/soc/qcom/fsa4480-i2c.h>
  25. #include <sound/core.h>
  26. #include <sound/soc.h>
  27. #include <sound/soc-dapm.h>
  28. #include <sound/pcm.h>
  29. #include <sound/pcm_params.h>
  30. #include <sound/info.h>
  31. #include <soc/snd_event.h>
  32. #include <soc/qcom/socinfo.h>
  33. #include <dsp/q6afe-v2.h>
  34. #include <dsp/q6core.h>
  35. #include "device_event.h"
  36. #include "msm-pcm-routing-v2.h"
  37. #include "codecs/msm-cdc-pinctrl.h"
  38. #include "codecs/wcd934x/wcd934x.h"
  39. #include "codecs/wcd934x/wcd934x-mbhc.h"
  40. #include "codecs/wcd937x/wcd937x-mbhc.h"
  41. #include "codecs/wsa881x.h"
  42. #include "codecs/bolero/bolero-cdc.h"
  43. #include <dt-bindings/sound/audio-codec-port-types.h>
  44. #include "codecs/bolero/wsa-macro.h"
  45. #include "codecs/wcd937x/wcd937x.h"
  46. #define DRV_NAME "sm6150-asoc-snd"
  47. #define __CHIPSET__ "SM6150 "
  48. #define MSM_DAILINK_NAME(name) (__CHIPSET__#name)
  49. #define SAMPLING_RATE_8KHZ 8000
  50. #define SAMPLING_RATE_11P025KHZ 11025
  51. #define SAMPLING_RATE_16KHZ 16000
  52. #define SAMPLING_RATE_22P05KHZ 22050
  53. #define SAMPLING_RATE_32KHZ 32000
  54. #define SAMPLING_RATE_44P1KHZ 44100
  55. #define SAMPLING_RATE_48KHZ 48000
  56. #define SAMPLING_RATE_88P2KHZ 88200
  57. #define SAMPLING_RATE_96KHZ 96000
  58. #define SAMPLING_RATE_176P4KHZ 176400
  59. #define SAMPLING_RATE_192KHZ 192000
  60. #define SAMPLING_RATE_352P8KHZ 352800
  61. #define SAMPLING_RATE_384KHZ 384000
  62. #define WCD9XXX_MBHC_DEF_BUTTONS 8
  63. #define WCD9XXX_MBHC_DEF_RLOADS 5
  64. #define CODEC_EXT_CLK_RATE 9600000
  65. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  66. #define DEV_NAME_STR_LEN 32
  67. #define WSA8810_NAME_1 "wsa881x.20170211"
  68. #define WSA8810_NAME_2 "wsa881x.20170212"
  69. #define WCN_CDC_SLIM_RX_CH_MAX 2
  70. #define WCN_CDC_SLIM_TX_CH_MAX 3
  71. #define TDM_CHANNEL_MAX 8
  72. #define ADSP_STATE_READY_TIMEOUT_MS 3000
  73. #define MSM_LL_QOS_VALUE 300 /* time in us to ensure LPM doesn't go in C3/C4 */
  74. #define MSM_HIFI_ON 1
  75. #define SM6150_SOC_VERSION_1_0 0x00010000
  76. #define SM6150_SOC_MSM_ID 0x163
  77. enum {
  78. SLIM_RX_0 = 0,
  79. SLIM_RX_1,
  80. SLIM_RX_2,
  81. SLIM_RX_3,
  82. SLIM_RX_4,
  83. SLIM_RX_5,
  84. SLIM_RX_6,
  85. SLIM_RX_7,
  86. SLIM_RX_MAX,
  87. };
  88. enum {
  89. SLIM_TX_0 = 0,
  90. SLIM_TX_1,
  91. SLIM_TX_2,
  92. SLIM_TX_3,
  93. SLIM_TX_4,
  94. SLIM_TX_5,
  95. SLIM_TX_6,
  96. SLIM_TX_7,
  97. SLIM_TX_8,
  98. SLIM_TX_MAX,
  99. };
  100. enum {
  101. PRIM_MI2S = 0,
  102. SEC_MI2S,
  103. TERT_MI2S,
  104. QUAT_MI2S,
  105. QUIN_MI2S,
  106. MI2S_MAX,
  107. };
  108. enum {
  109. PRIM_AUX_PCM = 0,
  110. SEC_AUX_PCM,
  111. TERT_AUX_PCM,
  112. QUAT_AUX_PCM,
  113. QUIN_AUX_PCM,
  114. AUX_PCM_MAX,
  115. };
  116. enum {
  117. WSA_CDC_DMA_RX_0 = 0,
  118. WSA_CDC_DMA_RX_1,
  119. RX_CDC_DMA_RX_0,
  120. RX_CDC_DMA_RX_1,
  121. RX_CDC_DMA_RX_2,
  122. RX_CDC_DMA_RX_3,
  123. RX_CDC_DMA_RX_5,
  124. CDC_DMA_RX_MAX,
  125. };
  126. enum {
  127. WSA_CDC_DMA_TX_0 = 0,
  128. WSA_CDC_DMA_TX_1,
  129. WSA_CDC_DMA_TX_2,
  130. TX_CDC_DMA_TX_0,
  131. TX_CDC_DMA_TX_3,
  132. TX_CDC_DMA_TX_4,
  133. CDC_DMA_TX_MAX,
  134. };
  135. struct mi2s_conf {
  136. struct mutex lock;
  137. u32 ref_cnt;
  138. u32 msm_is_mi2s_master;
  139. };
  140. static u32 mi2s_ebit_clk[MI2S_MAX] = {
  141. Q6AFE_LPASS_CLK_ID_PRI_MI2S_EBIT,
  142. Q6AFE_LPASS_CLK_ID_SEC_MI2S_EBIT,
  143. Q6AFE_LPASS_CLK_ID_TER_MI2S_EBIT,
  144. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_EBIT,
  145. Q6AFE_LPASS_CLK_ID_QUI_MI2S_EBIT
  146. };
  147. struct dev_config {
  148. u32 sample_rate;
  149. u32 bit_format;
  150. u32 channels;
  151. };
  152. enum {
  153. DP_RX_IDX = 0,
  154. EXT_DISP_RX_IDX_MAX,
  155. };
  156. struct msm_wsa881x_dev_info {
  157. struct device_node *of_node;
  158. u32 index;
  159. };
  160. struct aux_codec_dev_info {
  161. struct device_node *of_node;
  162. u32 index;
  163. };
  164. enum pinctrl_pin_state {
  165. STATE_DISABLE = 0, /* All pins are in sleep state */
  166. STATE_MI2S_ACTIVE, /* I2S = active, TDM = sleep */
  167. STATE_TDM_ACTIVE, /* I2S = sleep, TDM = active */
  168. };
  169. struct msm_pinctrl_info {
  170. struct pinctrl *pinctrl;
  171. struct pinctrl_state *mi2s_disable;
  172. struct pinctrl_state *tdm_disable;
  173. struct pinctrl_state *mi2s_active;
  174. struct pinctrl_state *tdm_active;
  175. enum pinctrl_pin_state curr_state;
  176. };
  177. struct msm_asoc_mach_data {
  178. struct snd_info_entry *codec_root;
  179. struct msm_pinctrl_info pinctrl_info;
  180. int usbc_en2_gpio; /* used by gpio driver API */
  181. struct device_node *dmic01_gpio_p; /* used by pinctrl API */
  182. struct device_node *dmic23_gpio_p; /* used by pinctrl API */
  183. struct device_node *us_euro_gpio_p; /* used by pinctrl API */
  184. struct pinctrl *usbc_en2_gpio_p; /* used by pinctrl API */
  185. struct device_node *hph_en1_gpio_p; /* used by pinctrl API */
  186. struct device_node *hph_en0_gpio_p; /* used by pinctrl API */
  187. bool is_afe_config_done;
  188. struct device_node *fsa_handle;
  189. };
  190. struct msm_asoc_wcd93xx_codec {
  191. void* (*get_afe_config_fn)(struct snd_soc_codec *codec,
  192. enum afe_config_type config_type);
  193. };
  194. static const char *const pin_states[] = {"sleep", "i2s-active",
  195. "tdm-active"};
  196. static struct snd_soc_card snd_soc_card_sm6150_msm;
  197. enum {
  198. TDM_0 = 0,
  199. TDM_1,
  200. TDM_2,
  201. TDM_3,
  202. TDM_4,
  203. TDM_5,
  204. TDM_6,
  205. TDM_7,
  206. TDM_PORT_MAX,
  207. };
  208. enum {
  209. TDM_PRI = 0,
  210. TDM_SEC,
  211. TDM_TERT,
  212. TDM_QUAT,
  213. TDM_QUIN,
  214. TDM_INTERFACE_MAX,
  215. };
  216. struct tdm_port {
  217. u32 mode;
  218. u32 channel;
  219. };
  220. /* TDM default config */
  221. static struct dev_config tdm_rx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  222. { /* PRI TDM */
  223. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  224. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  225. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  226. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  227. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  228. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  229. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  230. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  231. },
  232. { /* SEC TDM */
  233. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  234. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  235. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  236. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  237. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  238. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  239. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  240. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  241. },
  242. { /* TERT TDM */
  243. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  244. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  245. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  246. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  247. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  248. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  249. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  250. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  251. },
  252. { /* QUAT TDM */
  253. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  254. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  255. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  256. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  257. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  258. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  259. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  260. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  261. },
  262. { /* QUIN TDM */
  263. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_0 */
  264. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_1 */
  265. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_2 */
  266. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_3 */
  267. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_4 */
  268. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_5 */
  269. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_6 */
  270. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* RX_7 */
  271. }
  272. };
  273. /* TDM default config */
  274. static struct dev_config tdm_tx_cfg[TDM_INTERFACE_MAX][TDM_PORT_MAX] = {
  275. { /* PRI TDM */
  276. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  277. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  278. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  279. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  280. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  281. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  282. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  283. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  284. },
  285. { /* SEC TDM */
  286. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  287. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  288. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  289. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  290. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  291. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  292. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  293. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  294. },
  295. { /* TERT TDM */
  296. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  297. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  298. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  299. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  300. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  301. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  302. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  303. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  304. },
  305. { /* QUAT TDM */
  306. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  307. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  308. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  309. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  310. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  311. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  312. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  313. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  314. },
  315. { /* QUIN TDM */
  316. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_0 */
  317. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_1 */
  318. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_2 */
  319. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_3 */
  320. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_4 */
  321. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_5 */
  322. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_6 */
  323. {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1}, /* TX_7 */
  324. }
  325. };
  326. /* Default configuration of slimbus channels */
  327. static struct dev_config slim_rx_cfg[] = {
  328. [SLIM_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  329. [SLIM_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  330. [SLIM_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  331. [SLIM_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  332. [SLIM_RX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  333. [SLIM_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  334. [SLIM_RX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  335. [SLIM_RX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  336. };
  337. static struct dev_config slim_tx_cfg[] = {
  338. [SLIM_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  339. [SLIM_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  340. [SLIM_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  341. [SLIM_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  342. [SLIM_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  343. [SLIM_TX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  344. [SLIM_TX_6] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  345. [SLIM_TX_7] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  346. [SLIM_TX_8] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  347. };
  348. /* Default configuration of Codec DMA Interface Tx */
  349. static struct dev_config cdc_dma_rx_cfg[] = {
  350. [WSA_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  351. [WSA_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  352. [RX_CDC_DMA_RX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  353. [RX_CDC_DMA_RX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  354. [RX_CDC_DMA_RX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  355. [RX_CDC_DMA_RX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  356. [RX_CDC_DMA_RX_5] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  357. };
  358. /* Default configuration of Codec DMA Interface Rx */
  359. static struct dev_config cdc_dma_tx_cfg[] = {
  360. [WSA_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  361. [WSA_CDC_DMA_TX_1] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  362. [WSA_CDC_DMA_TX_2] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  363. [TX_CDC_DMA_TX_0] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  364. [TX_CDC_DMA_TX_3] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  365. [TX_CDC_DMA_TX_4] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  366. };
  367. /* Default configuration of external display BE */
  368. static struct dev_config ext_disp_rx_cfg[] = {
  369. [DP_RX_IDX] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  370. };
  371. static struct dev_config usb_rx_cfg = {
  372. .sample_rate = SAMPLING_RATE_48KHZ,
  373. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  374. .channels = 2,
  375. };
  376. static struct dev_config usb_tx_cfg = {
  377. .sample_rate = SAMPLING_RATE_48KHZ,
  378. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  379. .channels = 1,
  380. };
  381. static struct dev_config proxy_rx_cfg = {
  382. .sample_rate = SAMPLING_RATE_48KHZ,
  383. .bit_format = SNDRV_PCM_FORMAT_S16_LE,
  384. .channels = 2,
  385. };
  386. /* Default configuration of MI2S channels */
  387. static struct dev_config mi2s_rx_cfg[] = {
  388. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  389. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  390. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  391. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  392. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 2},
  393. };
  394. static struct dev_config mi2s_tx_cfg[] = {
  395. [PRIM_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  396. [SEC_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  397. [TERT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  398. [QUAT_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  399. [QUIN_MI2S] = {SAMPLING_RATE_48KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  400. };
  401. static struct dev_config aux_pcm_rx_cfg[] = {
  402. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  403. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  404. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  405. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  406. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  407. };
  408. static struct dev_config aux_pcm_tx_cfg[] = {
  409. [PRIM_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  410. [SEC_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  411. [TERT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  412. [QUAT_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  413. [QUIN_AUX_PCM] = {SAMPLING_RATE_8KHZ, SNDRV_PCM_FORMAT_S16_LE, 1},
  414. };
  415. static int msm_vi_feed_tx_ch = 2;
  416. static const char *const slim_rx_ch_text[] = {"One", "Two"};
  417. static const char *const slim_tx_ch_text[] = {"One", "Two", "Three", "Four",
  418. "Five", "Six", "Seven",
  419. "Eight"};
  420. static const char *const vi_feed_ch_text[] = {"One", "Two"};
  421. static char const *bit_format_text[] = {"S16_LE", "S24_LE", "S24_3LE",
  422. "S32_LE"};
  423. static char const *ext_disp_bit_format_text[] = {"S16_LE", "S24_LE",
  424. "S24_3LE"};
  425. static char const *slim_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  426. "KHZ_32", "KHZ_44P1", "KHZ_48",
  427. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  428. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  429. static char const *bt_sample_rate_text[] = {"KHZ_8", "KHZ_16",
  430. "KHZ_44P1", "KHZ_48",
  431. "KHZ_88P2", "KHZ_96"};
  432. static char const *bt_sample_rate_rx_text[] = {"KHZ_8", "KHZ_16",
  433. "KHZ_44P1", "KHZ_48",
  434. "KHZ_88P2", "KHZ_96"};
  435. static char const *bt_sample_rate_tx_text[] = {"KHZ_8", "KHZ_16",
  436. "KHZ_44P1", "KHZ_48",
  437. "KHZ_88P2", "KHZ_96"};
  438. static const char *const usb_ch_text[] = {"One", "Two", "Three", "Four",
  439. "Five", "Six", "Seven",
  440. "Eight"};
  441. static char const *ch_text[] = {"Two", "Three", "Four", "Five",
  442. "Six", "Seven", "Eight"};
  443. static char const *usb_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  444. "KHZ_16", "KHZ_22P05",
  445. "KHZ_32", "KHZ_44P1", "KHZ_48",
  446. "KHZ_88P2", "KHZ_96", "KHZ_176P4",
  447. "KHZ_192", "KHZ_352P8", "KHZ_384"};
  448. static char const *ext_disp_sample_rate_text[] = {"KHZ_48", "KHZ_96",
  449. "KHZ_192", "KHZ_32", "KHZ_44P1",
  450. "KHZ_88P2", "KHZ_176P4" };
  451. static char const *tdm_ch_text[] = {"One", "Two", "Three", "Four",
  452. "Five", "Six", "Seven", "Eight"};
  453. static char const *tdm_bit_format_text[] = {"S16_LE", "S24_LE", "S32_LE"};
  454. static char const *tdm_sample_rate_text[] = {"KHZ_8", "KHZ_16", "KHZ_32",
  455. "KHZ_48", "KHZ_176P4",
  456. "KHZ_352P8"};
  457. static const char *const auxpcm_rate_text[] = {"KHZ_8", "KHZ_16"};
  458. static char const *mi2s_rate_text[] = {"KHZ_8", "KHZ_11P025", "KHZ_16",
  459. "KHZ_22P05", "KHZ_32", "KHZ_44P1",
  460. "KHZ_48", "KHZ_96", "KHZ_192"};
  461. static const char *const mi2s_ch_text[] = {"One", "Two", "Three", "Four",
  462. "Five", "Six", "Seven",
  463. "Eight"};
  464. static const char *const hifi_text[] = {"Off", "On"};
  465. static const char *const qos_text[] = {"Disable", "Enable"};
  466. static const char *const cdc_dma_rx_ch_text[] = {"One", "Two"};
  467. static const char *const cdc_dma_tx_ch_text[] = {"One", "Two", "Three", "Four",
  468. "Five", "Six", "Seven",
  469. "Eight"};
  470. static char const *cdc_dma_sample_rate_text[] = {"KHZ_8", "KHZ_11P025",
  471. "KHZ_16", "KHZ_22P05",
  472. "KHZ_32", "KHZ_44P1", "KHZ_48",
  473. "KHZ_88P2", "KHZ_96",
  474. "KHZ_176P4", "KHZ_192",
  475. "KHZ_352P8", "KHZ_384"};
  476. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_chs, slim_rx_ch_text);
  477. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_chs, slim_rx_ch_text);
  478. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_chs, slim_tx_ch_text);
  479. static SOC_ENUM_SINGLE_EXT_DECL(slim_1_tx_chs, slim_tx_ch_text);
  480. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_chs, slim_rx_ch_text);
  481. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_chs, slim_rx_ch_text);
  482. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_chs, usb_ch_text);
  483. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_chs, usb_ch_text);
  484. static SOC_ENUM_SINGLE_EXT_DECL(vi_feed_tx_chs, vi_feed_ch_text);
  485. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_chs, ch_text);
  486. static SOC_ENUM_SINGLE_EXT_DECL(proxy_rx_chs, ch_text);
  487. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_format, bit_format_text);
  488. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_format, bit_format_text);
  489. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_format, bit_format_text);
  490. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_format, bit_format_text);
  491. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_format, bit_format_text);
  492. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_format, bit_format_text);
  493. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_format, ext_disp_bit_format_text);
  494. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_rx_sample_rate, slim_sample_rate_text);
  495. static SOC_ENUM_SINGLE_EXT_DECL(slim_2_rx_sample_rate, slim_sample_rate_text);
  496. static SOC_ENUM_SINGLE_EXT_DECL(slim_0_tx_sample_rate, slim_sample_rate_text);
  497. static SOC_ENUM_SINGLE_EXT_DECL(slim_5_rx_sample_rate, slim_sample_rate_text);
  498. static SOC_ENUM_SINGLE_EXT_DECL(slim_6_rx_sample_rate, slim_sample_rate_text);
  499. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate, bt_sample_rate_text);
  500. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_rx, bt_sample_rate_rx_text);
  501. static SOC_ENUM_SINGLE_EXT_DECL(bt_sample_rate_tx, bt_sample_rate_tx_text);
  502. static SOC_ENUM_SINGLE_EXT_DECL(usb_rx_sample_rate, usb_sample_rate_text);
  503. static SOC_ENUM_SINGLE_EXT_DECL(usb_tx_sample_rate, usb_sample_rate_text);
  504. static SOC_ENUM_SINGLE_EXT_DECL(ext_disp_rx_sample_rate,
  505. ext_disp_sample_rate_text);
  506. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_chs, tdm_ch_text);
  507. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_format, tdm_bit_format_text);
  508. static SOC_ENUM_SINGLE_EXT_DECL(tdm_tx_sample_rate, tdm_sample_rate_text);
  509. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_chs, tdm_ch_text);
  510. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_format, tdm_bit_format_text);
  511. static SOC_ENUM_SINGLE_EXT_DECL(tdm_rx_sample_rate, tdm_sample_rate_text);
  512. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  513. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  514. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  515. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  516. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_rx_sample_rate, auxpcm_rate_text);
  517. static SOC_ENUM_SINGLE_EXT_DECL(prim_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  518. static SOC_ENUM_SINGLE_EXT_DECL(sec_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  519. static SOC_ENUM_SINGLE_EXT_DECL(tert_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  520. static SOC_ENUM_SINGLE_EXT_DECL(quat_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  521. static SOC_ENUM_SINGLE_EXT_DECL(quin_aux_pcm_tx_sample_rate, auxpcm_rate_text);
  522. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_sample_rate, mi2s_rate_text);
  523. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_sample_rate, mi2s_rate_text);
  524. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_sample_rate, mi2s_rate_text);
  525. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_sample_rate, mi2s_rate_text);
  526. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_sample_rate, mi2s_rate_text);
  527. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_sample_rate, mi2s_rate_text);
  528. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_sample_rate, mi2s_rate_text);
  529. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_sample_rate, mi2s_rate_text);
  530. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_sample_rate, mi2s_rate_text);
  531. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_sample_rate, mi2s_rate_text);
  532. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_rx_chs, mi2s_ch_text);
  533. static SOC_ENUM_SINGLE_EXT_DECL(prim_mi2s_tx_chs, mi2s_ch_text);
  534. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_rx_chs, mi2s_ch_text);
  535. static SOC_ENUM_SINGLE_EXT_DECL(sec_mi2s_tx_chs, mi2s_ch_text);
  536. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_rx_chs, mi2s_ch_text);
  537. static SOC_ENUM_SINGLE_EXT_DECL(tert_mi2s_tx_chs, mi2s_ch_text);
  538. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_rx_chs, mi2s_ch_text);
  539. static SOC_ENUM_SINGLE_EXT_DECL(quat_mi2s_tx_chs, mi2s_ch_text);
  540. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_rx_chs, mi2s_ch_text);
  541. static SOC_ENUM_SINGLE_EXT_DECL(quin_mi2s_tx_chs, mi2s_ch_text);
  542. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_rx_format, bit_format_text);
  543. static SOC_ENUM_SINGLE_EXT_DECL(mi2s_tx_format, bit_format_text);
  544. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_rx_format, bit_format_text);
  545. static SOC_ENUM_SINGLE_EXT_DECL(aux_pcm_tx_format, bit_format_text);
  546. static SOC_ENUM_SINGLE_EXT_DECL(hifi_function, hifi_text);
  547. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  548. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  549. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_chs, cdc_dma_rx_ch_text);
  550. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_chs, cdc_dma_rx_ch_text);
  551. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_chs, cdc_dma_rx_ch_text);
  552. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_chs, cdc_dma_rx_ch_text);
  553. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_chs, cdc_dma_rx_ch_text);
  554. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  555. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_chs, cdc_dma_tx_ch_text);
  556. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_chs, cdc_dma_tx_ch_text);
  557. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_chs, cdc_dma_tx_ch_text);
  558. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_chs, cdc_dma_tx_ch_text);
  559. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_chs, cdc_dma_tx_ch_text);
  560. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_format, bit_format_text);
  561. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_format, bit_format_text);
  562. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_format, bit_format_text);
  563. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_format, bit_format_text);
  564. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_format, bit_format_text);
  565. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_format, bit_format_text);
  566. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_format, bit_format_text);
  567. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_format, bit_format_text);
  568. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_format, bit_format_text);
  569. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_format, bit_format_text);
  570. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_format, bit_format_text);
  571. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_format, bit_format_text);
  572. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_0_sample_rate,
  573. cdc_dma_sample_rate_text);
  574. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_rx_1_sample_rate,
  575. cdc_dma_sample_rate_text);
  576. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_0_sample_rate,
  577. cdc_dma_sample_rate_text);
  578. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_1_sample_rate,
  579. cdc_dma_sample_rate_text);
  580. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_2_sample_rate,
  581. cdc_dma_sample_rate_text);
  582. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_3_sample_rate,
  583. cdc_dma_sample_rate_text);
  584. static SOC_ENUM_SINGLE_EXT_DECL(rx_cdc_dma_rx_5_sample_rate,
  585. cdc_dma_sample_rate_text);
  586. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_0_sample_rate,
  587. cdc_dma_sample_rate_text);
  588. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_1_sample_rate,
  589. cdc_dma_sample_rate_text);
  590. static SOC_ENUM_SINGLE_EXT_DECL(wsa_cdc_dma_tx_2_sample_rate,
  591. cdc_dma_sample_rate_text);
  592. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_0_sample_rate,
  593. cdc_dma_sample_rate_text);
  594. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_3_sample_rate,
  595. cdc_dma_sample_rate_text);
  596. static SOC_ENUM_SINGLE_EXT_DECL(tx_cdc_dma_tx_4_sample_rate,
  597. cdc_dma_sample_rate_text);
  598. static int msm_hifi_control;
  599. static bool codec_reg_done;
  600. static struct snd_soc_aux_dev *msm_aux_dev;
  601. static struct snd_soc_codec_conf *msm_codec_conf;
  602. static struct msm_asoc_wcd93xx_codec msm_codec_fn;
  603. static int dmic_0_1_gpio_cnt;
  604. static int dmic_2_3_gpio_cnt;
  605. static void *def_wcd_mbhc_cal(void);
  606. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  607. int enable, bool dapm);
  608. static int msm_wsa881x_init(struct snd_soc_component *component);
  609. static int msm_aux_codec_init(struct snd_soc_component *component);
  610. /*
  611. * Need to report LINEIN
  612. * if R/L channel impedance is larger than 5K ohm
  613. */
  614. static struct wcd_mbhc_config wcd_mbhc_cfg = {
  615. .read_fw_bin = false,
  616. .calibration = NULL,
  617. .detect_extn_cable = true,
  618. .mono_stero_detection = false,
  619. .swap_gnd_mic = NULL,
  620. .hs_ext_micbias = true,
  621. .key_code[0] = KEY_MEDIA,
  622. .key_code[1] = KEY_VOICECOMMAND,
  623. .key_code[2] = KEY_VOLUMEUP,
  624. .key_code[3] = KEY_VOLUMEDOWN,
  625. .key_code[4] = 0,
  626. .key_code[5] = 0,
  627. .key_code[6] = 0,
  628. .key_code[7] = 0,
  629. .linein_th = 5000,
  630. .moisture_en = true,
  631. .mbhc_micbias = MIC_BIAS_2,
  632. .anc_micbias = MIC_BIAS_2,
  633. .enable_anc_mic_detect = false,
  634. };
  635. static struct snd_soc_dapm_route wcd_audio_paths_tavil[] = {
  636. {"MIC BIAS1", NULL, "MCLK TX"},
  637. {"MIC BIAS2", NULL, "MCLK TX"},
  638. {"MIC BIAS3", NULL, "MCLK TX"},
  639. {"MIC BIAS4", NULL, "MCLK TX"},
  640. };
  641. static struct afe_clk_set mi2s_clk[MI2S_MAX] = {
  642. {
  643. AFE_API_VERSION_I2S_CONFIG,
  644. Q6AFE_LPASS_CLK_ID_PRI_MI2S_IBIT,
  645. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  646. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  647. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  648. 0,
  649. },
  650. {
  651. AFE_API_VERSION_I2S_CONFIG,
  652. Q6AFE_LPASS_CLK_ID_SEC_MI2S_IBIT,
  653. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  654. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  655. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  656. 0,
  657. },
  658. {
  659. AFE_API_VERSION_I2S_CONFIG,
  660. Q6AFE_LPASS_CLK_ID_TER_MI2S_IBIT,
  661. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  662. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  663. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  664. 0,
  665. },
  666. {
  667. AFE_API_VERSION_I2S_CONFIG,
  668. Q6AFE_LPASS_CLK_ID_QUAD_MI2S_IBIT,
  669. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  670. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  671. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  672. 0,
  673. },
  674. {
  675. AFE_API_VERSION_I2S_CONFIG,
  676. Q6AFE_LPASS_CLK_ID_QUI_MI2S_IBIT,
  677. Q6AFE_LPASS_IBIT_CLK_1_P536_MHZ,
  678. Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO,
  679. Q6AFE_LPASS_CLK_ROOT_DEFAULT,
  680. 0,
  681. }
  682. };
  683. static struct mi2s_conf mi2s_intf_conf[MI2S_MAX];
  684. static int slim_get_sample_rate_val(int sample_rate)
  685. {
  686. int sample_rate_val = 0;
  687. switch (sample_rate) {
  688. case SAMPLING_RATE_8KHZ:
  689. sample_rate_val = 0;
  690. break;
  691. case SAMPLING_RATE_16KHZ:
  692. sample_rate_val = 1;
  693. break;
  694. case SAMPLING_RATE_32KHZ:
  695. sample_rate_val = 2;
  696. break;
  697. case SAMPLING_RATE_44P1KHZ:
  698. sample_rate_val = 3;
  699. break;
  700. case SAMPLING_RATE_48KHZ:
  701. sample_rate_val = 4;
  702. break;
  703. case SAMPLING_RATE_88P2KHZ:
  704. sample_rate_val = 5;
  705. break;
  706. case SAMPLING_RATE_96KHZ:
  707. sample_rate_val = 6;
  708. break;
  709. case SAMPLING_RATE_176P4KHZ:
  710. sample_rate_val = 7;
  711. break;
  712. case SAMPLING_RATE_192KHZ:
  713. sample_rate_val = 8;
  714. break;
  715. case SAMPLING_RATE_352P8KHZ:
  716. sample_rate_val = 9;
  717. break;
  718. case SAMPLING_RATE_384KHZ:
  719. sample_rate_val = 10;
  720. break;
  721. default:
  722. sample_rate_val = 4;
  723. break;
  724. }
  725. return sample_rate_val;
  726. }
  727. static int slim_get_sample_rate(int value)
  728. {
  729. int sample_rate = 0;
  730. switch (value) {
  731. case 0:
  732. sample_rate = SAMPLING_RATE_8KHZ;
  733. break;
  734. case 1:
  735. sample_rate = SAMPLING_RATE_16KHZ;
  736. break;
  737. case 2:
  738. sample_rate = SAMPLING_RATE_32KHZ;
  739. break;
  740. case 3:
  741. sample_rate = SAMPLING_RATE_44P1KHZ;
  742. break;
  743. case 4:
  744. sample_rate = SAMPLING_RATE_48KHZ;
  745. break;
  746. case 5:
  747. sample_rate = SAMPLING_RATE_88P2KHZ;
  748. break;
  749. case 6:
  750. sample_rate = SAMPLING_RATE_96KHZ;
  751. break;
  752. case 7:
  753. sample_rate = SAMPLING_RATE_176P4KHZ;
  754. break;
  755. case 8:
  756. sample_rate = SAMPLING_RATE_192KHZ;
  757. break;
  758. case 9:
  759. sample_rate = SAMPLING_RATE_352P8KHZ;
  760. break;
  761. case 10:
  762. sample_rate = SAMPLING_RATE_384KHZ;
  763. break;
  764. default:
  765. sample_rate = SAMPLING_RATE_48KHZ;
  766. break;
  767. }
  768. return sample_rate;
  769. }
  770. static int slim_get_bit_format_val(int bit_format)
  771. {
  772. int val = 0;
  773. switch (bit_format) {
  774. case SNDRV_PCM_FORMAT_S32_LE:
  775. val = 3;
  776. break;
  777. case SNDRV_PCM_FORMAT_S24_3LE:
  778. val = 2;
  779. break;
  780. case SNDRV_PCM_FORMAT_S24_LE:
  781. val = 1;
  782. break;
  783. case SNDRV_PCM_FORMAT_S16_LE:
  784. default:
  785. val = 0;
  786. break;
  787. }
  788. return val;
  789. }
  790. static int slim_get_bit_format(int val)
  791. {
  792. int bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  793. switch (val) {
  794. case 0:
  795. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  796. break;
  797. case 1:
  798. bit_fmt = SNDRV_PCM_FORMAT_S24_LE;
  799. break;
  800. case 2:
  801. bit_fmt = SNDRV_PCM_FORMAT_S24_3LE;
  802. break;
  803. case 3:
  804. bit_fmt = SNDRV_PCM_FORMAT_S32_LE;
  805. break;
  806. default:
  807. bit_fmt = SNDRV_PCM_FORMAT_S16_LE;
  808. break;
  809. }
  810. return bit_fmt;
  811. }
  812. static int slim_get_port_idx(struct snd_kcontrol *kcontrol)
  813. {
  814. int port_id = 0;
  815. if (strnstr(kcontrol->id.name, "SLIM_0_RX", sizeof("SLIM_0_RX"))) {
  816. port_id = SLIM_RX_0;
  817. } else if (strnstr(kcontrol->id.name,
  818. "SLIM_2_RX", sizeof("SLIM_2_RX"))) {
  819. port_id = SLIM_RX_2;
  820. } else if (strnstr(kcontrol->id.name,
  821. "SLIM_5_RX", sizeof("SLIM_5_RX"))) {
  822. port_id = SLIM_RX_5;
  823. } else if (strnstr(kcontrol->id.name,
  824. "SLIM_6_RX", sizeof("SLIM_6_RX"))) {
  825. port_id = SLIM_RX_6;
  826. } else if (strnstr(kcontrol->id.name,
  827. "SLIM_0_TX", sizeof("SLIM_0_TX"))) {
  828. port_id = SLIM_TX_0;
  829. } else if (strnstr(kcontrol->id.name,
  830. "SLIM_1_TX", sizeof("SLIM_1_TX"))) {
  831. port_id = SLIM_TX_1;
  832. } else {
  833. pr_err("%s: unsupported channel: %s\n",
  834. __func__, kcontrol->id.name);
  835. return -EINVAL;
  836. }
  837. return port_id;
  838. }
  839. static int slim_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  840. struct snd_ctl_elem_value *ucontrol)
  841. {
  842. int ch_num = slim_get_port_idx(kcontrol);
  843. if (ch_num < 0)
  844. return ch_num;
  845. ucontrol->value.enumerated.item[0] =
  846. slim_get_sample_rate_val(slim_rx_cfg[ch_num].sample_rate);
  847. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  848. ch_num, slim_rx_cfg[ch_num].sample_rate,
  849. ucontrol->value.enumerated.item[0]);
  850. return 0;
  851. }
  852. static int slim_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  853. struct snd_ctl_elem_value *ucontrol)
  854. {
  855. int ch_num = slim_get_port_idx(kcontrol);
  856. if (ch_num < 0)
  857. return ch_num;
  858. slim_rx_cfg[ch_num].sample_rate =
  859. slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  860. pr_debug("%s: slim[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  861. ch_num, slim_rx_cfg[ch_num].sample_rate,
  862. ucontrol->value.enumerated.item[0]);
  863. return 0;
  864. }
  865. static int slim_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  866. struct snd_ctl_elem_value *ucontrol)
  867. {
  868. int ch_num = slim_get_port_idx(kcontrol);
  869. if (ch_num < 0)
  870. return ch_num;
  871. ucontrol->value.enumerated.item[0] =
  872. slim_get_sample_rate_val(slim_tx_cfg[ch_num].sample_rate);
  873. pr_debug("%s: slim[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  874. ch_num, slim_tx_cfg[ch_num].sample_rate,
  875. ucontrol->value.enumerated.item[0]);
  876. return 0;
  877. }
  878. static int slim_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  879. struct snd_ctl_elem_value *ucontrol)
  880. {
  881. int sample_rate = 0;
  882. int ch_num = slim_get_port_idx(kcontrol);
  883. if (ch_num < 0)
  884. return ch_num;
  885. sample_rate = slim_get_sample_rate(ucontrol->value.enumerated.item[0]);
  886. if (sample_rate == SAMPLING_RATE_44P1KHZ) {
  887. pr_err("%s: Unsupported sample rate %d: for Tx path\n",
  888. __func__, sample_rate);
  889. return -EINVAL;
  890. }
  891. slim_tx_cfg[ch_num].sample_rate = sample_rate;
  892. pr_debug("%s: slim[%d]_tx_sample_rate = %d, value = %d\n", __func__,
  893. ch_num, slim_tx_cfg[ch_num].sample_rate,
  894. ucontrol->value.enumerated.item[0]);
  895. return 0;
  896. }
  897. static int slim_rx_bit_format_get(struct snd_kcontrol *kcontrol,
  898. struct snd_ctl_elem_value *ucontrol)
  899. {
  900. int ch_num = slim_get_port_idx(kcontrol);
  901. if (ch_num < 0)
  902. return ch_num;
  903. ucontrol->value.enumerated.item[0] =
  904. slim_get_bit_format_val(slim_rx_cfg[ch_num].bit_format);
  905. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  906. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  907. ucontrol->value.enumerated.item[0]);
  908. return 0;
  909. }
  910. static int slim_rx_bit_format_put(struct snd_kcontrol *kcontrol,
  911. struct snd_ctl_elem_value *ucontrol)
  912. {
  913. int ch_num = slim_get_port_idx(kcontrol);
  914. if (ch_num < 0)
  915. return ch_num;
  916. slim_rx_cfg[ch_num].bit_format =
  917. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  918. pr_debug("%s: slim[%d]_rx_bit_format = %d, ucontrol value = %d\n",
  919. __func__, ch_num, slim_rx_cfg[ch_num].bit_format,
  920. ucontrol->value.enumerated.item[0]);
  921. return 0;
  922. }
  923. static int slim_tx_bit_format_get(struct snd_kcontrol *kcontrol,
  924. struct snd_ctl_elem_value *ucontrol)
  925. {
  926. int ch_num = slim_get_port_idx(kcontrol);
  927. if (ch_num < 0)
  928. return ch_num;
  929. ucontrol->value.enumerated.item[0] =
  930. slim_get_bit_format_val(slim_tx_cfg[ch_num].bit_format);
  931. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  932. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  933. ucontrol->value.enumerated.item[0]);
  934. return 0;
  935. }
  936. static int slim_tx_bit_format_put(struct snd_kcontrol *kcontrol,
  937. struct snd_ctl_elem_value *ucontrol)
  938. {
  939. int ch_num = slim_get_port_idx(kcontrol);
  940. if (ch_num < 0)
  941. return ch_num;
  942. slim_tx_cfg[ch_num].bit_format =
  943. slim_get_bit_format(ucontrol->value.enumerated.item[0]);
  944. pr_debug("%s: slim[%d]_tx_bit_format = %d, ucontrol value = %d\n",
  945. __func__, ch_num, slim_tx_cfg[ch_num].bit_format,
  946. ucontrol->value.enumerated.item[0]);
  947. return 0;
  948. }
  949. static int slim_rx_ch_get(struct snd_kcontrol *kcontrol,
  950. struct snd_ctl_elem_value *ucontrol)
  951. {
  952. int ch_num = slim_get_port_idx(kcontrol);
  953. if (ch_num < 0)
  954. return ch_num;
  955. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  956. ch_num, slim_rx_cfg[ch_num].channels);
  957. ucontrol->value.enumerated.item[0] = slim_rx_cfg[ch_num].channels - 1;
  958. return 0;
  959. }
  960. static int slim_rx_ch_put(struct snd_kcontrol *kcontrol,
  961. struct snd_ctl_elem_value *ucontrol)
  962. {
  963. int ch_num = slim_get_port_idx(kcontrol);
  964. if (ch_num < 0)
  965. return ch_num;
  966. slim_rx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  967. pr_debug("%s: msm_slim_[%d]_rx_ch = %d\n", __func__,
  968. ch_num, slim_rx_cfg[ch_num].channels);
  969. return 1;
  970. }
  971. static int slim_tx_ch_get(struct snd_kcontrol *kcontrol,
  972. struct snd_ctl_elem_value *ucontrol)
  973. {
  974. int ch_num = slim_get_port_idx(kcontrol);
  975. if (ch_num < 0)
  976. return ch_num;
  977. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  978. ch_num, slim_tx_cfg[ch_num].channels);
  979. ucontrol->value.enumerated.item[0] = slim_tx_cfg[ch_num].channels - 1;
  980. return 0;
  981. }
  982. static int slim_tx_ch_put(struct snd_kcontrol *kcontrol,
  983. struct snd_ctl_elem_value *ucontrol)
  984. {
  985. int ch_num = slim_get_port_idx(kcontrol);
  986. if (ch_num < 0)
  987. return ch_num;
  988. slim_tx_cfg[ch_num].channels = ucontrol->value.enumerated.item[0] + 1;
  989. pr_debug("%s: msm_slim_[%d]_tx_ch = %d\n", __func__,
  990. ch_num, slim_tx_cfg[ch_num].channels);
  991. return 1;
  992. }
  993. static int msm_vi_feed_tx_ch_get(struct snd_kcontrol *kcontrol,
  994. struct snd_ctl_elem_value *ucontrol)
  995. {
  996. ucontrol->value.integer.value[0] = msm_vi_feed_tx_ch - 1;
  997. pr_debug("%s: msm_vi_feed_tx_ch = %ld\n", __func__,
  998. ucontrol->value.integer.value[0]);
  999. return 0;
  1000. }
  1001. static int msm_vi_feed_tx_ch_put(struct snd_kcontrol *kcontrol,
  1002. struct snd_ctl_elem_value *ucontrol)
  1003. {
  1004. msm_vi_feed_tx_ch = ucontrol->value.integer.value[0] + 1;
  1005. pr_debug("%s: msm_vi_feed_tx_ch = %d\n", __func__, msm_vi_feed_tx_ch);
  1006. return 1;
  1007. }
  1008. static int msm_bt_sample_rate_get(struct snd_kcontrol *kcontrol,
  1009. struct snd_ctl_elem_value *ucontrol)
  1010. {
  1011. /*
  1012. * Slimbus_7_Rx/Tx sample rate values should always be in sync (same)
  1013. * when used for BT_SCO use case. Return either Rx or Tx sample rate
  1014. * value.
  1015. */
  1016. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1017. case SAMPLING_RATE_96KHZ:
  1018. ucontrol->value.integer.value[0] = 5;
  1019. break;
  1020. case SAMPLING_RATE_88P2KHZ:
  1021. ucontrol->value.integer.value[0] = 4;
  1022. break;
  1023. case SAMPLING_RATE_48KHZ:
  1024. ucontrol->value.integer.value[0] = 3;
  1025. break;
  1026. case SAMPLING_RATE_44P1KHZ:
  1027. ucontrol->value.integer.value[0] = 2;
  1028. break;
  1029. case SAMPLING_RATE_16KHZ:
  1030. ucontrol->value.integer.value[0] = 1;
  1031. break;
  1032. case SAMPLING_RATE_8KHZ:
  1033. default:
  1034. ucontrol->value.integer.value[0] = 0;
  1035. break;
  1036. }
  1037. pr_debug("%s: sample rate = %d\n", __func__,
  1038. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1039. return 0;
  1040. }
  1041. static int msm_bt_sample_rate_put(struct snd_kcontrol *kcontrol,
  1042. struct snd_ctl_elem_value *ucontrol)
  1043. {
  1044. switch (ucontrol->value.integer.value[0]) {
  1045. case 1:
  1046. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1047. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1048. break;
  1049. case 2:
  1050. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1051. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1052. break;
  1053. case 3:
  1054. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1055. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1056. break;
  1057. case 4:
  1058. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1059. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1060. break;
  1061. case 5:
  1062. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1063. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1064. break;
  1065. case 0:
  1066. default:
  1067. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1068. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1069. break;
  1070. }
  1071. pr_debug("%s: sample rates: slim7_rx = %d, slim7_tx = %d, value = %d\n",
  1072. __func__,
  1073. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1074. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1075. ucontrol->value.enumerated.item[0]);
  1076. return 0;
  1077. }
  1078. static int msm_bt_sample_rate_rx_get(struct snd_kcontrol *kcontrol,
  1079. struct snd_ctl_elem_value *ucontrol)
  1080. {
  1081. switch (slim_rx_cfg[SLIM_RX_7].sample_rate) {
  1082. case SAMPLING_RATE_96KHZ:
  1083. ucontrol->value.integer.value[0] = 5;
  1084. break;
  1085. case SAMPLING_RATE_88P2KHZ:
  1086. ucontrol->value.integer.value[0] = 4;
  1087. break;
  1088. case SAMPLING_RATE_48KHZ:
  1089. ucontrol->value.integer.value[0] = 3;
  1090. break;
  1091. case SAMPLING_RATE_44P1KHZ:
  1092. ucontrol->value.integer.value[0] = 2;
  1093. break;
  1094. case SAMPLING_RATE_16KHZ:
  1095. ucontrol->value.integer.value[0] = 1;
  1096. break;
  1097. case SAMPLING_RATE_8KHZ:
  1098. default:
  1099. ucontrol->value.integer.value[0] = 0;
  1100. break;
  1101. }
  1102. pr_debug("%s: sample rate rx = %d", __func__,
  1103. slim_rx_cfg[SLIM_RX_7].sample_rate);
  1104. return 0;
  1105. }
  1106. static int msm_bt_sample_rate_rx_put(struct snd_kcontrol *kcontrol,
  1107. struct snd_ctl_elem_value *ucontrol)
  1108. {
  1109. switch (ucontrol->value.integer.value[0]) {
  1110. case 1:
  1111. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1112. break;
  1113. case 2:
  1114. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1115. break;
  1116. case 3:
  1117. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1118. break;
  1119. case 4:
  1120. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1121. break;
  1122. case 5:
  1123. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1124. break;
  1125. case 0:
  1126. default:
  1127. slim_rx_cfg[SLIM_RX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1128. break;
  1129. }
  1130. pr_debug("%s: sample rate: slim7_rx = %d, value = %d\n",
  1131. __func__,
  1132. slim_rx_cfg[SLIM_RX_7].sample_rate,
  1133. ucontrol->value.enumerated.item[0]);
  1134. return 0;
  1135. }
  1136. static int msm_bt_sample_rate_tx_get(struct snd_kcontrol *kcontrol,
  1137. struct snd_ctl_elem_value *ucontrol)
  1138. {
  1139. switch (slim_tx_cfg[SLIM_TX_7].sample_rate) {
  1140. case SAMPLING_RATE_96KHZ:
  1141. ucontrol->value.integer.value[0] = 5;
  1142. break;
  1143. case SAMPLING_RATE_88P2KHZ:
  1144. ucontrol->value.integer.value[0] = 4;
  1145. break;
  1146. case SAMPLING_RATE_48KHZ:
  1147. ucontrol->value.integer.value[0] = 3;
  1148. break;
  1149. case SAMPLING_RATE_44P1KHZ:
  1150. ucontrol->value.integer.value[0] = 2;
  1151. break;
  1152. case SAMPLING_RATE_16KHZ:
  1153. ucontrol->value.integer.value[0] = 1;
  1154. break;
  1155. case SAMPLING_RATE_8KHZ:
  1156. default:
  1157. ucontrol->value.integer.value[0] = 0;
  1158. break;
  1159. }
  1160. pr_debug("%s: sample rate tx = %d", __func__,
  1161. slim_tx_cfg[SLIM_TX_7].sample_rate);
  1162. return 0;
  1163. }
  1164. static int msm_bt_sample_rate_tx_put(struct snd_kcontrol *kcontrol,
  1165. struct snd_ctl_elem_value *ucontrol)
  1166. {
  1167. switch (ucontrol->value.integer.value[0]) {
  1168. case 1:
  1169. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_16KHZ;
  1170. break;
  1171. case 2:
  1172. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_44P1KHZ;
  1173. break;
  1174. case 3:
  1175. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_48KHZ;
  1176. break;
  1177. case 4:
  1178. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_88P2KHZ;
  1179. break;
  1180. case 5:
  1181. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_96KHZ;
  1182. break;
  1183. case 0:
  1184. default:
  1185. slim_tx_cfg[SLIM_TX_7].sample_rate = SAMPLING_RATE_8KHZ;
  1186. break;
  1187. }
  1188. pr_debug("%s: sample rate: slim7_tx = %d, value = %d\n",
  1189. __func__,
  1190. slim_tx_cfg[SLIM_TX_7].sample_rate,
  1191. ucontrol->value.enumerated.item[0]);
  1192. return 0;
  1193. }
  1194. static int cdc_dma_get_port_idx(struct snd_kcontrol *kcontrol)
  1195. {
  1196. int idx = 0;
  1197. if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_0",
  1198. sizeof("WSA_CDC_DMA_RX_0")))
  1199. idx = WSA_CDC_DMA_RX_0;
  1200. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_RX_1",
  1201. sizeof("WSA_CDC_DMA_RX_0")))
  1202. idx = WSA_CDC_DMA_RX_1;
  1203. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_0",
  1204. sizeof("RX_CDC_DMA_RX_0")))
  1205. idx = RX_CDC_DMA_RX_0;
  1206. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_1",
  1207. sizeof("RX_CDC_DMA_RX_1")))
  1208. idx = RX_CDC_DMA_RX_1;
  1209. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_2",
  1210. sizeof("RX_CDC_DMA_RX_2")))
  1211. idx = RX_CDC_DMA_RX_2;
  1212. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_3",
  1213. sizeof("RX_CDC_DMA_RX_3")))
  1214. idx = RX_CDC_DMA_RX_3;
  1215. else if (strnstr(kcontrol->id.name, "RX_CDC_DMA_RX_5",
  1216. sizeof("RX_CDC_DMA_RX_5")))
  1217. idx = RX_CDC_DMA_RX_5;
  1218. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_0",
  1219. sizeof("WSA_CDC_DMA_TX_0")))
  1220. idx = WSA_CDC_DMA_TX_0;
  1221. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_1",
  1222. sizeof("WSA_CDC_DMA_TX_1")))
  1223. idx = WSA_CDC_DMA_TX_1;
  1224. else if (strnstr(kcontrol->id.name, "WSA_CDC_DMA_TX_2",
  1225. sizeof("WSA_CDC_DMA_TX_2")))
  1226. idx = WSA_CDC_DMA_TX_2;
  1227. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_0",
  1228. sizeof("TX_CDC_DMA_TX_0")))
  1229. idx = TX_CDC_DMA_TX_0;
  1230. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_3",
  1231. sizeof("TX_CDC_DMA_TX_3")))
  1232. idx = TX_CDC_DMA_TX_3;
  1233. else if (strnstr(kcontrol->id.name, "TX_CDC_DMA_TX_4",
  1234. sizeof("TX_CDC_DMA_TX_4")))
  1235. idx = TX_CDC_DMA_TX_4;
  1236. else {
  1237. pr_err("%s: unsupported channel: %s\n",
  1238. __func__, kcontrol->id.name);
  1239. return -EINVAL;
  1240. }
  1241. return idx;
  1242. }
  1243. static int cdc_dma_rx_ch_get(struct snd_kcontrol *kcontrol,
  1244. struct snd_ctl_elem_value *ucontrol)
  1245. {
  1246. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1247. if (ch_num < 0) {
  1248. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1249. return ch_num;
  1250. }
  1251. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1252. cdc_dma_rx_cfg[ch_num].channels - 1);
  1253. ucontrol->value.integer.value[0] = cdc_dma_rx_cfg[ch_num].channels - 1;
  1254. return 0;
  1255. }
  1256. static int cdc_dma_rx_ch_put(struct snd_kcontrol *kcontrol,
  1257. struct snd_ctl_elem_value *ucontrol)
  1258. {
  1259. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1260. if (ch_num < 0) {
  1261. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1262. return ch_num;
  1263. }
  1264. cdc_dma_rx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1265. pr_debug("%s: cdc_dma_rx_ch = %d\n", __func__,
  1266. cdc_dma_rx_cfg[ch_num].channels);
  1267. return 1;
  1268. }
  1269. static int cdc_dma_rx_format_get(struct snd_kcontrol *kcontrol,
  1270. struct snd_ctl_elem_value *ucontrol)
  1271. {
  1272. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1273. if (ch_num < 0) {
  1274. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1275. return ch_num;
  1276. }
  1277. switch (cdc_dma_rx_cfg[ch_num].bit_format) {
  1278. case SNDRV_PCM_FORMAT_S32_LE:
  1279. ucontrol->value.integer.value[0] = 3;
  1280. break;
  1281. case SNDRV_PCM_FORMAT_S24_3LE:
  1282. ucontrol->value.integer.value[0] = 2;
  1283. break;
  1284. case SNDRV_PCM_FORMAT_S24_LE:
  1285. ucontrol->value.integer.value[0] = 1;
  1286. break;
  1287. case SNDRV_PCM_FORMAT_S16_LE:
  1288. default:
  1289. ucontrol->value.integer.value[0] = 0;
  1290. break;
  1291. }
  1292. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1293. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1294. ucontrol->value.integer.value[0]);
  1295. return 0;
  1296. }
  1297. static int cdc_dma_rx_format_put(struct snd_kcontrol *kcontrol,
  1298. struct snd_ctl_elem_value *ucontrol)
  1299. {
  1300. int rc = 0;
  1301. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1302. if (ch_num < 0) {
  1303. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1304. return ch_num;
  1305. }
  1306. switch (ucontrol->value.integer.value[0]) {
  1307. case 3:
  1308. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1309. break;
  1310. case 2:
  1311. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1312. break;
  1313. case 1:
  1314. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1315. break;
  1316. case 0:
  1317. default:
  1318. cdc_dma_rx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1319. break;
  1320. }
  1321. pr_debug("%s: cdc_dma_rx_format = %d, ucontrol value = %ld\n",
  1322. __func__, cdc_dma_rx_cfg[ch_num].bit_format,
  1323. ucontrol->value.integer.value[0]);
  1324. return rc;
  1325. }
  1326. static int cdc_dma_get_sample_rate_val(int sample_rate)
  1327. {
  1328. int sample_rate_val = 0;
  1329. switch (sample_rate) {
  1330. case SAMPLING_RATE_8KHZ:
  1331. sample_rate_val = 0;
  1332. break;
  1333. case SAMPLING_RATE_11P025KHZ:
  1334. sample_rate_val = 1;
  1335. break;
  1336. case SAMPLING_RATE_16KHZ:
  1337. sample_rate_val = 2;
  1338. break;
  1339. case SAMPLING_RATE_22P05KHZ:
  1340. sample_rate_val = 3;
  1341. break;
  1342. case SAMPLING_RATE_32KHZ:
  1343. sample_rate_val = 4;
  1344. break;
  1345. case SAMPLING_RATE_44P1KHZ:
  1346. sample_rate_val = 5;
  1347. break;
  1348. case SAMPLING_RATE_48KHZ:
  1349. sample_rate_val = 6;
  1350. break;
  1351. case SAMPLING_RATE_88P2KHZ:
  1352. sample_rate_val = 7;
  1353. break;
  1354. case SAMPLING_RATE_96KHZ:
  1355. sample_rate_val = 8;
  1356. break;
  1357. case SAMPLING_RATE_176P4KHZ:
  1358. sample_rate_val = 9;
  1359. break;
  1360. case SAMPLING_RATE_192KHZ:
  1361. sample_rate_val = 10;
  1362. break;
  1363. case SAMPLING_RATE_352P8KHZ:
  1364. sample_rate_val = 11;
  1365. break;
  1366. case SAMPLING_RATE_384KHZ:
  1367. sample_rate_val = 12;
  1368. break;
  1369. default:
  1370. sample_rate_val = 6;
  1371. break;
  1372. }
  1373. return sample_rate_val;
  1374. }
  1375. static int cdc_dma_get_sample_rate(int value)
  1376. {
  1377. int sample_rate = 0;
  1378. switch (value) {
  1379. case 0:
  1380. sample_rate = SAMPLING_RATE_8KHZ;
  1381. break;
  1382. case 1:
  1383. sample_rate = SAMPLING_RATE_11P025KHZ;
  1384. break;
  1385. case 2:
  1386. sample_rate = SAMPLING_RATE_16KHZ;
  1387. break;
  1388. case 3:
  1389. sample_rate = SAMPLING_RATE_22P05KHZ;
  1390. break;
  1391. case 4:
  1392. sample_rate = SAMPLING_RATE_32KHZ;
  1393. break;
  1394. case 5:
  1395. sample_rate = SAMPLING_RATE_44P1KHZ;
  1396. break;
  1397. case 6:
  1398. sample_rate = SAMPLING_RATE_48KHZ;
  1399. break;
  1400. case 7:
  1401. sample_rate = SAMPLING_RATE_88P2KHZ;
  1402. break;
  1403. case 8:
  1404. sample_rate = SAMPLING_RATE_96KHZ;
  1405. break;
  1406. case 9:
  1407. sample_rate = SAMPLING_RATE_176P4KHZ;
  1408. break;
  1409. case 10:
  1410. sample_rate = SAMPLING_RATE_192KHZ;
  1411. break;
  1412. case 11:
  1413. sample_rate = SAMPLING_RATE_352P8KHZ;
  1414. break;
  1415. case 12:
  1416. sample_rate = SAMPLING_RATE_384KHZ;
  1417. break;
  1418. default:
  1419. sample_rate = SAMPLING_RATE_48KHZ;
  1420. break;
  1421. }
  1422. return sample_rate;
  1423. }
  1424. static int cdc_dma_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1425. struct snd_ctl_elem_value *ucontrol)
  1426. {
  1427. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1428. if (ch_num < 0) {
  1429. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1430. return ch_num;
  1431. }
  1432. ucontrol->value.enumerated.item[0] =
  1433. cdc_dma_get_sample_rate_val(cdc_dma_rx_cfg[ch_num].sample_rate);
  1434. pr_debug("%s: cdc_dma_rx_sample_rate = %d\n", __func__,
  1435. cdc_dma_rx_cfg[ch_num].sample_rate);
  1436. return 0;
  1437. }
  1438. static int cdc_dma_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1439. struct snd_ctl_elem_value *ucontrol)
  1440. {
  1441. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1442. if (ch_num < 0) {
  1443. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1444. return ch_num;
  1445. }
  1446. cdc_dma_rx_cfg[ch_num].sample_rate =
  1447. cdc_dma_get_sample_rate(ucontrol->value.enumerated.item[0]);
  1448. pr_debug("%s: control value = %d, cdc_dma_rx_sample_rate = %d\n",
  1449. __func__, ucontrol->value.enumerated.item[0],
  1450. cdc_dma_rx_cfg[ch_num].sample_rate);
  1451. return 0;
  1452. }
  1453. static int cdc_dma_tx_ch_get(struct snd_kcontrol *kcontrol,
  1454. struct snd_ctl_elem_value *ucontrol)
  1455. {
  1456. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1457. if (ch_num < 0) {
  1458. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1459. return ch_num;
  1460. }
  1461. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1462. cdc_dma_tx_cfg[ch_num].channels);
  1463. ucontrol->value.integer.value[0] = cdc_dma_tx_cfg[ch_num].channels - 1;
  1464. return 0;
  1465. }
  1466. static int cdc_dma_tx_ch_put(struct snd_kcontrol *kcontrol,
  1467. struct snd_ctl_elem_value *ucontrol)
  1468. {
  1469. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1470. if (ch_num < 0) {
  1471. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1472. return ch_num;
  1473. }
  1474. cdc_dma_tx_cfg[ch_num].channels = ucontrol->value.integer.value[0] + 1;
  1475. pr_debug("%s: cdc_dma_tx_ch = %d\n", __func__,
  1476. cdc_dma_tx_cfg[ch_num].channels);
  1477. return 1;
  1478. }
  1479. static int cdc_dma_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1480. struct snd_ctl_elem_value *ucontrol)
  1481. {
  1482. int sample_rate_val;
  1483. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1484. if (ch_num < 0) {
  1485. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1486. return ch_num;
  1487. }
  1488. switch (cdc_dma_tx_cfg[ch_num].sample_rate) {
  1489. case SAMPLING_RATE_384KHZ:
  1490. sample_rate_val = 12;
  1491. break;
  1492. case SAMPLING_RATE_352P8KHZ:
  1493. sample_rate_val = 11;
  1494. break;
  1495. case SAMPLING_RATE_192KHZ:
  1496. sample_rate_val = 10;
  1497. break;
  1498. case SAMPLING_RATE_176P4KHZ:
  1499. sample_rate_val = 9;
  1500. break;
  1501. case SAMPLING_RATE_96KHZ:
  1502. sample_rate_val = 8;
  1503. break;
  1504. case SAMPLING_RATE_88P2KHZ:
  1505. sample_rate_val = 7;
  1506. break;
  1507. case SAMPLING_RATE_48KHZ:
  1508. sample_rate_val = 6;
  1509. break;
  1510. case SAMPLING_RATE_44P1KHZ:
  1511. sample_rate_val = 5;
  1512. break;
  1513. case SAMPLING_RATE_32KHZ:
  1514. sample_rate_val = 4;
  1515. break;
  1516. case SAMPLING_RATE_22P05KHZ:
  1517. sample_rate_val = 3;
  1518. break;
  1519. case SAMPLING_RATE_16KHZ:
  1520. sample_rate_val = 2;
  1521. break;
  1522. case SAMPLING_RATE_11P025KHZ:
  1523. sample_rate_val = 1;
  1524. break;
  1525. case SAMPLING_RATE_8KHZ:
  1526. sample_rate_val = 0;
  1527. break;
  1528. default:
  1529. sample_rate_val = 6;
  1530. break;
  1531. }
  1532. ucontrol->value.integer.value[0] = sample_rate_val;
  1533. pr_debug("%s: cdc_dma_tx_sample_rate = %d\n", __func__,
  1534. cdc_dma_tx_cfg[ch_num].sample_rate);
  1535. return 0;
  1536. }
  1537. static int cdc_dma_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1538. struct snd_ctl_elem_value *ucontrol)
  1539. {
  1540. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1541. if (ch_num < 0) {
  1542. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1543. return ch_num;
  1544. }
  1545. switch (ucontrol->value.integer.value[0]) {
  1546. case 12:
  1547. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_384KHZ;
  1548. break;
  1549. case 11:
  1550. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_352P8KHZ;
  1551. break;
  1552. case 10:
  1553. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_192KHZ;
  1554. break;
  1555. case 9:
  1556. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_176P4KHZ;
  1557. break;
  1558. case 8:
  1559. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_96KHZ;
  1560. break;
  1561. case 7:
  1562. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_88P2KHZ;
  1563. break;
  1564. case 6:
  1565. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1566. break;
  1567. case 5:
  1568. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_44P1KHZ;
  1569. break;
  1570. case 4:
  1571. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_32KHZ;
  1572. break;
  1573. case 3:
  1574. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_22P05KHZ;
  1575. break;
  1576. case 2:
  1577. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_16KHZ;
  1578. break;
  1579. case 1:
  1580. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_11P025KHZ;
  1581. break;
  1582. case 0:
  1583. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_8KHZ;
  1584. break;
  1585. default:
  1586. cdc_dma_tx_cfg[ch_num].sample_rate = SAMPLING_RATE_48KHZ;
  1587. break;
  1588. }
  1589. pr_debug("%s: control value = %ld, cdc_dma_tx_sample_rate = %d\n",
  1590. __func__, ucontrol->value.integer.value[0],
  1591. cdc_dma_tx_cfg[ch_num].sample_rate);
  1592. return 0;
  1593. }
  1594. static int cdc_dma_tx_format_get(struct snd_kcontrol *kcontrol,
  1595. struct snd_ctl_elem_value *ucontrol)
  1596. {
  1597. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1598. if (ch_num < 0) {
  1599. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1600. return ch_num;
  1601. }
  1602. switch (cdc_dma_tx_cfg[ch_num].bit_format) {
  1603. case SNDRV_PCM_FORMAT_S32_LE:
  1604. ucontrol->value.integer.value[0] = 3;
  1605. break;
  1606. case SNDRV_PCM_FORMAT_S24_3LE:
  1607. ucontrol->value.integer.value[0] = 2;
  1608. break;
  1609. case SNDRV_PCM_FORMAT_S24_LE:
  1610. ucontrol->value.integer.value[0] = 1;
  1611. break;
  1612. case SNDRV_PCM_FORMAT_S16_LE:
  1613. default:
  1614. ucontrol->value.integer.value[0] = 0;
  1615. break;
  1616. }
  1617. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1618. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1619. ucontrol->value.integer.value[0]);
  1620. return 0;
  1621. }
  1622. static int cdc_dma_tx_format_put(struct snd_kcontrol *kcontrol,
  1623. struct snd_ctl_elem_value *ucontrol)
  1624. {
  1625. int rc = 0;
  1626. int ch_num = cdc_dma_get_port_idx(kcontrol);
  1627. if (ch_num < 0) {
  1628. pr_err("%s: ch_num: %d is invalid\n", __func__, ch_num);
  1629. return ch_num;
  1630. }
  1631. switch (ucontrol->value.integer.value[0]) {
  1632. case 3:
  1633. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1634. break;
  1635. case 2:
  1636. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1637. break;
  1638. case 1:
  1639. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1640. break;
  1641. case 0:
  1642. default:
  1643. cdc_dma_tx_cfg[ch_num].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1644. break;
  1645. }
  1646. pr_debug("%s: cdc_dma_tx_format = %d, ucontrol value = %ld\n",
  1647. __func__, cdc_dma_tx_cfg[ch_num].bit_format,
  1648. ucontrol->value.integer.value[0]);
  1649. return rc;
  1650. }
  1651. static int usb_audio_rx_ch_get(struct snd_kcontrol *kcontrol,
  1652. struct snd_ctl_elem_value *ucontrol)
  1653. {
  1654. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__,
  1655. usb_rx_cfg.channels);
  1656. ucontrol->value.integer.value[0] = usb_rx_cfg.channels - 1;
  1657. return 0;
  1658. }
  1659. static int usb_audio_rx_ch_put(struct snd_kcontrol *kcontrol,
  1660. struct snd_ctl_elem_value *ucontrol)
  1661. {
  1662. usb_rx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1663. pr_debug("%s: usb_audio_rx_ch = %d\n", __func__, usb_rx_cfg.channels);
  1664. return 1;
  1665. }
  1666. static int usb_audio_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1667. struct snd_ctl_elem_value *ucontrol)
  1668. {
  1669. int sample_rate_val;
  1670. switch (usb_rx_cfg.sample_rate) {
  1671. case SAMPLING_RATE_384KHZ:
  1672. sample_rate_val = 12;
  1673. break;
  1674. case SAMPLING_RATE_352P8KHZ:
  1675. sample_rate_val = 11;
  1676. break;
  1677. case SAMPLING_RATE_192KHZ:
  1678. sample_rate_val = 10;
  1679. break;
  1680. case SAMPLING_RATE_176P4KHZ:
  1681. sample_rate_val = 9;
  1682. break;
  1683. case SAMPLING_RATE_96KHZ:
  1684. sample_rate_val = 8;
  1685. break;
  1686. case SAMPLING_RATE_88P2KHZ:
  1687. sample_rate_val = 7;
  1688. break;
  1689. case SAMPLING_RATE_48KHZ:
  1690. sample_rate_val = 6;
  1691. break;
  1692. case SAMPLING_RATE_44P1KHZ:
  1693. sample_rate_val = 5;
  1694. break;
  1695. case SAMPLING_RATE_32KHZ:
  1696. sample_rate_val = 4;
  1697. break;
  1698. case SAMPLING_RATE_22P05KHZ:
  1699. sample_rate_val = 3;
  1700. break;
  1701. case SAMPLING_RATE_16KHZ:
  1702. sample_rate_val = 2;
  1703. break;
  1704. case SAMPLING_RATE_11P025KHZ:
  1705. sample_rate_val = 1;
  1706. break;
  1707. case SAMPLING_RATE_8KHZ:
  1708. default:
  1709. sample_rate_val = 0;
  1710. break;
  1711. }
  1712. ucontrol->value.integer.value[0] = sample_rate_val;
  1713. pr_debug("%s: usb_audio_rx_sample_rate = %d\n", __func__,
  1714. usb_rx_cfg.sample_rate);
  1715. return 0;
  1716. }
  1717. static int usb_audio_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1718. struct snd_ctl_elem_value *ucontrol)
  1719. {
  1720. switch (ucontrol->value.integer.value[0]) {
  1721. case 12:
  1722. usb_rx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1723. break;
  1724. case 11:
  1725. usb_rx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1726. break;
  1727. case 10:
  1728. usb_rx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1729. break;
  1730. case 9:
  1731. usb_rx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1732. break;
  1733. case 8:
  1734. usb_rx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1735. break;
  1736. case 7:
  1737. usb_rx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1738. break;
  1739. case 6:
  1740. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1741. break;
  1742. case 5:
  1743. usb_rx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1744. break;
  1745. case 4:
  1746. usb_rx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1747. break;
  1748. case 3:
  1749. usb_rx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1750. break;
  1751. case 2:
  1752. usb_rx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1753. break;
  1754. case 1:
  1755. usb_rx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1756. break;
  1757. case 0:
  1758. usb_rx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1759. break;
  1760. default:
  1761. usb_rx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1762. break;
  1763. }
  1764. pr_debug("%s: control value = %ld, usb_audio_rx_sample_rate = %d\n",
  1765. __func__, ucontrol->value.integer.value[0],
  1766. usb_rx_cfg.sample_rate);
  1767. return 0;
  1768. }
  1769. static int usb_audio_rx_format_get(struct snd_kcontrol *kcontrol,
  1770. struct snd_ctl_elem_value *ucontrol)
  1771. {
  1772. switch (usb_rx_cfg.bit_format) {
  1773. case SNDRV_PCM_FORMAT_S32_LE:
  1774. ucontrol->value.integer.value[0] = 3;
  1775. break;
  1776. case SNDRV_PCM_FORMAT_S24_3LE:
  1777. ucontrol->value.integer.value[0] = 2;
  1778. break;
  1779. case SNDRV_PCM_FORMAT_S24_LE:
  1780. ucontrol->value.integer.value[0] = 1;
  1781. break;
  1782. case SNDRV_PCM_FORMAT_S16_LE:
  1783. default:
  1784. ucontrol->value.integer.value[0] = 0;
  1785. break;
  1786. }
  1787. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1788. __func__, usb_rx_cfg.bit_format,
  1789. ucontrol->value.integer.value[0]);
  1790. return 0;
  1791. }
  1792. static int usb_audio_rx_format_put(struct snd_kcontrol *kcontrol,
  1793. struct snd_ctl_elem_value *ucontrol)
  1794. {
  1795. int rc = 0;
  1796. switch (ucontrol->value.integer.value[0]) {
  1797. case 3:
  1798. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1799. break;
  1800. case 2:
  1801. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1802. break;
  1803. case 1:
  1804. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1805. break;
  1806. case 0:
  1807. default:
  1808. usb_rx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1809. break;
  1810. }
  1811. pr_debug("%s: usb_audio_rx_format = %d, ucontrol value = %ld\n",
  1812. __func__, usb_rx_cfg.bit_format,
  1813. ucontrol->value.integer.value[0]);
  1814. return rc;
  1815. }
  1816. static int usb_audio_tx_ch_get(struct snd_kcontrol *kcontrol,
  1817. struct snd_ctl_elem_value *ucontrol)
  1818. {
  1819. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__,
  1820. usb_tx_cfg.channels);
  1821. ucontrol->value.integer.value[0] = usb_tx_cfg.channels - 1;
  1822. return 0;
  1823. }
  1824. static int usb_audio_tx_ch_put(struct snd_kcontrol *kcontrol,
  1825. struct snd_ctl_elem_value *ucontrol)
  1826. {
  1827. usb_tx_cfg.channels = ucontrol->value.integer.value[0] + 1;
  1828. pr_debug("%s: usb_audio_tx_ch = %d\n", __func__, usb_tx_cfg.channels);
  1829. return 1;
  1830. }
  1831. static int usb_audio_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  1832. struct snd_ctl_elem_value *ucontrol)
  1833. {
  1834. int sample_rate_val;
  1835. switch (usb_tx_cfg.sample_rate) {
  1836. case SAMPLING_RATE_384KHZ:
  1837. sample_rate_val = 12;
  1838. break;
  1839. case SAMPLING_RATE_352P8KHZ:
  1840. sample_rate_val = 11;
  1841. break;
  1842. case SAMPLING_RATE_192KHZ:
  1843. sample_rate_val = 10;
  1844. break;
  1845. case SAMPLING_RATE_176P4KHZ:
  1846. sample_rate_val = 9;
  1847. break;
  1848. case SAMPLING_RATE_96KHZ:
  1849. sample_rate_val = 8;
  1850. break;
  1851. case SAMPLING_RATE_88P2KHZ:
  1852. sample_rate_val = 7;
  1853. break;
  1854. case SAMPLING_RATE_48KHZ:
  1855. sample_rate_val = 6;
  1856. break;
  1857. case SAMPLING_RATE_44P1KHZ:
  1858. sample_rate_val = 5;
  1859. break;
  1860. case SAMPLING_RATE_32KHZ:
  1861. sample_rate_val = 4;
  1862. break;
  1863. case SAMPLING_RATE_22P05KHZ:
  1864. sample_rate_val = 3;
  1865. break;
  1866. case SAMPLING_RATE_16KHZ:
  1867. sample_rate_val = 2;
  1868. break;
  1869. case SAMPLING_RATE_11P025KHZ:
  1870. sample_rate_val = 1;
  1871. break;
  1872. case SAMPLING_RATE_8KHZ:
  1873. sample_rate_val = 0;
  1874. break;
  1875. default:
  1876. sample_rate_val = 6;
  1877. break;
  1878. }
  1879. ucontrol->value.integer.value[0] = sample_rate_val;
  1880. pr_debug("%s: usb_audio_tx_sample_rate = %d\n", __func__,
  1881. usb_tx_cfg.sample_rate);
  1882. return 0;
  1883. }
  1884. static int usb_audio_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  1885. struct snd_ctl_elem_value *ucontrol)
  1886. {
  1887. switch (ucontrol->value.integer.value[0]) {
  1888. case 12:
  1889. usb_tx_cfg.sample_rate = SAMPLING_RATE_384KHZ;
  1890. break;
  1891. case 11:
  1892. usb_tx_cfg.sample_rate = SAMPLING_RATE_352P8KHZ;
  1893. break;
  1894. case 10:
  1895. usb_tx_cfg.sample_rate = SAMPLING_RATE_192KHZ;
  1896. break;
  1897. case 9:
  1898. usb_tx_cfg.sample_rate = SAMPLING_RATE_176P4KHZ;
  1899. break;
  1900. case 8:
  1901. usb_tx_cfg.sample_rate = SAMPLING_RATE_96KHZ;
  1902. break;
  1903. case 7:
  1904. usb_tx_cfg.sample_rate = SAMPLING_RATE_88P2KHZ;
  1905. break;
  1906. case 6:
  1907. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1908. break;
  1909. case 5:
  1910. usb_tx_cfg.sample_rate = SAMPLING_RATE_44P1KHZ;
  1911. break;
  1912. case 4:
  1913. usb_tx_cfg.sample_rate = SAMPLING_RATE_32KHZ;
  1914. break;
  1915. case 3:
  1916. usb_tx_cfg.sample_rate = SAMPLING_RATE_22P05KHZ;
  1917. break;
  1918. case 2:
  1919. usb_tx_cfg.sample_rate = SAMPLING_RATE_16KHZ;
  1920. break;
  1921. case 1:
  1922. usb_tx_cfg.sample_rate = SAMPLING_RATE_11P025KHZ;
  1923. break;
  1924. case 0:
  1925. usb_tx_cfg.sample_rate = SAMPLING_RATE_8KHZ;
  1926. break;
  1927. default:
  1928. usb_tx_cfg.sample_rate = SAMPLING_RATE_48KHZ;
  1929. break;
  1930. }
  1931. pr_debug("%s: control value = %ld, usb_audio_tx_sample_rate = %d\n",
  1932. __func__, ucontrol->value.integer.value[0],
  1933. usb_tx_cfg.sample_rate);
  1934. return 0;
  1935. }
  1936. static int usb_audio_tx_format_get(struct snd_kcontrol *kcontrol,
  1937. struct snd_ctl_elem_value *ucontrol)
  1938. {
  1939. switch (usb_tx_cfg.bit_format) {
  1940. case SNDRV_PCM_FORMAT_S32_LE:
  1941. ucontrol->value.integer.value[0] = 3;
  1942. break;
  1943. case SNDRV_PCM_FORMAT_S24_3LE:
  1944. ucontrol->value.integer.value[0] = 2;
  1945. break;
  1946. case SNDRV_PCM_FORMAT_S24_LE:
  1947. ucontrol->value.integer.value[0] = 1;
  1948. break;
  1949. case SNDRV_PCM_FORMAT_S16_LE:
  1950. default:
  1951. ucontrol->value.integer.value[0] = 0;
  1952. break;
  1953. }
  1954. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1955. __func__, usb_tx_cfg.bit_format,
  1956. ucontrol->value.integer.value[0]);
  1957. return 0;
  1958. }
  1959. static int usb_audio_tx_format_put(struct snd_kcontrol *kcontrol,
  1960. struct snd_ctl_elem_value *ucontrol)
  1961. {
  1962. int rc = 0;
  1963. switch (ucontrol->value.integer.value[0]) {
  1964. case 3:
  1965. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S32_LE;
  1966. break;
  1967. case 2:
  1968. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  1969. break;
  1970. case 1:
  1971. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S24_LE;
  1972. break;
  1973. case 0:
  1974. default:
  1975. usb_tx_cfg.bit_format = SNDRV_PCM_FORMAT_S16_LE;
  1976. break;
  1977. }
  1978. pr_debug("%s: usb_audio_tx_format = %d, ucontrol value = %ld\n",
  1979. __func__, usb_tx_cfg.bit_format,
  1980. ucontrol->value.integer.value[0]);
  1981. return rc;
  1982. }
  1983. static int ext_disp_get_port_idx(struct snd_kcontrol *kcontrol)
  1984. {
  1985. int idx;
  1986. if (strnstr(kcontrol->id.name, "Display Port RX",
  1987. sizeof("Display Port RX"))) {
  1988. idx = DP_RX_IDX;
  1989. } else {
  1990. pr_err("%s: unsupported BE: %s\n",
  1991. __func__, kcontrol->id.name);
  1992. idx = -EINVAL;
  1993. }
  1994. return idx;
  1995. }
  1996. static int ext_disp_rx_format_get(struct snd_kcontrol *kcontrol,
  1997. struct snd_ctl_elem_value *ucontrol)
  1998. {
  1999. int idx = ext_disp_get_port_idx(kcontrol);
  2000. if (idx < 0)
  2001. return idx;
  2002. switch (ext_disp_rx_cfg[idx].bit_format) {
  2003. case SNDRV_PCM_FORMAT_S24_3LE:
  2004. ucontrol->value.integer.value[0] = 2;
  2005. break;
  2006. case SNDRV_PCM_FORMAT_S24_LE:
  2007. ucontrol->value.integer.value[0] = 1;
  2008. break;
  2009. case SNDRV_PCM_FORMAT_S16_LE:
  2010. default:
  2011. ucontrol->value.integer.value[0] = 0;
  2012. break;
  2013. }
  2014. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  2015. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  2016. ucontrol->value.integer.value[0]);
  2017. return 0;
  2018. }
  2019. static int ext_disp_rx_format_put(struct snd_kcontrol *kcontrol,
  2020. struct snd_ctl_elem_value *ucontrol)
  2021. {
  2022. int idx = ext_disp_get_port_idx(kcontrol);
  2023. if (idx < 0)
  2024. return idx;
  2025. switch (ucontrol->value.integer.value[0]) {
  2026. case 2:
  2027. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_3LE;
  2028. break;
  2029. case 1:
  2030. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S24_LE;
  2031. break;
  2032. case 0:
  2033. default:
  2034. ext_disp_rx_cfg[idx].bit_format = SNDRV_PCM_FORMAT_S16_LE;
  2035. break;
  2036. }
  2037. pr_debug("%s: ext_disp_rx[%d].format = %d, ucontrol value = %ld\n",
  2038. __func__, idx, ext_disp_rx_cfg[idx].bit_format,
  2039. ucontrol->value.integer.value[0]);
  2040. return 0;
  2041. }
  2042. static int ext_disp_rx_ch_get(struct snd_kcontrol *kcontrol,
  2043. struct snd_ctl_elem_value *ucontrol)
  2044. {
  2045. int idx = ext_disp_get_port_idx(kcontrol);
  2046. if (idx < 0)
  2047. return idx;
  2048. ucontrol->value.integer.value[0] =
  2049. ext_disp_rx_cfg[idx].channels - 2;
  2050. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  2051. idx, ext_disp_rx_cfg[idx].channels);
  2052. return 0;
  2053. }
  2054. static int ext_disp_rx_ch_put(struct snd_kcontrol *kcontrol,
  2055. struct snd_ctl_elem_value *ucontrol)
  2056. {
  2057. int idx = ext_disp_get_port_idx(kcontrol);
  2058. if (idx < 0)
  2059. return idx;
  2060. ext_disp_rx_cfg[idx].channels =
  2061. ucontrol->value.integer.value[0] + 2;
  2062. pr_debug("%s: ext_disp_rx[%d].ch = %d\n", __func__,
  2063. idx, ext_disp_rx_cfg[idx].channels);
  2064. return 1;
  2065. }
  2066. static int ext_disp_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2067. struct snd_ctl_elem_value *ucontrol)
  2068. {
  2069. int sample_rate_val;
  2070. int idx = ext_disp_get_port_idx(kcontrol);
  2071. if (idx < 0)
  2072. return idx;
  2073. switch (ext_disp_rx_cfg[idx].sample_rate) {
  2074. case SAMPLING_RATE_176P4KHZ:
  2075. sample_rate_val = 6;
  2076. break;
  2077. case SAMPLING_RATE_88P2KHZ:
  2078. sample_rate_val = 5;
  2079. break;
  2080. case SAMPLING_RATE_44P1KHZ:
  2081. sample_rate_val = 4;
  2082. break;
  2083. case SAMPLING_RATE_32KHZ:
  2084. sample_rate_val = 3;
  2085. break;
  2086. case SAMPLING_RATE_192KHZ:
  2087. sample_rate_val = 2;
  2088. break;
  2089. case SAMPLING_RATE_96KHZ:
  2090. sample_rate_val = 1;
  2091. break;
  2092. case SAMPLING_RATE_48KHZ:
  2093. default:
  2094. sample_rate_val = 0;
  2095. break;
  2096. }
  2097. ucontrol->value.integer.value[0] = sample_rate_val;
  2098. pr_debug("%s: ext_disp_rx[%d].sample_rate = %d\n", __func__,
  2099. idx, ext_disp_rx_cfg[idx].sample_rate);
  2100. return 0;
  2101. }
  2102. static int ext_disp_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2103. struct snd_ctl_elem_value *ucontrol)
  2104. {
  2105. int idx = ext_disp_get_port_idx(kcontrol);
  2106. if (idx < 0)
  2107. return idx;
  2108. switch (ucontrol->value.integer.value[0]) {
  2109. case 6:
  2110. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_176P4KHZ;
  2111. break;
  2112. case 5:
  2113. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_88P2KHZ;
  2114. break;
  2115. case 4:
  2116. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_44P1KHZ;
  2117. break;
  2118. case 3:
  2119. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_32KHZ;
  2120. break;
  2121. case 2:
  2122. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_192KHZ;
  2123. break;
  2124. case 1:
  2125. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_96KHZ;
  2126. break;
  2127. case 0:
  2128. default:
  2129. ext_disp_rx_cfg[idx].sample_rate = SAMPLING_RATE_48KHZ;
  2130. break;
  2131. }
  2132. pr_debug("%s: control value = %ld, ext_disp_rx[%d].sample_rate = %d\n",
  2133. __func__, ucontrol->value.integer.value[0], idx,
  2134. ext_disp_rx_cfg[idx].sample_rate);
  2135. return 0;
  2136. }
  2137. static int proxy_rx_ch_get(struct snd_kcontrol *kcontrol,
  2138. struct snd_ctl_elem_value *ucontrol)
  2139. {
  2140. pr_debug("%s: proxy_rx channels = %d\n",
  2141. __func__, proxy_rx_cfg.channels);
  2142. ucontrol->value.integer.value[0] = proxy_rx_cfg.channels - 2;
  2143. return 0;
  2144. }
  2145. static int proxy_rx_ch_put(struct snd_kcontrol *kcontrol,
  2146. struct snd_ctl_elem_value *ucontrol)
  2147. {
  2148. proxy_rx_cfg.channels = ucontrol->value.integer.value[0] + 2;
  2149. pr_debug("%s: proxy_rx channels = %d\n",
  2150. __func__, proxy_rx_cfg.channels);
  2151. return 1;
  2152. }
  2153. static int tdm_get_sample_rate(int value)
  2154. {
  2155. int sample_rate = 0;
  2156. switch (value) {
  2157. case 0:
  2158. sample_rate = SAMPLING_RATE_8KHZ;
  2159. break;
  2160. case 1:
  2161. sample_rate = SAMPLING_RATE_16KHZ;
  2162. break;
  2163. case 2:
  2164. sample_rate = SAMPLING_RATE_32KHZ;
  2165. break;
  2166. case 3:
  2167. sample_rate = SAMPLING_RATE_48KHZ;
  2168. break;
  2169. case 4:
  2170. sample_rate = SAMPLING_RATE_176P4KHZ;
  2171. break;
  2172. case 5:
  2173. sample_rate = SAMPLING_RATE_352P8KHZ;
  2174. break;
  2175. default:
  2176. sample_rate = SAMPLING_RATE_48KHZ;
  2177. break;
  2178. }
  2179. return sample_rate;
  2180. }
  2181. static int aux_pcm_get_sample_rate(int value)
  2182. {
  2183. int sample_rate;
  2184. switch (value) {
  2185. case 1:
  2186. sample_rate = SAMPLING_RATE_16KHZ;
  2187. break;
  2188. case 0:
  2189. default:
  2190. sample_rate = SAMPLING_RATE_8KHZ;
  2191. break;
  2192. }
  2193. return sample_rate;
  2194. }
  2195. static int tdm_get_sample_rate_val(int sample_rate)
  2196. {
  2197. int sample_rate_val = 0;
  2198. switch (sample_rate) {
  2199. case SAMPLING_RATE_8KHZ:
  2200. sample_rate_val = 0;
  2201. break;
  2202. case SAMPLING_RATE_16KHZ:
  2203. sample_rate_val = 1;
  2204. break;
  2205. case SAMPLING_RATE_32KHZ:
  2206. sample_rate_val = 2;
  2207. break;
  2208. case SAMPLING_RATE_48KHZ:
  2209. sample_rate_val = 3;
  2210. break;
  2211. case SAMPLING_RATE_176P4KHZ:
  2212. sample_rate_val = 4;
  2213. break;
  2214. case SAMPLING_RATE_352P8KHZ:
  2215. sample_rate_val = 5;
  2216. break;
  2217. default:
  2218. sample_rate_val = 3;
  2219. break;
  2220. }
  2221. return sample_rate_val;
  2222. }
  2223. static int aux_pcm_get_sample_rate_val(int sample_rate)
  2224. {
  2225. int sample_rate_val;
  2226. switch (sample_rate) {
  2227. case SAMPLING_RATE_16KHZ:
  2228. sample_rate_val = 1;
  2229. break;
  2230. case SAMPLING_RATE_8KHZ:
  2231. default:
  2232. sample_rate_val = 0;
  2233. break;
  2234. }
  2235. return sample_rate_val;
  2236. }
  2237. static int tdm_get_port_idx(struct snd_kcontrol *kcontrol,
  2238. struct tdm_port *port)
  2239. {
  2240. if (port) {
  2241. if (strnstr(kcontrol->id.name, "PRI",
  2242. sizeof(kcontrol->id.name))) {
  2243. port->mode = TDM_PRI;
  2244. } else if (strnstr(kcontrol->id.name, "SEC",
  2245. sizeof(kcontrol->id.name))) {
  2246. port->mode = TDM_SEC;
  2247. } else if (strnstr(kcontrol->id.name, "TERT",
  2248. sizeof(kcontrol->id.name))) {
  2249. port->mode = TDM_TERT;
  2250. } else if (strnstr(kcontrol->id.name, "QUAT",
  2251. sizeof(kcontrol->id.name))) {
  2252. port->mode = TDM_QUAT;
  2253. } else if (strnstr(kcontrol->id.name, "QUIN",
  2254. sizeof(kcontrol->id.name))) {
  2255. port->mode = TDM_QUIN;
  2256. } else {
  2257. pr_err("%s: unsupported mode in: %s\n",
  2258. __func__, kcontrol->id.name);
  2259. return -EINVAL;
  2260. }
  2261. if (strnstr(kcontrol->id.name, "RX_0",
  2262. sizeof(kcontrol->id.name)) ||
  2263. strnstr(kcontrol->id.name, "TX_0",
  2264. sizeof(kcontrol->id.name))) {
  2265. port->channel = TDM_0;
  2266. } else if (strnstr(kcontrol->id.name, "RX_1",
  2267. sizeof(kcontrol->id.name)) ||
  2268. strnstr(kcontrol->id.name, "TX_1",
  2269. sizeof(kcontrol->id.name))) {
  2270. port->channel = TDM_1;
  2271. } else if (strnstr(kcontrol->id.name, "RX_2",
  2272. sizeof(kcontrol->id.name)) ||
  2273. strnstr(kcontrol->id.name, "TX_2",
  2274. sizeof(kcontrol->id.name))) {
  2275. port->channel = TDM_2;
  2276. } else if (strnstr(kcontrol->id.name, "RX_3",
  2277. sizeof(kcontrol->id.name)) ||
  2278. strnstr(kcontrol->id.name, "TX_3",
  2279. sizeof(kcontrol->id.name))) {
  2280. port->channel = TDM_3;
  2281. } else if (strnstr(kcontrol->id.name, "RX_4",
  2282. sizeof(kcontrol->id.name)) ||
  2283. strnstr(kcontrol->id.name, "TX_4",
  2284. sizeof(kcontrol->id.name))) {
  2285. port->channel = TDM_4;
  2286. } else if (strnstr(kcontrol->id.name, "RX_5",
  2287. sizeof(kcontrol->id.name)) ||
  2288. strnstr(kcontrol->id.name, "TX_5",
  2289. sizeof(kcontrol->id.name))) {
  2290. port->channel = TDM_5;
  2291. } else if (strnstr(kcontrol->id.name, "RX_6",
  2292. sizeof(kcontrol->id.name)) ||
  2293. strnstr(kcontrol->id.name, "TX_6",
  2294. sizeof(kcontrol->id.name))) {
  2295. port->channel = TDM_6;
  2296. } else if (strnstr(kcontrol->id.name, "RX_7",
  2297. sizeof(kcontrol->id.name)) ||
  2298. strnstr(kcontrol->id.name, "TX_7",
  2299. sizeof(kcontrol->id.name))) {
  2300. port->channel = TDM_7;
  2301. } else {
  2302. pr_err("%s: unsupported channel in: %s\n",
  2303. __func__, kcontrol->id.name);
  2304. return -EINVAL;
  2305. }
  2306. } else {
  2307. return -EINVAL;
  2308. }
  2309. return 0;
  2310. }
  2311. static int tdm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2312. struct snd_ctl_elem_value *ucontrol)
  2313. {
  2314. struct tdm_port port;
  2315. int ret = tdm_get_port_idx(kcontrol, &port);
  2316. if (ret) {
  2317. pr_err("%s: unsupported control: %s\n",
  2318. __func__, kcontrol->id.name);
  2319. } else {
  2320. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2321. tdm_rx_cfg[port.mode][port.channel].sample_rate);
  2322. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2323. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2324. ucontrol->value.enumerated.item[0]);
  2325. }
  2326. return ret;
  2327. }
  2328. static int tdm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2329. struct snd_ctl_elem_value *ucontrol)
  2330. {
  2331. struct tdm_port port;
  2332. int ret = tdm_get_port_idx(kcontrol, &port);
  2333. if (ret) {
  2334. pr_err("%s: unsupported control: %s\n",
  2335. __func__, kcontrol->id.name);
  2336. } else {
  2337. tdm_rx_cfg[port.mode][port.channel].sample_rate =
  2338. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2339. pr_debug("%s: tdm_rx_sample_rate = %d, item = %d\n", __func__,
  2340. tdm_rx_cfg[port.mode][port.channel].sample_rate,
  2341. ucontrol->value.enumerated.item[0]);
  2342. }
  2343. return ret;
  2344. }
  2345. static int tdm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2346. struct snd_ctl_elem_value *ucontrol)
  2347. {
  2348. struct tdm_port port;
  2349. int ret = tdm_get_port_idx(kcontrol, &port);
  2350. if (ret) {
  2351. pr_err("%s: unsupported control: %s\n",
  2352. __func__, kcontrol->id.name);
  2353. } else {
  2354. ucontrol->value.enumerated.item[0] = tdm_get_sample_rate_val(
  2355. tdm_tx_cfg[port.mode][port.channel].sample_rate);
  2356. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2357. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2358. ucontrol->value.enumerated.item[0]);
  2359. }
  2360. return ret;
  2361. }
  2362. static int tdm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2363. struct snd_ctl_elem_value *ucontrol)
  2364. {
  2365. struct tdm_port port;
  2366. int ret = tdm_get_port_idx(kcontrol, &port);
  2367. if (ret) {
  2368. pr_err("%s: unsupported control: %s\n",
  2369. __func__, kcontrol->id.name);
  2370. } else {
  2371. tdm_tx_cfg[port.mode][port.channel].sample_rate =
  2372. tdm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2373. pr_debug("%s: tdm_tx_sample_rate = %d, item = %d\n", __func__,
  2374. tdm_tx_cfg[port.mode][port.channel].sample_rate,
  2375. ucontrol->value.enumerated.item[0]);
  2376. }
  2377. return ret;
  2378. }
  2379. static int tdm_get_format(int value)
  2380. {
  2381. int format = 0;
  2382. switch (value) {
  2383. case 0:
  2384. format = SNDRV_PCM_FORMAT_S16_LE;
  2385. break;
  2386. case 1:
  2387. format = SNDRV_PCM_FORMAT_S24_LE;
  2388. break;
  2389. case 2:
  2390. format = SNDRV_PCM_FORMAT_S32_LE;
  2391. break;
  2392. default:
  2393. format = SNDRV_PCM_FORMAT_S16_LE;
  2394. break;
  2395. }
  2396. return format;
  2397. }
  2398. static int tdm_get_format_val(int format)
  2399. {
  2400. int value = 0;
  2401. switch (format) {
  2402. case SNDRV_PCM_FORMAT_S16_LE:
  2403. value = 0;
  2404. break;
  2405. case SNDRV_PCM_FORMAT_S24_LE:
  2406. value = 1;
  2407. break;
  2408. case SNDRV_PCM_FORMAT_S32_LE:
  2409. value = 2;
  2410. break;
  2411. default:
  2412. value = 0;
  2413. break;
  2414. }
  2415. return value;
  2416. }
  2417. static int tdm_rx_format_get(struct snd_kcontrol *kcontrol,
  2418. struct snd_ctl_elem_value *ucontrol)
  2419. {
  2420. struct tdm_port port;
  2421. int ret = tdm_get_port_idx(kcontrol, &port);
  2422. if (ret) {
  2423. pr_err("%s: unsupported control: %s\n",
  2424. __func__, kcontrol->id.name);
  2425. } else {
  2426. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2427. tdm_rx_cfg[port.mode][port.channel].bit_format);
  2428. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2429. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2430. ucontrol->value.enumerated.item[0]);
  2431. }
  2432. return ret;
  2433. }
  2434. static int tdm_rx_format_put(struct snd_kcontrol *kcontrol,
  2435. struct snd_ctl_elem_value *ucontrol)
  2436. {
  2437. struct tdm_port port;
  2438. int ret = tdm_get_port_idx(kcontrol, &port);
  2439. if (ret) {
  2440. pr_err("%s: unsupported control: %s\n",
  2441. __func__, kcontrol->id.name);
  2442. } else {
  2443. tdm_rx_cfg[port.mode][port.channel].bit_format =
  2444. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2445. pr_debug("%s: tdm_rx_bit_format = %d, item = %d\n", __func__,
  2446. tdm_rx_cfg[port.mode][port.channel].bit_format,
  2447. ucontrol->value.enumerated.item[0]);
  2448. }
  2449. return ret;
  2450. }
  2451. static int tdm_tx_format_get(struct snd_kcontrol *kcontrol,
  2452. struct snd_ctl_elem_value *ucontrol)
  2453. {
  2454. struct tdm_port port;
  2455. int ret = tdm_get_port_idx(kcontrol, &port);
  2456. if (ret) {
  2457. pr_err("%s: unsupported control: %s\n",
  2458. __func__, kcontrol->id.name);
  2459. } else {
  2460. ucontrol->value.enumerated.item[0] = tdm_get_format_val(
  2461. tdm_tx_cfg[port.mode][port.channel].bit_format);
  2462. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2463. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2464. ucontrol->value.enumerated.item[0]);
  2465. }
  2466. return ret;
  2467. }
  2468. static int tdm_tx_format_put(struct snd_kcontrol *kcontrol,
  2469. struct snd_ctl_elem_value *ucontrol)
  2470. {
  2471. struct tdm_port port;
  2472. int ret = tdm_get_port_idx(kcontrol, &port);
  2473. if (ret) {
  2474. pr_err("%s: unsupported control: %s\n",
  2475. __func__, kcontrol->id.name);
  2476. } else {
  2477. tdm_tx_cfg[port.mode][port.channel].bit_format =
  2478. tdm_get_format(ucontrol->value.enumerated.item[0]);
  2479. pr_debug("%s: tdm_tx_bit_format = %d, item = %d\n", __func__,
  2480. tdm_tx_cfg[port.mode][port.channel].bit_format,
  2481. ucontrol->value.enumerated.item[0]);
  2482. }
  2483. return ret;
  2484. }
  2485. static int tdm_rx_ch_get(struct snd_kcontrol *kcontrol,
  2486. struct snd_ctl_elem_value *ucontrol)
  2487. {
  2488. struct tdm_port port;
  2489. int ret = tdm_get_port_idx(kcontrol, &port);
  2490. if (ret) {
  2491. pr_err("%s: unsupported control: %s\n",
  2492. __func__, kcontrol->id.name);
  2493. } else {
  2494. ucontrol->value.enumerated.item[0] =
  2495. tdm_rx_cfg[port.mode][port.channel].channels - 1;
  2496. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2497. tdm_rx_cfg[port.mode][port.channel].channels - 1,
  2498. ucontrol->value.enumerated.item[0]);
  2499. }
  2500. return ret;
  2501. }
  2502. static int tdm_rx_ch_put(struct snd_kcontrol *kcontrol,
  2503. struct snd_ctl_elem_value *ucontrol)
  2504. {
  2505. struct tdm_port port;
  2506. int ret = tdm_get_port_idx(kcontrol, &port);
  2507. if (ret) {
  2508. pr_err("%s: unsupported control: %s\n",
  2509. __func__, kcontrol->id.name);
  2510. } else {
  2511. tdm_rx_cfg[port.mode][port.channel].channels =
  2512. ucontrol->value.enumerated.item[0] + 1;
  2513. pr_debug("%s: tdm_rx_ch = %d, item = %d\n", __func__,
  2514. tdm_rx_cfg[port.mode][port.channel].channels,
  2515. ucontrol->value.enumerated.item[0] + 1);
  2516. }
  2517. return ret;
  2518. }
  2519. static int tdm_tx_ch_get(struct snd_kcontrol *kcontrol,
  2520. struct snd_ctl_elem_value *ucontrol)
  2521. {
  2522. struct tdm_port port;
  2523. int ret = tdm_get_port_idx(kcontrol, &port);
  2524. if (ret) {
  2525. pr_err("%s: unsupported control: %s\n",
  2526. __func__, kcontrol->id.name);
  2527. } else {
  2528. ucontrol->value.enumerated.item[0] =
  2529. tdm_tx_cfg[port.mode][port.channel].channels - 1;
  2530. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2531. tdm_tx_cfg[port.mode][port.channel].channels - 1,
  2532. ucontrol->value.enumerated.item[0]);
  2533. }
  2534. return ret;
  2535. }
  2536. static int tdm_tx_ch_put(struct snd_kcontrol *kcontrol,
  2537. struct snd_ctl_elem_value *ucontrol)
  2538. {
  2539. struct tdm_port port;
  2540. int ret = tdm_get_port_idx(kcontrol, &port);
  2541. if (ret) {
  2542. pr_err("%s: unsupported control: %s\n",
  2543. __func__, kcontrol->id.name);
  2544. } else {
  2545. tdm_tx_cfg[port.mode][port.channel].channels =
  2546. ucontrol->value.enumerated.item[0] + 1;
  2547. pr_debug("%s: tdm_tx_ch = %d, item = %d\n", __func__,
  2548. tdm_tx_cfg[port.mode][port.channel].channels,
  2549. ucontrol->value.enumerated.item[0] + 1);
  2550. }
  2551. return ret;
  2552. }
  2553. static int aux_pcm_get_port_idx(struct snd_kcontrol *kcontrol)
  2554. {
  2555. int idx;
  2556. if (strnstr(kcontrol->id.name, "PRIM_AUX_PCM",
  2557. sizeof("PRIM_AUX_PCM"))) {
  2558. idx = PRIM_AUX_PCM;
  2559. } else if (strnstr(kcontrol->id.name, "SEC_AUX_PCM",
  2560. sizeof("SEC_AUX_PCM"))) {
  2561. idx = SEC_AUX_PCM;
  2562. } else if (strnstr(kcontrol->id.name, "TERT_AUX_PCM",
  2563. sizeof("TERT_AUX_PCM"))) {
  2564. idx = TERT_AUX_PCM;
  2565. } else if (strnstr(kcontrol->id.name, "QUAT_AUX_PCM",
  2566. sizeof("QUAT_AUX_PCM"))) {
  2567. idx = QUAT_AUX_PCM;
  2568. } else if (strnstr(kcontrol->id.name, "QUIN_AUX_PCM",
  2569. sizeof("QUIN_AUX_PCM"))) {
  2570. idx = QUIN_AUX_PCM;
  2571. } else {
  2572. pr_err("%s: unsupported port: %s\n",
  2573. __func__, kcontrol->id.name);
  2574. idx = -EINVAL;
  2575. }
  2576. return idx;
  2577. }
  2578. static int aux_pcm_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2579. struct snd_ctl_elem_value *ucontrol)
  2580. {
  2581. int idx = aux_pcm_get_port_idx(kcontrol);
  2582. if (idx < 0)
  2583. return idx;
  2584. aux_pcm_rx_cfg[idx].sample_rate =
  2585. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2586. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2587. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2588. ucontrol->value.enumerated.item[0]);
  2589. return 0;
  2590. }
  2591. static int aux_pcm_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2592. struct snd_ctl_elem_value *ucontrol)
  2593. {
  2594. int idx = aux_pcm_get_port_idx(kcontrol);
  2595. if (idx < 0)
  2596. return idx;
  2597. ucontrol->value.enumerated.item[0] =
  2598. aux_pcm_get_sample_rate_val(aux_pcm_rx_cfg[idx].sample_rate);
  2599. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2600. idx, aux_pcm_rx_cfg[idx].sample_rate,
  2601. ucontrol->value.enumerated.item[0]);
  2602. return 0;
  2603. }
  2604. static int aux_pcm_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2605. struct snd_ctl_elem_value *ucontrol)
  2606. {
  2607. int idx = aux_pcm_get_port_idx(kcontrol);
  2608. if (idx < 0)
  2609. return idx;
  2610. aux_pcm_tx_cfg[idx].sample_rate =
  2611. aux_pcm_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2612. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2613. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2614. ucontrol->value.enumerated.item[0]);
  2615. return 0;
  2616. }
  2617. static int aux_pcm_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2618. struct snd_ctl_elem_value *ucontrol)
  2619. {
  2620. int idx = aux_pcm_get_port_idx(kcontrol);
  2621. if (idx < 0)
  2622. return idx;
  2623. ucontrol->value.enumerated.item[0] =
  2624. aux_pcm_get_sample_rate_val(aux_pcm_tx_cfg[idx].sample_rate);
  2625. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2626. idx, aux_pcm_tx_cfg[idx].sample_rate,
  2627. ucontrol->value.enumerated.item[0]);
  2628. return 0;
  2629. }
  2630. static int mi2s_get_port_idx(struct snd_kcontrol *kcontrol)
  2631. {
  2632. int idx;
  2633. if (strnstr(kcontrol->id.name, "PRIM_MI2S_RX",
  2634. sizeof("PRIM_MI2S_RX"))) {
  2635. idx = PRIM_MI2S;
  2636. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_RX",
  2637. sizeof("SEC_MI2S_RX"))) {
  2638. idx = SEC_MI2S;
  2639. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_RX",
  2640. sizeof("TERT_MI2S_RX"))) {
  2641. idx = TERT_MI2S;
  2642. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_RX",
  2643. sizeof("QUAT_MI2S_RX"))) {
  2644. idx = QUAT_MI2S;
  2645. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_RX",
  2646. sizeof("QUIN_MI2S_RX"))) {
  2647. idx = QUIN_MI2S;
  2648. } else if (strnstr(kcontrol->id.name, "PRIM_MI2S_TX",
  2649. sizeof("PRIM_MI2S_TX"))) {
  2650. idx = PRIM_MI2S;
  2651. } else if (strnstr(kcontrol->id.name, "SEC_MI2S_TX",
  2652. sizeof("SEC_MI2S_TX"))) {
  2653. idx = SEC_MI2S;
  2654. } else if (strnstr(kcontrol->id.name, "TERT_MI2S_TX",
  2655. sizeof("TERT_MI2S_TX"))) {
  2656. idx = TERT_MI2S;
  2657. } else if (strnstr(kcontrol->id.name, "QUAT_MI2S_TX",
  2658. sizeof("QUAT_MI2S_TX"))) {
  2659. idx = QUAT_MI2S;
  2660. } else if (strnstr(kcontrol->id.name, "QUIN_MI2S_TX",
  2661. sizeof("QUIN_MI2S_TX"))) {
  2662. idx = QUIN_MI2S;
  2663. } else {
  2664. pr_err("%s: unsupported channel: %s\n",
  2665. __func__, kcontrol->id.name);
  2666. idx = -EINVAL;
  2667. }
  2668. return idx;
  2669. }
  2670. static int mi2s_get_sample_rate_val(int sample_rate)
  2671. {
  2672. int sample_rate_val;
  2673. switch (sample_rate) {
  2674. case SAMPLING_RATE_8KHZ:
  2675. sample_rate_val = 0;
  2676. break;
  2677. case SAMPLING_RATE_11P025KHZ:
  2678. sample_rate_val = 1;
  2679. break;
  2680. case SAMPLING_RATE_16KHZ:
  2681. sample_rate_val = 2;
  2682. break;
  2683. case SAMPLING_RATE_22P05KHZ:
  2684. sample_rate_val = 3;
  2685. break;
  2686. case SAMPLING_RATE_32KHZ:
  2687. sample_rate_val = 4;
  2688. break;
  2689. case SAMPLING_RATE_44P1KHZ:
  2690. sample_rate_val = 5;
  2691. break;
  2692. case SAMPLING_RATE_48KHZ:
  2693. sample_rate_val = 6;
  2694. break;
  2695. case SAMPLING_RATE_96KHZ:
  2696. sample_rate_val = 7;
  2697. break;
  2698. case SAMPLING_RATE_192KHZ:
  2699. sample_rate_val = 8;
  2700. break;
  2701. default:
  2702. sample_rate_val = 6;
  2703. break;
  2704. }
  2705. return sample_rate_val;
  2706. }
  2707. static int mi2s_get_sample_rate(int value)
  2708. {
  2709. int sample_rate;
  2710. switch (value) {
  2711. case 0:
  2712. sample_rate = SAMPLING_RATE_8KHZ;
  2713. break;
  2714. case 1:
  2715. sample_rate = SAMPLING_RATE_11P025KHZ;
  2716. break;
  2717. case 2:
  2718. sample_rate = SAMPLING_RATE_16KHZ;
  2719. break;
  2720. case 3:
  2721. sample_rate = SAMPLING_RATE_22P05KHZ;
  2722. break;
  2723. case 4:
  2724. sample_rate = SAMPLING_RATE_32KHZ;
  2725. break;
  2726. case 5:
  2727. sample_rate = SAMPLING_RATE_44P1KHZ;
  2728. break;
  2729. case 6:
  2730. sample_rate = SAMPLING_RATE_48KHZ;
  2731. break;
  2732. case 7:
  2733. sample_rate = SAMPLING_RATE_96KHZ;
  2734. break;
  2735. case 8:
  2736. sample_rate = SAMPLING_RATE_192KHZ;
  2737. break;
  2738. default:
  2739. sample_rate = SAMPLING_RATE_48KHZ;
  2740. break;
  2741. }
  2742. return sample_rate;
  2743. }
  2744. static int mi2s_auxpcm_get_format(int value)
  2745. {
  2746. int format;
  2747. switch (value) {
  2748. case 0:
  2749. format = SNDRV_PCM_FORMAT_S16_LE;
  2750. break;
  2751. case 1:
  2752. format = SNDRV_PCM_FORMAT_S24_LE;
  2753. break;
  2754. case 2:
  2755. format = SNDRV_PCM_FORMAT_S24_3LE;
  2756. break;
  2757. case 3:
  2758. format = SNDRV_PCM_FORMAT_S32_LE;
  2759. break;
  2760. default:
  2761. format = SNDRV_PCM_FORMAT_S16_LE;
  2762. break;
  2763. }
  2764. return format;
  2765. }
  2766. static int mi2s_auxpcm_get_format_value(int format)
  2767. {
  2768. int value;
  2769. switch (format) {
  2770. case SNDRV_PCM_FORMAT_S16_LE:
  2771. value = 0;
  2772. break;
  2773. case SNDRV_PCM_FORMAT_S24_LE:
  2774. value = 1;
  2775. break;
  2776. case SNDRV_PCM_FORMAT_S24_3LE:
  2777. value = 2;
  2778. break;
  2779. case SNDRV_PCM_FORMAT_S32_LE:
  2780. value = 3;
  2781. break;
  2782. default:
  2783. value = 0;
  2784. break;
  2785. }
  2786. return value;
  2787. }
  2788. static int mi2s_rx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2789. struct snd_ctl_elem_value *ucontrol)
  2790. {
  2791. int idx = mi2s_get_port_idx(kcontrol);
  2792. if (idx < 0)
  2793. return idx;
  2794. mi2s_rx_cfg[idx].sample_rate =
  2795. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2796. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2797. idx, mi2s_rx_cfg[idx].sample_rate,
  2798. ucontrol->value.enumerated.item[0]);
  2799. return 0;
  2800. }
  2801. static int mi2s_rx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2802. struct snd_ctl_elem_value *ucontrol)
  2803. {
  2804. int idx = mi2s_get_port_idx(kcontrol);
  2805. if (idx < 0)
  2806. return idx;
  2807. ucontrol->value.enumerated.item[0] =
  2808. mi2s_get_sample_rate_val(mi2s_rx_cfg[idx].sample_rate);
  2809. pr_debug("%s: idx[%d]_rx_sample_rate = %d, item = %d\n", __func__,
  2810. idx, mi2s_rx_cfg[idx].sample_rate,
  2811. ucontrol->value.enumerated.item[0]);
  2812. return 0;
  2813. }
  2814. static int mi2s_tx_sample_rate_put(struct snd_kcontrol *kcontrol,
  2815. struct snd_ctl_elem_value *ucontrol)
  2816. {
  2817. int idx = mi2s_get_port_idx(kcontrol);
  2818. if (idx < 0)
  2819. return idx;
  2820. mi2s_tx_cfg[idx].sample_rate =
  2821. mi2s_get_sample_rate(ucontrol->value.enumerated.item[0]);
  2822. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2823. idx, mi2s_tx_cfg[idx].sample_rate,
  2824. ucontrol->value.enumerated.item[0]);
  2825. return 0;
  2826. }
  2827. static int mi2s_tx_sample_rate_get(struct snd_kcontrol *kcontrol,
  2828. struct snd_ctl_elem_value *ucontrol)
  2829. {
  2830. int idx = mi2s_get_port_idx(kcontrol);
  2831. if (idx < 0)
  2832. return idx;
  2833. ucontrol->value.enumerated.item[0] =
  2834. mi2s_get_sample_rate_val(mi2s_tx_cfg[idx].sample_rate);
  2835. pr_debug("%s: idx[%d]_tx_sample_rate = %d, item = %d\n", __func__,
  2836. idx, mi2s_tx_cfg[idx].sample_rate,
  2837. ucontrol->value.enumerated.item[0]);
  2838. return 0;
  2839. }
  2840. static int msm_mi2s_rx_ch_get(struct snd_kcontrol *kcontrol,
  2841. struct snd_ctl_elem_value *ucontrol)
  2842. {
  2843. int idx = mi2s_get_port_idx(kcontrol);
  2844. if (idx < 0)
  2845. return idx;
  2846. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2847. idx, mi2s_rx_cfg[idx].channels);
  2848. ucontrol->value.enumerated.item[0] = mi2s_rx_cfg[idx].channels - 1;
  2849. return 0;
  2850. }
  2851. static int msm_mi2s_rx_ch_put(struct snd_kcontrol *kcontrol,
  2852. struct snd_ctl_elem_value *ucontrol)
  2853. {
  2854. int idx = mi2s_get_port_idx(kcontrol);
  2855. if (idx < 0)
  2856. return idx;
  2857. mi2s_rx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2858. pr_debug("%s: msm_mi2s_[%d]_rx_ch = %d\n", __func__,
  2859. idx, mi2s_rx_cfg[idx].channels);
  2860. return 1;
  2861. }
  2862. static int msm_mi2s_tx_ch_get(struct snd_kcontrol *kcontrol,
  2863. struct snd_ctl_elem_value *ucontrol)
  2864. {
  2865. int idx = mi2s_get_port_idx(kcontrol);
  2866. if (idx < 0)
  2867. return idx;
  2868. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2869. idx, mi2s_tx_cfg[idx].channels);
  2870. ucontrol->value.enumerated.item[0] = mi2s_tx_cfg[idx].channels - 1;
  2871. return 0;
  2872. }
  2873. static int msm_mi2s_tx_ch_put(struct snd_kcontrol *kcontrol,
  2874. struct snd_ctl_elem_value *ucontrol)
  2875. {
  2876. int idx = mi2s_get_port_idx(kcontrol);
  2877. if (idx < 0)
  2878. return idx;
  2879. mi2s_tx_cfg[idx].channels = ucontrol->value.enumerated.item[0] + 1;
  2880. pr_debug("%s: msm_mi2s_[%d]_tx_ch = %d\n", __func__,
  2881. idx, mi2s_tx_cfg[idx].channels);
  2882. return 1;
  2883. }
  2884. static int msm_mi2s_rx_format_get(struct snd_kcontrol *kcontrol,
  2885. struct snd_ctl_elem_value *ucontrol)
  2886. {
  2887. int idx = mi2s_get_port_idx(kcontrol);
  2888. if (idx < 0)
  2889. return idx;
  2890. ucontrol->value.enumerated.item[0] =
  2891. mi2s_auxpcm_get_format_value(mi2s_rx_cfg[idx].bit_format);
  2892. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2893. idx, mi2s_rx_cfg[idx].bit_format,
  2894. ucontrol->value.enumerated.item[0]);
  2895. return 0;
  2896. }
  2897. static int msm_mi2s_rx_format_put(struct snd_kcontrol *kcontrol,
  2898. struct snd_ctl_elem_value *ucontrol)
  2899. {
  2900. int idx = mi2s_get_port_idx(kcontrol);
  2901. if (idx < 0)
  2902. return idx;
  2903. mi2s_rx_cfg[idx].bit_format =
  2904. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2905. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2906. idx, mi2s_rx_cfg[idx].bit_format,
  2907. ucontrol->value.enumerated.item[0]);
  2908. return 0;
  2909. }
  2910. static int msm_mi2s_tx_format_get(struct snd_kcontrol *kcontrol,
  2911. struct snd_ctl_elem_value *ucontrol)
  2912. {
  2913. int idx = mi2s_get_port_idx(kcontrol);
  2914. if (idx < 0)
  2915. return idx;
  2916. ucontrol->value.enumerated.item[0] =
  2917. mi2s_auxpcm_get_format_value(mi2s_tx_cfg[idx].bit_format);
  2918. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2919. idx, mi2s_tx_cfg[idx].bit_format,
  2920. ucontrol->value.enumerated.item[0]);
  2921. return 0;
  2922. }
  2923. static int msm_mi2s_tx_format_put(struct snd_kcontrol *kcontrol,
  2924. struct snd_ctl_elem_value *ucontrol)
  2925. {
  2926. int idx = mi2s_get_port_idx(kcontrol);
  2927. if (idx < 0)
  2928. return idx;
  2929. mi2s_tx_cfg[idx].bit_format =
  2930. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2931. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2932. idx, mi2s_tx_cfg[idx].bit_format,
  2933. ucontrol->value.enumerated.item[0]);
  2934. return 0;
  2935. }
  2936. static int msm_aux_pcm_rx_format_get(struct snd_kcontrol *kcontrol,
  2937. struct snd_ctl_elem_value *ucontrol)
  2938. {
  2939. int idx = aux_pcm_get_port_idx(kcontrol);
  2940. if (idx < 0)
  2941. return idx;
  2942. ucontrol->value.enumerated.item[0] =
  2943. mi2s_auxpcm_get_format_value(aux_pcm_rx_cfg[idx].bit_format);
  2944. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2945. idx, aux_pcm_rx_cfg[idx].bit_format,
  2946. ucontrol->value.enumerated.item[0]);
  2947. return 0;
  2948. }
  2949. static int msm_aux_pcm_rx_format_put(struct snd_kcontrol *kcontrol,
  2950. struct snd_ctl_elem_value *ucontrol)
  2951. {
  2952. int idx = aux_pcm_get_port_idx(kcontrol);
  2953. if (idx < 0)
  2954. return idx;
  2955. aux_pcm_rx_cfg[idx].bit_format =
  2956. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2957. pr_debug("%s: idx[%d]_rx_format = %d, item = %d\n", __func__,
  2958. idx, aux_pcm_rx_cfg[idx].bit_format,
  2959. ucontrol->value.enumerated.item[0]);
  2960. return 0;
  2961. }
  2962. static int msm_aux_pcm_tx_format_get(struct snd_kcontrol *kcontrol,
  2963. struct snd_ctl_elem_value *ucontrol)
  2964. {
  2965. int idx = aux_pcm_get_port_idx(kcontrol);
  2966. if (idx < 0)
  2967. return idx;
  2968. ucontrol->value.enumerated.item[0] =
  2969. mi2s_auxpcm_get_format_value(aux_pcm_tx_cfg[idx].bit_format);
  2970. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2971. idx, aux_pcm_tx_cfg[idx].bit_format,
  2972. ucontrol->value.enumerated.item[0]);
  2973. return 0;
  2974. }
  2975. static int msm_aux_pcm_tx_format_put(struct snd_kcontrol *kcontrol,
  2976. struct snd_ctl_elem_value *ucontrol)
  2977. {
  2978. int idx = aux_pcm_get_port_idx(kcontrol);
  2979. if (idx < 0)
  2980. return idx;
  2981. aux_pcm_tx_cfg[idx].bit_format =
  2982. mi2s_auxpcm_get_format(ucontrol->value.enumerated.item[0]);
  2983. pr_debug("%s: idx[%d]_tx_format = %d, item = %d\n", __func__,
  2984. idx, aux_pcm_tx_cfg[idx].bit_format,
  2985. ucontrol->value.enumerated.item[0]);
  2986. return 0;
  2987. }
  2988. static int msm_hifi_ctrl(struct snd_soc_codec *codec)
  2989. {
  2990. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  2991. struct snd_soc_card *card = codec->component.card;
  2992. struct msm_asoc_mach_data *pdata =
  2993. snd_soc_card_get_drvdata(card);
  2994. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n", __func__,
  2995. msm_hifi_control);
  2996. if (!pdata || !pdata->hph_en1_gpio_p) {
  2997. dev_err(codec->dev, "%s: hph_en1_gpio is invalid\n", __func__);
  2998. return -EINVAL;
  2999. }
  3000. if (msm_hifi_control == MSM_HIFI_ON) {
  3001. msm_cdc_pinctrl_select_active_state(pdata->hph_en1_gpio_p);
  3002. /* 5msec delay needed as per HW requirement */
  3003. usleep_range(5000, 5010);
  3004. } else {
  3005. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en1_gpio_p);
  3006. }
  3007. snd_soc_dapm_sync(dapm);
  3008. return 0;
  3009. }
  3010. static int msm_hifi_get(struct snd_kcontrol *kcontrol,
  3011. struct snd_ctl_elem_value *ucontrol)
  3012. {
  3013. pr_debug("%s: msm_hifi_control = %d\n",
  3014. __func__, msm_hifi_control);
  3015. ucontrol->value.integer.value[0] = msm_hifi_control;
  3016. return 0;
  3017. }
  3018. static int msm_hifi_put(struct snd_kcontrol *kcontrol,
  3019. struct snd_ctl_elem_value *ucontrol)
  3020. {
  3021. struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
  3022. dev_dbg(codec->dev, "%s: ucontrol->value.integer.value[0] = %ld\n",
  3023. __func__, ucontrol->value.integer.value[0]);
  3024. msm_hifi_control = ucontrol->value.integer.value[0];
  3025. msm_hifi_ctrl(codec);
  3026. return 0;
  3027. }
  3028. static const struct snd_kcontrol_new msm_int_snd_controls[] = {
  3029. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Channels", wsa_cdc_dma_rx_0_chs,
  3030. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3031. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Channels", wsa_cdc_dma_rx_1_chs,
  3032. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3033. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Channels", rx_cdc_dma_rx_0_chs,
  3034. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3035. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Channels", rx_cdc_dma_rx_1_chs,
  3036. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3037. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Channels", rx_cdc_dma_rx_2_chs,
  3038. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3039. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Channels", rx_cdc_dma_rx_3_chs,
  3040. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3041. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Channels", rx_cdc_dma_rx_5_chs,
  3042. cdc_dma_rx_ch_get, cdc_dma_rx_ch_put),
  3043. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 Channels", wsa_cdc_dma_tx_0_chs,
  3044. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3045. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Channels", wsa_cdc_dma_tx_1_chs,
  3046. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3047. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Channels", wsa_cdc_dma_tx_2_chs,
  3048. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3049. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Channels", tx_cdc_dma_tx_0_chs,
  3050. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3051. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Channels", tx_cdc_dma_tx_3_chs,
  3052. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3053. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Channels", tx_cdc_dma_tx_4_chs,
  3054. cdc_dma_tx_ch_get, cdc_dma_tx_ch_put),
  3055. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 Format", wsa_cdc_dma_rx_0_format,
  3056. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3057. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 Format", wsa_cdc_dma_rx_1_format,
  3058. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3059. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 Format", rx_cdc_dma_rx_0_format,
  3060. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3061. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 Format", rx_cdc_dma_rx_1_format,
  3062. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3063. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 Format", rx_cdc_dma_rx_2_format,
  3064. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3065. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 Format", rx_cdc_dma_rx_3_format,
  3066. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3067. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 Format", rx_cdc_dma_rx_5_format,
  3068. cdc_dma_rx_format_get, cdc_dma_rx_format_put),
  3069. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 Format", wsa_cdc_dma_tx_1_format,
  3070. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3071. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 Format", wsa_cdc_dma_tx_2_format,
  3072. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3073. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 Format", tx_cdc_dma_tx_0_format,
  3074. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3075. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 Format", tx_cdc_dma_tx_3_format,
  3076. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3077. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 Format", tx_cdc_dma_tx_4_format,
  3078. cdc_dma_tx_format_get, cdc_dma_tx_format_put),
  3079. SOC_ENUM_EXT("WSA_CDC_DMA_RX_0 SampleRate",
  3080. wsa_cdc_dma_rx_0_sample_rate,
  3081. cdc_dma_rx_sample_rate_get,
  3082. cdc_dma_rx_sample_rate_put),
  3083. SOC_ENUM_EXT("WSA_CDC_DMA_RX_1 SampleRate",
  3084. wsa_cdc_dma_rx_1_sample_rate,
  3085. cdc_dma_rx_sample_rate_get,
  3086. cdc_dma_rx_sample_rate_put),
  3087. SOC_ENUM_EXT("RX_CDC_DMA_RX_0 SampleRate",
  3088. rx_cdc_dma_rx_0_sample_rate,
  3089. cdc_dma_rx_sample_rate_get,
  3090. cdc_dma_rx_sample_rate_put),
  3091. SOC_ENUM_EXT("RX_CDC_DMA_RX_1 SampleRate",
  3092. rx_cdc_dma_rx_1_sample_rate,
  3093. cdc_dma_rx_sample_rate_get,
  3094. cdc_dma_rx_sample_rate_put),
  3095. SOC_ENUM_EXT("RX_CDC_DMA_RX_2 SampleRate",
  3096. rx_cdc_dma_rx_2_sample_rate,
  3097. cdc_dma_rx_sample_rate_get,
  3098. cdc_dma_rx_sample_rate_put),
  3099. SOC_ENUM_EXT("RX_CDC_DMA_RX_3 SampleRate",
  3100. rx_cdc_dma_rx_3_sample_rate,
  3101. cdc_dma_rx_sample_rate_get,
  3102. cdc_dma_rx_sample_rate_put),
  3103. SOC_ENUM_EXT("RX_CDC_DMA_RX_5 SampleRate",
  3104. rx_cdc_dma_rx_5_sample_rate,
  3105. cdc_dma_rx_sample_rate_get,
  3106. cdc_dma_rx_sample_rate_put),
  3107. SOC_ENUM_EXT("WSA_CDC_DMA_TX_0 SampleRate",
  3108. wsa_cdc_dma_tx_0_sample_rate,
  3109. cdc_dma_tx_sample_rate_get,
  3110. cdc_dma_tx_sample_rate_put),
  3111. SOC_ENUM_EXT("WSA_CDC_DMA_TX_1 SampleRate",
  3112. wsa_cdc_dma_tx_1_sample_rate,
  3113. cdc_dma_tx_sample_rate_get,
  3114. cdc_dma_tx_sample_rate_put),
  3115. SOC_ENUM_EXT("WSA_CDC_DMA_TX_2 SampleRate",
  3116. wsa_cdc_dma_tx_2_sample_rate,
  3117. cdc_dma_tx_sample_rate_get,
  3118. cdc_dma_tx_sample_rate_put),
  3119. SOC_ENUM_EXT("TX_CDC_DMA_TX_0 SampleRate",
  3120. tx_cdc_dma_tx_0_sample_rate,
  3121. cdc_dma_tx_sample_rate_get,
  3122. cdc_dma_tx_sample_rate_put),
  3123. SOC_ENUM_EXT("TX_CDC_DMA_TX_3 SampleRate",
  3124. tx_cdc_dma_tx_3_sample_rate,
  3125. cdc_dma_tx_sample_rate_get,
  3126. cdc_dma_tx_sample_rate_put),
  3127. SOC_ENUM_EXT("TX_CDC_DMA_TX_4 SampleRate",
  3128. tx_cdc_dma_tx_4_sample_rate,
  3129. cdc_dma_tx_sample_rate_get,
  3130. cdc_dma_tx_sample_rate_put),
  3131. };
  3132. static const struct snd_kcontrol_new msm_tavil_snd_controls[] = {
  3133. SOC_ENUM_EXT("SLIM_0_RX Channels", slim_0_rx_chs,
  3134. slim_rx_ch_get, slim_rx_ch_put),
  3135. SOC_ENUM_EXT("SLIM_2_RX Channels", slim_2_rx_chs,
  3136. slim_rx_ch_get, slim_rx_ch_put),
  3137. SOC_ENUM_EXT("SLIM_0_TX Channels", slim_0_tx_chs,
  3138. slim_tx_ch_get, slim_tx_ch_put),
  3139. SOC_ENUM_EXT("SLIM_1_TX Channels", slim_1_tx_chs,
  3140. slim_tx_ch_get, slim_tx_ch_put),
  3141. SOC_ENUM_EXT("SLIM_5_RX Channels", slim_5_rx_chs,
  3142. slim_rx_ch_get, slim_rx_ch_put),
  3143. SOC_ENUM_EXT("SLIM_6_RX Channels", slim_6_rx_chs,
  3144. slim_rx_ch_get, slim_rx_ch_put),
  3145. SOC_ENUM_EXT("SLIM_0_RX Format", slim_0_rx_format,
  3146. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3147. SOC_ENUM_EXT("SLIM_5_RX Format", slim_5_rx_format,
  3148. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3149. SOC_ENUM_EXT("SLIM_6_RX Format", slim_6_rx_format,
  3150. slim_rx_bit_format_get, slim_rx_bit_format_put),
  3151. SOC_ENUM_EXT("SLIM_0_TX Format", slim_0_tx_format,
  3152. slim_tx_bit_format_get, slim_tx_bit_format_put),
  3153. SOC_ENUM_EXT("SLIM_0_RX SampleRate", slim_0_rx_sample_rate,
  3154. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3155. SOC_ENUM_EXT("SLIM_2_RX SampleRate", slim_2_rx_sample_rate,
  3156. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3157. SOC_ENUM_EXT("SLIM_0_TX SampleRate", slim_0_tx_sample_rate,
  3158. slim_tx_sample_rate_get, slim_tx_sample_rate_put),
  3159. SOC_ENUM_EXT("SLIM_5_RX SampleRate", slim_5_rx_sample_rate,
  3160. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3161. SOC_ENUM_EXT("SLIM_6_RX SampleRate", slim_6_rx_sample_rate,
  3162. slim_rx_sample_rate_get, slim_rx_sample_rate_put),
  3163. };
  3164. static const struct snd_kcontrol_new msm_common_snd_controls[] = {
  3165. SOC_ENUM_EXT("USB_AUDIO_RX Channels", usb_rx_chs,
  3166. usb_audio_rx_ch_get, usb_audio_rx_ch_put),
  3167. SOC_ENUM_EXT("USB_AUDIO_TX Channels", usb_tx_chs,
  3168. usb_audio_tx_ch_get, usb_audio_tx_ch_put),
  3169. SOC_ENUM_EXT("Display Port RX Channels", ext_disp_rx_chs,
  3170. ext_disp_rx_ch_get, ext_disp_rx_ch_put),
  3171. SOC_ENUM_EXT("PROXY_RX Channels", proxy_rx_chs,
  3172. proxy_rx_ch_get, proxy_rx_ch_put),
  3173. SOC_ENUM_EXT("USB_AUDIO_RX Format", usb_rx_format,
  3174. usb_audio_rx_format_get, usb_audio_rx_format_put),
  3175. SOC_ENUM_EXT("USB_AUDIO_TX Format", usb_tx_format,
  3176. usb_audio_tx_format_get, usb_audio_tx_format_put),
  3177. SOC_ENUM_EXT("Display Port RX Bit Format", ext_disp_rx_format,
  3178. ext_disp_rx_format_get, ext_disp_rx_format_put),
  3179. SOC_ENUM_EXT("USB_AUDIO_RX SampleRate", usb_rx_sample_rate,
  3180. usb_audio_rx_sample_rate_get,
  3181. usb_audio_rx_sample_rate_put),
  3182. SOC_ENUM_EXT("USB_AUDIO_TX SampleRate", usb_tx_sample_rate,
  3183. usb_audio_tx_sample_rate_get,
  3184. usb_audio_tx_sample_rate_put),
  3185. SOC_ENUM_EXT("Display Port RX SampleRate", ext_disp_rx_sample_rate,
  3186. ext_disp_rx_sample_rate_get,
  3187. ext_disp_rx_sample_rate_put),
  3188. SOC_ENUM_EXT("PRI_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3189. tdm_rx_sample_rate_get,
  3190. tdm_rx_sample_rate_put),
  3191. SOC_ENUM_EXT("PRI_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3192. tdm_tx_sample_rate_get,
  3193. tdm_tx_sample_rate_put),
  3194. SOC_ENUM_EXT("PRI_TDM_RX_0 Format", tdm_rx_format,
  3195. tdm_rx_format_get,
  3196. tdm_rx_format_put),
  3197. SOC_ENUM_EXT("PRI_TDM_TX_0 Format", tdm_tx_format,
  3198. tdm_tx_format_get,
  3199. tdm_tx_format_put),
  3200. SOC_ENUM_EXT("PRI_TDM_RX_0 Channels", tdm_rx_chs,
  3201. tdm_rx_ch_get,
  3202. tdm_rx_ch_put),
  3203. SOC_ENUM_EXT("PRI_TDM_TX_0 Channels", tdm_tx_chs,
  3204. tdm_tx_ch_get,
  3205. tdm_tx_ch_put),
  3206. SOC_ENUM_EXT("SEC_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3207. tdm_rx_sample_rate_get,
  3208. tdm_rx_sample_rate_put),
  3209. SOC_ENUM_EXT("SEC_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3210. tdm_tx_sample_rate_get,
  3211. tdm_tx_sample_rate_put),
  3212. SOC_ENUM_EXT("SEC_TDM_RX_0 Format", tdm_rx_format,
  3213. tdm_rx_format_get,
  3214. tdm_rx_format_put),
  3215. SOC_ENUM_EXT("SEC_TDM_TX_0 Format", tdm_tx_format,
  3216. tdm_tx_format_get,
  3217. tdm_tx_format_put),
  3218. SOC_ENUM_EXT("SEC_TDM_RX_0 Channels", tdm_rx_chs,
  3219. tdm_rx_ch_get,
  3220. tdm_rx_ch_put),
  3221. SOC_ENUM_EXT("SEC_TDM_TX_0 Channels", tdm_tx_chs,
  3222. tdm_tx_ch_get,
  3223. tdm_tx_ch_put),
  3224. SOC_ENUM_EXT("TERT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3225. tdm_rx_sample_rate_get,
  3226. tdm_rx_sample_rate_put),
  3227. SOC_ENUM_EXT("TERT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3228. tdm_tx_sample_rate_get,
  3229. tdm_tx_sample_rate_put),
  3230. SOC_ENUM_EXT("TERT_TDM_RX_0 Format", tdm_rx_format,
  3231. tdm_rx_format_get,
  3232. tdm_rx_format_put),
  3233. SOC_ENUM_EXT("TERT_TDM_TX_0 Format", tdm_tx_format,
  3234. tdm_tx_format_get,
  3235. tdm_tx_format_put),
  3236. SOC_ENUM_EXT("TERT_TDM_RX_0 Channels", tdm_rx_chs,
  3237. tdm_rx_ch_get,
  3238. tdm_rx_ch_put),
  3239. SOC_ENUM_EXT("TERT_TDM_TX_0 Channels", tdm_tx_chs,
  3240. tdm_tx_ch_get,
  3241. tdm_tx_ch_put),
  3242. SOC_ENUM_EXT("QUAT_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3243. tdm_rx_sample_rate_get,
  3244. tdm_rx_sample_rate_put),
  3245. SOC_ENUM_EXT("QUAT_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3246. tdm_tx_sample_rate_get,
  3247. tdm_tx_sample_rate_put),
  3248. SOC_ENUM_EXT("QUAT_TDM_RX_0 Format", tdm_rx_format,
  3249. tdm_rx_format_get,
  3250. tdm_rx_format_put),
  3251. SOC_ENUM_EXT("QUAT_TDM_TX_0 Format", tdm_tx_format,
  3252. tdm_tx_format_get,
  3253. tdm_tx_format_put),
  3254. SOC_ENUM_EXT("QUAT_TDM_RX_0 Channels", tdm_rx_chs,
  3255. tdm_rx_ch_get,
  3256. tdm_rx_ch_put),
  3257. SOC_ENUM_EXT("QUAT_TDM_TX_0 Channels", tdm_tx_chs,
  3258. tdm_tx_ch_get,
  3259. tdm_tx_ch_put),
  3260. SOC_ENUM_EXT("QUIN_TDM_RX_0 SampleRate", tdm_rx_sample_rate,
  3261. tdm_rx_sample_rate_get,
  3262. tdm_rx_sample_rate_put),
  3263. SOC_ENUM_EXT("QUIN_TDM_TX_0 SampleRate", tdm_tx_sample_rate,
  3264. tdm_tx_sample_rate_get,
  3265. tdm_tx_sample_rate_put),
  3266. SOC_ENUM_EXT("QUIN_TDM_RX_0 Format", tdm_rx_format,
  3267. tdm_rx_format_get,
  3268. tdm_rx_format_put),
  3269. SOC_ENUM_EXT("QUIN_TDM_TX_0 Format", tdm_tx_format,
  3270. tdm_tx_format_get,
  3271. tdm_tx_format_put),
  3272. SOC_ENUM_EXT("QUIN_TDM_RX_0 Channels", tdm_rx_chs,
  3273. tdm_rx_ch_get,
  3274. tdm_rx_ch_put),
  3275. SOC_ENUM_EXT("QUIN_TDM_TX_0 Channels", tdm_tx_chs,
  3276. tdm_tx_ch_get,
  3277. tdm_tx_ch_put),
  3278. SOC_ENUM_EXT("PRIM_AUX_PCM_RX SampleRate", prim_aux_pcm_rx_sample_rate,
  3279. aux_pcm_rx_sample_rate_get,
  3280. aux_pcm_rx_sample_rate_put),
  3281. SOC_ENUM_EXT("SEC_AUX_PCM_RX SampleRate", sec_aux_pcm_rx_sample_rate,
  3282. aux_pcm_rx_sample_rate_get,
  3283. aux_pcm_rx_sample_rate_put),
  3284. SOC_ENUM_EXT("TERT_AUX_PCM_RX SampleRate", tert_aux_pcm_rx_sample_rate,
  3285. aux_pcm_rx_sample_rate_get,
  3286. aux_pcm_rx_sample_rate_put),
  3287. SOC_ENUM_EXT("QUAT_AUX_PCM_RX SampleRate", quat_aux_pcm_rx_sample_rate,
  3288. aux_pcm_rx_sample_rate_get,
  3289. aux_pcm_rx_sample_rate_put),
  3290. SOC_ENUM_EXT("QUIN_AUX_PCM_RX SampleRate", quin_aux_pcm_rx_sample_rate,
  3291. aux_pcm_rx_sample_rate_get,
  3292. aux_pcm_rx_sample_rate_put),
  3293. SOC_ENUM_EXT("PRIM_AUX_PCM_TX SampleRate", prim_aux_pcm_tx_sample_rate,
  3294. aux_pcm_tx_sample_rate_get,
  3295. aux_pcm_tx_sample_rate_put),
  3296. SOC_ENUM_EXT("SEC_AUX_PCM_TX SampleRate", sec_aux_pcm_tx_sample_rate,
  3297. aux_pcm_tx_sample_rate_get,
  3298. aux_pcm_tx_sample_rate_put),
  3299. SOC_ENUM_EXT("TERT_AUX_PCM_TX SampleRate", tert_aux_pcm_tx_sample_rate,
  3300. aux_pcm_tx_sample_rate_get,
  3301. aux_pcm_tx_sample_rate_put),
  3302. SOC_ENUM_EXT("QUAT_AUX_PCM_TX SampleRate", quat_aux_pcm_tx_sample_rate,
  3303. aux_pcm_tx_sample_rate_get,
  3304. aux_pcm_tx_sample_rate_put),
  3305. SOC_ENUM_EXT("QUIN_AUX_PCM_TX SampleRate", quin_aux_pcm_tx_sample_rate,
  3306. aux_pcm_tx_sample_rate_get,
  3307. aux_pcm_tx_sample_rate_put),
  3308. SOC_ENUM_EXT("PRIM_MI2S_RX SampleRate", prim_mi2s_rx_sample_rate,
  3309. mi2s_rx_sample_rate_get,
  3310. mi2s_rx_sample_rate_put),
  3311. SOC_ENUM_EXT("SEC_MI2S_RX SampleRate", sec_mi2s_rx_sample_rate,
  3312. mi2s_rx_sample_rate_get,
  3313. mi2s_rx_sample_rate_put),
  3314. SOC_ENUM_EXT("TERT_MI2S_RX SampleRate", tert_mi2s_rx_sample_rate,
  3315. mi2s_rx_sample_rate_get,
  3316. mi2s_rx_sample_rate_put),
  3317. SOC_ENUM_EXT("QUAT_MI2S_RX SampleRate", quat_mi2s_rx_sample_rate,
  3318. mi2s_rx_sample_rate_get,
  3319. mi2s_rx_sample_rate_put),
  3320. SOC_ENUM_EXT("QUIN_MI2S_RX SampleRate", quin_mi2s_rx_sample_rate,
  3321. mi2s_rx_sample_rate_get,
  3322. mi2s_rx_sample_rate_put),
  3323. SOC_ENUM_EXT("PRIM_MI2S_TX SampleRate", prim_mi2s_tx_sample_rate,
  3324. mi2s_tx_sample_rate_get,
  3325. mi2s_tx_sample_rate_put),
  3326. SOC_ENUM_EXT("SEC_MI2S_TX SampleRate", sec_mi2s_tx_sample_rate,
  3327. mi2s_tx_sample_rate_get,
  3328. mi2s_tx_sample_rate_put),
  3329. SOC_ENUM_EXT("TERT_MI2S_TX SampleRate", tert_mi2s_tx_sample_rate,
  3330. mi2s_tx_sample_rate_get,
  3331. mi2s_tx_sample_rate_put),
  3332. SOC_ENUM_EXT("QUAT_MI2S_TX SampleRate", quat_mi2s_tx_sample_rate,
  3333. mi2s_tx_sample_rate_get,
  3334. mi2s_tx_sample_rate_put),
  3335. SOC_ENUM_EXT("QUIN_MI2S_TX SampleRate", quin_mi2s_tx_sample_rate,
  3336. mi2s_tx_sample_rate_get,
  3337. mi2s_tx_sample_rate_put),
  3338. SOC_ENUM_EXT("PRIM_MI2S_RX Channels", prim_mi2s_rx_chs,
  3339. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3340. SOC_ENUM_EXT("PRIM_MI2S_TX Channels", prim_mi2s_tx_chs,
  3341. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3342. SOC_ENUM_EXT("SEC_MI2S_RX Channels", sec_mi2s_rx_chs,
  3343. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3344. SOC_ENUM_EXT("SEC_MI2S_TX Channels", sec_mi2s_tx_chs,
  3345. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3346. SOC_ENUM_EXT("TERT_MI2S_RX Channels", tert_mi2s_rx_chs,
  3347. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3348. SOC_ENUM_EXT("TERT_MI2S_TX Channels", tert_mi2s_tx_chs,
  3349. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3350. SOC_ENUM_EXT("QUAT_MI2S_RX Channels", quat_mi2s_rx_chs,
  3351. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3352. SOC_ENUM_EXT("QUAT_MI2S_TX Channels", quat_mi2s_tx_chs,
  3353. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3354. SOC_ENUM_EXT("QUIN_MI2S_RX Channels", quin_mi2s_rx_chs,
  3355. msm_mi2s_rx_ch_get, msm_mi2s_rx_ch_put),
  3356. SOC_ENUM_EXT("QUIN_MI2S_TX Channels", quin_mi2s_tx_chs,
  3357. msm_mi2s_tx_ch_get, msm_mi2s_tx_ch_put),
  3358. SOC_ENUM_EXT("PRIM_MI2S_RX Format", mi2s_rx_format,
  3359. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3360. SOC_ENUM_EXT("PRIM_MI2S_TX Format", mi2s_tx_format,
  3361. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3362. SOC_ENUM_EXT("SEC_MI2S_RX Format", mi2s_rx_format,
  3363. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3364. SOC_ENUM_EXT("SEC_MI2S_TX Format", mi2s_tx_format,
  3365. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3366. SOC_ENUM_EXT("TERT_MI2S_RX Format", mi2s_rx_format,
  3367. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3368. SOC_ENUM_EXT("TERT_MI2S_TX Format", mi2s_tx_format,
  3369. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3370. SOC_ENUM_EXT("QUAT_MI2S_RX Format", mi2s_rx_format,
  3371. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3372. SOC_ENUM_EXT("QUAT_MI2S_TX Format", mi2s_tx_format,
  3373. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3374. SOC_ENUM_EXT("QUIN_MI2S_RX Format", mi2s_rx_format,
  3375. msm_mi2s_rx_format_get, msm_mi2s_rx_format_put),
  3376. SOC_ENUM_EXT("QUIN_MI2S_TX Format", mi2s_tx_format,
  3377. msm_mi2s_tx_format_get, msm_mi2s_tx_format_put),
  3378. SOC_ENUM_EXT("PRIM_AUX_PCM_RX Format", aux_pcm_rx_format,
  3379. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3380. SOC_ENUM_EXT("PRIM_AUX_PCM_TX Format", aux_pcm_tx_format,
  3381. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3382. SOC_ENUM_EXT("SEC_AUX_PCM_RX Format", aux_pcm_rx_format,
  3383. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3384. SOC_ENUM_EXT("SEC_AUX_PCM_TX Format", aux_pcm_tx_format,
  3385. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3386. SOC_ENUM_EXT("TERT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3387. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3388. SOC_ENUM_EXT("TERT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3389. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3390. SOC_ENUM_EXT("QUAT_AUX_PCM_RX Format", aux_pcm_rx_format,
  3391. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3392. SOC_ENUM_EXT("QUAT_AUX_PCM_TX Format", aux_pcm_tx_format,
  3393. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3394. SOC_ENUM_EXT("QUIN_AUX_PCM_RX Format", aux_pcm_rx_format,
  3395. msm_aux_pcm_rx_format_get, msm_aux_pcm_rx_format_put),
  3396. SOC_ENUM_EXT("QUIN_AUX_PCM_TX Format", aux_pcm_tx_format,
  3397. msm_aux_pcm_tx_format_get, msm_aux_pcm_tx_format_put),
  3398. SOC_ENUM_EXT("HiFi Function", hifi_function, msm_hifi_get,
  3399. msm_hifi_put),
  3400. SOC_ENUM_EXT("BT SampleRate", bt_sample_rate,
  3401. msm_bt_sample_rate_get,
  3402. msm_bt_sample_rate_put),
  3403. SOC_ENUM_EXT("BT SampleRate RX", bt_sample_rate_rx,
  3404. msm_bt_sample_rate_rx_get,
  3405. msm_bt_sample_rate_rx_put),
  3406. SOC_ENUM_EXT("BT SampleRate TX", bt_sample_rate_tx,
  3407. msm_bt_sample_rate_tx_get,
  3408. msm_bt_sample_rate_tx_put),
  3409. SOC_ENUM_EXT("VI_FEED_TX Channels", vi_feed_tx_chs,
  3410. msm_vi_feed_tx_ch_get, msm_vi_feed_tx_ch_put),
  3411. };
  3412. static int msm_snd_enable_codec_ext_clk(struct snd_soc_codec *codec,
  3413. int enable, bool dapm)
  3414. {
  3415. int ret = 0;
  3416. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3417. ret = tavil_cdc_mclk_enable(codec, enable);
  3418. } else {
  3419. dev_err(codec->dev, "%s: unknown codec to enable ext clk\n",
  3420. __func__);
  3421. ret = -EINVAL;
  3422. }
  3423. return ret;
  3424. }
  3425. static int msm_snd_enable_codec_ext_tx_clk(struct snd_soc_codec *codec,
  3426. int enable, bool dapm)
  3427. {
  3428. int ret = 0;
  3429. if (!strcmp(dev_name(codec->dev), "tavil_codec")) {
  3430. ret = tavil_cdc_mclk_tx_enable(codec, enable);
  3431. } else {
  3432. dev_err(codec->dev, "%s: unknown codec to enable TX ext clk\n",
  3433. __func__);
  3434. ret = -EINVAL;
  3435. }
  3436. return ret;
  3437. }
  3438. static int msm_mclk_tx_event(struct snd_soc_dapm_widget *w,
  3439. struct snd_kcontrol *kcontrol, int event)
  3440. {
  3441. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3442. pr_debug("%s: event = %d\n", __func__, event);
  3443. switch (event) {
  3444. case SND_SOC_DAPM_PRE_PMU:
  3445. return msm_snd_enable_codec_ext_tx_clk(codec, 1, true);
  3446. case SND_SOC_DAPM_POST_PMD:
  3447. return msm_snd_enable_codec_ext_tx_clk(codec, 0, true);
  3448. }
  3449. return 0;
  3450. }
  3451. static int msm_mclk_event(struct snd_soc_dapm_widget *w,
  3452. struct snd_kcontrol *kcontrol, int event)
  3453. {
  3454. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3455. pr_debug("%s: event = %d\n", __func__, event);
  3456. switch (event) {
  3457. case SND_SOC_DAPM_PRE_PMU:
  3458. return msm_snd_enable_codec_ext_clk(codec, 1, true);
  3459. case SND_SOC_DAPM_POST_PMD:
  3460. return msm_snd_enable_codec_ext_clk(codec, 0, true);
  3461. }
  3462. return 0;
  3463. }
  3464. static int msm_hifi_ctrl_event(struct snd_soc_dapm_widget *w,
  3465. struct snd_kcontrol *k, int event)
  3466. {
  3467. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3468. struct snd_soc_card *card = codec->component.card;
  3469. struct msm_asoc_mach_data *pdata =
  3470. snd_soc_card_get_drvdata(card);
  3471. dev_dbg(codec->dev, "%s: msm_hifi_control = %d\n",
  3472. __func__, msm_hifi_control);
  3473. if (!pdata || !pdata->hph_en0_gpio_p) {
  3474. dev_err(codec->dev, "%s: hph_en0_gpio is invalid\n", __func__);
  3475. return -EINVAL;
  3476. }
  3477. if (msm_hifi_control != MSM_HIFI_ON) {
  3478. dev_dbg(codec->dev, "%s: HiFi mixer control is not set\n",
  3479. __func__);
  3480. return 0;
  3481. }
  3482. switch (event) {
  3483. case SND_SOC_DAPM_POST_PMU:
  3484. msm_cdc_pinctrl_select_active_state(pdata->hph_en0_gpio_p);
  3485. break;
  3486. case SND_SOC_DAPM_PRE_PMD:
  3487. msm_cdc_pinctrl_select_sleep_state(pdata->hph_en0_gpio_p);
  3488. break;
  3489. }
  3490. return 0;
  3491. }
  3492. static const struct snd_soc_dapm_widget msm_dapm_widgets_tavil[] = {
  3493. SND_SOC_DAPM_SUPPLY("MCLK", SND_SOC_NOPM, 0, 0,
  3494. msm_mclk_event,
  3495. SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3496. SND_SOC_DAPM_SUPPLY("MCLK TX", SND_SOC_NOPM, 0, 0,
  3497. msm_mclk_tx_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
  3498. SND_SOC_DAPM_SPK("Lineout_1 amp", NULL),
  3499. SND_SOC_DAPM_SPK("Lineout_2 amp", NULL),
  3500. SND_SOC_DAPM_SPK("hifi amp", msm_hifi_ctrl_event),
  3501. SND_SOC_DAPM_MIC("Handset Mic", NULL),
  3502. SND_SOC_DAPM_MIC("Headset Mic", NULL),
  3503. SND_SOC_DAPM_MIC("ANCRight Headset Mic", NULL),
  3504. SND_SOC_DAPM_MIC("ANCLeft Headset Mic", NULL),
  3505. SND_SOC_DAPM_MIC("Analog Mic5", NULL),
  3506. SND_SOC_DAPM_MIC("Digital Mic0", NULL),
  3507. SND_SOC_DAPM_MIC("Digital Mic1", NULL),
  3508. SND_SOC_DAPM_MIC("Digital Mic2", NULL),
  3509. SND_SOC_DAPM_MIC("Digital Mic3", NULL),
  3510. SND_SOC_DAPM_MIC("Digital Mic4", NULL),
  3511. SND_SOC_DAPM_MIC("Digital Mic5", NULL),
  3512. };
  3513. static int msm_dmic_event(struct snd_soc_dapm_widget *w,
  3514. struct snd_kcontrol *kcontrol, int event)
  3515. {
  3516. struct msm_asoc_mach_data *pdata = NULL;
  3517. struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
  3518. int ret = 0;
  3519. u32 dmic_idx;
  3520. int *dmic_gpio_cnt;
  3521. struct device_node *dmic_gpio;
  3522. char *wname;
  3523. wname = strpbrk(w->name, "0123");
  3524. if (!wname) {
  3525. dev_err(codec->dev, "%s: widget not found\n", __func__);
  3526. return -EINVAL;
  3527. }
  3528. ret = kstrtouint(wname, 10, &dmic_idx);
  3529. if (ret < 0) {
  3530. dev_err(codec->dev, "%s: Invalid DMIC line on the codec\n",
  3531. __func__);
  3532. return -EINVAL;
  3533. }
  3534. pdata = snd_soc_card_get_drvdata(codec->component.card);
  3535. switch (dmic_idx) {
  3536. case 0:
  3537. case 1:
  3538. dmic_gpio_cnt = &dmic_0_1_gpio_cnt;
  3539. dmic_gpio = pdata->dmic01_gpio_p;
  3540. break;
  3541. case 2:
  3542. case 3:
  3543. dmic_gpio_cnt = &dmic_2_3_gpio_cnt;
  3544. dmic_gpio = pdata->dmic23_gpio_p;
  3545. break;
  3546. default:
  3547. dev_err(codec->dev, "%s: Invalid DMIC Selection\n",
  3548. __func__);
  3549. return -EINVAL;
  3550. }
  3551. dev_dbg(codec->dev, "%s: event %d DMIC%d dmic_gpio_cnt %d\n",
  3552. __func__, event, dmic_idx, *dmic_gpio_cnt);
  3553. switch (event) {
  3554. case SND_SOC_DAPM_PRE_PMU:
  3555. (*dmic_gpio_cnt)++;
  3556. if (*dmic_gpio_cnt == 1) {
  3557. ret = msm_cdc_pinctrl_select_active_state(
  3558. dmic_gpio);
  3559. if (ret < 0) {
  3560. pr_err("%s: gpio set cannot be activated %sd",
  3561. __func__, "dmic_gpio");
  3562. return ret;
  3563. }
  3564. }
  3565. break;
  3566. case SND_SOC_DAPM_POST_PMD:
  3567. (*dmic_gpio_cnt)--;
  3568. if (*dmic_gpio_cnt == 0) {
  3569. ret = msm_cdc_pinctrl_select_sleep_state(
  3570. dmic_gpio);
  3571. if (ret < 0) {
  3572. pr_err("%s: gpio set cannot be de-activated %sd",
  3573. __func__, "dmic_gpio");
  3574. return ret;
  3575. }
  3576. }
  3577. break;
  3578. default:
  3579. pr_err("%s: invalid DAPM event %d\n", __func__, event);
  3580. return -EINVAL;
  3581. }
  3582. return 0;
  3583. }
  3584. static const struct snd_soc_dapm_widget msm_int_dapm_widgets[] = {
  3585. SND_SOC_DAPM_MIC("Analog Mic1", NULL),
  3586. SND_SOC_DAPM_MIC("Analog Mic2", NULL),
  3587. SND_SOC_DAPM_MIC("Analog Mic3", NULL),
  3588. SND_SOC_DAPM_MIC("Analog Mic4", NULL),
  3589. SND_SOC_DAPM_MIC("Digital Mic0", msm_dmic_event),
  3590. SND_SOC_DAPM_MIC("Digital Mic1", msm_dmic_event),
  3591. SND_SOC_DAPM_MIC("Digital Mic2", msm_dmic_event),
  3592. SND_SOC_DAPM_MIC("Digital Mic3", msm_dmic_event),
  3593. };
  3594. static inline int param_is_mask(int p)
  3595. {
  3596. return (p >= SNDRV_PCM_HW_PARAM_FIRST_MASK) &&
  3597. (p <= SNDRV_PCM_HW_PARAM_LAST_MASK);
  3598. }
  3599. static inline struct snd_mask *param_to_mask(struct snd_pcm_hw_params *p,
  3600. int n)
  3601. {
  3602. return &(p->masks[n - SNDRV_PCM_HW_PARAM_FIRST_MASK]);
  3603. }
  3604. static void param_set_mask(struct snd_pcm_hw_params *p, int n,
  3605. unsigned int bit)
  3606. {
  3607. if (bit >= SNDRV_MASK_MAX)
  3608. return;
  3609. if (param_is_mask(n)) {
  3610. struct snd_mask *m = param_to_mask(p, n);
  3611. m->bits[0] = 0;
  3612. m->bits[1] = 0;
  3613. m->bits[bit >> 5] |= (1 << (bit & 31));
  3614. }
  3615. }
  3616. static int msm_slim_get_ch_from_beid(int32_t be_id)
  3617. {
  3618. int ch_id = 0;
  3619. switch (be_id) {
  3620. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3621. ch_id = SLIM_RX_0;
  3622. break;
  3623. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3624. ch_id = SLIM_RX_1;
  3625. break;
  3626. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3627. ch_id = SLIM_RX_2;
  3628. break;
  3629. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3630. ch_id = SLIM_RX_3;
  3631. break;
  3632. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3633. ch_id = SLIM_RX_4;
  3634. break;
  3635. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3636. ch_id = SLIM_RX_6;
  3637. break;
  3638. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3639. ch_id = SLIM_TX_0;
  3640. break;
  3641. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3642. ch_id = SLIM_TX_3;
  3643. break;
  3644. default:
  3645. ch_id = SLIM_RX_0;
  3646. break;
  3647. }
  3648. return ch_id;
  3649. }
  3650. static int msm_cdc_dma_get_idx_from_beid(int32_t be_id)
  3651. {
  3652. int idx = 0;
  3653. switch (be_id) {
  3654. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  3655. idx = WSA_CDC_DMA_RX_0;
  3656. break;
  3657. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  3658. idx = WSA_CDC_DMA_TX_0;
  3659. break;
  3660. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  3661. idx = WSA_CDC_DMA_RX_1;
  3662. break;
  3663. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  3664. idx = WSA_CDC_DMA_TX_1;
  3665. break;
  3666. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  3667. idx = WSA_CDC_DMA_TX_2;
  3668. break;
  3669. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  3670. idx = RX_CDC_DMA_RX_0;
  3671. break;
  3672. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  3673. idx = RX_CDC_DMA_RX_1;
  3674. break;
  3675. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  3676. idx = RX_CDC_DMA_RX_2;
  3677. break;
  3678. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  3679. idx = RX_CDC_DMA_RX_3;
  3680. break;
  3681. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  3682. idx = RX_CDC_DMA_RX_5;
  3683. break;
  3684. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  3685. idx = TX_CDC_DMA_TX_0;
  3686. break;
  3687. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  3688. idx = TX_CDC_DMA_TX_3;
  3689. break;
  3690. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  3691. idx = TX_CDC_DMA_TX_4;
  3692. break;
  3693. default:
  3694. idx = RX_CDC_DMA_RX_0;
  3695. break;
  3696. }
  3697. return idx;
  3698. }
  3699. static int msm_ext_disp_get_idx_from_beid(int32_t be_id)
  3700. {
  3701. int idx = -EINVAL;
  3702. switch (be_id) {
  3703. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3704. idx = DP_RX_IDX;
  3705. break;
  3706. default:
  3707. pr_err("%s: Incorrect ext_disp BE id %d\n", __func__, be_id);
  3708. idx = -EINVAL;
  3709. break;
  3710. }
  3711. return idx;
  3712. }
  3713. static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  3714. struct snd_pcm_hw_params *params)
  3715. {
  3716. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  3717. struct snd_interval *rate = hw_param_interval(params,
  3718. SNDRV_PCM_HW_PARAM_RATE);
  3719. struct snd_interval *channels = hw_param_interval(params,
  3720. SNDRV_PCM_HW_PARAM_CHANNELS);
  3721. int rc = 0;
  3722. int idx;
  3723. void *config = NULL;
  3724. struct snd_soc_codec *codec = NULL;
  3725. pr_debug("%s: format = %d, rate = %d\n",
  3726. __func__, params_format(params), params_rate(params));
  3727. switch (dai_link->id) {
  3728. case MSM_BACKEND_DAI_SLIMBUS_0_RX:
  3729. case MSM_BACKEND_DAI_SLIMBUS_1_RX:
  3730. case MSM_BACKEND_DAI_SLIMBUS_2_RX:
  3731. case MSM_BACKEND_DAI_SLIMBUS_3_RX:
  3732. case MSM_BACKEND_DAI_SLIMBUS_4_RX:
  3733. case MSM_BACKEND_DAI_SLIMBUS_6_RX:
  3734. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3735. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3736. slim_rx_cfg[idx].bit_format);
  3737. rate->min = rate->max = slim_rx_cfg[idx].sample_rate;
  3738. channels->min = channels->max = slim_rx_cfg[idx].channels;
  3739. break;
  3740. case MSM_BACKEND_DAI_SLIMBUS_0_TX:
  3741. case MSM_BACKEND_DAI_SLIMBUS_3_TX:
  3742. idx = msm_slim_get_ch_from_beid(dai_link->id);
  3743. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3744. slim_tx_cfg[idx].bit_format);
  3745. rate->min = rate->max = slim_tx_cfg[idx].sample_rate;
  3746. channels->min = channels->max = slim_tx_cfg[idx].channels;
  3747. break;
  3748. case MSM_BACKEND_DAI_SLIMBUS_1_TX:
  3749. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3750. slim_tx_cfg[1].bit_format);
  3751. rate->min = rate->max = slim_tx_cfg[1].sample_rate;
  3752. channels->min = channels->max = slim_tx_cfg[1].channels;
  3753. break;
  3754. case MSM_BACKEND_DAI_SLIMBUS_4_TX:
  3755. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3756. SNDRV_PCM_FORMAT_S32_LE);
  3757. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  3758. channels->min = channels->max = msm_vi_feed_tx_ch;
  3759. break;
  3760. case MSM_BACKEND_DAI_SLIMBUS_5_RX:
  3761. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3762. slim_rx_cfg[5].bit_format);
  3763. rate->min = rate->max = slim_rx_cfg[5].sample_rate;
  3764. channels->min = channels->max = slim_rx_cfg[5].channels;
  3765. break;
  3766. case MSM_BACKEND_DAI_SLIMBUS_5_TX:
  3767. codec = rtd->codec;
  3768. rate->min = rate->max = SAMPLING_RATE_16KHZ;
  3769. channels->min = channels->max = 1;
  3770. config = msm_codec_fn.get_afe_config_fn(codec,
  3771. AFE_SLIMBUS_SLAVE_PORT_CONFIG);
  3772. if (config) {
  3773. rc = afe_set_config(AFE_SLIMBUS_SLAVE_PORT_CONFIG,
  3774. config, SLIMBUS_5_TX);
  3775. if (rc)
  3776. pr_err("%s: Failed to set slimbus slave port config %d\n",
  3777. __func__, rc);
  3778. }
  3779. break;
  3780. case MSM_BACKEND_DAI_SLIMBUS_7_RX:
  3781. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3782. slim_rx_cfg[SLIM_RX_7].bit_format);
  3783. rate->min = rate->max = slim_rx_cfg[SLIM_RX_7].sample_rate;
  3784. channels->min = channels->max =
  3785. slim_rx_cfg[SLIM_RX_7].channels;
  3786. break;
  3787. case MSM_BACKEND_DAI_SLIMBUS_7_TX:
  3788. rate->min = rate->max = slim_tx_cfg[SLIM_TX_7].sample_rate;
  3789. channels->min = channels->max =
  3790. slim_tx_cfg[SLIM_TX_7].channels;
  3791. break;
  3792. case MSM_BACKEND_DAI_SLIMBUS_8_TX:
  3793. rate->min = rate->max = slim_tx_cfg[SLIM_TX_8].sample_rate;
  3794. channels->min = channels->max =
  3795. slim_tx_cfg[SLIM_TX_8].channels;
  3796. break;
  3797. case MSM_BACKEND_DAI_USB_RX:
  3798. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3799. usb_rx_cfg.bit_format);
  3800. rate->min = rate->max = usb_rx_cfg.sample_rate;
  3801. channels->min = channels->max = usb_rx_cfg.channels;
  3802. break;
  3803. case MSM_BACKEND_DAI_USB_TX:
  3804. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3805. usb_tx_cfg.bit_format);
  3806. rate->min = rate->max = usb_tx_cfg.sample_rate;
  3807. channels->min = channels->max = usb_tx_cfg.channels;
  3808. break;
  3809. case MSM_BACKEND_DAI_DISPLAY_PORT_RX:
  3810. idx = msm_ext_disp_get_idx_from_beid(dai_link->id);
  3811. if (idx < 0) {
  3812. pr_err("%s: Incorrect ext disp idx %d\n",
  3813. __func__, idx);
  3814. rc = idx;
  3815. goto done;
  3816. }
  3817. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3818. ext_disp_rx_cfg[idx].bit_format);
  3819. rate->min = rate->max = ext_disp_rx_cfg[idx].sample_rate;
  3820. channels->min = channels->max = ext_disp_rx_cfg[idx].channels;
  3821. break;
  3822. case MSM_BACKEND_DAI_AFE_PCM_RX:
  3823. channels->min = channels->max = proxy_rx_cfg.channels;
  3824. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  3825. break;
  3826. case MSM_BACKEND_DAI_PRI_TDM_RX_0:
  3827. channels->min = channels->max =
  3828. tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  3829. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3830. tdm_rx_cfg[TDM_PRI][TDM_0].bit_format);
  3831. rate->min = rate->max = tdm_rx_cfg[TDM_PRI][TDM_0].sample_rate;
  3832. break;
  3833. case MSM_BACKEND_DAI_PRI_TDM_TX_0:
  3834. channels->min = channels->max =
  3835. tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  3836. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3837. tdm_tx_cfg[TDM_PRI][TDM_0].bit_format);
  3838. rate->min = rate->max = tdm_tx_cfg[TDM_PRI][TDM_0].sample_rate;
  3839. break;
  3840. case MSM_BACKEND_DAI_SEC_TDM_RX_0:
  3841. channels->min = channels->max =
  3842. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  3843. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3844. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  3845. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  3846. break;
  3847. case MSM_BACKEND_DAI_SEC_TDM_TX_0:
  3848. channels->min = channels->max =
  3849. tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  3850. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3851. tdm_tx_cfg[TDM_SEC][TDM_0].bit_format);
  3852. rate->min = rate->max = tdm_tx_cfg[TDM_SEC][TDM_0].sample_rate;
  3853. break;
  3854. case MSM_BACKEND_DAI_TERT_TDM_RX_0:
  3855. channels->min = channels->max =
  3856. tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  3857. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3858. tdm_rx_cfg[TDM_TERT][TDM_0].bit_format);
  3859. rate->min = rate->max = tdm_rx_cfg[TDM_TERT][TDM_0].sample_rate;
  3860. break;
  3861. case MSM_BACKEND_DAI_TERT_TDM_TX_0:
  3862. channels->min = channels->max =
  3863. tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  3864. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3865. tdm_tx_cfg[TDM_TERT][TDM_0].bit_format);
  3866. rate->min = rate->max = tdm_tx_cfg[TDM_TERT][TDM_0].sample_rate;
  3867. break;
  3868. case MSM_BACKEND_DAI_QUAT_TDM_RX_0:
  3869. channels->min = channels->max =
  3870. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  3871. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3872. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  3873. rate->min = rate->max = tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3874. break;
  3875. case MSM_BACKEND_DAI_QUAT_TDM_TX_0:
  3876. channels->min = channels->max =
  3877. tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  3878. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3879. tdm_tx_cfg[TDM_QUAT][TDM_0].bit_format);
  3880. rate->min = rate->max = tdm_tx_cfg[TDM_QUAT][TDM_0].sample_rate;
  3881. break;
  3882. case MSM_BACKEND_DAI_QUIN_TDM_RX_0:
  3883. channels->min = channels->max =
  3884. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  3885. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3886. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  3887. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3888. break;
  3889. case MSM_BACKEND_DAI_QUIN_TDM_TX_0:
  3890. channels->min = channels->max =
  3891. tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  3892. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3893. tdm_tx_cfg[TDM_QUIN][TDM_0].bit_format);
  3894. rate->min = rate->max = tdm_tx_cfg[TDM_QUIN][TDM_0].sample_rate;
  3895. break;
  3896. case MSM_BACKEND_DAI_AUXPCM_RX:
  3897. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3898. aux_pcm_rx_cfg[PRIM_AUX_PCM].bit_format);
  3899. rate->min = rate->max =
  3900. aux_pcm_rx_cfg[PRIM_AUX_PCM].sample_rate;
  3901. channels->min = channels->max =
  3902. aux_pcm_rx_cfg[PRIM_AUX_PCM].channels;
  3903. break;
  3904. case MSM_BACKEND_DAI_AUXPCM_TX:
  3905. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3906. aux_pcm_tx_cfg[PRIM_AUX_PCM].bit_format);
  3907. rate->min = rate->max =
  3908. aux_pcm_tx_cfg[PRIM_AUX_PCM].sample_rate;
  3909. channels->min = channels->max =
  3910. aux_pcm_tx_cfg[PRIM_AUX_PCM].channels;
  3911. break;
  3912. case MSM_BACKEND_DAI_SEC_AUXPCM_RX:
  3913. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3914. aux_pcm_rx_cfg[SEC_AUX_PCM].bit_format);
  3915. rate->min = rate->max =
  3916. aux_pcm_rx_cfg[SEC_AUX_PCM].sample_rate;
  3917. channels->min = channels->max =
  3918. aux_pcm_rx_cfg[SEC_AUX_PCM].channels;
  3919. break;
  3920. case MSM_BACKEND_DAI_SEC_AUXPCM_TX:
  3921. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3922. aux_pcm_tx_cfg[SEC_AUX_PCM].bit_format);
  3923. rate->min = rate->max =
  3924. aux_pcm_tx_cfg[SEC_AUX_PCM].sample_rate;
  3925. channels->min = channels->max =
  3926. aux_pcm_tx_cfg[SEC_AUX_PCM].channels;
  3927. break;
  3928. case MSM_BACKEND_DAI_TERT_AUXPCM_RX:
  3929. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3930. aux_pcm_rx_cfg[TERT_AUX_PCM].bit_format);
  3931. rate->min = rate->max =
  3932. aux_pcm_rx_cfg[TERT_AUX_PCM].sample_rate;
  3933. channels->min = channels->max =
  3934. aux_pcm_rx_cfg[TERT_AUX_PCM].channels;
  3935. break;
  3936. case MSM_BACKEND_DAI_TERT_AUXPCM_TX:
  3937. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3938. aux_pcm_tx_cfg[TERT_AUX_PCM].bit_format);
  3939. rate->min = rate->max =
  3940. aux_pcm_tx_cfg[TERT_AUX_PCM].sample_rate;
  3941. channels->min = channels->max =
  3942. aux_pcm_tx_cfg[TERT_AUX_PCM].channels;
  3943. break;
  3944. case MSM_BACKEND_DAI_QUAT_AUXPCM_RX:
  3945. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3946. aux_pcm_rx_cfg[QUAT_AUX_PCM].bit_format);
  3947. rate->min = rate->max =
  3948. aux_pcm_rx_cfg[QUAT_AUX_PCM].sample_rate;
  3949. channels->min = channels->max =
  3950. aux_pcm_rx_cfg[QUAT_AUX_PCM].channels;
  3951. break;
  3952. case MSM_BACKEND_DAI_QUAT_AUXPCM_TX:
  3953. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3954. aux_pcm_tx_cfg[QUAT_AUX_PCM].bit_format);
  3955. rate->min = rate->max =
  3956. aux_pcm_tx_cfg[QUAT_AUX_PCM].sample_rate;
  3957. channels->min = channels->max =
  3958. aux_pcm_tx_cfg[QUAT_AUX_PCM].channels;
  3959. break;
  3960. case MSM_BACKEND_DAI_QUIN_AUXPCM_RX:
  3961. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3962. aux_pcm_rx_cfg[QUIN_AUX_PCM].bit_format);
  3963. rate->min = rate->max =
  3964. aux_pcm_rx_cfg[QUIN_AUX_PCM].sample_rate;
  3965. channels->min = channels->max =
  3966. aux_pcm_rx_cfg[QUIN_AUX_PCM].channels;
  3967. break;
  3968. case MSM_BACKEND_DAI_QUIN_AUXPCM_TX:
  3969. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3970. aux_pcm_tx_cfg[QUIN_AUX_PCM].bit_format);
  3971. rate->min = rate->max =
  3972. aux_pcm_tx_cfg[QUIN_AUX_PCM].sample_rate;
  3973. channels->min = channels->max =
  3974. aux_pcm_tx_cfg[QUIN_AUX_PCM].channels;
  3975. break;
  3976. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  3977. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3978. mi2s_rx_cfg[PRIM_MI2S].bit_format);
  3979. rate->min = rate->max = mi2s_rx_cfg[PRIM_MI2S].sample_rate;
  3980. channels->min = channels->max =
  3981. mi2s_rx_cfg[PRIM_MI2S].channels;
  3982. break;
  3983. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  3984. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3985. mi2s_tx_cfg[PRIM_MI2S].bit_format);
  3986. rate->min = rate->max = mi2s_tx_cfg[PRIM_MI2S].sample_rate;
  3987. channels->min = channels->max =
  3988. mi2s_tx_cfg[PRIM_MI2S].channels;
  3989. break;
  3990. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  3991. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3992. mi2s_rx_cfg[SEC_MI2S].bit_format);
  3993. rate->min = rate->max = mi2s_rx_cfg[SEC_MI2S].sample_rate;
  3994. channels->min = channels->max =
  3995. mi2s_rx_cfg[SEC_MI2S].channels;
  3996. break;
  3997. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  3998. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  3999. mi2s_tx_cfg[SEC_MI2S].bit_format);
  4000. rate->min = rate->max = mi2s_tx_cfg[SEC_MI2S].sample_rate;
  4001. channels->min = channels->max =
  4002. mi2s_tx_cfg[SEC_MI2S].channels;
  4003. break;
  4004. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4005. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4006. mi2s_rx_cfg[TERT_MI2S].bit_format);
  4007. rate->min = rate->max = mi2s_rx_cfg[TERT_MI2S].sample_rate;
  4008. channels->min = channels->max =
  4009. mi2s_rx_cfg[TERT_MI2S].channels;
  4010. break;
  4011. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4012. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4013. mi2s_tx_cfg[TERT_MI2S].bit_format);
  4014. rate->min = rate->max = mi2s_tx_cfg[TERT_MI2S].sample_rate;
  4015. channels->min = channels->max =
  4016. mi2s_tx_cfg[TERT_MI2S].channels;
  4017. break;
  4018. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4019. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4020. mi2s_rx_cfg[QUAT_MI2S].bit_format);
  4021. rate->min = rate->max = mi2s_rx_cfg[QUAT_MI2S].sample_rate;
  4022. channels->min = channels->max =
  4023. mi2s_rx_cfg[QUAT_MI2S].channels;
  4024. break;
  4025. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4026. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4027. mi2s_tx_cfg[QUAT_MI2S].bit_format);
  4028. rate->min = rate->max = mi2s_tx_cfg[QUAT_MI2S].sample_rate;
  4029. channels->min = channels->max =
  4030. mi2s_tx_cfg[QUAT_MI2S].channels;
  4031. break;
  4032. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4033. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4034. mi2s_rx_cfg[QUIN_MI2S].bit_format);
  4035. rate->min = rate->max = mi2s_rx_cfg[QUIN_MI2S].sample_rate;
  4036. channels->min = channels->max =
  4037. mi2s_rx_cfg[QUIN_MI2S].channels;
  4038. break;
  4039. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4040. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4041. mi2s_tx_cfg[QUIN_MI2S].bit_format);
  4042. rate->min = rate->max = mi2s_tx_cfg[QUIN_MI2S].sample_rate;
  4043. channels->min = channels->max =
  4044. mi2s_tx_cfg[QUIN_MI2S].channels;
  4045. break;
  4046. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4047. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4048. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4049. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4050. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4051. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4052. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4053. cdc_dma_rx_cfg[idx].bit_format);
  4054. rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
  4055. channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
  4056. break;
  4057. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4058. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4059. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4060. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4061. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4062. idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4063. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4064. cdc_dma_tx_cfg[idx].bit_format);
  4065. rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
  4066. channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
  4067. break;
  4068. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4069. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4070. SNDRV_PCM_FORMAT_S32_LE);
  4071. rate->min = rate->max = SAMPLING_RATE_8KHZ;
  4072. channels->min = channels->max = msm_vi_feed_tx_ch;
  4073. break;
  4074. default:
  4075. rate->min = rate->max = SAMPLING_RATE_48KHZ;
  4076. break;
  4077. }
  4078. done:
  4079. return rc;
  4080. }
  4081. static bool msm_usbc_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  4082. {
  4083. struct snd_soc_card *card = codec->component.card;
  4084. struct msm_asoc_mach_data *pdata =
  4085. snd_soc_card_get_drvdata(card);
  4086. if (!pdata->fsa_handle)
  4087. return false;
  4088. return fsa4480_switch_event(pdata->fsa_handle, FSA_MIC_GND_SWAP);
  4089. }
  4090. static bool msm_swap_gnd_mic(struct snd_soc_codec *codec, bool active)
  4091. {
  4092. int value = 0;
  4093. bool ret = false;
  4094. struct snd_soc_card *card;
  4095. struct msm_asoc_mach_data *pdata;
  4096. if (!codec) {
  4097. pr_err("%s codec is NULL\n", __func__);
  4098. return false;
  4099. }
  4100. card = codec->component.card;
  4101. pdata = snd_soc_card_get_drvdata(card);
  4102. if (!pdata)
  4103. return false;
  4104. if (wcd_mbhc_cfg.enable_usbc_analog)
  4105. return msm_usbc_swap_gnd_mic(codec, active);
  4106. /* if usbc is not defined, swap using us_euro_gpio_p */
  4107. if (pdata->us_euro_gpio_p) {
  4108. value = msm_cdc_pinctrl_get_state(
  4109. pdata->us_euro_gpio_p);
  4110. if (value)
  4111. msm_cdc_pinctrl_select_sleep_state(
  4112. pdata->us_euro_gpio_p);
  4113. else
  4114. msm_cdc_pinctrl_select_active_state(
  4115. pdata->us_euro_gpio_p);
  4116. dev_dbg(codec->dev, "%s: swap select switch %d to %d\n",
  4117. __func__, value, !value);
  4118. ret = true;
  4119. }
  4120. return ret;
  4121. }
  4122. static int msm_afe_set_config(struct snd_soc_codec *codec)
  4123. {
  4124. int ret = 0;
  4125. void *config_data = NULL;
  4126. if (!msm_codec_fn.get_afe_config_fn) {
  4127. dev_err(codec->dev, "%s: codec get afe config not init'ed\n",
  4128. __func__);
  4129. return -EINVAL;
  4130. }
  4131. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4132. AFE_CDC_REGISTERS_CONFIG);
  4133. if (config_data) {
  4134. ret = afe_set_config(AFE_CDC_REGISTERS_CONFIG, config_data, 0);
  4135. if (ret) {
  4136. dev_err(codec->dev,
  4137. "%s: Failed to set codec registers config %d\n",
  4138. __func__, ret);
  4139. return ret;
  4140. }
  4141. }
  4142. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4143. AFE_CDC_REGISTER_PAGE_CONFIG);
  4144. if (config_data) {
  4145. ret = afe_set_config(AFE_CDC_REGISTER_PAGE_CONFIG, config_data,
  4146. 0);
  4147. if (ret)
  4148. dev_err(codec->dev,
  4149. "%s: Failed to set cdc register page config\n",
  4150. __func__);
  4151. }
  4152. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4153. AFE_SLIMBUS_SLAVE_CONFIG);
  4154. if (config_data) {
  4155. ret = afe_set_config(AFE_SLIMBUS_SLAVE_CONFIG, config_data, 0);
  4156. if (ret) {
  4157. dev_err(codec->dev,
  4158. "%s: Failed to set slimbus slave config %d\n",
  4159. __func__, ret);
  4160. return ret;
  4161. }
  4162. }
  4163. return 0;
  4164. }
  4165. static void msm_afe_clear_config(void)
  4166. {
  4167. afe_clear_config(AFE_CDC_REGISTERS_CONFIG);
  4168. afe_clear_config(AFE_SLIMBUS_SLAVE_CONFIG);
  4169. }
  4170. static int msm_audrx_tavil_init(struct snd_soc_pcm_runtime *rtd)
  4171. {
  4172. int ret = 0;
  4173. void *config_data;
  4174. struct snd_soc_codec *codec = rtd->codec;
  4175. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4176. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4177. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4178. struct snd_soc_component *aux_comp;
  4179. struct snd_card *card;
  4180. struct snd_info_entry *entry;
  4181. struct msm_asoc_mach_data *pdata =
  4182. snd_soc_card_get_drvdata(rtd->card);
  4183. /*
  4184. * Codec SLIMBUS configuration
  4185. * RX1, RX2, RX3, RX4, RX5, RX6, RX7, RX8
  4186. * TX1, TX2, TX3, TX4, TX5, TX6, TX7, TX8, TX9, TX10, TX11, TX12, TX13
  4187. * TX14, TX15, TX16
  4188. */
  4189. unsigned int rx_ch[WCD934X_RX_MAX] = {144, 145, 146, 147, 148, 149,
  4190. 150, 151};
  4191. unsigned int tx_ch[WCD934X_TX_MAX] = {128, 129, 130, 131, 132, 133,
  4192. 134, 135, 136, 137, 138, 139,
  4193. 140, 141, 142, 143};
  4194. pr_info("%s: dev_name:%s\n", __func__, dev_name(cpu_dai->dev));
  4195. rtd->pmdown_time = 0;
  4196. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  4197. ARRAY_SIZE(msm_tavil_snd_controls));
  4198. if (ret < 0) {
  4199. pr_err("%s: add_codec_controls failed, err %d\n",
  4200. __func__, ret);
  4201. return ret;
  4202. }
  4203. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4204. ARRAY_SIZE(msm_common_snd_controls));
  4205. if (ret < 0) {
  4206. pr_err("%s: add_codec_controls failed, err %d\n",
  4207. __func__, ret);
  4208. return ret;
  4209. }
  4210. snd_soc_dapm_new_controls(dapm, msm_dapm_widgets_tavil,
  4211. ARRAY_SIZE(msm_dapm_widgets_tavil));
  4212. snd_soc_dapm_add_routes(dapm, wcd_audio_paths_tavil,
  4213. ARRAY_SIZE(wcd_audio_paths_tavil));
  4214. snd_soc_dapm_ignore_suspend(dapm, "Handset Mic");
  4215. snd_soc_dapm_ignore_suspend(dapm, "Headset Mic");
  4216. snd_soc_dapm_ignore_suspend(dapm, "ANCRight Headset Mic");
  4217. snd_soc_dapm_ignore_suspend(dapm, "ANCLeft Headset Mic");
  4218. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4219. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4220. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4221. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4222. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic4");
  4223. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic5");
  4224. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic5");
  4225. snd_soc_dapm_ignore_suspend(dapm, "MADINPUT");
  4226. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_INPUT");
  4227. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT1");
  4228. snd_soc_dapm_ignore_suspend(dapm, "MAD_CPE_OUT2");
  4229. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  4230. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT1");
  4231. snd_soc_dapm_ignore_suspend(dapm, "LINEOUT2");
  4232. snd_soc_dapm_ignore_suspend(dapm, "ANC EAR");
  4233. snd_soc_dapm_ignore_suspend(dapm, "SPK1 OUT");
  4234. snd_soc_dapm_ignore_suspend(dapm, "SPK2 OUT");
  4235. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  4236. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  4237. snd_soc_dapm_ignore_suspend(dapm, "AIF4 VI");
  4238. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT");
  4239. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHL");
  4240. snd_soc_dapm_ignore_suspend(dapm, "ANC HPHR");
  4241. snd_soc_dapm_sync(dapm);
  4242. snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4243. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4244. msm_codec_fn.get_afe_config_fn = tavil_get_afe_config;
  4245. ret = msm_afe_set_config(codec);
  4246. if (ret) {
  4247. pr_err("%s: Failed to set AFE config %d\n", __func__, ret);
  4248. goto err;
  4249. }
  4250. pdata->is_afe_config_done = true;
  4251. config_data = msm_codec_fn.get_afe_config_fn(codec,
  4252. AFE_AANC_VERSION);
  4253. if (config_data) {
  4254. ret = afe_set_config(AFE_AANC_VERSION, config_data, 0);
  4255. if (ret) {
  4256. pr_err("%s: Failed to set aanc version %d\n",
  4257. __func__, ret);
  4258. goto err;
  4259. }
  4260. }
  4261. /*
  4262. * Send speaker configuration only for WSA8810.
  4263. * Default configuration is for WSA8815.
  4264. */
  4265. pr_debug("%s: Number of aux devices: %d\n",
  4266. __func__, rtd->card->num_aux_devs);
  4267. if (rtd->card->num_aux_devs &&
  4268. !list_empty(&rtd->card->aux_comp_list)) {
  4269. aux_comp = list_first_entry(&rtd->card->aux_comp_list,
  4270. struct snd_soc_component, card_aux_list);
  4271. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4272. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4273. tavil_set_spkr_mode(rtd->codec, WCD934X_SPKR_MODE_1);
  4274. tavil_set_spkr_gain_offset(rtd->codec,
  4275. WCD934X_RX_GAIN_OFFSET_M1P5_DB);
  4276. }
  4277. }
  4278. card = rtd->card->snd_card;
  4279. entry = snd_info_create_subdir(card->module, "codecs",
  4280. card->proc_root);
  4281. if (!entry) {
  4282. pr_debug("%s: Cannot create codecs module entry\n",
  4283. __func__);
  4284. ret = 0;
  4285. goto err;
  4286. }
  4287. pdata->codec_root = entry;
  4288. tavil_codec_info_create_codec_entry(pdata->codec_root, codec);
  4289. codec_reg_done = true;
  4290. return 0;
  4291. err:
  4292. return ret;
  4293. }
  4294. static int msm_int_audrx_init(struct snd_soc_pcm_runtime *rtd)
  4295. {
  4296. int ret = 0;
  4297. struct snd_soc_codec *codec = rtd->codec;
  4298. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  4299. struct snd_card *card;
  4300. struct snd_info_entry *entry;
  4301. struct snd_soc_component *aux_comp;
  4302. struct msm_asoc_mach_data *pdata =
  4303. snd_soc_card_get_drvdata(rtd->card);
  4304. ret = snd_soc_add_codec_controls(codec, msm_int_snd_controls,
  4305. ARRAY_SIZE(msm_int_snd_controls));
  4306. if (ret < 0) {
  4307. pr_err("%s: add_codec_controls failed: %d\n",
  4308. __func__, ret);
  4309. return ret;
  4310. }
  4311. ret = snd_soc_add_codec_controls(codec, msm_common_snd_controls,
  4312. ARRAY_SIZE(msm_common_snd_controls));
  4313. if (ret < 0) {
  4314. pr_err("%s: add common snd controls failed: %d\n",
  4315. __func__, ret);
  4316. return ret;
  4317. }
  4318. snd_soc_dapm_new_controls(dapm, msm_int_dapm_widgets,
  4319. ARRAY_SIZE(msm_int_dapm_widgets));
  4320. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic0");
  4321. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic1");
  4322. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic2");
  4323. snd_soc_dapm_ignore_suspend(dapm, "Digital Mic3");
  4324. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic1");
  4325. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic2");
  4326. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic3");
  4327. snd_soc_dapm_ignore_suspend(dapm, "Analog Mic4");
  4328. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK1 OUT");
  4329. snd_soc_dapm_ignore_suspend(dapm, "WSA_SPK2 OUT");
  4330. snd_soc_dapm_ignore_suspend(dapm, "WSA AIF VI");
  4331. snd_soc_dapm_ignore_suspend(dapm, "VIINPUT_WSA");
  4332. snd_soc_dapm_sync(dapm);
  4333. /*
  4334. * Send speaker configuration only for WSA8810.
  4335. * Default configuration is for WSA8815.
  4336. */
  4337. dev_dbg(codec->dev, "%s: Number of aux devices: %d\n",
  4338. __func__, rtd->card->num_aux_devs);
  4339. if (rtd->card->num_aux_devs &&
  4340. !list_empty(&rtd->card->component_dev_list)) {
  4341. aux_comp = list_first_entry(
  4342. &rtd->card->component_dev_list,
  4343. struct snd_soc_component,
  4344. card_aux_list);
  4345. if (!strcmp(aux_comp->name, WSA8810_NAME_1) ||
  4346. !strcmp(aux_comp->name, WSA8810_NAME_2)) {
  4347. wsa_macro_set_spkr_mode(rtd->codec,
  4348. WSA_MACRO_SPKR_MODE_1);
  4349. wsa_macro_set_spkr_gain_offset(rtd->codec,
  4350. WSA_MACRO_GAIN_OFFSET_M1P5_DB);
  4351. }
  4352. }
  4353. card = rtd->card->snd_card;
  4354. if (!pdata->codec_root) {
  4355. entry = snd_info_create_subdir(card->module, "codecs",
  4356. card->proc_root);
  4357. if (!entry) {
  4358. pr_debug("%s: Cannot create codecs module entry\n",
  4359. __func__);
  4360. ret = 0;
  4361. goto err;
  4362. }
  4363. pdata->codec_root = entry;
  4364. }
  4365. bolero_info_create_codec_entry(pdata->codec_root, codec);
  4366. /*
  4367. * SM6150 MSM 1.0 doesn't have hardware wake up interrupt line
  4368. * from AOSS to APSS. So, it uses SW workaround and listens to
  4369. * interrupt from AFE over IPC.
  4370. * Check for MSM version and MSM ID and register wake irq
  4371. * accordingly to provide compatibility to all chipsets.
  4372. */
  4373. if (socinfo_get_id() == SM6150_SOC_MSM_ID &&
  4374. socinfo_get_version() == SM6150_SOC_VERSION_1_0)
  4375. bolero_register_wake_irq(codec, true);
  4376. else
  4377. bolero_register_wake_irq(codec, false);
  4378. codec_reg_done = true;
  4379. return 0;
  4380. err:
  4381. return ret;
  4382. }
  4383. static int msm_wcn_init(struct snd_soc_pcm_runtime *rtd)
  4384. {
  4385. unsigned int rx_ch[WCN_CDC_SLIM_RX_CH_MAX] = {157, 158};
  4386. unsigned int tx_ch[WCN_CDC_SLIM_TX_CH_MAX] = {159, 160, 161};
  4387. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4388. return snd_soc_dai_set_channel_map(codec_dai, ARRAY_SIZE(tx_ch),
  4389. tx_ch, ARRAY_SIZE(rx_ch), rx_ch);
  4390. }
  4391. static void *def_wcd_mbhc_cal(void)
  4392. {
  4393. void *wcd_mbhc_cal;
  4394. struct wcd_mbhc_btn_detect_cfg *btn_cfg;
  4395. u16 *btn_high;
  4396. wcd_mbhc_cal = kzalloc(WCD_MBHC_CAL_SIZE(WCD_MBHC_DEF_BUTTONS,
  4397. WCD9XXX_MBHC_DEF_RLOADS), GFP_KERNEL);
  4398. if (!wcd_mbhc_cal)
  4399. return NULL;
  4400. #define S(X, Y) ((WCD_MBHC_CAL_PLUG_TYPE_PTR(wcd_mbhc_cal)->X) = (Y))
  4401. S(v_hs_max, 1600);
  4402. #undef S
  4403. #define S(X, Y) ((WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal)->X) = (Y))
  4404. S(num_btn, WCD_MBHC_DEF_BUTTONS);
  4405. #undef S
  4406. btn_cfg = WCD_MBHC_CAL_BTN_DET_PTR(wcd_mbhc_cal);
  4407. btn_high = ((void *)&btn_cfg->_v_btn_low) +
  4408. (sizeof(btn_cfg->_v_btn_low[0]) * btn_cfg->num_btn);
  4409. btn_high[0] = 75;
  4410. btn_high[1] = 150;
  4411. btn_high[2] = 237;
  4412. btn_high[3] = 500;
  4413. btn_high[4] = 500;
  4414. btn_high[5] = 500;
  4415. btn_high[6] = 500;
  4416. btn_high[7] = 500;
  4417. return wcd_mbhc_cal;
  4418. }
  4419. static int msm_snd_hw_params(struct snd_pcm_substream *substream,
  4420. struct snd_pcm_hw_params *params)
  4421. {
  4422. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4423. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4424. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4425. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4426. int ret = 0;
  4427. u32 rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4428. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4429. u32 user_set_tx_ch = 0;
  4430. u32 rx_ch_count;
  4431. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4432. ret = snd_soc_dai_get_channel_map(codec_dai,
  4433. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4434. if (ret < 0) {
  4435. pr_err("%s: failed to get codec chan map, err:%d\n",
  4436. __func__, ret);
  4437. goto err;
  4438. }
  4439. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_5_RX) {
  4440. pr_debug("%s: rx_5_ch=%d\n", __func__,
  4441. slim_rx_cfg[5].channels);
  4442. rx_ch_count = slim_rx_cfg[5].channels;
  4443. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_2_RX) {
  4444. pr_debug("%s: rx_2_ch=%d\n", __func__,
  4445. slim_rx_cfg[2].channels);
  4446. rx_ch_count = slim_rx_cfg[2].channels;
  4447. } else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_6_RX) {
  4448. pr_debug("%s: rx_6_ch=%d\n", __func__,
  4449. slim_rx_cfg[6].channels);
  4450. rx_ch_count = slim_rx_cfg[6].channels;
  4451. } else {
  4452. pr_debug("%s: rx_0_ch=%d\n", __func__,
  4453. slim_rx_cfg[0].channels);
  4454. rx_ch_count = slim_rx_cfg[0].channels;
  4455. }
  4456. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4457. rx_ch_count, rx_ch);
  4458. if (ret < 0) {
  4459. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4460. __func__, ret);
  4461. goto err;
  4462. }
  4463. } else {
  4464. pr_debug("%s: %s_tx_dai_id_%d_ch=%d\n", __func__,
  4465. codec_dai->name, codec_dai->id, user_set_tx_ch);
  4466. ret = snd_soc_dai_get_channel_map(codec_dai,
  4467. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4468. if (ret < 0) {
  4469. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4470. __func__, ret);
  4471. goto err;
  4472. }
  4473. /* For <codec>_tx1 case */
  4474. if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_0_TX)
  4475. user_set_tx_ch = slim_tx_cfg[0].channels;
  4476. /* For <codec>_tx3 case */
  4477. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_1_TX)
  4478. user_set_tx_ch = slim_tx_cfg[1].channels;
  4479. else if (dai_link->id == MSM_BACKEND_DAI_SLIMBUS_4_TX)
  4480. user_set_tx_ch = msm_vi_feed_tx_ch;
  4481. else
  4482. user_set_tx_ch = tx_ch_cnt;
  4483. pr_debug("%s: msm_slim_0_tx_ch(%d) user_set_tx_ch(%d) tx_ch_cnt(%d), BE id (%d)\n",
  4484. __func__, slim_tx_cfg[0].channels, user_set_tx_ch,
  4485. tx_ch_cnt, dai_link->id);
  4486. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4487. user_set_tx_ch, tx_ch, 0, 0);
  4488. if (ret < 0)
  4489. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4490. __func__, ret);
  4491. }
  4492. err:
  4493. return ret;
  4494. }
  4495. static int msm_snd_cdc_dma_hw_params(struct snd_pcm_substream *substream,
  4496. struct snd_pcm_hw_params *params)
  4497. {
  4498. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4499. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4500. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4501. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4502. int ret = 0;
  4503. u32 rx_ch_cdc_dma, tx_ch_cdc_dma;
  4504. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4505. u32 user_set_tx_ch = 0;
  4506. u32 user_set_rx_ch = 0;
  4507. u32 ch_id;
  4508. ret = snd_soc_dai_get_channel_map(codec_dai,
  4509. &tx_ch_cnt, &tx_ch_cdc_dma, &rx_ch_cnt,
  4510. &rx_ch_cdc_dma);
  4511. if (ret < 0) {
  4512. pr_err("%s: failed to get codec chan map, err:%d\n",
  4513. __func__, ret);
  4514. goto err;
  4515. }
  4516. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4517. switch (dai_link->id) {
  4518. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
  4519. case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
  4520. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
  4521. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
  4522. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
  4523. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
  4524. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_4:
  4525. case MSM_BACKEND_DAI_RX_CDC_DMA_RX_5:
  4526. {
  4527. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4528. pr_debug("%s: id %d rx_ch=%d\n", __func__,
  4529. ch_id, cdc_dma_rx_cfg[ch_id].channels);
  4530. user_set_rx_ch = cdc_dma_rx_cfg[ch_id].channels;
  4531. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4532. user_set_rx_ch, &rx_ch_cdc_dma);
  4533. if (ret < 0) {
  4534. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4535. __func__, ret);
  4536. goto err;
  4537. }
  4538. }
  4539. break;
  4540. }
  4541. } else {
  4542. switch (dai_link->id) {
  4543. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
  4544. {
  4545. user_set_tx_ch = msm_vi_feed_tx_ch;
  4546. }
  4547. break;
  4548. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
  4549. case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
  4550. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
  4551. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
  4552. case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
  4553. {
  4554. ch_id = msm_cdc_dma_get_idx_from_beid(dai_link->id);
  4555. pr_debug("%s: id %d tx_ch=%d\n", __func__,
  4556. ch_id, cdc_dma_tx_cfg[ch_id].channels);
  4557. user_set_tx_ch = cdc_dma_tx_cfg[ch_id].channels;
  4558. }
  4559. break;
  4560. }
  4561. ret = snd_soc_dai_set_channel_map(cpu_dai, user_set_tx_ch,
  4562. &tx_ch_cdc_dma, 0, 0);
  4563. if (ret < 0) {
  4564. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4565. __func__, ret);
  4566. goto err;
  4567. }
  4568. }
  4569. err:
  4570. return ret;
  4571. }
  4572. static int msm_slimbus_2_hw_params(struct snd_pcm_substream *substream,
  4573. struct snd_pcm_hw_params *params)
  4574. {
  4575. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4576. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4577. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4578. unsigned int rx_ch[SLIM_MAX_RX_PORTS], tx_ch[SLIM_MAX_TX_PORTS];
  4579. unsigned int rx_ch_cnt = 0, tx_ch_cnt = 0;
  4580. unsigned int num_tx_ch = 0;
  4581. unsigned int num_rx_ch = 0;
  4582. int ret = 0;
  4583. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4584. num_rx_ch = params_channels(params);
  4585. pr_debug("%s: %s rx_dai_id = %d num_ch = %d\n", __func__,
  4586. codec_dai->name, codec_dai->id, num_rx_ch);
  4587. ret = snd_soc_dai_get_channel_map(codec_dai,
  4588. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4589. if (ret < 0) {
  4590. pr_err("%s: failed to get codec chan map, err:%d\n",
  4591. __func__, ret);
  4592. goto err;
  4593. }
  4594. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  4595. num_rx_ch, rx_ch);
  4596. if (ret < 0) {
  4597. pr_err("%s: failed to set cpu chan map, err:%d\n",
  4598. __func__, ret);
  4599. goto err;
  4600. }
  4601. } else {
  4602. num_tx_ch = params_channels(params);
  4603. pr_debug("%s: %s tx_dai_id = %d num_ch = %d\n", __func__,
  4604. codec_dai->name, codec_dai->id, num_tx_ch);
  4605. ret = snd_soc_dai_get_channel_map(codec_dai,
  4606. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4607. if (ret < 0) {
  4608. pr_err("%s: failed to get tx codec chan map, err:%d\n",
  4609. __func__, ret);
  4610. goto err;
  4611. }
  4612. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4613. num_tx_ch, tx_ch, 0, 0);
  4614. if (ret < 0) {
  4615. pr_err("%s: failed to set tx cpu chan map, err:%d\n",
  4616. __func__, ret);
  4617. goto err;
  4618. }
  4619. }
  4620. err:
  4621. return ret;
  4622. }
  4623. static int msm_wcn_hw_params(struct snd_pcm_substream *substream,
  4624. struct snd_pcm_hw_params *params)
  4625. {
  4626. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4627. struct snd_soc_dai *codec_dai = rtd->codec_dai;
  4628. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4629. struct snd_soc_dai_link *dai_link = rtd->dai_link;
  4630. u32 rx_ch[WCN_CDC_SLIM_RX_CH_MAX], tx_ch[WCN_CDC_SLIM_TX_CH_MAX];
  4631. u32 rx_ch_cnt = 0, tx_ch_cnt = 0;
  4632. int ret;
  4633. dev_dbg(rtd->dev, "%s: %s_tx_dai_id_%d\n", __func__,
  4634. codec_dai->name, codec_dai->id);
  4635. ret = snd_soc_dai_get_channel_map(codec_dai,
  4636. &tx_ch_cnt, tx_ch, &rx_ch_cnt, rx_ch);
  4637. if (ret) {
  4638. dev_err(rtd->dev,
  4639. "%s: failed to get BTFM codec chan map\n, err:%d\n",
  4640. __func__, ret);
  4641. goto err;
  4642. }
  4643. dev_dbg(rtd->dev, "%s: tx_ch_cnt(%d) BE id %d\n",
  4644. __func__, tx_ch_cnt, dai_link->id);
  4645. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4646. tx_ch_cnt, tx_ch, rx_ch_cnt, rx_ch);
  4647. if (ret)
  4648. dev_err(rtd->dev, "%s: failed to set cpu chan map, err:%d\n",
  4649. __func__, ret);
  4650. err:
  4651. return ret;
  4652. }
  4653. static int msm_get_port_id(int be_id)
  4654. {
  4655. int afe_port_id;
  4656. switch (be_id) {
  4657. case MSM_BACKEND_DAI_PRI_MI2S_RX:
  4658. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_RX;
  4659. break;
  4660. case MSM_BACKEND_DAI_PRI_MI2S_TX:
  4661. afe_port_id = AFE_PORT_ID_PRIMARY_MI2S_TX;
  4662. break;
  4663. case MSM_BACKEND_DAI_SECONDARY_MI2S_RX:
  4664. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_RX;
  4665. break;
  4666. case MSM_BACKEND_DAI_SECONDARY_MI2S_TX:
  4667. afe_port_id = AFE_PORT_ID_SECONDARY_MI2S_TX;
  4668. break;
  4669. case MSM_BACKEND_DAI_TERTIARY_MI2S_RX:
  4670. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_RX;
  4671. break;
  4672. case MSM_BACKEND_DAI_TERTIARY_MI2S_TX:
  4673. afe_port_id = AFE_PORT_ID_TERTIARY_MI2S_TX;
  4674. break;
  4675. case MSM_BACKEND_DAI_QUATERNARY_MI2S_RX:
  4676. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_RX;
  4677. break;
  4678. case MSM_BACKEND_DAI_QUATERNARY_MI2S_TX:
  4679. afe_port_id = AFE_PORT_ID_QUATERNARY_MI2S_TX;
  4680. break;
  4681. case MSM_BACKEND_DAI_QUINARY_MI2S_RX:
  4682. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_RX;
  4683. break;
  4684. case MSM_BACKEND_DAI_QUINARY_MI2S_TX:
  4685. afe_port_id = AFE_PORT_ID_QUINARY_MI2S_TX;
  4686. break;
  4687. default:
  4688. pr_err("%s: Invalid BE id: %d\n", __func__, be_id);
  4689. afe_port_id = -EINVAL;
  4690. }
  4691. return afe_port_id;
  4692. }
  4693. static u32 get_mi2s_bits_per_sample(u32 bit_format)
  4694. {
  4695. u32 bit_per_sample;
  4696. switch (bit_format) {
  4697. case SNDRV_PCM_FORMAT_S32_LE:
  4698. case SNDRV_PCM_FORMAT_S24_3LE:
  4699. case SNDRV_PCM_FORMAT_S24_LE:
  4700. bit_per_sample = 32;
  4701. break;
  4702. case SNDRV_PCM_FORMAT_S16_LE:
  4703. default:
  4704. bit_per_sample = 16;
  4705. break;
  4706. }
  4707. return bit_per_sample;
  4708. }
  4709. static void update_mi2s_clk_val(int dai_id, int stream)
  4710. {
  4711. u32 bit_per_sample;
  4712. if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4713. bit_per_sample =
  4714. get_mi2s_bits_per_sample(mi2s_rx_cfg[dai_id].bit_format);
  4715. mi2s_clk[dai_id].clk_freq_in_hz =
  4716. mi2s_rx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4717. } else {
  4718. bit_per_sample =
  4719. get_mi2s_bits_per_sample(mi2s_tx_cfg[dai_id].bit_format);
  4720. mi2s_clk[dai_id].clk_freq_in_hz =
  4721. mi2s_tx_cfg[dai_id].sample_rate * 2 * bit_per_sample;
  4722. }
  4723. }
  4724. static int msm_mi2s_set_sclk(struct snd_pcm_substream *substream, bool enable)
  4725. {
  4726. int ret = 0;
  4727. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4728. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4729. int port_id = 0;
  4730. int index = cpu_dai->id;
  4731. port_id = msm_get_port_id(rtd->dai_link->id);
  4732. if (port_id < 0) {
  4733. dev_err(rtd->card->dev, "%s: Invalid port_id\n", __func__);
  4734. ret = port_id;
  4735. goto err;
  4736. }
  4737. if (enable) {
  4738. update_mi2s_clk_val(index, substream->stream);
  4739. dev_dbg(rtd->card->dev, "%s: clock rate %ul\n", __func__,
  4740. mi2s_clk[index].clk_freq_in_hz);
  4741. }
  4742. mi2s_clk[index].enable = enable;
  4743. ret = afe_set_lpass_clock_v2(port_id,
  4744. &mi2s_clk[index]);
  4745. if (ret < 0) {
  4746. dev_err(rtd->card->dev,
  4747. "%s: afe lpass clock failed for port 0x%x , err:%d\n",
  4748. __func__, port_id, ret);
  4749. goto err;
  4750. }
  4751. err:
  4752. return ret;
  4753. }
  4754. static int msm_set_pinctrl(struct msm_pinctrl_info *pinctrl_info,
  4755. enum pinctrl_pin_state new_state)
  4756. {
  4757. int ret = 0;
  4758. int curr_state = 0;
  4759. if (pinctrl_info == NULL) {
  4760. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4761. ret = -EINVAL;
  4762. goto err;
  4763. }
  4764. if (pinctrl_info->pinctrl == NULL) {
  4765. pr_err("%s: pinctrl_info->pinctrl is NULL\n", __func__);
  4766. ret = -EINVAL;
  4767. goto err;
  4768. }
  4769. curr_state = pinctrl_info->curr_state;
  4770. pinctrl_info->curr_state = new_state;
  4771. pr_debug("%s: curr_state = %s new_state = %s\n", __func__,
  4772. pin_states[curr_state], pin_states[pinctrl_info->curr_state]);
  4773. if (curr_state == pinctrl_info->curr_state) {
  4774. pr_debug("%s: Already in same state\n", __func__);
  4775. goto err;
  4776. }
  4777. if (curr_state != STATE_DISABLE &&
  4778. pinctrl_info->curr_state != STATE_DISABLE) {
  4779. pr_debug("%s: state already active cannot switch\n", __func__);
  4780. ret = -EIO;
  4781. goto err;
  4782. }
  4783. switch (pinctrl_info->curr_state) {
  4784. case STATE_MI2S_ACTIVE:
  4785. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4786. pinctrl_info->mi2s_active);
  4787. if (ret) {
  4788. pr_err("%s: MI2S state select failed with %d\n",
  4789. __func__, ret);
  4790. ret = -EIO;
  4791. goto err;
  4792. }
  4793. break;
  4794. case STATE_TDM_ACTIVE:
  4795. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4796. pinctrl_info->tdm_active);
  4797. if (ret) {
  4798. pr_err("%s: TDM state select failed with %d\n",
  4799. __func__, ret);
  4800. ret = -EIO;
  4801. goto err;
  4802. }
  4803. break;
  4804. case STATE_DISABLE:
  4805. if (curr_state == STATE_MI2S_ACTIVE) {
  4806. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4807. pinctrl_info->mi2s_disable);
  4808. } else {
  4809. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4810. pinctrl_info->tdm_disable);
  4811. }
  4812. if (ret) {
  4813. pr_err("%s: state disable failed with %d\n",
  4814. __func__, ret);
  4815. ret = -EIO;
  4816. goto err;
  4817. }
  4818. break;
  4819. default:
  4820. pr_err("%s: TLMM pin state is invalid\n", __func__);
  4821. return -EINVAL;
  4822. }
  4823. err:
  4824. return ret;
  4825. }
  4826. static int msm_get_pinctrl(struct platform_device *pdev)
  4827. {
  4828. struct snd_soc_card *card = platform_get_drvdata(pdev);
  4829. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  4830. struct msm_pinctrl_info *pinctrl_info = NULL;
  4831. struct pinctrl *pinctrl;
  4832. int ret = 0;
  4833. pinctrl_info = &pdata->pinctrl_info;
  4834. if (pinctrl_info == NULL) {
  4835. pr_err("%s: pinctrl_info is NULL\n", __func__);
  4836. return -EINVAL;
  4837. }
  4838. pinctrl = devm_pinctrl_get(&pdev->dev);
  4839. if (IS_ERR_OR_NULL(pinctrl)) {
  4840. pr_err("%s: Unable to get pinctrl handle\n", __func__);
  4841. return -EINVAL;
  4842. }
  4843. pinctrl_info->pinctrl = pinctrl;
  4844. /* get all the states handles from Device Tree */
  4845. pinctrl_info->mi2s_disable = pinctrl_lookup_state(pinctrl,
  4846. "quat-mi2s-sleep");
  4847. if (IS_ERR(pinctrl_info->mi2s_disable)) {
  4848. pr_err("%s: could not get mi2s_disable pinstate\n", __func__);
  4849. goto err;
  4850. }
  4851. pinctrl_info->mi2s_active = pinctrl_lookup_state(pinctrl,
  4852. "quat-mi2s-active");
  4853. if (IS_ERR(pinctrl_info->mi2s_active)) {
  4854. pr_err("%s: could not get mi2s_active pinstate\n", __func__);
  4855. goto err;
  4856. }
  4857. pinctrl_info->tdm_disable = pinctrl_lookup_state(pinctrl,
  4858. "quat-tdm-sleep");
  4859. if (IS_ERR(pinctrl_info->tdm_disable)) {
  4860. pr_err("%s: could not get tdm_disable pinstate\n", __func__);
  4861. goto err;
  4862. }
  4863. pinctrl_info->tdm_active = pinctrl_lookup_state(pinctrl,
  4864. "quat-tdm-active");
  4865. if (IS_ERR(pinctrl_info->tdm_active)) {
  4866. pr_err("%s: could not get tdm_active pinstate\n",
  4867. __func__);
  4868. goto err;
  4869. }
  4870. /* Reset the TLMM pins to a default state */
  4871. ret = pinctrl_select_state(pinctrl_info->pinctrl,
  4872. pinctrl_info->mi2s_disable);
  4873. if (ret != 0) {
  4874. pr_err("%s: Disable TLMM pins failed with %d\n",
  4875. __func__, ret);
  4876. ret = -EIO;
  4877. goto err;
  4878. }
  4879. pinctrl_info->curr_state = STATE_DISABLE;
  4880. return 0;
  4881. err:
  4882. devm_pinctrl_put(pinctrl);
  4883. pinctrl_info->pinctrl = NULL;
  4884. return -EINVAL;
  4885. }
  4886. static int msm_tdm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
  4887. struct snd_pcm_hw_params *params)
  4888. {
  4889. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4890. struct snd_interval *rate = hw_param_interval(params,
  4891. SNDRV_PCM_HW_PARAM_RATE);
  4892. struct snd_interval *channels = hw_param_interval(params,
  4893. SNDRV_PCM_HW_PARAM_CHANNELS);
  4894. if (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) {
  4895. channels->min = channels->max =
  4896. tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4897. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4898. tdm_rx_cfg[TDM_QUAT][TDM_0].bit_format);
  4899. rate->min = rate->max =
  4900. tdm_rx_cfg[TDM_QUAT][TDM_0].sample_rate;
  4901. } else if (cpu_dai->id == AFE_PORT_ID_SECONDARY_TDM_RX) {
  4902. channels->min = channels->max =
  4903. tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4904. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4905. tdm_rx_cfg[TDM_SEC][TDM_0].bit_format);
  4906. rate->min = rate->max = tdm_rx_cfg[TDM_SEC][TDM_0].sample_rate;
  4907. } else if (cpu_dai->id == AFE_PORT_ID_QUINARY_TDM_RX) {
  4908. channels->min = channels->max =
  4909. tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4910. param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
  4911. tdm_rx_cfg[TDM_QUIN][TDM_0].bit_format);
  4912. rate->min = rate->max = tdm_rx_cfg[TDM_QUIN][TDM_0].sample_rate;
  4913. } else {
  4914. pr_err("%s: dai id 0x%x not supported\n",
  4915. __func__, cpu_dai->id);
  4916. return -EINVAL;
  4917. }
  4918. pr_debug("%s: dai id = 0x%x channels = %d rate = %d format = 0x%x\n",
  4919. __func__, cpu_dai->id, channels->max, rate->max,
  4920. params_format(params));
  4921. return 0;
  4922. }
  4923. static int sm6150_tdm_snd_hw_params(struct snd_pcm_substream *substream,
  4924. struct snd_pcm_hw_params *params)
  4925. {
  4926. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  4927. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  4928. int ret = 0;
  4929. int slot_width = 32;
  4930. int channels, slots;
  4931. unsigned int slot_mask, rate, clk_freq;
  4932. unsigned int slot_offset[8] = {0, 4, 8, 12, 16, 20, 24, 28};
  4933. pr_debug("%s: dai id = 0x%x\n", __func__, cpu_dai->id);
  4934. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  4935. switch (cpu_dai->id) {
  4936. case AFE_PORT_ID_PRIMARY_TDM_RX:
  4937. slots = tdm_rx_cfg[TDM_PRI][TDM_0].channels;
  4938. break;
  4939. case AFE_PORT_ID_SECONDARY_TDM_RX:
  4940. slots = tdm_rx_cfg[TDM_SEC][TDM_0].channels;
  4941. break;
  4942. case AFE_PORT_ID_TERTIARY_TDM_RX:
  4943. slots = tdm_rx_cfg[TDM_TERT][TDM_0].channels;
  4944. break;
  4945. case AFE_PORT_ID_QUATERNARY_TDM_RX:
  4946. slots = tdm_rx_cfg[TDM_QUAT][TDM_0].channels;
  4947. break;
  4948. case AFE_PORT_ID_QUINARY_TDM_RX:
  4949. slots = tdm_rx_cfg[TDM_QUIN][TDM_0].channels;
  4950. break;
  4951. case AFE_PORT_ID_PRIMARY_TDM_TX:
  4952. slots = tdm_tx_cfg[TDM_PRI][TDM_0].channels;
  4953. break;
  4954. case AFE_PORT_ID_SECONDARY_TDM_TX:
  4955. slots = tdm_tx_cfg[TDM_SEC][TDM_0].channels;
  4956. break;
  4957. case AFE_PORT_ID_TERTIARY_TDM_TX:
  4958. slots = tdm_tx_cfg[TDM_TERT][TDM_0].channels;
  4959. break;
  4960. case AFE_PORT_ID_QUATERNARY_TDM_TX:
  4961. slots = tdm_tx_cfg[TDM_QUAT][TDM_0].channels;
  4962. break;
  4963. case AFE_PORT_ID_QUINARY_TDM_TX:
  4964. slots = tdm_tx_cfg[TDM_QUIN][TDM_0].channels;
  4965. break;
  4966. default:
  4967. pr_err("%s: dai id 0x%x not supported\n",
  4968. __func__, cpu_dai->id);
  4969. return -EINVAL;
  4970. }
  4971. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  4972. /*2 slot config - bits 0 and 1 set for the first two slots */
  4973. slot_mask = 0x0000FFFF >> (16-slots);
  4974. channels = slots;
  4975. pr_debug("%s: tdm rx slot_width %d slots %d\n",
  4976. __func__, slot_width, slots);
  4977. ret = snd_soc_dai_set_tdm_slot(cpu_dai, 0, slot_mask,
  4978. slots, slot_width);
  4979. if (ret < 0) {
  4980. pr_err("%s: failed to set tdm rx slot, err:%d\n",
  4981. __func__, ret);
  4982. goto end;
  4983. }
  4984. ret = snd_soc_dai_set_channel_map(cpu_dai,
  4985. 0, NULL, channels, slot_offset);
  4986. if (ret < 0) {
  4987. pr_err("%s: failed to set tdm rx channel map, err:%d\n",
  4988. __func__, ret);
  4989. goto end;
  4990. }
  4991. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  4992. /*2 slot config - bits 0 and 1 set for the first two slots */
  4993. slot_mask = 0x0000FFFF >> (16-slots);
  4994. channels = slots;
  4995. pr_debug("%s: tdm tx slot_width %d slots %d\n",
  4996. __func__, slot_width, slots);
  4997. ret = snd_soc_dai_set_tdm_slot(cpu_dai, slot_mask, 0,
  4998. slots, slot_width);
  4999. if (ret < 0) {
  5000. pr_err("%s: failed to set tdm tx slot, err:%d\n",
  5001. __func__, ret);
  5002. goto end;
  5003. }
  5004. ret = snd_soc_dai_set_channel_map(cpu_dai,
  5005. channels, slot_offset, 0, NULL);
  5006. if (ret < 0) {
  5007. pr_err("%s: failed to set tdm tx channel map, err:%d\n",
  5008. __func__, ret);
  5009. goto end;
  5010. }
  5011. } else {
  5012. ret = -EINVAL;
  5013. pr_err("%s: invalid use case, err:%d\n",
  5014. __func__, ret);
  5015. goto end;
  5016. }
  5017. rate = params_rate(params);
  5018. clk_freq = rate * slot_width * slots;
  5019. ret = snd_soc_dai_set_sysclk(cpu_dai, 0, clk_freq, SND_SOC_CLOCK_OUT);
  5020. if (ret < 0)
  5021. pr_err("%s: failed to set tdm clk, err:%d\n",
  5022. __func__, ret);
  5023. end:
  5024. return ret;
  5025. }
  5026. static int sm6150_tdm_snd_startup(struct snd_pcm_substream *substream)
  5027. {
  5028. int ret = 0;
  5029. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5030. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5031. struct snd_soc_card *card = rtd->card;
  5032. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5033. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5034. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5035. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5036. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5037. ret = msm_set_pinctrl(pinctrl_info, STATE_TDM_ACTIVE);
  5038. if (ret)
  5039. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5040. __func__, ret);
  5041. }
  5042. return ret;
  5043. }
  5044. static void sm6150_tdm_snd_shutdown(struct snd_pcm_substream *substream)
  5045. {
  5046. int ret = 0;
  5047. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5048. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5049. struct snd_soc_card *card = rtd->card;
  5050. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5051. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5052. /* currently only supporting TDM_RX_0 and TDM_TX_0 */
  5053. if ((cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_RX) ||
  5054. (cpu_dai->id == AFE_PORT_ID_QUATERNARY_TDM_TX)) {
  5055. ret = msm_set_pinctrl(pinctrl_info, STATE_DISABLE);
  5056. if (ret)
  5057. pr_err("%s: TDM TLMM pinctrl set failed with %d\n",
  5058. __func__, ret);
  5059. }
  5060. }
  5061. static struct snd_soc_ops sm6150_tdm_be_ops = {
  5062. .hw_params = sm6150_tdm_snd_hw_params,
  5063. .startup = sm6150_tdm_snd_startup,
  5064. .shutdown = sm6150_tdm_snd_shutdown
  5065. };
  5066. static int msm_fe_qos_prepare(struct snd_pcm_substream *substream)
  5067. {
  5068. cpumask_t mask;
  5069. if (pm_qos_request_active(&substream->latency_pm_qos_req))
  5070. pm_qos_remove_request(&substream->latency_pm_qos_req);
  5071. cpumask_clear(&mask);
  5072. cpumask_set_cpu(1, &mask); /* affine to core 1 */
  5073. cpumask_set_cpu(2, &mask); /* affine to core 2 */
  5074. cpumask_copy(&substream->latency_pm_qos_req.cpus_affine, &mask);
  5075. substream->latency_pm_qos_req.type = PM_QOS_REQ_AFFINE_CORES;
  5076. pm_qos_add_request(&substream->latency_pm_qos_req,
  5077. PM_QOS_CPU_DMA_LATENCY,
  5078. MSM_LL_QOS_VALUE);
  5079. return 0;
  5080. }
  5081. static struct snd_soc_ops msm_fe_qos_ops = {
  5082. .prepare = msm_fe_qos_prepare,
  5083. };
  5084. static int msm_mi2s_snd_startup(struct snd_pcm_substream *substream)
  5085. {
  5086. int ret = 0;
  5087. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5088. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  5089. int index = cpu_dai->id;
  5090. unsigned int fmt = SND_SOC_DAIFMT_CBS_CFS;
  5091. struct snd_soc_card *card = rtd->card;
  5092. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5093. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5094. int ret_pinctrl = 0;
  5095. dev_dbg(rtd->card->dev,
  5096. "%s: substream = %s stream = %d, dai name %s, dai ID %d\n",
  5097. __func__, substream->name, substream->stream,
  5098. cpu_dai->name, cpu_dai->id);
  5099. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5100. ret = -EINVAL;
  5101. dev_err(rtd->card->dev,
  5102. "%s: CPU DAI id (%d) out of range\n",
  5103. __func__, cpu_dai->id);
  5104. goto err;
  5105. }
  5106. /*
  5107. * Mutex protection in case the same MI2S
  5108. * interface using for both TX and RX so
  5109. * that the same clock won't be enable twice.
  5110. */
  5111. mutex_lock(&mi2s_intf_conf[index].lock);
  5112. if (++mi2s_intf_conf[index].ref_cnt == 1) {
  5113. /* Check if msm needs to provide the clock to the interface */
  5114. if (!mi2s_intf_conf[index].msm_is_mi2s_master) {
  5115. mi2s_clk[index].clk_id = mi2s_ebit_clk[index];
  5116. fmt = SND_SOC_DAIFMT_CBM_CFM;
  5117. }
  5118. ret = msm_mi2s_set_sclk(substream, true);
  5119. if (ret < 0) {
  5120. dev_err(rtd->card->dev,
  5121. "%s: afe lpass clock failed to enable MI2S clock, err:%d\n",
  5122. __func__, ret);
  5123. goto clean_up;
  5124. }
  5125. ret = snd_soc_dai_set_fmt(cpu_dai, fmt);
  5126. if (ret < 0) {
  5127. pr_err("%s: set fmt cpu dai failed for MI2S (%d), err:%d\n",
  5128. __func__, index, ret);
  5129. goto clk_off;
  5130. }
  5131. if (index == QUAT_MI2S) {
  5132. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5133. STATE_MI2S_ACTIVE);
  5134. if (ret_pinctrl)
  5135. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5136. __func__, ret_pinctrl);
  5137. }
  5138. }
  5139. clk_off:
  5140. if (ret < 0)
  5141. msm_mi2s_set_sclk(substream, false);
  5142. clean_up:
  5143. if (ret < 0)
  5144. mi2s_intf_conf[index].ref_cnt--;
  5145. mutex_unlock(&mi2s_intf_conf[index].lock);
  5146. err:
  5147. return ret;
  5148. }
  5149. static void msm_mi2s_snd_shutdown(struct snd_pcm_substream *substream)
  5150. {
  5151. int ret;
  5152. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  5153. int index = rtd->cpu_dai->id;
  5154. struct snd_soc_card *card = rtd->card;
  5155. struct msm_asoc_mach_data *pdata = snd_soc_card_get_drvdata(card);
  5156. struct msm_pinctrl_info *pinctrl_info = &pdata->pinctrl_info;
  5157. int ret_pinctrl = 0;
  5158. pr_debug("%s(): substream = %s stream = %d\n", __func__,
  5159. substream->name, substream->stream);
  5160. if (index < PRIM_MI2S || index >= MI2S_MAX) {
  5161. pr_err("%s:invalid MI2S DAI(%d)\n", __func__, index);
  5162. return;
  5163. }
  5164. mutex_lock(&mi2s_intf_conf[index].lock);
  5165. if (--mi2s_intf_conf[index].ref_cnt == 0) {
  5166. ret = msm_mi2s_set_sclk(substream, false);
  5167. if (ret < 0)
  5168. pr_err("%s:clock disable failed for MI2S (%d); ret=%d\n",
  5169. __func__, index, ret);
  5170. if (index == QUAT_MI2S) {
  5171. ret_pinctrl = msm_set_pinctrl(pinctrl_info,
  5172. STATE_DISABLE);
  5173. if (ret_pinctrl)
  5174. pr_err("%s: MI2S TLMM pinctrl set failed with %d\n",
  5175. __func__, ret_pinctrl);
  5176. }
  5177. }
  5178. mutex_unlock(&mi2s_intf_conf[index].lock);
  5179. }
  5180. static struct snd_soc_ops msm_mi2s_be_ops = {
  5181. .startup = msm_mi2s_snd_startup,
  5182. .shutdown = msm_mi2s_snd_shutdown,
  5183. };
  5184. static struct snd_soc_ops msm_cdc_dma_be_ops = {
  5185. .hw_params = msm_snd_cdc_dma_hw_params,
  5186. };
  5187. static struct snd_soc_ops msm_be_ops = {
  5188. .hw_params = msm_snd_hw_params,
  5189. };
  5190. static struct snd_soc_ops msm_slimbus_2_be_ops = {
  5191. .hw_params = msm_slimbus_2_hw_params,
  5192. };
  5193. static struct snd_soc_ops msm_wcn_ops = {
  5194. .hw_params = msm_wcn_hw_params,
  5195. };
  5196. /* Digital audio interface glue - connects codec <---> CPU */
  5197. static struct snd_soc_dai_link msm_common_dai_links[] = {
  5198. /* FrontEnd DAI Links */
  5199. {/* hw:x,0 */
  5200. .name = MSM_DAILINK_NAME(Media1),
  5201. .stream_name = "MultiMedia1",
  5202. .cpu_dai_name = "MultiMedia1",
  5203. .platform_name = "msm-pcm-dsp.0",
  5204. .dynamic = 1,
  5205. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5206. .dpcm_playback = 1,
  5207. .dpcm_capture = 1,
  5208. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5209. SND_SOC_DPCM_TRIGGER_POST},
  5210. .codec_dai_name = "snd-soc-dummy-dai",
  5211. .codec_name = "snd-soc-dummy",
  5212. .ignore_suspend = 1,
  5213. /* this dainlink has playback support */
  5214. .ignore_pmdown_time = 1,
  5215. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  5216. },
  5217. {/* hw:x,1 */
  5218. .name = MSM_DAILINK_NAME(Media2),
  5219. .stream_name = "MultiMedia2",
  5220. .cpu_dai_name = "MultiMedia2",
  5221. .platform_name = "msm-pcm-dsp.0",
  5222. .dynamic = 1,
  5223. .dpcm_playback = 1,
  5224. .dpcm_capture = 1,
  5225. .codec_dai_name = "snd-soc-dummy-dai",
  5226. .codec_name = "snd-soc-dummy",
  5227. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5228. SND_SOC_DPCM_TRIGGER_POST},
  5229. .ignore_suspend = 1,
  5230. /* this dainlink has playback support */
  5231. .ignore_pmdown_time = 1,
  5232. .id = MSM_FRONTEND_DAI_MULTIMEDIA2,
  5233. },
  5234. {/* hw:x,2 */
  5235. .name = "VoiceMMode1",
  5236. .stream_name = "VoiceMMode1",
  5237. .cpu_dai_name = "VoiceMMode1",
  5238. .platform_name = "msm-pcm-voice",
  5239. .dynamic = 1,
  5240. .dpcm_playback = 1,
  5241. .dpcm_capture = 1,
  5242. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5243. SND_SOC_DPCM_TRIGGER_POST},
  5244. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5245. .ignore_suspend = 1,
  5246. .ignore_pmdown_time = 1,
  5247. .codec_dai_name = "snd-soc-dummy-dai",
  5248. .codec_name = "snd-soc-dummy",
  5249. .id = MSM_FRONTEND_DAI_VOICEMMODE1,
  5250. },
  5251. {/* hw:x,3 */
  5252. .name = "MSM VoIP",
  5253. .stream_name = "VoIP",
  5254. .cpu_dai_name = "VoIP",
  5255. .platform_name = "msm-voip-dsp",
  5256. .dynamic = 1,
  5257. .dpcm_playback = 1,
  5258. .dpcm_capture = 1,
  5259. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5260. SND_SOC_DPCM_TRIGGER_POST},
  5261. .codec_dai_name = "snd-soc-dummy-dai",
  5262. .codec_name = "snd-soc-dummy",
  5263. .ignore_suspend = 1,
  5264. /* this dainlink has playback support */
  5265. .ignore_pmdown_time = 1,
  5266. .id = MSM_FRONTEND_DAI_VOIP,
  5267. },
  5268. {/* hw:x,4 */
  5269. .name = MSM_DAILINK_NAME(ULL),
  5270. .stream_name = "MultiMedia3",
  5271. .cpu_dai_name = "MultiMedia3",
  5272. .platform_name = "msm-pcm-dsp.2",
  5273. .dynamic = 1,
  5274. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5275. .dpcm_playback = 1,
  5276. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5277. SND_SOC_DPCM_TRIGGER_POST},
  5278. .codec_dai_name = "snd-soc-dummy-dai",
  5279. .codec_name = "snd-soc-dummy",
  5280. .ignore_suspend = 1,
  5281. /* this dainlink has playback support */
  5282. .ignore_pmdown_time = 1,
  5283. .id = MSM_FRONTEND_DAI_MULTIMEDIA3,
  5284. },
  5285. /* Hostless PCM purpose */
  5286. {/* hw:x,5 */
  5287. .name = "SLIMBUS_0 Hostless",
  5288. .stream_name = "SLIMBUS_0 Hostless",
  5289. .cpu_dai_name = "SLIMBUS0_HOSTLESS",
  5290. .platform_name = "msm-pcm-hostless",
  5291. .dynamic = 1,
  5292. .dpcm_playback = 1,
  5293. .dpcm_capture = 1,
  5294. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5295. SND_SOC_DPCM_TRIGGER_POST},
  5296. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5297. .ignore_suspend = 1,
  5298. /* this dailink has playback support */
  5299. .ignore_pmdown_time = 1,
  5300. .codec_dai_name = "snd-soc-dummy-dai",
  5301. .codec_name = "snd-soc-dummy",
  5302. },
  5303. {/* hw:x,6 */
  5304. .name = "MSM AFE-PCM RX",
  5305. .stream_name = "AFE-PROXY RX",
  5306. .cpu_dai_name = "msm-dai-q6-dev.241",
  5307. .codec_name = "msm-stub-codec.1",
  5308. .codec_dai_name = "msm-stub-rx",
  5309. .platform_name = "msm-pcm-afe",
  5310. .dpcm_playback = 1,
  5311. .ignore_suspend = 1,
  5312. /* this dainlink has playback support */
  5313. .ignore_pmdown_time = 1,
  5314. },
  5315. {/* hw:x,7 */
  5316. .name = "MSM AFE-PCM TX",
  5317. .stream_name = "AFE-PROXY TX",
  5318. .cpu_dai_name = "msm-dai-q6-dev.240",
  5319. .codec_name = "msm-stub-codec.1",
  5320. .codec_dai_name = "msm-stub-tx",
  5321. .platform_name = "msm-pcm-afe",
  5322. .dpcm_capture = 1,
  5323. .ignore_suspend = 1,
  5324. },
  5325. {/* hw:x,8 */
  5326. .name = MSM_DAILINK_NAME(Compress1),
  5327. .stream_name = "Compress1",
  5328. .cpu_dai_name = "MultiMedia4",
  5329. .platform_name = "msm-compress-dsp",
  5330. .dynamic = 1,
  5331. .async_ops = ASYNC_DPCM_SND_SOC_HW_PARAMS,
  5332. .dpcm_playback = 1,
  5333. .dpcm_capture = 1,
  5334. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5335. SND_SOC_DPCM_TRIGGER_POST},
  5336. .codec_dai_name = "snd-soc-dummy-dai",
  5337. .codec_name = "snd-soc-dummy",
  5338. .ignore_suspend = 1,
  5339. .ignore_pmdown_time = 1,
  5340. /* this dainlink has playback support */
  5341. .id = MSM_FRONTEND_DAI_MULTIMEDIA4,
  5342. },
  5343. {/* hw:x,9 */
  5344. .name = "AUXPCM Hostless",
  5345. .stream_name = "AUXPCM Hostless",
  5346. .cpu_dai_name = "AUXPCM_HOSTLESS",
  5347. .platform_name = "msm-pcm-hostless",
  5348. .dynamic = 1,
  5349. .dpcm_playback = 1,
  5350. .dpcm_capture = 1,
  5351. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5352. SND_SOC_DPCM_TRIGGER_POST},
  5353. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5354. .ignore_suspend = 1,
  5355. /* this dainlink has playback support */
  5356. .ignore_pmdown_time = 1,
  5357. .codec_dai_name = "snd-soc-dummy-dai",
  5358. .codec_name = "snd-soc-dummy",
  5359. },
  5360. {/* hw:x,10 */
  5361. .name = "SLIMBUS_1 Hostless",
  5362. .stream_name = "SLIMBUS_1 Hostless",
  5363. .cpu_dai_name = "SLIMBUS1_HOSTLESS",
  5364. .platform_name = "msm-pcm-hostless",
  5365. .dynamic = 1,
  5366. .dpcm_playback = 1,
  5367. .dpcm_capture = 1,
  5368. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5369. SND_SOC_DPCM_TRIGGER_POST},
  5370. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5371. .ignore_suspend = 1,
  5372. /* this dailink has playback support */
  5373. .ignore_pmdown_time = 1,
  5374. .codec_dai_name = "snd-soc-dummy-dai",
  5375. .codec_name = "snd-soc-dummy",
  5376. },
  5377. {/* hw:x,11 */
  5378. .name = "SLIMBUS_3 Hostless",
  5379. .stream_name = "SLIMBUS_3 Hostless",
  5380. .cpu_dai_name = "SLIMBUS3_HOSTLESS",
  5381. .platform_name = "msm-pcm-hostless",
  5382. .dynamic = 1,
  5383. .dpcm_playback = 1,
  5384. .dpcm_capture = 1,
  5385. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5386. SND_SOC_DPCM_TRIGGER_POST},
  5387. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5388. .ignore_suspend = 1,
  5389. /* this dailink has playback support */
  5390. .ignore_pmdown_time = 1,
  5391. .codec_dai_name = "snd-soc-dummy-dai",
  5392. .codec_name = "snd-soc-dummy",
  5393. },
  5394. {/* hw:x,12 */
  5395. .name = "SLIMBUS_7 Hostless",
  5396. .stream_name = "SLIMBUS_7 Hostless",
  5397. .cpu_dai_name = "SLIMBUS7_HOSTLESS",
  5398. .platform_name = "msm-pcm-hostless",
  5399. .dynamic = 1,
  5400. .dpcm_playback = 1,
  5401. .dpcm_capture = 1,
  5402. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5403. SND_SOC_DPCM_TRIGGER_POST},
  5404. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5405. .ignore_suspend = 1,
  5406. /* this dailink has playback support */
  5407. .ignore_pmdown_time = 1,
  5408. .codec_dai_name = "snd-soc-dummy-dai",
  5409. .codec_name = "snd-soc-dummy",
  5410. },
  5411. {/* hw:x,13 */
  5412. .name = MSM_DAILINK_NAME(LowLatency),
  5413. .stream_name = "MultiMedia5",
  5414. .cpu_dai_name = "MultiMedia5",
  5415. .platform_name = "msm-pcm-dsp.1",
  5416. .dynamic = 1,
  5417. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  5418. .dpcm_playback = 1,
  5419. .dpcm_capture = 1,
  5420. .codec_dai_name = "snd-soc-dummy-dai",
  5421. .codec_name = "snd-soc-dummy",
  5422. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5423. SND_SOC_DPCM_TRIGGER_POST},
  5424. .ignore_suspend = 1,
  5425. /* this dainlink has playback support */
  5426. .ignore_pmdown_time = 1,
  5427. .id = MSM_FRONTEND_DAI_MULTIMEDIA5,
  5428. .ops = &msm_fe_qos_ops,
  5429. },
  5430. {/* hw:x,14 */
  5431. .name = "Listen 1 Audio Service",
  5432. .stream_name = "Listen 1 Audio Service",
  5433. .cpu_dai_name = "LSM1",
  5434. .platform_name = "msm-lsm-client",
  5435. .dynamic = 1,
  5436. .dpcm_capture = 1,
  5437. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5438. SND_SOC_DPCM_TRIGGER_POST },
  5439. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5440. .ignore_suspend = 1,
  5441. .codec_dai_name = "snd-soc-dummy-dai",
  5442. .codec_name = "snd-soc-dummy",
  5443. .id = MSM_FRONTEND_DAI_LSM1,
  5444. },
  5445. /* Multiple Tunnel instances */
  5446. {/* hw:x,15 */
  5447. .name = MSM_DAILINK_NAME(Compress2),
  5448. .stream_name = "Compress2",
  5449. .cpu_dai_name = "MultiMedia7",
  5450. .platform_name = "msm-compress-dsp",
  5451. .dynamic = 1,
  5452. .dpcm_playback = 1,
  5453. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5454. SND_SOC_DPCM_TRIGGER_POST},
  5455. .codec_dai_name = "snd-soc-dummy-dai",
  5456. .codec_name = "snd-soc-dummy",
  5457. .ignore_suspend = 1,
  5458. .ignore_pmdown_time = 1,
  5459. /* this dainlink has playback support */
  5460. .id = MSM_FRONTEND_DAI_MULTIMEDIA7,
  5461. },
  5462. {/* hw:x,16 */
  5463. .name = MSM_DAILINK_NAME(MultiMedia10),
  5464. .stream_name = "MultiMedia10",
  5465. .cpu_dai_name = "MultiMedia10",
  5466. .platform_name = "msm-pcm-dsp.1",
  5467. .dynamic = 1,
  5468. .dpcm_playback = 1,
  5469. .dpcm_capture = 1,
  5470. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5471. SND_SOC_DPCM_TRIGGER_POST},
  5472. .codec_dai_name = "snd-soc-dummy-dai",
  5473. .codec_name = "snd-soc-dummy",
  5474. .ignore_suspend = 1,
  5475. .ignore_pmdown_time = 1,
  5476. /* this dainlink has playback support */
  5477. .id = MSM_FRONTEND_DAI_MULTIMEDIA10,
  5478. },
  5479. {/* hw:x,17 */
  5480. .name = MSM_DAILINK_NAME(ULL_NOIRQ),
  5481. .stream_name = "MM_NOIRQ",
  5482. .cpu_dai_name = "MultiMedia8",
  5483. .platform_name = "msm-pcm-dsp-noirq",
  5484. .dynamic = 1,
  5485. .dpcm_playback = 1,
  5486. .dpcm_capture = 1,
  5487. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5488. SND_SOC_DPCM_TRIGGER_POST},
  5489. .codec_dai_name = "snd-soc-dummy-dai",
  5490. .codec_name = "snd-soc-dummy",
  5491. .ignore_suspend = 1,
  5492. .ignore_pmdown_time = 1,
  5493. /* this dainlink has playback support */
  5494. .id = MSM_FRONTEND_DAI_MULTIMEDIA8,
  5495. .ops = &msm_fe_qos_ops,
  5496. },
  5497. /* HDMI Hostless */
  5498. {/* hw:x,18 */
  5499. .name = "HDMI_RX_HOSTLESS",
  5500. .stream_name = "HDMI_RX_HOSTLESS",
  5501. .cpu_dai_name = "HDMI_HOSTLESS",
  5502. .platform_name = "msm-pcm-hostless",
  5503. .dynamic = 1,
  5504. .dpcm_playback = 1,
  5505. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5506. SND_SOC_DPCM_TRIGGER_POST},
  5507. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5508. .ignore_suspend = 1,
  5509. .ignore_pmdown_time = 1,
  5510. .codec_dai_name = "snd-soc-dummy-dai",
  5511. .codec_name = "snd-soc-dummy",
  5512. },
  5513. {/* hw:x,19 */
  5514. .name = "VoiceMMode2",
  5515. .stream_name = "VoiceMMode2",
  5516. .cpu_dai_name = "VoiceMMode2",
  5517. .platform_name = "msm-pcm-voice",
  5518. .dynamic = 1,
  5519. .dpcm_playback = 1,
  5520. .dpcm_capture = 1,
  5521. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5522. SND_SOC_DPCM_TRIGGER_POST},
  5523. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5524. .ignore_suspend = 1,
  5525. .ignore_pmdown_time = 1,
  5526. .codec_dai_name = "snd-soc-dummy-dai",
  5527. .codec_name = "snd-soc-dummy",
  5528. .id = MSM_FRONTEND_DAI_VOICEMMODE2,
  5529. },
  5530. /* LSM FE */
  5531. {/* hw:x,20 */
  5532. .name = "Listen 2 Audio Service",
  5533. .stream_name = "Listen 2 Audio Service",
  5534. .cpu_dai_name = "LSM2",
  5535. .platform_name = "msm-lsm-client",
  5536. .dynamic = 1,
  5537. .dpcm_capture = 1,
  5538. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5539. SND_SOC_DPCM_TRIGGER_POST },
  5540. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5541. .ignore_suspend = 1,
  5542. .codec_dai_name = "snd-soc-dummy-dai",
  5543. .codec_name = "snd-soc-dummy",
  5544. .id = MSM_FRONTEND_DAI_LSM2,
  5545. },
  5546. {/* hw:x,21 */
  5547. .name = "Listen 3 Audio Service",
  5548. .stream_name = "Listen 3 Audio Service",
  5549. .cpu_dai_name = "LSM3",
  5550. .platform_name = "msm-lsm-client",
  5551. .dynamic = 1,
  5552. .dpcm_capture = 1,
  5553. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5554. SND_SOC_DPCM_TRIGGER_POST },
  5555. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5556. .ignore_suspend = 1,
  5557. .codec_dai_name = "snd-soc-dummy-dai",
  5558. .codec_name = "snd-soc-dummy",
  5559. .id = MSM_FRONTEND_DAI_LSM3,
  5560. },
  5561. {/* hw:x,22 */
  5562. .name = "Listen 4 Audio Service",
  5563. .stream_name = "Listen 4 Audio Service",
  5564. .cpu_dai_name = "LSM4",
  5565. .platform_name = "msm-lsm-client",
  5566. .dynamic = 1,
  5567. .dpcm_capture = 1,
  5568. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5569. SND_SOC_DPCM_TRIGGER_POST },
  5570. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5571. .ignore_suspend = 1,
  5572. .codec_dai_name = "snd-soc-dummy-dai",
  5573. .codec_name = "snd-soc-dummy",
  5574. .id = MSM_FRONTEND_DAI_LSM4,
  5575. },
  5576. {/* hw:x,23 */
  5577. .name = "Listen 5 Audio Service",
  5578. .stream_name = "Listen 5 Audio Service",
  5579. .cpu_dai_name = "LSM5",
  5580. .platform_name = "msm-lsm-client",
  5581. .dynamic = 1,
  5582. .dpcm_capture = 1,
  5583. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5584. SND_SOC_DPCM_TRIGGER_POST },
  5585. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5586. .ignore_suspend = 1,
  5587. .codec_dai_name = "snd-soc-dummy-dai",
  5588. .codec_name = "snd-soc-dummy",
  5589. .id = MSM_FRONTEND_DAI_LSM5,
  5590. },
  5591. {/* hw:x,24 */
  5592. .name = "Listen 6 Audio Service",
  5593. .stream_name = "Listen 6 Audio Service",
  5594. .cpu_dai_name = "LSM6",
  5595. .platform_name = "msm-lsm-client",
  5596. .dynamic = 1,
  5597. .dpcm_capture = 1,
  5598. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5599. SND_SOC_DPCM_TRIGGER_POST },
  5600. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5601. .ignore_suspend = 1,
  5602. .codec_dai_name = "snd-soc-dummy-dai",
  5603. .codec_name = "snd-soc-dummy",
  5604. .id = MSM_FRONTEND_DAI_LSM6,
  5605. },
  5606. {/* hw:x,25 */
  5607. .name = "Listen 7 Audio Service",
  5608. .stream_name = "Listen 7 Audio Service",
  5609. .cpu_dai_name = "LSM7",
  5610. .platform_name = "msm-lsm-client",
  5611. .dynamic = 1,
  5612. .dpcm_capture = 1,
  5613. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5614. SND_SOC_DPCM_TRIGGER_POST },
  5615. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5616. .ignore_suspend = 1,
  5617. .codec_dai_name = "snd-soc-dummy-dai",
  5618. .codec_name = "snd-soc-dummy",
  5619. .id = MSM_FRONTEND_DAI_LSM7,
  5620. },
  5621. {/* hw:x,26 */
  5622. .name = "Listen 8 Audio Service",
  5623. .stream_name = "Listen 8 Audio Service",
  5624. .cpu_dai_name = "LSM8",
  5625. .platform_name = "msm-lsm-client",
  5626. .dynamic = 1,
  5627. .dpcm_capture = 1,
  5628. .trigger = { SND_SOC_DPCM_TRIGGER_POST,
  5629. SND_SOC_DPCM_TRIGGER_POST },
  5630. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5631. .ignore_suspend = 1,
  5632. .codec_dai_name = "snd-soc-dummy-dai",
  5633. .codec_name = "snd-soc-dummy",
  5634. .id = MSM_FRONTEND_DAI_LSM8,
  5635. },
  5636. {/* hw:x,27 */
  5637. .name = MSM_DAILINK_NAME(Media9),
  5638. .stream_name = "MultiMedia9",
  5639. .cpu_dai_name = "MultiMedia9",
  5640. .platform_name = "msm-pcm-dsp.0",
  5641. .dynamic = 1,
  5642. .dpcm_playback = 1,
  5643. .dpcm_capture = 1,
  5644. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5645. SND_SOC_DPCM_TRIGGER_POST},
  5646. .codec_dai_name = "snd-soc-dummy-dai",
  5647. .codec_name = "snd-soc-dummy",
  5648. .ignore_suspend = 1,
  5649. /* this dainlink has playback support */
  5650. .ignore_pmdown_time = 1,
  5651. .id = MSM_FRONTEND_DAI_MULTIMEDIA9,
  5652. },
  5653. {/* hw:x,28 */
  5654. .name = MSM_DAILINK_NAME(Compress4),
  5655. .stream_name = "Compress4",
  5656. .cpu_dai_name = "MultiMedia11",
  5657. .platform_name = "msm-compress-dsp",
  5658. .dynamic = 1,
  5659. .dpcm_playback = 1,
  5660. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5661. SND_SOC_DPCM_TRIGGER_POST},
  5662. .codec_dai_name = "snd-soc-dummy-dai",
  5663. .codec_name = "snd-soc-dummy",
  5664. .ignore_suspend = 1,
  5665. .ignore_pmdown_time = 1,
  5666. /* this dainlink has playback support */
  5667. .id = MSM_FRONTEND_DAI_MULTIMEDIA11,
  5668. },
  5669. {/* hw:x,29 */
  5670. .name = MSM_DAILINK_NAME(Compress5),
  5671. .stream_name = "Compress5",
  5672. .cpu_dai_name = "MultiMedia12",
  5673. .platform_name = "msm-compress-dsp",
  5674. .dynamic = 1,
  5675. .dpcm_playback = 1,
  5676. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5677. SND_SOC_DPCM_TRIGGER_POST},
  5678. .codec_dai_name = "snd-soc-dummy-dai",
  5679. .codec_name = "snd-soc-dummy",
  5680. .ignore_suspend = 1,
  5681. .ignore_pmdown_time = 1,
  5682. /* this dainlink has playback support */
  5683. .id = MSM_FRONTEND_DAI_MULTIMEDIA12,
  5684. },
  5685. {/* hw:x,30 */
  5686. .name = MSM_DAILINK_NAME(Compress6),
  5687. .stream_name = "Compress6",
  5688. .cpu_dai_name = "MultiMedia13",
  5689. .platform_name = "msm-compress-dsp",
  5690. .dynamic = 1,
  5691. .dpcm_playback = 1,
  5692. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5693. SND_SOC_DPCM_TRIGGER_POST},
  5694. .codec_dai_name = "snd-soc-dummy-dai",
  5695. .codec_name = "snd-soc-dummy",
  5696. .ignore_suspend = 1,
  5697. .ignore_pmdown_time = 1,
  5698. /* this dainlink has playback support */
  5699. .id = MSM_FRONTEND_DAI_MULTIMEDIA13,
  5700. },
  5701. {/* hw:x,31 */
  5702. .name = MSM_DAILINK_NAME(Compress7),
  5703. .stream_name = "Compress7",
  5704. .cpu_dai_name = "MultiMedia14",
  5705. .platform_name = "msm-compress-dsp",
  5706. .dynamic = 1,
  5707. .dpcm_playback = 1,
  5708. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5709. SND_SOC_DPCM_TRIGGER_POST},
  5710. .codec_dai_name = "snd-soc-dummy-dai",
  5711. .codec_name = "snd-soc-dummy",
  5712. .ignore_suspend = 1,
  5713. .ignore_pmdown_time = 1,
  5714. /* this dainlink has playback support */
  5715. .id = MSM_FRONTEND_DAI_MULTIMEDIA14,
  5716. },
  5717. {/* hw:x,32 */
  5718. .name = MSM_DAILINK_NAME(Compress8),
  5719. .stream_name = "Compress8",
  5720. .cpu_dai_name = "MultiMedia15",
  5721. .platform_name = "msm-compress-dsp",
  5722. .dynamic = 1,
  5723. .dpcm_playback = 1,
  5724. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5725. SND_SOC_DPCM_TRIGGER_POST},
  5726. .codec_dai_name = "snd-soc-dummy-dai",
  5727. .codec_name = "snd-soc-dummy",
  5728. .ignore_suspend = 1,
  5729. .ignore_pmdown_time = 1,
  5730. /* this dainlink has playback support */
  5731. .id = MSM_FRONTEND_DAI_MULTIMEDIA15,
  5732. },
  5733. {/* hw:x,33 */
  5734. .name = MSM_DAILINK_NAME(ULL_NOIRQ_2),
  5735. .stream_name = "MM_NOIRQ_2",
  5736. .cpu_dai_name = "MultiMedia16",
  5737. .platform_name = "msm-pcm-dsp-noirq",
  5738. .dynamic = 1,
  5739. .dpcm_playback = 1,
  5740. .dpcm_capture = 1,
  5741. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5742. SND_SOC_DPCM_TRIGGER_POST},
  5743. .codec_dai_name = "snd-soc-dummy-dai",
  5744. .codec_name = "snd-soc-dummy",
  5745. .ignore_suspend = 1,
  5746. .ignore_pmdown_time = 1,
  5747. /* this dainlink has playback support */
  5748. .id = MSM_FRONTEND_DAI_MULTIMEDIA16,
  5749. },
  5750. {/* hw:x,34 */
  5751. .name = "SLIMBUS_8 Hostless",
  5752. .stream_name = "SLIMBUS8_HOSTLESS Capture",
  5753. .cpu_dai_name = "SLIMBUS8_HOSTLESS",
  5754. .platform_name = "msm-pcm-hostless",
  5755. .dynamic = 1,
  5756. .dpcm_capture = 1,
  5757. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5758. SND_SOC_DPCM_TRIGGER_POST},
  5759. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5760. .ignore_suspend = 1,
  5761. .codec_dai_name = "snd-soc-dummy-dai",
  5762. .codec_name = "snd-soc-dummy",
  5763. },
  5764. {/* hw:x,35 */
  5765. .name = "CDC_DMA Hostless",
  5766. .stream_name = "CDC_DMA Hostless",
  5767. .cpu_dai_name = "CDC_DMA_HOSTLESS",
  5768. .platform_name = "msm-pcm-hostless",
  5769. .dynamic = 1,
  5770. .dpcm_playback = 1,
  5771. .dpcm_capture = 1,
  5772. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5773. SND_SOC_DPCM_TRIGGER_POST},
  5774. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5775. .ignore_suspend = 1,
  5776. /* this dailink has playback support */
  5777. .ignore_pmdown_time = 1,
  5778. .codec_dai_name = "snd-soc-dummy-dai",
  5779. .codec_name = "snd-soc-dummy",
  5780. },
  5781. {/* hw:x,36 */
  5782. .name = "TX3_CDC_DMA Hostless",
  5783. .stream_name = "TX3_CDC_DMA Hostless",
  5784. .cpu_dai_name = "TX3_CDC_DMA_HOSTLESS",
  5785. .platform_name = "msm-pcm-hostless",
  5786. .dynamic = 1,
  5787. .dpcm_capture = 1,
  5788. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5789. SND_SOC_DPCM_TRIGGER_POST},
  5790. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5791. .ignore_suspend = 1,
  5792. .codec_dai_name = "snd-soc-dummy-dai",
  5793. .codec_name = "snd-soc-dummy",
  5794. },
  5795. };
  5796. static struct snd_soc_dai_link msm_tavil_fe_dai_links[] = {
  5797. {/* hw:x,37 */
  5798. .name = LPASS_BE_SLIMBUS_4_TX,
  5799. .stream_name = "Slimbus4 Capture",
  5800. .cpu_dai_name = "msm-dai-q6-dev.16393",
  5801. .platform_name = "msm-pcm-hostless",
  5802. .codec_name = "tavil_codec",
  5803. .codec_dai_name = "tavil_vifeedback",
  5804. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  5805. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5806. .ops = &msm_be_ops,
  5807. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5808. .ignore_suspend = 1,
  5809. },
  5810. /* Ultrasound RX DAI Link */
  5811. {/* hw:x,38 */
  5812. .name = "SLIMBUS_2 Hostless Playback",
  5813. .stream_name = "SLIMBUS_2 Hostless Playback",
  5814. .cpu_dai_name = "msm-dai-q6-dev.16388",
  5815. .platform_name = "msm-pcm-hostless",
  5816. .codec_name = "tavil_codec",
  5817. .codec_dai_name = "tavil_rx2",
  5818. .ignore_suspend = 1,
  5819. .ignore_pmdown_time = 1,
  5820. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5821. .ops = &msm_slimbus_2_be_ops,
  5822. },
  5823. /* Ultrasound TX DAI Link */
  5824. {/* hw:x,39 */
  5825. .name = "SLIMBUS_2 Hostless Capture",
  5826. .stream_name = "SLIMBUS_2 Hostless Capture",
  5827. .cpu_dai_name = "msm-dai-q6-dev.16389",
  5828. .platform_name = "msm-pcm-hostless",
  5829. .codec_name = "tavil_codec",
  5830. .codec_dai_name = "tavil_tx2",
  5831. .ignore_suspend = 1,
  5832. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5833. .ops = &msm_slimbus_2_be_ops,
  5834. },
  5835. };
  5836. static struct snd_soc_dai_link msm_bolero_fe_dai_links[] = {
  5837. {/* hw:x,37 */
  5838. .name = LPASS_BE_WSA_CDC_DMA_TX_0,
  5839. .stream_name = "WSA CDC DMA0 Capture",
  5840. .cpu_dai_name = "msm-dai-cdc-dma-dev.45057",
  5841. .platform_name = "msm-pcm-hostless",
  5842. .codec_name = "bolero_codec",
  5843. .codec_dai_name = "wsa_macro_vifeedback",
  5844. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
  5845. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5846. .ignore_suspend = 1,
  5847. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5848. .ops = &msm_cdc_dma_be_ops,
  5849. },
  5850. };
  5851. static struct snd_soc_dai_link msm_common_misc_fe_dai_links[] = {
  5852. {
  5853. .name = MSM_DAILINK_NAME(ASM Loopback),
  5854. .stream_name = "MultiMedia6",
  5855. .cpu_dai_name = "MultiMedia6",
  5856. .platform_name = "msm-pcm-loopback",
  5857. .dynamic = 1,
  5858. .dpcm_playback = 1,
  5859. .dpcm_capture = 1,
  5860. .codec_dai_name = "snd-soc-dummy-dai",
  5861. .codec_name = "snd-soc-dummy",
  5862. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5863. SND_SOC_DPCM_TRIGGER_POST},
  5864. .ignore_suspend = 1,
  5865. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5866. .ignore_pmdown_time = 1,
  5867. .id = MSM_FRONTEND_DAI_MULTIMEDIA6,
  5868. },
  5869. {
  5870. .name = "USB Audio Hostless",
  5871. .stream_name = "USB Audio Hostless",
  5872. .cpu_dai_name = "USBAUDIO_HOSTLESS",
  5873. .platform_name = "msm-pcm-hostless",
  5874. .dynamic = 1,
  5875. .dpcm_playback = 1,
  5876. .dpcm_capture = 1,
  5877. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  5878. SND_SOC_DPCM_TRIGGER_POST},
  5879. .no_host_mode = SND_SOC_DAI_LINK_NO_HOST,
  5880. .ignore_suspend = 1,
  5881. .ignore_pmdown_time = 1,
  5882. .codec_dai_name = "snd-soc-dummy-dai",
  5883. .codec_name = "snd-soc-dummy",
  5884. },
  5885. };
  5886. static struct snd_soc_dai_link msm_common_be_dai_links[] = {
  5887. /* Backend AFE DAI Links */
  5888. {
  5889. .name = LPASS_BE_AFE_PCM_RX,
  5890. .stream_name = "AFE Playback",
  5891. .cpu_dai_name = "msm-dai-q6-dev.224",
  5892. .platform_name = "msm-pcm-routing",
  5893. .codec_name = "msm-stub-codec.1",
  5894. .codec_dai_name = "msm-stub-rx",
  5895. .no_pcm = 1,
  5896. .dpcm_playback = 1,
  5897. .id = MSM_BACKEND_DAI_AFE_PCM_RX,
  5898. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5899. /* this dainlink has playback support */
  5900. .ignore_pmdown_time = 1,
  5901. .ignore_suspend = 1,
  5902. },
  5903. {
  5904. .name = LPASS_BE_AFE_PCM_TX,
  5905. .stream_name = "AFE Capture",
  5906. .cpu_dai_name = "msm-dai-q6-dev.225",
  5907. .platform_name = "msm-pcm-routing",
  5908. .codec_name = "msm-stub-codec.1",
  5909. .codec_dai_name = "msm-stub-tx",
  5910. .no_pcm = 1,
  5911. .dpcm_capture = 1,
  5912. .id = MSM_BACKEND_DAI_AFE_PCM_TX,
  5913. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5914. .ignore_suspend = 1,
  5915. },
  5916. /* Incall Record Uplink BACK END DAI Link */
  5917. {
  5918. .name = LPASS_BE_INCALL_RECORD_TX,
  5919. .stream_name = "Voice Uplink Capture",
  5920. .cpu_dai_name = "msm-dai-q6-dev.32772",
  5921. .platform_name = "msm-pcm-routing",
  5922. .codec_name = "msm-stub-codec.1",
  5923. .codec_dai_name = "msm-stub-tx",
  5924. .no_pcm = 1,
  5925. .dpcm_capture = 1,
  5926. .id = MSM_BACKEND_DAI_INCALL_RECORD_TX,
  5927. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5928. .ignore_suspend = 1,
  5929. },
  5930. /* Incall Record Downlink BACK END DAI Link */
  5931. {
  5932. .name = LPASS_BE_INCALL_RECORD_RX,
  5933. .stream_name = "Voice Downlink Capture",
  5934. .cpu_dai_name = "msm-dai-q6-dev.32771",
  5935. .platform_name = "msm-pcm-routing",
  5936. .codec_name = "msm-stub-codec.1",
  5937. .codec_dai_name = "msm-stub-tx",
  5938. .no_pcm = 1,
  5939. .dpcm_capture = 1,
  5940. .id = MSM_BACKEND_DAI_INCALL_RECORD_RX,
  5941. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5942. .ignore_suspend = 1,
  5943. },
  5944. /* Incall Music BACK END DAI Link */
  5945. {
  5946. .name = LPASS_BE_VOICE_PLAYBACK_TX,
  5947. .stream_name = "Voice Farend Playback",
  5948. .cpu_dai_name = "msm-dai-q6-dev.32773",
  5949. .platform_name = "msm-pcm-routing",
  5950. .codec_name = "msm-stub-codec.1",
  5951. .codec_dai_name = "msm-stub-rx",
  5952. .no_pcm = 1,
  5953. .dpcm_playback = 1,
  5954. .id = MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
  5955. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5956. .ignore_suspend = 1,
  5957. .ignore_pmdown_time = 1,
  5958. },
  5959. /* Incall Music 2 BACK END DAI Link */
  5960. {
  5961. .name = LPASS_BE_VOICE2_PLAYBACK_TX,
  5962. .stream_name = "Voice2 Farend Playback",
  5963. .cpu_dai_name = "msm-dai-q6-dev.32770",
  5964. .platform_name = "msm-pcm-routing",
  5965. .codec_name = "msm-stub-codec.1",
  5966. .codec_dai_name = "msm-stub-rx",
  5967. .no_pcm = 1,
  5968. .dpcm_playback = 1,
  5969. .id = MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
  5970. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5971. .ignore_suspend = 1,
  5972. .ignore_pmdown_time = 1,
  5973. },
  5974. {
  5975. .name = LPASS_BE_USB_AUDIO_RX,
  5976. .stream_name = "USB Audio Playback",
  5977. .cpu_dai_name = "msm-dai-q6-dev.28672",
  5978. .platform_name = "msm-pcm-routing",
  5979. .codec_name = "msm-stub-codec.1",
  5980. .codec_dai_name = "msm-stub-rx",
  5981. .no_pcm = 1,
  5982. .dpcm_playback = 1,
  5983. .id = MSM_BACKEND_DAI_USB_RX,
  5984. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5985. .ignore_pmdown_time = 1,
  5986. .ignore_suspend = 1,
  5987. },
  5988. {
  5989. .name = LPASS_BE_USB_AUDIO_TX,
  5990. .stream_name = "USB Audio Capture",
  5991. .cpu_dai_name = "msm-dai-q6-dev.28673",
  5992. .platform_name = "msm-pcm-routing",
  5993. .codec_name = "msm-stub-codec.1",
  5994. .codec_dai_name = "msm-stub-tx",
  5995. .no_pcm = 1,
  5996. .dpcm_capture = 1,
  5997. .id = MSM_BACKEND_DAI_USB_TX,
  5998. .be_hw_params_fixup = msm_be_hw_params_fixup,
  5999. .ignore_suspend = 1,
  6000. },
  6001. {
  6002. .name = LPASS_BE_PRI_TDM_RX_0,
  6003. .stream_name = "Primary TDM0 Playback",
  6004. .cpu_dai_name = "msm-dai-q6-tdm.36864",
  6005. .platform_name = "msm-pcm-routing",
  6006. .codec_name = "msm-stub-codec.1",
  6007. .codec_dai_name = "msm-stub-rx",
  6008. .no_pcm = 1,
  6009. .dpcm_playback = 1,
  6010. .id = MSM_BACKEND_DAI_PRI_TDM_RX_0,
  6011. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6012. .ops = &sm6150_tdm_be_ops,
  6013. .ignore_suspend = 1,
  6014. .ignore_pmdown_time = 1,
  6015. },
  6016. {
  6017. .name = LPASS_BE_PRI_TDM_TX_0,
  6018. .stream_name = "Primary TDM0 Capture",
  6019. .cpu_dai_name = "msm-dai-q6-tdm.36865",
  6020. .platform_name = "msm-pcm-routing",
  6021. .codec_name = "msm-stub-codec.1",
  6022. .codec_dai_name = "msm-stub-tx",
  6023. .no_pcm = 1,
  6024. .dpcm_capture = 1,
  6025. .id = MSM_BACKEND_DAI_PRI_TDM_TX_0,
  6026. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6027. .ops = &sm6150_tdm_be_ops,
  6028. .ignore_suspend = 1,
  6029. },
  6030. {
  6031. .name = LPASS_BE_SEC_TDM_RX_0,
  6032. .stream_name = "Secondary TDM0 Playback",
  6033. .cpu_dai_name = "msm-dai-q6-tdm.36880",
  6034. .platform_name = "msm-pcm-routing",
  6035. .codec_name = "msm-stub-codec.1",
  6036. .codec_dai_name = "msm-stub-rx",
  6037. .no_pcm = 1,
  6038. .dpcm_playback = 1,
  6039. .id = MSM_BACKEND_DAI_SEC_TDM_RX_0,
  6040. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6041. .ops = &sm6150_tdm_be_ops,
  6042. .ignore_suspend = 1,
  6043. .ignore_pmdown_time = 1,
  6044. },
  6045. {
  6046. .name = LPASS_BE_SEC_TDM_TX_0,
  6047. .stream_name = "Secondary TDM0 Capture",
  6048. .cpu_dai_name = "msm-dai-q6-tdm.36881",
  6049. .platform_name = "msm-pcm-routing",
  6050. .codec_name = "msm-stub-codec.1",
  6051. .codec_dai_name = "msm-stub-tx",
  6052. .no_pcm = 1,
  6053. .dpcm_capture = 1,
  6054. .id = MSM_BACKEND_DAI_SEC_TDM_TX_0,
  6055. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6056. .ops = &sm6150_tdm_be_ops,
  6057. .ignore_suspend = 1,
  6058. },
  6059. {
  6060. .name = LPASS_BE_TERT_TDM_RX_0,
  6061. .stream_name = "Tertiary TDM0 Playback",
  6062. .cpu_dai_name = "msm-dai-q6-tdm.36896",
  6063. .platform_name = "msm-pcm-routing",
  6064. .codec_name = "msm-stub-codec.1",
  6065. .codec_dai_name = "msm-stub-rx",
  6066. .no_pcm = 1,
  6067. .dpcm_playback = 1,
  6068. .id = MSM_BACKEND_DAI_TERT_TDM_RX_0,
  6069. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6070. .ops = &sm6150_tdm_be_ops,
  6071. .ignore_suspend = 1,
  6072. .ignore_pmdown_time = 1,
  6073. },
  6074. {
  6075. .name = LPASS_BE_TERT_TDM_TX_0,
  6076. .stream_name = "Tertiary TDM0 Capture",
  6077. .cpu_dai_name = "msm-dai-q6-tdm.36897",
  6078. .platform_name = "msm-pcm-routing",
  6079. .codec_name = "msm-stub-codec.1",
  6080. .codec_dai_name = "msm-stub-tx",
  6081. .no_pcm = 1,
  6082. .dpcm_capture = 1,
  6083. .id = MSM_BACKEND_DAI_TERT_TDM_TX_0,
  6084. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6085. .ops = &sm6150_tdm_be_ops,
  6086. .ignore_suspend = 1,
  6087. },
  6088. {
  6089. .name = LPASS_BE_QUAT_TDM_RX_0,
  6090. .stream_name = "Quaternary TDM0 Playback",
  6091. .cpu_dai_name = "msm-dai-q6-tdm.36912",
  6092. .platform_name = "msm-pcm-routing",
  6093. .codec_name = "msm-stub-codec.1",
  6094. .codec_dai_name = "msm-stub-rx",
  6095. .no_pcm = 1,
  6096. .dpcm_playback = 1,
  6097. .id = MSM_BACKEND_DAI_QUAT_TDM_RX_0,
  6098. .be_hw_params_fixup = msm_tdm_be_hw_params_fixup,
  6099. .ops = &sm6150_tdm_be_ops,
  6100. .ignore_suspend = 1,
  6101. .ignore_pmdown_time = 1,
  6102. },
  6103. {
  6104. .name = LPASS_BE_QUAT_TDM_TX_0,
  6105. .stream_name = "Quaternary TDM0 Capture",
  6106. .cpu_dai_name = "msm-dai-q6-tdm.36913",
  6107. .platform_name = "msm-pcm-routing",
  6108. .codec_name = "msm-stub-codec.1",
  6109. .codec_dai_name = "msm-stub-tx",
  6110. .no_pcm = 1,
  6111. .dpcm_capture = 1,
  6112. .id = MSM_BACKEND_DAI_QUAT_TDM_TX_0,
  6113. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6114. .ops = &sm6150_tdm_be_ops,
  6115. .ignore_suspend = 1,
  6116. },
  6117. };
  6118. static struct snd_soc_dai_link msm_tavil_be_dai_links[] = {
  6119. {
  6120. .name = LPASS_BE_SLIMBUS_0_RX,
  6121. .stream_name = "Slimbus Playback",
  6122. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6123. .platform_name = "msm-pcm-routing",
  6124. .codec_name = "tavil_codec",
  6125. .codec_dai_name = "tavil_rx1",
  6126. .no_pcm = 1,
  6127. .dpcm_playback = 1,
  6128. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  6129. .init = &msm_audrx_tavil_init,
  6130. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6131. /* this dainlink has playback support */
  6132. .ignore_pmdown_time = 1,
  6133. .ignore_suspend = 1,
  6134. .ops = &msm_be_ops,
  6135. },
  6136. {
  6137. .name = LPASS_BE_SLIMBUS_0_TX,
  6138. .stream_name = "Slimbus Capture",
  6139. .cpu_dai_name = "msm-dai-q6-dev.16385",
  6140. .platform_name = "msm-pcm-routing",
  6141. .codec_name = "tavil_codec",
  6142. .codec_dai_name = "tavil_tx1",
  6143. .no_pcm = 1,
  6144. .dpcm_capture = 1,
  6145. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  6146. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6147. .ignore_suspend = 1,
  6148. .ops = &msm_be_ops,
  6149. },
  6150. {
  6151. .name = LPASS_BE_SLIMBUS_1_RX,
  6152. .stream_name = "Slimbus1 Playback",
  6153. .cpu_dai_name = "msm-dai-q6-dev.16386",
  6154. .platform_name = "msm-pcm-routing",
  6155. .codec_name = "tavil_codec",
  6156. .codec_dai_name = "tavil_rx1",
  6157. .no_pcm = 1,
  6158. .dpcm_playback = 1,
  6159. .id = MSM_BACKEND_DAI_SLIMBUS_1_RX,
  6160. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6161. .ops = &msm_be_ops,
  6162. /* dai link has playback support */
  6163. .ignore_pmdown_time = 1,
  6164. .ignore_suspend = 1,
  6165. },
  6166. {
  6167. .name = LPASS_BE_SLIMBUS_1_TX,
  6168. .stream_name = "Slimbus1 Capture",
  6169. .cpu_dai_name = "msm-dai-q6-dev.16387",
  6170. .platform_name = "msm-pcm-routing",
  6171. .codec_name = "tavil_codec",
  6172. .codec_dai_name = "tavil_tx3",
  6173. .no_pcm = 1,
  6174. .dpcm_capture = 1,
  6175. .id = MSM_BACKEND_DAI_SLIMBUS_1_TX,
  6176. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6177. .ops = &msm_be_ops,
  6178. .ignore_suspend = 1,
  6179. },
  6180. {
  6181. .name = LPASS_BE_SLIMBUS_2_RX,
  6182. .stream_name = "Slimbus2 Playback",
  6183. .cpu_dai_name = "msm-dai-q6-dev.16388",
  6184. .platform_name = "msm-pcm-routing",
  6185. .codec_name = "tavil_codec",
  6186. .codec_dai_name = "tavil_rx2",
  6187. .no_pcm = 1,
  6188. .dpcm_playback = 1,
  6189. .id = MSM_BACKEND_DAI_SLIMBUS_2_RX,
  6190. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6191. .ops = &msm_be_ops,
  6192. .ignore_pmdown_time = 1,
  6193. .ignore_suspend = 1,
  6194. },
  6195. {
  6196. .name = LPASS_BE_SLIMBUS_3_RX,
  6197. .stream_name = "Slimbus3 Playback",
  6198. .cpu_dai_name = "msm-dai-q6-dev.16390",
  6199. .platform_name = "msm-pcm-routing",
  6200. .codec_name = "tavil_codec",
  6201. .codec_dai_name = "tavil_rx1",
  6202. .no_pcm = 1,
  6203. .dpcm_playback = 1,
  6204. .id = MSM_BACKEND_DAI_SLIMBUS_3_RX,
  6205. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6206. .ops = &msm_be_ops,
  6207. /* dai link has playback support */
  6208. .ignore_pmdown_time = 1,
  6209. .ignore_suspend = 1,
  6210. },
  6211. {
  6212. .name = LPASS_BE_SLIMBUS_3_TX,
  6213. .stream_name = "Slimbus3 Capture",
  6214. .cpu_dai_name = "msm-dai-q6-dev.16391",
  6215. .platform_name = "msm-pcm-routing",
  6216. .codec_name = "tavil_codec",
  6217. .codec_dai_name = "tavil_tx1",
  6218. .no_pcm = 1,
  6219. .dpcm_capture = 1,
  6220. .id = MSM_BACKEND_DAI_SLIMBUS_3_TX,
  6221. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6222. .ops = &msm_be_ops,
  6223. .ignore_suspend = 1,
  6224. },
  6225. {
  6226. .name = LPASS_BE_SLIMBUS_4_RX,
  6227. .stream_name = "Slimbus4 Playback",
  6228. .cpu_dai_name = "msm-dai-q6-dev.16392",
  6229. .platform_name = "msm-pcm-routing",
  6230. .codec_name = "tavil_codec",
  6231. .codec_dai_name = "tavil_rx1",
  6232. .no_pcm = 1,
  6233. .dpcm_playback = 1,
  6234. .id = MSM_BACKEND_DAI_SLIMBUS_4_RX,
  6235. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6236. .ops = &msm_be_ops,
  6237. /* dai link has playback support */
  6238. .ignore_pmdown_time = 1,
  6239. .ignore_suspend = 1,
  6240. },
  6241. {
  6242. .name = LPASS_BE_SLIMBUS_5_RX,
  6243. .stream_name = "Slimbus5 Playback",
  6244. .cpu_dai_name = "msm-dai-q6-dev.16394",
  6245. .platform_name = "msm-pcm-routing",
  6246. .codec_name = "tavil_codec",
  6247. .codec_dai_name = "tavil_rx3",
  6248. .no_pcm = 1,
  6249. .dpcm_playback = 1,
  6250. .id = MSM_BACKEND_DAI_SLIMBUS_5_RX,
  6251. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6252. .ops = &msm_be_ops,
  6253. /* dai link has playback support */
  6254. .ignore_pmdown_time = 1,
  6255. .ignore_suspend = 1,
  6256. },
  6257. /* MAD BE */
  6258. {
  6259. .name = LPASS_BE_SLIMBUS_5_TX,
  6260. .stream_name = "Slimbus5 Capture",
  6261. .cpu_dai_name = "msm-dai-q6-dev.16395",
  6262. .platform_name = "msm-pcm-routing",
  6263. .codec_name = "tavil_codec",
  6264. .codec_dai_name = "tavil_mad1",
  6265. .no_pcm = 1,
  6266. .dpcm_capture = 1,
  6267. .id = MSM_BACKEND_DAI_SLIMBUS_5_TX,
  6268. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6269. .ops = &msm_be_ops,
  6270. .ignore_suspend = 1,
  6271. },
  6272. {
  6273. .name = LPASS_BE_SLIMBUS_6_RX,
  6274. .stream_name = "Slimbus6 Playback",
  6275. .cpu_dai_name = "msm-dai-q6-dev.16396",
  6276. .platform_name = "msm-pcm-routing",
  6277. .codec_name = "tavil_codec",
  6278. .codec_dai_name = "tavil_rx4",
  6279. .no_pcm = 1,
  6280. .dpcm_playback = 1,
  6281. .id = MSM_BACKEND_DAI_SLIMBUS_6_RX,
  6282. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6283. .ops = &msm_be_ops,
  6284. /* dai link has playback support */
  6285. .ignore_pmdown_time = 1,
  6286. .ignore_suspend = 1,
  6287. },
  6288. /* Slimbus VI Recording */
  6289. {
  6290. .name = LPASS_BE_SLIMBUS_TX_VI,
  6291. .stream_name = "Slimbus4 Capture",
  6292. .cpu_dai_name = "msm-dai-q6-dev.16393",
  6293. .platform_name = "msm-pcm-routing",
  6294. .codec_name = "tavil_codec",
  6295. .codec_dai_name = "tavil_vifeedback",
  6296. .id = MSM_BACKEND_DAI_SLIMBUS_4_TX,
  6297. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6298. .ops = &msm_be_ops,
  6299. .ignore_suspend = 1,
  6300. .no_pcm = 1,
  6301. .dpcm_capture = 1,
  6302. },
  6303. };
  6304. static struct snd_soc_dai_link msm_wcn_be_dai_links[] = {
  6305. {
  6306. .name = LPASS_BE_SLIMBUS_7_RX,
  6307. .stream_name = "Slimbus7 Playback",
  6308. .cpu_dai_name = "msm-dai-q6-dev.16398",
  6309. .platform_name = "msm-pcm-routing",
  6310. .codec_name = "btfmslim_slave",
  6311. /* BT codec driver determines capabilities based on
  6312. * dai name, bt codecdai name should always contains
  6313. * supported usecase information
  6314. */
  6315. .codec_dai_name = "btfm_bt_sco_a2dp_slim_rx",
  6316. .no_pcm = 1,
  6317. .dpcm_playback = 1,
  6318. .id = MSM_BACKEND_DAI_SLIMBUS_7_RX,
  6319. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6320. .ops = &msm_wcn_ops,
  6321. /* dai link has playback support */
  6322. .ignore_pmdown_time = 1,
  6323. .ignore_suspend = 1,
  6324. },
  6325. {
  6326. .name = LPASS_BE_SLIMBUS_7_TX,
  6327. .stream_name = "Slimbus7 Capture",
  6328. .cpu_dai_name = "msm-dai-q6-dev.16399",
  6329. .platform_name = "msm-pcm-routing",
  6330. .codec_name = "btfmslim_slave",
  6331. .codec_dai_name = "btfm_bt_sco_slim_tx",
  6332. .no_pcm = 1,
  6333. .dpcm_capture = 1,
  6334. .id = MSM_BACKEND_DAI_SLIMBUS_7_TX,
  6335. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6336. .ops = &msm_wcn_ops,
  6337. .ignore_suspend = 1,
  6338. },
  6339. {
  6340. .name = LPASS_BE_SLIMBUS_8_TX,
  6341. .stream_name = "Slimbus8 Capture",
  6342. .cpu_dai_name = "msm-dai-q6-dev.16401",
  6343. .platform_name = "msm-pcm-routing",
  6344. .codec_name = "btfmslim_slave",
  6345. .codec_dai_name = "btfm_fm_slim_tx",
  6346. .no_pcm = 1,
  6347. .dpcm_capture = 1,
  6348. .id = MSM_BACKEND_DAI_SLIMBUS_8_TX,
  6349. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6350. .init = &msm_wcn_init,
  6351. .ops = &msm_wcn_ops,
  6352. .ignore_suspend = 1,
  6353. },
  6354. };
  6355. static struct snd_soc_dai_link ext_disp_be_dai_link[] = {
  6356. /* DISP PORT BACK END DAI Link */
  6357. {
  6358. .name = LPASS_BE_DISPLAY_PORT,
  6359. .stream_name = "Display Port Playback",
  6360. .cpu_dai_name = "msm-dai-q6-dp.24608",
  6361. .platform_name = "msm-pcm-routing",
  6362. .codec_name = "msm-ext-disp-audio-codec-rx",
  6363. .codec_dai_name = "msm_dp_audio_codec_rx_dai",
  6364. .no_pcm = 1,
  6365. .dpcm_playback = 1,
  6366. .id = MSM_BACKEND_DAI_DISPLAY_PORT_RX,
  6367. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6368. .ignore_pmdown_time = 1,
  6369. .ignore_suspend = 1,
  6370. },
  6371. };
  6372. static struct snd_soc_dai_link msm_mi2s_be_dai_links[] = {
  6373. {
  6374. .name = LPASS_BE_PRI_MI2S_RX,
  6375. .stream_name = "Primary MI2S Playback",
  6376. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6377. .platform_name = "msm-pcm-routing",
  6378. .codec_name = "msm-stub-codec.1",
  6379. .codec_dai_name = "msm-stub-rx",
  6380. .no_pcm = 1,
  6381. .dpcm_playback = 1,
  6382. .id = MSM_BACKEND_DAI_PRI_MI2S_RX,
  6383. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6384. .ops = &msm_mi2s_be_ops,
  6385. .ignore_suspend = 1,
  6386. .ignore_pmdown_time = 1,
  6387. },
  6388. {
  6389. .name = LPASS_BE_PRI_MI2S_TX,
  6390. .stream_name = "Primary MI2S Capture",
  6391. .cpu_dai_name = "msm-dai-q6-mi2s.0",
  6392. .platform_name = "msm-pcm-routing",
  6393. .codec_name = "msm-stub-codec.1",
  6394. .codec_dai_name = "msm-stub-tx",
  6395. .no_pcm = 1,
  6396. .dpcm_capture = 1,
  6397. .id = MSM_BACKEND_DAI_PRI_MI2S_TX,
  6398. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6399. .ops = &msm_mi2s_be_ops,
  6400. .ignore_suspend = 1,
  6401. },
  6402. {
  6403. .name = LPASS_BE_SEC_MI2S_RX,
  6404. .stream_name = "Secondary MI2S Playback",
  6405. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6406. .platform_name = "msm-pcm-routing",
  6407. .codec_name = "msm-stub-codec.1",
  6408. .codec_dai_name = "msm-stub-rx",
  6409. .no_pcm = 1,
  6410. .dpcm_playback = 1,
  6411. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
  6412. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6413. .ops = &msm_mi2s_be_ops,
  6414. .ignore_suspend = 1,
  6415. .ignore_pmdown_time = 1,
  6416. },
  6417. {
  6418. .name = LPASS_BE_SEC_MI2S_TX,
  6419. .stream_name = "Secondary MI2S Capture",
  6420. .cpu_dai_name = "msm-dai-q6-mi2s.1",
  6421. .platform_name = "msm-pcm-routing",
  6422. .codec_name = "msm-stub-codec.1",
  6423. .codec_dai_name = "msm-stub-tx",
  6424. .no_pcm = 1,
  6425. .dpcm_capture = 1,
  6426. .id = MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
  6427. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6428. .ops = &msm_mi2s_be_ops,
  6429. .ignore_suspend = 1,
  6430. },
  6431. {
  6432. .name = LPASS_BE_TERT_MI2S_RX,
  6433. .stream_name = "Tertiary MI2S Playback",
  6434. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6435. .platform_name = "msm-pcm-routing",
  6436. .codec_name = "msm-stub-codec.1",
  6437. .codec_dai_name = "msm-stub-rx",
  6438. .no_pcm = 1,
  6439. .dpcm_playback = 1,
  6440. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
  6441. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6442. .ops = &msm_mi2s_be_ops,
  6443. .ignore_suspend = 1,
  6444. .ignore_pmdown_time = 1,
  6445. },
  6446. {
  6447. .name = LPASS_BE_TERT_MI2S_TX,
  6448. .stream_name = "Tertiary MI2S Capture",
  6449. .cpu_dai_name = "msm-dai-q6-mi2s.2",
  6450. .platform_name = "msm-pcm-routing",
  6451. .codec_name = "msm-stub-codec.1",
  6452. .codec_dai_name = "msm-stub-tx",
  6453. .no_pcm = 1,
  6454. .dpcm_capture = 1,
  6455. .id = MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
  6456. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6457. .ops = &msm_mi2s_be_ops,
  6458. .ignore_suspend = 1,
  6459. },
  6460. {
  6461. .name = LPASS_BE_QUAT_MI2S_RX,
  6462. .stream_name = "Quaternary MI2S Playback",
  6463. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6464. .platform_name = "msm-pcm-routing",
  6465. .codec_name = "msm-stub-codec.1",
  6466. .codec_dai_name = "msm-stub-rx",
  6467. .no_pcm = 1,
  6468. .dpcm_playback = 1,
  6469. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
  6470. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6471. .ops = &msm_mi2s_be_ops,
  6472. .ignore_suspend = 1,
  6473. .ignore_pmdown_time = 1,
  6474. },
  6475. {
  6476. .name = LPASS_BE_QUAT_MI2S_TX,
  6477. .stream_name = "Quaternary MI2S Capture",
  6478. .cpu_dai_name = "msm-dai-q6-mi2s.3",
  6479. .platform_name = "msm-pcm-routing",
  6480. .codec_name = "msm-stub-codec.1",
  6481. .codec_dai_name = "msm-stub-tx",
  6482. .no_pcm = 1,
  6483. .dpcm_capture = 1,
  6484. .id = MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
  6485. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6486. .ops = &msm_mi2s_be_ops,
  6487. .ignore_suspend = 1,
  6488. },
  6489. {
  6490. .name = LPASS_BE_QUIN_MI2S_RX,
  6491. .stream_name = "Quinary MI2S Playback",
  6492. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6493. .platform_name = "msm-pcm-routing",
  6494. .codec_name = "msm-stub-codec.1",
  6495. .codec_dai_name = "msm-stub-rx",
  6496. .no_pcm = 1,
  6497. .dpcm_playback = 1,
  6498. .id = MSM_BACKEND_DAI_QUINARY_MI2S_RX,
  6499. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6500. .ops = &msm_mi2s_be_ops,
  6501. .ignore_suspend = 1,
  6502. .ignore_pmdown_time = 1,
  6503. },
  6504. {
  6505. .name = LPASS_BE_QUIN_MI2S_TX,
  6506. .stream_name = "Quinary MI2S Capture",
  6507. .cpu_dai_name = "msm-dai-q6-mi2s.4",
  6508. .platform_name = "msm-pcm-routing",
  6509. .codec_name = "msm-stub-codec.1",
  6510. .codec_dai_name = "msm-stub-tx",
  6511. .no_pcm = 1,
  6512. .dpcm_capture = 1,
  6513. .id = MSM_BACKEND_DAI_QUINARY_MI2S_TX,
  6514. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6515. .ops = &msm_mi2s_be_ops,
  6516. .ignore_suspend = 1,
  6517. },
  6518. };
  6519. static struct snd_soc_dai_link msm_auxpcm_be_dai_links[] = {
  6520. /* Primary AUX PCM Backend DAI Links */
  6521. {
  6522. .name = LPASS_BE_AUXPCM_RX,
  6523. .stream_name = "AUX PCM Playback",
  6524. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6525. .platform_name = "msm-pcm-routing",
  6526. .codec_name = "msm-stub-codec.1",
  6527. .codec_dai_name = "msm-stub-rx",
  6528. .no_pcm = 1,
  6529. .dpcm_playback = 1,
  6530. .id = MSM_BACKEND_DAI_AUXPCM_RX,
  6531. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6532. .ignore_pmdown_time = 1,
  6533. .ignore_suspend = 1,
  6534. },
  6535. {
  6536. .name = LPASS_BE_AUXPCM_TX,
  6537. .stream_name = "AUX PCM Capture",
  6538. .cpu_dai_name = "msm-dai-q6-auxpcm.1",
  6539. .platform_name = "msm-pcm-routing",
  6540. .codec_name = "msm-stub-codec.1",
  6541. .codec_dai_name = "msm-stub-tx",
  6542. .no_pcm = 1,
  6543. .dpcm_capture = 1,
  6544. .id = MSM_BACKEND_DAI_AUXPCM_TX,
  6545. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6546. .ignore_suspend = 1,
  6547. },
  6548. /* Secondary AUX PCM Backend DAI Links */
  6549. {
  6550. .name = LPASS_BE_SEC_AUXPCM_RX,
  6551. .stream_name = "Sec AUX PCM Playback",
  6552. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6553. .platform_name = "msm-pcm-routing",
  6554. .codec_name = "msm-stub-codec.1",
  6555. .codec_dai_name = "msm-stub-rx",
  6556. .no_pcm = 1,
  6557. .dpcm_playback = 1,
  6558. .id = MSM_BACKEND_DAI_SEC_AUXPCM_RX,
  6559. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6560. .ignore_pmdown_time = 1,
  6561. .ignore_suspend = 1,
  6562. },
  6563. {
  6564. .name = LPASS_BE_SEC_AUXPCM_TX,
  6565. .stream_name = "Sec AUX PCM Capture",
  6566. .cpu_dai_name = "msm-dai-q6-auxpcm.2",
  6567. .platform_name = "msm-pcm-routing",
  6568. .codec_name = "msm-stub-codec.1",
  6569. .codec_dai_name = "msm-stub-tx",
  6570. .no_pcm = 1,
  6571. .dpcm_capture = 1,
  6572. .id = MSM_BACKEND_DAI_SEC_AUXPCM_TX,
  6573. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6574. .ignore_suspend = 1,
  6575. },
  6576. /* Tertiary AUX PCM Backend DAI Links */
  6577. {
  6578. .name = LPASS_BE_TERT_AUXPCM_RX,
  6579. .stream_name = "Tert AUX PCM Playback",
  6580. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6581. .platform_name = "msm-pcm-routing",
  6582. .codec_name = "msm-stub-codec.1",
  6583. .codec_dai_name = "msm-stub-rx",
  6584. .no_pcm = 1,
  6585. .dpcm_playback = 1,
  6586. .id = MSM_BACKEND_DAI_TERT_AUXPCM_RX,
  6587. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6588. .ignore_suspend = 1,
  6589. },
  6590. {
  6591. .name = LPASS_BE_TERT_AUXPCM_TX,
  6592. .stream_name = "Tert AUX PCM Capture",
  6593. .cpu_dai_name = "msm-dai-q6-auxpcm.3",
  6594. .platform_name = "msm-pcm-routing",
  6595. .codec_name = "msm-stub-codec.1",
  6596. .codec_dai_name = "msm-stub-tx",
  6597. .no_pcm = 1,
  6598. .dpcm_capture = 1,
  6599. .id = MSM_BACKEND_DAI_TERT_AUXPCM_TX,
  6600. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6601. .ignore_suspend = 1,
  6602. },
  6603. /* Quaternary AUX PCM Backend DAI Links */
  6604. {
  6605. .name = LPASS_BE_QUAT_AUXPCM_RX,
  6606. .stream_name = "Quat AUX PCM Playback",
  6607. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6608. .platform_name = "msm-pcm-routing",
  6609. .codec_name = "msm-stub-codec.1",
  6610. .codec_dai_name = "msm-stub-rx",
  6611. .no_pcm = 1,
  6612. .dpcm_playback = 1,
  6613. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
  6614. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6615. .ignore_pmdown_time = 1,
  6616. .ignore_suspend = 1,
  6617. },
  6618. {
  6619. .name = LPASS_BE_QUAT_AUXPCM_TX,
  6620. .stream_name = "Quat AUX PCM Capture",
  6621. .cpu_dai_name = "msm-dai-q6-auxpcm.4",
  6622. .platform_name = "msm-pcm-routing",
  6623. .codec_name = "msm-stub-codec.1",
  6624. .codec_dai_name = "msm-stub-tx",
  6625. .no_pcm = 1,
  6626. .dpcm_capture = 1,
  6627. .id = MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
  6628. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6629. .ignore_suspend = 1,
  6630. },
  6631. /* Quinary AUX PCM Backend DAI Links */
  6632. {
  6633. .name = LPASS_BE_QUIN_AUXPCM_RX,
  6634. .stream_name = "Quin AUX PCM Playback",
  6635. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6636. .platform_name = "msm-pcm-routing",
  6637. .codec_name = "msm-stub-codec.1",
  6638. .codec_dai_name = "msm-stub-rx",
  6639. .no_pcm = 1,
  6640. .dpcm_playback = 1,
  6641. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
  6642. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6643. .ignore_pmdown_time = 1,
  6644. .ignore_suspend = 1,
  6645. },
  6646. {
  6647. .name = LPASS_BE_QUIN_AUXPCM_TX,
  6648. .stream_name = "Quin AUX PCM Capture",
  6649. .cpu_dai_name = "msm-dai-q6-auxpcm.5",
  6650. .platform_name = "msm-pcm-routing",
  6651. .codec_name = "msm-stub-codec.1",
  6652. .codec_dai_name = "msm-stub-tx",
  6653. .no_pcm = 1,
  6654. .dpcm_capture = 1,
  6655. .id = MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
  6656. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6657. .ignore_suspend = 1,
  6658. },
  6659. };
  6660. static struct snd_soc_dai_link msm_wsa_cdc_dma_be_dai_links[] = {
  6661. /* WSA CDC DMA Backend DAI Links */
  6662. {
  6663. .name = LPASS_BE_WSA_CDC_DMA_RX_0,
  6664. .stream_name = "WSA CDC DMA0 Playback",
  6665. .cpu_dai_name = "msm-dai-cdc-dma-dev.45056",
  6666. .platform_name = "msm-pcm-routing",
  6667. .codec_name = "bolero_codec",
  6668. .codec_dai_name = "wsa_macro_rx1",
  6669. .no_pcm = 1,
  6670. .dpcm_playback = 1,
  6671. .init = &msm_int_audrx_init,
  6672. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
  6673. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6674. .ignore_pmdown_time = 1,
  6675. .ignore_suspend = 1,
  6676. .ops = &msm_cdc_dma_be_ops,
  6677. },
  6678. {
  6679. .name = LPASS_BE_WSA_CDC_DMA_RX_1,
  6680. .stream_name = "WSA CDC DMA1 Playback",
  6681. .cpu_dai_name = "msm-dai-cdc-dma-dev.45058",
  6682. .platform_name = "msm-pcm-routing",
  6683. .codec_name = "bolero_codec",
  6684. .codec_dai_name = "wsa_macro_rx_mix",
  6685. .no_pcm = 1,
  6686. .dpcm_playback = 1,
  6687. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
  6688. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6689. .ignore_pmdown_time = 1,
  6690. .ignore_suspend = 1,
  6691. .ops = &msm_cdc_dma_be_ops,
  6692. },
  6693. {
  6694. .name = LPASS_BE_WSA_CDC_DMA_TX_1,
  6695. .stream_name = "WSA CDC DMA1 Capture",
  6696. .cpu_dai_name = "msm-dai-cdc-dma-dev.45059",
  6697. .platform_name = "msm-pcm-routing",
  6698. .codec_name = "bolero_codec",
  6699. .codec_dai_name = "wsa_macro_echo",
  6700. .no_pcm = 1,
  6701. .dpcm_capture = 1,
  6702. .id = MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
  6703. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6704. .ignore_suspend = 1,
  6705. .ops = &msm_cdc_dma_be_ops,
  6706. },
  6707. };
  6708. static struct snd_soc_dai_link msm_rx_tx_cdc_dma_be_dai_links[] = {
  6709. /* RX CDC DMA Backend DAI Links */
  6710. {
  6711. .name = LPASS_BE_RX_CDC_DMA_RX_0,
  6712. .stream_name = "RX CDC DMA0 Playback",
  6713. .cpu_dai_name = "msm-dai-cdc-dma-dev.45104",
  6714. .platform_name = "msm-pcm-routing",
  6715. .codec_name = "bolero_codec",
  6716. .codec_dai_name = "rx_macro_rx1",
  6717. .no_pcm = 1,
  6718. .dpcm_playback = 1,
  6719. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
  6720. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6721. .ignore_pmdown_time = 1,
  6722. .ignore_suspend = 1,
  6723. .ops = &msm_cdc_dma_be_ops,
  6724. },
  6725. {
  6726. .name = LPASS_BE_RX_CDC_DMA_RX_1,
  6727. .stream_name = "RX CDC DMA1 Playback",
  6728. .cpu_dai_name = "msm-dai-cdc-dma-dev.45106",
  6729. .platform_name = "msm-pcm-routing",
  6730. .codec_name = "bolero_codec",
  6731. .codec_dai_name = "rx_macro_rx2",
  6732. .no_pcm = 1,
  6733. .dpcm_playback = 1,
  6734. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
  6735. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6736. .ignore_pmdown_time = 1,
  6737. .ignore_suspend = 1,
  6738. .ops = &msm_cdc_dma_be_ops,
  6739. },
  6740. {
  6741. .name = LPASS_BE_RX_CDC_DMA_RX_2,
  6742. .stream_name = "RX CDC DMA2 Playback",
  6743. .cpu_dai_name = "msm-dai-cdc-dma-dev.45108",
  6744. .platform_name = "msm-pcm-routing",
  6745. .codec_name = "bolero_codec",
  6746. .codec_dai_name = "rx_macro_rx3",
  6747. .no_pcm = 1,
  6748. .dpcm_playback = 1,
  6749. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
  6750. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6751. .ignore_pmdown_time = 1,
  6752. .ignore_suspend = 1,
  6753. .ops = &msm_cdc_dma_be_ops,
  6754. },
  6755. {
  6756. .name = LPASS_BE_RX_CDC_DMA_RX_3,
  6757. .stream_name = "RX CDC DMA3 Playback",
  6758. .cpu_dai_name = "msm-dai-cdc-dma-dev.45110",
  6759. .platform_name = "msm-pcm-routing",
  6760. .codec_name = "bolero_codec",
  6761. .codec_dai_name = "rx_macro_rx4",
  6762. .no_pcm = 1,
  6763. .dpcm_playback = 1,
  6764. .id = MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
  6765. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6766. .ignore_pmdown_time = 1,
  6767. .ignore_suspend = 1,
  6768. .ops = &msm_cdc_dma_be_ops,
  6769. },
  6770. /* TX CDC DMA Backend DAI Links */
  6771. {
  6772. .name = LPASS_BE_TX_CDC_DMA_TX_3,
  6773. .stream_name = "TX CDC DMA3 Capture",
  6774. .cpu_dai_name = "msm-dai-cdc-dma-dev.45111",
  6775. .platform_name = "msm-pcm-routing",
  6776. .codec_name = "bolero_codec",
  6777. .codec_dai_name = "tx_macro_tx1",
  6778. .no_pcm = 1,
  6779. .dpcm_capture = 1,
  6780. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
  6781. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6782. .ignore_suspend = 1,
  6783. .ops = &msm_cdc_dma_be_ops,
  6784. },
  6785. {
  6786. .name = LPASS_BE_TX_CDC_DMA_TX_4,
  6787. .stream_name = "TX CDC DMA4 Capture",
  6788. .cpu_dai_name = "msm-dai-cdc-dma-dev.45113",
  6789. .platform_name = "msm-pcm-routing",
  6790. .codec_name = "bolero_codec",
  6791. .codec_dai_name = "tx_macro_tx2",
  6792. .no_pcm = 1,
  6793. .dpcm_capture = 1,
  6794. .id = MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
  6795. .be_hw_params_fixup = msm_be_hw_params_fixup,
  6796. .ignore_suspend = 1,
  6797. .ops = &msm_cdc_dma_be_ops,
  6798. },
  6799. };
  6800. static struct snd_soc_dai_link msm_sm6150_dai_links[
  6801. ARRAY_SIZE(msm_common_dai_links) +
  6802. ARRAY_SIZE(msm_tavil_fe_dai_links) +
  6803. ARRAY_SIZE(msm_bolero_fe_dai_links) +
  6804. ARRAY_SIZE(msm_common_misc_fe_dai_links) +
  6805. ARRAY_SIZE(msm_common_be_dai_links) +
  6806. ARRAY_SIZE(msm_tavil_be_dai_links) +
  6807. ARRAY_SIZE(msm_wcn_be_dai_links) +
  6808. ARRAY_SIZE(ext_disp_be_dai_link) +
  6809. ARRAY_SIZE(msm_mi2s_be_dai_links) +
  6810. ARRAY_SIZE(msm_auxpcm_be_dai_links) +
  6811. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links) +
  6812. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links)];
  6813. static int msm_snd_card_tavil_late_probe(struct snd_soc_card *card)
  6814. {
  6815. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  6816. struct snd_soc_pcm_runtime *rtd;
  6817. int ret = 0;
  6818. void *mbhc_calibration;
  6819. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  6820. if (!rtd) {
  6821. dev_err(card->dev,
  6822. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  6823. __func__, be_dl_name);
  6824. ret = -EINVAL;
  6825. goto err_pcm_runtime;
  6826. }
  6827. mbhc_calibration = def_wcd_mbhc_cal();
  6828. if (!mbhc_calibration) {
  6829. ret = -ENOMEM;
  6830. goto err_mbhc_cal;
  6831. }
  6832. wcd_mbhc_cfg.calibration = mbhc_calibration;
  6833. ret = tavil_mbhc_hs_detect(rtd->codec, &wcd_mbhc_cfg);
  6834. if (ret) {
  6835. dev_err(card->dev, "%s: mbhc hs detect failed, err:%d\n",
  6836. __func__, ret);
  6837. goto err_hs_detect;
  6838. }
  6839. return 0;
  6840. err_hs_detect:
  6841. kfree(mbhc_calibration);
  6842. err_mbhc_cal:
  6843. err_pcm_runtime:
  6844. return ret;
  6845. }
  6846. static int msm_populate_dai_link_component_of_node(
  6847. struct snd_soc_card *card)
  6848. {
  6849. int i, index, ret = 0;
  6850. struct device *cdev = card->dev;
  6851. struct snd_soc_dai_link *dai_link = card->dai_link;
  6852. struct device_node *np;
  6853. if (!cdev) {
  6854. pr_err("%s: Sound card device memory NULL\n", __func__);
  6855. return -ENODEV;
  6856. }
  6857. for (i = 0; i < card->num_links; i++) {
  6858. if (dai_link[i].platform_of_node && dai_link[i].cpu_of_node)
  6859. continue;
  6860. /* populate platform_of_node for snd card dai links */
  6861. if (dai_link[i].platform_name &&
  6862. !dai_link[i].platform_of_node) {
  6863. index = of_property_match_string(cdev->of_node,
  6864. "asoc-platform-names",
  6865. dai_link[i].platform_name);
  6866. if (index < 0) {
  6867. pr_err("%s: No match found for platform name: %s\n",
  6868. __func__, dai_link[i].platform_name);
  6869. ret = index;
  6870. goto err;
  6871. }
  6872. np = of_parse_phandle(cdev->of_node, "asoc-platform",
  6873. index);
  6874. if (!np) {
  6875. pr_err("%s: retrieving phandle for platform %s, index %d failed\n",
  6876. __func__, dai_link[i].platform_name,
  6877. index);
  6878. ret = -ENODEV;
  6879. goto err;
  6880. }
  6881. dai_link[i].platform_of_node = np;
  6882. dai_link[i].platform_name = NULL;
  6883. }
  6884. /* populate cpu_of_node for snd card dai links */
  6885. if (dai_link[i].cpu_dai_name && !dai_link[i].cpu_of_node) {
  6886. index = of_property_match_string(cdev->of_node,
  6887. "asoc-cpu-names",
  6888. dai_link[i].cpu_dai_name);
  6889. if (index >= 0) {
  6890. np = of_parse_phandle(cdev->of_node, "asoc-cpu",
  6891. index);
  6892. if (!np) {
  6893. pr_err("%s: retrieving phandle for cpu dai %s failed\n",
  6894. __func__,
  6895. dai_link[i].cpu_dai_name);
  6896. ret = -ENODEV;
  6897. goto err;
  6898. }
  6899. dai_link[i].cpu_of_node = np;
  6900. dai_link[i].cpu_dai_name = NULL;
  6901. }
  6902. }
  6903. /* populate codec_of_node for snd card dai links */
  6904. if (dai_link[i].codec_name && !dai_link[i].codec_of_node) {
  6905. index = of_property_match_string(cdev->of_node,
  6906. "asoc-codec-names",
  6907. dai_link[i].codec_name);
  6908. if (index < 0)
  6909. continue;
  6910. np = of_parse_phandle(cdev->of_node, "asoc-codec",
  6911. index);
  6912. if (!np) {
  6913. pr_err("%s: retrieving phandle for codec %s failed\n",
  6914. __func__, dai_link[i].codec_name);
  6915. ret = -ENODEV;
  6916. goto err;
  6917. }
  6918. dai_link[i].codec_of_node = np;
  6919. dai_link[i].codec_name = NULL;
  6920. }
  6921. }
  6922. err:
  6923. return ret;
  6924. }
  6925. static int msm_audrx_stub_init(struct snd_soc_pcm_runtime *rtd)
  6926. {
  6927. int ret = 0;
  6928. struct snd_soc_codec *codec = rtd->codec;
  6929. ret = snd_soc_add_codec_controls(codec, msm_tavil_snd_controls,
  6930. ARRAY_SIZE(msm_tavil_snd_controls));
  6931. if (ret < 0) {
  6932. dev_err(codec->dev,
  6933. "%s: add_codec_controls failed, err = %d\n",
  6934. __func__, ret);
  6935. return ret;
  6936. }
  6937. return 0;
  6938. }
  6939. static int msm_snd_stub_hw_params(struct snd_pcm_substream *substream,
  6940. struct snd_pcm_hw_params *params)
  6941. {
  6942. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  6943. struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
  6944. int ret = 0;
  6945. unsigned int rx_ch[] = {144, 145, 146, 147, 148, 149, 150,
  6946. 151};
  6947. unsigned int tx_ch[] = {128, 129, 130, 131, 132, 133,
  6948. 134, 135, 136, 137, 138, 139,
  6949. 140, 141, 142, 143};
  6950. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  6951. ret = snd_soc_dai_set_channel_map(cpu_dai, 0, 0,
  6952. slim_rx_cfg[SLIM_RX_0].channels,
  6953. rx_ch);
  6954. if (ret < 0)
  6955. pr_err("%s: RX failed to set cpu chan map error %d\n",
  6956. __func__, ret);
  6957. } else {
  6958. ret = snd_soc_dai_set_channel_map(cpu_dai,
  6959. slim_tx_cfg[SLIM_TX_0].channels,
  6960. tx_ch, 0, 0);
  6961. if (ret < 0)
  6962. pr_err("%s: TX failed to set cpu chan map error %d\n",
  6963. __func__, ret);
  6964. }
  6965. return ret;
  6966. }
  6967. static struct snd_soc_ops msm_stub_be_ops = {
  6968. .hw_params = msm_snd_stub_hw_params,
  6969. };
  6970. static struct snd_soc_dai_link msm_stub_fe_dai_links[] = {
  6971. /* FrontEnd DAI Links */
  6972. {
  6973. .name = "MSMSTUB Media1",
  6974. .stream_name = "MultiMedia1",
  6975. .cpu_dai_name = "MultiMedia1",
  6976. .platform_name = "msm-pcm-dsp.0",
  6977. .dynamic = 1,
  6978. .async_ops = ASYNC_DPCM_SND_SOC_PREPARE,
  6979. .dpcm_playback = 1,
  6980. .dpcm_capture = 1,
  6981. .trigger = {SND_SOC_DPCM_TRIGGER_POST,
  6982. SND_SOC_DPCM_TRIGGER_POST},
  6983. .codec_dai_name = "snd-soc-dummy-dai",
  6984. .codec_name = "snd-soc-dummy",
  6985. .ignore_suspend = 1,
  6986. /* this dainlink has playback support */
  6987. .ignore_pmdown_time = 1,
  6988. .id = MSM_FRONTEND_DAI_MULTIMEDIA1
  6989. },
  6990. };
  6991. static struct snd_soc_dai_link msm_stub_be_dai_links[] = {
  6992. /* Backend DAI Links */
  6993. {
  6994. .name = LPASS_BE_SLIMBUS_0_RX,
  6995. .stream_name = "Slimbus Playback",
  6996. .cpu_dai_name = "msm-dai-q6-dev.16384",
  6997. .platform_name = "msm-pcm-routing",
  6998. .codec_name = "msm-stub-codec.1",
  6999. .codec_dai_name = "msm-stub-rx",
  7000. .no_pcm = 1,
  7001. .dpcm_playback = 1,
  7002. .id = MSM_BACKEND_DAI_SLIMBUS_0_RX,
  7003. .init = &msm_audrx_stub_init,
  7004. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7005. .ignore_pmdown_time = 1, /* dai link has playback support */
  7006. .ignore_suspend = 1,
  7007. .ops = &msm_stub_be_ops,
  7008. },
  7009. {
  7010. .name = LPASS_BE_SLIMBUS_0_TX,
  7011. .stream_name = "Slimbus Capture",
  7012. .cpu_dai_name = "msm-dai-q6-dev.16385",
  7013. .platform_name = "msm-pcm-routing",
  7014. .codec_name = "msm-stub-codec.1",
  7015. .codec_dai_name = "msm-stub-tx",
  7016. .no_pcm = 1,
  7017. .dpcm_capture = 1,
  7018. .id = MSM_BACKEND_DAI_SLIMBUS_0_TX,
  7019. .be_hw_params_fixup = msm_be_hw_params_fixup,
  7020. .ignore_suspend = 1,
  7021. .ops = &msm_stub_be_ops,
  7022. },
  7023. };
  7024. static struct snd_soc_dai_link msm_stub_dai_links[
  7025. ARRAY_SIZE(msm_stub_fe_dai_links) +
  7026. ARRAY_SIZE(msm_stub_be_dai_links)];
  7027. struct snd_soc_card snd_soc_card_stub_msm = {
  7028. .name = "sm6150-stub-snd-card",
  7029. };
  7030. static const struct of_device_id sm6150_asoc_machine_of_match[] = {
  7031. { .compatible = "qcom,sm6150-asoc-snd",
  7032. .data = "codec"},
  7033. { .compatible = "qcom,sm6150-asoc-snd-stub",
  7034. .data = "stub_codec"},
  7035. {},
  7036. };
  7037. static struct snd_soc_card *populate_snd_card_dailinks(struct device *dev)
  7038. {
  7039. struct snd_soc_card *card = NULL;
  7040. struct snd_soc_dai_link *dailink;
  7041. int total_links = 0, rc = 0;
  7042. u32 tavil_codec = 0, auxpcm_audio_intf = 0;
  7043. u32 mi2s_audio_intf = 0, ext_disp_audio_intf = 0;
  7044. u32 wcn_btfm_intf = 0;
  7045. const struct of_device_id *match;
  7046. match = of_match_node(sm6150_asoc_machine_of_match, dev->of_node);
  7047. if (!match) {
  7048. dev_err(dev, "%s: No DT match found for sound card\n",
  7049. __func__);
  7050. return NULL;
  7051. }
  7052. if (!strcmp(match->data, "codec")) {
  7053. card = &snd_soc_card_sm6150_msm;
  7054. memcpy(msm_sm6150_dai_links + total_links,
  7055. msm_common_dai_links,
  7056. sizeof(msm_common_dai_links));
  7057. total_links += ARRAY_SIZE(msm_common_dai_links);
  7058. memcpy(msm_sm6150_dai_links + total_links,
  7059. msm_common_misc_fe_dai_links,
  7060. sizeof(msm_common_misc_fe_dai_links));
  7061. total_links += ARRAY_SIZE(msm_common_misc_fe_dai_links);
  7062. rc = of_property_read_u32(dev->of_node, "qcom,tavil_codec",
  7063. &tavil_codec);
  7064. if (rc) {
  7065. dev_dbg(dev, "%s: No DT match for tavil codec\n",
  7066. __func__);
  7067. } else {
  7068. if (tavil_codec) {
  7069. card->late_probe =
  7070. msm_snd_card_tavil_late_probe;
  7071. memcpy(msm_sm6150_dai_links + total_links,
  7072. msm_tavil_fe_dai_links,
  7073. sizeof(msm_tavil_fe_dai_links));
  7074. total_links +=
  7075. ARRAY_SIZE(msm_tavil_fe_dai_links);
  7076. }
  7077. }
  7078. if (!tavil_codec) {
  7079. memcpy(msm_sm6150_dai_links + total_links,
  7080. msm_bolero_fe_dai_links,
  7081. sizeof(msm_bolero_fe_dai_links));
  7082. total_links +=
  7083. ARRAY_SIZE(msm_bolero_fe_dai_links);
  7084. }
  7085. memcpy(msm_sm6150_dai_links + total_links,
  7086. msm_common_be_dai_links,
  7087. sizeof(msm_common_be_dai_links));
  7088. total_links += ARRAY_SIZE(msm_common_be_dai_links);
  7089. if (tavil_codec) {
  7090. memcpy(msm_sm6150_dai_links + total_links,
  7091. msm_tavil_be_dai_links,
  7092. sizeof(msm_tavil_be_dai_links));
  7093. total_links += ARRAY_SIZE(msm_tavil_be_dai_links);
  7094. } else {
  7095. memcpy(msm_sm6150_dai_links + total_links,
  7096. msm_wsa_cdc_dma_be_dai_links,
  7097. sizeof(msm_wsa_cdc_dma_be_dai_links));
  7098. total_links +=
  7099. ARRAY_SIZE(msm_wsa_cdc_dma_be_dai_links);
  7100. memcpy(msm_sm6150_dai_links + total_links,
  7101. msm_rx_tx_cdc_dma_be_dai_links,
  7102. sizeof(msm_rx_tx_cdc_dma_be_dai_links));
  7103. total_links +=
  7104. ARRAY_SIZE(msm_rx_tx_cdc_dma_be_dai_links);
  7105. }
  7106. rc = of_property_read_u32(dev->of_node,
  7107. "qcom,ext-disp-audio-rx",
  7108. &ext_disp_audio_intf);
  7109. if (rc) {
  7110. dev_dbg(dev, "%s: No DT match Ext Disp interface\n",
  7111. __func__);
  7112. } else {
  7113. if (ext_disp_audio_intf) {
  7114. memcpy(msm_sm6150_dai_links + total_links,
  7115. ext_disp_be_dai_link,
  7116. sizeof(ext_disp_be_dai_link));
  7117. total_links +=
  7118. ARRAY_SIZE(ext_disp_be_dai_link);
  7119. }
  7120. }
  7121. rc = of_property_read_u32(dev->of_node, "qcom,mi2s-audio-intf",
  7122. &mi2s_audio_intf);
  7123. if (rc) {
  7124. dev_dbg(dev, "%s: No DT match MI2S audio interface\n",
  7125. __func__);
  7126. } else {
  7127. if (mi2s_audio_intf) {
  7128. memcpy(msm_sm6150_dai_links + total_links,
  7129. msm_mi2s_be_dai_links,
  7130. sizeof(msm_mi2s_be_dai_links));
  7131. total_links +=
  7132. ARRAY_SIZE(msm_mi2s_be_dai_links);
  7133. }
  7134. }
  7135. rc = of_property_read_u32(dev->of_node, "qcom,wcn-btfm",
  7136. &wcn_btfm_intf);
  7137. if (rc) {
  7138. dev_dbg(dev, "%s: No DT match wcn btfm interface\n",
  7139. __func__);
  7140. } else {
  7141. if (wcn_btfm_intf) {
  7142. memcpy(msm_sm6150_dai_links + total_links,
  7143. msm_wcn_be_dai_links,
  7144. sizeof(msm_wcn_be_dai_links));
  7145. total_links +=
  7146. ARRAY_SIZE(msm_wcn_be_dai_links);
  7147. }
  7148. }
  7149. rc = of_property_read_u32(dev->of_node,
  7150. "qcom,auxpcm-audio-intf",
  7151. &auxpcm_audio_intf);
  7152. if (rc) {
  7153. dev_dbg(dev, "%s: No DT match Aux PCM interface\n",
  7154. __func__);
  7155. } else {
  7156. if (auxpcm_audio_intf) {
  7157. memcpy(msm_sm6150_dai_links + total_links,
  7158. msm_auxpcm_be_dai_links,
  7159. sizeof(msm_auxpcm_be_dai_links));
  7160. total_links +=
  7161. ARRAY_SIZE(msm_auxpcm_be_dai_links);
  7162. }
  7163. }
  7164. dailink = msm_sm6150_dai_links;
  7165. } else if (!strcmp(match->data, "stub_codec")) {
  7166. card = &snd_soc_card_stub_msm;
  7167. memcpy(msm_stub_dai_links + total_links,
  7168. msm_stub_fe_dai_links,
  7169. sizeof(msm_stub_fe_dai_links));
  7170. total_links += ARRAY_SIZE(msm_stub_fe_dai_links);
  7171. memcpy(msm_stub_dai_links + total_links,
  7172. msm_stub_be_dai_links,
  7173. sizeof(msm_stub_be_dai_links));
  7174. total_links += ARRAY_SIZE(msm_stub_be_dai_links);
  7175. dailink = msm_stub_dai_links;
  7176. }
  7177. if (card) {
  7178. card->dai_link = dailink;
  7179. card->num_links = total_links;
  7180. }
  7181. return card;
  7182. }
  7183. static int msm_wsa881x_init(struct snd_soc_component *component)
  7184. {
  7185. u8 spkleft_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7186. u8 spkright_ports[WSA881X_MAX_SWR_PORTS] = {0, 1, 2, 3};
  7187. u8 spkleft_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_L, SPKR_L_COMP,
  7188. SPKR_L_BOOST, SPKR_L_VI};
  7189. u8 spkright_port_types[WSA881X_MAX_SWR_PORTS] = {SPKR_R, SPKR_R_COMP,
  7190. SPKR_R_BOOST, SPKR_R_VI};
  7191. unsigned int ch_rate[WSA881X_MAX_SWR_PORTS] = {2400, 600, 300, 1200};
  7192. unsigned int ch_mask[WSA881X_MAX_SWR_PORTS] = {0x1, 0xF, 0x3, 0x3};
  7193. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7194. struct msm_asoc_mach_data *pdata;
  7195. struct snd_soc_dapm_context *dapm;
  7196. struct snd_card *card = component->card->snd_card;
  7197. struct snd_info_entry *entry;
  7198. int ret = 0;
  7199. if (!codec) {
  7200. pr_err("%s codec is NULL\n", __func__);
  7201. return -EINVAL;
  7202. }
  7203. dapm = snd_soc_codec_get_dapm(codec);
  7204. if (!strcmp(component->name_prefix, "SpkrLeft")) {
  7205. dev_dbg(codec->dev, "%s: setting left ch map to codec %s\n",
  7206. __func__, codec->component.name);
  7207. wsa881x_set_channel_map(codec, &spkleft_ports[0],
  7208. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7209. &ch_rate[0], &spkleft_port_types[0]);
  7210. if (dapm->component) {
  7211. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft IN");
  7212. snd_soc_dapm_ignore_suspend(dapm, "SpkrLeft SPKR");
  7213. }
  7214. } else if (!strcmp(component->name_prefix, "SpkrRight")) {
  7215. dev_dbg(codec->dev, "%s: setting right ch map to codec %s\n",
  7216. __func__, codec->component.name);
  7217. wsa881x_set_channel_map(codec, &spkright_ports[0],
  7218. WSA881X_MAX_SWR_PORTS, &ch_mask[0],
  7219. &ch_rate[0], &spkright_port_types[0]);
  7220. if (dapm->component) {
  7221. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight IN");
  7222. snd_soc_dapm_ignore_suspend(dapm, "SpkrRight SPKR");
  7223. }
  7224. } else {
  7225. dev_err(codec->dev, "%s: wrong codec name %s\n", __func__,
  7226. codec->component.name);
  7227. ret = -EINVAL;
  7228. goto err;
  7229. }
  7230. pdata = snd_soc_card_get_drvdata(component->card);
  7231. if (!pdata->codec_root) {
  7232. entry = snd_info_create_subdir(card->module, "codecs",
  7233. card->proc_root);
  7234. if (!entry) {
  7235. pr_err("%s: Cannot create codecs module entry\n",
  7236. __func__);
  7237. ret = 0;
  7238. goto err;
  7239. }
  7240. pdata->codec_root = entry;
  7241. }
  7242. wsa881x_codec_info_create_codec_entry(pdata->codec_root,
  7243. codec);
  7244. err:
  7245. return ret;
  7246. }
  7247. static int msm_aux_codec_init(struct snd_soc_component *component)
  7248. {
  7249. struct snd_soc_codec *codec = snd_soc_component_to_codec(component);
  7250. struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
  7251. int ret = 0;
  7252. void *mbhc_calibration;
  7253. struct snd_info_entry *entry;
  7254. struct snd_card *card = component->card->snd_card;
  7255. struct msm_asoc_mach_data *pdata;
  7256. snd_soc_dapm_ignore_suspend(dapm, "EAR");
  7257. snd_soc_dapm_ignore_suspend(dapm, "AUX");
  7258. snd_soc_dapm_ignore_suspend(dapm, "HPHL");
  7259. snd_soc_dapm_ignore_suspend(dapm, "HPHR");
  7260. snd_soc_dapm_ignore_suspend(dapm, "AMIC1");
  7261. snd_soc_dapm_ignore_suspend(dapm, "AMIC2");
  7262. snd_soc_dapm_ignore_suspend(dapm, "AMIC3");
  7263. snd_soc_dapm_ignore_suspend(dapm, "AMIC4");
  7264. snd_soc_dapm_sync(dapm);
  7265. pdata = snd_soc_card_get_drvdata(component->card);
  7266. if (!pdata->codec_root) {
  7267. entry = snd_info_create_subdir(card->module, "codecs",
  7268. card->proc_root);
  7269. if (!entry) {
  7270. pr_err("%s: Cannot create codecs module entry\n",
  7271. __func__);
  7272. ret = 0;
  7273. goto codec_root_err;
  7274. }
  7275. pdata->codec_root = entry;
  7276. }
  7277. wcd937x_info_create_codec_entry(pdata->codec_root, codec);
  7278. codec_root_err:
  7279. mbhc_calibration = def_wcd_mbhc_cal();
  7280. if (!mbhc_calibration) {
  7281. return -ENOMEM;
  7282. }
  7283. wcd_mbhc_cfg.calibration = mbhc_calibration;
  7284. ret = wcd937x_mbhc_hs_detect(codec, &wcd_mbhc_cfg);
  7285. return ret;
  7286. }
  7287. static int msm_init_aux_dev(struct platform_device *pdev,
  7288. struct snd_soc_card *card)
  7289. {
  7290. struct device_node *wsa_of_node;
  7291. struct device_node *aux_codec_of_node;
  7292. u32 wsa_max_devs;
  7293. u32 wsa_dev_cnt;
  7294. u32 codec_aux_dev_cnt = 0;
  7295. int i;
  7296. struct msm_wsa881x_dev_info *wsa881x_dev_info = NULL;
  7297. struct aux_codec_dev_info *aux_cdc_dev_info = NULL;
  7298. const char *auxdev_name_prefix[1];
  7299. char *dev_name_str = NULL;
  7300. int found = 0;
  7301. int codecs_found = 0;
  7302. int ret = 0;
  7303. /* Get maximum WSA device count for this platform */
  7304. ret = of_property_read_u32(pdev->dev.of_node,
  7305. "qcom,wsa-max-devs", &wsa_max_devs);
  7306. if (ret) {
  7307. dev_info(&pdev->dev,
  7308. "%s: wsa-max-devs property missing in DT %s, ret = %d\n",
  7309. __func__, pdev->dev.of_node->full_name, ret);
  7310. wsa_max_devs = 0;
  7311. goto codec_aux_dev;
  7312. }
  7313. if (wsa_max_devs == 0) {
  7314. dev_warn(&pdev->dev,
  7315. "%s: Max WSA devices is 0 for this target?\n",
  7316. __func__);
  7317. goto codec_aux_dev;
  7318. }
  7319. /* Get count of WSA device phandles for this platform */
  7320. wsa_dev_cnt = of_count_phandle_with_args(pdev->dev.of_node,
  7321. "qcom,wsa-devs", NULL);
  7322. if (wsa_dev_cnt == -ENOENT) {
  7323. dev_warn(&pdev->dev, "%s: No wsa device defined in DT.\n",
  7324. __func__);
  7325. goto err;
  7326. } else if (wsa_dev_cnt <= 0) {
  7327. dev_err(&pdev->dev,
  7328. "%s: Error reading wsa device from DT. wsa_dev_cnt = %d\n",
  7329. __func__, wsa_dev_cnt);
  7330. ret = -EINVAL;
  7331. goto err;
  7332. }
  7333. /*
  7334. * Expect total phandles count to be NOT less than maximum possible
  7335. * WSA count. However, if it is less, then assign same value to
  7336. * max count as well.
  7337. */
  7338. if (wsa_dev_cnt < wsa_max_devs) {
  7339. dev_dbg(&pdev->dev,
  7340. "%s: wsa_max_devs = %d cannot exceed wsa_dev_cnt = %d\n",
  7341. __func__, wsa_max_devs, wsa_dev_cnt);
  7342. wsa_max_devs = wsa_dev_cnt;
  7343. }
  7344. /* Make sure prefix string passed for each WSA device */
  7345. ret = of_property_count_strings(pdev->dev.of_node,
  7346. "qcom,wsa-aux-dev-prefix");
  7347. if (ret != wsa_dev_cnt) {
  7348. dev_err(&pdev->dev,
  7349. "%s: expecting %d wsa prefix. Defined only %d in DT\n",
  7350. __func__, wsa_dev_cnt, ret);
  7351. ret = -EINVAL;
  7352. goto err;
  7353. }
  7354. /*
  7355. * Alloc mem to store phandle and index info of WSA device, if already
  7356. * registered with ALSA core
  7357. */
  7358. wsa881x_dev_info = devm_kcalloc(&pdev->dev, wsa_max_devs,
  7359. sizeof(struct msm_wsa881x_dev_info),
  7360. GFP_KERNEL);
  7361. if (!wsa881x_dev_info) {
  7362. ret = -ENOMEM;
  7363. goto err;
  7364. }
  7365. /*
  7366. * search and check whether all WSA devices are already
  7367. * registered with ALSA core or not. If found a node, store
  7368. * the node and the index in a local array of struct for later
  7369. * use.
  7370. */
  7371. for (i = 0; i < wsa_dev_cnt; i++) {
  7372. wsa_of_node = of_parse_phandle(pdev->dev.of_node,
  7373. "qcom,wsa-devs", i);
  7374. if (unlikely(!wsa_of_node)) {
  7375. /* we should not be here */
  7376. dev_err(&pdev->dev,
  7377. "%s: wsa dev node is not present\n",
  7378. __func__);
  7379. ret = -EINVAL;
  7380. goto err;
  7381. }
  7382. if (soc_find_component(wsa_of_node, NULL)) {
  7383. /* WSA device registered with ALSA core */
  7384. wsa881x_dev_info[found].of_node = wsa_of_node;
  7385. wsa881x_dev_info[found].index = i;
  7386. found++;
  7387. if (found == wsa_max_devs)
  7388. break;
  7389. }
  7390. }
  7391. if (found < wsa_max_devs) {
  7392. dev_dbg(&pdev->dev,
  7393. "%s: failed to find %d components. Found only %d\n",
  7394. __func__, wsa_max_devs, found);
  7395. return -EPROBE_DEFER;
  7396. }
  7397. dev_info(&pdev->dev,
  7398. "%s: found %d wsa881x devices registered with ALSA core\n",
  7399. __func__, found);
  7400. codec_aux_dev:
  7401. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7402. /* Get count of aux codec device phandles for this platform */
  7403. codec_aux_dev_cnt = of_count_phandle_with_args(
  7404. pdev->dev.of_node,
  7405. "qcom,codec-aux-devs", NULL);
  7406. if (codec_aux_dev_cnt == -ENOENT) {
  7407. dev_warn(&pdev->dev, "%s: No aux codec defined in DT.\n",
  7408. __func__);
  7409. goto err;
  7410. } else if (codec_aux_dev_cnt <= 0) {
  7411. dev_err(&pdev->dev,
  7412. "%s: Error reading aux codec device from DT, dev_cnt=%d\n",
  7413. __func__, codec_aux_dev_cnt);
  7414. ret = -EINVAL;
  7415. goto err;
  7416. }
  7417. /*
  7418. * Alloc mem to store phandle and index info of aux codec
  7419. * if already registered with ALSA core
  7420. */
  7421. aux_cdc_dev_info = devm_kcalloc(&pdev->dev, codec_aux_dev_cnt,
  7422. sizeof(struct aux_codec_dev_info),
  7423. GFP_KERNEL);
  7424. if (!aux_cdc_dev_info) {
  7425. ret = -ENOMEM;
  7426. goto err;
  7427. }
  7428. /*
  7429. * search and check whether all aux codecs are already
  7430. * registered with ALSA core or not. If found a node, store
  7431. * the node and the index in a local array of struct for later
  7432. * use.
  7433. */
  7434. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7435. aux_codec_of_node = of_parse_phandle(pdev->dev.of_node,
  7436. "qcom,codec-aux-devs", i);
  7437. if (unlikely(!aux_codec_of_node)) {
  7438. /* we should not be here */
  7439. dev_err(&pdev->dev,
  7440. "%s: aux codec dev node is not present\n",
  7441. __func__);
  7442. ret = -EINVAL;
  7443. goto err;
  7444. }
  7445. if (soc_find_component(aux_codec_of_node, NULL)) {
  7446. /* AUX codec registered with ALSA core */
  7447. aux_cdc_dev_info[codecs_found].of_node =
  7448. aux_codec_of_node;
  7449. aux_cdc_dev_info[codecs_found].index = i;
  7450. codecs_found++;
  7451. }
  7452. }
  7453. if (codecs_found < codec_aux_dev_cnt) {
  7454. dev_dbg(&pdev->dev,
  7455. "%s: failed to find %d components. Found only %d\n",
  7456. __func__, codec_aux_dev_cnt, codecs_found);
  7457. return -EPROBE_DEFER;
  7458. }
  7459. dev_info(&pdev->dev,
  7460. "%s: found %d AUX codecs registered with ALSA core\n",
  7461. __func__, codecs_found);
  7462. }
  7463. card->num_aux_devs = wsa_max_devs + codec_aux_dev_cnt;
  7464. card->num_configs = wsa_max_devs + codec_aux_dev_cnt;
  7465. /* Alloc array of AUX devs struct */
  7466. msm_aux_dev = devm_kcalloc(&pdev->dev, card->num_aux_devs,
  7467. sizeof(struct snd_soc_aux_dev),
  7468. GFP_KERNEL);
  7469. if (!msm_aux_dev) {
  7470. ret = -ENOMEM;
  7471. goto err;
  7472. }
  7473. /* Alloc array of codec conf struct */
  7474. msm_codec_conf = devm_kcalloc(&pdev->dev, card->num_configs,
  7475. sizeof(struct snd_soc_codec_conf),
  7476. GFP_KERNEL);
  7477. if (!msm_codec_conf) {
  7478. ret = -ENOMEM;
  7479. goto err;
  7480. }
  7481. for (i = 0; i < wsa_max_devs; i++) {
  7482. dev_name_str = devm_kzalloc(&pdev->dev, DEV_NAME_STR_LEN,
  7483. GFP_KERNEL);
  7484. if (!dev_name_str) {
  7485. ret = -ENOMEM;
  7486. goto err;
  7487. }
  7488. ret = of_property_read_string_index(pdev->dev.of_node,
  7489. "qcom,wsa-aux-dev-prefix",
  7490. wsa881x_dev_info[i].index,
  7491. auxdev_name_prefix);
  7492. if (ret) {
  7493. dev_err(&pdev->dev,
  7494. "%s: failed to read wsa aux dev prefix, ret = %d\n",
  7495. __func__, ret);
  7496. ret = -EINVAL;
  7497. goto err;
  7498. }
  7499. snprintf(dev_name_str, strlen("wsa881x.%d"), "wsa881x.%d", i);
  7500. msm_aux_dev[i].name = dev_name_str;
  7501. msm_aux_dev[i].codec_name = NULL;
  7502. msm_aux_dev[i].codec_of_node =
  7503. wsa881x_dev_info[i].of_node;
  7504. msm_aux_dev[i].init = msm_wsa881x_init;
  7505. msm_codec_conf[i].dev_name = NULL;
  7506. msm_codec_conf[i].name_prefix = auxdev_name_prefix[0];
  7507. msm_codec_conf[i].of_node =
  7508. wsa881x_dev_info[i].of_node;
  7509. }
  7510. for (i = 0; i < codec_aux_dev_cnt; i++) {
  7511. msm_aux_dev[wsa_max_devs + i].name = NULL;
  7512. msm_aux_dev[wsa_max_devs + i].codec_name = NULL;
  7513. msm_aux_dev[wsa_max_devs + i].codec_of_node =
  7514. aux_cdc_dev_info[i].of_node;
  7515. msm_aux_dev[wsa_max_devs + i].init = msm_aux_codec_init;
  7516. msm_codec_conf[wsa_max_devs + i].dev_name = NULL;
  7517. msm_codec_conf[wsa_max_devs + i].name_prefix =
  7518. NULL;
  7519. msm_codec_conf[wsa_max_devs + i].of_node =
  7520. aux_cdc_dev_info[i].of_node;
  7521. }
  7522. card->codec_conf = msm_codec_conf;
  7523. card->aux_dev = msm_aux_dev;
  7524. err:
  7525. return ret;
  7526. }
  7527. static void msm_i2s_auxpcm_init(struct platform_device *pdev)
  7528. {
  7529. int count;
  7530. u32 mi2s_master_slave[MI2S_MAX];
  7531. int ret;
  7532. for (count = 0; count < MI2S_MAX; count++) {
  7533. mutex_init(&mi2s_intf_conf[count].lock);
  7534. mi2s_intf_conf[count].ref_cnt = 0;
  7535. }
  7536. ret = of_property_read_u32_array(pdev->dev.of_node,
  7537. "qcom,msm-mi2s-master",
  7538. mi2s_master_slave, MI2S_MAX);
  7539. if (ret) {
  7540. dev_dbg(&pdev->dev, "%s: no qcom,msm-mi2s-master in DT node\n",
  7541. __func__);
  7542. } else {
  7543. for (count = 0; count < MI2S_MAX; count++) {
  7544. mi2s_intf_conf[count].msm_is_mi2s_master =
  7545. mi2s_master_slave[count];
  7546. }
  7547. }
  7548. }
  7549. static void msm_i2s_auxpcm_deinit(void)
  7550. {
  7551. int count;
  7552. for (count = 0; count < MI2S_MAX; count++) {
  7553. mutex_destroy(&mi2s_intf_conf[count].lock);
  7554. mi2s_intf_conf[count].ref_cnt = 0;
  7555. mi2s_intf_conf[count].msm_is_mi2s_master = 0;
  7556. }
  7557. }
  7558. static int sm6150_ssr_enable(struct device *dev, void *data)
  7559. {
  7560. struct platform_device *pdev = to_platform_device(dev);
  7561. struct snd_soc_card *card = platform_get_drvdata(pdev);
  7562. struct msm_asoc_mach_data *pdata;
  7563. int ret = 0;
  7564. if (!card) {
  7565. dev_err(dev, "%s: card is NULL\n", __func__);
  7566. ret = -EINVAL;
  7567. goto err;
  7568. }
  7569. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7570. pdata = snd_soc_card_get_drvdata(card);
  7571. if (!pdata->is_afe_config_done) {
  7572. const char *be_dl_name = LPASS_BE_SLIMBUS_0_RX;
  7573. struct snd_soc_pcm_runtime *rtd;
  7574. rtd = snd_soc_get_pcm_runtime(card, be_dl_name);
  7575. if (!rtd) {
  7576. dev_err(dev,
  7577. "%s: snd_soc_get_pcm_runtime for %s failed!\n",
  7578. __func__, be_dl_name);
  7579. ret = -EINVAL;
  7580. goto err;
  7581. }
  7582. ret = msm_afe_set_config(rtd->codec);
  7583. if (ret)
  7584. dev_err(dev, "%s: Failed to set AFE config. err %d\n",
  7585. __func__, ret);
  7586. else
  7587. pdata->is_afe_config_done = true;
  7588. }
  7589. }
  7590. snd_soc_card_change_online_state(card, 1);
  7591. dev_dbg(dev, "%s: setting snd_card to ONLINE\n", __func__);
  7592. err:
  7593. return ret;
  7594. }
  7595. static void sm6150_ssr_disable(struct device *dev, void *data)
  7596. {
  7597. struct platform_device *pdev = to_platform_device(dev);
  7598. struct snd_soc_card *card = platform_get_drvdata(pdev);
  7599. struct msm_asoc_mach_data *pdata;
  7600. if (!card) {
  7601. dev_err(dev, "%s: card is NULL\n", __func__);
  7602. return;
  7603. }
  7604. dev_dbg(dev, "%s: setting snd_card to OFFLINE\n", __func__);
  7605. snd_soc_card_change_online_state(card, 0);
  7606. if (!strcmp(card->name, "sm6150-tavil-snd-card")) {
  7607. pdata = snd_soc_card_get_drvdata(card);
  7608. msm_afe_clear_config();
  7609. pdata->is_afe_config_done = false;
  7610. }
  7611. }
  7612. static const struct snd_event_ops sm6150_ssr_ops = {
  7613. .enable = sm6150_ssr_enable,
  7614. .disable = sm6150_ssr_disable,
  7615. };
  7616. static int msm_audio_ssr_compare(struct device *dev, void *data)
  7617. {
  7618. struct device_node *node = data;
  7619. dev_dbg(dev, "%s: dev->of_node = 0x%p, node = 0x%p\n",
  7620. __func__, dev->of_node, node);
  7621. return (dev->of_node && dev->of_node == node);
  7622. }
  7623. static int msm_audio_ssr_register(struct device *dev)
  7624. {
  7625. struct device_node *np = dev->of_node;
  7626. struct snd_event_clients *ssr_clients = NULL;
  7627. struct device_node *node;
  7628. int ret;
  7629. int i;
  7630. for (i = 0; ; i++) {
  7631. node = of_parse_phandle(np, "qcom,msm_audio_ssr_devs", i);
  7632. if (!node)
  7633. break;
  7634. snd_event_mstr_add_client(&ssr_clients,
  7635. msm_audio_ssr_compare, node);
  7636. }
  7637. ret = snd_event_master_register(dev, &sm6150_ssr_ops,
  7638. ssr_clients, NULL);
  7639. if (!ret)
  7640. snd_event_notify(dev, SND_EVENT_UP);
  7641. return ret;
  7642. }
  7643. static int msm_asoc_machine_probe(struct platform_device *pdev)
  7644. {
  7645. struct snd_soc_card *card;
  7646. struct msm_asoc_mach_data *pdata;
  7647. const char *mbhc_audio_jack_type = NULL;
  7648. int ret;
  7649. if (!pdev->dev.of_node) {
  7650. dev_err(&pdev->dev, "No platform supplied from device tree\n");
  7651. return -EINVAL;
  7652. }
  7653. pdata = devm_kzalloc(&pdev->dev,
  7654. sizeof(struct msm_asoc_mach_data), GFP_KERNEL);
  7655. if (!pdata)
  7656. return -ENOMEM;
  7657. card = populate_snd_card_dailinks(&pdev->dev);
  7658. if (!card) {
  7659. dev_err(&pdev->dev, "%s: Card uninitialized\n", __func__);
  7660. ret = -EINVAL;
  7661. goto err;
  7662. }
  7663. card->dev = &pdev->dev;
  7664. platform_set_drvdata(pdev, card);
  7665. snd_soc_card_set_drvdata(card, pdata);
  7666. ret = snd_soc_of_parse_card_name(card, "qcom,model");
  7667. if (ret) {
  7668. dev_err(&pdev->dev, "parse card name failed, err:%d\n",
  7669. ret);
  7670. goto err;
  7671. }
  7672. ret = snd_soc_of_parse_audio_routing(card, "qcom,audio-routing");
  7673. if (ret) {
  7674. dev_err(&pdev->dev, "parse audio routing failed, err:%d\n",
  7675. ret);
  7676. goto err;
  7677. }
  7678. ret = msm_populate_dai_link_component_of_node(card);
  7679. if (ret) {
  7680. ret = -EPROBE_DEFER;
  7681. goto err;
  7682. }
  7683. ret = msm_init_aux_dev(pdev, card);
  7684. if (ret)
  7685. goto err;
  7686. ret = devm_snd_soc_register_card(&pdev->dev, card);
  7687. if (ret == -EPROBE_DEFER) {
  7688. if (codec_reg_done)
  7689. ret = -EINVAL;
  7690. goto err;
  7691. } else if (ret) {
  7692. dev_err(&pdev->dev, "snd_soc_register_card failed (%d)\n",
  7693. ret);
  7694. goto err;
  7695. }
  7696. dev_info(&pdev->dev, "Sound card %s registered\n", card->name);
  7697. pdata->hph_en1_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7698. "qcom,hph-en1-gpio", 0);
  7699. if (!pdata->hph_en1_gpio_p) {
  7700. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7701. "qcom,hph-en1-gpio",
  7702. pdev->dev.of_node->full_name);
  7703. }
  7704. pdata->hph_en0_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7705. "qcom,hph-en0-gpio", 0);
  7706. if (!pdata->hph_en0_gpio_p) {
  7707. dev_dbg(&pdev->dev, "property %s not detected in node %s\n",
  7708. "qcom,hph-en0-gpio",
  7709. pdev->dev.of_node->full_name);
  7710. }
  7711. ret = of_property_read_string(pdev->dev.of_node,
  7712. "qcom,mbhc-audio-jack-type", &mbhc_audio_jack_type);
  7713. if (ret) {
  7714. dev_dbg(&pdev->dev, "Looking up %s property in node %s failed\n",
  7715. "qcom,mbhc-audio-jack-type",
  7716. pdev->dev.of_node->full_name);
  7717. dev_dbg(&pdev->dev, "Jack type properties set to default\n");
  7718. } else {
  7719. if (!strcmp(mbhc_audio_jack_type, "4-pole-jack")) {
  7720. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7721. dev_dbg(&pdev->dev, "This hardware has 4 pole jack");
  7722. } else if (!strcmp(mbhc_audio_jack_type, "5-pole-jack")) {
  7723. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7724. dev_dbg(&pdev->dev, "This hardware has 5 pole jack");
  7725. } else if (!strcmp(mbhc_audio_jack_type, "6-pole-jack")) {
  7726. wcd_mbhc_cfg.enable_anc_mic_detect = true;
  7727. dev_dbg(&pdev->dev, "This hardware has 6 pole jack");
  7728. } else {
  7729. wcd_mbhc_cfg.enable_anc_mic_detect = false;
  7730. dev_dbg(&pdev->dev, "Unknown value, set to default\n");
  7731. }
  7732. }
  7733. /*
  7734. * Parse US-Euro gpio info from DT. Report no error if us-euro
  7735. * entry is not found in DT file as some targets do not support
  7736. * US-Euro detection
  7737. */
  7738. pdata->us_euro_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7739. "qcom,us-euro-gpios", 0);
  7740. if (!pdata->us_euro_gpio_p) {
  7741. dev_dbg(&pdev->dev, "property %s not detected in node %s",
  7742. "qcom,us-euro-gpios", pdev->dev.of_node->full_name);
  7743. } else {
  7744. dev_dbg(&pdev->dev, "%s detected\n",
  7745. "qcom,us-euro-gpios");
  7746. wcd_mbhc_cfg.swap_gnd_mic = msm_swap_gnd_mic;
  7747. }
  7748. if (wcd_mbhc_cfg.enable_usbc_analog) {
  7749. wcd_mbhc_cfg.swap_gnd_mic = msm_usbc_swap_gnd_mic;
  7750. pdata->fsa_handle = of_parse_phandle(pdev->dev.of_node,
  7751. "fsa4480-i2c-handle", 0);
  7752. if (!pdata->fsa_handle)
  7753. dev_err(&pdev->dev,
  7754. "property %s not detected in node %s\n",
  7755. "fsa4480-i2c-handle",
  7756. pdev->dev.of_node->full_name);
  7757. }
  7758. /* Parse pinctrl info from devicetree */
  7759. ret = msm_get_pinctrl(pdev);
  7760. if (!ret) {
  7761. pr_debug("%s: pinctrl parsing successful\n", __func__);
  7762. } else {
  7763. dev_dbg(&pdev->dev,
  7764. "%s: Parsing pinctrl failed with %d. Cannot use Ports\n",
  7765. __func__, ret);
  7766. ret = 0;
  7767. }
  7768. msm_i2s_auxpcm_init(pdev);
  7769. if (strcmp(card->name, "sm6150-tavil-snd-card")) {
  7770. pdata->dmic01_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7771. "qcom,cdc-dmic01-gpios",
  7772. 0);
  7773. pdata->dmic23_gpio_p = of_parse_phandle(pdev->dev.of_node,
  7774. "qcom,cdc-dmic23-gpios",
  7775. 0);
  7776. }
  7777. ret = msm_audio_ssr_register(&pdev->dev);
  7778. if (ret)
  7779. pr_err("%s: Registration with SND event FWK failed ret = %d\n",
  7780. __func__, ret);
  7781. err:
  7782. return ret;
  7783. }
  7784. static int msm_asoc_machine_remove(struct platform_device *pdev)
  7785. {
  7786. snd_event_master_deregister(&pdev->dev);
  7787. msm_i2s_auxpcm_deinit();
  7788. return 0;
  7789. }
  7790. static struct platform_driver sm6150_asoc_machine_driver = {
  7791. .driver = {
  7792. .name = DRV_NAME,
  7793. .owner = THIS_MODULE,
  7794. .pm = &snd_soc_pm_ops,
  7795. .of_match_table = sm6150_asoc_machine_of_match,
  7796. },
  7797. .probe = msm_asoc_machine_probe,
  7798. .remove = msm_asoc_machine_remove,
  7799. };
  7800. module_platform_driver(sm6150_asoc_machine_driver);
  7801. MODULE_DESCRIPTION("ALSA SoC SM6150 Machine driver");
  7802. MODULE_LICENSE("GPL v2");
  7803. MODULE_ALIAS("platform:" DRV_NAME);
  7804. MODULE_DEVICE_TABLE(of, sm6150_asoc_machine_of_match);