dp_be_rx.c 45 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "cdp_txrx_cmn_struct.h"
  20. #include "hal_hw_headers.h"
  21. #include "dp_types.h"
  22. #include "dp_rx.h"
  23. #include "dp_tx.h"
  24. #include "dp_be_rx.h"
  25. #include "dp_peer.h"
  26. #include "hal_rx.h"
  27. #include "hal_be_rx.h"
  28. #include "hal_api.h"
  29. #include "hal_be_api.h"
  30. #include "qdf_nbuf.h"
  31. #include "hal_be_rx_tlv.h"
  32. #ifdef MESH_MODE_SUPPORT
  33. #include "if_meta_hdr.h"
  34. #endif
  35. #include "dp_internal.h"
  36. #include "dp_ipa.h"
  37. #ifdef FEATURE_WDS
  38. #include "dp_txrx_wds.h"
  39. #endif
  40. #include "dp_hist.h"
  41. #include "dp_rx_buffer_pool.h"
  42. #ifndef AST_OFFLOAD_ENABLE
  43. static void
  44. dp_rx_wds_learn(struct dp_soc *soc,
  45. struct dp_vdev *vdev,
  46. uint8_t *rx_tlv_hdr,
  47. struct dp_txrx_peer *txrx_peer,
  48. qdf_nbuf_t nbuf,
  49. struct hal_rx_msdu_metadata msdu_metadata)
  50. {
  51. /* WDS Source Port Learning */
  52. if (qdf_likely(vdev->wds_enabled))
  53. dp_rx_wds_srcport_learn(soc,
  54. rx_tlv_hdr,
  55. txrx_peer,
  56. nbuf,
  57. msdu_metadata);
  58. }
  59. #else
  60. #ifdef QCA_SUPPORT_WDS_EXTENDED
  61. /**
  62. * dp_wds_ext_peer_learn_be() - function to send event to control
  63. * path on receiving 1st 4-address frame from backhaul.
  64. * @soc: DP soc
  65. * @ta_txrx_peer: WDS repeater txrx peer
  66. * @rx_tlv_hdr : start address of rx tlvs
  67. * @nbuf: RX packet buffer
  68. *
  69. * Return: void
  70. */
  71. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  72. struct dp_txrx_peer *ta_txrx_peer,
  73. uint8_t *rx_tlv_hdr,
  74. qdf_nbuf_t nbuf)
  75. {
  76. uint8_t wds_ext_src_mac[QDF_MAC_ADDR_SIZE];
  77. struct dp_peer *ta_base_peer;
  78. /* instead of checking addr4 is valid or not in per packet path
  79. * check for init bit, which will be set on reception of
  80. * first addr4 valid packet.
  81. */
  82. if (!ta_txrx_peer->vdev->wds_ext_enabled ||
  83. qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT,
  84. &ta_txrx_peer->wds_ext.init))
  85. return;
  86. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  87. hal_rx_get_mpdu_mac_ad4_valid_be(rx_tlv_hdr)) {
  88. qdf_atomic_test_and_set_bit(WDS_EXT_PEER_INIT_BIT,
  89. &ta_txrx_peer->wds_ext.init);
  90. ta_base_peer = dp_peer_get_ref_by_id(soc, ta_txrx_peer->peer_id,
  91. DP_MOD_ID_RX);
  92. if (!ta_base_peer)
  93. return;
  94. qdf_mem_copy(wds_ext_src_mac, &ta_base_peer->mac_addr.raw[0],
  95. QDF_MAC_ADDR_SIZE);
  96. dp_peer_unref_delete(ta_base_peer, DP_MOD_ID_RX);
  97. soc->cdp_soc.ol_ops->rx_wds_ext_peer_learn(
  98. soc->ctrl_psoc,
  99. ta_txrx_peer->peer_id,
  100. ta_txrx_peer->vdev->vdev_id,
  101. wds_ext_src_mac);
  102. }
  103. }
  104. #else
  105. static inline void dp_wds_ext_peer_learn_be(struct dp_soc *soc,
  106. struct dp_txrx_peer *ta_txrx_peer,
  107. uint8_t *rx_tlv_hdr,
  108. qdf_nbuf_t nbuf)
  109. {
  110. }
  111. #endif
  112. static void
  113. dp_rx_wds_learn(struct dp_soc *soc,
  114. struct dp_vdev *vdev,
  115. uint8_t *rx_tlv_hdr,
  116. struct dp_txrx_peer *ta_txrx_peer,
  117. qdf_nbuf_t nbuf,
  118. struct hal_rx_msdu_metadata msdu_metadata)
  119. {
  120. dp_wds_ext_peer_learn_be(soc, ta_txrx_peer, rx_tlv_hdr, nbuf);
  121. }
  122. #endif
  123. #if defined(DP_PKT_STATS_PER_LMAC) && defined(WLAN_FEATURE_11BE_MLO)
  124. static inline void
  125. dp_rx_set_msdu_lmac_id(qdf_nbuf_t nbuf, uint32_t peer_mdata)
  126. {
  127. uint8_t lmac_id;
  128. lmac_id = dp_rx_peer_metadata_lmac_id_get_be(peer_mdata);
  129. qdf_nbuf_set_lmac_id(nbuf, lmac_id);
  130. }
  131. #else
  132. static inline void
  133. dp_rx_set_msdu_lmac_id(qdf_nbuf_t nbuf, uint32_t peer_mdata)
  134. {
  135. }
  136. #endif
  137. /**
  138. * dp_rx_process_be() - Brain of the Rx processing functionality
  139. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  140. * @int_ctx: per interrupt context
  141. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  142. * @reo_ring_num: ring number (0, 1, 2 or 3) of the reo ring.
  143. * @quota: No. of units (packets) that can be serviced in one shot.
  144. *
  145. * This function implements the core of Rx functionality. This is
  146. * expected to handle only non-error frames.
  147. *
  148. * Return: uint32_t: No. of elements processed
  149. */
  150. uint32_t dp_rx_process_be(struct dp_intr *int_ctx,
  151. hal_ring_handle_t hal_ring_hdl, uint8_t reo_ring_num,
  152. uint32_t quota)
  153. {
  154. hal_ring_desc_t ring_desc;
  155. hal_ring_desc_t last_prefetched_hw_desc;
  156. hal_soc_handle_t hal_soc;
  157. struct dp_rx_desc *rx_desc = NULL;
  158. struct dp_rx_desc *last_prefetched_sw_desc = NULL;
  159. qdf_nbuf_t nbuf, next;
  160. bool near_full;
  161. union dp_rx_desc_list_elem_t *head[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  162. union dp_rx_desc_list_elem_t *tail[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  163. uint32_t num_pending = 0;
  164. uint32_t rx_bufs_used = 0, rx_buf_cookie;
  165. uint16_t msdu_len = 0;
  166. uint16_t peer_id;
  167. uint8_t vdev_id;
  168. struct dp_txrx_peer *txrx_peer;
  169. dp_txrx_ref_handle txrx_ref_handle = NULL;
  170. struct dp_vdev *vdev;
  171. uint32_t pkt_len = 0;
  172. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  173. struct hal_rx_msdu_desc_info msdu_desc_info;
  174. enum hal_reo_error_status error;
  175. uint32_t peer_mdata;
  176. uint8_t *rx_tlv_hdr;
  177. uint32_t rx_bufs_reaped[WLAN_MAX_MLO_CHIPS][MAX_PDEV_CNT];
  178. uint8_t mac_id = 0;
  179. struct dp_pdev *rx_pdev;
  180. bool enh_flag;
  181. struct dp_srng *dp_rxdma_srng;
  182. struct rx_desc_pool *rx_desc_pool;
  183. struct dp_soc *soc = int_ctx->soc;
  184. struct cdp_tid_rx_stats *tid_stats;
  185. qdf_nbuf_t nbuf_head;
  186. qdf_nbuf_t nbuf_tail;
  187. qdf_nbuf_t deliver_list_head;
  188. qdf_nbuf_t deliver_list_tail;
  189. uint32_t num_rx_bufs_reaped = 0;
  190. uint32_t intr_id;
  191. struct hif_opaque_softc *scn;
  192. int32_t tid = 0;
  193. bool is_prev_msdu_last = true;
  194. uint32_t num_entries_avail = 0;
  195. uint32_t rx_ol_pkt_cnt = 0;
  196. uint32_t num_entries = 0;
  197. struct hal_rx_msdu_metadata msdu_metadata;
  198. QDF_STATUS status;
  199. qdf_nbuf_t ebuf_head;
  200. qdf_nbuf_t ebuf_tail;
  201. uint8_t pkt_capture_offload = 0;
  202. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  203. int max_reap_limit, ring_near_full;
  204. struct dp_soc *replenish_soc;
  205. uint8_t chip_id;
  206. uint64_t current_time = 0;
  207. DP_HIST_INIT();
  208. qdf_assert_always(soc && hal_ring_hdl);
  209. hal_soc = soc->hal_soc;
  210. qdf_assert_always(hal_soc);
  211. scn = soc->hif_handle;
  212. intr_id = int_ctx->dp_intr_id;
  213. num_entries = hal_srng_get_num_entries(hal_soc, hal_ring_hdl);
  214. dp_runtime_pm_mark_last_busy(soc);
  215. more_data:
  216. /* reset local variables here to be re-used in the function */
  217. nbuf_head = NULL;
  218. nbuf_tail = NULL;
  219. deliver_list_head = NULL;
  220. deliver_list_tail = NULL;
  221. txrx_peer = NULL;
  222. vdev = NULL;
  223. num_rx_bufs_reaped = 0;
  224. ebuf_head = NULL;
  225. ebuf_tail = NULL;
  226. ring_near_full = 0;
  227. max_reap_limit = dp_rx_get_loop_pkt_limit(soc);
  228. qdf_mem_zero(rx_bufs_reaped, sizeof(rx_bufs_reaped));
  229. qdf_mem_zero(&mpdu_desc_info, sizeof(mpdu_desc_info));
  230. qdf_mem_zero(&msdu_desc_info, sizeof(msdu_desc_info));
  231. qdf_mem_zero(head, sizeof(head));
  232. qdf_mem_zero(tail, sizeof(tail));
  233. dp_pkt_get_timestamp(&current_time);
  234. ring_near_full = _dp_srng_test_and_update_nf_params(soc, rx_ring,
  235. &max_reap_limit);
  236. if (qdf_unlikely(dp_rx_srng_access_start(int_ctx, soc, hal_ring_hdl))) {
  237. /*
  238. * Need API to convert from hal_ring pointer to
  239. * Ring Type / Ring Id combo
  240. */
  241. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  242. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  243. FL("HAL RING Access Failed -- %pK"), hal_ring_hdl);
  244. goto done;
  245. }
  246. hal_srng_update_ring_usage_wm_no_lock(soc->hal_soc, hal_ring_hdl);
  247. if (!num_pending)
  248. num_pending = hal_srng_dst_num_valid(hal_soc, hal_ring_hdl, 0);
  249. if (num_pending > quota)
  250. num_pending = quota;
  251. dp_srng_dst_inv_cached_descs(soc, hal_ring_hdl, num_pending);
  252. last_prefetched_hw_desc = dp_srng_dst_prefetch_32_byte_desc(hal_soc,
  253. hal_ring_hdl,
  254. num_pending);
  255. /*
  256. * start reaping the buffers from reo ring and queue
  257. * them in per vdev queue.
  258. * Process the received pkts in a different per vdev loop.
  259. */
  260. while (qdf_likely(num_pending)) {
  261. ring_desc = dp_srng_dst_get_next(soc, hal_ring_hdl);
  262. if (qdf_unlikely(!ring_desc))
  263. break;
  264. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  265. if (qdf_unlikely(error == HAL_REO_ERROR_DETECTED)) {
  266. dp_rx_err("%pK: HAL RING 0x%pK:error %d",
  267. soc, hal_ring_hdl, error);
  268. DP_STATS_INC(soc, rx.err.hal_reo_error[reo_ring_num],
  269. 1);
  270. /* Don't know how to deal with this -- assert */
  271. qdf_assert(0);
  272. }
  273. dp_rx_ring_record_entry(soc, reo_ring_num, ring_desc);
  274. rx_buf_cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  275. status = dp_rx_cookie_check_and_invalidate(ring_desc);
  276. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  277. DP_STATS_INC(soc, rx.err.stale_cookie, 1);
  278. break;
  279. }
  280. rx_desc = (struct dp_rx_desc *)
  281. hal_rx_get_reo_desc_va(ring_desc);
  282. dp_rx_desc_sw_cc_check(soc, rx_buf_cookie, &rx_desc);
  283. status = dp_rx_desc_sanity(soc, hal_soc, hal_ring_hdl,
  284. ring_desc, rx_desc);
  285. if (QDF_IS_STATUS_ERROR(status)) {
  286. if (qdf_unlikely(rx_desc && rx_desc->nbuf)) {
  287. qdf_assert_always(!rx_desc->unmapped);
  288. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  289. rx_desc->unmapped = 1;
  290. dp_rx_buffer_pool_nbuf_free(soc, rx_desc->nbuf,
  291. rx_desc->pool_id);
  292. dp_rx_add_to_free_desc_list(
  293. &head[rx_desc->chip_id][rx_desc->pool_id],
  294. &tail[rx_desc->chip_id][rx_desc->pool_id],
  295. rx_desc);
  296. }
  297. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  298. continue;
  299. }
  300. /*
  301. * this is a unlikely scenario where the host is reaping
  302. * a descriptor which it already reaped just a while ago
  303. * but is yet to replenish it back to HW.
  304. * In this case host will dump the last 128 descriptors
  305. * including the software descriptor rx_desc and assert.
  306. */
  307. if (qdf_unlikely(!rx_desc->in_use)) {
  308. DP_STATS_INC(soc, rx.err.hal_reo_dest_dup, 1);
  309. dp_info_rl("Reaping rx_desc not in use!");
  310. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  311. ring_desc, rx_desc);
  312. /* ignore duplicate RX desc and continue to process */
  313. /* Pop out the descriptor */
  314. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  315. continue;
  316. }
  317. status = dp_rx_desc_nbuf_sanity_check(soc, ring_desc, rx_desc);
  318. if (qdf_unlikely(QDF_IS_STATUS_ERROR(status))) {
  319. DP_STATS_INC(soc, rx.err.nbuf_sanity_fail, 1);
  320. dp_info_rl("Nbuf sanity check failure!");
  321. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  322. ring_desc, rx_desc);
  323. rx_desc->in_err_state = 1;
  324. hal_srng_dst_get_next(hal_soc, hal_ring_hdl);
  325. continue;
  326. }
  327. if (qdf_unlikely(!dp_rx_desc_check_magic(rx_desc))) {
  328. dp_err("Invalid rx_desc cookie=%d", rx_buf_cookie);
  329. DP_STATS_INC(soc, rx.err.rx_desc_invalid_magic, 1);
  330. dp_rx_dump_info_and_assert(soc, hal_ring_hdl,
  331. ring_desc, rx_desc);
  332. }
  333. /* Get MPDU DESC info */
  334. hal_rx_mpdu_desc_info_get_be(ring_desc, &mpdu_desc_info);
  335. /* Get MSDU DESC info */
  336. hal_rx_msdu_desc_info_get_be(ring_desc, &msdu_desc_info);
  337. if (qdf_unlikely(msdu_desc_info.msdu_flags &
  338. HAL_MSDU_F_MSDU_CONTINUATION)) {
  339. /* previous msdu has end bit set, so current one is
  340. * the new MPDU
  341. */
  342. if (is_prev_msdu_last) {
  343. /* Get number of entries available in HW ring */
  344. num_entries_avail =
  345. hal_srng_dst_num_valid(hal_soc,
  346. hal_ring_hdl, 1);
  347. /* For new MPDU check if we can read complete
  348. * MPDU by comparing the number of buffers
  349. * available and number of buffers needed to
  350. * reap this MPDU
  351. */
  352. if ((msdu_desc_info.msdu_len /
  353. (RX_DATA_BUFFER_SIZE -
  354. soc->rx_pkt_tlv_size) + 1) >
  355. num_pending) {
  356. DP_STATS_INC(soc,
  357. rx.msdu_scatter_wait_break,
  358. 1);
  359. dp_rx_cookie_reset_invalid_bit(
  360. ring_desc);
  361. /* As we are going to break out of the
  362. * loop because of unavailability of
  363. * descs to form complete SG, we need to
  364. * reset the TP in the REO destination
  365. * ring.
  366. */
  367. hal_srng_dst_dec_tp(hal_soc,
  368. hal_ring_hdl);
  369. break;
  370. }
  371. is_prev_msdu_last = false;
  372. }
  373. }
  374. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_RETRY_BIT)
  375. qdf_nbuf_set_rx_retry_flag(rx_desc->nbuf, 1);
  376. if (qdf_unlikely(mpdu_desc_info.mpdu_flags &
  377. HAL_MPDU_F_RAW_AMPDU))
  378. qdf_nbuf_set_raw_frame(rx_desc->nbuf, 1);
  379. if (!is_prev_msdu_last &&
  380. msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  381. is_prev_msdu_last = true;
  382. rx_bufs_reaped[rx_desc->chip_id][rx_desc->pool_id]++;
  383. peer_mdata = mpdu_desc_info.peer_meta_data;
  384. QDF_NBUF_CB_RX_PEER_ID(rx_desc->nbuf) =
  385. dp_rx_peer_metadata_peer_id_get_be(soc, peer_mdata);
  386. QDF_NBUF_CB_RX_VDEV_ID(rx_desc->nbuf) =
  387. dp_rx_peer_metadata_vdev_id_get_be(soc, peer_mdata);
  388. dp_rx_set_msdu_lmac_id(rx_desc->nbuf, peer_mdata);
  389. /* to indicate whether this msdu is rx offload */
  390. pkt_capture_offload =
  391. DP_PEER_METADATA_OFFLOAD_GET_BE(peer_mdata);
  392. /*
  393. * save msdu flags first, last and continuation msdu in
  394. * nbuf->cb, also save mcbc, is_da_valid, is_sa_valid and
  395. * length to nbuf->cb. This ensures the info required for
  396. * per pkt processing is always in the same cache line.
  397. * This helps in improving throughput for smaller pkt
  398. * sizes.
  399. */
  400. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_FIRST_MSDU_IN_MPDU)
  401. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  402. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_MSDU_CONTINUATION)
  403. qdf_nbuf_set_rx_chfrag_cont(rx_desc->nbuf, 1);
  404. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_LAST_MSDU_IN_MPDU)
  405. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  406. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_MCBC)
  407. qdf_nbuf_set_da_mcbc(rx_desc->nbuf, 1);
  408. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_DA_IS_VALID)
  409. qdf_nbuf_set_da_valid(rx_desc->nbuf, 1);
  410. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_SA_IS_VALID)
  411. qdf_nbuf_set_sa_valid(rx_desc->nbuf, 1);
  412. if (msdu_desc_info.msdu_flags & HAL_MSDU_F_INTRA_BSS)
  413. qdf_nbuf_set_intra_bss(rx_desc->nbuf, 1);
  414. if (qdf_likely(mpdu_desc_info.mpdu_flags &
  415. HAL_MPDU_F_QOS_CONTROL_VALID))
  416. qdf_nbuf_set_tid_val(rx_desc->nbuf, mpdu_desc_info.tid);
  417. /* set sw exception */
  418. qdf_nbuf_set_rx_reo_dest_ind_or_sw_excpt(
  419. rx_desc->nbuf,
  420. hal_rx_sw_exception_get_be(ring_desc));
  421. QDF_NBUF_CB_RX_PKT_LEN(rx_desc->nbuf) = msdu_desc_info.msdu_len;
  422. QDF_NBUF_CB_RX_CTX_ID(rx_desc->nbuf) = reo_ring_num;
  423. /*
  424. * move unmap after scattered msdu waiting break logic
  425. * in case double skb unmap happened.
  426. */
  427. dp_rx_nbuf_unmap(soc, rx_desc, reo_ring_num);
  428. rx_desc->unmapped = 1;
  429. DP_RX_PROCESS_NBUF(soc, nbuf_head, nbuf_tail, ebuf_head,
  430. ebuf_tail, rx_desc);
  431. quota -= 1;
  432. num_pending -= 1;
  433. dp_rx_add_to_free_desc_list
  434. (&head[rx_desc->chip_id][rx_desc->pool_id],
  435. &tail[rx_desc->chip_id][rx_desc->pool_id], rx_desc);
  436. num_rx_bufs_reaped++;
  437. dp_rx_prefetch_hw_sw_nbuf_32_byte_desc(soc, hal_soc,
  438. num_pending,
  439. hal_ring_hdl,
  440. &last_prefetched_hw_desc,
  441. &last_prefetched_sw_desc);
  442. /*
  443. * only if complete msdu is received for scatter case,
  444. * then allow break.
  445. */
  446. if (is_prev_msdu_last &&
  447. dp_rx_reap_loop_pkt_limit_hit(soc, num_rx_bufs_reaped,
  448. max_reap_limit))
  449. break;
  450. }
  451. done:
  452. dp_rx_srng_access_end(int_ctx, soc, hal_ring_hdl);
  453. qdf_dsb();
  454. dp_rx_per_core_stats_update(soc, reo_ring_num, num_rx_bufs_reaped);
  455. for (chip_id = 0; chip_id < WLAN_MAX_MLO_CHIPS; chip_id++) {
  456. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  457. /*
  458. * continue with next mac_id if no pkts were reaped
  459. * from that pool
  460. */
  461. if (!rx_bufs_reaped[chip_id][mac_id])
  462. continue;
  463. replenish_soc = dp_rx_replensih_soc_get(soc, chip_id);
  464. dp_rxdma_srng =
  465. &replenish_soc->rx_refill_buf_ring[mac_id];
  466. rx_desc_pool = &replenish_soc->rx_desc_buf[mac_id];
  467. dp_rx_buffers_replenish_simple(replenish_soc, mac_id,
  468. dp_rxdma_srng,
  469. rx_desc_pool,
  470. rx_bufs_reaped[chip_id][mac_id],
  471. &head[chip_id][mac_id],
  472. &tail[chip_id][mac_id]);
  473. }
  474. }
  475. /* Peer can be NULL is case of LFR */
  476. if (qdf_likely(txrx_peer))
  477. vdev = NULL;
  478. /*
  479. * BIG loop where each nbuf is dequeued from global queue,
  480. * processed and queued back on a per vdev basis. These nbufs
  481. * are sent to stack as and when we run out of nbufs
  482. * or a new nbuf dequeued from global queue has a different
  483. * vdev when compared to previous nbuf.
  484. */
  485. nbuf = nbuf_head;
  486. while (nbuf) {
  487. next = nbuf->next;
  488. dp_rx_prefetch_nbuf_data_be(nbuf, next);
  489. if (qdf_unlikely(dp_rx_is_raw_frame_dropped(nbuf))) {
  490. nbuf = next;
  491. DP_STATS_INC(soc, rx.err.raw_frm_drop, 1);
  492. continue;
  493. }
  494. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  495. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  496. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  497. if (dp_rx_is_list_ready(deliver_list_head, vdev, txrx_peer,
  498. peer_id, vdev_id)) {
  499. dp_rx_deliver_to_stack(soc, vdev, txrx_peer,
  500. deliver_list_head,
  501. deliver_list_tail);
  502. deliver_list_head = NULL;
  503. deliver_list_tail = NULL;
  504. }
  505. /* Get TID from struct cb->tid_val, save to tid */
  506. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  507. tid = qdf_nbuf_get_tid_val(nbuf);
  508. if (qdf_unlikely(!txrx_peer)) {
  509. txrx_peer = dp_txrx_peer_get_ref_by_id(soc, peer_id,
  510. &txrx_ref_handle,
  511. DP_MOD_ID_RX);
  512. } else if (txrx_peer && txrx_peer->peer_id != peer_id) {
  513. dp_txrx_peer_unref_delete(txrx_ref_handle,
  514. DP_MOD_ID_RX);
  515. txrx_peer = dp_txrx_peer_get_ref_by_id(soc, peer_id,
  516. &txrx_ref_handle,
  517. DP_MOD_ID_RX);
  518. }
  519. if (txrx_peer) {
  520. QDF_NBUF_CB_DP_TRACE_PRINT(nbuf) = false;
  521. qdf_dp_trace_set_track(nbuf, QDF_RX);
  522. QDF_NBUF_CB_RX_DP_TRACE(nbuf) = 1;
  523. QDF_NBUF_CB_RX_PACKET_TRACK(nbuf) =
  524. QDF_NBUF_RX_PKT_DATA_TRACK;
  525. }
  526. rx_bufs_used++;
  527. if (qdf_likely(txrx_peer)) {
  528. vdev = txrx_peer->vdev;
  529. } else {
  530. nbuf->next = NULL;
  531. dp_rx_deliver_to_pkt_capture_no_peer(
  532. soc, nbuf, pkt_capture_offload);
  533. if (!pkt_capture_offload)
  534. dp_rx_deliver_to_stack_no_peer(soc, nbuf);
  535. nbuf = next;
  536. continue;
  537. }
  538. if (qdf_unlikely(!vdev)) {
  539. dp_rx_nbuf_free(nbuf);
  540. nbuf = next;
  541. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  542. continue;
  543. }
  544. /* when hlos tid override is enabled, save tid in
  545. * skb->priority
  546. */
  547. if (qdf_unlikely(vdev->skip_sw_tid_classification &
  548. DP_TXRX_HLOS_TID_OVERRIDE_ENABLED))
  549. qdf_nbuf_set_priority(nbuf, tid);
  550. rx_pdev = vdev->pdev;
  551. DP_RX_TID_SAVE(nbuf, tid);
  552. if (qdf_unlikely(rx_pdev->delay_stats_flag) ||
  553. qdf_unlikely(wlan_cfg_is_peer_ext_stats_enabled(
  554. soc->wlan_cfg_ctx)) ||
  555. dp_rx_pkt_tracepoints_enabled())
  556. qdf_nbuf_set_timestamp(nbuf);
  557. enh_flag = rx_pdev->enhanced_stats_en;
  558. tid_stats =
  559. &rx_pdev->stats.tid_stats.tid_rx_stats[reo_ring_num][tid];
  560. /*
  561. * Check if DMA completed -- msdu_done is the last bit
  562. * to be written
  563. */
  564. if (qdf_unlikely(!qdf_nbuf_is_rx_chfrag_cont(nbuf) &&
  565. !hal_rx_tlv_msdu_done_get_be(rx_tlv_hdr))) {
  566. dp_err("MSDU DONE failure");
  567. DP_STATS_INC(soc, rx.err.msdu_done_fail, 1);
  568. hal_rx_dump_pkt_tlvs(hal_soc, rx_tlv_hdr,
  569. QDF_TRACE_LEVEL_INFO);
  570. tid_stats->fail_cnt[MSDU_DONE_FAILURE]++;
  571. dp_rx_nbuf_free(nbuf);
  572. qdf_assert(0);
  573. nbuf = next;
  574. continue;
  575. }
  576. DP_HIST_PACKET_COUNT_INC(vdev->pdev->pdev_id);
  577. /*
  578. * First IF condition:
  579. * 802.11 Fragmented pkts are reinjected to REO
  580. * HW block as SG pkts and for these pkts we only
  581. * need to pull the RX TLVS header length.
  582. * Second IF condition:
  583. * The below condition happens when an MSDU is spread
  584. * across multiple buffers. This can happen in two cases
  585. * 1. The nbuf size is smaller then the received msdu.
  586. * ex: we have set the nbuf size to 2048 during
  587. * nbuf_alloc. but we received an msdu which is
  588. * 2304 bytes in size then this msdu is spread
  589. * across 2 nbufs.
  590. *
  591. * 2. AMSDUs when RAW mode is enabled.
  592. * ex: 1st MSDU is in 1st nbuf and 2nd MSDU is spread
  593. * across 1st nbuf and 2nd nbuf and last MSDU is
  594. * spread across 2nd nbuf and 3rd nbuf.
  595. *
  596. * for these scenarios let us create a skb frag_list and
  597. * append these buffers till the last MSDU of the AMSDU
  598. * Third condition:
  599. * This is the most likely case, we receive 802.3 pkts
  600. * decapsulated by HW, here we need to set the pkt length.
  601. */
  602. hal_rx_msdu_packet_metadata_get_generic_be(rx_tlv_hdr,
  603. &msdu_metadata);
  604. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  605. bool is_mcbc, is_sa_vld, is_da_vld;
  606. is_mcbc = hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
  607. rx_tlv_hdr);
  608. is_sa_vld =
  609. hal_rx_msdu_end_sa_is_valid_get(soc->hal_soc,
  610. rx_tlv_hdr);
  611. is_da_vld =
  612. hal_rx_msdu_end_da_is_valid_get(soc->hal_soc,
  613. rx_tlv_hdr);
  614. qdf_nbuf_set_da_mcbc(nbuf, is_mcbc);
  615. qdf_nbuf_set_da_valid(nbuf, is_da_vld);
  616. qdf_nbuf_set_sa_valid(nbuf, is_sa_vld);
  617. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  618. } else if (qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  619. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  620. nbuf = dp_rx_sg_create(soc, nbuf);
  621. next = nbuf->next;
  622. if (qdf_nbuf_is_raw_frame(nbuf)) {
  623. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  624. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  625. rx.raw, 1,
  626. msdu_len);
  627. } else {
  628. dp_rx_nbuf_free(nbuf);
  629. DP_STATS_INC(soc, rx.err.scatter_msdu, 1);
  630. dp_info_rl("scatter msdu len %d, dropped",
  631. msdu_len);
  632. nbuf = next;
  633. continue;
  634. }
  635. } else {
  636. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  637. pkt_len = msdu_len +
  638. msdu_metadata.l3_hdr_pad +
  639. soc->rx_pkt_tlv_size;
  640. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  641. dp_rx_skip_tlvs(soc, nbuf, msdu_metadata.l3_hdr_pad);
  642. }
  643. dp_rx_send_pktlog(soc, rx_pdev, nbuf, QDF_TX_RX_STATUS_OK);
  644. /*
  645. * process frame for mulitpass phrase processing
  646. */
  647. if (qdf_unlikely(vdev->multipass_en)) {
  648. if (dp_rx_multipass_process(txrx_peer, nbuf,
  649. tid) == false) {
  650. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  651. rx.multipass_rx_pkt_drop,
  652. 1);
  653. dp_rx_nbuf_free(nbuf);
  654. nbuf = next;
  655. continue;
  656. }
  657. }
  658. if (!dp_wds_rx_policy_check(rx_tlv_hdr, vdev, txrx_peer)) {
  659. dp_rx_err("%pK: Policy Check Drop pkt", soc);
  660. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  661. rx.policy_check_drop, 1);
  662. tid_stats->fail_cnt[POLICY_CHECK_DROP]++;
  663. /* Drop & free packet */
  664. dp_rx_nbuf_free(nbuf);
  665. /* Statistics */
  666. nbuf = next;
  667. continue;
  668. }
  669. if (qdf_unlikely(txrx_peer && (txrx_peer->nawds_enabled) &&
  670. (qdf_nbuf_is_da_mcbc(nbuf)) &&
  671. (hal_rx_get_mpdu_mac_ad4_valid_be(rx_tlv_hdr)
  672. == false))) {
  673. tid_stats->fail_cnt[NAWDS_MCAST_DROP]++;
  674. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  675. rx.nawds_mcast_drop, 1);
  676. dp_rx_nbuf_free(nbuf);
  677. nbuf = next;
  678. continue;
  679. }
  680. /*
  681. * Drop non-EAPOL frames from unauthorized peer.
  682. */
  683. if (qdf_likely(txrx_peer) &&
  684. qdf_unlikely(!txrx_peer->authorize) &&
  685. !qdf_nbuf_is_raw_frame(nbuf)) {
  686. bool is_eapol = qdf_nbuf_is_ipv4_eapol_pkt(nbuf) ||
  687. qdf_nbuf_is_ipv4_wapi_pkt(nbuf);
  688. if (!is_eapol) {
  689. DP_PEER_PER_PKT_STATS_INC(txrx_peer,
  690. rx.peer_unauth_rx_pkt_drop,
  691. 1);
  692. dp_rx_nbuf_free(nbuf);
  693. nbuf = next;
  694. continue;
  695. }
  696. }
  697. if (soc->process_rx_status)
  698. dp_rx_cksum_offload(vdev->pdev, nbuf, rx_tlv_hdr);
  699. /* Update the protocol tag in SKB based on CCE metadata */
  700. dp_rx_update_protocol_tag(soc, vdev, nbuf, rx_tlv_hdr,
  701. reo_ring_num, false, true);
  702. /* Update the flow tag in SKB based on FSE metadata */
  703. dp_rx_update_flow_tag(soc, vdev, nbuf, rx_tlv_hdr, true);
  704. dp_rx_msdu_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer,
  705. reo_ring_num, tid_stats);
  706. if (qdf_unlikely(vdev->mesh_vdev)) {
  707. if (dp_rx_filter_mesh_packets(vdev, nbuf, rx_tlv_hdr)
  708. == QDF_STATUS_SUCCESS) {
  709. dp_rx_info("%pK: mesh pkt filtered", soc);
  710. tid_stats->fail_cnt[MESH_FILTER_DROP]++;
  711. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  712. 1);
  713. dp_rx_nbuf_free(nbuf);
  714. nbuf = next;
  715. continue;
  716. }
  717. dp_rx_fill_mesh_stats(vdev, nbuf, rx_tlv_hdr,
  718. txrx_peer);
  719. }
  720. if (qdf_likely(vdev->rx_decap_type ==
  721. htt_cmn_pkt_type_ethernet) &&
  722. qdf_likely(!vdev->mesh_vdev)) {
  723. dp_rx_wds_learn(soc, vdev,
  724. rx_tlv_hdr,
  725. txrx_peer,
  726. nbuf,
  727. msdu_metadata);
  728. /* Intrabss-fwd */
  729. if (dp_rx_check_ap_bridge(vdev))
  730. if (dp_rx_intrabss_fwd_be(soc, txrx_peer,
  731. rx_tlv_hdr,
  732. nbuf,
  733. msdu_metadata)) {
  734. nbuf = next;
  735. tid_stats->intrabss_cnt++;
  736. continue; /* Get next desc */
  737. }
  738. }
  739. dp_rx_fill_gro_info(soc, rx_tlv_hdr, nbuf, &rx_ol_pkt_cnt);
  740. dp_rx_mark_first_packet_after_wow_wakeup(vdev->pdev, rx_tlv_hdr,
  741. nbuf);
  742. dp_rx_update_stats(soc, nbuf);
  743. dp_pkt_add_timestamp(txrx_peer->vdev, QDF_PKT_RX_DRIVER_ENTRY,
  744. current_time, nbuf);
  745. DP_RX_LIST_APPEND(deliver_list_head,
  746. deliver_list_tail,
  747. nbuf);
  748. DP_PEER_TO_STACK_INCC_PKT(txrx_peer, 1,
  749. QDF_NBUF_CB_RX_PKT_LEN(nbuf),
  750. enh_flag);
  751. if (qdf_unlikely(txrx_peer->in_twt))
  752. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer,
  753. rx.to_stack_twt, 1,
  754. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  755. tid_stats->delivered_to_stack++;
  756. nbuf = next;
  757. }
  758. DP_RX_DELIVER_TO_STACK(soc, vdev, txrx_peer, peer_id,
  759. pkt_capture_offload,
  760. deliver_list_head,
  761. deliver_list_tail);
  762. if (qdf_likely(txrx_peer))
  763. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  764. /*
  765. * If we are processing in near-full condition, there are 3 scenario
  766. * 1) Ring entries has reached critical state
  767. * 2) Ring entries are still near high threshold
  768. * 3) Ring entries are below the safe level
  769. *
  770. * One more loop will move the state to normal processing and yield
  771. */
  772. if (ring_near_full && quota)
  773. goto more_data;
  774. if (dp_rx_enable_eol_data_check(soc) && rx_bufs_used) {
  775. if (quota) {
  776. num_pending =
  777. dp_rx_srng_get_num_pending(hal_soc,
  778. hal_ring_hdl,
  779. num_entries,
  780. &near_full);
  781. if (num_pending) {
  782. DP_STATS_INC(soc, rx.hp_oos2, 1);
  783. if (!hif_exec_should_yield(scn, intr_id))
  784. goto more_data;
  785. if (qdf_unlikely(near_full)) {
  786. DP_STATS_INC(soc, rx.near_full, 1);
  787. goto more_data;
  788. }
  789. }
  790. }
  791. if (vdev && vdev->osif_fisa_flush)
  792. vdev->osif_fisa_flush(soc, reo_ring_num);
  793. if (vdev && vdev->osif_gro_flush && rx_ol_pkt_cnt) {
  794. vdev->osif_gro_flush(vdev->osif_vdev,
  795. reo_ring_num);
  796. }
  797. }
  798. /* Update histogram statistics by looping through pdev's */
  799. DP_RX_HIST_STATS_PER_PDEV();
  800. return rx_bufs_used; /* Assume no scale factor for now */
  801. }
  802. #ifdef RX_DESC_MULTI_PAGE_ALLOC
  803. /**
  804. * dp_rx_desc_pool_init_be_cc() - initial RX desc pool for cookie conversion
  805. * @soc: Handle to DP Soc structure
  806. * @rx_desc_pool: Rx descriptor pool handler
  807. * @pool_id: Rx descriptor pool ID
  808. *
  809. * Return: QDF_STATUS_SUCCESS - succeeded, others - failed
  810. */
  811. static QDF_STATUS
  812. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  813. struct rx_desc_pool *rx_desc_pool,
  814. uint32_t pool_id)
  815. {
  816. struct dp_hw_cookie_conversion_t *cc_ctx;
  817. struct dp_soc_be *be_soc;
  818. union dp_rx_desc_list_elem_t *rx_desc_elem;
  819. struct dp_spt_page_desc *page_desc;
  820. uint32_t ppt_idx = 0;
  821. uint32_t avail_entry_index = 0;
  822. if (!rx_desc_pool->pool_size) {
  823. dp_err("desc_num 0 !!");
  824. return QDF_STATUS_E_FAILURE;
  825. }
  826. be_soc = dp_get_be_soc_from_dp_soc(soc);
  827. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  828. page_desc = &cc_ctx->page_desc_base[0];
  829. rx_desc_elem = rx_desc_pool->freelist;
  830. while (rx_desc_elem) {
  831. if (avail_entry_index == 0) {
  832. if (ppt_idx >= cc_ctx->total_page_num) {
  833. dp_alert("insufficient secondary page tables");
  834. qdf_assert_always(0);
  835. }
  836. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  837. }
  838. /* put each RX Desc VA to SPT pages and
  839. * get corresponding ID
  840. */
  841. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  842. avail_entry_index,
  843. &rx_desc_elem->rx_desc);
  844. rx_desc_elem->rx_desc.cookie =
  845. dp_cc_desc_id_generate(page_desc->ppt_index,
  846. avail_entry_index);
  847. rx_desc_elem->rx_desc.chip_id = dp_mlo_get_chip_id(soc);
  848. rx_desc_elem->rx_desc.pool_id = pool_id;
  849. rx_desc_elem->rx_desc.in_use = 0;
  850. rx_desc_elem = rx_desc_elem->next;
  851. avail_entry_index = (avail_entry_index + 1) &
  852. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  853. }
  854. return QDF_STATUS_SUCCESS;
  855. }
  856. #else
  857. static QDF_STATUS
  858. dp_rx_desc_pool_init_be_cc(struct dp_soc *soc,
  859. struct rx_desc_pool *rx_desc_pool,
  860. uint32_t pool_id)
  861. {
  862. struct dp_hw_cookie_conversion_t *cc_ctx;
  863. struct dp_soc_be *be_soc;
  864. struct dp_spt_page_desc *page_desc;
  865. uint32_t ppt_idx = 0;
  866. uint32_t avail_entry_index = 0;
  867. int i = 0;
  868. if (!rx_desc_pool->pool_size) {
  869. dp_err("desc_num 0 !!");
  870. return QDF_STATUS_E_FAILURE;
  871. }
  872. be_soc = dp_get_be_soc_from_dp_soc(soc);
  873. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  874. page_desc = &cc_ctx->page_desc_base[0];
  875. for (i = 0; i <= rx_desc_pool->pool_size - 1; i++) {
  876. if (i == rx_desc_pool->pool_size - 1)
  877. rx_desc_pool->array[i].next = NULL;
  878. else
  879. rx_desc_pool->array[i].next =
  880. &rx_desc_pool->array[i + 1];
  881. if (avail_entry_index == 0) {
  882. if (ppt_idx >= cc_ctx->total_page_num) {
  883. dp_alert("insufficient secondary page tables");
  884. qdf_assert_always(0);
  885. }
  886. page_desc = &cc_ctx->page_desc_base[ppt_idx++];
  887. }
  888. /* put each RX Desc VA to SPT pages and
  889. * get corresponding ID
  890. */
  891. DP_CC_SPT_PAGE_UPDATE_VA(page_desc->page_v_addr,
  892. avail_entry_index,
  893. &rx_desc_pool->array[i].rx_desc);
  894. rx_desc_pool->array[i].rx_desc.cookie =
  895. dp_cc_desc_id_generate(page_desc->ppt_index,
  896. avail_entry_index);
  897. rx_desc_pool->array[i].rx_desc.pool_id = pool_id;
  898. rx_desc_pool->array[i].rx_desc.in_use = 0;
  899. rx_desc_pool->array[i].rx_desc.chip_id =
  900. dp_mlo_get_chip_id(soc);
  901. avail_entry_index = (avail_entry_index + 1) &
  902. DP_CC_SPT_PAGE_MAX_ENTRIES_MASK;
  903. }
  904. return QDF_STATUS_SUCCESS;
  905. }
  906. #endif
  907. static void
  908. dp_rx_desc_pool_deinit_be_cc(struct dp_soc *soc,
  909. struct rx_desc_pool *rx_desc_pool,
  910. uint32_t pool_id)
  911. {
  912. struct dp_spt_page_desc *page_desc;
  913. struct dp_soc_be *be_soc;
  914. int i = 0;
  915. struct dp_hw_cookie_conversion_t *cc_ctx;
  916. be_soc = dp_get_be_soc_from_dp_soc(soc);
  917. cc_ctx = &be_soc->rx_cc_ctx[pool_id];
  918. for (i = 0; i < cc_ctx->total_page_num; i++) {
  919. page_desc = &cc_ctx->page_desc_base[i];
  920. qdf_mem_zero(page_desc->page_v_addr, qdf_page_size);
  921. }
  922. }
  923. QDF_STATUS dp_rx_desc_pool_init_be(struct dp_soc *soc,
  924. struct rx_desc_pool *rx_desc_pool,
  925. uint32_t pool_id)
  926. {
  927. QDF_STATUS status = QDF_STATUS_SUCCESS;
  928. /* Only regular RX buffer desc pool use HW cookie conversion */
  929. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE) {
  930. dp_info("rx_desc_buf pool init");
  931. status = dp_rx_desc_pool_init_be_cc(soc,
  932. rx_desc_pool,
  933. pool_id);
  934. } else {
  935. dp_info("non_rx_desc_buf_pool init");
  936. status = dp_rx_desc_pool_init_generic(soc, rx_desc_pool,
  937. pool_id);
  938. }
  939. return status;
  940. }
  941. void dp_rx_desc_pool_deinit_be(struct dp_soc *soc,
  942. struct rx_desc_pool *rx_desc_pool,
  943. uint32_t pool_id)
  944. {
  945. if (rx_desc_pool->desc_type == DP_RX_DESC_BUF_TYPE)
  946. dp_rx_desc_pool_deinit_be_cc(soc, rx_desc_pool, pool_id);
  947. }
  948. #ifdef DP_FEATURE_HW_COOKIE_CONVERSION
  949. #ifdef DP_HW_COOKIE_CONVERT_EXCEPTION
  950. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  951. void *ring_desc,
  952. struct dp_rx_desc **r_rx_desc)
  953. {
  954. if (hal_rx_wbm_get_cookie_convert_done(ring_desc)) {
  955. /* HW cookie conversion done */
  956. *r_rx_desc = (struct dp_rx_desc *)
  957. hal_rx_wbm_get_desc_va(ring_desc);
  958. } else {
  959. /* SW do cookie conversion */
  960. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  961. *r_rx_desc = (struct dp_rx_desc *)
  962. dp_cc_desc_find(soc, cookie);
  963. }
  964. return QDF_STATUS_SUCCESS;
  965. }
  966. #else
  967. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  968. void *ring_desc,
  969. struct dp_rx_desc **r_rx_desc)
  970. {
  971. *r_rx_desc = (struct dp_rx_desc *)
  972. hal_rx_wbm_get_desc_va(ring_desc);
  973. return QDF_STATUS_SUCCESS;
  974. }
  975. #endif /* DP_HW_COOKIE_CONVERT_EXCEPTION */
  976. #else
  977. QDF_STATUS dp_wbm_get_rx_desc_from_hal_desc_be(struct dp_soc *soc,
  978. void *ring_desc,
  979. struct dp_rx_desc **r_rx_desc)
  980. {
  981. /* SW do cookie conversion */
  982. uint32_t cookie = HAL_RX_BUF_COOKIE_GET(ring_desc);
  983. *r_rx_desc = (struct dp_rx_desc *)
  984. dp_cc_desc_find(soc, cookie);
  985. return QDF_STATUS_SUCCESS;
  986. }
  987. #endif /* DP_FEATURE_HW_COOKIE_CONVERSION */
  988. struct dp_rx_desc *dp_rx_desc_cookie_2_va_be(struct dp_soc *soc,
  989. uint32_t cookie)
  990. {
  991. return (struct dp_rx_desc *)dp_cc_desc_find(soc, cookie);
  992. }
  993. #if defined(WLAN_FEATURE_11BE_MLO)
  994. #if defined(WLAN_MLO_MULTI_CHIP) && defined(WLAN_MCAST_MLO)
  995. #define DP_RANDOM_MAC_ID_BIT_MASK 0xC0
  996. #define DP_RANDOM_MAC_OFFSET 1
  997. #define DP_MAC_LOCAL_ADMBIT_MASK 0x2
  998. #define DP_MAC_LOCAL_ADMBIT_OFFSET 0
  999. static inline void dp_rx_dummy_src_mac(struct dp_vdev *vdev,
  1000. qdf_nbuf_t nbuf)
  1001. {
  1002. uint8_t random_mac[QDF_MAC_ADDR_SIZE] = {0};
  1003. qdf_ether_header_t *eh =
  1004. (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1005. qdf_mem_copy(random_mac, &vdev->mld_mac_addr.raw[0], QDF_MAC_ADDR_SIZE);
  1006. random_mac[DP_MAC_LOCAL_ADMBIT_OFFSET] =
  1007. random_mac[DP_MAC_LOCAL_ADMBIT_OFFSET] |
  1008. DP_MAC_LOCAL_ADMBIT_MASK;
  1009. random_mac[DP_RANDOM_MAC_OFFSET] =
  1010. random_mac[DP_RANDOM_MAC_OFFSET] ^ DP_RANDOM_MAC_ID_BIT_MASK;
  1011. qdf_mem_copy(&eh->ether_shost[0], random_mac, QDF_MAC_ADDR_SIZE);
  1012. }
  1013. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1014. static inline bool dp_rx_mlo_igmp_wds_ext_handler(struct dp_txrx_peer *peer)
  1015. {
  1016. return qdf_atomic_test_bit(WDS_EXT_PEER_INIT_BIT, &peer->wds_ext.init);
  1017. }
  1018. #else
  1019. static inline bool dp_rx_mlo_igmp_wds_ext_handler(struct dp_txrx_peer *peer)
  1020. {
  1021. return false;
  1022. }
  1023. #endif
  1024. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  1025. struct dp_vdev *vdev,
  1026. struct dp_txrx_peer *peer,
  1027. qdf_nbuf_t nbuf)
  1028. {
  1029. struct dp_vdev *mcast_primary_vdev = NULL;
  1030. struct dp_vdev_be *be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  1031. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1032. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1033. struct cdp_tid_rx_stats *tid_stats = &peer->vdev->pdev->stats.
  1034. tid_stats.tid_rx_wbm_stats[0][tid];
  1035. if (!(qdf_nbuf_is_ipv4_igmp_pkt(nbuf) ||
  1036. qdf_nbuf_is_ipv6_igmp_pkt(nbuf)))
  1037. return false;
  1038. if (!peer->bss_peer) {
  1039. if (dp_rx_intrabss_mcbc_fwd(soc, peer, NULL, nbuf, tid_stats))
  1040. dp_rx_err("forwarding failed");
  1041. }
  1042. /*
  1043. * In the case of ME6, Backhaul WDS, NAWDS
  1044. * send the igmp pkt on the same link where it received,
  1045. * as these features will use peer based tcl metadata
  1046. */
  1047. qdf_nbuf_set_next(nbuf, NULL);
  1048. if (vdev->mcast_enhancement_en || be_vdev->mcast_primary ||
  1049. peer->nawds_enabled)
  1050. goto send_pkt;
  1051. if (qdf_unlikely(dp_rx_mlo_igmp_wds_ext_handler(peer)))
  1052. goto send_pkt;
  1053. mcast_primary_vdev = dp_mlo_get_mcast_primary_vdev(be_soc, be_vdev,
  1054. DP_MOD_ID_RX);
  1055. if (!mcast_primary_vdev) {
  1056. dp_rx_debug("Non mlo vdev");
  1057. goto send_pkt;
  1058. }
  1059. if (qdf_unlikely(vdev->wrap_vdev)) {
  1060. /* In the case of qwrap repeater send the original
  1061. * packet on the interface where it received,
  1062. * packet with dummy src on the mcast primary interface.
  1063. */
  1064. qdf_nbuf_t nbuf_copy;
  1065. nbuf_copy = qdf_nbuf_copy(nbuf);
  1066. if (qdf_likely(nbuf_copy))
  1067. dp_rx_deliver_to_stack(soc, vdev, peer, nbuf_copy,
  1068. NULL);
  1069. }
  1070. dp_rx_dummy_src_mac(vdev, nbuf);
  1071. dp_rx_deliver_to_stack(mcast_primary_vdev->pdev->soc,
  1072. mcast_primary_vdev,
  1073. peer,
  1074. nbuf,
  1075. NULL);
  1076. dp_vdev_unref_delete(mcast_primary_vdev->pdev->soc,
  1077. mcast_primary_vdev,
  1078. DP_MOD_ID_RX);
  1079. return true;
  1080. send_pkt:
  1081. dp_rx_deliver_to_stack(be_vdev->vdev.pdev->soc,
  1082. &be_vdev->vdev,
  1083. peer,
  1084. nbuf,
  1085. NULL);
  1086. return true;
  1087. }
  1088. #else
  1089. bool dp_rx_mlo_igmp_handler(struct dp_soc *soc,
  1090. struct dp_vdev *vdev,
  1091. struct dp_txrx_peer *peer,
  1092. qdf_nbuf_t nbuf)
  1093. {
  1094. return false;
  1095. }
  1096. #endif
  1097. #endif
  1098. #ifdef WLAN_FEATURE_NEAR_FULL_IRQ
  1099. uint32_t dp_rx_nf_process(struct dp_intr *int_ctx,
  1100. hal_ring_handle_t hal_ring_hdl,
  1101. uint8_t reo_ring_num,
  1102. uint32_t quota)
  1103. {
  1104. struct dp_soc *soc = int_ctx->soc;
  1105. struct dp_srng *rx_ring = &soc->reo_dest_ring[reo_ring_num];
  1106. uint32_t work_done = 0;
  1107. if (dp_srng_get_near_full_level(soc, rx_ring) <
  1108. DP_SRNG_THRESH_NEAR_FULL)
  1109. return 0;
  1110. qdf_atomic_set(&rx_ring->near_full, 1);
  1111. work_done++;
  1112. return work_done;
  1113. }
  1114. #endif
  1115. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1116. #ifdef WLAN_FEATURE_11BE_MLO
  1117. /**
  1118. * dp_rx_intrabss_fwd_mlo_allow() - check if MLO forwarding is allowed
  1119. * @ta_peer: transmitter peer handle
  1120. * @da_peer: destination peer handle
  1121. *
  1122. * Return: true - MLO forwarding case, false: not
  1123. */
  1124. static inline bool
  1125. dp_rx_intrabss_fwd_mlo_allow(struct dp_txrx_peer *ta_peer,
  1126. struct dp_txrx_peer *da_peer)
  1127. {
  1128. /* one of TA/DA peer should belong to MLO connection peer,
  1129. * only MLD peer type is as expected
  1130. */
  1131. if (!IS_MLO_DP_MLD_TXRX_PEER(ta_peer) &&
  1132. !IS_MLO_DP_MLD_TXRX_PEER(da_peer))
  1133. return false;
  1134. /* TA peer and DA peer's vdev should be partner MLO vdevs */
  1135. if (dp_peer_find_mac_addr_cmp(&ta_peer->vdev->mld_mac_addr,
  1136. &da_peer->vdev->mld_mac_addr))
  1137. return false;
  1138. return true;
  1139. }
  1140. #else
  1141. static inline bool
  1142. dp_rx_intrabss_fwd_mlo_allow(struct dp_txrx_peer *ta_peer,
  1143. struct dp_txrx_peer *da_peer)
  1144. {
  1145. return false;
  1146. }
  1147. #endif
  1148. #ifdef INTRA_BSS_FWD_OFFLOAD
  1149. /**
  1150. * dp_rx_intrabss_ucast_check_be() - Check if intrabss is allowed
  1151. for unicast frame
  1152. * @soc: SOC hanlde
  1153. * @nbuf: RX packet buffer
  1154. * @ta_peer: transmitter DP peer handle
  1155. * @msdu_metadata: MSDU meta data info
  1156. * @p_tx_vdev_id: get vdev id for Intra-BSS TX
  1157. *
  1158. * Return: true - intrabss allowed
  1159. false - not allow
  1160. */
  1161. static bool
  1162. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1163. struct dp_txrx_peer *ta_peer,
  1164. struct hal_rx_msdu_metadata *msdu_metadata,
  1165. struct dp_be_intrabss_params *params)
  1166. {
  1167. uint16_t da_peer_id;
  1168. struct dp_txrx_peer *da_peer;
  1169. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1170. if (!qdf_nbuf_is_intra_bss(nbuf))
  1171. return false;
  1172. da_peer_id = dp_rx_peer_metadata_peer_id_get_be(
  1173. params->dest_soc,
  1174. msdu_metadata->da_idx);
  1175. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc, da_peer_id,
  1176. &txrx_ref_handle, DP_MOD_ID_RX);
  1177. if (!da_peer)
  1178. return false;
  1179. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1180. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1181. return true;
  1182. }
  1183. #else
  1184. #ifdef WLAN_MLO_MULTI_CHIP
  1185. static bool
  1186. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1187. struct dp_txrx_peer *ta_peer,
  1188. struct hal_rx_msdu_metadata *msdu_metadata,
  1189. struct dp_be_intrabss_params *params)
  1190. {
  1191. uint16_t da_peer_id;
  1192. struct dp_txrx_peer *da_peer;
  1193. bool ret = false;
  1194. uint8_t dest_chip_id;
  1195. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1196. struct dp_vdev_be *be_vdev =
  1197. dp_get_be_vdev_from_dp_vdev(ta_peer->vdev);
  1198. struct dp_soc_be *be_soc =
  1199. dp_get_be_soc_from_dp_soc(params->dest_soc);
  1200. if (!(qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf)))
  1201. return false;
  1202. dest_chip_id = HAL_RX_DEST_CHIP_ID_GET(msdu_metadata);
  1203. qdf_assert_always(dest_chip_id <= (DP_MLO_MAX_DEST_CHIP_ID - 1));
  1204. da_peer_id = HAL_RX_PEER_ID_GET(msdu_metadata);
  1205. /* use dest chip id when TA is MLD peer and DA is legacy */
  1206. if (be_soc->mlo_enabled &&
  1207. ta_peer->mld_peer &&
  1208. !(da_peer_id & HAL_RX_DA_IDX_ML_PEER_MASK)) {
  1209. /* validate chip_id, get a ref, and re-assign soc */
  1210. params->dest_soc =
  1211. dp_mlo_get_soc_ref_by_chip_id(be_soc->ml_ctxt,
  1212. dest_chip_id);
  1213. if (!params->dest_soc)
  1214. return false;
  1215. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc,
  1216. da_peer_id,
  1217. &txrx_ref_handle,
  1218. DP_MOD_ID_RX);
  1219. if (!da_peer)
  1220. return false;
  1221. } else {
  1222. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc,
  1223. da_peer_id,
  1224. &txrx_ref_handle,
  1225. DP_MOD_ID_RX);
  1226. if (!da_peer)
  1227. return false;
  1228. params->dest_soc = da_peer->vdev->pdev->soc;
  1229. if (!params->dest_soc)
  1230. goto rel_da_peer;
  1231. }
  1232. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1233. /* If the source or destination peer in the isolation
  1234. * list then dont forward instead push to bridge stack.
  1235. */
  1236. if (dp_get_peer_isolation(ta_peer) ||
  1237. dp_get_peer_isolation(da_peer)) {
  1238. ret = false;
  1239. goto rel_da_peer;
  1240. }
  1241. if (da_peer->bss_peer || (da_peer == ta_peer)) {
  1242. ret = false;
  1243. goto rel_da_peer;
  1244. }
  1245. /* Same vdev, support Inra-BSS */
  1246. if (da_peer->vdev == ta_peer->vdev) {
  1247. ret = true;
  1248. goto rel_da_peer;
  1249. }
  1250. /* MLO specific Intra-BSS check */
  1251. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1252. /* use dest chip id for legacy dest peer */
  1253. if (!(da_peer_id & HAL_RX_DA_IDX_ML_PEER_MASK)) {
  1254. if (!(be_vdev->partner_vdev_list[dest_chip_id][0] ==
  1255. params->tx_vdev_id) &&
  1256. !(be_vdev->partner_vdev_list[dest_chip_id][1] ==
  1257. params->tx_vdev_id)) {
  1258. /*dp_soc_unref_delete(soc);*/
  1259. goto rel_da_peer;
  1260. }
  1261. }
  1262. ret = true;
  1263. }
  1264. rel_da_peer:
  1265. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1266. return ret;
  1267. }
  1268. #else
  1269. static bool
  1270. dp_rx_intrabss_ucast_check_be(qdf_nbuf_t nbuf,
  1271. struct dp_txrx_peer *ta_peer,
  1272. struct hal_rx_msdu_metadata *msdu_metadata,
  1273. struct dp_be_intrabss_params *params)
  1274. {
  1275. uint16_t da_peer_id;
  1276. struct dp_txrx_peer *da_peer;
  1277. bool ret = false;
  1278. dp_txrx_ref_handle txrx_ref_handle = NULL;
  1279. if (!qdf_nbuf_is_da_valid(nbuf) || qdf_nbuf_is_da_mcbc(nbuf))
  1280. return false;
  1281. da_peer_id = dp_rx_peer_metadata_peer_id_get_be(
  1282. params->dest_soc,
  1283. msdu_metadata->da_idx);
  1284. da_peer = dp_txrx_peer_get_ref_by_id(params->dest_soc, da_peer_id,
  1285. &txrx_ref_handle, DP_MOD_ID_RX);
  1286. if (!da_peer)
  1287. return false;
  1288. params->tx_vdev_id = da_peer->vdev->vdev_id;
  1289. /* If the source or destination peer in the isolation
  1290. * list then dont forward instead push to bridge stack.
  1291. */
  1292. if (dp_get_peer_isolation(ta_peer) ||
  1293. dp_get_peer_isolation(da_peer))
  1294. goto rel_da_peer;
  1295. if (da_peer->bss_peer || da_peer == ta_peer)
  1296. goto rel_da_peer;
  1297. /* Same vdev, support Inra-BSS */
  1298. if (da_peer->vdev == ta_peer->vdev) {
  1299. ret = true;
  1300. goto rel_da_peer;
  1301. }
  1302. /* MLO specific Intra-BSS check */
  1303. if (dp_rx_intrabss_fwd_mlo_allow(ta_peer, da_peer)) {
  1304. ret = true;
  1305. goto rel_da_peer;
  1306. }
  1307. rel_da_peer:
  1308. dp_txrx_peer_unref_delete(txrx_ref_handle, DP_MOD_ID_RX);
  1309. return ret;
  1310. }
  1311. #endif /* WLAN_MLO_MULTI_CHIP */
  1312. #endif /* INTRA_BSS_FWD_OFFLOAD */
  1313. /*
  1314. * dp_rx_intrabss_handle_nawds_be() - Forward mcbc intrabss pkts in nawds case
  1315. * @soc: core txrx main context
  1316. * @ta_txrx_peer: source txrx_peer entry
  1317. * @nbuf_copy: nbuf that has to be intrabss forwarded
  1318. * @tid_stats: tid_stats structure
  1319. *
  1320. * Return: true if it is forwarded else false
  1321. */
  1322. bool
  1323. dp_rx_intrabss_handle_nawds_be(struct dp_soc *soc,
  1324. struct dp_txrx_peer *ta_txrx_peer,
  1325. qdf_nbuf_t nbuf_copy,
  1326. struct cdp_tid_rx_stats *tid_stats)
  1327. {
  1328. if (qdf_unlikely(ta_txrx_peer->vdev->nawds_enabled)) {
  1329. struct cdp_tx_exception_metadata tx_exc_metadata = {0};
  1330. uint16_t len = QDF_NBUF_CB_RX_PKT_LEN(nbuf_copy);
  1331. tx_exc_metadata.peer_id = ta_txrx_peer->peer_id;
  1332. tx_exc_metadata.is_intrabss_fwd = 1;
  1333. tx_exc_metadata.tid = HTT_TX_EXT_TID_INVALID;
  1334. if (dp_tx_send_exception((struct cdp_soc_t *)soc,
  1335. ta_txrx_peer->vdev->vdev_id,
  1336. nbuf_copy,
  1337. &tx_exc_metadata)) {
  1338. DP_PEER_PER_PKT_STATS_INC_PKT(ta_txrx_peer,
  1339. rx.intra_bss.fail, 1,
  1340. len);
  1341. tid_stats->fail_cnt[INTRABSS_DROP]++;
  1342. qdf_nbuf_free(nbuf_copy);
  1343. } else {
  1344. DP_PEER_PER_PKT_STATS_INC_PKT(ta_txrx_peer,
  1345. rx.intra_bss.pkts, 1,
  1346. len);
  1347. tid_stats->intrabss_cnt++;
  1348. }
  1349. return true;
  1350. }
  1351. return false;
  1352. }
  1353. /*
  1354. * dp_rx_intrabss_fwd_be() - API for intrabss fwd. For EAPOL
  1355. * pkt with DA not equal to vdev mac addr, fwd is not allowed.
  1356. * @soc: core txrx main context
  1357. * @ta_peer: source peer entry
  1358. * @rx_tlv_hdr: start address of rx tlvs
  1359. * @nbuf: nbuf that has to be intrabss forwarded
  1360. * @msdu_metadata: msdu metadata
  1361. *
  1362. * Return: true if it is forwarded else false
  1363. */
  1364. bool dp_rx_intrabss_fwd_be(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  1365. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  1366. struct hal_rx_msdu_metadata msdu_metadata)
  1367. {
  1368. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1369. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1370. struct cdp_tid_rx_stats *tid_stats = &ta_peer->vdev->pdev->stats.
  1371. tid_stats.tid_rx_stats[ring_id][tid];
  1372. bool ret = false;
  1373. struct dp_be_intrabss_params params;
  1374. /* if it is a broadcast pkt (eg: ARP) and it is not its own
  1375. * source, then clone the pkt and send the cloned pkt for
  1376. * intra BSS forwarding and original pkt up the network stack
  1377. * Note: how do we handle multicast pkts. do we forward
  1378. * all multicast pkts as is or let a higher layer module
  1379. * like igmpsnoop decide whether to forward or not with
  1380. * Mcast enhancement.
  1381. */
  1382. if (qdf_nbuf_is_da_mcbc(nbuf) && !ta_peer->bss_peer) {
  1383. return dp_rx_intrabss_mcbc_fwd(soc, ta_peer, rx_tlv_hdr,
  1384. nbuf, tid_stats);
  1385. }
  1386. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  1387. nbuf))
  1388. return true;
  1389. params.dest_soc = soc;
  1390. if (dp_rx_intrabss_ucast_check_be(nbuf, ta_peer,
  1391. &msdu_metadata, &params)) {
  1392. ret = dp_rx_intrabss_ucast_fwd(params.dest_soc, ta_peer,
  1393. params.tx_vdev_id,
  1394. rx_tlv_hdr, nbuf, tid_stats);
  1395. }
  1396. return ret;
  1397. }
  1398. #endif