Amine Najahi d594991e69 disp: msm: dsi: force VRR on RFI default value setting ...

Currently on video mode panel, when the RFI bit clock
rate is set back to the default rate, the driver is not
detecting that a VRR operation is necessary due to
unchanged porches value.

This change is forcing a VRR update on video mode panel
whenever the RFI bit clock rate is changed.

Change-Id: I16520b6ca1909f878bff1bb97472b15fe2a3d13b
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>

2021-04-20 17:39:48 -04:00

..

dsi_catalog.c

disp: msm: dsi: add support to send commands to each sublink

2021-03-24 23:15:25 -07:00

dsi_catalog.h

disp: msm: dsi: add support to send commands to each sublink

2021-03-24 23:15:25 -07:00

dsi_clk_manager.c

disp: msm: dsi: fix DSI PLL configuring sequence

2021-03-31 15:20:15 -07:00

dsi_clk.h

disp: msm: dsi: rework DSI PLL to be configured within PHY

2021-01-12 23:49:11 -08:00

dsi_ctrl_hw_1_4.c

disp: msm: dsi: adding prefix for logs

2019-07-22 17:43:35 -07:00

dsi_ctrl_hw_2_0.c

disp: msm: dsi: adding prefix for logs

2019-07-22 17:43:35 -07:00

dsi_ctrl_hw_2_2.c

disp: msm: dsi: add support to send commands to each sublink

2021-03-24 23:15:25 -07:00

dsi_ctrl_hw_cmn.c

Merge "disp: msm: dsi: update DSI PHY configuration to support splitlink"

2021-03-25 08:49:41 -07:00

dsi_ctrl_hw.h

disp: msm: dsi: add support to send commands to each sublink

2021-03-24 23:15:25 -07:00

dsi_ctrl_reg.h

disp: msm: dsi: update PHY configuration to support cphy

2020-05-14 21:00:07 -07:00

dsi_ctrl.c

Merge "disp: msm: sde: modify SDE_DBG_DUMP to use blk_mask instead of blk_name"

2021-03-25 14:22:21 -07:00

dsi_ctrl.h

disp: msm: dsi: add support to send commands to each sublink

2021-03-24 23:15:25 -07:00

dsi_defs.h

disp: msm: dsi: add indexing for panel timing nodes

2021-03-26 16:04:48 -07:00

dsi_display_test.c

disp: msm: dsi: adding prefix for logs

2019-07-22 17:43:35 -07:00

dsi_display_test.h

Display drivers kernel project initial snapshot

2019-04-14 22:20:59 -07:00

dsi_display.c

disp: msm: dsi: force VRR on RFI default value setting

2021-04-20 17:39:48 -04:00

dsi_display.h

disp: msm: restrict AVR_STEP based on panel requirement

2021-04-04 18:45:40 -04:00

dsi_drm.c

disp: msm: restrict AVR_STEP based on panel requirement

2021-04-04 18:45:40 -04:00

dsi_drm.h

disp: msm: sde: add new interface for RFI feature

2021-03-24 06:32:17 -07:00

dsi_hw.h

disp: msm: dsi: add support for dsi dynamic clock switch

2019-06-05 16:06:27 +08:00

dsi_panel.c

disp: msm: restrict AVR_STEP based on panel requirement

2021-04-04 18:45:40 -04:00

dsi_panel.h

disp: msm: restrict AVR_STEP based on panel requirement

2021-04-04 18:45:40 -04:00

dsi_parser.c

disp: msm: dsi: expand dsi_parser hooks

2021-03-24 12:59:58 -07:00

dsi_parser.h

disp: msm: dsi: expand dsi_parser hooks

2021-03-24 12:59:58 -07:00

dsi_phy_hw_v2_0.c

disp: msm: dsi: Add support for dynamically switch dsi clock

2020-03-17 19:30:58 -07:00

dsi_phy_hw_v3_0.c

disp: msm: dsi: adding prefix for logs

2019-07-22 17:43:35 -07:00

dsi_phy_hw_v4_0.c

disp: msm: dsi: update DSI PHY configuration to support splitlink

2021-03-24 23:15:52 -07:00

dsi_phy_hw.h

disp: msm: dsi: update DSI PHY configuration to support splitlink

2021-03-24 23:15:52 -07:00

dsi_phy_timing_calc.c

disp: msm: dsi: add new compatible strings for DSI PHY and controller

2021-01-19 16:12:56 -08:00

dsi_phy_timing_calc.h

disp: msm: dsi: Add support for C-PHY dynamic clock switch

2020-08-25 19:13:56 -04:00

dsi_phy_timing_v2_0.c

disp: msm: dsi: Add support for C-PHY dynamic clock switch

2020-08-25 19:13:56 -04:00

dsi_phy_timing_v3_0.c

disp: msm: dsi: Add support for C-PHY dynamic clock switch

2020-08-25 19:13:56 -04:00

dsi_phy_timing_v4_0.c

disp: msm: dsi: Add support for C-PHY dynamic clock switch

2020-08-25 19:13:56 -04:00

dsi_phy.c

disp: msm: sde: modify SDE_DBG_DUMP to use blk_mask instead of blk_name

2021-03-19 16:50:45 -07:00

dsi_phy.h

disp: msm: dsi: parse PLL dfps data only if dynamic clock is enabled

2021-03-09 11:42:05 -08:00

dsi_pll_5nm.c

disp: msm: dsi: configure pll slave appropriately

2021-04-02 18:14:00 -07:00

dsi_pll_5nm.h

disp: msm: dsi: rework DSI PLL to be configured within PHY

2021-01-12 23:49:11 -08:00

dsi_pll.c

disp: msm: dsi: parse PLL dfps data only if dynamic clock is enabled

2021-03-09 11:42:05 -08:00

dsi_pll.h

disp: msm: dsi: fix DSI PLL configuring sequence

2021-03-31 15:20:15 -07:00

dsi_pwr.c

disp: msm: disable regulator load after the regulator was disabled

2020-09-22 00:45:36 -07:00

dsi_pwr.h

disp: msm: config AB/IBB power when AOD mode enter/exit

2019-09-24 01:26:31 -07:00