dp_tx.h 28 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #ifndef __DP_TX_H
  20. #define __DP_TX_H
  21. #include <qdf_types.h>
  22. #include <qdf_nbuf.h>
  23. #include "dp_types.h"
  24. #if defined(MESH_MODE_SUPPORT) || defined(FEATURE_PERPKT_INFO)
  25. #include "if_meta_hdr.h"
  26. #endif
  27. #include "dp_internal.h"
  28. #include "hal_tx.h"
  29. #include <qdf_tracepoint.h>
  30. #ifdef CONFIG_SAWF
  31. #include "dp_sawf.h"
  32. #endif
  33. #define DP_INVALID_VDEV_ID 0xFF
  34. #define DP_TX_MAX_NUM_FRAGS 6
  35. /*
  36. * DP_TX_DESC_FLAG_FRAG flags should always be defined to 0x1
  37. * please do not change this flag's definition
  38. */
  39. #define DP_TX_DESC_FLAG_FRAG 0x1
  40. #define DP_TX_DESC_FLAG_TO_FW 0x2
  41. #define DP_TX_DESC_FLAG_SIMPLE 0x4
  42. #define DP_TX_DESC_FLAG_RAW 0x8
  43. #define DP_TX_DESC_FLAG_MESH 0x10
  44. #define DP_TX_DESC_FLAG_QUEUED_TX 0x20
  45. #define DP_TX_DESC_FLAG_COMPLETED_TX 0x40
  46. #define DP_TX_DESC_FLAG_ME 0x80
  47. #define DP_TX_DESC_FLAG_TDLS_FRAME 0x100
  48. #define DP_TX_DESC_FLAG_ALLOCATED 0x200
  49. #define DP_TX_DESC_FLAG_MESH_MODE 0x400
  50. #define DP_TX_DESC_FLAG_UNMAP_DONE 0x800
  51. #define DP_TX_DESC_FLAG_TX_COMP_ERR 0x1000
  52. #define DP_TX_DESC_FLAG_FLUSH 0x2000
  53. #define DP_TX_EXT_DESC_FLAG_METADATA_VALID 0x1
  54. #define DP_TX_FREE_SINGLE_BUF(soc, buf) \
  55. do { \
  56. qdf_nbuf_unmap(soc->osdev, buf, QDF_DMA_TO_DEVICE); \
  57. qdf_nbuf_free(buf); \
  58. } while (0)
  59. #define OCB_HEADER_VERSION 1
  60. #ifdef TX_PER_PDEV_DESC_POOL
  61. #ifdef QCA_LL_TX_FLOW_CONTROL_V2
  62. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  63. #else /* QCA_LL_TX_FLOW_CONTROL_V2 */
  64. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->pdev->pdev_id)
  65. #endif /* QCA_LL_TX_FLOW_CONTROL_V2 */
  66. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  67. #else
  68. #ifdef TX_PER_VDEV_DESC_POOL
  69. #define DP_TX_GET_DESC_POOL_ID(vdev) (vdev->vdev_id)
  70. #define DP_TX_GET_RING_ID(vdev) (vdev->pdev->pdev_id)
  71. #endif /* TX_PER_VDEV_DESC_POOL */
  72. #endif /* TX_PER_PDEV_DESC_POOL */
  73. #define DP_TX_QUEUE_MASK 0x3
  74. #define MAX_CDP_SEC_TYPE 12
  75. /* number of dwords for htt_tx_msdu_desc_ext2_t */
  76. #define DP_TX_MSDU_INFO_META_DATA_DWORDS 7
  77. #define dp_tx_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_TX, params)
  78. #define dp_tx_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_TX, params)
  79. #define dp_tx_err_rl(params...) QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP_TX, params)
  80. #define dp_tx_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_TX, params)
  81. #define dp_tx_info(params...) \
  82. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX, ## params)
  83. #define dp_tx_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_TX, params)
  84. #define dp_tx_comp_alert(params...) QDF_TRACE_FATAL(QDF_MODULE_ID_DP_TX_COMP, params)
  85. #define dp_tx_comp_err(params...) QDF_TRACE_ERROR(QDF_MODULE_ID_DP_TX_COMP, params)
  86. #define dp_tx_comp_warn(params...) QDF_TRACE_WARN(QDF_MODULE_ID_DP_TX_COMP, params)
  87. #define dp_tx_comp_info(params...) \
  88. __QDF_TRACE_FL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX_COMP, ## params)
  89. #define dp_tx_comp_info_rl(params...) \
  90. __QDF_TRACE_RL(QDF_TRACE_LEVEL_INFO_HIGH, QDF_MODULE_ID_DP_TX_COMP, ## params)
  91. #define dp_tx_comp_debug(params...) QDF_TRACE_DEBUG(QDF_MODULE_ID_DP_TX_COMP, params)
  92. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  93. /**
  94. * struct dp_tx_frag_info_s
  95. * @vaddr: hlos vritual address for buffer
  96. * @paddr_lo: physical address lower 32bits
  97. * @paddr_hi: physical address higher bits
  98. * @len: length of the buffer
  99. */
  100. struct dp_tx_frag_info_s {
  101. uint8_t *vaddr;
  102. uint32_t paddr_lo;
  103. uint16_t paddr_hi;
  104. uint16_t len;
  105. };
  106. /**
  107. * struct dp_tx_seg_info_s - Segmentation Descriptor
  108. * @nbuf: NBUF pointer if segment corresponds to separate nbuf
  109. * @frag_cnt: Fragment count in this segment
  110. * @total_len: Total length of segment
  111. * @frags: per-Fragment information
  112. * @next: pointer to next MSDU segment
  113. */
  114. struct dp_tx_seg_info_s {
  115. qdf_nbuf_t nbuf;
  116. uint16_t frag_cnt;
  117. uint16_t total_len;
  118. struct dp_tx_frag_info_s frags[DP_TX_MAX_NUM_FRAGS];
  119. struct dp_tx_seg_info_s *next;
  120. };
  121. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  122. /**
  123. * struct dp_tx_sg_info_s - Scatter Gather Descriptor
  124. * @num_segs: Number of segments (TSO/ME) in the frame
  125. * @total_len: Total length of the frame
  126. * @curr_seg: Points to current segment descriptor to be processed. Chain of
  127. * descriptors for SG frames/multicast-unicast converted packets.
  128. *
  129. * Used for SG (802.3 or Raw) frames and Multicast-Unicast converted frames to
  130. * carry fragmentation information
  131. * Raw Frames will be handed over to driver as an SKB chain with MPDU boundaries
  132. * indicated through flags in SKB CB (first_msdu and last_msdu). This will be
  133. * converted into set of skb sg (nr_frags) structures.
  134. */
  135. struct dp_tx_sg_info_s {
  136. uint32_t num_segs;
  137. uint32_t total_len;
  138. struct dp_tx_seg_info_s *curr_seg;
  139. };
  140. /**
  141. * struct dp_tx_queue - Tx queue
  142. * @desc_pool_id: Descriptor Pool to be used for the tx queue
  143. * @ring_id: TCL descriptor ring ID corresponding to the tx queue
  144. *
  145. * Tx queue contains information of the software (Descriptor pool)
  146. * and hardware resources (TCL ring id) to be used for a particular
  147. * transmit queue (obtained from skb_queue_mapping in case of linux)
  148. */
  149. struct dp_tx_queue {
  150. uint8_t desc_pool_id;
  151. uint8_t ring_id;
  152. };
  153. /**
  154. * struct dp_tx_msdu_info_s - MSDU Descriptor
  155. * @frm_type: Frame type - Regular/TSO/SG/Multicast enhancement
  156. * @tx_queue: Tx queue on which this MSDU should be transmitted
  157. * @num_seg: Number of segments (TSO)
  158. * @tid: TID (override) that is sent from HLOS
  159. * @u.tso_info: TSO information for TSO frame types
  160. * (chain of the TSO segments, number of segments)
  161. * @u.sg_info: Scatter Gather information for non-TSO SG frames
  162. * @meta_data: Mesh meta header information
  163. * @exception_fw: Duplicate frame to be sent to firmware
  164. * @ppdu_cookie: 16-bit ppdu_cookie that has to be replayed back in completions
  165. * @ix_tx_sniffer: Indicates if the packet has to be sniffed
  166. * @gsn: global sequence for reinjected mcast packets
  167. * @vdev_id : vdev_id for reinjected mcast packets
  168. *
  169. * This structure holds the complete MSDU information needed to program the
  170. * Hardware TCL and MSDU extension descriptors for different frame types
  171. *
  172. */
  173. struct dp_tx_msdu_info_s {
  174. enum dp_tx_frm_type frm_type;
  175. struct dp_tx_queue tx_queue;
  176. uint32_t num_seg;
  177. uint8_t tid;
  178. uint8_t exception_fw;
  179. uint8_t is_tx_sniffer;
  180. union {
  181. struct qdf_tso_info_t tso_info;
  182. struct dp_tx_sg_info_s sg_info;
  183. } u;
  184. uint32_t meta_data[DP_TX_MSDU_INFO_META_DATA_DWORDS];
  185. uint16_t ppdu_cookie;
  186. #if defined(WLAN_FEATURE_11BE_MLO) && defined(WLAN_MLO_MULTI_CHIP)
  187. #ifdef WLAN_MCAST_MLO
  188. uint16_t gsn;
  189. uint8_t vdev_id;
  190. #endif
  191. #endif
  192. };
  193. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  194. /**
  195. * dp_tx_deinit_pair_by_index() - Deinit TX rings based on index
  196. * @soc: core txrx context
  197. * @index: index of ring to deinit
  198. *
  199. * Deinit 1 TCL and 1 WBM2SW release ring on as needed basis using
  200. * index of the respective TCL/WBM2SW release in soc structure.
  201. * For example, if the index is 2 then &soc->tcl_data_ring[2]
  202. * and &soc->tx_comp_ring[2] will be deinitialized.
  203. *
  204. * Return: none
  205. */
  206. void dp_tx_deinit_pair_by_index(struct dp_soc *soc, int index);
  207. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  208. void dp_tx_tso_cmn_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool);
  209. void dp_tx_tso_cmn_desc_pool_free(struct dp_soc *soc, uint8_t num_pool);
  210. QDF_STATUS dp_tx_tso_cmn_desc_pool_alloc(struct dp_soc *soc,
  211. uint8_t num_pool,
  212. uint16_t num_desc);
  213. QDF_STATUS dp_tx_tso_cmn_desc_pool_init(struct dp_soc *soc,
  214. uint8_t num_pool,
  215. uint16_t num_desc);
  216. void dp_tx_tso_cmn_desc_pool_deinit(struct dp_soc *soc, uint8_t num_pool);
  217. void dp_tx_tso_cmn_desc_pool_free(struct dp_soc *soc, uint8_t num_pool);
  218. QDF_STATUS dp_tx_tso_cmn_desc_pool_alloc(struct dp_soc *soc,
  219. uint8_t num_pool,
  220. uint16_t num_desc);
  221. QDF_STATUS dp_tx_tso_cmn_desc_pool_init(struct dp_soc *soc,
  222. uint8_t num_pool,
  223. uint16_t num_desc);
  224. void dp_tx_comp_free_buf(struct dp_soc *soc, struct dp_tx_desc_s *desc);
  225. void dp_tx_desc_release(struct dp_tx_desc_s *tx_desc, uint8_t desc_pool_id);
  226. void dp_tx_compute_delay(struct dp_vdev *vdev, struct dp_tx_desc_s *tx_desc,
  227. uint8_t tid, uint8_t ring_id);
  228. void dp_tx_comp_process_tx_status(struct dp_soc *soc,
  229. struct dp_tx_desc_s *tx_desc,
  230. struct hal_tx_completion_status *ts,
  231. struct dp_txrx_peer *txrx_peer,
  232. uint8_t ring_id);
  233. void dp_tx_comp_process_desc(struct dp_soc *soc,
  234. struct dp_tx_desc_s *desc,
  235. struct hal_tx_completion_status *ts,
  236. struct dp_txrx_peer *txrx_peer);
  237. void dp_tx_reinject_handler(struct dp_soc *soc,
  238. struct dp_vdev *vdev,
  239. struct dp_tx_desc_s *tx_desc,
  240. uint8_t *status,
  241. uint8_t reinject_reason);
  242. void dp_tx_inspect_handler(struct dp_soc *soc,
  243. struct dp_vdev *vdev,
  244. struct dp_tx_desc_s *tx_desc,
  245. uint8_t *status);
  246. void dp_tx_update_peer_basic_stats(struct dp_txrx_peer *txrx_peer,
  247. uint32_t length, uint8_t tx_status,
  248. bool update);
  249. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  250. /**
  251. * dp_tso_attach() - TSO Attach handler
  252. * @txrx_soc: Opaque Dp handle
  253. *
  254. * Reserve TSO descriptor buffers
  255. *
  256. * Return: QDF_STATUS_E_FAILURE on failure or
  257. * QDF_STATUS_SUCCESS on success
  258. */
  259. QDF_STATUS dp_tso_soc_attach(struct cdp_soc_t *txrx_soc);
  260. /**
  261. * dp_tso_detach() - TSO Detach handler
  262. * @txrx_soc: Opaque Dp handle
  263. *
  264. * Deallocate TSO descriptor buffers
  265. *
  266. * Return: QDF_STATUS_E_FAILURE on failure or
  267. * QDF_STATUS_SUCCESS on success
  268. */
  269. QDF_STATUS dp_tso_soc_detach(struct cdp_soc_t *txrx_soc);
  270. qdf_nbuf_t dp_tx_send(struct cdp_soc_t *soc, uint8_t vdev_id, qdf_nbuf_t nbuf);
  271. qdf_nbuf_t dp_tx_send_vdev_id_check(struct cdp_soc_t *soc, uint8_t vdev_id,
  272. qdf_nbuf_t nbuf);
  273. qdf_nbuf_t dp_tx_send_exception(struct cdp_soc_t *soc, uint8_t vdev_id,
  274. qdf_nbuf_t nbuf,
  275. struct cdp_tx_exception_metadata *tx_exc);
  276. qdf_nbuf_t dp_tx_send_exception_vdev_id_check(struct cdp_soc_t *soc,
  277. uint8_t vdev_id,
  278. qdf_nbuf_t nbuf,
  279. struct cdp_tx_exception_metadata *tx_exc);
  280. qdf_nbuf_t dp_tx_send_mesh(struct cdp_soc_t *soc, uint8_t vdev_id,
  281. qdf_nbuf_t nbuf);
  282. qdf_nbuf_t
  283. dp_tx_send_msdu_single(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  284. struct dp_tx_msdu_info_s *msdu_info, uint16_t peer_id,
  285. struct cdp_tx_exception_metadata *tx_exc_metadata);
  286. #if QDF_LOCK_STATS
  287. noinline qdf_nbuf_t
  288. dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  289. struct dp_tx_msdu_info_s *msdu_info);
  290. #else
  291. qdf_nbuf_t dp_tx_send_msdu_multiple(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  292. struct dp_tx_msdu_info_s *msdu_info);
  293. #endif
  294. #ifdef FEATURE_WLAN_TDLS
  295. /**
  296. * dp_tx_non_std() - Allow the control-path SW to send data frames
  297. * @soc_hdl: Datapath soc handle
  298. * @vdev_id: id of vdev
  299. * @tx_spec: what non-standard handling to apply to the tx data frames
  300. * @msdu_list: NULL-terminated list of tx MSDUs
  301. *
  302. * Return: NULL on success,
  303. * nbuf when it fails to send
  304. */
  305. qdf_nbuf_t dp_tx_non_std(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  306. enum ol_tx_spec tx_spec, qdf_nbuf_t msdu_list);
  307. #endif
  308. int dp_tx_frame_is_drop(struct dp_vdev *vdev, uint8_t *srcmac, uint8_t *dstmac);
  309. /**
  310. * dp_tx_comp_handler() - Tx completion handler
  311. * @int_ctx: pointer to DP interrupt context
  312. * @soc: core txrx main context
  313. * @hal_srng: Opaque HAL SRNG pointer
  314. * @ring_id: completion ring id
  315. * @quota: No. of packets/descriptors that can be serviced in one loop
  316. *
  317. * This function will collect hardware release ring element contents and
  318. * handle descriptor contents. Based on contents, free packet or handle error
  319. * conditions
  320. *
  321. * Return: Number of TX completions processed
  322. */
  323. uint32_t dp_tx_comp_handler(struct dp_intr *int_ctx, struct dp_soc *soc,
  324. hal_ring_handle_t hal_srng, uint8_t ring_id,
  325. uint32_t quota);
  326. QDF_STATUS
  327. dp_tx_prepare_send_me(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  328. QDF_STATUS
  329. dp_tx_prepare_send_igmp_me(struct dp_vdev *vdev, qdf_nbuf_t nbuf);
  330. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  331. #if defined(QCA_HOST_MODE_WIFI_DISABLED) || !defined(ATH_SUPPORT_IQUE)
  332. static inline void dp_tx_me_exit(struct dp_pdev *pdev)
  333. {
  334. return;
  335. }
  336. #endif
  337. /**
  338. * dp_tx_pdev_init() - dp tx pdev init
  339. * @pdev: physical device instance
  340. *
  341. * Return: QDF_STATUS_SUCCESS: success
  342. * QDF_STATUS_E_RESOURCES: Error return
  343. */
  344. static inline QDF_STATUS dp_tx_pdev_init(struct dp_pdev *pdev)
  345. {
  346. struct dp_soc *soc = pdev->soc;
  347. /* Initialize Flow control counters */
  348. qdf_atomic_init(&pdev->num_tx_outstanding);
  349. pdev->tx_descs_max = 0;
  350. if (wlan_cfg_per_pdev_tx_ring(soc->wlan_cfg_ctx)) {
  351. /* Initialize descriptors in TCL Ring */
  352. hal_tx_init_data_ring(soc->hal_soc,
  353. soc->tcl_data_ring[pdev->pdev_id].hal_srng);
  354. }
  355. return QDF_STATUS_SUCCESS;
  356. }
  357. /**
  358. * dp_tx_prefetch_hw_sw_nbuf_desc() - function to prefetch HW and SW desc
  359. * @soc: Handle to HAL Soc structure
  360. * @hal_soc: HAL SOC handle
  361. * @num_avail_for_reap: descriptors available for reap
  362. * @hal_ring_hdl: ring pointer
  363. * @last_prefetched_hw_desc: pointer to the last prefetched HW descriptor
  364. * @last_prefetched_sw_desc: pointer to last prefetch SW desc
  365. *
  366. * Return: None
  367. */
  368. #ifdef QCA_DP_TX_HW_SW_NBUF_DESC_PREFETCH
  369. static inline
  370. void dp_tx_prefetch_hw_sw_nbuf_desc(struct dp_soc *soc,
  371. hal_soc_handle_t hal_soc,
  372. uint32_t num_avail_for_reap,
  373. hal_ring_handle_t hal_ring_hdl,
  374. void **last_prefetched_hw_desc,
  375. struct dp_tx_desc_s
  376. **last_prefetched_sw_desc)
  377. {
  378. if (*last_prefetched_sw_desc) {
  379. qdf_prefetch((uint8_t *)(*last_prefetched_sw_desc)->nbuf);
  380. qdf_prefetch((uint8_t *)(*last_prefetched_sw_desc)->nbuf + 64);
  381. }
  382. if (num_avail_for_reap && *last_prefetched_hw_desc) {
  383. dp_tx_comp_get_prefetched_params_from_hal_desc(
  384. soc,
  385. *last_prefetched_hw_desc,
  386. last_prefetched_sw_desc);
  387. *last_prefetched_hw_desc =
  388. hal_srng_dst_prefetch_next_cached_desc(
  389. hal_soc,
  390. hal_ring_hdl,
  391. (uint8_t *)*last_prefetched_hw_desc);
  392. }
  393. }
  394. #else
  395. static inline
  396. void dp_tx_prefetch_hw_sw_nbuf_desc(struct dp_soc *soc,
  397. hal_soc_handle_t hal_soc,
  398. uint32_t num_avail_for_reap,
  399. hal_ring_handle_t hal_ring_hdl,
  400. void **last_prefetched_hw_desc,
  401. struct dp_tx_desc_s
  402. **last_prefetched_sw_desc)
  403. {
  404. }
  405. #endif
  406. #ifndef FEATURE_WDS
  407. static inline void dp_tx_mec_handler(struct dp_vdev *vdev, uint8_t *status)
  408. {
  409. return;
  410. }
  411. #endif
  412. #ifndef QCA_MULTIPASS_SUPPORT
  413. static inline
  414. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  415. qdf_nbuf_t nbuf,
  416. struct dp_tx_msdu_info_s *msdu_info)
  417. {
  418. return true;
  419. }
  420. static inline
  421. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev)
  422. {
  423. }
  424. #else
  425. bool dp_tx_multipass_process(struct dp_soc *soc, struct dp_vdev *vdev,
  426. qdf_nbuf_t nbuf,
  427. struct dp_tx_msdu_info_s *msdu_info);
  428. void dp_tx_vdev_multipass_deinit(struct dp_vdev *vdev);
  429. #endif
  430. /**
  431. * dp_tx_hw_to_qdf()- convert hw status to qdf status
  432. * @status: hw status
  433. *
  434. * Return: qdf tx rx status
  435. */
  436. static inline enum qdf_dp_tx_rx_status dp_tx_hw_to_qdf(uint16_t status)
  437. {
  438. switch (status) {
  439. case HAL_TX_TQM_RR_FRAME_ACKED:
  440. return QDF_TX_RX_STATUS_OK;
  441. case HAL_TX_TQM_RR_REM_CMD_TX:
  442. return QDF_TX_RX_STATUS_NO_ACK;
  443. case HAL_TX_TQM_RR_REM_CMD_REM:
  444. case HAL_TX_TQM_RR_REM_CMD_NOTX:
  445. case HAL_TX_TQM_RR_REM_CMD_AGED:
  446. return QDF_TX_RX_STATUS_FW_DISCARD;
  447. default:
  448. return QDF_TX_RX_STATUS_DEFAULT;
  449. }
  450. }
  451. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  452. /**
  453. * dp_tx_get_queue() - Returns Tx queue IDs to be used for this Tx frame
  454. * @vdev: DP Virtual device handle
  455. * @nbuf: Buffer pointer
  456. * @queue: queue ids container for nbuf
  457. *
  458. * TX packet queue has 2 instances, software descriptors id and dma ring id
  459. * Based on tx feature and hardware configuration queue id combination could be
  460. * different.
  461. * For example -
  462. * With XPS enabled,all TX descriptor pools and dma ring are assigned per cpu id
  463. * With no XPS,lock based resource protection, Descriptor pool ids are different
  464. * for each vdev, dma ring id will be same as single pdev id
  465. *
  466. * Return: None
  467. */
  468. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  469. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  470. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  471. {
  472. uint16_t queue_offset = qdf_nbuf_get_queue_mapping(nbuf) &
  473. DP_TX_QUEUE_MASK;
  474. queue->desc_pool_id = queue_offset;
  475. queue->ring_id = qdf_get_cpu();
  476. dp_tx_debug("pool_id:%d ring_id: %d",
  477. queue->desc_pool_id, queue->ring_id);
  478. }
  479. /*
  480. * dp_tx_get_hal_ring_hdl()- Get the hal_tx_ring_hdl for data transmission
  481. * @dp_soc - DP soc structure pointer
  482. * @ring_id - Transmit Queue/ring_id to be used when XPS is enabled
  483. *
  484. * Return - HAL ring handle
  485. */
  486. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  487. uint8_t ring_id)
  488. {
  489. if (ring_id == soc->num_tcl_data_rings)
  490. return soc->tcl_cmd_credit_ring.hal_srng;
  491. return soc->tcl_data_ring[ring_id].hal_srng;
  492. }
  493. #else /* QCA_OL_TX_MULTIQ_SUPPORT */
  494. #ifdef TX_MULTI_TCL
  495. #ifdef IPA_OFFLOAD
  496. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  497. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  498. {
  499. /* get flow id */
  500. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  501. if (vdev->pdev->soc->wlan_cfg_ctx->ipa_enabled)
  502. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  503. else
  504. queue->ring_id = (qdf_nbuf_get_queue_mapping(nbuf) %
  505. vdev->pdev->soc->num_tcl_data_rings);
  506. }
  507. #else
  508. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  509. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  510. {
  511. /* get flow id */
  512. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  513. queue->ring_id = (qdf_nbuf_get_queue_mapping(nbuf) %
  514. vdev->pdev->soc->num_tcl_data_rings);
  515. }
  516. #endif
  517. #else
  518. static inline void dp_tx_get_queue(struct dp_vdev *vdev,
  519. qdf_nbuf_t nbuf, struct dp_tx_queue *queue)
  520. {
  521. /* get flow id */
  522. queue->desc_pool_id = DP_TX_GET_DESC_POOL_ID(vdev);
  523. queue->ring_id = DP_TX_GET_RING_ID(vdev);
  524. }
  525. #endif
  526. static inline hal_ring_handle_t dp_tx_get_hal_ring_hdl(struct dp_soc *soc,
  527. uint8_t ring_id)
  528. {
  529. return soc->tcl_data_ring[ring_id].hal_srng;
  530. }
  531. #endif
  532. #ifdef QCA_OL_TX_LOCK_LESS_ACCESS
  533. /*
  534. * dp_tx_hal_ring_access_start()- hal_tx_ring access for data transmission
  535. * @dp_soc - DP soc structure pointer
  536. * @hal_ring_hdl - HAL ring handle
  537. *
  538. * Return - None
  539. */
  540. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  541. hal_ring_handle_t hal_ring_hdl)
  542. {
  543. return hal_srng_access_start_unlocked(soc->hal_soc, hal_ring_hdl);
  544. }
  545. /*
  546. * dp_tx_hal_ring_access_end()- hal_tx_ring access for data transmission
  547. * @dp_soc - DP soc structure pointer
  548. * @hal_ring_hdl - HAL ring handle
  549. *
  550. * Return - None
  551. */
  552. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  553. hal_ring_handle_t hal_ring_hdl)
  554. {
  555. hal_srng_access_end_unlocked(soc->hal_soc, hal_ring_hdl);
  556. }
  557. /*
  558. * dp_tx_hal_ring_access_reap()- hal_tx_ring access for data transmission
  559. * @dp_soc - DP soc structure pointer
  560. * @hal_ring_hdl - HAL ring handle
  561. *
  562. * Return - None
  563. */
  564. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  565. hal_ring_handle_t
  566. hal_ring_hdl)
  567. {
  568. }
  569. #else
  570. static inline int dp_tx_hal_ring_access_start(struct dp_soc *soc,
  571. hal_ring_handle_t hal_ring_hdl)
  572. {
  573. return hal_srng_access_start(soc->hal_soc, hal_ring_hdl);
  574. }
  575. static inline void dp_tx_hal_ring_access_end(struct dp_soc *soc,
  576. hal_ring_handle_t hal_ring_hdl)
  577. {
  578. hal_srng_access_end(soc->hal_soc, hal_ring_hdl);
  579. }
  580. static inline void dp_tx_hal_ring_access_end_reap(struct dp_soc *soc,
  581. hal_ring_handle_t
  582. hal_ring_hdl)
  583. {
  584. hal_srng_access_end_reap(soc->hal_soc, hal_ring_hdl);
  585. }
  586. #endif
  587. #ifdef ATH_TX_PRI_OVERRIDE
  588. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf) \
  589. ((_msdu_info)->tid = qdf_nbuf_get_priority(_nbuf))
  590. #else
  591. #define DP_TX_TID_OVERRIDE(_msdu_info, _nbuf)
  592. #endif
  593. /* TODO TX_FEATURE_NOT_YET */
  594. static inline void dp_tx_comp_process_exception(struct dp_tx_desc_s *tx_desc)
  595. {
  596. return;
  597. }
  598. /* TODO TX_FEATURE_NOT_YET */
  599. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  600. bool force_free);
  601. QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev);
  602. QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev);
  603. void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev);
  604. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc);
  605. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc);
  606. void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc);
  607. void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc);
  608. void
  609. dp_handle_wbm_internal_error(struct dp_soc *soc, void *hal_desc,
  610. uint32_t buf_type);
  611. #else /* QCA_HOST_MODE_WIFI_DISABLED */
  612. static inline
  613. QDF_STATUS dp_soc_tx_desc_sw_pools_alloc(struct dp_soc *soc)
  614. {
  615. return QDF_STATUS_SUCCESS;
  616. }
  617. static inline
  618. QDF_STATUS dp_soc_tx_desc_sw_pools_init(struct dp_soc *soc)
  619. {
  620. return QDF_STATUS_SUCCESS;
  621. }
  622. static inline void dp_soc_tx_desc_sw_pools_free(struct dp_soc *soc)
  623. {
  624. }
  625. static inline void dp_soc_tx_desc_sw_pools_deinit(struct dp_soc *soc)
  626. {
  627. }
  628. static inline
  629. void dp_tx_desc_flush(struct dp_pdev *pdev, struct dp_vdev *vdev,
  630. bool force_free)
  631. {
  632. }
  633. static inline QDF_STATUS dp_tx_vdev_attach(struct dp_vdev *vdev)
  634. {
  635. return QDF_STATUS_SUCCESS;
  636. }
  637. static inline QDF_STATUS dp_tx_vdev_detach(struct dp_vdev *vdev)
  638. {
  639. return QDF_STATUS_SUCCESS;
  640. }
  641. static inline void dp_tx_vdev_update_search_flags(struct dp_vdev *vdev)
  642. {
  643. }
  644. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  645. #ifdef FEATURE_PERPKT_INFO
  646. QDF_STATUS
  647. dp_get_completion_indication_for_stack(struct dp_soc *soc,
  648. struct dp_pdev *pdev,
  649. struct dp_txrx_peer *peer,
  650. struct hal_tx_completion_status *ts,
  651. qdf_nbuf_t netbuf,
  652. uint64_t time_latency);
  653. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  654. uint16_t peer_id, uint32_t ppdu_id,
  655. qdf_nbuf_t netbuf);
  656. #else
  657. static inline
  658. QDF_STATUS dp_get_completion_indication_for_stack(struct dp_soc *soc,
  659. struct dp_pdev *pdev,
  660. struct dp_txrx_peer *peer,
  661. struct hal_tx_completion_status *ts,
  662. qdf_nbuf_t netbuf,
  663. uint64_t time_latency)
  664. {
  665. return QDF_STATUS_E_NOSUPPORT;
  666. }
  667. static inline
  668. void dp_send_completion_to_stack(struct dp_soc *soc, struct dp_pdev *pdev,
  669. uint16_t peer_id, uint32_t ppdu_id,
  670. qdf_nbuf_t netbuf)
  671. {
  672. }
  673. #endif
  674. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  675. void dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  676. struct dp_tx_desc_s *desc,
  677. struct hal_tx_completion_status *ts);
  678. #else
  679. static inline void
  680. dp_send_completion_to_pkt_capture(struct dp_soc *soc,
  681. struct dp_tx_desc_s *desc,
  682. struct hal_tx_completion_status *ts)
  683. {
  684. }
  685. #endif
  686. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  687. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  688. /**
  689. * dp_tx_update_stats() - Update soc level tx stats
  690. * @soc: DP soc handle
  691. * @nbuf: packet being transmitted
  692. *
  693. * Returns: none
  694. */
  695. void dp_tx_update_stats(struct dp_soc *soc,
  696. qdf_nbuf_t nbuf);
  697. /**
  698. * dp_tx_attempt_coalescing() - Check and attempt TCL register write coalescing
  699. * @soc: Datapath soc handle
  700. * @tx_desc: tx packet descriptor
  701. * @tid: TID for pkt transmission
  702. *
  703. * Returns: 1, if coalescing is to be done
  704. * 0, if coalescing is not to be done
  705. */
  706. int
  707. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  708. struct dp_tx_desc_s *tx_desc,
  709. uint8_t tid);
  710. /**
  711. * dp_tx_ring_access_end() - HAL ring access end for data transmission
  712. * @soc: Datapath soc handle
  713. * @hal_ring_hdl: HAL ring handle
  714. * @coalesce: Coalesce the current write or not
  715. *
  716. * Returns: none
  717. */
  718. void
  719. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  720. int coalesce);
  721. #else
  722. /**
  723. * dp_tx_update_stats() - Update soc level tx stats
  724. * @soc: DP soc handle
  725. * @nbuf: packet being transmitted
  726. *
  727. * Returns: none
  728. */
  729. static inline void dp_tx_update_stats(struct dp_soc *soc,
  730. qdf_nbuf_t nbuf) { }
  731. static inline void
  732. dp_tx_ring_access_end(struct dp_soc *soc, hal_ring_handle_t hal_ring_hdl,
  733. int coalesce)
  734. {
  735. dp_tx_hal_ring_access_end(soc, hal_ring_hdl);
  736. }
  737. static inline int
  738. dp_tx_attempt_coalescing(struct dp_soc *soc, struct dp_vdev *vdev,
  739. struct dp_tx_desc_s *tx_desc,
  740. uint8_t tid)
  741. {
  742. return 0;
  743. }
  744. #endif /* WLAN_DP_FEATURE_SW_LATENCY_MGR */
  745. #ifdef FEATURE_RUNTIME_PM
  746. /**
  747. * dp_set_rtpm_tput_policy_requirement() - Update RTPM throughput policy
  748. * @soc_hdl: DP soc handle
  749. * @is_high_tput: flag to indicate whether throughput is high
  750. *
  751. * Returns: none
  752. */
  753. static inline
  754. void dp_set_rtpm_tput_policy_requirement(struct cdp_soc_t *soc_hdl,
  755. bool is_high_tput)
  756. {
  757. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  758. qdf_atomic_set(&soc->rtpm_high_tput_flag, is_high_tput);
  759. }
  760. void
  761. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  762. hal_ring_handle_t hal_ring_hdl,
  763. int coalesce);
  764. #else
  765. #ifdef DP_POWER_SAVE
  766. void
  767. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  768. hal_ring_handle_t hal_ring_hdl,
  769. int coalesce);
  770. #else
  771. static inline void
  772. dp_tx_ring_access_end_wrapper(struct dp_soc *soc,
  773. hal_ring_handle_t hal_ring_hdl,
  774. int coalesce)
  775. {
  776. dp_tx_ring_access_end(soc, hal_ring_hdl, coalesce);
  777. }
  778. #endif
  779. static inline void
  780. dp_set_rtpm_tput_policy_requirement(struct cdp_soc_t *soc_hdl,
  781. bool is_high_tput)
  782. { }
  783. #endif
  784. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  785. #ifdef DP_TX_HW_DESC_HISTORY
  786. static inline void
  787. dp_tx_hw_desc_update_evt(uint8_t *hal_tx_desc_cached,
  788. hal_ring_handle_t hal_ring_hdl,
  789. struct dp_soc *soc)
  790. {
  791. struct dp_tx_hw_desc_evt *evt;
  792. uint64_t idx = 0;
  793. if (!soc->tx_hw_desc_history)
  794. return;
  795. idx = ++soc->tx_hw_desc_history->index;
  796. if (idx == DP_TX_HW_DESC_HIST_MAX)
  797. soc->tx_hw_desc_history->index = 0;
  798. idx = qdf_do_div_rem(idx, DP_TX_HW_DESC_HIST_MAX);
  799. evt = &soc->tx_hw_desc_history->entry[idx];
  800. qdf_mem_copy(evt->tcl_desc, hal_tx_desc_cached, HAL_TX_DESC_LEN_BYTES);
  801. evt->posted = qdf_get_log_timestamp();
  802. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &evt->tp, &evt->hp);
  803. }
  804. #else
  805. static inline void
  806. dp_tx_hw_desc_update_evt(uint8_t *hal_tx_desc_cached,
  807. hal_ring_handle_t hal_ring_hdl,
  808. struct dp_soc *soc)
  809. {
  810. }
  811. #endif
  812. #if defined(WLAN_FEATURE_TSF_UPLINK_DELAY) || defined(CONFIG_SAWF)
  813. /**
  814. * dp_set_delta_tsf() - Set delta_tsf to dp_soc structure
  815. * @soc_hdl: cdp soc pointer
  816. * @vdev_id: vdev id
  817. * @delta_tsf: difference between TSF clock and qtimer
  818. *
  819. * Return: None
  820. */
  821. void dp_set_delta_tsf(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  822. uint32_t delta_tsf);
  823. #endif
  824. #ifdef WLAN_FEATURE_TSF_UPLINK_DELAY
  825. /**
  826. * dp_set_tsf_report_ul_delay() - Enable or disable reporting uplink delay
  827. * @soc_hdl: cdp soc pointer
  828. * @vdev_id: vdev id
  829. * @enable: true to enable and false to disable
  830. *
  831. * Return: QDF_STATUS
  832. */
  833. QDF_STATUS dp_set_tsf_ul_delay_report(struct cdp_soc_t *soc_hdl,
  834. uint8_t vdev_id, bool enable);
  835. /**
  836. * dp_get_uplink_delay() - Get uplink delay value
  837. * @soc_hdl: cdp soc pointer
  838. * @vdev_id: vdev id
  839. * @val: pointer to save uplink delay value
  840. *
  841. * Return: QDF_STATUS
  842. */
  843. QDF_STATUS dp_get_uplink_delay(struct cdp_soc_t *soc_hdl, uint8_t vdev_id,
  844. uint32_t *val);
  845. #endif /* WLAN_FEATURE_TSF_UPLINK_TSF */
  846. /**
  847. * dp_tx_pkt_tracepoints_enabled() - Get the state of tx pkt tracepoint
  848. *
  849. * Return: True if any tx pkt tracepoint is enabled else false
  850. */
  851. static inline
  852. bool dp_tx_pkt_tracepoints_enabled(void)
  853. {
  854. return (qdf_trace_dp_tx_comp_tcp_pkt_enabled() ||
  855. qdf_trace_dp_tx_comp_udp_pkt_enabled() ||
  856. qdf_trace_dp_tx_comp_pkt_enabled());
  857. }
  858. #ifdef DP_TX_TRACKING
  859. /**
  860. * dp_tx_desc_set_timestamp() - set timestamp in tx descriptor
  861. * @tx_desc - tx descriptor
  862. *
  863. * Return: None
  864. */
  865. static inline
  866. void dp_tx_desc_set_timestamp(struct dp_tx_desc_s *tx_desc)
  867. {
  868. tx_desc->timestamp = qdf_system_ticks();
  869. }
  870. /**
  871. * dp_tx_desc_check_corruption() - Verify magic pattern in tx descriptor
  872. * @tx_desc: tx descriptor
  873. *
  874. * Check for corruption in tx descriptor, if magic pattern is not matching
  875. * trigger self recovery
  876. *
  877. * Return: none
  878. */
  879. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc);
  880. #else
  881. static inline
  882. void dp_tx_desc_set_timestamp(struct dp_tx_desc_s *tx_desc)
  883. {
  884. }
  885. static inline
  886. void dp_tx_desc_check_corruption(struct dp_tx_desc_s *tx_desc)
  887. {
  888. }
  889. #endif
  890. #ifndef CONFIG_SAWF
  891. static inline bool dp_sawf_tag_valid_get(qdf_nbuf_t nbuf)
  892. {
  893. return false;
  894. }
  895. #endif
  896. #endif