dp_rx.c 83 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for
  6. * any purpose with or without fee is hereby granted, provided that the
  7. * above copyright notice and this permission notice appear in all
  8. * copies.
  9. *
  10. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  11. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  12. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  13. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  14. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  15. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  16. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  17. * PERFORMANCE OF THIS SOFTWARE.
  18. */
  19. #include "hal_hw_headers.h"
  20. #include "dp_types.h"
  21. #include "dp_rx.h"
  22. #include "dp_tx.h"
  23. #include "dp_peer.h"
  24. #include "hal_rx.h"
  25. #include "hal_api.h"
  26. #include "qdf_nbuf.h"
  27. #ifdef MESH_MODE_SUPPORT
  28. #include "if_meta_hdr.h"
  29. #endif
  30. #include "dp_internal.h"
  31. #include "dp_ipa.h"
  32. #include "dp_hist.h"
  33. #include "dp_rx_buffer_pool.h"
  34. #ifdef WIFI_MONITOR_SUPPORT
  35. #include "dp_htt.h"
  36. #include <dp_mon.h>
  37. #endif
  38. #ifdef FEATURE_WDS
  39. #include "dp_txrx_wds.h"
  40. #endif
  41. #ifdef DUP_RX_DESC_WAR
  42. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  43. hal_ring_handle_t hal_ring,
  44. hal_ring_desc_t ring_desc,
  45. struct dp_rx_desc *rx_desc)
  46. {
  47. void *hal_soc = soc->hal_soc;
  48. hal_srng_dump_ring_desc(hal_soc, hal_ring, ring_desc);
  49. dp_rx_desc_dump(rx_desc);
  50. }
  51. #else
  52. void dp_rx_dump_info_and_assert(struct dp_soc *soc,
  53. hal_ring_handle_t hal_ring_hdl,
  54. hal_ring_desc_t ring_desc,
  55. struct dp_rx_desc *rx_desc)
  56. {
  57. hal_soc_handle_t hal_soc = soc->hal_soc;
  58. dp_rx_desc_dump(rx_desc);
  59. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl, ring_desc);
  60. hal_srng_dump_ring(hal_soc, hal_ring_hdl);
  61. qdf_assert_always(0);
  62. }
  63. #endif
  64. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  65. #ifdef RX_DESC_SANITY_WAR
  66. QDF_STATUS dp_rx_desc_sanity(struct dp_soc *soc, hal_soc_handle_t hal_soc,
  67. hal_ring_handle_t hal_ring_hdl,
  68. hal_ring_desc_t ring_desc,
  69. struct dp_rx_desc *rx_desc)
  70. {
  71. uint8_t return_buffer_manager;
  72. if (qdf_unlikely(!rx_desc)) {
  73. /*
  74. * This is an unlikely case where the cookie obtained
  75. * from the ring_desc is invalid and hence we are not
  76. * able to find the corresponding rx_desc
  77. */
  78. goto fail;
  79. }
  80. return_buffer_manager = hal_rx_ret_buf_manager_get(hal_soc, ring_desc);
  81. if (qdf_unlikely(!(return_buffer_manager ==
  82. HAL_RX_BUF_RBM_SW1_BM(soc->wbm_sw0_bm_id) ||
  83. return_buffer_manager ==
  84. HAL_RX_BUF_RBM_SW3_BM(soc->wbm_sw0_bm_id)))) {
  85. goto fail;
  86. }
  87. return QDF_STATUS_SUCCESS;
  88. fail:
  89. DP_STATS_INC(soc, rx.err.invalid_cookie, 1);
  90. dp_err("Ring Desc:");
  91. hal_srng_dump_ring_desc(hal_soc, hal_ring_hdl,
  92. ring_desc);
  93. return QDF_STATUS_E_NULL_VALUE;
  94. }
  95. #endif
  96. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  97. /**
  98. * dp_pdev_frag_alloc_and_map() - Allocate frag for desc buffer and map
  99. *
  100. * @dp_soc: struct dp_soc *
  101. * @nbuf_frag_info_t: nbuf frag info
  102. * @dp_pdev: struct dp_pdev *
  103. * @rx_desc_pool: Rx desc pool
  104. *
  105. * Return: QDF_STATUS
  106. */
  107. #ifdef DP_RX_MON_MEM_FRAG
  108. static inline QDF_STATUS
  109. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  110. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  111. struct dp_pdev *dp_pdev,
  112. struct rx_desc_pool *rx_desc_pool)
  113. {
  114. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  115. (nbuf_frag_info_t->virt_addr).vaddr =
  116. qdf_frag_alloc(rx_desc_pool->buf_size);
  117. if (!((nbuf_frag_info_t->virt_addr).vaddr)) {
  118. dp_err("Frag alloc failed");
  119. DP_STATS_INC(dp_pdev, replenish.frag_alloc_fail, 1);
  120. return QDF_STATUS_E_NOMEM;
  121. }
  122. ret = qdf_mem_map_page(dp_soc->osdev,
  123. (nbuf_frag_info_t->virt_addr).vaddr,
  124. QDF_DMA_FROM_DEVICE,
  125. rx_desc_pool->buf_size,
  126. &nbuf_frag_info_t->paddr);
  127. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  128. qdf_frag_free((nbuf_frag_info_t->virt_addr).vaddr);
  129. dp_err("Frag map failed");
  130. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  131. return QDF_STATUS_E_FAULT;
  132. }
  133. return QDF_STATUS_SUCCESS;
  134. }
  135. #else
  136. static inline QDF_STATUS
  137. dp_pdev_frag_alloc_and_map(struct dp_soc *dp_soc,
  138. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  139. struct dp_pdev *dp_pdev,
  140. struct rx_desc_pool *rx_desc_pool)
  141. {
  142. return QDF_STATUS_SUCCESS;
  143. }
  144. #endif /* DP_RX_MON_MEM_FRAG */
  145. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  146. /**
  147. * dp_rx_refill_ring_record_entry() - Record an entry into refill_ring history
  148. * @soc: Datapath soc structure
  149. * @ring_num: Refill ring number
  150. * @num_req: number of buffers requested for refill
  151. * @num_refill: number of buffers refilled
  152. *
  153. * Returns: None
  154. */
  155. static inline void
  156. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  157. hal_ring_handle_t hal_ring_hdl,
  158. uint32_t num_req, uint32_t num_refill)
  159. {
  160. struct dp_refill_info_record *record;
  161. uint32_t idx;
  162. uint32_t tp;
  163. uint32_t hp;
  164. if (qdf_unlikely(ring_num >= MAX_PDEV_CNT ||
  165. !soc->rx_refill_ring_history[ring_num]))
  166. return;
  167. idx = dp_history_get_next_index(&soc->rx_refill_ring_history[ring_num]->index,
  168. DP_RX_REFILL_HIST_MAX);
  169. /* No NULL check needed for record since its an array */
  170. record = &soc->rx_refill_ring_history[ring_num]->entry[idx];
  171. hal_get_sw_hptp(soc->hal_soc, hal_ring_hdl, &tp, &hp);
  172. record->timestamp = qdf_get_log_timestamp();
  173. record->num_req = num_req;
  174. record->num_refill = num_refill;
  175. record->hp = hp;
  176. record->tp = tp;
  177. }
  178. #else
  179. static inline void
  180. dp_rx_refill_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  181. hal_ring_handle_t hal_ring_hdl,
  182. uint32_t num_req, uint32_t num_refill)
  183. {
  184. }
  185. #endif
  186. /**
  187. * dp_pdev_nbuf_alloc_and_map() - Allocate nbuf for desc buffer and map
  188. *
  189. * @dp_soc: struct dp_soc *
  190. * @mac_id: Mac id
  191. * @num_entries_avail: num_entries_avail
  192. * @nbuf_frag_info_t: nbuf frag info
  193. * @dp_pdev: struct dp_pdev *
  194. * @rx_desc_pool: Rx desc pool
  195. *
  196. * Return: QDF_STATUS
  197. */
  198. static inline QDF_STATUS
  199. dp_pdev_nbuf_alloc_and_map_replenish(struct dp_soc *dp_soc,
  200. uint32_t mac_id,
  201. uint32_t num_entries_avail,
  202. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  203. struct dp_pdev *dp_pdev,
  204. struct rx_desc_pool *rx_desc_pool)
  205. {
  206. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  207. (nbuf_frag_info_t->virt_addr).nbuf =
  208. dp_rx_buffer_pool_nbuf_alloc(dp_soc,
  209. mac_id,
  210. rx_desc_pool,
  211. num_entries_avail);
  212. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  213. dp_err("nbuf alloc failed");
  214. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  215. return QDF_STATUS_E_NOMEM;
  216. }
  217. ret = dp_rx_buffer_pool_nbuf_map(dp_soc, rx_desc_pool,
  218. nbuf_frag_info_t);
  219. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  220. dp_rx_buffer_pool_nbuf_free(dp_soc,
  221. (nbuf_frag_info_t->virt_addr).nbuf, mac_id);
  222. dp_err("nbuf map failed");
  223. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  224. return QDF_STATUS_E_FAULT;
  225. }
  226. nbuf_frag_info_t->paddr =
  227. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  228. dp_ipa_handle_rx_buf_smmu_mapping(dp_soc,
  229. (qdf_nbuf_t)((nbuf_frag_info_t->virt_addr).nbuf),
  230. rx_desc_pool->buf_size,
  231. true);
  232. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  233. &nbuf_frag_info_t->paddr,
  234. rx_desc_pool);
  235. if (ret == QDF_STATUS_E_FAILURE) {
  236. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  237. return QDF_STATUS_E_ADDRNOTAVAIL;
  238. }
  239. return QDF_STATUS_SUCCESS;
  240. }
  241. #if defined(QCA_DP_RX_NBUF_NO_MAP_UNMAP) && !defined(BUILD_X86)
  242. QDF_STATUS
  243. __dp_rx_buffers_no_map_lt_replenish(struct dp_soc *soc, uint32_t mac_id,
  244. struct dp_srng *dp_rxdma_srng,
  245. struct rx_desc_pool *rx_desc_pool)
  246. {
  247. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  248. uint32_t count;
  249. void *rxdma_ring_entry;
  250. union dp_rx_desc_list_elem_t *next = NULL;
  251. void *rxdma_srng;
  252. qdf_nbuf_t nbuf;
  253. qdf_dma_addr_t paddr;
  254. uint16_t num_entries_avail = 0;
  255. uint16_t num_alloc_desc = 0;
  256. union dp_rx_desc_list_elem_t *desc_list = NULL;
  257. union dp_rx_desc_list_elem_t *tail = NULL;
  258. int sync_hw_ptr = 0;
  259. rxdma_srng = dp_rxdma_srng->hal_srng;
  260. if (qdf_unlikely(!dp_pdev)) {
  261. dp_rx_err("%pK: pdev is null for mac_id = %d", soc, mac_id);
  262. return QDF_STATUS_E_FAILURE;
  263. }
  264. if (qdf_unlikely(!rxdma_srng)) {
  265. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  266. return QDF_STATUS_E_FAILURE;
  267. }
  268. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  269. num_entries_avail = hal_srng_src_num_avail(soc->hal_soc,
  270. rxdma_srng,
  271. sync_hw_ptr);
  272. dp_rx_debug("%pK: no of available entries in rxdma ring: %d",
  273. soc, num_entries_avail);
  274. if (qdf_unlikely(num_entries_avail <
  275. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  276. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  277. return QDF_STATUS_E_FAILURE;
  278. }
  279. DP_STATS_INC(dp_pdev, replenish.low_thresh_intrs, 1);
  280. num_alloc_desc = dp_rx_get_free_desc_list(soc, mac_id,
  281. rx_desc_pool,
  282. num_entries_avail,
  283. &desc_list,
  284. &tail);
  285. if (!num_alloc_desc) {
  286. dp_rx_err("%pK: no free rx_descs in freelist", soc);
  287. DP_STATS_INC(dp_pdev, err.desc_lt_alloc_fail,
  288. num_entries_avail);
  289. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  290. return QDF_STATUS_E_NOMEM;
  291. }
  292. for (count = 0; count < num_alloc_desc; count++) {
  293. next = desc_list->next;
  294. qdf_prefetch(next);
  295. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  296. if (qdf_unlikely(!nbuf)) {
  297. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  298. break;
  299. }
  300. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  301. rx_desc_pool->buf_size);
  302. rxdma_ring_entry = hal_srng_src_get_next(soc->hal_soc,
  303. rxdma_srng);
  304. qdf_assert_always(rxdma_ring_entry);
  305. desc_list->rx_desc.nbuf = nbuf;
  306. desc_list->rx_desc.rx_buf_start = nbuf->data;
  307. desc_list->rx_desc.unmapped = 0;
  308. /* rx_desc.in_use should be zero at this time*/
  309. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  310. desc_list->rx_desc.in_use = 1;
  311. desc_list->rx_desc.in_err_state = 0;
  312. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  313. paddr,
  314. desc_list->rx_desc.cookie,
  315. rx_desc_pool->owner);
  316. desc_list = next;
  317. }
  318. qdf_dsb();
  319. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  320. /* No need to count the number of bytes received during replenish.
  321. * Therefore set replenish.pkts.bytes as 0.
  322. */
  323. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  324. DP_STATS_INC(dp_pdev, buf_freelist, (num_alloc_desc - count));
  325. /*
  326. * add any available free desc back to the free list
  327. */
  328. if (desc_list)
  329. dp_rx_add_desc_list_to_free_list(soc, &desc_list, &tail,
  330. mac_id, rx_desc_pool);
  331. return QDF_STATUS_SUCCESS;
  332. }
  333. QDF_STATUS
  334. __dp_rx_buffers_no_map_replenish(struct dp_soc *soc, uint32_t mac_id,
  335. struct dp_srng *dp_rxdma_srng,
  336. struct rx_desc_pool *rx_desc_pool,
  337. uint32_t num_req_buffers,
  338. union dp_rx_desc_list_elem_t **desc_list,
  339. union dp_rx_desc_list_elem_t **tail)
  340. {
  341. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  342. uint32_t count;
  343. void *rxdma_ring_entry;
  344. union dp_rx_desc_list_elem_t *next;
  345. void *rxdma_srng;
  346. qdf_nbuf_t nbuf;
  347. qdf_dma_addr_t paddr;
  348. rxdma_srng = dp_rxdma_srng->hal_srng;
  349. if (qdf_unlikely(!dp_pdev)) {
  350. dp_rx_err("%pK: pdev is null for mac_id = %d",
  351. soc, mac_id);
  352. return QDF_STATUS_E_FAILURE;
  353. }
  354. if (qdf_unlikely(!rxdma_srng)) {
  355. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  356. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  357. return QDF_STATUS_E_FAILURE;
  358. }
  359. dp_rx_debug("%pK: requested %d buffers for replenish",
  360. soc, num_req_buffers);
  361. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  362. for (count = 0; count < num_req_buffers; count++) {
  363. next = (*desc_list)->next;
  364. qdf_prefetch(next);
  365. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  366. if (qdf_unlikely(!nbuf)) {
  367. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  368. break;
  369. }
  370. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  371. rx_desc_pool->buf_size);
  372. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  373. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  374. if (!rxdma_ring_entry)
  375. break;
  376. qdf_assert_always(rxdma_ring_entry);
  377. (*desc_list)->rx_desc.nbuf = nbuf;
  378. (*desc_list)->rx_desc.rx_buf_start = nbuf->data;
  379. (*desc_list)->rx_desc.unmapped = 0;
  380. /* rx_desc.in_use should be zero at this time*/
  381. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  382. (*desc_list)->rx_desc.in_use = 1;
  383. (*desc_list)->rx_desc.in_err_state = 0;
  384. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  385. paddr,
  386. (*desc_list)->rx_desc.cookie,
  387. rx_desc_pool->owner);
  388. *desc_list = next;
  389. }
  390. qdf_dsb();
  391. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  392. /* No need to count the number of bytes received during replenish.
  393. * Therefore set replenish.pkts.bytes as 0.
  394. */
  395. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  396. DP_STATS_INC(dp_pdev, buf_freelist, (num_req_buffers - count));
  397. /*
  398. * add any available free desc back to the free list
  399. */
  400. if (*desc_list)
  401. dp_rx_add_desc_list_to_free_list(soc, desc_list, tail,
  402. mac_id, rx_desc_pool);
  403. return QDF_STATUS_SUCCESS;
  404. }
  405. QDF_STATUS __dp_pdev_rx_buffers_no_map_attach(struct dp_soc *soc,
  406. uint32_t mac_id,
  407. struct dp_srng *dp_rxdma_srng,
  408. struct rx_desc_pool *rx_desc_pool,
  409. uint32_t num_req_buffers)
  410. {
  411. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  412. uint32_t count;
  413. uint32_t nr_descs = 0;
  414. void *rxdma_ring_entry;
  415. union dp_rx_desc_list_elem_t *next;
  416. void *rxdma_srng;
  417. qdf_nbuf_t nbuf;
  418. qdf_dma_addr_t paddr;
  419. union dp_rx_desc_list_elem_t *desc_list = NULL;
  420. union dp_rx_desc_list_elem_t *tail = NULL;
  421. rxdma_srng = dp_rxdma_srng->hal_srng;
  422. if (qdf_unlikely(!dp_pdev)) {
  423. dp_rx_err("%pK: pdev is null for mac_id = %d",
  424. soc, mac_id);
  425. return QDF_STATUS_E_FAILURE;
  426. }
  427. if (qdf_unlikely(!rxdma_srng)) {
  428. dp_rx_debug("%pK: rxdma srng not initialized", soc);
  429. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  430. return QDF_STATUS_E_FAILURE;
  431. }
  432. dp_rx_debug("%pK: requested %d buffers for replenish",
  433. soc, num_req_buffers);
  434. nr_descs = dp_rx_get_free_desc_list(soc, mac_id, rx_desc_pool,
  435. num_req_buffers, &desc_list, &tail);
  436. if (!nr_descs) {
  437. dp_err("no free rx_descs in freelist");
  438. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  439. return QDF_STATUS_E_NOMEM;
  440. }
  441. dp_debug("got %u RX descs for driver attach", nr_descs);
  442. hal_srng_access_start(soc->hal_soc, rxdma_srng);
  443. for (count = 0; count < nr_descs; count++) {
  444. next = desc_list->next;
  445. qdf_prefetch(next);
  446. nbuf = dp_rx_nbuf_alloc(soc, rx_desc_pool);
  447. if (qdf_unlikely(!nbuf)) {
  448. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  449. break;
  450. }
  451. paddr = dp_rx_nbuf_sync_no_dsb(soc, nbuf,
  452. rx_desc_pool->buf_size);
  453. rxdma_ring_entry = (struct dp_buffer_addr_info *)
  454. hal_srng_src_get_next(soc->hal_soc, rxdma_srng);
  455. if (!rxdma_ring_entry)
  456. break;
  457. qdf_assert_always(rxdma_ring_entry);
  458. desc_list->rx_desc.nbuf = nbuf;
  459. desc_list->rx_desc.rx_buf_start = nbuf->data;
  460. desc_list->rx_desc.unmapped = 0;
  461. /* rx_desc.in_use should be zero at this time*/
  462. qdf_assert_always(desc_list->rx_desc.in_use == 0);
  463. desc_list->rx_desc.in_use = 1;
  464. desc_list->rx_desc.in_err_state = 0;
  465. hal_rxdma_buff_addr_info_set(soc->hal_soc, rxdma_ring_entry,
  466. paddr,
  467. desc_list->rx_desc.cookie,
  468. rx_desc_pool->owner);
  469. desc_list = next;
  470. }
  471. qdf_dsb();
  472. hal_srng_access_end(soc->hal_soc, rxdma_srng);
  473. /* No need to count the number of bytes received during replenish.
  474. * Therefore set replenish.pkts.bytes as 0.
  475. */
  476. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  477. return QDF_STATUS_SUCCESS;
  478. }
  479. #endif
  480. /*
  481. * dp_rx_buffers_replenish() - replenish rxdma ring with rx nbufs
  482. * called during dp rx initialization
  483. * and at the end of dp_rx_process.
  484. *
  485. * @soc: core txrx main context
  486. * @mac_id: mac_id which is one of 3 mac_ids
  487. * @dp_rxdma_srng: dp rxdma circular ring
  488. * @rx_desc_pool: Pointer to free Rx descriptor pool
  489. * @num_req_buffers: number of buffer to be replenished
  490. * @desc_list: list of descs if called from dp_rx_process
  491. * or NULL during dp rx initialization or out of buffer
  492. * interrupt.
  493. * @tail: tail of descs list
  494. * @func_name: name of the caller function
  495. * Return: return success or failure
  496. */
  497. QDF_STATUS __dp_rx_buffers_replenish(struct dp_soc *dp_soc, uint32_t mac_id,
  498. struct dp_srng *dp_rxdma_srng,
  499. struct rx_desc_pool *rx_desc_pool,
  500. uint32_t num_req_buffers,
  501. union dp_rx_desc_list_elem_t **desc_list,
  502. union dp_rx_desc_list_elem_t **tail,
  503. const char *func_name)
  504. {
  505. uint32_t num_alloc_desc;
  506. uint16_t num_desc_to_free = 0;
  507. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  508. uint32_t num_entries_avail;
  509. uint32_t count;
  510. int sync_hw_ptr = 1;
  511. struct dp_rx_nbuf_frag_info nbuf_frag_info = {0};
  512. void *rxdma_ring_entry;
  513. union dp_rx_desc_list_elem_t *next;
  514. QDF_STATUS ret;
  515. void *rxdma_srng;
  516. rxdma_srng = dp_rxdma_srng->hal_srng;
  517. if (qdf_unlikely(!dp_pdev)) {
  518. dp_rx_err("%pK: pdev is null for mac_id = %d",
  519. dp_soc, mac_id);
  520. return QDF_STATUS_E_FAILURE;
  521. }
  522. if (qdf_unlikely(!rxdma_srng)) {
  523. dp_rx_debug("%pK: rxdma srng not initialized", dp_soc);
  524. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  525. return QDF_STATUS_E_FAILURE;
  526. }
  527. dp_rx_debug("%pK: requested %d buffers for replenish",
  528. dp_soc, num_req_buffers);
  529. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  530. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  531. rxdma_srng,
  532. sync_hw_ptr);
  533. dp_rx_debug("%pK: no of available entries in rxdma ring: %d",
  534. dp_soc, num_entries_avail);
  535. if (!(*desc_list) && (num_entries_avail >
  536. ((dp_rxdma_srng->num_entries * 3) / 4))) {
  537. num_req_buffers = num_entries_avail;
  538. } else if (num_entries_avail < num_req_buffers) {
  539. num_desc_to_free = num_req_buffers - num_entries_avail;
  540. num_req_buffers = num_entries_avail;
  541. }
  542. if (qdf_unlikely(!num_req_buffers)) {
  543. num_desc_to_free = num_req_buffers;
  544. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  545. goto free_descs;
  546. }
  547. /*
  548. * if desc_list is NULL, allocate the descs from freelist
  549. */
  550. if (!(*desc_list)) {
  551. num_alloc_desc = dp_rx_get_free_desc_list(dp_soc, mac_id,
  552. rx_desc_pool,
  553. num_req_buffers,
  554. desc_list,
  555. tail);
  556. if (!num_alloc_desc) {
  557. dp_rx_err("%pK: no free rx_descs in freelist", dp_soc);
  558. DP_STATS_INC(dp_pdev, err.desc_alloc_fail,
  559. num_req_buffers);
  560. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  561. return QDF_STATUS_E_NOMEM;
  562. }
  563. dp_rx_debug("%pK: %d rx desc allocated", dp_soc, num_alloc_desc);
  564. num_req_buffers = num_alloc_desc;
  565. }
  566. count = 0;
  567. while (count < num_req_buffers) {
  568. /* Flag is set while pdev rx_desc_pool initialization */
  569. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  570. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  571. &nbuf_frag_info,
  572. dp_pdev,
  573. rx_desc_pool);
  574. else
  575. ret = dp_pdev_nbuf_alloc_and_map_replenish(dp_soc,
  576. mac_id,
  577. num_entries_avail, &nbuf_frag_info,
  578. dp_pdev, rx_desc_pool);
  579. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  580. if (qdf_unlikely(ret == QDF_STATUS_E_FAULT))
  581. continue;
  582. break;
  583. }
  584. count++;
  585. rxdma_ring_entry = hal_srng_src_get_next(dp_soc->hal_soc,
  586. rxdma_srng);
  587. qdf_assert_always(rxdma_ring_entry);
  588. next = (*desc_list)->next;
  589. /* Flag is set while pdev rx_desc_pool initialization */
  590. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  591. dp_rx_desc_frag_prep(&((*desc_list)->rx_desc),
  592. &nbuf_frag_info);
  593. else
  594. dp_rx_desc_prep(&((*desc_list)->rx_desc),
  595. &nbuf_frag_info);
  596. /* rx_desc.in_use should be zero at this time*/
  597. qdf_assert_always((*desc_list)->rx_desc.in_use == 0);
  598. (*desc_list)->rx_desc.in_use = 1;
  599. (*desc_list)->rx_desc.in_err_state = 0;
  600. dp_rx_desc_update_dbg_info(&(*desc_list)->rx_desc,
  601. func_name, RX_DESC_REPLENISHED);
  602. dp_verbose_debug("rx_netbuf=%pK, paddr=0x%llx, cookie=%d",
  603. nbuf_frag_info.virt_addr.nbuf,
  604. (unsigned long long)(nbuf_frag_info.paddr),
  605. (*desc_list)->rx_desc.cookie);
  606. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc, rxdma_ring_entry,
  607. nbuf_frag_info.paddr,
  608. (*desc_list)->rx_desc.cookie,
  609. rx_desc_pool->owner);
  610. *desc_list = next;
  611. }
  612. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id, rxdma_srng,
  613. num_req_buffers, count);
  614. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  615. dp_rx_schedule_refill_thread(dp_soc);
  616. dp_verbose_debug("replenished buffers %d, rx desc added back to free list %u",
  617. count, num_desc_to_free);
  618. /* No need to count the number of bytes received during replenish.
  619. * Therefore set replenish.pkts.bytes as 0.
  620. */
  621. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, count, 0);
  622. free_descs:
  623. DP_STATS_INC(dp_pdev, buf_freelist, num_desc_to_free);
  624. /*
  625. * add any available free desc back to the free list
  626. */
  627. if (*desc_list)
  628. dp_rx_add_desc_list_to_free_list(dp_soc, desc_list, tail,
  629. mac_id, rx_desc_pool);
  630. return QDF_STATUS_SUCCESS;
  631. }
  632. qdf_export_symbol(__dp_rx_buffers_replenish);
  633. /*
  634. * dp_rx_deliver_raw() - process RAW mode pkts and hand over the
  635. * pkts to RAW mode simulation to
  636. * decapsulate the pkt.
  637. *
  638. * @vdev: vdev on which RAW mode is enabled
  639. * @nbuf_list: list of RAW pkts to process
  640. * @txrx_peer: peer object from which the pkt is rx
  641. *
  642. * Return: void
  643. */
  644. void
  645. dp_rx_deliver_raw(struct dp_vdev *vdev, qdf_nbuf_t nbuf_list,
  646. struct dp_txrx_peer *txrx_peer)
  647. {
  648. qdf_nbuf_t deliver_list_head = NULL;
  649. qdf_nbuf_t deliver_list_tail = NULL;
  650. qdf_nbuf_t nbuf;
  651. nbuf = nbuf_list;
  652. while (nbuf) {
  653. qdf_nbuf_t next = qdf_nbuf_next(nbuf);
  654. DP_RX_LIST_APPEND(deliver_list_head, deliver_list_tail, nbuf);
  655. DP_STATS_INC(vdev->pdev, rx_raw_pkts, 1);
  656. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.raw, 1,
  657. qdf_nbuf_len(nbuf));
  658. /*
  659. * reset the chfrag_start and chfrag_end bits in nbuf cb
  660. * as this is a non-amsdu pkt and RAW mode simulation expects
  661. * these bit s to be 0 for non-amsdu pkt.
  662. */
  663. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  664. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  665. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  666. qdf_nbuf_set_rx_chfrag_end(nbuf, 0);
  667. }
  668. nbuf = next;
  669. }
  670. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &deliver_list_head,
  671. &deliver_list_tail);
  672. vdev->osif_rx(vdev->osif_vdev, deliver_list_head);
  673. }
  674. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  675. #ifndef FEATURE_WDS
  676. void dp_rx_da_learn(struct dp_soc *soc, uint8_t *rx_tlv_hdr,
  677. struct dp_txrx_peer *ta_peer, qdf_nbuf_t nbuf)
  678. {
  679. }
  680. #endif
  681. #ifdef QCA_SUPPORT_TX_MIN_RATES_FOR_SPECIAL_FRAMES
  682. /*
  683. * dp_classify_critical_pkts() - API for marking critical packets
  684. * @soc: dp_soc context
  685. * @vdev: vdev on which packet is to be sent
  686. * @nbuf: nbuf that has to be classified
  687. *
  688. * The function parses the packet, identifies whether its a critical frame and
  689. * marks QDF_NBUF_CB_TX_EXTRA_IS_CRITICAL bit in qdf_nbuf_cb for the nbuf.
  690. * Code for marking which frames are CRITICAL is accessed via callback.
  691. * EAPOL, ARP, DHCP, DHCPv6, ICMPv6 NS/NA are the typical critical frames.
  692. *
  693. * Return: None
  694. */
  695. static
  696. void dp_classify_critical_pkts(struct dp_soc *soc, struct dp_vdev *vdev,
  697. qdf_nbuf_t nbuf)
  698. {
  699. if (vdev->tx_classify_critical_pkt_cb)
  700. vdev->tx_classify_critical_pkt_cb(vdev->osif_vdev, nbuf);
  701. }
  702. #else
  703. static inline
  704. void dp_classify_critical_pkts(struct dp_soc *soc, struct dp_vdev *vdev,
  705. qdf_nbuf_t nbuf)
  706. {
  707. }
  708. #endif
  709. /*
  710. * dp_rx_intrabss_mcbc_fwd() - Does intrabss forward for mcast packets
  711. *
  712. * @soc: core txrx main context
  713. * @ta_peer : source peer entry
  714. * @rx_tlv_hdr : start address of rx tlvs
  715. * @nbuf : nbuf that has to be intrabss forwarded
  716. * @tid_stats : tid stats pointer
  717. *
  718. * Return: bool: true if it is forwarded else false
  719. */
  720. bool dp_rx_intrabss_mcbc_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  721. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  722. struct cdp_tid_rx_stats *tid_stats)
  723. {
  724. uint16_t len;
  725. qdf_nbuf_t nbuf_copy;
  726. if (dp_rx_intrabss_eapol_drop_check(soc, ta_peer, rx_tlv_hdr,
  727. nbuf))
  728. return true;
  729. if (!dp_rx_check_ndi_mdns_fwding(ta_peer, nbuf))
  730. return false;
  731. /* If the source peer in the isolation list
  732. * then dont forward instead push to bridge stack
  733. */
  734. if (dp_get_peer_isolation(ta_peer))
  735. return false;
  736. nbuf_copy = qdf_nbuf_copy(nbuf);
  737. if (!nbuf_copy)
  738. return false;
  739. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  740. dp_classify_critical_pkts(soc, ta_peer->vdev, nbuf_copy);
  741. if (soc->arch_ops.dp_rx_intrabss_handle_nawds(soc, ta_peer, nbuf_copy,
  742. tid_stats))
  743. return false;
  744. if (dp_tx_send((struct cdp_soc_t *)soc,
  745. ta_peer->vdev->vdev_id, nbuf_copy)) {
  746. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  747. len);
  748. tid_stats->fail_cnt[INTRABSS_DROP]++;
  749. dp_rx_nbuf_free(nbuf_copy);
  750. } else {
  751. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  752. len);
  753. tid_stats->intrabss_cnt++;
  754. }
  755. return false;
  756. }
  757. /*
  758. * dp_rx_intrabss_ucast_fwd() - Does intrabss forward for unicast packets
  759. *
  760. * @soc: core txrx main context
  761. * @ta_peer: source peer entry
  762. * @tx_vdev_id: VDEV ID for Intra-BSS TX
  763. * @rx_tlv_hdr: start address of rx tlvs
  764. * @nbuf: nbuf that has to be intrabss forwarded
  765. * @tid_stats: tid stats pointer
  766. *
  767. * Return: bool: true if it is forwarded else false
  768. */
  769. bool dp_rx_intrabss_ucast_fwd(struct dp_soc *soc, struct dp_txrx_peer *ta_peer,
  770. uint8_t tx_vdev_id,
  771. uint8_t *rx_tlv_hdr, qdf_nbuf_t nbuf,
  772. struct cdp_tid_rx_stats *tid_stats)
  773. {
  774. uint16_t len;
  775. len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  776. /* linearize the nbuf just before we send to
  777. * dp_tx_send()
  778. */
  779. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  780. if (qdf_nbuf_linearize(nbuf) == -ENOMEM)
  781. return false;
  782. nbuf = qdf_nbuf_unshare(nbuf);
  783. if (!nbuf) {
  784. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer,
  785. rx.intra_bss.fail,
  786. 1, len);
  787. /* return true even though the pkt is
  788. * not forwarded. Basically skb_unshare
  789. * failed and we want to continue with
  790. * next nbuf.
  791. */
  792. tid_stats->fail_cnt[INTRABSS_DROP]++;
  793. return false;
  794. }
  795. }
  796. dp_classify_critical_pkts(soc, ta_peer->vdev, nbuf);
  797. if (!dp_tx_send((struct cdp_soc_t *)soc,
  798. tx_vdev_id, nbuf)) {
  799. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.pkts, 1,
  800. len);
  801. } else {
  802. DP_PEER_PER_PKT_STATS_INC_PKT(ta_peer, rx.intra_bss.fail, 1,
  803. len);
  804. tid_stats->fail_cnt[INTRABSS_DROP]++;
  805. return false;
  806. }
  807. return true;
  808. }
  809. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  810. #ifdef MESH_MODE_SUPPORT
  811. /**
  812. * dp_rx_fill_mesh_stats() - Fills the mesh per packet receive stats
  813. *
  814. * @vdev: DP Virtual device handle
  815. * @nbuf: Buffer pointer
  816. * @rx_tlv_hdr: start of rx tlv header
  817. * @txrx_peer: pointer to peer
  818. *
  819. * This function allocated memory for mesh receive stats and fill the
  820. * required stats. Stores the memory address in skb cb.
  821. *
  822. * Return: void
  823. */
  824. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  825. uint8_t *rx_tlv_hdr,
  826. struct dp_txrx_peer *txrx_peer)
  827. {
  828. struct mesh_recv_hdr_s *rx_info = NULL;
  829. uint32_t pkt_type;
  830. uint32_t nss;
  831. uint32_t rate_mcs;
  832. uint32_t bw;
  833. uint8_t primary_chan_num;
  834. uint32_t center_chan_freq;
  835. struct dp_soc *soc = vdev->pdev->soc;
  836. struct dp_peer *peer;
  837. struct dp_peer *primary_link_peer;
  838. struct dp_soc *link_peer_soc;
  839. cdp_peer_stats_param_t buf = {0};
  840. /* fill recv mesh stats */
  841. rx_info = qdf_mem_malloc(sizeof(struct mesh_recv_hdr_s));
  842. /* upper layers are resposible to free this memory */
  843. if (!rx_info) {
  844. dp_rx_err("%pK: Memory allocation failed for mesh rx stats",
  845. vdev->pdev->soc);
  846. DP_STATS_INC(vdev->pdev, mesh_mem_alloc, 1);
  847. return;
  848. }
  849. rx_info->rs_flags = MESH_RXHDR_VER1;
  850. if (qdf_nbuf_is_rx_chfrag_start(nbuf))
  851. rx_info->rs_flags |= MESH_RX_FIRST_MSDU;
  852. if (qdf_nbuf_is_rx_chfrag_end(nbuf))
  853. rx_info->rs_flags |= MESH_RX_LAST_MSDU;
  854. peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id, DP_MOD_ID_MESH);
  855. if (peer) {
  856. if (hal_rx_tlv_get_is_decrypted(soc->hal_soc, rx_tlv_hdr)) {
  857. rx_info->rs_flags |= MESH_RX_DECRYPTED;
  858. rx_info->rs_keyix = hal_rx_msdu_get_keyid(soc->hal_soc,
  859. rx_tlv_hdr);
  860. if (vdev->osif_get_key)
  861. vdev->osif_get_key(vdev->osif_vdev,
  862. &rx_info->rs_decryptkey[0],
  863. &peer->mac_addr.raw[0],
  864. rx_info->rs_keyix);
  865. }
  866. dp_peer_unref_delete(peer, DP_MOD_ID_MESH);
  867. }
  868. primary_link_peer = dp_get_primary_link_peer_by_id(soc,
  869. txrx_peer->peer_id,
  870. DP_MOD_ID_MESH);
  871. if (qdf_likely(primary_link_peer)) {
  872. link_peer_soc = primary_link_peer->vdev->pdev->soc;
  873. dp_monitor_peer_get_stats_param(link_peer_soc,
  874. primary_link_peer,
  875. cdp_peer_rx_snr, &buf);
  876. rx_info->rs_snr = buf.rx_snr;
  877. dp_peer_unref_delete(primary_link_peer, DP_MOD_ID_MESH);
  878. }
  879. rx_info->rs_rssi = rx_info->rs_snr + DP_DEFAULT_NOISEFLOOR;
  880. soc = vdev->pdev->soc;
  881. primary_chan_num = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr);
  882. center_chan_freq = hal_rx_tlv_get_freq(soc->hal_soc, rx_tlv_hdr) >> 16;
  883. if (soc->cdp_soc.ol_ops && soc->cdp_soc.ol_ops->freq_to_band) {
  884. rx_info->rs_band = soc->cdp_soc.ol_ops->freq_to_band(
  885. soc->ctrl_psoc,
  886. vdev->pdev->pdev_id,
  887. center_chan_freq);
  888. }
  889. rx_info->rs_channel = primary_chan_num;
  890. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  891. rate_mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  892. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  893. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  894. rx_info->rs_ratephy1 = rate_mcs | (nss << 0x8) | (pkt_type << 16) |
  895. (bw << 24);
  896. qdf_nbuf_set_rx_fctx_type(nbuf, (void *)rx_info, CB_FTYPE_MESH_RX_INFO);
  897. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_MED,
  898. FL("Mesh rx stats: flags %x, rssi %x, chn %x, rate %x, kix %x, snr %x"),
  899. rx_info->rs_flags,
  900. rx_info->rs_rssi,
  901. rx_info->rs_channel,
  902. rx_info->rs_ratephy1,
  903. rx_info->rs_keyix,
  904. rx_info->rs_snr);
  905. }
  906. /**
  907. * dp_rx_filter_mesh_packets() - Filters mesh unwanted packets
  908. *
  909. * @vdev: DP Virtual device handle
  910. * @nbuf: Buffer pointer
  911. * @rx_tlv_hdr: start of rx tlv header
  912. *
  913. * This checks if the received packet is matching any filter out
  914. * catogery and and drop the packet if it matches.
  915. *
  916. * Return: status(0 indicates drop, 1 indicate to no drop)
  917. */
  918. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  919. uint8_t *rx_tlv_hdr)
  920. {
  921. union dp_align_mac_addr mac_addr;
  922. struct dp_soc *soc = vdev->pdev->soc;
  923. if (qdf_unlikely(vdev->mesh_rx_filter)) {
  924. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_FROMDS)
  925. if (hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  926. rx_tlv_hdr))
  927. return QDF_STATUS_SUCCESS;
  928. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TODS)
  929. if (hal_rx_mpdu_get_to_ds(soc->hal_soc,
  930. rx_tlv_hdr))
  931. return QDF_STATUS_SUCCESS;
  932. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_NODS)
  933. if (!hal_rx_mpdu_get_fr_ds(soc->hal_soc,
  934. rx_tlv_hdr) &&
  935. !hal_rx_mpdu_get_to_ds(soc->hal_soc,
  936. rx_tlv_hdr))
  937. return QDF_STATUS_SUCCESS;
  938. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
  939. if (hal_rx_mpdu_get_addr1(soc->hal_soc,
  940. rx_tlv_hdr,
  941. &mac_addr.raw[0]))
  942. return QDF_STATUS_E_FAILURE;
  943. if (!qdf_mem_cmp(&mac_addr.raw[0],
  944. &vdev->mac_addr.raw[0],
  945. QDF_MAC_ADDR_SIZE))
  946. return QDF_STATUS_SUCCESS;
  947. }
  948. if (vdev->mesh_rx_filter & MESH_FILTER_OUT_TA) {
  949. if (hal_rx_mpdu_get_addr2(soc->hal_soc,
  950. rx_tlv_hdr,
  951. &mac_addr.raw[0]))
  952. return QDF_STATUS_E_FAILURE;
  953. if (!qdf_mem_cmp(&mac_addr.raw[0],
  954. &vdev->mac_addr.raw[0],
  955. QDF_MAC_ADDR_SIZE))
  956. return QDF_STATUS_SUCCESS;
  957. }
  958. }
  959. return QDF_STATUS_E_FAILURE;
  960. }
  961. #else
  962. void dp_rx_fill_mesh_stats(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  963. uint8_t *rx_tlv_hdr, struct dp_txrx_peer *peer)
  964. {
  965. }
  966. QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
  967. uint8_t *rx_tlv_hdr)
  968. {
  969. return QDF_STATUS_E_FAILURE;
  970. }
  971. #endif
  972. #ifdef FEATURE_NAC_RSSI
  973. /**
  974. * dp_rx_process_invalid_peer(): Function to pass invalid peer list to umac
  975. * @soc: DP SOC handle
  976. * @mpdu: mpdu for which peer is invalid
  977. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  978. * pool_id has same mapping)
  979. *
  980. * return: integer type
  981. */
  982. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  983. uint8_t mac_id)
  984. {
  985. struct dp_invalid_peer_msg msg;
  986. struct dp_vdev *vdev = NULL;
  987. struct dp_pdev *pdev = NULL;
  988. struct ieee80211_frame *wh;
  989. qdf_nbuf_t curr_nbuf, next_nbuf;
  990. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  991. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  992. if (!HAL_IS_DECAP_FORMAT_RAW(soc->hal_soc, rx_tlv_hdr)) {
  993. dp_rx_debug("%pK: Drop decapped frames", soc);
  994. goto free;
  995. }
  996. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  997. if (!DP_FRAME_IS_DATA(wh)) {
  998. dp_rx_debug("%pK: NAWDS valid only for data frames", soc);
  999. goto free;
  1000. }
  1001. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  1002. dp_rx_err("%pK: Invalid nbuf length", soc);
  1003. goto free;
  1004. }
  1005. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1006. if (!pdev || qdf_unlikely(pdev->is_pdev_down)) {
  1007. dp_rx_err("%pK: PDEV %s", soc, !pdev ? "not found" : "down");
  1008. goto free;
  1009. }
  1010. if (dp_monitor_filter_neighbour_peer(pdev, rx_pkt_hdr) ==
  1011. QDF_STATUS_SUCCESS)
  1012. return 0;
  1013. TAILQ_FOREACH(vdev, &pdev->vdev_list, vdev_list_elem) {
  1014. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1015. QDF_MAC_ADDR_SIZE) == 0) {
  1016. goto out;
  1017. }
  1018. }
  1019. if (!vdev) {
  1020. dp_rx_err("%pK: VDEV not found", soc);
  1021. goto free;
  1022. }
  1023. out:
  1024. msg.wh = wh;
  1025. qdf_nbuf_pull_head(mpdu, soc->rx_pkt_tlv_size);
  1026. msg.nbuf = mpdu;
  1027. msg.vdev_id = vdev->vdev_id;
  1028. /*
  1029. * NOTE: Only valid for HKv1.
  1030. * If smart monitor mode is enabled on RE, we are getting invalid
  1031. * peer frames with RA as STA mac of RE and the TA not matching
  1032. * with any NAC list or the the BSSID.Such frames need to dropped
  1033. * in order to avoid HM_WDS false addition.
  1034. */
  1035. if (pdev->soc->cdp_soc.ol_ops->rx_invalid_peer) {
  1036. if (dp_monitor_drop_inv_peer_pkts(vdev) == QDF_STATUS_SUCCESS) {
  1037. dp_rx_warn("%pK: Drop inv peer pkts with STA RA:%pm",
  1038. soc, wh->i_addr1);
  1039. goto free;
  1040. }
  1041. pdev->soc->cdp_soc.ol_ops->rx_invalid_peer(
  1042. (struct cdp_ctrl_objmgr_psoc *)soc->ctrl_psoc,
  1043. pdev->pdev_id, &msg);
  1044. }
  1045. free:
  1046. /* Drop and free packet */
  1047. curr_nbuf = mpdu;
  1048. while (curr_nbuf) {
  1049. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1050. dp_rx_nbuf_free(curr_nbuf);
  1051. curr_nbuf = next_nbuf;
  1052. }
  1053. return 0;
  1054. }
  1055. /**
  1056. * dp_rx_process_invalid_peer_wrapper(): Function to wrap invalid peer handler
  1057. * @soc: DP SOC handle
  1058. * @mpdu: mpdu for which peer is invalid
  1059. * @mpdu_done: if an mpdu is completed
  1060. * @mac_id: mac_id which is one of 3 mac_ids(Assuming mac_id and
  1061. * pool_id has same mapping)
  1062. *
  1063. * return: integer type
  1064. */
  1065. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1066. qdf_nbuf_t mpdu, bool mpdu_done,
  1067. uint8_t mac_id)
  1068. {
  1069. /* Only trigger the process when mpdu is completed */
  1070. if (mpdu_done)
  1071. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1072. }
  1073. #else
  1074. uint8_t dp_rx_process_invalid_peer(struct dp_soc *soc, qdf_nbuf_t mpdu,
  1075. uint8_t mac_id)
  1076. {
  1077. qdf_nbuf_t curr_nbuf, next_nbuf;
  1078. struct dp_pdev *pdev;
  1079. struct dp_vdev *vdev = NULL;
  1080. struct ieee80211_frame *wh;
  1081. uint8_t *rx_tlv_hdr = qdf_nbuf_data(mpdu);
  1082. uint8_t *rx_pkt_hdr = hal_rx_pkt_hdr_get(soc->hal_soc, rx_tlv_hdr);
  1083. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  1084. if (!DP_FRAME_IS_DATA(wh)) {
  1085. QDF_TRACE_ERROR_RL(QDF_MODULE_ID_DP,
  1086. "only for data frames");
  1087. goto free;
  1088. }
  1089. if (qdf_nbuf_len(mpdu) < sizeof(struct ieee80211_frame)) {
  1090. dp_rx_info_rl("%pK: Invalid nbuf length", soc);
  1091. goto free;
  1092. }
  1093. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1094. if (!pdev) {
  1095. dp_rx_info_rl("%pK: PDEV not found", soc);
  1096. goto free;
  1097. }
  1098. qdf_spin_lock_bh(&pdev->vdev_list_lock);
  1099. DP_PDEV_ITERATE_VDEV_LIST(pdev, vdev) {
  1100. if (qdf_mem_cmp(wh->i_addr1, vdev->mac_addr.raw,
  1101. QDF_MAC_ADDR_SIZE) == 0) {
  1102. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1103. goto out;
  1104. }
  1105. }
  1106. qdf_spin_unlock_bh(&pdev->vdev_list_lock);
  1107. if (!vdev) {
  1108. dp_rx_info_rl("%pK: VDEV not found", soc);
  1109. goto free;
  1110. }
  1111. out:
  1112. if (soc->cdp_soc.ol_ops->rx_invalid_peer)
  1113. soc->cdp_soc.ol_ops->rx_invalid_peer(vdev->vdev_id, wh);
  1114. free:
  1115. /* reset the head and tail pointers */
  1116. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1117. if (pdev) {
  1118. pdev->invalid_peer_head_msdu = NULL;
  1119. pdev->invalid_peer_tail_msdu = NULL;
  1120. }
  1121. /* Drop and free packet */
  1122. curr_nbuf = mpdu;
  1123. while (curr_nbuf) {
  1124. next_nbuf = qdf_nbuf_next(curr_nbuf);
  1125. dp_rx_nbuf_free(curr_nbuf);
  1126. curr_nbuf = next_nbuf;
  1127. }
  1128. /* Reset the head and tail pointers */
  1129. pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  1130. if (pdev) {
  1131. pdev->invalid_peer_head_msdu = NULL;
  1132. pdev->invalid_peer_tail_msdu = NULL;
  1133. }
  1134. return 0;
  1135. }
  1136. void dp_rx_process_invalid_peer_wrapper(struct dp_soc *soc,
  1137. qdf_nbuf_t mpdu, bool mpdu_done,
  1138. uint8_t mac_id)
  1139. {
  1140. /* Process the nbuf */
  1141. dp_rx_process_invalid_peer(soc, mpdu, mac_id);
  1142. }
  1143. #endif
  1144. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1145. #ifdef RECEIVE_OFFLOAD
  1146. /**
  1147. * dp_rx_print_offload_info() - Print offload info from RX TLV
  1148. * @soc: dp soc handle
  1149. * @msdu: MSDU for which the offload info is to be printed
  1150. *
  1151. * Return: None
  1152. */
  1153. static void dp_rx_print_offload_info(struct dp_soc *soc,
  1154. qdf_nbuf_t msdu)
  1155. {
  1156. dp_verbose_debug("----------------------RX DESC LRO/GRO----------------------");
  1157. dp_verbose_debug("lro_eligible 0x%x",
  1158. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu));
  1159. dp_verbose_debug("pure_ack 0x%x", QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu));
  1160. dp_verbose_debug("chksum 0x%x", QDF_NBUF_CB_RX_TCP_CHKSUM(msdu));
  1161. dp_verbose_debug("TCP seq num 0x%x", QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu));
  1162. dp_verbose_debug("TCP ack num 0x%x", QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu));
  1163. dp_verbose_debug("TCP window 0x%x", QDF_NBUF_CB_RX_TCP_WIN(msdu));
  1164. dp_verbose_debug("TCP protocol 0x%x", QDF_NBUF_CB_RX_TCP_PROTO(msdu));
  1165. dp_verbose_debug("TCP offset 0x%x", QDF_NBUF_CB_RX_TCP_OFFSET(msdu));
  1166. dp_verbose_debug("toeplitz 0x%x", QDF_NBUF_CB_RX_FLOW_ID(msdu));
  1167. dp_verbose_debug("---------------------------------------------------------");
  1168. }
  1169. /**
  1170. * dp_rx_fill_gro_info() - Fill GRO info from RX TLV into skb->cb
  1171. * @soc: DP SOC handle
  1172. * @rx_tlv: RX TLV received for the msdu
  1173. * @msdu: msdu for which GRO info needs to be filled
  1174. * @rx_ol_pkt_cnt: counter to be incremented for GRO eligible packets
  1175. *
  1176. * Return: None
  1177. */
  1178. void dp_rx_fill_gro_info(struct dp_soc *soc, uint8_t *rx_tlv,
  1179. qdf_nbuf_t msdu, uint32_t *rx_ol_pkt_cnt)
  1180. {
  1181. struct hal_offload_info offload_info;
  1182. if (!wlan_cfg_is_gro_enabled(soc->wlan_cfg_ctx))
  1183. return;
  1184. if (hal_rx_tlv_get_offload_info(soc->hal_soc, rx_tlv, &offload_info))
  1185. return;
  1186. *rx_ol_pkt_cnt = *rx_ol_pkt_cnt + 1;
  1187. QDF_NBUF_CB_RX_LRO_ELIGIBLE(msdu) = offload_info.lro_eligible;
  1188. QDF_NBUF_CB_RX_TCP_PURE_ACK(msdu) = offload_info.tcp_pure_ack;
  1189. QDF_NBUF_CB_RX_TCP_CHKSUM(msdu) =
  1190. hal_rx_tlv_get_tcp_chksum(soc->hal_soc,
  1191. rx_tlv);
  1192. QDF_NBUF_CB_RX_TCP_SEQ_NUM(msdu) = offload_info.tcp_seq_num;
  1193. QDF_NBUF_CB_RX_TCP_ACK_NUM(msdu) = offload_info.tcp_ack_num;
  1194. QDF_NBUF_CB_RX_TCP_WIN(msdu) = offload_info.tcp_win;
  1195. QDF_NBUF_CB_RX_TCP_PROTO(msdu) = offload_info.tcp_proto;
  1196. QDF_NBUF_CB_RX_IPV6_PROTO(msdu) = offload_info.ipv6_proto;
  1197. QDF_NBUF_CB_RX_TCP_OFFSET(msdu) = offload_info.tcp_offset;
  1198. QDF_NBUF_CB_RX_FLOW_ID(msdu) = offload_info.flow_id;
  1199. dp_rx_print_offload_info(soc, msdu);
  1200. }
  1201. #endif /* RECEIVE_OFFLOAD */
  1202. /**
  1203. * dp_rx_adjust_nbuf_len() - set appropriate msdu length in nbuf.
  1204. *
  1205. * @soc: DP soc handle
  1206. * @nbuf: pointer to msdu.
  1207. * @mpdu_len: mpdu length
  1208. * @l3_pad_len: L3 padding length by HW
  1209. *
  1210. * Return: returns true if nbuf is last msdu of mpdu else retuns false.
  1211. */
  1212. static inline bool dp_rx_adjust_nbuf_len(struct dp_soc *soc,
  1213. qdf_nbuf_t nbuf,
  1214. uint16_t *mpdu_len,
  1215. uint32_t l3_pad_len)
  1216. {
  1217. bool last_nbuf;
  1218. uint32_t pkt_hdr_size;
  1219. pkt_hdr_size = soc->rx_pkt_tlv_size + l3_pad_len;
  1220. if ((*mpdu_len + pkt_hdr_size) > RX_DATA_BUFFER_SIZE) {
  1221. qdf_nbuf_set_pktlen(nbuf, RX_DATA_BUFFER_SIZE);
  1222. last_nbuf = false;
  1223. *mpdu_len -= (RX_DATA_BUFFER_SIZE - pkt_hdr_size);
  1224. } else {
  1225. qdf_nbuf_set_pktlen(nbuf, (*mpdu_len + pkt_hdr_size));
  1226. last_nbuf = true;
  1227. *mpdu_len = 0;
  1228. }
  1229. return last_nbuf;
  1230. }
  1231. /**
  1232. * dp_get_l3_hdr_pad_len() - get L3 header padding length.
  1233. *
  1234. * @soc: DP soc handle
  1235. * @nbuf: pointer to msdu.
  1236. *
  1237. * Return: returns padding length in bytes.
  1238. */
  1239. static inline uint32_t dp_get_l3_hdr_pad_len(struct dp_soc *soc,
  1240. qdf_nbuf_t nbuf)
  1241. {
  1242. uint32_t l3_hdr_pad = 0;
  1243. uint8_t *rx_tlv_hdr;
  1244. struct hal_rx_msdu_metadata msdu_metadata;
  1245. while (nbuf) {
  1246. if (!qdf_nbuf_is_rx_chfrag_cont(nbuf)) {
  1247. /* scattered msdu end with continuation is 0 */
  1248. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  1249. hal_rx_msdu_metadata_get(soc->hal_soc,
  1250. rx_tlv_hdr,
  1251. &msdu_metadata);
  1252. l3_hdr_pad = msdu_metadata.l3_hdr_pad;
  1253. break;
  1254. }
  1255. nbuf = nbuf->next;
  1256. }
  1257. return l3_hdr_pad;
  1258. }
  1259. /**
  1260. * dp_rx_sg_create() - create a frag_list for MSDUs which are spread across
  1261. * multiple nbufs.
  1262. * @soc: DP SOC handle
  1263. * @nbuf: pointer to the first msdu of an amsdu.
  1264. *
  1265. * This function implements the creation of RX frag_list for cases
  1266. * where an MSDU is spread across multiple nbufs.
  1267. *
  1268. * Return: returns the head nbuf which contains complete frag_list.
  1269. */
  1270. qdf_nbuf_t dp_rx_sg_create(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1271. {
  1272. qdf_nbuf_t parent, frag_list, next = NULL;
  1273. uint16_t frag_list_len = 0;
  1274. uint16_t mpdu_len;
  1275. bool last_nbuf;
  1276. uint32_t l3_hdr_pad_offset = 0;
  1277. /*
  1278. * Use msdu len got from REO entry descriptor instead since
  1279. * there is case the RX PKT TLV is corrupted while msdu_len
  1280. * from REO descriptor is right for non-raw RX scatter msdu.
  1281. */
  1282. mpdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1283. /*
  1284. * this is a case where the complete msdu fits in one single nbuf.
  1285. * in this case HW sets both start and end bit and we only need to
  1286. * reset these bits for RAW mode simulator to decap the pkt
  1287. */
  1288. if (qdf_nbuf_is_rx_chfrag_start(nbuf) &&
  1289. qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1290. qdf_nbuf_set_pktlen(nbuf, mpdu_len + soc->rx_pkt_tlv_size);
  1291. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size);
  1292. return nbuf;
  1293. }
  1294. l3_hdr_pad_offset = dp_get_l3_hdr_pad_len(soc, nbuf);
  1295. /*
  1296. * This is a case where we have multiple msdus (A-MSDU) spread across
  1297. * multiple nbufs. here we create a fraglist out of these nbufs.
  1298. *
  1299. * the moment we encounter a nbuf with continuation bit set we
  1300. * know for sure we have an MSDU which is spread across multiple
  1301. * nbufs. We loop through and reap nbufs till we reach last nbuf.
  1302. */
  1303. parent = nbuf;
  1304. frag_list = nbuf->next;
  1305. nbuf = nbuf->next;
  1306. /*
  1307. * set the start bit in the first nbuf we encounter with continuation
  1308. * bit set. This has the proper mpdu length set as it is the first
  1309. * msdu of the mpdu. this becomes the parent nbuf and the subsequent
  1310. * nbufs will form the frag_list of the parent nbuf.
  1311. */
  1312. qdf_nbuf_set_rx_chfrag_start(parent, 1);
  1313. /*
  1314. * L3 header padding is only needed for the 1st buffer
  1315. * in a scattered msdu
  1316. */
  1317. last_nbuf = dp_rx_adjust_nbuf_len(soc, parent, &mpdu_len,
  1318. l3_hdr_pad_offset);
  1319. /*
  1320. * MSDU cont bit is set but reported MPDU length can fit
  1321. * in to single buffer
  1322. *
  1323. * Increment error stats and avoid SG list creation
  1324. */
  1325. if (last_nbuf) {
  1326. DP_STATS_INC(soc, rx.err.msdu_continuation_err, 1);
  1327. qdf_nbuf_pull_head(parent,
  1328. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1329. return parent;
  1330. }
  1331. /*
  1332. * this is where we set the length of the fragments which are
  1333. * associated to the parent nbuf. We iterate through the frag_list
  1334. * till we hit the last_nbuf of the list.
  1335. */
  1336. do {
  1337. last_nbuf = dp_rx_adjust_nbuf_len(soc, nbuf, &mpdu_len, 0);
  1338. qdf_nbuf_pull_head(nbuf,
  1339. soc->rx_pkt_tlv_size);
  1340. frag_list_len += qdf_nbuf_len(nbuf);
  1341. if (last_nbuf) {
  1342. next = nbuf->next;
  1343. nbuf->next = NULL;
  1344. break;
  1345. } else if (qdf_nbuf_is_rx_chfrag_end(nbuf)) {
  1346. dp_err("Invalid packet length\n");
  1347. qdf_assert_always(0);
  1348. }
  1349. nbuf = nbuf->next;
  1350. } while (!last_nbuf);
  1351. qdf_nbuf_set_rx_chfrag_start(nbuf, 0);
  1352. qdf_nbuf_append_ext_list(parent, frag_list, frag_list_len);
  1353. parent->next = next;
  1354. qdf_nbuf_pull_head(parent,
  1355. soc->rx_pkt_tlv_size + l3_hdr_pad_offset);
  1356. return parent;
  1357. }
  1358. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  1359. #ifdef QCA_PEER_EXT_STATS
  1360. /*
  1361. * dp_rx_compute_tid_delay - Computer per TID delay stats
  1362. * @peer: DP soc context
  1363. * @nbuf: NBuffer
  1364. *
  1365. * Return: Void
  1366. */
  1367. void dp_rx_compute_tid_delay(struct cdp_delay_tid_stats *stats,
  1368. qdf_nbuf_t nbuf)
  1369. {
  1370. struct cdp_delay_rx_stats *rx_delay = &stats->rx_delay;
  1371. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1372. dp_hist_update_stats(&rx_delay->to_stack_delay, to_stack);
  1373. }
  1374. #endif /* QCA_PEER_EXT_STATS */
  1375. /**
  1376. * dp_rx_compute_delay() - Compute and fill in all timestamps
  1377. * to pass in correct fields
  1378. *
  1379. * @vdev: pdev handle
  1380. * @tx_desc: tx descriptor
  1381. * @tid: tid value
  1382. * Return: none
  1383. */
  1384. void dp_rx_compute_delay(struct dp_vdev *vdev, qdf_nbuf_t nbuf)
  1385. {
  1386. uint8_t ring_id = QDF_NBUF_CB_RX_CTX_ID(nbuf);
  1387. int64_t current_ts = qdf_ktime_to_ms(qdf_ktime_get());
  1388. uint32_t to_stack = qdf_nbuf_get_timedelta_ms(nbuf);
  1389. uint8_t tid = qdf_nbuf_get_tid_val(nbuf);
  1390. uint32_t interframe_delay =
  1391. (uint32_t)(current_ts - vdev->prev_rx_deliver_tstamp);
  1392. dp_update_delay_stats(vdev->pdev, to_stack, tid,
  1393. CDP_DELAY_STATS_REAP_STACK, ring_id);
  1394. /*
  1395. * Update interframe delay stats calculated at deliver_data_ol point.
  1396. * Value of vdev->prev_rx_deliver_tstamp will be 0 for 1st frame, so
  1397. * interframe delay will not be calculate correctly for 1st frame.
  1398. * On the other side, this will help in avoiding extra per packet check
  1399. * of vdev->prev_rx_deliver_tstamp.
  1400. */
  1401. dp_update_delay_stats(vdev->pdev, interframe_delay, tid,
  1402. CDP_DELAY_STATS_RX_INTERFRAME, ring_id);
  1403. vdev->prev_rx_deliver_tstamp = current_ts;
  1404. }
  1405. /**
  1406. * dp_rx_drop_nbuf_list() - drop an nbuf list
  1407. * @pdev: dp pdev reference
  1408. * @buf_list: buffer list to be dropepd
  1409. *
  1410. * Return: int (number of bufs dropped)
  1411. */
  1412. static inline int dp_rx_drop_nbuf_list(struct dp_pdev *pdev,
  1413. qdf_nbuf_t buf_list)
  1414. {
  1415. struct cdp_tid_rx_stats *stats = NULL;
  1416. uint8_t tid = 0, ring_id = 0;
  1417. int num_dropped = 0;
  1418. qdf_nbuf_t buf, next_buf;
  1419. buf = buf_list;
  1420. while (buf) {
  1421. ring_id = QDF_NBUF_CB_RX_CTX_ID(buf);
  1422. next_buf = qdf_nbuf_queue_next(buf);
  1423. tid = qdf_nbuf_get_tid_val(buf);
  1424. if (qdf_likely(pdev)) {
  1425. stats = &pdev->stats.tid_stats.tid_rx_stats[ring_id][tid];
  1426. stats->fail_cnt[INVALID_PEER_VDEV]++;
  1427. stats->delivered_to_stack--;
  1428. }
  1429. dp_rx_nbuf_free(buf);
  1430. buf = next_buf;
  1431. num_dropped++;
  1432. }
  1433. return num_dropped;
  1434. }
  1435. #ifdef QCA_SUPPORT_WDS_EXTENDED
  1436. /**
  1437. * dp_rx_deliver_to_stack_ext() - Deliver to netdev per sta
  1438. * @soc: core txrx main context
  1439. * @vdev: vdev
  1440. * @txrx_peer: txrx peer
  1441. * @nbuf_head: skb list head
  1442. *
  1443. * Return: true if packet is delivered to netdev per STA.
  1444. */
  1445. static inline bool
  1446. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1447. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1448. {
  1449. /*
  1450. * When extended WDS is disabled, frames are sent to AP netdevice.
  1451. */
  1452. if (qdf_likely(!vdev->wds_ext_enabled))
  1453. return false;
  1454. /*
  1455. * There can be 2 cases:
  1456. * 1. Send frame to parent netdev if its not for netdev per STA
  1457. * 2. If frame is meant for netdev per STA:
  1458. * a. Send frame to appropriate netdev using registered fp.
  1459. * b. If fp is NULL, drop the frames.
  1460. */
  1461. if (!txrx_peer->wds_ext.init)
  1462. return false;
  1463. if (txrx_peer->osif_rx)
  1464. txrx_peer->osif_rx(txrx_peer->wds_ext.osif_peer, nbuf_head);
  1465. else
  1466. dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1467. return true;
  1468. }
  1469. #else
  1470. static inline bool
  1471. dp_rx_deliver_to_stack_ext(struct dp_soc *soc, struct dp_vdev *vdev,
  1472. struct dp_txrx_peer *txrx_peer, qdf_nbuf_t nbuf_head)
  1473. {
  1474. return false;
  1475. }
  1476. #endif
  1477. #ifdef PEER_CACHE_RX_PKTS
  1478. /**
  1479. * dp_rx_flush_rx_cached() - flush cached rx frames
  1480. * @peer: peer
  1481. * @drop: flag to drop frames or forward to net stack
  1482. *
  1483. * Return: None
  1484. */
  1485. void dp_rx_flush_rx_cached(struct dp_peer *peer, bool drop)
  1486. {
  1487. struct dp_peer_cached_bufq *bufqi;
  1488. struct dp_rx_cached_buf *cache_buf = NULL;
  1489. ol_txrx_rx_fp data_rx = NULL;
  1490. int num_buff_elem;
  1491. QDF_STATUS status;
  1492. /*
  1493. * Flush dp cached frames only for mld peers and legacy peers, as
  1494. * link peers don't store cached frames
  1495. */
  1496. if (IS_MLO_DP_LINK_PEER(peer))
  1497. return;
  1498. if (!peer->txrx_peer) {
  1499. if (!peer->sta_self_peer) {
  1500. qdf_err("txrx_peer NULL!!");
  1501. qdf_assert_always(0);
  1502. }
  1503. return;
  1504. }
  1505. if (qdf_atomic_inc_return(&peer->txrx_peer->flush_in_progress) > 1) {
  1506. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1507. return;
  1508. }
  1509. qdf_spin_lock_bh(&peer->peer_info_lock);
  1510. if (peer->state >= OL_TXRX_PEER_STATE_CONN && peer->vdev->osif_rx)
  1511. data_rx = peer->vdev->osif_rx;
  1512. else
  1513. drop = true;
  1514. qdf_spin_unlock_bh(&peer->peer_info_lock);
  1515. bufqi = &peer->txrx_peer->bufq_info;
  1516. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1517. qdf_list_remove_front(&bufqi->cached_bufq,
  1518. (qdf_list_node_t **)&cache_buf);
  1519. while (cache_buf) {
  1520. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(
  1521. cache_buf->buf);
  1522. bufqi->entries -= num_buff_elem;
  1523. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1524. if (drop) {
  1525. bufqi->dropped = dp_rx_drop_nbuf_list(peer->vdev->pdev,
  1526. cache_buf->buf);
  1527. } else {
  1528. /* Flush the cached frames to OSIF DEV */
  1529. status = data_rx(peer->vdev->osif_vdev, cache_buf->buf);
  1530. if (status != QDF_STATUS_SUCCESS)
  1531. bufqi->dropped = dp_rx_drop_nbuf_list(
  1532. peer->vdev->pdev,
  1533. cache_buf->buf);
  1534. }
  1535. qdf_mem_free(cache_buf);
  1536. cache_buf = NULL;
  1537. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1538. qdf_list_remove_front(&bufqi->cached_bufq,
  1539. (qdf_list_node_t **)&cache_buf);
  1540. }
  1541. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1542. qdf_atomic_dec(&peer->txrx_peer->flush_in_progress);
  1543. }
  1544. /**
  1545. * dp_rx_enqueue_rx() - cache rx frames
  1546. * @peer: peer
  1547. * @rx_buf_list: cache buffer list
  1548. *
  1549. * Return: None
  1550. */
  1551. static QDF_STATUS
  1552. dp_rx_enqueue_rx(struct dp_txrx_peer *txrx_peer, qdf_nbuf_t rx_buf_list)
  1553. {
  1554. struct dp_rx_cached_buf *cache_buf;
  1555. struct dp_peer_cached_bufq *bufqi = &txrx_peer->bufq_info;
  1556. int num_buff_elem;
  1557. QDF_STATUS ret = QDF_STATUS_SUCCESS;
  1558. struct dp_soc *soc = txrx_peer->vdev->pdev->soc;
  1559. struct dp_peer *peer = dp_peer_get_ref_by_id(soc, txrx_peer->peer_id,
  1560. DP_MOD_ID_RX);
  1561. if (!peer) {
  1562. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1563. rx_buf_list);
  1564. return QDF_STATUS_E_INVAL;
  1565. }
  1566. dp_debug_rl("bufq->curr %d bufq->drops %d", bufqi->entries,
  1567. bufqi->dropped);
  1568. if (!peer->valid) {
  1569. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1570. rx_buf_list);
  1571. ret = QDF_STATUS_E_INVAL;
  1572. goto fail;
  1573. }
  1574. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1575. if (bufqi->entries >= bufqi->thresh) {
  1576. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1577. rx_buf_list);
  1578. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1579. ret = QDF_STATUS_E_RESOURCES;
  1580. goto fail;
  1581. }
  1582. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1583. num_buff_elem = QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(rx_buf_list);
  1584. cache_buf = qdf_mem_malloc_atomic(sizeof(*cache_buf));
  1585. if (!cache_buf) {
  1586. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  1587. "Failed to allocate buf to cache rx frames");
  1588. bufqi->dropped = dp_rx_drop_nbuf_list(txrx_peer->vdev->pdev,
  1589. rx_buf_list);
  1590. ret = QDF_STATUS_E_NOMEM;
  1591. goto fail;
  1592. }
  1593. cache_buf->buf = rx_buf_list;
  1594. qdf_spin_lock_bh(&bufqi->bufq_lock);
  1595. qdf_list_insert_back(&bufqi->cached_bufq,
  1596. &cache_buf->node);
  1597. bufqi->entries += num_buff_elem;
  1598. qdf_spin_unlock_bh(&bufqi->bufq_lock);
  1599. fail:
  1600. dp_peer_unref_delete(peer, DP_MOD_ID_RX);
  1601. return ret;
  1602. }
  1603. static inline
  1604. bool dp_rx_is_peer_cache_bufq_supported(void)
  1605. {
  1606. return true;
  1607. }
  1608. #else
  1609. static inline
  1610. bool dp_rx_is_peer_cache_bufq_supported(void)
  1611. {
  1612. return false;
  1613. }
  1614. static inline QDF_STATUS
  1615. dp_rx_enqueue_rx(struct dp_txrx_peer *txrx_peer, qdf_nbuf_t rx_buf_list)
  1616. {
  1617. return QDF_STATUS_SUCCESS;
  1618. }
  1619. #endif
  1620. #ifndef DELIVERY_TO_STACK_STATUS_CHECK
  1621. /**
  1622. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1623. * using the appropriate call back functions.
  1624. * @soc: soc
  1625. * @vdev: vdev
  1626. * @peer: peer
  1627. * @nbuf_head: skb list head
  1628. * @nbuf_tail: skb list tail
  1629. *
  1630. * Return: None
  1631. */
  1632. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1633. struct dp_vdev *vdev,
  1634. struct dp_txrx_peer *txrx_peer,
  1635. qdf_nbuf_t nbuf_head)
  1636. {
  1637. if (qdf_unlikely(dp_rx_deliver_to_stack_ext(soc, vdev,
  1638. txrx_peer, nbuf_head)))
  1639. return;
  1640. /* Function pointer initialized only when FISA is enabled */
  1641. if (vdev->osif_fisa_rx)
  1642. /* on failure send it via regular path */
  1643. vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1644. else
  1645. vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1646. }
  1647. #else
  1648. /**
  1649. * dp_rx_check_delivery_to_stack() - Deliver pkts to network
  1650. * using the appropriate call back functions.
  1651. * @soc: soc
  1652. * @vdev: vdev
  1653. * @txrx_peer: txrx peer
  1654. * @nbuf_head: skb list head
  1655. * @nbuf_tail: skb list tail
  1656. *
  1657. * Check the return status of the call back function and drop
  1658. * the packets if the return status indicates a failure.
  1659. *
  1660. * Return: None
  1661. */
  1662. static void dp_rx_check_delivery_to_stack(struct dp_soc *soc,
  1663. struct dp_vdev *vdev,
  1664. struct dp_txrx_peer *txrx_peer,
  1665. qdf_nbuf_t nbuf_head)
  1666. {
  1667. int num_nbuf = 0;
  1668. QDF_STATUS ret_val = QDF_STATUS_E_FAILURE;
  1669. /* Function pointer initialized only when FISA is enabled */
  1670. if (vdev->osif_fisa_rx)
  1671. /* on failure send it via regular path */
  1672. ret_val = vdev->osif_fisa_rx(soc, vdev, nbuf_head);
  1673. else if (vdev->osif_rx)
  1674. ret_val = vdev->osif_rx(vdev->osif_vdev, nbuf_head);
  1675. if (!QDF_IS_STATUS_SUCCESS(ret_val)) {
  1676. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev, nbuf_head);
  1677. DP_STATS_INC(soc, rx.err.rejected, num_nbuf);
  1678. if (txrx_peer)
  1679. DP_PEER_STATS_FLAT_DEC(txrx_peer, to_stack.num,
  1680. num_nbuf);
  1681. }
  1682. }
  1683. #endif /* ifdef DELIVERY_TO_STACK_STATUS_CHECK */
  1684. /*
  1685. * dp_rx_validate_rx_callbacks() - validate rx callbacks
  1686. * @soc DP soc
  1687. * @vdev: DP vdev handle
  1688. * @txrx_peer: pointer to the txrx peer object
  1689. * nbuf_head: skb list head
  1690. *
  1691. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  1692. * QDF_STATUS_E_FAILURE
  1693. */
  1694. static inline QDF_STATUS
  1695. dp_rx_validate_rx_callbacks(struct dp_soc *soc,
  1696. struct dp_vdev *vdev,
  1697. struct dp_txrx_peer *txrx_peer,
  1698. qdf_nbuf_t nbuf_head)
  1699. {
  1700. int num_nbuf;
  1701. if (qdf_unlikely(!vdev || vdev->delete.pending)) {
  1702. num_nbuf = dp_rx_drop_nbuf_list(NULL, nbuf_head);
  1703. /*
  1704. * This is a special case where vdev is invalid,
  1705. * so we cannot know the pdev to which this packet
  1706. * belonged. Hence we update the soc rx error stats.
  1707. */
  1708. DP_STATS_INC(soc, rx.err.invalid_vdev, num_nbuf);
  1709. return QDF_STATUS_E_FAILURE;
  1710. }
  1711. /*
  1712. * highly unlikely to have a vdev without a registered rx
  1713. * callback function. if so let us free the nbuf_list.
  1714. */
  1715. if (qdf_unlikely(!vdev->osif_rx)) {
  1716. if (txrx_peer && dp_rx_is_peer_cache_bufq_supported()) {
  1717. dp_rx_enqueue_rx(txrx_peer, nbuf_head);
  1718. } else {
  1719. num_nbuf = dp_rx_drop_nbuf_list(vdev->pdev,
  1720. nbuf_head);
  1721. DP_PEER_TO_STACK_DECC(txrx_peer, num_nbuf,
  1722. vdev->pdev->enhanced_stats_en);
  1723. }
  1724. return QDF_STATUS_E_FAILURE;
  1725. }
  1726. return QDF_STATUS_SUCCESS;
  1727. }
  1728. QDF_STATUS dp_rx_deliver_to_stack(struct dp_soc *soc,
  1729. struct dp_vdev *vdev,
  1730. struct dp_txrx_peer *txrx_peer,
  1731. qdf_nbuf_t nbuf_head,
  1732. qdf_nbuf_t nbuf_tail)
  1733. {
  1734. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  1735. QDF_STATUS_SUCCESS)
  1736. return QDF_STATUS_E_FAILURE;
  1737. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw) ||
  1738. (vdev->rx_decap_type == htt_cmn_pkt_type_native_wifi)) {
  1739. vdev->osif_rsim_rx_decap(vdev->osif_vdev, &nbuf_head,
  1740. &nbuf_tail);
  1741. }
  1742. dp_rx_check_delivery_to_stack(soc, vdev, txrx_peer, nbuf_head);
  1743. return QDF_STATUS_SUCCESS;
  1744. }
  1745. #ifdef QCA_SUPPORT_EAPOL_OVER_CONTROL_PORT
  1746. QDF_STATUS dp_rx_eapol_deliver_to_stack(struct dp_soc *soc,
  1747. struct dp_vdev *vdev,
  1748. struct dp_txrx_peer *txrx_peer,
  1749. qdf_nbuf_t nbuf_head,
  1750. qdf_nbuf_t nbuf_tail)
  1751. {
  1752. if (dp_rx_validate_rx_callbacks(soc, vdev, txrx_peer, nbuf_head) !=
  1753. QDF_STATUS_SUCCESS)
  1754. return QDF_STATUS_E_FAILURE;
  1755. vdev->osif_rx_eapol(vdev->osif_vdev, nbuf_head);
  1756. return QDF_STATUS_SUCCESS;
  1757. }
  1758. #endif
  1759. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  1760. #ifdef VDEV_PEER_PROTOCOL_COUNT
  1761. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, txrx_peer) \
  1762. { \
  1763. qdf_nbuf_t nbuf_local; \
  1764. struct dp_txrx_peer *txrx_peer_local; \
  1765. struct dp_vdev *vdev_local = vdev_hdl; \
  1766. do { \
  1767. if (qdf_likely(!((vdev_local)->peer_protocol_count_track))) \
  1768. break; \
  1769. nbuf_local = nbuf; \
  1770. txrx_peer_local = txrx_peer; \
  1771. if (qdf_unlikely(qdf_nbuf_is_frag((nbuf_local)))) \
  1772. break; \
  1773. else if (qdf_unlikely(qdf_nbuf_is_raw_frame((nbuf_local)))) \
  1774. break; \
  1775. dp_vdev_peer_stats_update_protocol_cnt((vdev_local), \
  1776. (nbuf_local), \
  1777. (txrx_peer_local), 0, 1); \
  1778. } while (0); \
  1779. }
  1780. #else
  1781. #define dp_rx_msdu_stats_update_prot_cnts(vdev_hdl, nbuf, txrx_peer)
  1782. #endif
  1783. #ifndef QCA_ENHANCED_STATS_SUPPORT
  1784. /**
  1785. * dp_rx_msdu_extd_stats_update(): Update Rx extended path stats for peer
  1786. *
  1787. * @soc: datapath soc handle
  1788. * @nbuf: received msdu buffer
  1789. * @rx_tlv_hdr: rx tlv header
  1790. * @txrx_peer: datapath txrx_peer handle
  1791. *
  1792. * Return: void
  1793. */
  1794. static inline
  1795. void dp_rx_msdu_extd_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1796. uint8_t *rx_tlv_hdr,
  1797. struct dp_txrx_peer *txrx_peer)
  1798. {
  1799. bool is_ampdu;
  1800. uint32_t sgi, mcs, tid, nss, bw, reception_type, pkt_type;
  1801. /*
  1802. * TODO - For KIWI this field is present in ring_desc
  1803. * Try to use ring desc instead of tlv.
  1804. */
  1805. is_ampdu = hal_rx_mpdu_info_ampdu_flag_get(soc->hal_soc, rx_tlv_hdr);
  1806. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.ampdu_cnt, 1, is_ampdu);
  1807. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.non_ampdu_cnt, 1, !(is_ampdu));
  1808. sgi = hal_rx_tlv_sgi_get(soc->hal_soc, rx_tlv_hdr);
  1809. mcs = hal_rx_tlv_rate_mcs_get(soc->hal_soc, rx_tlv_hdr);
  1810. tid = qdf_nbuf_get_tid_val(nbuf);
  1811. bw = hal_rx_tlv_bw_get(soc->hal_soc, rx_tlv_hdr);
  1812. reception_type = hal_rx_msdu_start_reception_type_get(soc->hal_soc,
  1813. rx_tlv_hdr);
  1814. nss = hal_rx_msdu_start_nss_get(soc->hal_soc, rx_tlv_hdr);
  1815. pkt_type = hal_rx_tlv_get_pkt_type(soc->hal_soc, rx_tlv_hdr);
  1816. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.rx_mpdu_cnt[mcs], 1,
  1817. ((mcs < MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1818. DP_PEER_EXTD_STATS_INCC(txrx_peer, rx.rx_mpdu_cnt[MAX_MCS - 1], 1,
  1819. ((mcs >= MAX_MCS) && QDF_NBUF_CB_RX_CHFRAG_START(nbuf)));
  1820. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.bw[bw], 1);
  1821. /*
  1822. * only if nss > 0 and pkt_type is 11N/AC/AX,
  1823. * then increase index [nss - 1] in array counter.
  1824. */
  1825. if (nss > 0 && (pkt_type == DOT11_N ||
  1826. pkt_type == DOT11_AC ||
  1827. pkt_type == DOT11_AX))
  1828. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.nss[nss - 1], 1);
  1829. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.sgi_count[sgi], 1);
  1830. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.err.mic_err, 1,
  1831. hal_rx_tlv_mic_err_get(soc->hal_soc,
  1832. rx_tlv_hdr));
  1833. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.err.decrypt_err, 1,
  1834. hal_rx_tlv_decrypt_err_get(soc->hal_soc,
  1835. rx_tlv_hdr));
  1836. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.wme_ac_type[TID_TO_WME_AC(tid)], 1);
  1837. DP_PEER_EXTD_STATS_INC(txrx_peer, rx.reception_type[reception_type], 1);
  1838. DP_PEER_EXTD_STATS_INCC(txrx_peer,
  1839. rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1840. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1841. DP_PEER_EXTD_STATS_INCC(txrx_peer,
  1842. rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1843. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_A)));
  1844. DP_PEER_EXTD_STATS_INCC(txrx_peer,
  1845. rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1846. ((mcs >= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1847. DP_PEER_EXTD_STATS_INCC(txrx_peer,
  1848. rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1849. ((mcs <= MAX_MCS_11B) && (pkt_type == DOT11_B)));
  1850. DP_PEER_EXTD_STATS_INCC(txrx_peer,
  1851. rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1852. ((mcs >= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1853. DP_PEER_EXTD_STATS_INCC(txrx_peer,
  1854. rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1855. ((mcs <= MAX_MCS_11A) && (pkt_type == DOT11_N)));
  1856. DP_PEER_EXTD_STATS_INCC(txrx_peer,
  1857. rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1858. ((mcs >= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1859. DP_PEER_EXTD_STATS_INCC(txrx_peer,
  1860. rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1861. ((mcs <= MAX_MCS_11AC) && (pkt_type == DOT11_AC)));
  1862. DP_PEER_EXTD_STATS_INCC(txrx_peer,
  1863. rx.pkt_type[pkt_type].mcs_count[MAX_MCS - 1], 1,
  1864. ((mcs >= MAX_MCS) && (pkt_type == DOT11_AX)));
  1865. DP_PEER_EXTD_STATS_INCC(txrx_peer,
  1866. rx.pkt_type[pkt_type].mcs_count[mcs], 1,
  1867. ((mcs < MAX_MCS) && (pkt_type == DOT11_AX)));
  1868. }
  1869. #else
  1870. static inline
  1871. void dp_rx_msdu_extd_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1872. uint8_t *rx_tlv_hdr,
  1873. struct dp_txrx_peer *txrx_peer)
  1874. {
  1875. }
  1876. #endif
  1877. /**
  1878. * dp_rx_msdu_stats_update() - update per msdu stats.
  1879. * @soc: core txrx main context
  1880. * @nbuf: pointer to the first msdu of an amsdu.
  1881. * @rx_tlv_hdr: pointer to the start of RX TLV headers.
  1882. * @txrx_peer: pointer to the txrx peer object.
  1883. * @ring_id: reo dest ring number on which pkt is reaped.
  1884. * @tid_stats: per tid rx stats.
  1885. *
  1886. * update all the per msdu stats for that nbuf.
  1887. * Return: void
  1888. */
  1889. void dp_rx_msdu_stats_update(struct dp_soc *soc, qdf_nbuf_t nbuf,
  1890. uint8_t *rx_tlv_hdr,
  1891. struct dp_txrx_peer *txrx_peer,
  1892. uint8_t ring_id,
  1893. struct cdp_tid_rx_stats *tid_stats)
  1894. {
  1895. bool is_not_amsdu;
  1896. struct dp_vdev *vdev = txrx_peer->vdev;
  1897. bool enh_flag;
  1898. qdf_ether_header_t *eh;
  1899. uint16_t msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  1900. dp_rx_msdu_stats_update_prot_cnts(vdev, nbuf, txrx_peer);
  1901. is_not_amsdu = qdf_nbuf_is_rx_chfrag_start(nbuf) &
  1902. qdf_nbuf_is_rx_chfrag_end(nbuf);
  1903. DP_PEER_PER_PKT_STATS_INC_PKT(txrx_peer, rx.rcvd_reo[ring_id], 1,
  1904. msdu_len);
  1905. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.non_amsdu_cnt, 1,
  1906. is_not_amsdu);
  1907. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.amsdu_cnt, 1, !is_not_amsdu);
  1908. DP_PEER_PER_PKT_STATS_INCC(txrx_peer, rx.rx_retries, 1,
  1909. qdf_nbuf_is_rx_retry_flag(nbuf));
  1910. tid_stats->msdu_cnt++;
  1911. if (qdf_unlikely(qdf_nbuf_is_da_mcbc(nbuf) &&
  1912. (vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))) {
  1913. eh = (qdf_ether_header_t *)qdf_nbuf_data(nbuf);
  1914. enh_flag = vdev->pdev->enhanced_stats_en;
  1915. DP_PEER_MC_INCC_PKT(txrx_peer, 1, msdu_len, enh_flag);
  1916. tid_stats->mcast_msdu_cnt++;
  1917. if (QDF_IS_ADDR_BROADCAST(eh->ether_dhost)) {
  1918. DP_PEER_BC_INCC_PKT(txrx_peer, 1, msdu_len, enh_flag);
  1919. tid_stats->bcast_msdu_cnt++;
  1920. }
  1921. }
  1922. txrx_peer->stats.per_pkt_stats.rx.last_rx_ts = qdf_system_ticks();
  1923. dp_rx_msdu_extd_stats_update(soc, nbuf, rx_tlv_hdr, txrx_peer);
  1924. }
  1925. #ifndef WDS_VENDOR_EXTENSION
  1926. int dp_wds_rx_policy_check(uint8_t *rx_tlv_hdr,
  1927. struct dp_vdev *vdev,
  1928. struct dp_txrx_peer *txrx_peer)
  1929. {
  1930. return 1;
  1931. }
  1932. #endif
  1933. #ifdef RX_DESC_DEBUG_CHECK
  1934. /**
  1935. * dp_rx_desc_nbuf_sanity_check - Add sanity check to catch REO rx_desc paddr
  1936. * corruption
  1937. *
  1938. * @ring_desc: REO ring descriptor
  1939. * @rx_desc: Rx descriptor
  1940. *
  1941. * Return: NONE
  1942. */
  1943. QDF_STATUS dp_rx_desc_nbuf_sanity_check(struct dp_soc *soc,
  1944. hal_ring_desc_t ring_desc,
  1945. struct dp_rx_desc *rx_desc)
  1946. {
  1947. struct hal_buf_info hbi;
  1948. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  1949. /* Sanity check for possible buffer paddr corruption */
  1950. if (dp_rx_desc_paddr_sanity_check(rx_desc, (&hbi)->paddr))
  1951. return QDF_STATUS_SUCCESS;
  1952. return QDF_STATUS_E_FAILURE;
  1953. }
  1954. /**
  1955. * dp_rx_desc_nbuf_len_sanity_check - Add sanity check to catch Rx buffer
  1956. * out of bound access from H.W
  1957. *
  1958. * @soc: DP soc
  1959. * @pkt_len: Packet length received from H.W
  1960. *
  1961. * Return: NONE
  1962. */
  1963. static inline void
  1964. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc,
  1965. uint32_t pkt_len)
  1966. {
  1967. struct rx_desc_pool *rx_desc_pool;
  1968. rx_desc_pool = &soc->rx_desc_buf[0];
  1969. qdf_assert_always(pkt_len <= rx_desc_pool->buf_size);
  1970. }
  1971. #else
  1972. static inline void
  1973. dp_rx_desc_nbuf_len_sanity_check(struct dp_soc *soc, uint32_t pkt_len) { }
  1974. #endif
  1975. #ifdef DP_RX_PKT_NO_PEER_DELIVER
  1976. /**
  1977. * dp_rx_deliver_to_stack_no_peer() - try deliver rx data even if
  1978. * no corresbonding peer found
  1979. * @soc: core txrx main context
  1980. * @nbuf: pkt skb pointer
  1981. *
  1982. * This function will try to deliver some RX special frames to stack
  1983. * even there is no peer matched found. for instance, LFR case, some
  1984. * eapol data will be sent to host before peer_map done.
  1985. *
  1986. * Return: None
  1987. */
  1988. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  1989. {
  1990. uint16_t peer_id;
  1991. uint8_t vdev_id;
  1992. struct dp_vdev *vdev = NULL;
  1993. uint32_t l2_hdr_offset = 0;
  1994. uint16_t msdu_len = 0;
  1995. uint32_t pkt_len = 0;
  1996. uint8_t *rx_tlv_hdr;
  1997. uint32_t frame_mask = FRAME_MASK_IPV4_ARP | FRAME_MASK_IPV4_DHCP |
  1998. FRAME_MASK_IPV4_EAPOL | FRAME_MASK_IPV6_DHCP;
  1999. peer_id = QDF_NBUF_CB_RX_PEER_ID(nbuf);
  2000. if (peer_id > soc->max_peer_id)
  2001. goto deliver_fail;
  2002. vdev_id = QDF_NBUF_CB_RX_VDEV_ID(nbuf);
  2003. vdev = dp_vdev_get_ref_by_id(soc, vdev_id, DP_MOD_ID_RX);
  2004. if (!vdev || vdev->delete.pending || !vdev->osif_rx)
  2005. goto deliver_fail;
  2006. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf)))
  2007. goto deliver_fail;
  2008. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  2009. l2_hdr_offset =
  2010. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2011. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2012. pkt_len = msdu_len + l2_hdr_offset + soc->rx_pkt_tlv_size;
  2013. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2014. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  2015. qdf_nbuf_pull_head(nbuf, soc->rx_pkt_tlv_size + l2_hdr_offset);
  2016. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2017. qdf_nbuf_set_exc_frame(nbuf, 1);
  2018. if (QDF_STATUS_SUCCESS !=
  2019. vdev->osif_rx(vdev->osif_vdev, nbuf))
  2020. goto deliver_fail;
  2021. DP_STATS_INC(soc, rx.err.pkt_delivered_no_peer, 1);
  2022. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2023. return;
  2024. }
  2025. deliver_fail:
  2026. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  2027. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2028. dp_rx_nbuf_free(nbuf);
  2029. if (vdev)
  2030. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  2031. }
  2032. #else
  2033. void dp_rx_deliver_to_stack_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2034. {
  2035. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  2036. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2037. dp_rx_nbuf_free(nbuf);
  2038. }
  2039. #endif
  2040. /**
  2041. * dp_rx_srng_get_num_pending() - get number of pending entries
  2042. * @hal_soc: hal soc opaque pointer
  2043. * @hal_ring: opaque pointer to the HAL Rx Ring
  2044. * @num_entries: number of entries in the hal_ring.
  2045. * @near_full: pointer to a boolean. This is set if ring is near full.
  2046. *
  2047. * The function returns the number of entries in a destination ring which are
  2048. * yet to be reaped. The function also checks if the ring is near full.
  2049. * If more than half of the ring needs to be reaped, the ring is considered
  2050. * approaching full.
  2051. * The function useses hal_srng_dst_num_valid_locked to get the number of valid
  2052. * entries. It should not be called within a SRNG lock. HW pointer value is
  2053. * synced into cached_hp.
  2054. *
  2055. * Return: Number of pending entries if any
  2056. */
  2057. uint32_t dp_rx_srng_get_num_pending(hal_soc_handle_t hal_soc,
  2058. hal_ring_handle_t hal_ring_hdl,
  2059. uint32_t num_entries,
  2060. bool *near_full)
  2061. {
  2062. uint32_t num_pending = 0;
  2063. num_pending = hal_srng_dst_num_valid_locked(hal_soc,
  2064. hal_ring_hdl,
  2065. true);
  2066. if (num_entries && (num_pending >= num_entries >> 1))
  2067. *near_full = true;
  2068. else
  2069. *near_full = false;
  2070. return num_pending;
  2071. }
  2072. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2073. #ifdef WLAN_SUPPORT_RX_FISA
  2074. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  2075. {
  2076. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  2077. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  2078. }
  2079. /**
  2080. * dp_rx_set_hdr_pad() - set l3 padding in nbuf cb
  2081. * @nbuf: pkt skb pointer
  2082. * @l3_padding: l3 padding
  2083. *
  2084. * Return: None
  2085. */
  2086. static inline
  2087. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  2088. {
  2089. QDF_NBUF_CB_RX_PACKET_L3_HDR_PAD(nbuf) = l3_padding;
  2090. }
  2091. #else
  2092. void dp_rx_skip_tlvs(struct dp_soc *soc, qdf_nbuf_t nbuf, uint32_t l3_padding)
  2093. {
  2094. qdf_nbuf_pull_head(nbuf, l3_padding + soc->rx_pkt_tlv_size);
  2095. }
  2096. static inline
  2097. void dp_rx_set_hdr_pad(qdf_nbuf_t nbuf, uint32_t l3_padding)
  2098. {
  2099. }
  2100. #endif
  2101. #ifndef QCA_HOST_MODE_WIFI_DISABLED
  2102. #ifdef DP_RX_DROP_RAW_FRM
  2103. /**
  2104. * dp_rx_is_raw_frame_dropped() - if raw frame nbuf, free and drop
  2105. * @nbuf: pkt skb pointer
  2106. *
  2107. * Return: true - raw frame, dropped
  2108. * false - not raw frame, do nothing
  2109. */
  2110. bool dp_rx_is_raw_frame_dropped(qdf_nbuf_t nbuf)
  2111. {
  2112. if (qdf_nbuf_is_raw_frame(nbuf)) {
  2113. dp_rx_nbuf_free(nbuf);
  2114. return true;
  2115. }
  2116. return false;
  2117. }
  2118. #endif
  2119. #ifdef WLAN_FEATURE_DP_RX_RING_HISTORY
  2120. /**
  2121. * dp_rx_ring_record_entry() - Record an entry into the rx ring history.
  2122. * @soc: Datapath soc structure
  2123. * @ring_num: REO ring number
  2124. * @ring_desc: REO ring descriptor
  2125. *
  2126. * Returns: None
  2127. */
  2128. void
  2129. dp_rx_ring_record_entry(struct dp_soc *soc, uint8_t ring_num,
  2130. hal_ring_desc_t ring_desc)
  2131. {
  2132. struct dp_buf_info_record *record;
  2133. struct hal_buf_info hbi;
  2134. uint32_t idx;
  2135. if (qdf_unlikely(!soc->rx_ring_history[ring_num]))
  2136. return;
  2137. hal_rx_reo_buf_paddr_get(soc->hal_soc, ring_desc, &hbi);
  2138. /* buffer_addr_info is the first element of ring_desc */
  2139. hal_rx_buf_cookie_rbm_get(soc->hal_soc, (uint32_t *)ring_desc,
  2140. &hbi);
  2141. idx = dp_history_get_next_index(&soc->rx_ring_history[ring_num]->index,
  2142. DP_RX_HIST_MAX);
  2143. /* No NULL check needed for record since its an array */
  2144. record = &soc->rx_ring_history[ring_num]->entry[idx];
  2145. record->timestamp = qdf_get_log_timestamp();
  2146. record->hbi.paddr = hbi.paddr;
  2147. record->hbi.sw_cookie = hbi.sw_cookie;
  2148. record->hbi.rbm = hbi.rbm;
  2149. }
  2150. #endif
  2151. #ifdef WLAN_DP_FEATURE_SW_LATENCY_MGR
  2152. /**
  2153. * dp_rx_update_stats() - Update soc level rx packet count
  2154. * @soc: DP soc handle
  2155. * @nbuf: nbuf received
  2156. *
  2157. * Returns: none
  2158. */
  2159. void dp_rx_update_stats(struct dp_soc *soc, qdf_nbuf_t nbuf)
  2160. {
  2161. DP_STATS_INC_PKT(soc, rx.ingress, 1,
  2162. QDF_NBUF_CB_RX_PKT_LEN(nbuf));
  2163. }
  2164. #endif
  2165. #ifdef WLAN_FEATURE_PKT_CAPTURE_V2
  2166. /**
  2167. * dp_rx_deliver_to_pkt_capture() - deliver rx packet to packet capture
  2168. * @soc : dp_soc handle
  2169. * @pdev: dp_pdev handle
  2170. * @peer_id: peer_id of the peer for which completion came
  2171. * @ppdu_id: ppdu_id
  2172. * @netbuf: Buffer pointer
  2173. *
  2174. * This function is used to deliver rx packet to packet capture
  2175. */
  2176. void dp_rx_deliver_to_pkt_capture(struct dp_soc *soc, struct dp_pdev *pdev,
  2177. uint16_t peer_id, uint32_t is_offload,
  2178. qdf_nbuf_t netbuf)
  2179. {
  2180. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2181. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA, soc, netbuf,
  2182. peer_id, is_offload, pdev->pdev_id);
  2183. }
  2184. void dp_rx_deliver_to_pkt_capture_no_peer(struct dp_soc *soc, qdf_nbuf_t nbuf,
  2185. uint32_t is_offload)
  2186. {
  2187. if (wlan_cfg_get_pkt_capture_mode(soc->wlan_cfg_ctx))
  2188. dp_wdi_event_handler(WDI_EVENT_PKT_CAPTURE_RX_DATA_NO_PEER,
  2189. soc, nbuf, HTT_INVALID_VDEV,
  2190. is_offload, 0);
  2191. }
  2192. #endif
  2193. #endif /* QCA_HOST_MODE_WIFI_DISABLED */
  2194. QDF_STATUS dp_rx_vdev_detach(struct dp_vdev *vdev)
  2195. {
  2196. QDF_STATUS ret;
  2197. if (vdev->osif_rx_flush) {
  2198. ret = vdev->osif_rx_flush(vdev->osif_vdev, vdev->vdev_id);
  2199. if (!QDF_IS_STATUS_SUCCESS(ret)) {
  2200. dp_err("Failed to flush rx pkts for vdev %d\n",
  2201. vdev->vdev_id);
  2202. return ret;
  2203. }
  2204. }
  2205. return QDF_STATUS_SUCCESS;
  2206. }
  2207. static QDF_STATUS
  2208. dp_pdev_nbuf_alloc_and_map(struct dp_soc *dp_soc,
  2209. struct dp_rx_nbuf_frag_info *nbuf_frag_info_t,
  2210. struct dp_pdev *dp_pdev,
  2211. struct rx_desc_pool *rx_desc_pool)
  2212. {
  2213. QDF_STATUS ret = QDF_STATUS_E_FAILURE;
  2214. (nbuf_frag_info_t->virt_addr).nbuf =
  2215. qdf_nbuf_alloc(dp_soc->osdev, rx_desc_pool->buf_size,
  2216. RX_BUFFER_RESERVATION,
  2217. rx_desc_pool->buf_alignment, FALSE);
  2218. if (!((nbuf_frag_info_t->virt_addr).nbuf)) {
  2219. dp_err("nbuf alloc failed");
  2220. DP_STATS_INC(dp_pdev, replenish.nbuf_alloc_fail, 1);
  2221. return ret;
  2222. }
  2223. ret = qdf_nbuf_map_nbytes_single(dp_soc->osdev,
  2224. (nbuf_frag_info_t->virt_addr).nbuf,
  2225. QDF_DMA_FROM_DEVICE,
  2226. rx_desc_pool->buf_size);
  2227. if (qdf_unlikely(QDF_IS_STATUS_ERROR(ret))) {
  2228. qdf_nbuf_free((nbuf_frag_info_t->virt_addr).nbuf);
  2229. dp_err("nbuf map failed");
  2230. DP_STATS_INC(dp_pdev, replenish.map_err, 1);
  2231. return ret;
  2232. }
  2233. nbuf_frag_info_t->paddr =
  2234. qdf_nbuf_get_frag_paddr((nbuf_frag_info_t->virt_addr).nbuf, 0);
  2235. ret = dp_check_paddr(dp_soc, &((nbuf_frag_info_t->virt_addr).nbuf),
  2236. &nbuf_frag_info_t->paddr,
  2237. rx_desc_pool);
  2238. if (ret == QDF_STATUS_E_FAILURE) {
  2239. dp_err("nbuf check x86 failed");
  2240. DP_STATS_INC(dp_pdev, replenish.x86_fail, 1);
  2241. return ret;
  2242. }
  2243. return QDF_STATUS_SUCCESS;
  2244. }
  2245. QDF_STATUS
  2246. dp_pdev_rx_buffers_attach(struct dp_soc *dp_soc, uint32_t mac_id,
  2247. struct dp_srng *dp_rxdma_srng,
  2248. struct rx_desc_pool *rx_desc_pool,
  2249. uint32_t num_req_buffers)
  2250. {
  2251. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(dp_soc, mac_id);
  2252. hal_ring_handle_t rxdma_srng = dp_rxdma_srng->hal_srng;
  2253. union dp_rx_desc_list_elem_t *next;
  2254. void *rxdma_ring_entry;
  2255. qdf_dma_addr_t paddr;
  2256. struct dp_rx_nbuf_frag_info *nf_info;
  2257. uint32_t nr_descs, nr_nbuf = 0, nr_nbuf_total = 0;
  2258. uint32_t buffer_index, nbuf_ptrs_per_page;
  2259. qdf_nbuf_t nbuf;
  2260. QDF_STATUS ret;
  2261. int page_idx, total_pages;
  2262. union dp_rx_desc_list_elem_t *desc_list = NULL;
  2263. union dp_rx_desc_list_elem_t *tail = NULL;
  2264. int sync_hw_ptr = 1;
  2265. uint32_t num_entries_avail;
  2266. if (qdf_unlikely(!dp_pdev)) {
  2267. dp_rx_err("%pK: pdev is null for mac_id = %d",
  2268. dp_soc, mac_id);
  2269. return QDF_STATUS_E_FAILURE;
  2270. }
  2271. if (qdf_unlikely(!rxdma_srng)) {
  2272. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2273. return QDF_STATUS_E_FAILURE;
  2274. }
  2275. dp_debug("requested %u RX buffers for driver attach", num_req_buffers);
  2276. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2277. num_entries_avail = hal_srng_src_num_avail(dp_soc->hal_soc,
  2278. rxdma_srng,
  2279. sync_hw_ptr);
  2280. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2281. if (!num_entries_avail) {
  2282. dp_err("Num of available entries is zero, nothing to do");
  2283. return QDF_STATUS_E_NOMEM;
  2284. }
  2285. if (num_entries_avail < num_req_buffers)
  2286. num_req_buffers = num_entries_avail;
  2287. nr_descs = dp_rx_get_free_desc_list(dp_soc, mac_id, rx_desc_pool,
  2288. num_req_buffers, &desc_list, &tail);
  2289. if (!nr_descs) {
  2290. dp_err("no free rx_descs in freelist");
  2291. DP_STATS_INC(dp_pdev, err.desc_alloc_fail, num_req_buffers);
  2292. return QDF_STATUS_E_NOMEM;
  2293. }
  2294. dp_debug("got %u RX descs for driver attach", nr_descs);
  2295. /*
  2296. * Try to allocate pointers to the nbuf one page at a time.
  2297. * Take pointers that can fit in one page of memory and
  2298. * iterate through the total descriptors that need to be
  2299. * allocated in order of pages. Reuse the pointers that
  2300. * have been allocated to fit in one page across each
  2301. * iteration to index into the nbuf.
  2302. */
  2303. total_pages = (nr_descs * sizeof(*nf_info)) / PAGE_SIZE;
  2304. /*
  2305. * Add an extra page to store the remainder if any
  2306. */
  2307. if ((nr_descs * sizeof(*nf_info)) % PAGE_SIZE)
  2308. total_pages++;
  2309. nf_info = qdf_mem_malloc(PAGE_SIZE);
  2310. if (!nf_info) {
  2311. dp_err("failed to allocate nbuf array");
  2312. DP_STATS_INC(dp_pdev, replenish.rxdma_err, num_req_buffers);
  2313. QDF_BUG(0);
  2314. return QDF_STATUS_E_NOMEM;
  2315. }
  2316. nbuf_ptrs_per_page = PAGE_SIZE / sizeof(*nf_info);
  2317. for (page_idx = 0; page_idx < total_pages; page_idx++) {
  2318. qdf_mem_zero(nf_info, PAGE_SIZE);
  2319. for (nr_nbuf = 0; nr_nbuf < nbuf_ptrs_per_page; nr_nbuf++) {
  2320. /*
  2321. * The last page of buffer pointers may not be required
  2322. * completely based on the number of descriptors. Below
  2323. * check will ensure we are allocating only the
  2324. * required number of descriptors.
  2325. */
  2326. if (nr_nbuf_total >= nr_descs)
  2327. break;
  2328. /* Flag is set while pdev rx_desc_pool initialization */
  2329. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2330. ret = dp_pdev_frag_alloc_and_map(dp_soc,
  2331. &nf_info[nr_nbuf], dp_pdev,
  2332. rx_desc_pool);
  2333. else
  2334. ret = dp_pdev_nbuf_alloc_and_map(dp_soc,
  2335. &nf_info[nr_nbuf], dp_pdev,
  2336. rx_desc_pool);
  2337. if (QDF_IS_STATUS_ERROR(ret))
  2338. break;
  2339. nr_nbuf_total++;
  2340. }
  2341. hal_srng_access_start(dp_soc->hal_soc, rxdma_srng);
  2342. for (buffer_index = 0; buffer_index < nr_nbuf; buffer_index++) {
  2343. rxdma_ring_entry =
  2344. hal_srng_src_get_next(dp_soc->hal_soc,
  2345. rxdma_srng);
  2346. qdf_assert_always(rxdma_ring_entry);
  2347. next = desc_list->next;
  2348. paddr = nf_info[buffer_index].paddr;
  2349. nbuf = nf_info[buffer_index].virt_addr.nbuf;
  2350. /* Flag is set while pdev rx_desc_pool initialization */
  2351. if (qdf_unlikely(rx_desc_pool->rx_mon_dest_frag_enable))
  2352. dp_rx_desc_frag_prep(&desc_list->rx_desc,
  2353. &nf_info[buffer_index]);
  2354. else
  2355. dp_rx_desc_prep(&desc_list->rx_desc,
  2356. &nf_info[buffer_index]);
  2357. desc_list->rx_desc.in_use = 1;
  2358. dp_rx_desc_alloc_dbg_info(&desc_list->rx_desc);
  2359. dp_rx_desc_update_dbg_info(&desc_list->rx_desc,
  2360. __func__,
  2361. RX_DESC_REPLENISHED);
  2362. hal_rxdma_buff_addr_info_set(dp_soc->hal_soc ,rxdma_ring_entry, paddr,
  2363. desc_list->rx_desc.cookie,
  2364. rx_desc_pool->owner);
  2365. dp_ipa_handle_rx_buf_smmu_mapping(
  2366. dp_soc, nbuf,
  2367. rx_desc_pool->buf_size,
  2368. true);
  2369. desc_list = next;
  2370. }
  2371. dp_rx_refill_ring_record_entry(dp_soc, dp_pdev->lmac_id,
  2372. rxdma_srng, nr_nbuf, nr_nbuf);
  2373. hal_srng_access_end(dp_soc->hal_soc, rxdma_srng);
  2374. }
  2375. dp_info("filled %u RX buffers for driver attach", nr_nbuf_total);
  2376. qdf_mem_free(nf_info);
  2377. if (!nr_nbuf_total) {
  2378. dp_err("No nbuf's allocated");
  2379. QDF_BUG(0);
  2380. return QDF_STATUS_E_RESOURCES;
  2381. }
  2382. /* No need to count the number of bytes received during replenish.
  2383. * Therefore set replenish.pkts.bytes as 0.
  2384. */
  2385. DP_STATS_INC_PKT(dp_pdev, replenish.pkts, nr_nbuf, 0);
  2386. return QDF_STATUS_SUCCESS;
  2387. }
  2388. qdf_export_symbol(dp_pdev_rx_buffers_attach);
  2389. /**
  2390. * dp_rx_enable_mon_dest_frag() - Enable frag processing for
  2391. * monitor destination ring via frag.
  2392. *
  2393. * Enable this flag only for monitor destination buffer processing
  2394. * if DP_RX_MON_MEM_FRAG feature is enabled.
  2395. * If flag is set then frag based function will be called for alloc,
  2396. * map, prep desc and free ops for desc buffer else normal nbuf based
  2397. * function will be called.
  2398. *
  2399. * @rx_desc_pool: Rx desc pool
  2400. * @is_mon_dest_desc: Is it for monitor dest buffer
  2401. *
  2402. * Return: None
  2403. */
  2404. #ifdef DP_RX_MON_MEM_FRAG
  2405. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2406. bool is_mon_dest_desc)
  2407. {
  2408. rx_desc_pool->rx_mon_dest_frag_enable = is_mon_dest_desc;
  2409. if (is_mon_dest_desc)
  2410. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is enabled");
  2411. }
  2412. #else
  2413. void dp_rx_enable_mon_dest_frag(struct rx_desc_pool *rx_desc_pool,
  2414. bool is_mon_dest_desc)
  2415. {
  2416. rx_desc_pool->rx_mon_dest_frag_enable = false;
  2417. if (is_mon_dest_desc)
  2418. dp_alert("Feature DP_RX_MON_MEM_FRAG for mon_dest is disabled");
  2419. }
  2420. #endif
  2421. qdf_export_symbol(dp_rx_enable_mon_dest_frag);
  2422. /*
  2423. * dp_rx_pdev_desc_pool_alloc() - allocate memory for software rx descriptor
  2424. * pool
  2425. *
  2426. * @pdev: core txrx pdev context
  2427. *
  2428. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2429. * QDF_STATUS_E_NOMEM
  2430. */
  2431. QDF_STATUS
  2432. dp_rx_pdev_desc_pool_alloc(struct dp_pdev *pdev)
  2433. {
  2434. struct dp_soc *soc = pdev->soc;
  2435. uint32_t rxdma_entries;
  2436. uint32_t rx_sw_desc_num;
  2437. struct dp_srng *dp_rxdma_srng;
  2438. struct rx_desc_pool *rx_desc_pool;
  2439. uint32_t status = QDF_STATUS_SUCCESS;
  2440. int mac_for_pdev;
  2441. mac_for_pdev = pdev->lmac_id;
  2442. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2443. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2444. soc, mac_for_pdev);
  2445. return status;
  2446. }
  2447. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2448. rxdma_entries = dp_rxdma_srng->num_entries;
  2449. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2450. rx_sw_desc_num = wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2451. rx_desc_pool->desc_type = DP_RX_DESC_BUF_TYPE;
  2452. status = dp_rx_desc_pool_alloc(soc,
  2453. rx_sw_desc_num,
  2454. rx_desc_pool);
  2455. if (status != QDF_STATUS_SUCCESS)
  2456. return status;
  2457. return status;
  2458. }
  2459. /*
  2460. * dp_rx_pdev_desc_pool_free() - free software rx descriptor pool
  2461. *
  2462. * @pdev: core txrx pdev context
  2463. */
  2464. void dp_rx_pdev_desc_pool_free(struct dp_pdev *pdev)
  2465. {
  2466. int mac_for_pdev = pdev->lmac_id;
  2467. struct dp_soc *soc = pdev->soc;
  2468. struct rx_desc_pool *rx_desc_pool;
  2469. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2470. dp_rx_desc_pool_free(soc, rx_desc_pool);
  2471. }
  2472. /*
  2473. * dp_rx_pdev_desc_pool_init() - initialize software rx descriptors
  2474. *
  2475. * @pdev: core txrx pdev context
  2476. *
  2477. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2478. * QDF_STATUS_E_NOMEM
  2479. */
  2480. QDF_STATUS dp_rx_pdev_desc_pool_init(struct dp_pdev *pdev)
  2481. {
  2482. int mac_for_pdev = pdev->lmac_id;
  2483. struct dp_soc *soc = pdev->soc;
  2484. uint32_t rxdma_entries;
  2485. uint32_t rx_sw_desc_num;
  2486. struct dp_srng *dp_rxdma_srng;
  2487. struct rx_desc_pool *rx_desc_pool;
  2488. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2489. if (wlan_cfg_get_dp_pdev_nss_enabled(pdev->wlan_cfg_ctx)) {
  2490. /**
  2491. * If NSS is enabled, rx_desc_pool is already filled.
  2492. * Hence, just disable desc_pool frag flag.
  2493. */
  2494. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2495. dp_rx_info("%pK: nss-wifi<4> skip Rx refil %d",
  2496. soc, mac_for_pdev);
  2497. return QDF_STATUS_SUCCESS;
  2498. }
  2499. if (dp_rx_desc_pool_is_allocated(rx_desc_pool) == QDF_STATUS_E_NOMEM)
  2500. return QDF_STATUS_E_NOMEM;
  2501. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2502. rxdma_entries = dp_rxdma_srng->num_entries;
  2503. soc->process_rx_status = CONFIG_PROCESS_RX_STATUS;
  2504. rx_sw_desc_num =
  2505. wlan_cfg_get_dp_soc_rx_sw_desc_num(soc->wlan_cfg_ctx);
  2506. rx_desc_pool->owner = dp_rx_get_rx_bm_id(soc);
  2507. rx_desc_pool->buf_size = RX_DATA_BUFFER_SIZE;
  2508. rx_desc_pool->buf_alignment = RX_DATA_BUFFER_ALIGNMENT;
  2509. /* Disable monitor dest processing via frag */
  2510. dp_rx_enable_mon_dest_frag(rx_desc_pool, false);
  2511. dp_rx_desc_pool_init(soc, mac_for_pdev,
  2512. rx_sw_desc_num, rx_desc_pool);
  2513. return QDF_STATUS_SUCCESS;
  2514. }
  2515. /*
  2516. * dp_rx_pdev_desc_pool_deinit() - de-initialize software rx descriptor pools
  2517. * @pdev: core txrx pdev context
  2518. *
  2519. * This function resets the freelist of rx descriptors and destroys locks
  2520. * associated with this list of descriptors.
  2521. */
  2522. void dp_rx_pdev_desc_pool_deinit(struct dp_pdev *pdev)
  2523. {
  2524. int mac_for_pdev = pdev->lmac_id;
  2525. struct dp_soc *soc = pdev->soc;
  2526. struct rx_desc_pool *rx_desc_pool;
  2527. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2528. dp_rx_desc_pool_deinit(soc, rx_desc_pool, mac_for_pdev);
  2529. }
  2530. /*
  2531. * dp_rx_pdev_buffers_alloc() - Allocate nbufs (skbs) and replenish RxDMA ring
  2532. *
  2533. * @pdev: core txrx pdev context
  2534. *
  2535. * Return: QDF_STATUS - QDF_STATUS_SUCCESS
  2536. * QDF_STATUS_E_NOMEM
  2537. */
  2538. QDF_STATUS
  2539. dp_rx_pdev_buffers_alloc(struct dp_pdev *pdev)
  2540. {
  2541. int mac_for_pdev = pdev->lmac_id;
  2542. struct dp_soc *soc = pdev->soc;
  2543. struct dp_srng *dp_rxdma_srng;
  2544. struct rx_desc_pool *rx_desc_pool;
  2545. uint32_t rxdma_entries;
  2546. dp_rxdma_srng = &soc->rx_refill_buf_ring[mac_for_pdev];
  2547. rxdma_entries = dp_rxdma_srng->num_entries;
  2548. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2549. /* Initialize RX buffer pool which will be
  2550. * used during low memory conditions
  2551. */
  2552. dp_rx_buffer_pool_init(soc, mac_for_pdev);
  2553. return dp_pdev_rx_buffers_attach_simple(soc, mac_for_pdev,
  2554. dp_rxdma_srng,
  2555. rx_desc_pool,
  2556. rxdma_entries - 1);
  2557. }
  2558. /*
  2559. * dp_rx_pdev_buffers_free - Free nbufs (skbs)
  2560. *
  2561. * @pdev: core txrx pdev context
  2562. */
  2563. void
  2564. dp_rx_pdev_buffers_free(struct dp_pdev *pdev)
  2565. {
  2566. int mac_for_pdev = pdev->lmac_id;
  2567. struct dp_soc *soc = pdev->soc;
  2568. struct rx_desc_pool *rx_desc_pool;
  2569. rx_desc_pool = &soc->rx_desc_buf[mac_for_pdev];
  2570. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  2571. dp_rx_buffer_pool_deinit(soc, mac_for_pdev);
  2572. }
  2573. #ifdef DP_RX_SPECIAL_FRAME_NEED
  2574. bool dp_rx_deliver_special_frame(struct dp_soc *soc,
  2575. struct dp_txrx_peer *txrx_peer,
  2576. qdf_nbuf_t nbuf, uint32_t frame_mask,
  2577. uint8_t *rx_tlv_hdr)
  2578. {
  2579. uint32_t l2_hdr_offset = 0;
  2580. uint16_t msdu_len = 0;
  2581. uint32_t skip_len;
  2582. l2_hdr_offset =
  2583. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, rx_tlv_hdr);
  2584. if (qdf_unlikely(qdf_nbuf_is_frag(nbuf))) {
  2585. skip_len = l2_hdr_offset;
  2586. } else {
  2587. msdu_len = QDF_NBUF_CB_RX_PKT_LEN(nbuf);
  2588. skip_len = l2_hdr_offset + soc->rx_pkt_tlv_size;
  2589. qdf_nbuf_set_pktlen(nbuf, msdu_len + skip_len);
  2590. }
  2591. QDF_NBUF_CB_RX_NUM_ELEMENTS_IN_LIST(nbuf) = 1;
  2592. dp_rx_set_hdr_pad(nbuf, l2_hdr_offset);
  2593. qdf_nbuf_pull_head(nbuf, skip_len);
  2594. if (dp_rx_is_special_frame(nbuf, frame_mask)) {
  2595. dp_info("special frame, mpdu sn 0x%x",
  2596. hal_rx_get_rx_sequence(soc->hal_soc, rx_tlv_hdr));
  2597. qdf_nbuf_set_exc_frame(nbuf, 1);
  2598. dp_rx_deliver_to_stack(soc, txrx_peer->vdev, txrx_peer,
  2599. nbuf, NULL);
  2600. return true;
  2601. }
  2602. return false;
  2603. }
  2604. #endif
  2605. #ifdef WLAN_FEATURE_MARK_FIRST_WAKEUP_PACKET
  2606. void dp_rx_mark_first_packet_after_wow_wakeup(struct dp_pdev *pdev,
  2607. uint8_t *rx_tlv,
  2608. qdf_nbuf_t nbuf)
  2609. {
  2610. struct dp_soc *soc;
  2611. if (!pdev->is_first_wakeup_packet)
  2612. return;
  2613. soc = pdev->soc;
  2614. if (hal_get_first_wow_wakeup_packet(soc->hal_soc, rx_tlv)) {
  2615. qdf_nbuf_mark_wakeup_frame(nbuf);
  2616. dp_info("First packet after WOW Wakeup rcvd");
  2617. }
  2618. }
  2619. #endif