dp_mlo.c 48 KB

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  1. /*
  2. * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <wlan_utility.h>
  17. #include <dp_internal.h>
  18. #include <dp_htt.h>
  19. #include <hal_be_api.h>
  20. #include "dp_mlo.h"
  21. #include <dp_be.h>
  22. #include <dp_be_rx.h>
  23. #include <dp_htt.h>
  24. #include <dp_internal.h>
  25. #include <wlan_cfg.h>
  26. #include <wlan_mlo_mgr_cmn.h>
  27. #include "dp_umac_reset.h"
  28. #ifdef DP_UMAC_HW_RESET_SUPPORT
  29. /**
  30. * dp_umac_reset_update_partner_map() - Update Umac reset partner map
  31. * @mlo_ctx: mlo soc context
  32. * @chip_id: chip id
  33. * @set: flag indicating whether to set or clear the bit
  34. *
  35. * Return: void
  36. */
  37. static void dp_umac_reset_update_partner_map(struct dp_mlo_ctxt *mlo_ctx,
  38. int chip_id, bool set);
  39. #endif
  40. /**
  41. * dp_mlo_ctxt_attach_wifi3() - Attach DP MLO context
  42. * @ctrl_ctxt: CDP control context
  43. *
  44. * Return: DP MLO context handle on success, NULL on failure
  45. */
  46. static struct cdp_mlo_ctxt *
  47. dp_mlo_ctxt_attach_wifi3(struct cdp_ctrl_mlo_mgr *ctrl_ctxt)
  48. {
  49. struct dp_mlo_ctxt *mlo_ctxt =
  50. qdf_mem_malloc(sizeof(struct dp_mlo_ctxt));
  51. if (!mlo_ctxt) {
  52. dp_err("Failed to allocate DP MLO Context");
  53. return NULL;
  54. }
  55. mlo_ctxt->ctrl_ctxt = ctrl_ctxt;
  56. if (dp_mlo_peer_find_hash_attach_be
  57. (mlo_ctxt, DP_MAX_MLO_PEER) != QDF_STATUS_SUCCESS) {
  58. dp_err("Failed to allocate peer hash");
  59. qdf_mem_free(mlo_ctxt);
  60. return NULL;
  61. }
  62. qdf_get_random_bytes(mlo_ctxt->toeplitz_hash_ipv4,
  63. (sizeof(mlo_ctxt->toeplitz_hash_ipv4[0]) *
  64. LRO_IPV4_SEED_ARR_SZ));
  65. qdf_get_random_bytes(mlo_ctxt->toeplitz_hash_ipv6,
  66. (sizeof(mlo_ctxt->toeplitz_hash_ipv6[0]) *
  67. LRO_IPV6_SEED_ARR_SZ));
  68. qdf_spinlock_create(&mlo_ctxt->ml_soc_list_lock);
  69. qdf_spinlock_create(&mlo_ctxt->grp_umac_reset_ctx.grp_ctx_lock);
  70. return dp_mlo_ctx_to_cdp(mlo_ctxt);
  71. }
  72. /**
  73. * dp_mlo_ctxt_detach_wifi3() - Detach DP MLO context
  74. * @cdp_ml_ctxt: pointer to CDP DP MLO context
  75. *
  76. * Return: void
  77. */
  78. static void dp_mlo_ctxt_detach_wifi3(struct cdp_mlo_ctxt *cdp_ml_ctxt)
  79. {
  80. struct dp_mlo_ctxt *mlo_ctxt = cdp_mlo_ctx_to_dp(cdp_ml_ctxt);
  81. if (!cdp_ml_ctxt)
  82. return;
  83. qdf_spinlock_destroy(&mlo_ctxt->grp_umac_reset_ctx.grp_ctx_lock);
  84. qdf_spinlock_destroy(&mlo_ctxt->ml_soc_list_lock);
  85. dp_mlo_peer_find_hash_detach_be(mlo_ctxt);
  86. qdf_mem_free(mlo_ctxt);
  87. }
  88. /**
  89. * dp_mlo_set_soc_by_chip_id() - Add DP soc to ML context soc list
  90. * @ml_ctxt: DP ML context handle
  91. * @soc: DP soc handle
  92. * @chip_id: MLO chip id
  93. *
  94. * Return: void
  95. */
  96. static void dp_mlo_set_soc_by_chip_id(struct dp_mlo_ctxt *ml_ctxt,
  97. struct dp_soc *soc,
  98. uint8_t chip_id)
  99. {
  100. qdf_spin_lock_bh(&ml_ctxt->ml_soc_list_lock);
  101. ml_ctxt->ml_soc_list[chip_id] = soc;
  102. /* The same API is called during soc_attach and soc_detach
  103. * soc parameter is non-null or null accordingly.
  104. */
  105. if (soc)
  106. ml_ctxt->ml_soc_cnt++;
  107. else
  108. ml_ctxt->ml_soc_cnt--;
  109. dp_umac_reset_update_partner_map(ml_ctxt, chip_id, !!soc);
  110. qdf_spin_unlock_bh(&ml_ctxt->ml_soc_list_lock);
  111. }
  112. struct dp_soc*
  113. dp_mlo_get_soc_ref_by_chip_id(struct dp_mlo_ctxt *ml_ctxt,
  114. uint8_t chip_id)
  115. {
  116. struct dp_soc *soc = NULL;
  117. if (!ml_ctxt) {
  118. dp_warn("MLO context not created, MLO not enabled");
  119. return NULL;
  120. }
  121. qdf_spin_lock_bh(&ml_ctxt->ml_soc_list_lock);
  122. soc = ml_ctxt->ml_soc_list[chip_id];
  123. if (!soc) {
  124. qdf_spin_unlock_bh(&ml_ctxt->ml_soc_list_lock);
  125. return NULL;
  126. }
  127. qdf_atomic_inc(&soc->ref_count);
  128. qdf_spin_unlock_bh(&ml_ctxt->ml_soc_list_lock);
  129. return soc;
  130. }
  131. static QDF_STATUS dp_partner_soc_rx_hw_cc_init(struct dp_mlo_ctxt *mlo_ctxt,
  132. struct dp_soc_be *be_soc)
  133. {
  134. uint8_t i;
  135. struct dp_soc *partner_soc;
  136. struct dp_soc_be *be_partner_soc;
  137. uint8_t pool_id;
  138. QDF_STATUS qdf_status = QDF_STATUS_SUCCESS;
  139. for (i = 0; i < WLAN_MAX_MLO_CHIPS; i++) {
  140. partner_soc = dp_mlo_get_soc_ref_by_chip_id(mlo_ctxt, i);
  141. if (!partner_soc) {
  142. dp_err("partner_soc is NULL");
  143. continue;
  144. }
  145. be_partner_soc = dp_get_be_soc_from_dp_soc(partner_soc);
  146. for (pool_id = 0; pool_id < MAX_RXDESC_POOLS; pool_id++) {
  147. qdf_status =
  148. dp_hw_cookie_conversion_init
  149. (be_soc,
  150. &be_partner_soc->rx_cc_ctx[pool_id]);
  151. if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
  152. dp_alert("MLO partner soc RX CC init failed");
  153. return qdf_status;
  154. }
  155. }
  156. }
  157. return qdf_status;
  158. }
  159. static void dp_mlo_soc_drain_rx_buf(struct dp_soc *soc, void *arg, int chip_id)
  160. {
  161. uint8_t i = 0;
  162. uint8_t cpu = 0;
  163. uint8_t rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {0};
  164. uint8_t rx_err_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {0};
  165. uint8_t rx_wbm_rel_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {0};
  166. uint8_t reo_status_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS] = {0};
  167. /* Save the current interrupt mask and disable the interrupts */
  168. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  169. rx_ring_mask[i] = soc->intr_ctx[i].rx_ring_mask;
  170. rx_err_ring_mask[i] = soc->intr_ctx[i].rx_err_ring_mask;
  171. rx_wbm_rel_ring_mask[i] = soc->intr_ctx[i].rx_wbm_rel_ring_mask;
  172. reo_status_ring_mask[i] = soc->intr_ctx[i].reo_status_ring_mask;
  173. soc->intr_ctx[i].rx_ring_mask = 0;
  174. soc->intr_ctx[i].rx_err_ring_mask = 0;
  175. soc->intr_ctx[i].rx_wbm_rel_ring_mask = 0;
  176. soc->intr_ctx[i].reo_status_ring_mask = 0;
  177. }
  178. /* make sure dp_service_srngs not running on any of the CPU */
  179. for (cpu = 0; cpu < NR_CPUS; cpu++) {
  180. while (qdf_atomic_test_bit(cpu,
  181. &soc->service_rings_running))
  182. ;
  183. }
  184. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  185. uint8_t ring = 0;
  186. uint32_t num_entries = 0;
  187. hal_ring_handle_t hal_ring_hdl = NULL;
  188. uint8_t rx_mask = wlan_cfg_get_rx_ring_mask(
  189. soc->wlan_cfg_ctx, i);
  190. uint8_t rx_err_mask = wlan_cfg_get_rx_err_ring_mask(
  191. soc->wlan_cfg_ctx, i);
  192. uint8_t rx_wbm_rel_mask = wlan_cfg_get_rx_wbm_rel_ring_mask(
  193. soc->wlan_cfg_ctx, i);
  194. if (rx_mask) {
  195. /* iterate through each reo ring and process the buf */
  196. for (ring = 0; ring < soc->num_reo_dest_rings; ring++) {
  197. if (!(rx_mask & (1 << ring)))
  198. continue;
  199. hal_ring_hdl =
  200. soc->reo_dest_ring[ring].hal_srng;
  201. num_entries = hal_srng_get_num_entries(
  202. soc->hal_soc,
  203. hal_ring_hdl);
  204. dp_rx_process_be(&soc->intr_ctx[i],
  205. hal_ring_hdl,
  206. ring,
  207. num_entries);
  208. }
  209. }
  210. /* Process REO Exception ring */
  211. if (rx_err_mask) {
  212. hal_ring_hdl = soc->reo_exception_ring.hal_srng;
  213. num_entries = hal_srng_get_num_entries(
  214. soc->hal_soc,
  215. hal_ring_hdl);
  216. dp_rx_err_process(&soc->intr_ctx[i], soc,
  217. hal_ring_hdl, num_entries);
  218. }
  219. /* Process Rx WBM release ring */
  220. if (rx_wbm_rel_mask) {
  221. hal_ring_hdl = soc->rx_rel_ring.hal_srng;
  222. num_entries = hal_srng_get_num_entries(
  223. soc->hal_soc,
  224. hal_ring_hdl);
  225. dp_rx_wbm_err_process(&soc->intr_ctx[i], soc,
  226. hal_ring_hdl, num_entries);
  227. }
  228. }
  229. /* restore the interrupt mask */
  230. for (i = 0; i < wlan_cfg_get_num_contexts(soc->wlan_cfg_ctx); i++) {
  231. soc->intr_ctx[i].rx_ring_mask = rx_ring_mask[i];
  232. soc->intr_ctx[i].rx_err_ring_mask = rx_err_ring_mask[i];
  233. soc->intr_ctx[i].rx_wbm_rel_ring_mask = rx_wbm_rel_ring_mask[i];
  234. soc->intr_ctx[i].reo_status_ring_mask = reo_status_ring_mask[i];
  235. }
  236. }
  237. static void dp_mlo_soc_setup(struct cdp_soc_t *soc_hdl,
  238. struct cdp_mlo_ctxt *cdp_ml_ctxt)
  239. {
  240. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  241. struct dp_mlo_ctxt *mlo_ctxt = cdp_mlo_ctx_to_dp(cdp_ml_ctxt);
  242. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  243. uint8_t pdev_id;
  244. if (!cdp_ml_ctxt)
  245. return;
  246. be_soc->ml_ctxt = mlo_ctxt;
  247. for (pdev_id = 0; pdev_id < MAX_PDEV_CNT; pdev_id++) {
  248. if (soc->pdev_list[pdev_id])
  249. dp_mlo_update_link_to_pdev_map(soc,
  250. soc->pdev_list[pdev_id]);
  251. }
  252. dp_mlo_set_soc_by_chip_id(mlo_ctxt, soc, be_soc->mlo_chip_id);
  253. }
  254. static void dp_mlo_soc_teardown(struct cdp_soc_t *soc_hdl,
  255. struct cdp_mlo_ctxt *cdp_ml_ctxt,
  256. bool is_force_down)
  257. {
  258. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  259. struct dp_mlo_ctxt *mlo_ctxt = cdp_mlo_ctx_to_dp(cdp_ml_ctxt);
  260. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  261. if (!cdp_ml_ctxt)
  262. return;
  263. /* During the teardown drain the Rx buffers if any exist in the ring */
  264. dp_mlo_iter_ptnr_soc(be_soc,
  265. dp_mlo_soc_drain_rx_buf,
  266. NULL);
  267. dp_mlo_set_soc_by_chip_id(mlo_ctxt, NULL, be_soc->mlo_chip_id);
  268. be_soc->ml_ctxt = NULL;
  269. }
  270. static QDF_STATUS dp_mlo_add_ptnr_vdev(struct dp_vdev *vdev1,
  271. struct dp_vdev *vdev2,
  272. struct dp_soc *soc, uint8_t pdev_id)
  273. {
  274. struct dp_soc_be *soc_be = dp_get_be_soc_from_dp_soc(soc);
  275. struct dp_vdev_be *vdev2_be = dp_get_be_vdev_from_dp_vdev(vdev2);
  276. /* return when valid entry exists */
  277. if (vdev1->is_bridge_vdev) {
  278. if (vdev2_be->bridge_vdev_list[soc_be->mlo_chip_id][pdev_id] !=
  279. CDP_INVALID_VDEV_ID)
  280. return QDF_STATUS_SUCCESS;
  281. vdev2_be->bridge_vdev_list[soc_be->mlo_chip_id][pdev_id] =
  282. vdev1->vdev_id;
  283. } else {
  284. if (vdev2_be->partner_vdev_list[soc_be->mlo_chip_id][pdev_id] !=
  285. CDP_INVALID_VDEV_ID)
  286. return QDF_STATUS_SUCCESS;
  287. vdev2_be->partner_vdev_list[soc_be->mlo_chip_id][pdev_id] =
  288. vdev1->vdev_id;
  289. }
  290. mlo_debug("Add vdev%d to vdev%d list, mlo_chip_id = %d pdev_id = %d\n",
  291. vdev1->vdev_id, vdev2->vdev_id, soc_be->mlo_chip_id, pdev_id);
  292. return QDF_STATUS_SUCCESS;
  293. }
  294. QDF_STATUS dp_update_mlo_ptnr_list(struct cdp_soc_t *soc_hdl,
  295. int8_t partner_vdev_ids[], uint8_t num_vdevs,
  296. uint8_t self_vdev_id)
  297. {
  298. int i, j;
  299. struct dp_soc *self_soc = cdp_soc_t_to_dp_soc(soc_hdl);
  300. struct dp_vdev *self_vdev;
  301. QDF_STATUS ret = QDF_STATUS_SUCCESS;
  302. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(self_soc);
  303. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  304. if (!dp_mlo)
  305. return QDF_STATUS_E_FAILURE;
  306. self_vdev = dp_vdev_get_ref_by_id(self_soc, self_vdev_id, DP_MOD_ID_RX);
  307. if (!self_vdev)
  308. return QDF_STATUS_E_FAILURE;
  309. /* go through the input vdev id list and if there are partner vdevs,
  310. * - then add the current vdev's id to partner vdev's list using pdev_id and
  311. * increase the reference
  312. * - add partner vdev to self list and increase the reference
  313. */
  314. for (i = 0; i < num_vdevs; i++) {
  315. if (partner_vdev_ids[i] == CDP_INVALID_VDEV_ID)
  316. continue;
  317. for (j = 0; j < WLAN_MAX_MLO_CHIPS; j++) {
  318. struct dp_soc *soc =
  319. dp_mlo_get_soc_ref_by_chip_id(dp_mlo, j);
  320. if (soc) {
  321. struct dp_vdev *vdev;
  322. vdev = dp_vdev_get_ref_by_id(soc,
  323. partner_vdev_ids[i], DP_MOD_ID_RX);
  324. if (vdev) {
  325. if (vdev == self_vdev) {
  326. dp_vdev_unref_delete(soc,
  327. vdev, DP_MOD_ID_RX);
  328. /*dp_soc_unref_delete(soc); */
  329. continue;
  330. }
  331. if (qdf_is_macaddr_equal(
  332. (struct qdf_mac_addr *)self_vdev->mld_mac_addr.raw,
  333. (struct qdf_mac_addr *)vdev->mld_mac_addr.raw)) {
  334. if (dp_mlo_add_ptnr_vdev(self_vdev,
  335. vdev, self_soc,
  336. self_vdev->pdev->pdev_id) !=
  337. QDF_STATUS_SUCCESS) {
  338. dp_err("Unable to add self to partner vdev's list");
  339. dp_vdev_unref_delete(soc,
  340. vdev, DP_MOD_ID_RX);
  341. /* TODO - release soc ref here */
  342. /* dp_soc_unref_delete(soc);*/
  343. ret = QDF_STATUS_E_FAILURE;
  344. goto exit;
  345. }
  346. /* add to self list */
  347. if (dp_mlo_add_ptnr_vdev(vdev, self_vdev, soc,
  348. vdev->pdev->pdev_id) !=
  349. QDF_STATUS_SUCCESS) {
  350. dp_err("Unable to add vdev to self vdev's list");
  351. dp_vdev_unref_delete(self_soc,
  352. vdev, DP_MOD_ID_RX);
  353. /* TODO - release soc ref here */
  354. /* dp_soc_unref_delete(soc);*/
  355. ret = QDF_STATUS_E_FAILURE;
  356. goto exit;
  357. }
  358. }
  359. dp_vdev_unref_delete(soc, vdev,
  360. DP_MOD_ID_RX);
  361. } /* vdev */
  362. /* TODO - release soc ref here */
  363. /* dp_soc_unref_delete(soc); */
  364. } /* soc */
  365. } /* for */
  366. } /* for */
  367. exit:
  368. dp_vdev_unref_delete(self_soc, self_vdev, DP_MOD_ID_RX);
  369. return ret;
  370. }
  371. void dp_clr_mlo_ptnr_list(struct dp_soc *soc, struct dp_vdev *vdev)
  372. {
  373. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  374. struct dp_vdev_be *vdev_be = dp_get_be_vdev_from_dp_vdev(vdev);
  375. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  376. uint8_t soc_id = be_soc->mlo_chip_id;
  377. uint8_t pdev_id = vdev->pdev->pdev_id;
  378. int i, j;
  379. for (i = 0; i < WLAN_MAX_MLO_CHIPS; i++) {
  380. for (j = 0; j < WLAN_MAX_MLO_LINKS_PER_SOC; j++) {
  381. struct dp_vdev *pr_vdev;
  382. struct dp_soc *pr_soc;
  383. struct dp_soc_be *pr_soc_be;
  384. struct dp_pdev *pr_pdev;
  385. struct dp_vdev_be *pr_vdev_be;
  386. if (vdev_be->partner_vdev_list[i][j] ==
  387. CDP_INVALID_VDEV_ID)
  388. continue;
  389. pr_soc = dp_mlo_get_soc_ref_by_chip_id(dp_mlo, i);
  390. if (!pr_soc)
  391. continue;
  392. pr_soc_be = dp_get_be_soc_from_dp_soc(pr_soc);
  393. pr_vdev = dp_vdev_get_ref_by_id(pr_soc,
  394. vdev_be->partner_vdev_list[i][j],
  395. DP_MOD_ID_RX);
  396. if (!pr_vdev)
  397. continue;
  398. /* remove self vdev from partner list */
  399. pr_vdev_be = dp_get_be_vdev_from_dp_vdev(pr_vdev);
  400. if (vdev->is_bridge_vdev)
  401. pr_vdev_be->bridge_vdev_list[soc_id][pdev_id] =
  402. CDP_INVALID_VDEV_ID;
  403. else
  404. pr_vdev_be->partner_vdev_list[soc_id][pdev_id] =
  405. CDP_INVALID_VDEV_ID;
  406. /* remove partner vdev from self list */
  407. pr_pdev = pr_vdev->pdev;
  408. vdev_be->partner_vdev_list[pr_soc_be->mlo_chip_id][pr_pdev->pdev_id] =
  409. CDP_INVALID_VDEV_ID;
  410. dp_vdev_unref_delete(pr_soc, pr_vdev, DP_MOD_ID_RX);
  411. }
  412. }
  413. for (i = 0; i < WLAN_MAX_MLO_CHIPS; i++) {
  414. for (j = 0; j < WLAN_MAX_MLO_LINKS_PER_SOC; j++) {
  415. struct dp_vdev *pr_vdev = NULL;
  416. struct dp_soc *pr_soc = NULL;
  417. struct dp_soc_be *pr_soc_be = NULL;
  418. struct dp_pdev *pr_pdev = NULL;
  419. struct dp_vdev_be *pr_vdev_be = NULL;
  420. if (vdev_be->bridge_vdev_list[i][j] ==
  421. CDP_INVALID_VDEV_ID)
  422. continue;
  423. pr_soc = dp_mlo_get_soc_ref_by_chip_id(dp_mlo, i);
  424. if (!pr_soc)
  425. continue;
  426. pr_soc_be = dp_get_be_soc_from_dp_soc(pr_soc);
  427. pr_vdev = dp_vdev_get_ref_by_id(
  428. pr_soc,
  429. vdev_be->bridge_vdev_list[i][j],
  430. DP_MOD_ID_RX);
  431. if (!pr_vdev)
  432. continue;
  433. /* remove self vdev from partner list */
  434. pr_vdev_be = dp_get_be_vdev_from_dp_vdev(pr_vdev);
  435. if (vdev->is_bridge_vdev)
  436. pr_vdev_be->bridge_vdev_list[soc_id][pdev_id] =
  437. CDP_INVALID_VDEV_ID;
  438. else
  439. pr_vdev_be->partner_vdev_list[soc_id][pdev_id] =
  440. CDP_INVALID_VDEV_ID;
  441. /* remove partner vdev from self list */
  442. pr_pdev = pr_vdev->pdev;
  443. vdev_be->bridge_vdev_list[pr_soc_be->mlo_chip_id][pr_pdev->pdev_id] =
  444. CDP_INVALID_VDEV_ID;
  445. dp_vdev_unref_delete(pr_soc, pr_vdev, DP_MOD_ID_RX);
  446. }
  447. }
  448. }
  449. static QDF_STATUS
  450. dp_clear_mlo_ptnr_list(struct cdp_soc_t *soc_hdl, uint8_t self_vdev_id)
  451. {
  452. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  453. struct dp_vdev *vdev;
  454. vdev = dp_vdev_get_ref_by_id(soc, self_vdev_id, DP_MOD_ID_RX);
  455. if (!vdev)
  456. return QDF_STATUS_E_FAILURE;
  457. dp_clr_mlo_ptnr_list(soc, vdev);
  458. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_RX);
  459. return QDF_STATUS_SUCCESS;
  460. }
  461. static void dp_mlo_setup_complete(struct cdp_mlo_ctxt *cdp_ml_ctxt)
  462. {
  463. struct dp_mlo_ctxt *mlo_ctxt = cdp_mlo_ctx_to_dp(cdp_ml_ctxt);
  464. int i;
  465. struct dp_soc *soc;
  466. struct dp_soc_be *be_soc;
  467. QDF_STATUS qdf_status;
  468. if (!cdp_ml_ctxt)
  469. return;
  470. for (i = 0; i < WLAN_MAX_MLO_CHIPS; i++) {
  471. soc = dp_mlo_get_soc_ref_by_chip_id(mlo_ctxt, i);
  472. if (!soc)
  473. continue;
  474. be_soc = dp_get_be_soc_from_dp_soc(soc);
  475. qdf_status = dp_partner_soc_rx_hw_cc_init(mlo_ctxt, be_soc);
  476. if (!QDF_IS_STATUS_SUCCESS(qdf_status)) {
  477. dp_alert("MLO partner SOC Rx desc CC init failed");
  478. qdf_assert_always(0);
  479. }
  480. }
  481. }
  482. static void dp_mlo_update_delta_tsf2(struct cdp_soc_t *soc_hdl,
  483. uint8_t pdev_id, uint64_t delta_tsf2)
  484. {
  485. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  486. struct dp_pdev *pdev;
  487. struct dp_pdev_be *be_pdev;
  488. pdev = dp_get_pdev_from_soc_pdev_id_wifi3((struct dp_soc *)soc,
  489. pdev_id);
  490. if (!pdev) {
  491. dp_err("pdev is NULL for pdev_id %u", pdev_id);
  492. return;
  493. }
  494. be_pdev = dp_get_be_pdev_from_dp_pdev(pdev);
  495. be_pdev->delta_tsf2 = delta_tsf2;
  496. }
  497. static void dp_mlo_update_delta_tqm(struct cdp_soc_t *soc_hdl,
  498. uint64_t delta_tqm)
  499. {
  500. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  501. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  502. be_soc->delta_tqm = delta_tqm;
  503. }
  504. static void dp_mlo_update_mlo_ts_offset(struct cdp_soc_t *soc_hdl,
  505. uint64_t offset)
  506. {
  507. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  508. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  509. be_soc->mlo_tstamp_offset = offset;
  510. }
  511. #ifdef CONFIG_MLO_SINGLE_DEV
  512. /**
  513. * dp_aggregate_vdev_basic_stats() - aggregate vdev basic stats
  514. * @tgt_vdev_stats: target vdev buffer
  515. * @src_vdev_stats: source vdev buffer
  516. *
  517. * return: void
  518. */
  519. static inline
  520. void dp_aggregate_vdev_basic_stats(
  521. struct cdp_vdev_stats *tgt_vdev_stats,
  522. struct cdp_vdev_stats *src_vdev_stats)
  523. {
  524. DP_UPDATE_BASIC_STATS(tgt_vdev_stats, src_vdev_stats);
  525. }
  526. /**
  527. * dp_aggregate_vdev_ingress_stats() - aggregate vdev ingress stats
  528. * @tgt_vdev_stats: target vdev buffer
  529. * @src_vdev_stats: source vdev buffer
  530. *
  531. * return: void
  532. */
  533. static inline
  534. void dp_aggregate_vdev_ingress_stats(
  535. struct cdp_vdev_stats *tgt_vdev_stats,
  536. struct cdp_vdev_stats *src_vdev_stats)
  537. {
  538. /* Aggregate vdev ingress stats */
  539. DP_UPDATE_INGRESS_STATS(tgt_vdev_stats, src_vdev_stats);
  540. }
  541. /**
  542. * dp_aggregate_vdev_stats_for_unmapped_peers() - aggregate unmap peer stats
  543. * @tgt_vdev_stats: target vdev buffer
  544. * @src_vdev_stats: source vdev buffer
  545. *
  546. * return: void
  547. */
  548. static inline
  549. void dp_aggregate_vdev_stats_for_unmapped_peers(
  550. struct cdp_vdev_stats *tgt_vdev_stats,
  551. struct cdp_vdev_stats *src_vdev_stats)
  552. {
  553. /* Aggregate unmapped peers stats */
  554. DP_UPDATE_VDEV_STATS_FOR_UNMAPPED_PEERS(tgt_vdev_stats, src_vdev_stats);
  555. }
  556. /**
  557. * dp_aggregate_all_vdev_stats() - aggregate vdev ingress and unmap peer stats
  558. * @tgt_vdev_stats: target vdev buffer
  559. * @src_vdev_stats: source vdev buffer
  560. *
  561. * return: void
  562. */
  563. static inline
  564. void dp_aggregate_all_vdev_stats(
  565. struct cdp_vdev_stats *tgt_vdev_stats,
  566. struct cdp_vdev_stats *src_vdev_stats)
  567. {
  568. dp_aggregate_vdev_ingress_stats(tgt_vdev_stats, src_vdev_stats);
  569. dp_aggregate_vdev_stats_for_unmapped_peers(tgt_vdev_stats,
  570. src_vdev_stats);
  571. }
  572. /**
  573. * dp_aggregate_interface_stats_based_on_peer_type() - aggregate stats at
  574. * VDEV level based on peer type connected to vdev
  575. * @vdev: DP VDEV handle
  576. * @vdev_stats: target vdev stats pointer
  577. * @peer_type: type of peer - MLO Link or Legacy peer
  578. *
  579. * return: void
  580. */
  581. static
  582. void dp_aggregate_interface_stats_based_on_peer_type(
  583. struct dp_vdev *vdev,
  584. struct cdp_vdev_stats *vdev_stats,
  585. enum dp_peer_type peer_type)
  586. {
  587. struct cdp_vdev_stats *tgt_vdev_stats = NULL;
  588. struct dp_vdev_be *be_vdev = NULL;
  589. if (!vdev || !vdev->pdev)
  590. return;
  591. tgt_vdev_stats = vdev_stats;
  592. be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  593. if (!be_vdev)
  594. return;
  595. if (peer_type == DP_PEER_TYPE_LEGACY) {
  596. dp_aggregate_all_vdev_stats(tgt_vdev_stats,
  597. &vdev->stats);
  598. } else {
  599. dp_aggregate_vdev_ingress_stats(tgt_vdev_stats,
  600. &vdev->stats);
  601. dp_aggregate_vdev_stats_for_unmapped_peers(
  602. tgt_vdev_stats,
  603. &be_vdev->mlo_stats);
  604. }
  605. /* Aggregate associated peer stats */
  606. dp_vdev_iterate_specific_peer_type(vdev,
  607. dp_update_vdev_stats,
  608. vdev_stats,
  609. DP_MOD_ID_GENERIC_STATS,
  610. peer_type);
  611. }
  612. /**
  613. * dp_aggregate_interface_stats() - aggregate stats at VDEV level
  614. * @vdev: DP VDEV handle
  615. * @vdev_stats: target vdev stats pointer
  616. *
  617. * return: void
  618. */
  619. static
  620. void dp_aggregate_interface_stats(struct dp_vdev *vdev,
  621. struct cdp_vdev_stats *vdev_stats)
  622. {
  623. struct dp_vdev_be *be_vdev = NULL;
  624. if (!vdev || !vdev->pdev)
  625. return;
  626. be_vdev = dp_get_be_vdev_from_dp_vdev(vdev);
  627. if (!be_vdev)
  628. return;
  629. dp_aggregate_all_vdev_stats(vdev_stats, &be_vdev->mlo_stats);
  630. dp_aggregate_all_vdev_stats(vdev_stats, &vdev->stats);
  631. dp_vdev_iterate_peer(vdev, dp_update_vdev_stats, vdev_stats,
  632. DP_MOD_ID_GENERIC_STATS);
  633. dp_update_vdev_rate_stats(vdev_stats, &vdev->stats);
  634. }
  635. /**
  636. * dp_mlo_aggr_ptnr_iface_stats() - aggregate mlo partner vdev stats
  637. * @be_vdev: vdev handle
  638. * @ptnr_vdev: partner vdev handle
  639. * @arg: target buffer for aggregation
  640. *
  641. * return: void
  642. */
  643. static
  644. void dp_mlo_aggr_ptnr_iface_stats(struct dp_vdev_be *be_vdev,
  645. struct dp_vdev *ptnr_vdev,
  646. void *arg)
  647. {
  648. struct cdp_vdev_stats *tgt_vdev_stats = (struct cdp_vdev_stats *)arg;
  649. dp_aggregate_interface_stats(ptnr_vdev, tgt_vdev_stats);
  650. }
  651. /**
  652. * dp_mlo_aggr_ptnr_iface_stats_mlo_links() - aggregate mlo partner vdev stats
  653. * based on peer type
  654. * @be_vdev: vdev handle
  655. * @ptnr_vdev: partner vdev handle
  656. * @arg: target buffer for aggregation
  657. *
  658. * return: void
  659. */
  660. static
  661. void dp_mlo_aggr_ptnr_iface_stats_mlo_links(
  662. struct dp_vdev_be *be_vdev,
  663. struct dp_vdev *ptnr_vdev,
  664. void *arg)
  665. {
  666. struct cdp_vdev_stats *tgt_vdev_stats = (struct cdp_vdev_stats *)arg;
  667. dp_aggregate_interface_stats_based_on_peer_type(ptnr_vdev,
  668. tgt_vdev_stats,
  669. DP_PEER_TYPE_MLO_LINK);
  670. }
  671. /**
  672. * dp_aggregate_sta_interface_stats() - for sta mode aggregate vdev stats from
  673. * all link peers
  674. * @soc: soc handle
  675. * @vdev: vdev handle
  676. * @buf: target buffer for aggregation
  677. *
  678. * return: QDF_STATUS
  679. */
  680. static QDF_STATUS
  681. dp_aggregate_sta_interface_stats(struct dp_soc *soc,
  682. struct dp_vdev *vdev,
  683. void *buf)
  684. {
  685. struct dp_peer *vap_bss_peer = NULL;
  686. struct dp_peer *mld_peer = NULL;
  687. struct dp_peer *link_peer = NULL;
  688. struct dp_mld_link_peers link_peers_info;
  689. uint8_t i = 0;
  690. QDF_STATUS ret = QDF_STATUS_SUCCESS;
  691. vap_bss_peer = dp_vdev_bss_peer_ref_n_get(soc, vdev,
  692. DP_MOD_ID_GENERIC_STATS);
  693. if (!vap_bss_peer)
  694. return QDF_STATUS_E_FAILURE;
  695. mld_peer = DP_GET_MLD_PEER_FROM_PEER(vap_bss_peer);
  696. if (!mld_peer) {
  697. dp_peer_unref_delete(vap_bss_peer, DP_MOD_ID_GENERIC_STATS);
  698. return QDF_STATUS_E_FAILURE;
  699. }
  700. dp_get_link_peers_ref_from_mld_peer(soc, mld_peer, &link_peers_info,
  701. DP_MOD_ID_GENERIC_STATS);
  702. for (i = 0; i < link_peers_info.num_links; i++) {
  703. link_peer = link_peers_info.link_peers[i];
  704. dp_update_vdev_stats(soc, link_peer, buf);
  705. dp_aggregate_vdev_ingress_stats((struct cdp_vdev_stats *)buf,
  706. &link_peer->vdev->stats);
  707. dp_aggregate_vdev_basic_stats(
  708. (struct cdp_vdev_stats *)buf,
  709. &link_peer->vdev->stats);
  710. }
  711. dp_release_link_peers_ref(&link_peers_info, DP_MOD_ID_GENERIC_STATS);
  712. dp_peer_unref_delete(vap_bss_peer, DP_MOD_ID_GENERIC_STATS);
  713. return ret;
  714. }
  715. static QDF_STATUS dp_mlo_get_mld_vdev_stats(struct cdp_soc_t *soc_hdl,
  716. uint8_t vdev_id, void *buf,
  717. bool link_vdev_only)
  718. {
  719. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  720. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  721. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  722. DP_MOD_ID_GENERIC_STATS);
  723. struct dp_vdev_be *vdev_be = NULL;
  724. QDF_STATUS ret = QDF_STATUS_SUCCESS;
  725. if (!vdev)
  726. return QDF_STATUS_E_FAILURE;
  727. vdev_be = dp_get_be_vdev_from_dp_vdev(vdev);
  728. if (!vdev_be) {
  729. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_GENERIC_STATS);
  730. return QDF_STATUS_E_FAILURE;
  731. }
  732. if (vdev->opmode == wlan_op_mode_sta) {
  733. ret = dp_aggregate_sta_interface_stats(soc, vdev, buf);
  734. goto complete;
  735. }
  736. if (DP_MLD_MODE_HYBRID_NONBOND == soc->mld_mode_ap &&
  737. vdev->opmode == wlan_op_mode_ap) {
  738. dp_aggregate_interface_stats_based_on_peer_type(
  739. vdev, buf,
  740. DP_PEER_TYPE_MLO_LINK);
  741. if (link_vdev_only)
  742. goto complete;
  743. /* Aggregate stats from partner vdevs */
  744. dp_mlo_iter_ptnr_vdev(be_soc, vdev_be,
  745. dp_mlo_aggr_ptnr_iface_stats_mlo_links,
  746. buf,
  747. DP_MOD_ID_GENERIC_STATS,
  748. DP_ALL_VDEV_ITER);
  749. } else {
  750. dp_aggregate_interface_stats(vdev, buf);
  751. if (link_vdev_only)
  752. goto complete;
  753. /* Aggregate stats from partner vdevs */
  754. dp_mlo_iter_ptnr_vdev(be_soc, vdev_be,
  755. dp_mlo_aggr_ptnr_iface_stats, buf,
  756. DP_MOD_ID_GENERIC_STATS,
  757. DP_ALL_VDEV_ITER);
  758. }
  759. complete:
  760. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_GENERIC_STATS);
  761. return ret;
  762. }
  763. QDF_STATUS
  764. dp_get_interface_stats_be(struct cdp_soc_t *soc_hdl,
  765. uint8_t vdev_id,
  766. void *buf,
  767. bool is_aggregate)
  768. {
  769. struct dp_soc *soc = cdp_soc_t_to_dp_soc(soc_hdl);
  770. struct dp_vdev *vdev = dp_vdev_get_ref_by_id(soc, vdev_id,
  771. DP_MOD_ID_GENERIC_STATS);
  772. if (!vdev)
  773. return QDF_STATUS_E_FAILURE;
  774. if (DP_MLD_MODE_HYBRID_NONBOND == soc->mld_mode_ap &&
  775. vdev->opmode == wlan_op_mode_ap) {
  776. dp_aggregate_interface_stats_based_on_peer_type(
  777. vdev, buf,
  778. DP_PEER_TYPE_LEGACY);
  779. } else {
  780. dp_aggregate_interface_stats(vdev, buf);
  781. }
  782. dp_vdev_unref_delete(soc, vdev, DP_MOD_ID_GENERIC_STATS);
  783. return QDF_STATUS_SUCCESS;
  784. }
  785. #endif
  786. static struct cdp_mlo_ops dp_mlo_ops = {
  787. .mlo_soc_setup = dp_mlo_soc_setup,
  788. .mlo_soc_teardown = dp_mlo_soc_teardown,
  789. .update_mlo_ptnr_list = dp_update_mlo_ptnr_list,
  790. .clear_mlo_ptnr_list = dp_clear_mlo_ptnr_list,
  791. .mlo_setup_complete = dp_mlo_setup_complete,
  792. .mlo_update_delta_tsf2 = dp_mlo_update_delta_tsf2,
  793. .mlo_update_delta_tqm = dp_mlo_update_delta_tqm,
  794. .mlo_update_mlo_ts_offset = dp_mlo_update_mlo_ts_offset,
  795. .mlo_ctxt_attach = dp_mlo_ctxt_attach_wifi3,
  796. .mlo_ctxt_detach = dp_mlo_ctxt_detach_wifi3,
  797. #ifdef CONFIG_MLO_SINGLE_DEV
  798. .mlo_get_mld_vdev_stats = dp_mlo_get_mld_vdev_stats,
  799. #endif
  800. };
  801. void dp_soc_mlo_fill_params(struct dp_soc *soc,
  802. struct cdp_soc_attach_params *params)
  803. {
  804. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  805. if (!params->mlo_enabled) {
  806. dp_warn("MLO not enabled on SOC");
  807. return;
  808. }
  809. be_soc->mlo_chip_id = params->mlo_chip_id;
  810. be_soc->ml_ctxt = cdp_mlo_ctx_to_dp(params->ml_context);
  811. be_soc->mlo_enabled = 1;
  812. soc->cdp_soc.ops->mlo_ops = &dp_mlo_ops;
  813. }
  814. void dp_mlo_update_link_to_pdev_map(struct dp_soc *soc, struct dp_pdev *pdev)
  815. {
  816. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  817. struct dp_pdev_be *be_pdev = dp_get_be_pdev_from_dp_pdev(pdev);
  818. struct dp_mlo_ctxt *ml_ctxt = be_soc->ml_ctxt;
  819. uint8_t link_id;
  820. if (!be_soc->mlo_enabled)
  821. return;
  822. if (!ml_ctxt)
  823. return;
  824. link_id = be_pdev->mlo_link_id;
  825. if (link_id < WLAN_MAX_MLO_CHIPS * WLAN_MAX_MLO_LINKS_PER_SOC) {
  826. if (!ml_ctxt->link_to_pdev_map[link_id])
  827. ml_ctxt->link_to_pdev_map[link_id] = be_pdev;
  828. else
  829. dp_alert("Attempt to update existing map for link %u",
  830. link_id);
  831. }
  832. }
  833. void dp_mlo_update_link_to_pdev_unmap(struct dp_soc *soc, struct dp_pdev *pdev)
  834. {
  835. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  836. struct dp_pdev_be *be_pdev = dp_get_be_pdev_from_dp_pdev(pdev);
  837. struct dp_mlo_ctxt *ml_ctxt = be_soc->ml_ctxt;
  838. uint8_t link_id;
  839. if (!be_soc->mlo_enabled)
  840. return;
  841. if (!ml_ctxt)
  842. return;
  843. link_id = be_pdev->mlo_link_id;
  844. if (link_id < WLAN_MAX_MLO_CHIPS * WLAN_MAX_MLO_LINKS_PER_SOC)
  845. ml_ctxt->link_to_pdev_map[link_id] = NULL;
  846. }
  847. static struct dp_pdev_be *
  848. dp_mlo_get_be_pdev_from_link_id(struct dp_mlo_ctxt *ml_ctxt, uint8_t link_id)
  849. {
  850. if (link_id < WLAN_MAX_MLO_CHIPS * WLAN_MAX_MLO_LINKS_PER_SOC)
  851. return ml_ctxt->link_to_pdev_map[link_id];
  852. return NULL;
  853. }
  854. void dp_pdev_mlo_fill_params(struct dp_pdev *pdev,
  855. struct cdp_pdev_attach_params *params)
  856. {
  857. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(pdev->soc);
  858. struct dp_pdev_be *be_pdev = dp_get_be_pdev_from_dp_pdev(pdev);
  859. if (!be_soc->mlo_enabled) {
  860. dp_info("MLO not enabled on SOC");
  861. return;
  862. }
  863. be_pdev->mlo_link_id = params->mlo_link_id;
  864. }
  865. void dp_mlo_partner_chips_map(struct dp_soc *soc,
  866. struct dp_peer *peer,
  867. uint16_t peer_id)
  868. {
  869. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  870. struct dp_mlo_ctxt *mlo_ctxt = NULL;
  871. bool is_ml_peer_id =
  872. HTT_RX_PEER_META_DATA_V1_ML_PEER_VALID_GET(peer_id);
  873. uint8_t chip_id;
  874. struct dp_soc *temp_soc;
  875. /* for non ML peer dont map on partner chips*/
  876. if (!is_ml_peer_id)
  877. return;
  878. mlo_ctxt = be_soc->ml_ctxt;
  879. if (!mlo_ctxt)
  880. return;
  881. qdf_spin_lock_bh(&mlo_ctxt->ml_soc_list_lock);
  882. for (chip_id = 0; chip_id < DP_MAX_MLO_CHIPS; chip_id++) {
  883. temp_soc = mlo_ctxt->ml_soc_list[chip_id];
  884. if (!temp_soc)
  885. continue;
  886. /* skip if this is current soc */
  887. if (temp_soc == soc)
  888. continue;
  889. dp_peer_find_id_to_obj_add(temp_soc, peer, peer_id);
  890. }
  891. qdf_spin_unlock_bh(&mlo_ctxt->ml_soc_list_lock);
  892. }
  893. qdf_export_symbol(dp_mlo_partner_chips_map);
  894. void dp_mlo_partner_chips_unmap(struct dp_soc *soc,
  895. uint16_t peer_id)
  896. {
  897. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  898. struct dp_mlo_ctxt *mlo_ctxt = be_soc->ml_ctxt;
  899. bool is_ml_peer_id =
  900. HTT_RX_PEER_META_DATA_V1_ML_PEER_VALID_GET(peer_id);
  901. uint8_t chip_id;
  902. struct dp_soc *temp_soc;
  903. if (!is_ml_peer_id)
  904. return;
  905. if (!mlo_ctxt)
  906. return;
  907. qdf_spin_lock_bh(&mlo_ctxt->ml_soc_list_lock);
  908. for (chip_id = 0; chip_id < DP_MAX_MLO_CHIPS; chip_id++) {
  909. temp_soc = mlo_ctxt->ml_soc_list[chip_id];
  910. if (!temp_soc)
  911. continue;
  912. /* skip if this is current soc */
  913. if (temp_soc == soc)
  914. continue;
  915. dp_peer_find_id_to_obj_remove(temp_soc, peer_id);
  916. }
  917. qdf_spin_unlock_bh(&mlo_ctxt->ml_soc_list_lock);
  918. }
  919. qdf_export_symbol(dp_mlo_partner_chips_unmap);
  920. uint8_t dp_mlo_get_chip_id(struct dp_soc *soc)
  921. {
  922. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  923. return be_soc->mlo_chip_id;
  924. }
  925. qdf_export_symbol(dp_mlo_get_chip_id);
  926. struct dp_peer *
  927. dp_link_peer_hash_find_by_chip_id(struct dp_soc *soc,
  928. uint8_t *peer_mac_addr,
  929. int mac_addr_is_aligned,
  930. uint8_t vdev_id,
  931. uint8_t chip_id,
  932. enum dp_mod_id mod_id)
  933. {
  934. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  935. struct dp_mlo_ctxt *mlo_ctxt = be_soc->ml_ctxt;
  936. struct dp_soc *link_peer_soc = NULL;
  937. struct dp_peer *peer = NULL;
  938. if (!mlo_ctxt)
  939. return NULL;
  940. link_peer_soc = dp_mlo_get_soc_ref_by_chip_id(mlo_ctxt, chip_id);
  941. if (!link_peer_soc)
  942. return NULL;
  943. peer = dp_peer_find_hash_find(link_peer_soc, peer_mac_addr,
  944. mac_addr_is_aligned, vdev_id,
  945. mod_id);
  946. qdf_atomic_dec(&link_peer_soc->ref_count);
  947. return peer;
  948. }
  949. qdf_export_symbol(dp_link_peer_hash_find_by_chip_id);
  950. void dp_mlo_get_rx_hash_key(struct dp_soc *soc,
  951. struct cdp_lro_hash_config *lro_hash)
  952. {
  953. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  954. struct dp_mlo_ctxt *ml_ctxt = be_soc->ml_ctxt;
  955. if (!be_soc->mlo_enabled || !ml_ctxt)
  956. return dp_get_rx_hash_key_bytes(lro_hash);
  957. qdf_mem_copy(lro_hash->toeplitz_hash_ipv4, ml_ctxt->toeplitz_hash_ipv4,
  958. (sizeof(lro_hash->toeplitz_hash_ipv4[0]) *
  959. LRO_IPV4_SEED_ARR_SZ));
  960. qdf_mem_copy(lro_hash->toeplitz_hash_ipv6, ml_ctxt->toeplitz_hash_ipv6,
  961. (sizeof(lro_hash->toeplitz_hash_ipv6[0]) *
  962. LRO_IPV6_SEED_ARR_SZ));
  963. }
  964. struct dp_soc *
  965. dp_rx_replenish_soc_get(struct dp_soc *soc, uint8_t chip_id)
  966. {
  967. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  968. struct dp_mlo_ctxt *mlo_ctxt = be_soc->ml_ctxt;
  969. struct dp_soc *replenish_soc;
  970. if (!be_soc->mlo_enabled || !mlo_ctxt)
  971. return soc;
  972. if (be_soc->mlo_chip_id == chip_id)
  973. return soc;
  974. replenish_soc = dp_mlo_get_soc_ref_by_chip_id(mlo_ctxt, chip_id);
  975. if (qdf_unlikely(!replenish_soc)) {
  976. dp_alert("replenish SOC is NULL");
  977. qdf_assert_always(0);
  978. }
  979. return replenish_soc;
  980. }
  981. uint8_t dp_soc_get_num_soc_be(struct dp_soc *soc)
  982. {
  983. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  984. struct dp_mlo_ctxt *mlo_ctxt = be_soc->ml_ctxt;
  985. if (!be_soc->mlo_enabled || !mlo_ctxt)
  986. return 1;
  987. return mlo_ctxt->ml_soc_cnt;
  988. }
  989. struct dp_soc *
  990. dp_soc_get_by_idle_bm_id(struct dp_soc *soc, uint8_t idle_bm_id)
  991. {
  992. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  993. struct dp_mlo_ctxt *mlo_ctxt = be_soc->ml_ctxt;
  994. struct dp_soc *partner_soc = NULL;
  995. uint8_t chip_id;
  996. if (!be_soc->mlo_enabled || !mlo_ctxt)
  997. return soc;
  998. for (chip_id = 0; chip_id < WLAN_MAX_MLO_CHIPS; chip_id++) {
  999. partner_soc = dp_mlo_get_soc_ref_by_chip_id(mlo_ctxt, chip_id);
  1000. if (!partner_soc)
  1001. continue;
  1002. if (partner_soc->idle_link_bm_id == idle_bm_id)
  1003. return partner_soc;
  1004. }
  1005. return NULL;
  1006. }
  1007. #ifdef WLAN_MLO_MULTI_CHIP
  1008. void dp_mlo_iter_ptnr_vdev(struct dp_soc_be *be_soc,
  1009. struct dp_vdev_be *be_vdev,
  1010. dp_ptnr_vdev_iter_func func,
  1011. void *arg,
  1012. enum dp_mod_id mod_id,
  1013. uint8_t type)
  1014. {
  1015. int i = 0;
  1016. int j = 0;
  1017. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  1018. if (type < DP_LINK_VDEV_ITER || type > DP_ALL_VDEV_ITER) {
  1019. dp_err("invalid iterate type");
  1020. return;
  1021. }
  1022. for (i = 0; (i < WLAN_MAX_MLO_CHIPS) &&
  1023. IS_LINK_VDEV_ITER_REQUIRED(type); i++) {
  1024. struct dp_soc *ptnr_soc =
  1025. dp_mlo_get_soc_ref_by_chip_id(dp_mlo, i);
  1026. if (!ptnr_soc)
  1027. continue;
  1028. for (j = 0 ; j < WLAN_MAX_MLO_LINKS_PER_SOC ; j++) {
  1029. struct dp_vdev *ptnr_vdev;
  1030. ptnr_vdev = dp_vdev_get_ref_by_id(
  1031. ptnr_soc,
  1032. be_vdev->partner_vdev_list[i][j],
  1033. mod_id);
  1034. if (!ptnr_vdev)
  1035. continue;
  1036. (*func)(be_vdev, ptnr_vdev, arg);
  1037. dp_vdev_unref_delete(ptnr_vdev->pdev->soc,
  1038. ptnr_vdev,
  1039. mod_id);
  1040. }
  1041. }
  1042. for (i = 0; (i < WLAN_MAX_MLO_CHIPS) &&
  1043. IS_BRIDGE_VDEV_ITER_REQUIRED(type); i++) {
  1044. struct dp_soc *ptnr_soc =
  1045. dp_mlo_get_soc_ref_by_chip_id(dp_mlo, i);
  1046. if (!ptnr_soc)
  1047. continue;
  1048. for (j = 0 ; j < WLAN_MAX_MLO_LINKS_PER_SOC ; j++) {
  1049. struct dp_vdev *bridge_vdev;
  1050. bridge_vdev = dp_vdev_get_ref_by_id(
  1051. ptnr_soc,
  1052. be_vdev->bridge_vdev_list[i][j],
  1053. mod_id);
  1054. if (!bridge_vdev)
  1055. continue;
  1056. (*func)(be_vdev, bridge_vdev, arg);
  1057. dp_vdev_unref_delete(bridge_vdev->pdev->soc,
  1058. bridge_vdev,
  1059. mod_id);
  1060. }
  1061. }
  1062. }
  1063. qdf_export_symbol(dp_mlo_iter_ptnr_vdev);
  1064. #endif
  1065. #ifdef WLAN_MCAST_MLO
  1066. struct dp_vdev *dp_mlo_get_mcast_primary_vdev(struct dp_soc_be *be_soc,
  1067. struct dp_vdev_be *be_vdev,
  1068. enum dp_mod_id mod_id)
  1069. {
  1070. int i = 0;
  1071. int j = 0;
  1072. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  1073. struct dp_vdev *vdev = (struct dp_vdev *)be_vdev;
  1074. if (be_vdev->mcast_primary) {
  1075. if (dp_vdev_get_ref((struct dp_soc *)be_soc, vdev, mod_id) !=
  1076. QDF_STATUS_SUCCESS)
  1077. return NULL;
  1078. return vdev;
  1079. }
  1080. for (i = 0; i < WLAN_MAX_MLO_CHIPS ; i++) {
  1081. struct dp_soc *ptnr_soc =
  1082. dp_mlo_get_soc_ref_by_chip_id(dp_mlo, i);
  1083. if (!ptnr_soc)
  1084. continue;
  1085. for (j = 0 ; j < WLAN_MAX_MLO_LINKS_PER_SOC ; j++) {
  1086. struct dp_vdev *ptnr_vdev = NULL;
  1087. struct dp_vdev_be *be_ptnr_vdev = NULL;
  1088. ptnr_vdev = dp_vdev_get_ref_by_id(
  1089. ptnr_soc,
  1090. be_vdev->partner_vdev_list[i][j],
  1091. mod_id);
  1092. if (!ptnr_vdev)
  1093. continue;
  1094. be_ptnr_vdev = dp_get_be_vdev_from_dp_vdev(ptnr_vdev);
  1095. if (be_ptnr_vdev->mcast_primary)
  1096. return ptnr_vdev;
  1097. dp_vdev_unref_delete(be_ptnr_vdev->vdev.pdev->soc,
  1098. &be_ptnr_vdev->vdev,
  1099. mod_id);
  1100. }
  1101. }
  1102. return NULL;
  1103. }
  1104. qdf_export_symbol(dp_mlo_get_mcast_primary_vdev);
  1105. #endif
  1106. /**
  1107. * dp_mlo_iter_ptnr_soc() - iterate through mlo soc list and call the callback
  1108. * @be_soc: dp_soc_be pointer
  1109. * @func: Function to be called for each soc
  1110. * @arg: context to be passed to the callback
  1111. *
  1112. * Return: true if mlo is enabled, false if mlo is disabled
  1113. */
  1114. bool dp_mlo_iter_ptnr_soc(struct dp_soc_be *be_soc, dp_ptnr_soc_iter_func func,
  1115. void *arg)
  1116. {
  1117. int i = 0;
  1118. struct dp_mlo_ctxt *dp_mlo = be_soc->ml_ctxt;
  1119. if (!be_soc->mlo_enabled || !be_soc->ml_ctxt)
  1120. return false;
  1121. for (i = 0; i < WLAN_MAX_MLO_CHIPS ; i++) {
  1122. struct dp_soc *ptnr_soc =
  1123. dp_mlo_get_soc_ref_by_chip_id(dp_mlo, i);
  1124. if (!ptnr_soc)
  1125. continue;
  1126. (*func)(ptnr_soc, arg, i);
  1127. }
  1128. return true;
  1129. }
  1130. qdf_export_symbol(dp_mlo_iter_ptnr_soc);
  1131. static inline uint64_t dp_mlo_get_mlo_ts_offset(struct dp_pdev_be *be_pdev)
  1132. {
  1133. struct dp_soc *soc;
  1134. struct dp_pdev *pdev;
  1135. struct dp_soc_be *be_soc;
  1136. uint32_t mlo_offset;
  1137. pdev = &be_pdev->pdev;
  1138. soc = pdev->soc;
  1139. be_soc = dp_get_be_soc_from_dp_soc(soc);
  1140. mlo_offset = be_soc->mlo_tstamp_offset;
  1141. return mlo_offset;
  1142. }
  1143. int32_t dp_mlo_get_delta_tsf2_wrt_mlo_offset(struct dp_soc *soc,
  1144. uint8_t hw_link_id)
  1145. {
  1146. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1147. struct dp_mlo_ctxt *ml_ctxt = be_soc->ml_ctxt;
  1148. struct dp_pdev_be *be_pdev;
  1149. int32_t delta_tsf2_mlo_offset;
  1150. int32_t mlo_offset, delta_tsf2;
  1151. if (!ml_ctxt)
  1152. return 0;
  1153. be_pdev = dp_mlo_get_be_pdev_from_link_id(ml_ctxt, hw_link_id);
  1154. if (!be_pdev)
  1155. return 0;
  1156. mlo_offset = dp_mlo_get_mlo_ts_offset(be_pdev);
  1157. delta_tsf2 = be_pdev->delta_tsf2;
  1158. delta_tsf2_mlo_offset = mlo_offset - delta_tsf2;
  1159. return delta_tsf2_mlo_offset;
  1160. }
  1161. int32_t dp_mlo_get_delta_tqm_wrt_mlo_offset(struct dp_soc *soc)
  1162. {
  1163. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1164. int32_t delta_tqm_mlo_offset;
  1165. int32_t mlo_offset, delta_tqm;
  1166. mlo_offset = be_soc->mlo_tstamp_offset;
  1167. delta_tqm = be_soc->delta_tqm;
  1168. delta_tqm_mlo_offset = mlo_offset - delta_tqm;
  1169. return delta_tqm_mlo_offset;
  1170. }
  1171. #ifdef DP_UMAC_HW_RESET_SUPPORT
  1172. /**
  1173. * dp_umac_reset_update_partner_map() - Update Umac reset partner map
  1174. * @mlo_ctx: DP ML context handle
  1175. * @chip_id: chip id
  1176. * @set: flag indicating whether to set or clear the bit
  1177. *
  1178. * Return: void
  1179. */
  1180. static void dp_umac_reset_update_partner_map(struct dp_mlo_ctxt *mlo_ctx,
  1181. int chip_id, bool set)
  1182. {
  1183. struct dp_soc_mlo_umac_reset_ctx *grp_umac_reset_ctx =
  1184. &mlo_ctx->grp_umac_reset_ctx;
  1185. if (set)
  1186. qdf_atomic_set_bit(chip_id, &grp_umac_reset_ctx->partner_map);
  1187. else
  1188. qdf_atomic_clear_bit(chip_id, &grp_umac_reset_ctx->partner_map);
  1189. }
  1190. QDF_STATUS dp_umac_reset_notify_asserted_soc(struct dp_soc *soc)
  1191. {
  1192. struct dp_mlo_ctxt *mlo_ctx;
  1193. struct dp_soc_be *be_soc;
  1194. be_soc = dp_get_be_soc_from_dp_soc(soc);
  1195. if (!be_soc) {
  1196. dp_umac_reset_err("null be_soc");
  1197. return QDF_STATUS_E_NULL_VALUE;
  1198. }
  1199. mlo_ctx = be_soc->ml_ctxt;
  1200. if (!mlo_ctx) {
  1201. /* This API can be called for non-MLO SOC as well. Hence, return
  1202. * the status as success when mlo_ctx is NULL.
  1203. */
  1204. return QDF_STATUS_SUCCESS;
  1205. }
  1206. dp_umac_reset_update_partner_map(mlo_ctx, be_soc->mlo_chip_id, false);
  1207. return QDF_STATUS_SUCCESS;
  1208. }
  1209. /**
  1210. * dp_umac_reset_complete_umac_recovery() - Complete Umac reset session
  1211. * @soc: dp soc handle
  1212. *
  1213. * Return: void
  1214. */
  1215. void dp_umac_reset_complete_umac_recovery(struct dp_soc *soc)
  1216. {
  1217. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1218. struct dp_mlo_ctxt *mlo_ctx = be_soc->ml_ctxt;
  1219. struct dp_soc_mlo_umac_reset_ctx *grp_umac_reset_ctx;
  1220. if (!mlo_ctx) {
  1221. dp_umac_reset_alert("Umac reset was handled on soc %pK", soc);
  1222. return;
  1223. }
  1224. grp_umac_reset_ctx = &mlo_ctx->grp_umac_reset_ctx;
  1225. qdf_spin_lock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  1226. grp_umac_reset_ctx->umac_reset_in_progress = false;
  1227. grp_umac_reset_ctx->is_target_recovery = false;
  1228. grp_umac_reset_ctx->response_map = 0;
  1229. grp_umac_reset_ctx->request_map = 0;
  1230. grp_umac_reset_ctx->initiator_chip_id = 0;
  1231. qdf_spin_unlock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  1232. dp_umac_reset_alert("Umac reset was handled on mlo group ctxt %pK",
  1233. mlo_ctx);
  1234. }
  1235. /**
  1236. * dp_umac_reset_initiate_umac_recovery() - Initiate Umac reset session
  1237. * @soc: dp soc handle
  1238. * @umac_reset_ctx: Umac reset context
  1239. * @rx_event: Rx event received
  1240. * @is_target_recovery: Flag to indicate if it is triggered for target recovery
  1241. *
  1242. * Return: status
  1243. */
  1244. QDF_STATUS dp_umac_reset_initiate_umac_recovery(struct dp_soc *soc,
  1245. struct dp_soc_umac_reset_ctx *umac_reset_ctx,
  1246. enum umac_reset_rx_event rx_event,
  1247. bool is_target_recovery)
  1248. {
  1249. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1250. struct dp_mlo_ctxt *mlo_ctx = be_soc->ml_ctxt;
  1251. struct dp_soc_mlo_umac_reset_ctx *grp_umac_reset_ctx;
  1252. QDF_STATUS status = QDF_STATUS_SUCCESS;
  1253. if (!mlo_ctx)
  1254. return dp_umac_reset_validate_n_update_state_machine_on_rx(
  1255. umac_reset_ctx, rx_event,
  1256. UMAC_RESET_STATE_WAIT_FOR_TRIGGER,
  1257. UMAC_RESET_STATE_DO_TRIGGER_RECEIVED);
  1258. grp_umac_reset_ctx = &mlo_ctx->grp_umac_reset_ctx;
  1259. qdf_spin_lock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  1260. if (grp_umac_reset_ctx->umac_reset_in_progress) {
  1261. qdf_spin_unlock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  1262. return QDF_STATUS_E_INVAL;
  1263. }
  1264. status = dp_umac_reset_validate_n_update_state_machine_on_rx(
  1265. umac_reset_ctx, rx_event,
  1266. UMAC_RESET_STATE_WAIT_FOR_TRIGGER,
  1267. UMAC_RESET_STATE_DO_TRIGGER_RECEIVED);
  1268. if (status != QDF_STATUS_SUCCESS) {
  1269. qdf_spin_unlock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  1270. return status;
  1271. }
  1272. grp_umac_reset_ctx->umac_reset_in_progress = true;
  1273. grp_umac_reset_ctx->is_target_recovery = is_target_recovery;
  1274. /* We don't wait for the 'Umac trigger' message from all socs */
  1275. grp_umac_reset_ctx->request_map = grp_umac_reset_ctx->partner_map;
  1276. grp_umac_reset_ctx->response_map = grp_umac_reset_ctx->partner_map;
  1277. grp_umac_reset_ctx->initiator_chip_id = dp_mlo_get_chip_id(soc);
  1278. grp_umac_reset_ctx->umac_reset_count++;
  1279. qdf_spin_unlock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  1280. return QDF_STATUS_SUCCESS;
  1281. }
  1282. /**
  1283. * dp_umac_reset_handle_action_cb() - Function to call action callback
  1284. * @soc: dp soc handle
  1285. * @umac_reset_ctx: Umac reset context
  1286. * @action: Action to call the callback for
  1287. *
  1288. * Return: QDF_STATUS status
  1289. */
  1290. QDF_STATUS
  1291. dp_umac_reset_handle_action_cb(struct dp_soc *soc,
  1292. struct dp_soc_umac_reset_ctx *umac_reset_ctx,
  1293. enum umac_reset_action action)
  1294. {
  1295. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1296. struct dp_mlo_ctxt *mlo_ctx = be_soc->ml_ctxt;
  1297. struct dp_soc_mlo_umac_reset_ctx *grp_umac_reset_ctx;
  1298. if (!mlo_ctx) {
  1299. dp_umac_reset_debug("MLO context is Null");
  1300. goto handle;
  1301. }
  1302. grp_umac_reset_ctx = &mlo_ctx->grp_umac_reset_ctx;
  1303. qdf_spin_lock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  1304. qdf_atomic_set_bit(dp_mlo_get_chip_id(soc),
  1305. &grp_umac_reset_ctx->request_map);
  1306. dp_umac_reset_debug("partner_map %u request_map %u",
  1307. grp_umac_reset_ctx->partner_map,
  1308. grp_umac_reset_ctx->request_map);
  1309. /* This logic is needed for synchronization between mlo socs */
  1310. if ((grp_umac_reset_ctx->partner_map & grp_umac_reset_ctx->request_map)
  1311. != grp_umac_reset_ctx->partner_map) {
  1312. struct hif_softc *hif_sc = HIF_GET_SOFTC(soc->hif_handle);
  1313. struct hif_umac_reset_ctx *hif_umac_reset_ctx;
  1314. if (!hif_sc) {
  1315. hif_err("scn is null");
  1316. qdf_assert_always(0);
  1317. return QDF_STATUS_E_FAILURE;
  1318. }
  1319. hif_umac_reset_ctx = &hif_sc->umac_reset_ctx;
  1320. /* Mark the action as pending */
  1321. umac_reset_ctx->pending_action = action;
  1322. /* Reschedule the tasklet and exit */
  1323. tasklet_hi_schedule(&hif_umac_reset_ctx->intr_tq);
  1324. qdf_spin_unlock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  1325. return QDF_STATUS_SUCCESS;
  1326. }
  1327. qdf_spin_unlock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  1328. umac_reset_ctx->pending_action = UMAC_RESET_ACTION_NONE;
  1329. handle:
  1330. if (!umac_reset_ctx->rx_actions.cb[action]) {
  1331. dp_umac_reset_err("rx callback is NULL");
  1332. return QDF_STATUS_E_FAILURE;
  1333. }
  1334. return umac_reset_ctx->rx_actions.cb[action](soc);
  1335. }
  1336. /**
  1337. * dp_umac_reset_post_tx_cmd() - Iterate partner socs and post Tx command
  1338. * @umac_reset_ctx: UMAC reset context
  1339. * @tx_cmd: Tx command to be posted
  1340. *
  1341. * Return: QDF status of operation
  1342. */
  1343. QDF_STATUS
  1344. dp_umac_reset_post_tx_cmd(struct dp_soc_umac_reset_ctx *umac_reset_ctx,
  1345. enum umac_reset_tx_cmd tx_cmd)
  1346. {
  1347. struct dp_soc *soc = container_of(umac_reset_ctx, struct dp_soc,
  1348. umac_reset_ctx);
  1349. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1350. struct dp_mlo_ctxt *mlo_ctx = be_soc->ml_ctxt;
  1351. struct dp_soc_mlo_umac_reset_ctx *grp_umac_reset_ctx;
  1352. if (!mlo_ctx) {
  1353. dp_umac_reset_post_tx_cmd_via_shmem(soc, &tx_cmd, 0);
  1354. return QDF_STATUS_SUCCESS;
  1355. }
  1356. grp_umac_reset_ctx = &mlo_ctx->grp_umac_reset_ctx;
  1357. qdf_spin_lock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  1358. qdf_atomic_set_bit(dp_mlo_get_chip_id(soc),
  1359. &grp_umac_reset_ctx->response_map);
  1360. /* This logic is needed for synchronization between mlo socs */
  1361. if ((grp_umac_reset_ctx->partner_map & grp_umac_reset_ctx->response_map)
  1362. != grp_umac_reset_ctx->partner_map) {
  1363. dp_umac_reset_debug(
  1364. "Response(s) pending : expected map %u current map %u",
  1365. grp_umac_reset_ctx->partner_map,
  1366. grp_umac_reset_ctx->response_map);
  1367. qdf_spin_unlock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  1368. return QDF_STATUS_SUCCESS;
  1369. }
  1370. dp_umac_reset_debug(
  1371. "All responses received: expected map %u current map %u",
  1372. grp_umac_reset_ctx->partner_map,
  1373. grp_umac_reset_ctx->response_map);
  1374. grp_umac_reset_ctx->response_map = 0;
  1375. grp_umac_reset_ctx->request_map = 0;
  1376. qdf_spin_unlock_bh(&grp_umac_reset_ctx->grp_ctx_lock);
  1377. dp_mlo_iter_ptnr_soc(be_soc, &dp_umac_reset_post_tx_cmd_via_shmem,
  1378. &tx_cmd);
  1379. if (tx_cmd == UMAC_RESET_TX_CMD_POST_RESET_COMPLETE_DONE)
  1380. dp_umac_reset_complete_umac_recovery(soc);
  1381. return QDF_STATUS_SUCCESS;
  1382. }
  1383. /**
  1384. * dp_umac_reset_initiator_check() - Check if soc is the Umac reset initiator
  1385. * @soc: dp soc handle
  1386. *
  1387. * Return: true if the soc is initiator or false otherwise
  1388. */
  1389. bool dp_umac_reset_initiator_check(struct dp_soc *soc)
  1390. {
  1391. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1392. struct dp_mlo_ctxt *mlo_ctx = be_soc->ml_ctxt;
  1393. if (!mlo_ctx)
  1394. return true;
  1395. return (mlo_ctx->grp_umac_reset_ctx.initiator_chip_id ==
  1396. dp_mlo_get_chip_id(soc));
  1397. }
  1398. /**
  1399. * dp_umac_reset_target_recovery_check() - Check if this is for target recovery
  1400. * @soc: dp soc handle
  1401. *
  1402. * Return: true if the session is for target recovery or false otherwise
  1403. */
  1404. bool dp_umac_reset_target_recovery_check(struct dp_soc *soc)
  1405. {
  1406. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1407. struct dp_mlo_ctxt *mlo_ctx = be_soc->ml_ctxt;
  1408. if (!mlo_ctx)
  1409. return false;
  1410. return mlo_ctx->grp_umac_reset_ctx.is_target_recovery;
  1411. }
  1412. /**
  1413. * dp_umac_reset_is_soc_ignored() - Check if this soc is to be ignored
  1414. * @soc: dp soc handle
  1415. *
  1416. * Return: true if the soc is ignored or false otherwise
  1417. */
  1418. bool dp_umac_reset_is_soc_ignored(struct dp_soc *soc)
  1419. {
  1420. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1421. struct dp_mlo_ctxt *mlo_ctx = be_soc->ml_ctxt;
  1422. if (!mlo_ctx)
  1423. return false;
  1424. return !qdf_atomic_test_bit(dp_mlo_get_chip_id(soc),
  1425. &mlo_ctx->grp_umac_reset_ctx.partner_map);
  1426. }
  1427. QDF_STATUS dp_mlo_umac_reset_stats_print(struct dp_soc *soc)
  1428. {
  1429. struct dp_mlo_ctxt *mlo_ctx;
  1430. struct dp_soc_be *be_soc;
  1431. struct dp_soc_mlo_umac_reset_ctx *grp_umac_reset_ctx;
  1432. be_soc = dp_get_be_soc_from_dp_soc(soc);
  1433. if (!be_soc) {
  1434. dp_umac_reset_err("null be_soc");
  1435. return QDF_STATUS_E_NULL_VALUE;
  1436. }
  1437. mlo_ctx = be_soc->ml_ctxt;
  1438. if (!mlo_ctx) {
  1439. /* This API can be called for non-MLO SOC as well. Hence, return
  1440. * the status as success when mlo_ctx is NULL.
  1441. */
  1442. return QDF_STATUS_SUCCESS;
  1443. }
  1444. grp_umac_reset_ctx = &mlo_ctx->grp_umac_reset_ctx;
  1445. DP_UMAC_RESET_PRINT_STATS("MLO UMAC RESET stats\n"
  1446. "\t\tPartner map :%x\n"
  1447. "\t\tRequest map :%x\n"
  1448. "\t\tResponse map :%x\n"
  1449. "\t\tIs target recovery :%d\n"
  1450. "\t\tIs Umac reset inprogress :%d\n"
  1451. "\t\tNumber of UMAC reset triggered:%d\n"
  1452. "\t\tInitiator chip ID :%d\n",
  1453. grp_umac_reset_ctx->partner_map,
  1454. grp_umac_reset_ctx->request_map,
  1455. grp_umac_reset_ctx->response_map,
  1456. grp_umac_reset_ctx->is_target_recovery,
  1457. grp_umac_reset_ctx->umac_reset_in_progress,
  1458. grp_umac_reset_ctx->umac_reset_count,
  1459. grp_umac_reset_ctx->initiator_chip_id);
  1460. return QDF_STATUS_SUCCESS;
  1461. }
  1462. enum cdp_umac_reset_state
  1463. dp_get_umac_reset_in_progress_state(struct cdp_soc_t *psoc)
  1464. {
  1465. struct dp_soc_umac_reset_ctx *umac_reset_ctx;
  1466. struct dp_soc *soc = (struct dp_soc *)psoc;
  1467. struct dp_soc_mlo_umac_reset_ctx *grp_umac_reset_ctx;
  1468. struct dp_soc_be *be_soc = NULL;
  1469. struct dp_mlo_ctxt *mlo_ctx = NULL;
  1470. enum cdp_umac_reset_state umac_reset_is_inprogress;
  1471. if (!soc) {
  1472. dp_umac_reset_err("DP SOC is null");
  1473. return CDP_UMAC_RESET_INVALID_STATE;
  1474. }
  1475. umac_reset_ctx = &soc->umac_reset_ctx;
  1476. be_soc = dp_get_be_soc_from_dp_soc(soc);
  1477. if (be_soc)
  1478. mlo_ctx = be_soc->ml_ctxt;
  1479. if (mlo_ctx) {
  1480. grp_umac_reset_ctx = &mlo_ctx->grp_umac_reset_ctx;
  1481. umac_reset_is_inprogress =
  1482. grp_umac_reset_ctx->umac_reset_in_progress;
  1483. } else {
  1484. umac_reset_is_inprogress = (umac_reset_ctx->current_state !=
  1485. UMAC_RESET_STATE_WAIT_FOR_TRIGGER);
  1486. }
  1487. if (umac_reset_is_inprogress)
  1488. return CDP_UMAC_RESET_IN_PROGRESS;
  1489. /* Check if the umac reset was in progress during the buffer
  1490. * window.
  1491. */
  1492. umac_reset_is_inprogress =
  1493. ((qdf_get_log_timestamp_usecs() -
  1494. umac_reset_ctx->ts.post_reset_complete_done) <=
  1495. (wlan_cfg_get_umac_reset_buffer_window_ms(soc->wlan_cfg_ctx) *
  1496. 1000));
  1497. return (umac_reset_is_inprogress ?
  1498. CDP_UMAC_RESET_IN_PROGRESS_DURING_BUFFER_WINDOW :
  1499. CDP_UMAC_RESET_NOT_IN_PROGRESS);
  1500. }
  1501. #endif
  1502. struct dp_soc *
  1503. dp_get_soc_by_chip_id_be(struct dp_soc *soc, uint8_t chip_id)
  1504. {
  1505. struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
  1506. struct dp_mlo_ctxt *mlo_ctxt = be_soc->ml_ctxt;
  1507. struct dp_soc *partner_soc;
  1508. if (!be_soc->mlo_enabled || !mlo_ctxt)
  1509. return soc;
  1510. if (be_soc->mlo_chip_id == chip_id)
  1511. return soc;
  1512. partner_soc = dp_mlo_get_soc_ref_by_chip_id(mlo_ctxt, chip_id);
  1513. return partner_soc;
  1514. }