hal_li_rx.h 36 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #ifndef _HAL_LI_RX_H_
  19. #define _HAL_LI_RX_H_
  20. #include <hal_rx.h>
  21. /*
  22. * macro to set the cookie into the rxdma ring entry
  23. */
  24. #define HAL_RXDMA_COOKIE_SET(buff_addr_info, cookie) \
  25. ((*(((unsigned int *)buff_addr_info) + \
  26. (BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET >> 2))) &= \
  27. ~BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK); \
  28. ((*(((unsigned int *)buff_addr_info) + \
  29. (BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET >> 2))) |= \
  30. ((cookie) << BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB) & \
  31. BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK)
  32. /*
  33. * macro to set the manager into the rxdma ring entry
  34. */
  35. #define HAL_RXDMA_MANAGER_SET(buff_addr_info, manager) \
  36. ((*(((unsigned int *)buff_addr_info) + \
  37. (BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET >> 2))) &= \
  38. ~BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK); \
  39. ((*(((unsigned int *)buff_addr_info) + \
  40. (BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET >> 2))) |= \
  41. ((manager) << BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB) & \
  42. BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK)
  43. #define HAL_RX_ERROR_STATUS_GET(reo_desc) \
  44. (_HAL_MS((*_OFFSET_TO_WORD_PTR(reo_desc, \
  45. REO_DESTINATION_RING_7_REO_PUSH_REASON_OFFSET)),\
  46. REO_DESTINATION_RING_7_REO_PUSH_REASON_MASK, \
  47. REO_DESTINATION_RING_7_REO_PUSH_REASON_LSB))
  48. #define HAL_RX_BUF_COOKIE_GET(buff_addr_info) \
  49. (_HAL_MS((*_OFFSET_TO_WORD_PTR(buff_addr_info, \
  50. BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_OFFSET)), \
  51. BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_MASK, \
  52. BUFFER_ADDR_INFO_1_SW_BUFFER_COOKIE_LSB))
  53. #define HAL_RX_BUF_RBM_GET(buff_addr_info) \
  54. (_HAL_MS((*_OFFSET_TO_WORD_PTR(buff_addr_info, \
  55. BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_OFFSET)),\
  56. BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_MASK, \
  57. BUFFER_ADDR_INFO_1_RETURN_BUFFER_MANAGER_LSB))
  58. /* TODO: Convert the following structure fields accesseses to offsets */
  59. #define HAL_RX_REO_BUF_COOKIE_GET(reo_desc) \
  60. (HAL_RX_BUF_COOKIE_GET(& \
  61. (((struct reo_destination_ring *) \
  62. reo_desc)->buf_or_link_desc_addr_info)))
  63. #define HAL_RX_MPDU_SEQUENCE_NUMBER_GET(mpdu_info_ptr) \
  64. ((mpdu_info_ptr \
  65. [RX_MPDU_DESC_INFO_0_MPDU_SEQUENCE_NUMBER_OFFSET >> 2] & \
  66. RX_MPDU_DESC_INFO_0_MPDU_SEQUENCE_NUMBER_MASK) >> \
  67. RX_MPDU_DESC_INFO_0_MPDU_SEQUENCE_NUMBER_LSB)
  68. #define HAL_RX_MPDU_DESC_PEER_META_DATA_GET(mpdu_info_ptr) \
  69. ((mpdu_info_ptr \
  70. [RX_MPDU_DESC_INFO_1_PEER_META_DATA_OFFSET >> 2] & \
  71. RX_MPDU_DESC_INFO_1_PEER_META_DATA_MASK) >> \
  72. RX_MPDU_DESC_INFO_1_PEER_META_DATA_LSB)
  73. #define HAL_RX_MPDU_MSDU_COUNT_GET(mpdu_info_ptr) \
  74. ((mpdu_info_ptr[RX_MPDU_DESC_INFO_0_MSDU_COUNT_OFFSET >> 2] & \
  75. RX_MPDU_DESC_INFO_0_MSDU_COUNT_MASK) >> \
  76. RX_MPDU_DESC_INFO_0_MSDU_COUNT_LSB)
  77. #define HAL_RX_MPDU_FRAGMENT_FLAG_GET(mpdu_info_ptr) \
  78. (mpdu_info_ptr[RX_MPDU_DESC_INFO_0_FRAGMENT_FLAG_OFFSET >> 2] & \
  79. RX_MPDU_DESC_INFO_0_FRAGMENT_FLAG_MASK)
  80. #define HAL_RX_MPDU_RETRY_BIT_GET(mpdu_info_ptr) \
  81. (mpdu_info_ptr[RX_MPDU_DESC_INFO_0_MPDU_RETRY_BIT_OFFSET >> 2] & \
  82. RX_MPDU_DESC_INFO_0_MPDU_RETRY_BIT_MASK)
  83. #define HAL_RX_MPDU_AMPDU_FLAG_GET(mpdu_info_ptr) \
  84. (mpdu_info_ptr[RX_MPDU_DESC_INFO_0_AMPDU_FLAG_OFFSET >> 2] & \
  85. RX_MPDU_DESC_INFO_0_AMPDU_FLAG_MASK)
  86. #define HAL_RX_MPDU_RAW_MPDU_GET(mpdu_info_ptr) \
  87. (mpdu_info_ptr[RX_MPDU_DESC_INFO_0_RAW_MPDU_OFFSET >> 2] & \
  88. RX_MPDU_DESC_INFO_0_RAW_MPDU_MASK)
  89. #define HAL_RX_MPDU_FLAGS_GET(mpdu_info_ptr) \
  90. (HAL_RX_MPDU_FRAGMENT_FLAG_GET(mpdu_info_ptr) | \
  91. HAL_RX_MPDU_RETRY_BIT_GET(mpdu_info_ptr) | \
  92. HAL_RX_MPDU_AMPDU_FLAG_GET(mpdu_info_ptr) | \
  93. HAL_RX_MPDU_RAW_MPDU_GET(mpdu_info_ptr))
  94. #define HAL_RX_MPDU_BAR_FRAME_GET(mpdu_info_ptr) \
  95. ((mpdu_info_ptr[RX_MPDU_DESC_INFO_0_BAR_FRAME_OFFSET >> 2] & \
  96. RX_MPDU_DESC_INFO_0_BAR_FRAME_MASK) >> \
  97. RX_MPDU_DESC_INFO_0_BAR_FRAME_LSB)
  98. /*
  99. * NOTE: None of the following _GET macros need a right
  100. * shift by the corresponding _LSB. This is because, they are
  101. * finally taken and "OR'ed" into a single word again.
  102. */
  103. #define HAL_RX_MSDU_CONTINUATION_FLAG_SET(msdu_info_ptr, val) \
  104. ((*(((uint32_t *)msdu_info_ptr) + \
  105. (RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_OFFSET >> 2))) |= \
  106. ((val) << RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_LSB) & \
  107. RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_MASK)
  108. #define HAL_RX_MSDU_CONTINUATION_FLAG_GET(msdu_info_ptr) \
  109. ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
  110. RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_OFFSET)) & \
  111. RX_MSDU_DESC_INFO_0_MSDU_CONTINUATION_MASK)
  112. #define HAL_RX_MSDU_REO_DST_IND_GET(msdu_info_ptr) \
  113. (_HAL_MS((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
  114. RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_OFFSET)), \
  115. RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_MASK, \
  116. RX_MSDU_DESC_INFO_0_REO_DESTINATION_INDICATION_LSB))
  117. #define HAL_RX_MSDU_SA_IS_VALID_FLAG_GET(msdu_info_ptr) \
  118. ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
  119. RX_MSDU_DESC_INFO_0_SA_IS_VALID_OFFSET)) & \
  120. RX_MSDU_DESC_INFO_0_SA_IS_VALID_MASK)
  121. #define HAL_RX_MSDU_SA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) \
  122. ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
  123. RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_OFFSET)) & \
  124. RX_MSDU_DESC_INFO_0_SA_IDX_TIMEOUT_MASK)
  125. #define HAL_RX_MSDU_DA_IS_VALID_FLAG_GET(msdu_info_ptr) \
  126. ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
  127. RX_MSDU_DESC_INFO_0_DA_IS_VALID_OFFSET)) & \
  128. RX_MSDU_DESC_INFO_0_DA_IS_VALID_MASK)
  129. #define HAL_RX_MSDU_DA_IS_MCBC_FLAG_GET(msdu_info_ptr) \
  130. ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
  131. RX_MSDU_DESC_INFO_0_DA_IS_MCBC_OFFSET)) & \
  132. RX_MSDU_DESC_INFO_0_DA_IS_MCBC_MASK)
  133. #define HAL_RX_MSDU_DA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) \
  134. ((*_OFFSET_TO_WORD_PTR(msdu_info_ptr, \
  135. RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_OFFSET)) & \
  136. RX_MSDU_DESC_INFO_0_DA_IDX_TIMEOUT_MASK)
  137. #define HAL_RX_REO_MSDU_REO_DST_IND_GET(reo_desc) \
  138. (HAL_RX_MSDU_REO_DST_IND_GET(& \
  139. (((struct reo_destination_ring *) \
  140. reo_desc)->rx_msdu_desc_info_details)))
  141. #define HAL_RX_MPDU_ENCRYPT_TYPE_GET(_rx_mpdu_info) \
  142. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  143. RX_MPDU_INFO_3_ENCRYPT_TYPE_OFFSET)), \
  144. RX_MPDU_INFO_3_ENCRYPT_TYPE_MASK, \
  145. RX_MPDU_INFO_3_ENCRYPT_TYPE_LSB))
  146. #define HAL_RX_MSDU_DESC_INFO_SET(_msdu_info_ptr, _field, _val) \
  147. HAL_RX_FLD_SET(_msdu_info_ptr, RX_MSDU_DESC_INFO_0, \
  148. _field, _val)
  149. #define HAL_RX_MPDU_DESC_INFO_SET(_mpdu_info_ptr, _field, _val) \
  150. HAL_RX_FLD_SET(_mpdu_info_ptr, RX_MPDU_DESC_INFO_0, \
  151. _field, _val)
  152. /*
  153. * Structures & Macros to obtain fields from the TLV's in the Rx packet
  154. * pre-header.
  155. */
  156. /*
  157. * Every Rx packet starts at an offset from the top of the buffer.
  158. * If the host hasn't subscribed to any specific TLV, there is
  159. * still space reserved for the following TLV's from the start of
  160. * the buffer:
  161. * -- RX ATTENTION
  162. * -- RX MPDU START
  163. * -- RX MSDU START
  164. * -- RX MSDU END
  165. * -- RX MPDU END
  166. * -- RX PACKET HEADER (802.11)
  167. * If the host subscribes to any of the TLV's above, that TLV
  168. * if populated by the HW
  169. */
  170. #define NUM_DWORDS_TAG 1
  171. /* By default the packet header TLV is 128 bytes */
  172. #define NUM_OF_BYTES_RX_802_11_HDR_TLV 128
  173. #define NUM_OF_DWORDS_RX_802_11_HDR_TLV \
  174. (NUM_OF_BYTES_RX_802_11_HDR_TLV >> 2)
  175. #define RX_PKT_OFFSET_WORDS \
  176. ( \
  177. NUM_OF_DWORDS_RX_ATTENTION + NUM_DWORDS_TAG \
  178. NUM_OF_DWORDS_RX_MPDU_START + NUM_DWORDS_TAG \
  179. NUM_OF_DWORDS_RX_MSDU_START + NUM_DWORDS_TAG \
  180. NUM_OF_DWORDS_RX_MSDU_END + NUM_DWORDS_TAG \
  181. NUM_OF_DWORDS_RX_MPDU_END + NUM_DWORDS_TAG \
  182. NUM_OF_DWORDS_RX_802_11_HDR_TLV + NUM_DWORDS_TAG \
  183. )
  184. #define RX_PKT_OFFSET_BYTES \
  185. (RX_PKT_OFFSET_WORDS << 2)
  186. #define RX_PKT_HDR_TLV_LEN 120
  187. /*
  188. * Each RX descriptor TLV is preceded by 1 DWORD "tag"
  189. */
  190. struct rx_attention_tlv {
  191. uint32_t tag;
  192. struct rx_attention rx_attn;
  193. };
  194. struct rx_mpdu_start_tlv {
  195. uint32_t tag;
  196. struct rx_mpdu_start rx_mpdu_start;
  197. };
  198. struct rx_msdu_start_tlv {
  199. uint32_t tag;
  200. struct rx_msdu_start rx_msdu_start;
  201. };
  202. struct rx_msdu_end_tlv {
  203. uint32_t tag;
  204. struct rx_msdu_end rx_msdu_end;
  205. };
  206. struct rx_mpdu_end_tlv {
  207. uint32_t tag;
  208. struct rx_mpdu_end rx_mpdu_end;
  209. };
  210. struct rx_pkt_hdr_tlv {
  211. uint32_t tag; /* 4 B */
  212. uint32_t phy_ppdu_id; /* 4 B */
  213. char rx_pkt_hdr[RX_PKT_HDR_TLV_LEN]; /* 120 B */
  214. };
  215. /* rx_pkt_tlvs structure should be used to process Data buffers, monitor status
  216. * buffers, monitor destination buffers and monitor descriptor buffers.
  217. */
  218. #ifdef RXDMA_OPTIMIZATION
  219. /*
  220. * The RX_PADDING_BYTES is required so that the TLV's don't
  221. * spread across the 128 byte boundary
  222. * RXDMA optimization requires:
  223. * 1) MSDU_END & ATTENTION TLV's follow in that order
  224. * 2) TLV's don't span across 128 byte lines
  225. * 3) Rx Buffer is nicely aligned on the 128 byte boundary
  226. */
  227. #define RX_PADDING0_BYTES 4
  228. #define RX_PADDING1_BYTES 16
  229. struct rx_pkt_tlvs {
  230. struct rx_msdu_end_tlv msdu_end_tlv; /* 72 bytes */
  231. struct rx_attention_tlv attn_tlv; /* 16 bytes */
  232. struct rx_msdu_start_tlv msdu_start_tlv;/* 40 bytes */
  233. uint8_t rx_padding0[RX_PADDING0_BYTES]; /* 4 bytes */
  234. struct rx_mpdu_start_tlv mpdu_start_tlv;/* 96 bytes */
  235. struct rx_mpdu_end_tlv mpdu_end_tlv; /* 12 bytes */
  236. uint8_t rx_padding1[RX_PADDING1_BYTES]; /* 16 bytes */
  237. #ifndef NO_RX_PKT_HDR_TLV
  238. struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */
  239. #endif
  240. };
  241. #else /* RXDMA_OPTIMIZATION */
  242. struct rx_pkt_tlvs {
  243. struct rx_attention_tlv attn_tlv;
  244. struct rx_mpdu_start_tlv mpdu_start_tlv;
  245. struct rx_msdu_start_tlv msdu_start_tlv;
  246. struct rx_msdu_end_tlv msdu_end_tlv;
  247. struct rx_mpdu_end_tlv mpdu_end_tlv;
  248. struct rx_pkt_hdr_tlv pkt_hdr_tlv;
  249. };
  250. #endif /* RXDMA_OPTIMIZATION */
  251. /* rx_mon_pkt_tlvs structure should be used to process monitor data buffers */
  252. #ifdef RXDMA_OPTIMIZATION
  253. struct rx_mon_pkt_tlvs {
  254. struct rx_msdu_end_tlv msdu_end_tlv; /* 72 bytes */
  255. struct rx_attention_tlv attn_tlv; /* 16 bytes */
  256. struct rx_msdu_start_tlv msdu_start_tlv;/* 40 bytes */
  257. uint8_t rx_padding0[RX_PADDING0_BYTES]; /* 4 bytes */
  258. struct rx_mpdu_start_tlv mpdu_start_tlv;/* 96 bytes */
  259. struct rx_mpdu_end_tlv mpdu_end_tlv; /* 12 bytes */
  260. uint8_t rx_padding1[RX_PADDING1_BYTES]; /* 16 bytes */
  261. struct rx_pkt_hdr_tlv pkt_hdr_tlv; /* 128 bytes */
  262. };
  263. #else /* RXDMA_OPTIMIZATION */
  264. struct rx_mon_pkt_tlvs {
  265. struct rx_attention_tlv attn_tlv;
  266. struct rx_mpdu_start_tlv mpdu_start_tlv;
  267. struct rx_msdu_start_tlv msdu_start_tlv;
  268. struct rx_msdu_end_tlv msdu_end_tlv;
  269. struct rx_mpdu_end_tlv mpdu_end_tlv;
  270. struct rx_pkt_hdr_tlv pkt_hdr_tlv;
  271. };
  272. #endif
  273. #define SIZE_OF_MONITOR_TLV sizeof(struct rx_mon_pkt_tlvs)
  274. #define SIZE_OF_DATA_RX_TLV sizeof(struct rx_pkt_tlvs)
  275. #define RX_PKT_TLVS_LEN SIZE_OF_DATA_RX_TLV
  276. #define RX_PKT_TLV_OFFSET(field) qdf_offsetof(struct rx_pkt_tlvs, field)
  277. #define HAL_RX_PKT_TLV_MPDU_START_OFFSET(hal_soc) \
  278. RX_PKT_TLV_OFFSET(mpdu_start_tlv)
  279. #define HAL_RX_PKT_TLV_MPDU_END_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(mpdu_end_tlv)
  280. #define HAL_RX_PKT_TLV_MSDU_START_OFFSET(hal_soc) \
  281. RX_PKT_TLV_OFFSET(msdu_start_tlv)
  282. #define HAL_RX_PKT_TLV_MSDU_END_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(msdu_end_tlv)
  283. #define HAL_RX_PKT_TLV_ATTN_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(attn_tlv)
  284. #define HAL_RX_PKT_TLV_PKT_HDR_OFFSET(hal_soc) RX_PKT_TLV_OFFSET(pkt_hdr_tlv)
  285. /**
  286. * hal_rx_get_pkt_tlvs(): Function to retrieve pkt tlvs from nbuf
  287. *
  288. * @nbuf: Pointer to data buffer field
  289. * Returns: pointer to rx_pkt_tlvs
  290. */
  291. static inline
  292. struct rx_pkt_tlvs *hal_rx_get_pkt_tlvs(uint8_t *rx_buf_start)
  293. {
  294. return (struct rx_pkt_tlvs *)rx_buf_start;
  295. }
  296. /**
  297. * hal_rx_get_mpdu_info(): Function to retrieve mpdu info from pkt tlvs
  298. *
  299. * @pkt_tlvs: Pointer to pkt_tlvs
  300. * Returns: pointer to rx_mpdu_info structure
  301. */
  302. static inline
  303. struct rx_mpdu_info *hal_rx_get_mpdu_info(struct rx_pkt_tlvs *pkt_tlvs)
  304. {
  305. return &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start.rx_mpdu_info_details;
  306. }
  307. /**
  308. * hal_rx_mon_dest_get_buffer_info_from_tlv(): Retrieve mon dest frame info
  309. * from the reserved bytes of rx_tlv_hdr.
  310. * @buf: start of rx_tlv_hdr
  311. * @buf_info: hal_rx_mon_dest_buf_info structure
  312. *
  313. * Return: void
  314. */
  315. static inline void hal_rx_mon_dest_get_buffer_info_from_tlv(
  316. uint8_t *buf,
  317. struct hal_rx_mon_dest_buf_info *buf_info)
  318. {
  319. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  320. qdf_mem_copy(buf_info, pkt_tlvs->rx_padding0,
  321. sizeof(struct hal_rx_mon_dest_buf_info));
  322. }
  323. /*
  324. * Get msdu_done bit from the RX_ATTENTION TLV
  325. */
  326. #define HAL_RX_ATTN_MSDU_DONE_GET(_rx_attn) \
  327. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
  328. RX_ATTENTION_2_MSDU_DONE_OFFSET)), \
  329. RX_ATTENTION_2_MSDU_DONE_MASK, \
  330. RX_ATTENTION_2_MSDU_DONE_LSB))
  331. #define HAL_RX_ATTN_FIRST_MPDU_GET(_rx_attn) \
  332. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
  333. RX_ATTENTION_1_FIRST_MPDU_OFFSET)), \
  334. RX_ATTENTION_1_FIRST_MPDU_MASK, \
  335. RX_ATTENTION_1_FIRST_MPDU_LSB))
  336. #define HAL_RX_ATTN_TCP_UDP_CKSUM_FAIL_GET(_rx_attn) \
  337. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
  338. RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_OFFSET)), \
  339. RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_MASK, \
  340. RX_ATTENTION_1_TCP_UDP_CHKSUM_FAIL_LSB))
  341. /*
  342. * hal_rx_attn_tcp_udp_cksum_fail_get(): get tcp_udp cksum fail bit
  343. * from rx attention
  344. * @buf: pointer to rx_pkt_tlvs
  345. *
  346. * Return: tcp_udp_cksum_fail
  347. */
  348. static inline bool
  349. hal_rx_attn_tcp_udp_cksum_fail_get(uint8_t *buf)
  350. {
  351. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  352. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  353. uint8_t tcp_udp_cksum_fail;
  354. tcp_udp_cksum_fail = HAL_RX_ATTN_TCP_UDP_CKSUM_FAIL_GET(rx_attn);
  355. return !!tcp_udp_cksum_fail;
  356. }
  357. #define HAL_RX_ATTN_IP_CKSUM_FAIL_GET(_rx_attn) \
  358. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
  359. RX_ATTENTION_1_IP_CHKSUM_FAIL_OFFSET)), \
  360. RX_ATTENTION_1_IP_CHKSUM_FAIL_MASK, \
  361. RX_ATTENTION_1_IP_CHKSUM_FAIL_LSB))
  362. /*
  363. * hal_rx_attn_ip_cksum_fail_get(): get ip cksum fail bit
  364. * from rx attention
  365. * @buf: pointer to rx_pkt_tlvs
  366. *
  367. * Return: ip_cksum_fail
  368. */
  369. static inline bool
  370. hal_rx_attn_ip_cksum_fail_get(uint8_t *buf)
  371. {
  372. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  373. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  374. uint8_t ip_cksum_fail;
  375. ip_cksum_fail = HAL_RX_ATTN_IP_CKSUM_FAIL_GET(rx_attn);
  376. return !!ip_cksum_fail;
  377. }
  378. #define HAL_RX_ATTN_PHY_PPDU_ID_GET(_rx_attn) \
  379. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
  380. RX_ATTENTION_0_PHY_PPDU_ID_OFFSET)), \
  381. RX_ATTENTION_0_PHY_PPDU_ID_MASK, \
  382. RX_ATTENTION_0_PHY_PPDU_ID_LSB))
  383. #define HAL_RX_ATTN_CCE_MATCH_GET(_rx_attn) \
  384. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
  385. RX_ATTENTION_1_CCE_MATCH_OFFSET)), \
  386. RX_ATTENTION_1_CCE_MATCH_MASK, \
  387. RX_ATTENTION_1_CCE_MATCH_LSB))
  388. /*
  389. * hal_rx_msdu_cce_match_get(): get CCE match bit
  390. * from rx attention
  391. * @buf: pointer to rx_pkt_tlvs
  392. * Return: CCE match value
  393. */
  394. static inline bool
  395. hal_rx_msdu_cce_match_get(uint8_t *buf)
  396. {
  397. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  398. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  399. uint8_t cce_match_val;
  400. cce_match_val = HAL_RX_ATTN_CCE_MATCH_GET(rx_attn);
  401. return !!cce_match_val;
  402. }
  403. /*
  404. * Get peer_meta_data from RX_MPDU_INFO within RX_MPDU_START
  405. */
  406. #define HAL_RX_MPDU_PEER_META_DATA_GET(_rx_mpdu_info) \
  407. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  408. RX_MPDU_INFO_8_PEER_META_DATA_OFFSET)), \
  409. RX_MPDU_INFO_8_PEER_META_DATA_MASK, \
  410. RX_MPDU_INFO_8_PEER_META_DATA_LSB))
  411. static inline uint32_t
  412. hal_rx_mpdu_peer_meta_data_get(uint8_t *buf)
  413. {
  414. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  415. struct rx_mpdu_start *mpdu_start =
  416. &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
  417. struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details;
  418. uint32_t peer_meta_data;
  419. peer_meta_data = HAL_RX_MPDU_PEER_META_DATA_GET(mpdu_info);
  420. return peer_meta_data;
  421. }
  422. #define HAL_RX_MPDU_INFO_AMPDU_FLAG_GET(_rx_mpdu_info) \
  423. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  424. RX_MPDU_INFO_12_AMPDU_FLAG_OFFSET)), \
  425. RX_MPDU_INFO_12_AMPDU_FLAG_MASK, \
  426. RX_MPDU_INFO_12_AMPDU_FLAG_LSB))
  427. #define HAL_RX_MPDU_PEER_META_DATA_SET(_rx_mpdu_info, peer_mdata) \
  428. ((*(((uint32_t *)_rx_mpdu_info) + \
  429. (RX_MPDU_INFO_8_PEER_META_DATA_OFFSET >> 2))) = \
  430. ((peer_mdata) << RX_MPDU_INFO_8_PEER_META_DATA_LSB) & \
  431. RX_MPDU_INFO_8_PEER_META_DATA_MASK)
  432. /*
  433. * @ hal_rx_mpdu_peer_meta_data_set: set peer meta data in RX mpdu start tlv
  434. *
  435. * @ buf: rx_tlv_hdr of the received packet
  436. * @ peer_mdata: peer meta data to be set.
  437. * @ Return: void
  438. */
  439. static inline void
  440. hal_rx_mpdu_peer_meta_data_set(uint8_t *buf, uint32_t peer_mdata)
  441. {
  442. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  443. struct rx_mpdu_start *mpdu_start =
  444. &pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
  445. struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details;
  446. HAL_RX_MPDU_PEER_META_DATA_SET(mpdu_info, peer_mdata);
  447. }
  448. /**
  449. * LRO information needed from the TLVs
  450. */
  451. #define HAL_RX_TLV_GET_LRO_ELIGIBLE(buf) \
  452. (_HAL_MS( \
  453. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  454. msdu_end_tlv.rx_msdu_end), \
  455. RX_MSDU_END_9_LRO_ELIGIBLE_OFFSET)), \
  456. RX_MSDU_END_9_LRO_ELIGIBLE_MASK, \
  457. RX_MSDU_END_9_LRO_ELIGIBLE_LSB))
  458. #define HAL_RX_TLV_GET_TCP_ACK(buf) \
  459. (_HAL_MS( \
  460. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  461. msdu_end_tlv.rx_msdu_end), \
  462. RX_MSDU_END_8_TCP_ACK_NUMBER_OFFSET)), \
  463. RX_MSDU_END_8_TCP_ACK_NUMBER_MASK, \
  464. RX_MSDU_END_8_TCP_ACK_NUMBER_LSB))
  465. #define HAL_RX_TLV_GET_TCP_SEQ(buf) \
  466. (_HAL_MS( \
  467. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  468. msdu_end_tlv.rx_msdu_end), \
  469. RX_MSDU_END_7_TCP_SEQ_NUMBER_OFFSET)), \
  470. RX_MSDU_END_7_TCP_SEQ_NUMBER_MASK, \
  471. RX_MSDU_END_7_TCP_SEQ_NUMBER_LSB))
  472. #define HAL_RX_TLV_GET_TCP_WIN(buf) \
  473. (_HAL_MS( \
  474. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  475. msdu_end_tlv.rx_msdu_end), \
  476. RX_MSDU_END_9_WINDOW_SIZE_OFFSET)), \
  477. RX_MSDU_END_9_WINDOW_SIZE_MASK, \
  478. RX_MSDU_END_9_WINDOW_SIZE_LSB))
  479. #define HAL_RX_TLV_GET_TCP_PURE_ACK(buf) \
  480. (_HAL_MS( \
  481. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  482. msdu_start_tlv.rx_msdu_start), \
  483. RX_MSDU_START_2_TCP_ONLY_ACK_OFFSET)), \
  484. RX_MSDU_START_2_TCP_ONLY_ACK_MASK, \
  485. RX_MSDU_START_2_TCP_ONLY_ACK_LSB))
  486. #define HAL_RX_TLV_GET_TCP_PROTO(buf) \
  487. (_HAL_MS( \
  488. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  489. msdu_start_tlv.rx_msdu_start), \
  490. RX_MSDU_START_2_TCP_PROTO_OFFSET)), \
  491. RX_MSDU_START_2_TCP_PROTO_MASK, \
  492. RX_MSDU_START_2_TCP_PROTO_LSB))
  493. #define HAL_RX_TLV_GET_UDP_PROTO(buf) \
  494. (_HAL_MS( \
  495. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  496. msdu_start_tlv.rx_msdu_start), \
  497. RX_MSDU_START_2_UDP_PROTO_OFFSET)), \
  498. RX_MSDU_START_2_UDP_PROTO_MASK, \
  499. RX_MSDU_START_2_UDP_PROTO_LSB))
  500. #define HAL_RX_TLV_GET_IPV6(buf) \
  501. (_HAL_MS( \
  502. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  503. msdu_start_tlv.rx_msdu_start), \
  504. RX_MSDU_START_2_IPV6_PROTO_OFFSET)), \
  505. RX_MSDU_START_2_IPV6_PROTO_MASK, \
  506. RX_MSDU_START_2_IPV6_PROTO_LSB))
  507. #define HAL_RX_TLV_GET_IP_OFFSET(buf) \
  508. (_HAL_MS( \
  509. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  510. msdu_start_tlv.rx_msdu_start), \
  511. RX_MSDU_START_1_L3_OFFSET_OFFSET)), \
  512. RX_MSDU_START_1_L3_OFFSET_MASK, \
  513. RX_MSDU_START_1_L3_OFFSET_LSB))
  514. #define HAL_RX_TLV_GET_TCP_OFFSET(buf) \
  515. (_HAL_MS( \
  516. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  517. msdu_start_tlv.rx_msdu_start), \
  518. RX_MSDU_START_1_L4_OFFSET_OFFSET)), \
  519. RX_MSDU_START_1_L4_OFFSET_MASK, \
  520. RX_MSDU_START_1_L4_OFFSET_LSB))
  521. #define HAL_RX_TLV_GET_FLOW_ID_TOEPLITZ(buf) \
  522. (_HAL_MS( \
  523. (*_OFFSET_TO_WORD_PTR(&(((struct rx_pkt_tlvs *)(buf))->\
  524. msdu_start_tlv.rx_msdu_start), \
  525. RX_MSDU_START_4_FLOW_ID_TOEPLITZ_OFFSET)), \
  526. RX_MSDU_START_4_FLOW_ID_TOEPLITZ_MASK, \
  527. RX_MSDU_START_4_FLOW_ID_TOEPLITZ_LSB))
  528. #define HAL_RX_MSDU_START_MSDU_LEN_GET(_rx_msdu_start) \
  529. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \
  530. RX_MSDU_START_1_MSDU_LENGTH_OFFSET)), \
  531. RX_MSDU_START_1_MSDU_LENGTH_MASK, \
  532. RX_MSDU_START_1_MSDU_LENGTH_LSB))
  533. #define HAL_RX_MSDU_START_BW_GET(_rx_msdu_start) \
  534. (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
  535. RX_MSDU_START_5_RECEIVE_BANDWIDTH_OFFSET)), \
  536. RX_MSDU_START_5_RECEIVE_BANDWIDTH_MASK, \
  537. RX_MSDU_START_5_RECEIVE_BANDWIDTH_LSB))
  538. #define HAL_RX_MSDU_START_FLOWID_TOEPLITZ_GET(_rx_msdu_start) \
  539. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \
  540. RX_MSDU_START_4_FLOW_ID_TOEPLITZ_OFFSET)), \
  541. RX_MSDU_START_4_FLOW_ID_TOEPLITZ_MASK, \
  542. RX_MSDU_START_4_FLOW_ID_TOEPLITZ_LSB))
  543. /**
  544. * hal_rx_msdu_start_toeplitz_get: API to get the toeplitz hash
  545. * from rx_msdu_start TLV
  546. *
  547. * @ buf: pointer to the start of RX PKT TLV headers
  548. * Return: toeplitz hash
  549. */
  550. static inline uint32_t
  551. hal_rx_msdu_start_toeplitz_get(uint8_t *buf)
  552. {
  553. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  554. struct rx_msdu_start *msdu_start =
  555. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  556. return HAL_RX_MSDU_START_FLOWID_TOEPLITZ_GET(msdu_start);
  557. }
  558. #define HAL_RX_MSDU_START_SGI_GET(_rx_msdu_start) \
  559. (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
  560. RX_MSDU_START_5_SGI_OFFSET)), \
  561. RX_MSDU_START_5_SGI_MASK, \
  562. RX_MSDU_START_5_SGI_LSB))
  563. #define HAL_RX_MSDU_START_RATE_MCS_GET(_rx_msdu_start) \
  564. (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
  565. RX_MSDU_START_5_RATE_MCS_OFFSET)), \
  566. RX_MSDU_START_5_RATE_MCS_MASK, \
  567. RX_MSDU_START_5_RATE_MCS_LSB))
  568. #define HAL_RX_ATTN_DECRYPT_STATUS_GET(_rx_attn) \
  569. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
  570. RX_ATTENTION_2_DECRYPT_STATUS_CODE_OFFSET)), \
  571. RX_ATTENTION_2_DECRYPT_STATUS_CODE_MASK, \
  572. RX_ATTENTION_2_DECRYPT_STATUS_CODE_LSB))
  573. /*
  574. * Get key index from RX_MSDU_END
  575. */
  576. #define HAL_RX_MSDU_END_KEYID_OCTET_GET(_rx_msdu_end) \
  577. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
  578. RX_MSDU_END_2_KEY_ID_OCTET_OFFSET)), \
  579. RX_MSDU_END_2_KEY_ID_OCTET_MASK, \
  580. RX_MSDU_END_2_KEY_ID_OCTET_LSB))
  581. #define HAL_RX_MSDU_START_RSSI_GET(_rx_msdu_start) \
  582. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \
  583. RX_MSDU_START_5_USER_RSSI_OFFSET)), \
  584. RX_MSDU_START_5_USER_RSSI_MASK, \
  585. RX_MSDU_START_5_USER_RSSI_LSB))
  586. /*
  587. * hal_rx_msdu_start_get_rssi(): API to get the rssi of received pkt
  588. * from rx_msdu_start
  589. *
  590. * @buf: pointer to the start of RX PKT TLV header
  591. * Return: uint32_t(rssi)
  592. */
  593. static inline uint32_t
  594. hal_rx_msdu_start_get_rssi(uint8_t *buf)
  595. {
  596. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  597. struct rx_msdu_start *msdu_start =
  598. &pkt_tlvs->msdu_start_tlv.rx_msdu_start;
  599. uint32_t rssi;
  600. rssi = HAL_RX_MSDU_START_RSSI_GET(msdu_start);
  601. return rssi;
  602. }
  603. #define HAL_RX_MSDU_START_FREQ_GET(_rx_msdu_start) \
  604. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \
  605. RX_MSDU_START_7_SW_PHY_META_DATA_OFFSET)), \
  606. RX_MSDU_START_7_SW_PHY_META_DATA_MASK, \
  607. RX_MSDU_START_7_SW_PHY_META_DATA_LSB))
  608. #define HAL_RX_MSDU_START_PKT_TYPE_GET(_rx_msdu_start) \
  609. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_start, \
  610. RX_MSDU_START_5_PKT_TYPE_OFFSET)), \
  611. RX_MSDU_START_5_PKT_TYPE_MASK, \
  612. RX_MSDU_START_5_PKT_TYPE_LSB))
  613. #define HAL_RX_MPDU_AD4_31_0_GET(_rx_mpdu_info) \
  614. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  615. RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_OFFSET)), \
  616. RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_MASK, \
  617. RX_MPDU_INFO_20_MAC_ADDR_AD4_31_0_LSB))
  618. #define HAL_RX_MPDU_AD4_47_32_GET(_rx_mpdu_info) \
  619. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  620. RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_OFFSET)), \
  621. RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_MASK, \
  622. RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_LSB))
  623. /*******************************************************************************
  624. * RX ERROR APIS
  625. ******************************************************************************/
  626. #define HAL_RX_MPDU_END_DECRYPT_ERR_GET(_rx_mpdu_end) \
  627. (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_end),\
  628. RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_OFFSET)), \
  629. RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_MASK, \
  630. RX_MPDU_END_1_RX_IN_TX_DECRYPT_BYP_LSB))
  631. #define HAL_RX_MPDU_END_MIC_ERR_GET(_rx_mpdu_end) \
  632. (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_mpdu_end),\
  633. RX_MPDU_END_1_TKIP_MIC_ERR_OFFSET)), \
  634. RX_MPDU_END_1_TKIP_MIC_ERR_MASK, \
  635. RX_MPDU_END_1_TKIP_MIC_ERR_LSB))
  636. /*******************************************************************************
  637. * RX REO ERROR APIS
  638. ******************************************************************************/
  639. #define HAL_RX_REO_BUF_TYPE_GET(reo_desc) (((*(((uint32_t *)reo_desc) + \
  640. (REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_OFFSET >> 2))) & \
  641. REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_MASK) >> \
  642. REO_DESTINATION_RING_7_REO_DEST_BUFFER_TYPE_LSB)
  643. #define HAL_RX_REO_QUEUE_NUMBER_GET(reo_desc) (((*(((uint32_t *)reo_desc) + \
  644. (REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_OFFSET >> 2))) & \
  645. REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_MASK) >> \
  646. REO_DESTINATION_RING_7_RECEIVE_QUEUE_NUMBER_LSB)
  647. #define HAL_RX_REO_ERROR_GET(reo_desc) (((*(((uint32_t *)reo_desc) + \
  648. (REO_DESTINATION_RING_7_REO_ERROR_CODE_OFFSET >> 2))) & \
  649. REO_DESTINATION_RING_7_REO_ERROR_CODE_MASK) >> \
  650. REO_DESTINATION_RING_7_REO_ERROR_CODE_LSB)
  651. /*
  652. * hal_rx_msdu_link_desc_reinject: Re-injects the MSDU link descriptor to
  653. * REO entrance ring
  654. *
  655. * @ soc: HAL version of the SOC pointer
  656. * @ pa: Physical address of the MSDU Link Descriptor
  657. * @ cookie: SW cookie to get to the virtual address
  658. * @ error_enabled_reo_q: Argument to determine whether this needs to go
  659. * to the error enabled REO queue
  660. *
  661. * Return: void
  662. */
  663. static inline
  664. void hal_rx_msdu_link_desc_reinject(struct hal_soc *soc,
  665. uint64_t pa,
  666. uint32_t cookie,
  667. bool error_enabled_reo_q)
  668. {
  669. /* TODO */
  670. }
  671. #define HAL_RX_WBM_FIRST_MSDU_GET(wbm_desc) \
  672. (((*(((uint32_t *)wbm_desc) + \
  673. (WBM_RELEASE_RING_4_FIRST_MSDU_OFFSET >> 2))) & \
  674. WBM_RELEASE_RING_4_FIRST_MSDU_MASK) >> \
  675. WBM_RELEASE_RING_4_FIRST_MSDU_LSB)
  676. #define HAL_RX_WBM_LAST_MSDU_GET(wbm_desc) \
  677. (((*(((uint32_t *)wbm_desc) + \
  678. (WBM_RELEASE_RING_4_LAST_MSDU_OFFSET >> 2))) & \
  679. WBM_RELEASE_RING_4_LAST_MSDU_MASK) >> \
  680. WBM_RELEASE_RING_4_LAST_MSDU_LSB)
  681. #define HAL_RX_WBM_BUF_COOKIE_GET(wbm_desc) \
  682. HAL_RX_BUF_COOKIE_GET(&((struct wbm_release_ring *) \
  683. wbm_desc)->released_buff_or_desc_addr_info)
  684. static inline
  685. uint32_t
  686. HAL_RX_DESC_GET_DECAP_FORMAT(void *hw_desc_addr) {
  687. struct rx_msdu_start *rx_msdu_start;
  688. struct rx_pkt_tlvs *rx_desc = (struct rx_pkt_tlvs *)hw_desc_addr;
  689. rx_msdu_start = &rx_desc->msdu_start_tlv.rx_msdu_start;
  690. return HAL_RX_GET(rx_msdu_start, RX_MSDU_START_2, DECAP_FORMAT);
  691. }
  692. /**
  693. * hal_rx_dump_rx_attention_tlv: dump RX attention TLV in structured
  694. * humman readable format.
  695. * @ rx_attn: pointer the rx_attention TLV in pkt.
  696. * @ dbg_level: log level.
  697. *
  698. * Return: void
  699. */
  700. static inline void hal_rx_dump_rx_attention_tlv(struct rx_attention *rx_attn,
  701. uint8_t dbg_level)
  702. {
  703. hal_verbose_debug("rx_attention tlv (1/2) - "
  704. "rxpcu_mpdu_filter_in_category: %x "
  705. "sw_frame_group_id: %x "
  706. "reserved_0: %x "
  707. "phy_ppdu_id: %x "
  708. "first_mpdu : %x "
  709. "reserved_1a: %x "
  710. "mcast_bcast: %x "
  711. "ast_index_not_found: %x "
  712. "ast_index_timeout: %x "
  713. "power_mgmt: %x "
  714. "non_qos: %x "
  715. "null_data: %x "
  716. "mgmt_type: %x "
  717. "ctrl_type: %x "
  718. "more_data: %x "
  719. "eosp: %x "
  720. "a_msdu_error: %x "
  721. "fragment_flag: %x "
  722. "order: %x "
  723. "cce_match: %x "
  724. "overflow_err: %x "
  725. "msdu_length_err: %x "
  726. "tcp_udp_chksum_fail: %x "
  727. "ip_chksum_fail: %x "
  728. "sa_idx_invalid: %x "
  729. "da_idx_invalid: %x "
  730. "reserved_1b: %x "
  731. "rx_in_tx_decrypt_byp: %x ",
  732. rx_attn->rxpcu_mpdu_filter_in_category,
  733. rx_attn->sw_frame_group_id,
  734. rx_attn->reserved_0,
  735. rx_attn->phy_ppdu_id,
  736. rx_attn->first_mpdu,
  737. rx_attn->reserved_1a,
  738. rx_attn->mcast_bcast,
  739. rx_attn->ast_index_not_found,
  740. rx_attn->ast_index_timeout,
  741. rx_attn->power_mgmt,
  742. rx_attn->non_qos,
  743. rx_attn->null_data,
  744. rx_attn->mgmt_type,
  745. rx_attn->ctrl_type,
  746. rx_attn->more_data,
  747. rx_attn->eosp,
  748. rx_attn->a_msdu_error,
  749. rx_attn->fragment_flag,
  750. rx_attn->order,
  751. rx_attn->cce_match,
  752. rx_attn->overflow_err,
  753. rx_attn->msdu_length_err,
  754. rx_attn->tcp_udp_chksum_fail,
  755. rx_attn->ip_chksum_fail,
  756. rx_attn->sa_idx_invalid,
  757. rx_attn->da_idx_invalid,
  758. rx_attn->reserved_1b,
  759. rx_attn->rx_in_tx_decrypt_byp);
  760. hal_verbose_debug("rx_attention tlv (2/2) - "
  761. "encrypt_required: %x "
  762. "directed: %x "
  763. "buffer_fragment: %x "
  764. "mpdu_length_err: %x "
  765. "tkip_mic_err: %x "
  766. "decrypt_err: %x "
  767. "unencrypted_frame_err: %x "
  768. "fcs_err: %x "
  769. "flow_idx_timeout: %x "
  770. "flow_idx_invalid: %x "
  771. "wifi_parser_error: %x "
  772. "amsdu_parser_error: %x "
  773. "sa_idx_timeout: %x "
  774. "da_idx_timeout: %x "
  775. "msdu_limit_error: %x "
  776. "da_is_valid: %x "
  777. "da_is_mcbc: %x "
  778. "sa_is_valid: %x "
  779. "decrypt_status_code: %x "
  780. "rx_bitmap_not_updated: %x "
  781. "reserved_2: %x "
  782. "msdu_done: %x ",
  783. rx_attn->encrypt_required,
  784. rx_attn->directed,
  785. rx_attn->buffer_fragment,
  786. rx_attn->mpdu_length_err,
  787. rx_attn->tkip_mic_err,
  788. rx_attn->decrypt_err,
  789. rx_attn->unencrypted_frame_err,
  790. rx_attn->fcs_err,
  791. rx_attn->flow_idx_timeout,
  792. rx_attn->flow_idx_invalid,
  793. rx_attn->wifi_parser_error,
  794. rx_attn->amsdu_parser_error,
  795. rx_attn->sa_idx_timeout,
  796. rx_attn->da_idx_timeout,
  797. rx_attn->msdu_limit_error,
  798. rx_attn->da_is_valid,
  799. rx_attn->da_is_mcbc,
  800. rx_attn->sa_is_valid,
  801. rx_attn->decrypt_status_code,
  802. rx_attn->rx_bitmap_not_updated,
  803. rx_attn->reserved_2,
  804. rx_attn->msdu_done);
  805. }
  806. /**
  807. * hal_rx_dump_mpdu_end_tlv: dump RX mpdu_end TLV in structured
  808. * human readable format.
  809. * @ mpdu_end: pointer the mpdu_end TLV in pkt.
  810. * @ dbg_level: log level.
  811. *
  812. * Return: void
  813. */
  814. static inline void hal_rx_dump_mpdu_end_tlv(struct rx_mpdu_end *mpdu_end,
  815. uint8_t dbg_level)
  816. {
  817. hal_verbose_debug("rx_mpdu_end tlv - "
  818. "rxpcu_mpdu_filter_in_category: %x "
  819. "sw_frame_group_id: %x "
  820. "phy_ppdu_id: %x "
  821. "unsup_ktype_short_frame: %x "
  822. "rx_in_tx_decrypt_byp: %x "
  823. "overflow_err: %x "
  824. "mpdu_length_err: %x "
  825. "tkip_mic_err: %x "
  826. "decrypt_err: %x "
  827. "unencrypted_frame_err: %x "
  828. "pn_fields_contain_valid_info: %x "
  829. "fcs_err: %x "
  830. "msdu_length_err: %x "
  831. "rxdma0_destination_ring: %x "
  832. "rxdma1_destination_ring: %x "
  833. "decrypt_status_code: %x "
  834. "rx_bitmap_not_updated: %x ",
  835. mpdu_end->rxpcu_mpdu_filter_in_category,
  836. mpdu_end->sw_frame_group_id,
  837. mpdu_end->phy_ppdu_id,
  838. mpdu_end->unsup_ktype_short_frame,
  839. mpdu_end->rx_in_tx_decrypt_byp,
  840. mpdu_end->overflow_err,
  841. mpdu_end->mpdu_length_err,
  842. mpdu_end->tkip_mic_err,
  843. mpdu_end->decrypt_err,
  844. mpdu_end->unencrypted_frame_err,
  845. mpdu_end->pn_fields_contain_valid_info,
  846. mpdu_end->fcs_err,
  847. mpdu_end->msdu_length_err,
  848. mpdu_end->rxdma0_destination_ring,
  849. mpdu_end->rxdma1_destination_ring,
  850. mpdu_end->decrypt_status_code,
  851. mpdu_end->rx_bitmap_not_updated);
  852. }
  853. #ifdef NO_RX_PKT_HDR_TLV
  854. static inline void hal_rx_dump_pkt_hdr_tlv(struct rx_pkt_tlvs *pkt_tlvs,
  855. uint8_t dbg_level)
  856. {
  857. }
  858. #else
  859. /**
  860. * hal_rx_dump_pkt_hdr_tlv: dump RX pkt header TLV in hex format
  861. * @ pkt_hdr_tlv: pointer the pkt_hdr_tlv in pkt.
  862. * @ dbg_level: log level.
  863. *
  864. * Return: void
  865. */
  866. static inline void hal_rx_dump_pkt_hdr_tlv(struct rx_pkt_tlvs *pkt_tlvs,
  867. uint8_t dbg_level)
  868. {
  869. struct rx_pkt_hdr_tlv *pkt_hdr_tlv = &pkt_tlvs->pkt_hdr_tlv;
  870. hal_verbose_debug("\n---------------\nrx_pkt_hdr_tlv"
  871. "\n---------------\nphy_ppdu_id %d ",
  872. pkt_hdr_tlv->phy_ppdu_id);
  873. hal_verbose_hex_dump(pkt_hdr_tlv->rx_pkt_hdr, 128);
  874. }
  875. #endif
  876. #define HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(_rx_mpdu_info) \
  877. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
  878. RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_OFFSET)), \
  879. RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_MASK, \
  880. RX_MPDU_INFO_14_MPDU_FRAME_CONTROL_FIELD_LSB))
  881. /**
  882. * hal_rx_get_rx_more_frag_bit(): Function to retrieve more fragment bit
  883. *
  884. * @nbuf: Network buffer
  885. * Returns: rx more fragment bit
  886. */
  887. static inline
  888. uint8_t hal_rx_get_rx_more_frag_bit(uint8_t *buf)
  889. {
  890. struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
  891. struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
  892. uint16_t frame_ctrl = 0;
  893. frame_ctrl = HAL_RX_MPDU_GET_FRAME_CONTROL_FIELD(rx_mpdu_info) >>
  894. DOT11_FC1_MORE_FRAG_OFFSET;
  895. /* more fragment bit if at offset bit 4 */
  896. return frame_ctrl;
  897. }
  898. static inline
  899. void hal_rx_mpdu_desc_info_get_li(void *desc_addr,
  900. void *mpdu_desc_info_hdl)
  901. {
  902. struct reo_destination_ring *reo_dst_ring;
  903. struct hal_rx_mpdu_desc_info *mpdu_desc_info =
  904. (struct hal_rx_mpdu_desc_info *)mpdu_desc_info_hdl;
  905. uint32_t *mpdu_info;
  906. reo_dst_ring = (struct reo_destination_ring *)desc_addr;
  907. mpdu_info = (uint32_t *)&reo_dst_ring->rx_mpdu_desc_info_details;
  908. mpdu_desc_info->msdu_count = HAL_RX_MPDU_MSDU_COUNT_GET(mpdu_info);
  909. mpdu_desc_info->mpdu_seq = HAL_RX_MPDU_SEQUENCE_NUMBER_GET(mpdu_info);
  910. mpdu_desc_info->mpdu_flags = HAL_RX_MPDU_FLAGS_GET(mpdu_info);
  911. mpdu_desc_info->peer_meta_data =
  912. HAL_RX_MPDU_DESC_PEER_META_DATA_GET(mpdu_info);
  913. mpdu_desc_info->bar_frame = HAL_RX_MPDU_BAR_FRAME_GET(mpdu_info);
  914. }
  915. /**
  916. * hal_rx_attn_msdu_done_get_li() - Get msdi done flag from RX TLV
  917. * @buf: RX tlv address
  918. *
  919. * Return: msdu done flag
  920. */
  921. static inline uint32_t hal_rx_attn_msdu_done_get_li(uint8_t *buf)
  922. {
  923. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  924. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  925. uint32_t msdu_done;
  926. msdu_done = HAL_RX_ATTN_MSDU_DONE_GET(rx_attn);
  927. return msdu_done;
  928. }
  929. #define HAL_RX_MSDU_FLAGS_GET(msdu_info_ptr) \
  930. (HAL_RX_FIRST_MSDU_IN_MPDU_FLAG_GET(msdu_info_ptr) | \
  931. HAL_RX_LAST_MSDU_IN_MPDU_FLAG_GET(msdu_info_ptr) | \
  932. HAL_RX_MSDU_CONTINUATION_FLAG_GET(msdu_info_ptr) | \
  933. HAL_RX_MSDU_SA_IS_VALID_FLAG_GET(msdu_info_ptr) | \
  934. HAL_RX_MSDU_SA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr) | \
  935. HAL_RX_MSDU_DA_IS_VALID_FLAG_GET(msdu_info_ptr) | \
  936. HAL_RX_MSDU_DA_IS_MCBC_FLAG_GET(msdu_info_ptr) | \
  937. HAL_RX_MSDU_DA_IDX_TIMEOUT_FLAG_GET(msdu_info_ptr))
  938. /**
  939. * hal_rx_msdu_flags_get_li() - Get msdu flags from ring desc
  940. * @msdu_desc_info_hdl: msdu desc info handle
  941. *
  942. * Return: msdu flags
  943. */
  944. static inline
  945. uint32_t hal_rx_msdu_flags_get_li(rx_msdu_desc_info_t msdu_desc_info_hdl)
  946. {
  947. struct rx_msdu_desc_info *msdu_desc_info =
  948. (struct rx_msdu_desc_info *)msdu_desc_info_hdl;
  949. return HAL_RX_MSDU_FLAGS_GET(msdu_desc_info);
  950. }
  951. /*
  952. *hal_rx_msdu_desc_info_get_li: Gets the flags related to MSDU descriptor.
  953. *@desc_addr: REO ring descriptor addr
  954. *@msdu_desc_info: Holds MSDU descriptor info from HAL Rx descriptor
  955. *
  956. * Specifically flags needed are: first_msdu_in_mpdu,
  957. * last_msdu_in_mpdu, msdu_continuation, sa_is_valid,
  958. * sa_idx_timeout, da_is_valid, da_idx_timeout, da_is_MCBC
  959. *
  960. *Return: void
  961. */
  962. static inline void
  963. hal_rx_msdu_desc_info_get_li(void *desc_addr,
  964. struct hal_rx_msdu_desc_info *msdu_desc_info)
  965. {
  966. struct reo_destination_ring *reo_dst_ring;
  967. uint32_t *msdu_info;
  968. reo_dst_ring = (struct reo_destination_ring *)desc_addr;
  969. msdu_info = (uint32_t *)&reo_dst_ring->rx_msdu_desc_info_details;
  970. msdu_desc_info->msdu_flags =
  971. hal_rx_msdu_flags_get_li((struct rx_msdu_desc_info *)msdu_info);
  972. msdu_desc_info->msdu_len = HAL_RX_MSDU_PKT_LENGTH_GET(msdu_info);
  973. }
  974. #define HAL_RX_MSDU_START_NSS_GET(_rx_msdu_start) \
  975. (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start), \
  976. RX_MSDU_START_5_NSS_OFFSET)), \
  977. RX_MSDU_START_5_NSS_MASK, \
  978. RX_MSDU_START_5_NSS_LSB))
  979. #define HAL_RX_ATTN_MSDU_LEN_ERR_GET(_rx_attn) \
  980. (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_attn, \
  981. RX_ATTENTION_1_MSDU_LENGTH_ERR_OFFSET)), \
  982. RX_ATTENTION_1_MSDU_LENGTH_ERR_MASK, \
  983. RX_ATTENTION_1_MSDU_LENGTH_ERR_LSB))
  984. /**
  985. * hal_rx_attn_msdu_len_err_get_li(): Get msdu_len_err value from
  986. * rx attention tlvs
  987. * @buf: pointer to rx pkt tlvs hdr
  988. *
  989. * Return: msdu_len_err value
  990. */
  991. static inline uint32_t
  992. hal_rx_attn_msdu_len_err_get_li(uint8_t *buf)
  993. {
  994. struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
  995. struct rx_attention *rx_attn = &pkt_tlvs->attn_tlv.rx_attn;
  996. return HAL_RX_ATTN_MSDU_LEN_ERR_GET(rx_attn);
  997. }
  998. #endif /* _HAL_LI_RX_H_ */