dp_li_tx.c 8.3 KB

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  1. /*
  2. * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "cdp_txrx_cmn_struct.h"
  19. #include "dp_types.h"
  20. #include "dp_tx.h"
  21. #include "dp_li_tx.h"
  22. #include "dp_tx_desc.h"
  23. #include <dp_internal.h>
  24. #include <dp_htt.h>
  25. #include <hal_li_api.h>
  26. #include <hal_li_tx.h>
  27. extern uint8_t sec_type_map[MAX_CDP_SEC_TYPE];
  28. void dp_tx_comp_get_params_from_hal_desc_li(struct dp_soc *soc,
  29. void *tx_comp_hal_desc,
  30. struct dp_tx_desc_s **r_tx_desc)
  31. {
  32. uint8_t pool_id;
  33. uint32_t tx_desc_id;
  34. tx_desc_id = hal_tx_comp_get_desc_id(tx_comp_hal_desc);
  35. pool_id = (tx_desc_id & DP_TX_DESC_ID_POOL_MASK) >>
  36. DP_TX_DESC_ID_POOL_OS;
  37. /* Find Tx descriptor */
  38. *r_tx_desc = dp_tx_desc_find(soc, pool_id,
  39. (tx_desc_id & DP_TX_DESC_ID_PAGE_MASK) >>
  40. DP_TX_DESC_ID_PAGE_OS,
  41. (tx_desc_id & DP_TX_DESC_ID_OFFSET_MASK) >>
  42. DP_TX_DESC_ID_OFFSET_OS);
  43. /* Pool id is not matching. Error */
  44. if ((*r_tx_desc)->pool_id != pool_id) {
  45. dp_tx_comp_alert("Tx Comp pool id %d not matched %d",
  46. pool_id, (*r_tx_desc)->pool_id);
  47. qdf_assert_always(0);
  48. }
  49. }
  50. #ifdef QCA_OL_TX_MULTIQ_SUPPORT
  51. /*
  52. * dp_tx_get_rbm_id()- Get the RBM ID for data transmission completion.
  53. * @dp_soc - DP soc structure pointer
  54. * @ring_id - Transmit Queue/ring_id to be used when XPS is enabled
  55. *
  56. * Return - HAL ring handle
  57. */
  58. static inline uint8_t dp_tx_get_rbm_id_li(struct dp_soc *soc,
  59. uint8_t ring_id)
  60. {
  61. return (ring_id ? soc->wbm_sw0_bm_id + (ring_id - 1) :
  62. HAL_WBM_SW2_BM_ID(soc->wbm_sw0_bm_id));
  63. }
  64. #else
  65. static inline uint8_t dp_tx_get_rbm_id_li(struct dp_soc *soc,
  66. uint8_t ring_id)
  67. {
  68. return (ring_id + soc->wbm_sw0_bm_id);
  69. }
  70. #endif
  71. #if defined(CLEAR_SW2TCL_CONSUMED_DESC)
  72. /**
  73. * dp_tx_clear_consumed_hw_descs - Reset all the consumed Tx ring descs to 0
  74. *
  75. * @soc: DP soc handle
  76. * @hal_ring_hdl: Source ring pointer
  77. *
  78. * Return: void
  79. */
  80. static inline
  81. void dp_tx_clear_consumed_hw_descs(struct dp_soc *soc,
  82. hal_ring_handle_t hal_ring_hdl)
  83. {
  84. void *desc = hal_srng_src_get_next_consumed(soc->hal_soc, hal_ring_hdl);
  85. while (desc) {
  86. hal_tx_desc_clear(desc);
  87. desc = hal_srng_src_get_next_consumed(soc->hal_soc,
  88. hal_ring_hdl);
  89. }
  90. }
  91. #else
  92. static inline
  93. void dp_tx_clear_consumed_hw_descs(struct dp_soc *soc,
  94. hal_ring_handle_t hal_ring_hdl)
  95. {
  96. }
  97. #endif /* CLEAR_SW2TCL_CONSUMED_DESC */
  98. QDF_STATUS
  99. dp_tx_hw_enqueue_li(struct dp_soc *soc, struct dp_vdev *vdev,
  100. struct dp_tx_desc_s *tx_desc, uint16_t fw_metadata,
  101. struct cdp_tx_exception_metadata *tx_exc_metadata,
  102. struct dp_tx_msdu_info_s *msdu_info)
  103. {
  104. void *hal_tx_desc;
  105. uint32_t *hal_tx_desc_cached;
  106. int coalesce = 0;
  107. struct dp_tx_queue *tx_q = &msdu_info->tx_queue;
  108. uint8_t ring_id = tx_q->ring_id & DP_TX_QUEUE_MASK;
  109. uint8_t tid = msdu_info->tid;
  110. /*
  111. * Setting it initialization statically here to avoid
  112. * a memset call jump with qdf_mem_set call
  113. */
  114. uint8_t cached_desc[HAL_TX_DESC_LEN_BYTES] = { 0 };
  115. enum cdp_sec_type sec_type = ((tx_exc_metadata &&
  116. tx_exc_metadata->sec_type != CDP_INVALID_SEC_TYPE) ?
  117. tx_exc_metadata->sec_type : vdev->sec_type);
  118. /* Return Buffer Manager ID */
  119. uint8_t bm_id = dp_tx_get_rbm_id_li(soc, ring_id);
  120. hal_ring_handle_t hal_ring_hdl = NULL;
  121. QDF_STATUS status = QDF_STATUS_E_RESOURCES;
  122. if (!dp_tx_is_desc_id_valid(soc, tx_desc->id)) {
  123. dp_err_rl("Invalid tx desc id:%d", tx_desc->id);
  124. return QDF_STATUS_E_RESOURCES;
  125. }
  126. hal_tx_desc_cached = (void *)cached_desc;
  127. hal_tx_desc_set_buf_addr(soc->hal_soc, hal_tx_desc_cached,
  128. tx_desc->dma_addr, bm_id, tx_desc->id,
  129. (tx_desc->flags & DP_TX_DESC_FLAG_FRAG));
  130. hal_tx_desc_set_lmac_id_li(soc->hal_soc, hal_tx_desc_cached,
  131. vdev->lmac_id);
  132. hal_tx_desc_set_search_type_li(soc->hal_soc, hal_tx_desc_cached,
  133. vdev->search_type);
  134. hal_tx_desc_set_search_index_li(soc->hal_soc, hal_tx_desc_cached,
  135. vdev->bss_ast_idx);
  136. hal_tx_desc_set_dscp_tid_table_id(soc->hal_soc, hal_tx_desc_cached,
  137. vdev->dscp_tid_map_id);
  138. hal_tx_desc_set_encrypt_type(hal_tx_desc_cached,
  139. sec_type_map[sec_type]);
  140. hal_tx_desc_set_cache_set_num(soc->hal_soc, hal_tx_desc_cached,
  141. (vdev->bss_ast_hash & 0xF));
  142. hal_tx_desc_set_fw_metadata(hal_tx_desc_cached, fw_metadata);
  143. hal_tx_desc_set_buf_length(hal_tx_desc_cached, tx_desc->length);
  144. hal_tx_desc_set_buf_offset(hal_tx_desc_cached, tx_desc->pkt_offset);
  145. hal_tx_desc_set_encap_type(hal_tx_desc_cached, tx_desc->tx_encap_type);
  146. hal_tx_desc_set_addr_search_flags(hal_tx_desc_cached,
  147. vdev->hal_desc_addr_search_flags);
  148. if (tx_desc->flags & DP_TX_DESC_FLAG_TO_FW)
  149. hal_tx_desc_set_to_fw(hal_tx_desc_cached, 1);
  150. /* verify checksum offload configuration*/
  151. if (vdev->csum_enabled &&
  152. ((qdf_nbuf_get_tx_cksum(tx_desc->nbuf) ==
  153. QDF_NBUF_TX_CKSUM_TCP_UDP) ||
  154. qdf_nbuf_is_tso(tx_desc->nbuf))) {
  155. hal_tx_desc_set_l3_checksum_en(hal_tx_desc_cached, 1);
  156. hal_tx_desc_set_l4_checksum_en(hal_tx_desc_cached, 1);
  157. }
  158. if (tid != HTT_TX_EXT_TID_INVALID)
  159. hal_tx_desc_set_hlos_tid(hal_tx_desc_cached, tid);
  160. if (tx_desc->flags & DP_TX_DESC_FLAG_MESH)
  161. hal_tx_desc_set_mesh_en(soc->hal_soc, hal_tx_desc_cached, 1);
  162. if (qdf_unlikely(vdev->pdev->delay_stats_flag) ||
  163. qdf_unlikely(wlan_cfg_is_peer_ext_stats_enabled(soc->wlan_cfg_ctx)))
  164. tx_desc->timestamp = qdf_ktime_to_ms(qdf_ktime_real_get());
  165. dp_verbose_debug("length:%d , type = %d, dma_addr %llx, offset %d desc id %u",
  166. tx_desc->length,
  167. (tx_desc->flags & DP_TX_DESC_FLAG_FRAG),
  168. (uint64_t)tx_desc->dma_addr, tx_desc->pkt_offset,
  169. tx_desc->id);
  170. hal_ring_hdl = dp_tx_get_hal_ring_hdl(soc, ring_id);
  171. if (qdf_unlikely(dp_tx_hal_ring_access_start(soc, hal_ring_hdl))) {
  172. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  173. "%s %d : HAL RING Access Failed -- %pK",
  174. __func__, __LINE__, hal_ring_hdl);
  175. DP_STATS_INC(soc, tx.tcl_ring_full[ring_id], 1);
  176. DP_STATS_INC(vdev, tx_i.dropped.enqueue_fail, 1);
  177. return status;
  178. }
  179. dp_tx_clear_consumed_hw_descs(soc, hal_ring_hdl);
  180. /* Sync cached descriptor with HW */
  181. hal_tx_desc = hal_srng_src_get_next(soc->hal_soc, hal_ring_hdl);
  182. if (qdf_unlikely(!hal_tx_desc)) {
  183. dp_verbose_debug("TCL ring full ring_id:%d", ring_id);
  184. DP_STATS_INC(soc, tx.tcl_ring_full[ring_id], 1);
  185. DP_STATS_INC(vdev, tx_i.dropped.enqueue_fail, 1);
  186. goto ring_access_fail;
  187. }
  188. tx_desc->flags |= DP_TX_DESC_FLAG_QUEUED_TX;
  189. dp_vdev_peer_stats_update_protocol_cnt_tx(vdev, tx_desc->nbuf);
  190. hal_tx_desc_sync(hal_tx_desc_cached, hal_tx_desc);
  191. coalesce = dp_tx_attempt_coalescing(soc, vdev, tx_desc, tid);
  192. DP_STATS_INC_PKT(vdev, tx_i.processed, 1, tx_desc->length);
  193. dp_tx_update_stats(soc, tx_desc->nbuf);
  194. status = QDF_STATUS_SUCCESS;
  195. dp_tx_hw_desc_update_evt((uint8_t *)hal_tx_desc_cached,
  196. hal_ring_hdl, soc);
  197. ring_access_fail:
  198. dp_tx_ring_access_end_wrapper(soc, hal_ring_hdl, coalesce);
  199. return status;
  200. }
  201. QDF_STATUS dp_tx_desc_pool_init_li(struct dp_soc *soc,
  202. uint16_t num_elem,
  203. uint8_t pool_id)
  204. {
  205. uint32_t id, count, page_id, offset, pool_id_32;
  206. struct dp_tx_desc_s *tx_desc;
  207. struct dp_tx_desc_pool_s *tx_desc_pool;
  208. uint16_t num_desc_per_page;
  209. tx_desc_pool = &soc->tx_desc[pool_id];
  210. tx_desc = tx_desc_pool->freelist;
  211. count = 0;
  212. pool_id_32 = (uint32_t)pool_id;
  213. num_desc_per_page = tx_desc_pool->desc_pages.num_element_per_page;
  214. while (tx_desc) {
  215. page_id = count / num_desc_per_page;
  216. offset = count % num_desc_per_page;
  217. id = ((pool_id_32 << DP_TX_DESC_ID_POOL_OS) |
  218. (page_id << DP_TX_DESC_ID_PAGE_OS) | offset);
  219. tx_desc->id = id;
  220. tx_desc->pool_id = pool_id;
  221. tx_desc = tx_desc->next;
  222. count++;
  223. }
  224. return QDF_STATUS_SUCCESS;
  225. }
  226. void dp_tx_desc_pool_deinit_li(struct dp_soc *soc,
  227. struct dp_tx_desc_pool_s *tx_desc_pool,
  228. uint8_t pool_id)
  229. {
  230. }