main.c 148 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/devcoredump.h>
  8. #include <linux/elf.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_gpio.h>
  14. #include <linux/pm_wakeup.h>
  15. #include <linux/reboot.h>
  16. #include <linux/rwsem.h>
  17. #include <linux/suspend.h>
  18. #include <linux/timer.h>
  19. #include <linux/thermal.h>
  20. #include <linux/version.h>
  21. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 14, 0))
  22. #include <linux/panic_notifier.h>
  23. #endif
  24. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  25. #include <soc/qcom/minidump.h>
  26. #endif
  27. #include "cnss_plat_ipc_qmi.h"
  28. #include "cnss_utils.h"
  29. #include "main.h"
  30. #include "bus.h"
  31. #include "debug.h"
  32. #include "genl.h"
  33. #include "reg.h"
  34. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  35. #ifdef CONFIG_CNSS_HW_SECURE_SMEM
  36. #include <linux/soc/qcom/smem.h>
  37. #define PERISEC_SMEM_ID 651
  38. #define HW_WIFI_UID 0x508
  39. #else
  40. #include "smcinvoke.h"
  41. #include "smcinvoke_object.h"
  42. #include "IClientEnv.h"
  43. #define HW_STATE_UID 0x108
  44. #define HW_OP_GET_STATE 1
  45. #define HW_WIFI_UID 0x508
  46. #define FEATURE_NOT_SUPPORTED 12
  47. #define PERIPHERAL_NOT_FOUND 10
  48. #endif
  49. #endif
  50. #define CNSS_DUMP_FORMAT_VER 0x11
  51. #define CNSS_DUMP_FORMAT_VER_V2 0x22
  52. #define CNSS_DUMP_MAGIC_VER_V2 0x42445953
  53. #define CNSS_DUMP_NAME "CNSS_WLAN"
  54. #define CNSS_DUMP_DESC_SIZE 0x1000
  55. #define CNSS_DUMP_SEG_VER 0x1
  56. #define FILE_SYSTEM_READY 1
  57. #define FW_READY_TIMEOUT 20000
  58. #define FW_ASSERT_TIMEOUT 5000
  59. #define CNSS_EVENT_PENDING 2989
  60. #define POWER_RESET_MIN_DELAY_MS 100
  61. #define MAX_NAME_LEN 12
  62. #define CNSS_QUIRKS_DEFAULT 0
  63. #ifdef CONFIG_CNSS_EMULATION
  64. #define CNSS_MHI_TIMEOUT_DEFAULT 90000
  65. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 2000
  66. #define CNSS_QMI_TIMEOUT_DEFAULT 90000
  67. #else
  68. #define CNSS_MHI_TIMEOUT_DEFAULT 0
  69. #define CNSS_MHI_M2_TIMEOUT_DEFAULT 25
  70. #define CNSS_QMI_TIMEOUT_DEFAULT 10000
  71. #endif
  72. #define CNSS_BDF_TYPE_DEFAULT CNSS_BDF_ELF
  73. #define CNSS_TIME_SYNC_PERIOD_DEFAULT 900000
  74. #define CNSS_MIN_TIME_SYNC_PERIOD 2000
  75. #define CNSS_DMS_QMI_CONNECTION_WAIT_MS 50
  76. #define CNSS_DMS_QMI_CONNECTION_WAIT_RETRY 200
  77. #define CNSS_DAEMON_CONNECT_TIMEOUT_MS 30000
  78. #define CNSS_CAL_DB_FILE_NAME "wlfw_cal_db.bin"
  79. #define CNSS_CAL_START_PROBE_WAIT_RETRY_MAX 100
  80. #define CNSS_CAL_START_PROBE_WAIT_MS 500
  81. #define CNSS_TIME_SYNC_PERIOD_INVALID 0xFFFFFFFF
  82. enum cnss_cal_db_op {
  83. CNSS_CAL_DB_UPLOAD,
  84. CNSS_CAL_DB_DOWNLOAD,
  85. CNSS_CAL_DB_INVALID_OP,
  86. };
  87. enum cnss_recovery_type {
  88. CNSS_WLAN_RECOVERY = 0x1,
  89. CNSS_PCSS_RECOVERY = 0x2,
  90. };
  91. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  92. #define CNSS_MAX_DEV_NUM 2
  93. static struct cnss_plat_data *plat_env[CNSS_MAX_DEV_NUM];
  94. static int plat_env_count;
  95. #else
  96. static struct cnss_plat_data *plat_env;
  97. #endif
  98. static bool cnss_allow_driver_loading;
  99. static struct cnss_fw_files FW_FILES_QCA6174_FW_3_0 = {
  100. "qwlan30.bin", "bdwlan30.bin", "otp30.bin", "utf30.bin",
  101. "utfbd30.bin", "epping30.bin", "evicted30.bin"
  102. };
  103. static struct cnss_fw_files FW_FILES_DEFAULT = {
  104. "qwlan.bin", "bdwlan.bin", "otp.bin", "utf.bin",
  105. "utfbd.bin", "epping.bin", "evicted.bin"
  106. };
  107. struct cnss_driver_event {
  108. struct list_head list;
  109. enum cnss_driver_event_type type;
  110. bool sync;
  111. struct completion complete;
  112. int ret;
  113. void *data;
  114. };
  115. bool cnss_check_driver_loading_allowed(void)
  116. {
  117. return cnss_allow_driver_loading;
  118. }
  119. #ifdef CONFIG_CNSS_SUPPORT_DUAL_DEV
  120. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  121. struct cnss_plat_data *plat_priv)
  122. {
  123. cnss_pr_dbg("Set plat_priv at %d", plat_env_count);
  124. if (plat_priv) {
  125. plat_priv->plat_idx = plat_env_count;
  126. plat_env[plat_priv->plat_idx] = plat_priv;
  127. plat_env_count++;
  128. }
  129. }
  130. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device
  131. *plat_dev)
  132. {
  133. int i;
  134. if (!plat_dev)
  135. return NULL;
  136. for (i = 0; i < plat_env_count; i++) {
  137. if (plat_env[i]->plat_dev == plat_dev)
  138. return plat_env[i];
  139. }
  140. return NULL;
  141. }
  142. struct cnss_plat_data *cnss_get_first_plat_priv(struct platform_device
  143. *plat_dev)
  144. {
  145. int i;
  146. if (!plat_dev) {
  147. for (i = 0; i < plat_env_count; i++) {
  148. if (plat_env[i])
  149. return plat_env[i];
  150. }
  151. }
  152. return NULL;
  153. }
  154. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  155. {
  156. cnss_pr_dbg("Clear plat_priv at %d", plat_priv->plat_idx);
  157. plat_env[plat_priv->plat_idx] = NULL;
  158. plat_env_count--;
  159. }
  160. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  161. {
  162. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  163. "wlan_%d", plat_priv->plat_idx);
  164. return 0;
  165. }
  166. static int cnss_plat_env_available(void)
  167. {
  168. int ret = 0;
  169. if (plat_env_count >= CNSS_MAX_DEV_NUM) {
  170. cnss_pr_err("ERROR: No space to store plat_priv\n");
  171. ret = -ENOMEM;
  172. }
  173. return ret;
  174. }
  175. int cnss_get_plat_env_count(void)
  176. {
  177. return plat_env_count;
  178. }
  179. struct cnss_plat_data *cnss_get_plat_env(int index)
  180. {
  181. return plat_env[index];
  182. }
  183. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  184. {
  185. int i;
  186. for (i = 0; i < plat_env_count; i++) {
  187. if (plat_env[i]->rc_num == rc_num)
  188. return plat_env[i];
  189. }
  190. return NULL;
  191. }
  192. static inline int
  193. cnss_get_qrtr_node_id(struct cnss_plat_data *plat_priv)
  194. {
  195. return of_property_read_u32(plat_priv->dev_node,
  196. "qcom,qrtr_node_id", &plat_priv->qrtr_node_id);
  197. }
  198. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  199. {
  200. int ret = 0;
  201. ret = cnss_get_qrtr_node_id(plat_priv);
  202. if (ret) {
  203. cnss_pr_warn("Failed to find qrtr_node_id err=%d\n", ret);
  204. plat_priv->qrtr_node_id = 0;
  205. plat_priv->wlfw_service_instance_id = 0;
  206. } else {
  207. plat_priv->wlfw_service_instance_id = plat_priv->qrtr_node_id +
  208. QRTR_NODE_FW_ID_BASE;
  209. cnss_pr_dbg("service_instance_id=0x%x\n",
  210. plat_priv->wlfw_service_instance_id);
  211. }
  212. }
  213. static inline int
  214. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  215. {
  216. return of_property_read_string(plat_priv->plat_dev->dev.of_node,
  217. "qcom,pld_bus_ops_name",
  218. &plat_priv->pld_bus_ops_name);
  219. }
  220. #else
  221. static void cnss_set_plat_priv(struct platform_device *plat_dev,
  222. struct cnss_plat_data *plat_priv)
  223. {
  224. plat_env = plat_priv;
  225. }
  226. struct cnss_plat_data *cnss_get_plat_priv(struct platform_device *plat_dev)
  227. {
  228. return plat_env;
  229. }
  230. static void cnss_clear_plat_priv(struct cnss_plat_data *plat_priv)
  231. {
  232. plat_env = NULL;
  233. }
  234. static int cnss_set_device_name(struct cnss_plat_data *plat_priv)
  235. {
  236. snprintf(plat_priv->device_name, sizeof(plat_priv->device_name),
  237. "wlan");
  238. return 0;
  239. }
  240. static int cnss_plat_env_available(void)
  241. {
  242. return 0;
  243. }
  244. struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num)
  245. {
  246. return cnss_bus_dev_to_plat_priv(NULL);
  247. }
  248. void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv)
  249. {
  250. }
  251. static int
  252. cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
  253. {
  254. return 0;
  255. }
  256. #endif
  257. void cnss_get_sleep_clk_supported(struct cnss_plat_data *plat_priv)
  258. {
  259. plat_priv->sleep_clk = of_property_read_bool(plat_priv->dev_node,
  260. "qcom,sleep-clk-support");
  261. cnss_pr_dbg("qcom,sleep-clk-support is %d\n",
  262. plat_priv->sleep_clk);
  263. }
  264. void cnss_get_bwscal_info(struct cnss_plat_data *plat_priv)
  265. {
  266. plat_priv->no_bwscale = of_property_read_bool(plat_priv->dev_node,
  267. "qcom,no-bwscale");
  268. }
  269. static inline int
  270. cnss_get_rc_num(struct cnss_plat_data *plat_priv)
  271. {
  272. return of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  273. "qcom,wlan-rc-num", &plat_priv->rc_num);
  274. }
  275. bool cnss_is_dual_wlan_enabled(void)
  276. {
  277. return IS_ENABLED(CONFIG_CNSS_SUPPORT_DUAL_DEV);
  278. }
  279. /**
  280. * cnss_get_mem_seg_count - Get segment count of memory
  281. * @type: memory type
  282. * @seg: segment count
  283. *
  284. * Return: 0 on success, negative value on failure
  285. */
  286. int cnss_get_mem_seg_count(enum cnss_remote_mem_type type, u32 *seg)
  287. {
  288. struct cnss_plat_data *plat_priv;
  289. plat_priv = cnss_get_plat_priv(NULL);
  290. if (!plat_priv)
  291. return -ENODEV;
  292. switch (type) {
  293. case CNSS_REMOTE_MEM_TYPE_FW:
  294. *seg = plat_priv->fw_mem_seg_len;
  295. break;
  296. case CNSS_REMOTE_MEM_TYPE_QDSS:
  297. *seg = plat_priv->qdss_mem_seg_len;
  298. break;
  299. default:
  300. return -EINVAL;
  301. }
  302. return 0;
  303. }
  304. EXPORT_SYMBOL(cnss_get_mem_seg_count);
  305. /**
  306. * cnss_get_wifi_kobject -return wifi kobject
  307. * Return: Null, to maintain driver comnpatibilty
  308. */
  309. struct kobject *cnss_get_wifi_kobj(struct device *dev)
  310. {
  311. struct cnss_plat_data *plat_priv;
  312. plat_priv = cnss_get_plat_priv(NULL);
  313. if (!plat_priv)
  314. return NULL;
  315. return plat_priv->wifi_kobj;
  316. }
  317. EXPORT_SYMBOL(cnss_get_wifi_kobj);
  318. /**
  319. * cnss_get_mem_segment_info - Get memory info of different type
  320. * @type: memory type
  321. * @segment: array to save the segment info
  322. * @seg: segment count
  323. *
  324. * Return: 0 on success, negative value on failure
  325. */
  326. int cnss_get_mem_segment_info(enum cnss_remote_mem_type type,
  327. struct cnss_mem_segment segment[],
  328. u32 segment_count)
  329. {
  330. struct cnss_plat_data *plat_priv;
  331. u32 i;
  332. plat_priv = cnss_get_plat_priv(NULL);
  333. if (!plat_priv)
  334. return -ENODEV;
  335. switch (type) {
  336. case CNSS_REMOTE_MEM_TYPE_FW:
  337. if (segment_count > plat_priv->fw_mem_seg_len)
  338. segment_count = plat_priv->fw_mem_seg_len;
  339. for (i = 0; i < segment_count; i++) {
  340. segment[i].size = plat_priv->fw_mem[i].size;
  341. segment[i].va = plat_priv->fw_mem[i].va;
  342. segment[i].pa = plat_priv->fw_mem[i].pa;
  343. }
  344. break;
  345. case CNSS_REMOTE_MEM_TYPE_QDSS:
  346. if (segment_count > plat_priv->qdss_mem_seg_len)
  347. segment_count = plat_priv->qdss_mem_seg_len;
  348. for (i = 0; i < segment_count; i++) {
  349. segment[i].size = plat_priv->qdss_mem[i].size;
  350. segment[i].va = plat_priv->qdss_mem[i].va;
  351. segment[i].pa = plat_priv->qdss_mem[i].pa;
  352. }
  353. break;
  354. default:
  355. return -EINVAL;
  356. }
  357. return 0;
  358. }
  359. EXPORT_SYMBOL(cnss_get_mem_segment_info);
  360. static int cnss_get_audio_iommu_domain(struct cnss_plat_data *plat_priv)
  361. {
  362. struct device_node *audio_ion_node;
  363. struct platform_device *audio_ion_pdev;
  364. audio_ion_node = of_find_compatible_node(NULL, NULL,
  365. "qcom,msm-audio-ion");
  366. if (!audio_ion_node) {
  367. cnss_pr_err("Unable to get Audio ion node");
  368. return -EINVAL;
  369. }
  370. audio_ion_pdev = of_find_device_by_node(audio_ion_node);
  371. of_node_put(audio_ion_node);
  372. if (!audio_ion_pdev) {
  373. cnss_pr_err("Unable to get Audio ion platform device");
  374. return -EINVAL;
  375. }
  376. plat_priv->audio_iommu_domain =
  377. iommu_get_domain_for_dev(&audio_ion_pdev->dev);
  378. put_device(&audio_ion_pdev->dev);
  379. if (!plat_priv->audio_iommu_domain) {
  380. cnss_pr_err("Unable to get Audio ion iommu domain");
  381. return -EINVAL;
  382. }
  383. return 0;
  384. }
  385. bool cnss_get_audio_shared_iommu_group_cap(struct device *dev)
  386. {
  387. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  388. struct device_node *audio_ion_node;
  389. struct device_node *cnss_iommu_group_node;
  390. struct device_node *audio_iommu_group_node;
  391. if (!plat_priv)
  392. return false;
  393. audio_ion_node = of_find_compatible_node(NULL, NULL,
  394. "qcom,msm-audio-ion");
  395. if (!audio_ion_node) {
  396. cnss_pr_err("Unable to get Audio ion node");
  397. return false;
  398. }
  399. audio_iommu_group_node = of_parse_phandle(audio_ion_node,
  400. "qcom,iommu-group", 0);
  401. of_node_put(audio_ion_node);
  402. if (!audio_iommu_group_node) {
  403. cnss_pr_err("Unable to get audio iommu group phandle");
  404. return false;
  405. }
  406. of_node_put(audio_iommu_group_node);
  407. cnss_iommu_group_node = of_parse_phandle(dev->of_node,
  408. "qcom,iommu-group", 0);
  409. if (!cnss_iommu_group_node) {
  410. cnss_pr_err("Unable to get cnss iommu group phandle");
  411. return false;
  412. }
  413. of_node_put(cnss_iommu_group_node);
  414. if (cnss_iommu_group_node == audio_iommu_group_node) {
  415. plat_priv->is_audio_shared_iommu_group = true;
  416. cnss_pr_info("CNSS and Audio share IOMMU group");
  417. } else {
  418. cnss_pr_info("CNSS and Audio do not share IOMMU group");
  419. }
  420. return plat_priv->is_audio_shared_iommu_group;
  421. }
  422. EXPORT_SYMBOL(cnss_get_audio_shared_iommu_group_cap);
  423. int cnss_set_feature_list(struct cnss_plat_data *plat_priv,
  424. enum cnss_feature_v01 feature)
  425. {
  426. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  427. return -EINVAL;
  428. plat_priv->feature_list |= 1 << feature;
  429. return 0;
  430. }
  431. int cnss_clear_feature_list(struct cnss_plat_data *plat_priv,
  432. enum cnss_feature_v01 feature)
  433. {
  434. if (unlikely(!plat_priv || feature >= CNSS_MAX_FEATURE_V01))
  435. return -EINVAL;
  436. plat_priv->feature_list &= ~(1 << feature);
  437. return 0;
  438. }
  439. int cnss_get_feature_list(struct cnss_plat_data *plat_priv,
  440. u64 *feature_list)
  441. {
  442. if (unlikely(!plat_priv))
  443. return -EINVAL;
  444. *feature_list = plat_priv->feature_list;
  445. return 0;
  446. }
  447. size_t cnss_get_platform_name(struct cnss_plat_data *plat_priv,
  448. char *buf, const size_t buf_len)
  449. {
  450. if (unlikely(!plat_priv || !buf || !buf_len))
  451. return 0;
  452. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  453. "platform-name-required")) {
  454. struct device_node *root;
  455. root = of_find_node_by_path("/");
  456. if (root) {
  457. const char *model;
  458. size_t model_len;
  459. model = of_get_property(root, "model", NULL);
  460. if (model) {
  461. model_len = strlcpy(buf, model, buf_len);
  462. cnss_pr_dbg("Platform name: %s (%zu)\n",
  463. buf, model_len);
  464. return model_len;
  465. }
  466. }
  467. }
  468. return 0;
  469. }
  470. void cnss_pm_stay_awake(struct cnss_plat_data *plat_priv)
  471. {
  472. if (atomic_inc_return(&plat_priv->pm_count) != 1)
  473. return;
  474. cnss_pr_dbg("PM stay awake, state: 0x%lx, count: %d\n",
  475. plat_priv->driver_state,
  476. atomic_read(&plat_priv->pm_count));
  477. pm_stay_awake(&plat_priv->plat_dev->dev);
  478. }
  479. void cnss_pm_relax(struct cnss_plat_data *plat_priv)
  480. {
  481. int r = atomic_dec_return(&plat_priv->pm_count);
  482. WARN_ON(r < 0);
  483. if (r != 0)
  484. return;
  485. cnss_pr_dbg("PM relax, state: 0x%lx, count: %d\n",
  486. plat_priv->driver_state,
  487. atomic_read(&plat_priv->pm_count));
  488. pm_relax(&plat_priv->plat_dev->dev);
  489. }
  490. int cnss_get_fw_files_for_target(struct device *dev,
  491. struct cnss_fw_files *pfw_files,
  492. u32 target_type, u32 target_version)
  493. {
  494. if (!pfw_files)
  495. return -ENODEV;
  496. switch (target_version) {
  497. case QCA6174_REV3_VERSION:
  498. case QCA6174_REV3_2_VERSION:
  499. memcpy(pfw_files, &FW_FILES_QCA6174_FW_3_0, sizeof(*pfw_files));
  500. break;
  501. default:
  502. memcpy(pfw_files, &FW_FILES_DEFAULT, sizeof(*pfw_files));
  503. cnss_pr_err("Unknown target version, type: 0x%X, version: 0x%X",
  504. target_type, target_version);
  505. break;
  506. }
  507. return 0;
  508. }
  509. EXPORT_SYMBOL(cnss_get_fw_files_for_target);
  510. int cnss_get_platform_cap(struct device *dev, struct cnss_platform_cap *cap)
  511. {
  512. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  513. if (!plat_priv)
  514. return -ENODEV;
  515. if (!cap)
  516. return -EINVAL;
  517. *cap = plat_priv->cap;
  518. cnss_pr_dbg("Platform cap_flag is 0x%x\n", cap->cap_flag);
  519. return 0;
  520. }
  521. EXPORT_SYMBOL(cnss_get_platform_cap);
  522. /**
  523. * cnss_get_fw_cap - Check whether FW supports specific capability or not
  524. * @dev: Device
  525. * @fw_cap: FW Capability which needs to be checked
  526. *
  527. * Return: TRUE if supported, FALSE on failure or if not supported
  528. */
  529. bool cnss_get_fw_cap(struct device *dev, enum cnss_fw_caps fw_cap)
  530. {
  531. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  532. bool is_supported = false;
  533. if (!plat_priv)
  534. return is_supported;
  535. if (!plat_priv->fw_caps)
  536. return is_supported;
  537. switch (fw_cap) {
  538. case CNSS_FW_CAP_DIRECT_LINK_SUPPORT:
  539. is_supported = !!(plat_priv->fw_caps &
  540. QMI_WLFW_DIRECT_LINK_SUPPORT_V01);
  541. break;
  542. case CNSS_FW_CAP_CALDB_SEG_DDR_SUPPORT:
  543. is_supported = !!(plat_priv->fw_caps &
  544. QMI_WLFW_CALDB_SEG_DDR_SUPPORT_V01);
  545. break;
  546. default:
  547. cnss_pr_err("Invalid FW Capability: 0x%x\n", fw_cap);
  548. }
  549. cnss_pr_dbg("FW Capability 0x%x is %s\n", fw_cap,
  550. is_supported ? "supported" : "not supported");
  551. return is_supported;
  552. }
  553. EXPORT_SYMBOL(cnss_get_fw_cap);
  554. /**
  555. * cnss_audio_is_direct_link_supported - Check whether Audio can be used for direct link support
  556. * @dev: Device
  557. *
  558. * Return: TRUE if supported, FALSE on failure or if not supported
  559. */
  560. bool cnss_audio_is_direct_link_supported(struct device *dev)
  561. {
  562. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  563. bool is_supported = false;
  564. if (!plat_priv) {
  565. cnss_pr_err("plat_priv not available to check audio direct link cap\n");
  566. return is_supported;
  567. }
  568. if (cnss_get_audio_iommu_domain(plat_priv) == 0)
  569. is_supported = true;
  570. return is_supported;
  571. }
  572. EXPORT_SYMBOL(cnss_audio_is_direct_link_supported);
  573. void cnss_request_pm_qos(struct device *dev, u32 qos_val)
  574. {
  575. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  576. if (!plat_priv)
  577. return;
  578. cpu_latency_qos_add_request(&plat_priv->qos_request, qos_val);
  579. }
  580. EXPORT_SYMBOL(cnss_request_pm_qos);
  581. void cnss_remove_pm_qos(struct device *dev)
  582. {
  583. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  584. if (!plat_priv)
  585. return;
  586. cpu_latency_qos_remove_request(&plat_priv->qos_request);
  587. }
  588. EXPORT_SYMBOL(cnss_remove_pm_qos);
  589. int cnss_wlan_enable(struct device *dev,
  590. struct cnss_wlan_enable_cfg *config,
  591. enum cnss_driver_mode mode,
  592. const char *host_version)
  593. {
  594. int ret = 0;
  595. struct cnss_plat_data *plat_priv;
  596. if (!dev) {
  597. cnss_pr_err("Invalid dev pointer\n");
  598. return -EINVAL;
  599. }
  600. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  601. if (!plat_priv)
  602. return -ENODEV;
  603. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  604. return 0;
  605. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  606. return 0;
  607. if (!config || !host_version) {
  608. cnss_pr_err("Invalid config or host_version pointer\n");
  609. return -EINVAL;
  610. }
  611. cnss_pr_dbg("Mode: %d, config: %pK, host_version: %s\n",
  612. mode, config, host_version);
  613. if (mode == CNSS_WALTEST || mode == CNSS_CCPM)
  614. goto skip_cfg;
  615. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  616. config->send_msi_ce = true;
  617. ret = cnss_wlfw_wlan_cfg_send_sync(plat_priv, config, host_version);
  618. if (ret)
  619. goto out;
  620. skip_cfg:
  621. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, mode);
  622. out:
  623. return ret;
  624. }
  625. EXPORT_SYMBOL(cnss_wlan_enable);
  626. int cnss_wlan_disable(struct device *dev, enum cnss_driver_mode mode)
  627. {
  628. int ret = 0;
  629. struct cnss_plat_data *plat_priv;
  630. if (!dev) {
  631. cnss_pr_err("Invalid dev pointer\n");
  632. return -EINVAL;
  633. }
  634. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  635. if (!plat_priv)
  636. return -ENODEV;
  637. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  638. return 0;
  639. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks))
  640. return 0;
  641. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  642. cnss_bus_free_qdss_mem(plat_priv);
  643. return ret;
  644. }
  645. EXPORT_SYMBOL(cnss_wlan_disable);
  646. #if (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0))
  647. int cnss_iommu_map(struct iommu_domain *domain,
  648. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  649. {
  650. return iommu_map(domain, iova, paddr, size, prot);
  651. }
  652. #else
  653. int cnss_iommu_map(struct iommu_domain *domain,
  654. unsigned long iova, phys_addr_t paddr, size_t size, int prot)
  655. {
  656. return iommu_map(domain, iova, paddr, size, prot, GFP_KERNEL);
  657. }
  658. #endif
  659. int cnss_audio_smmu_map(struct device *dev, phys_addr_t paddr,
  660. dma_addr_t iova, size_t size)
  661. {
  662. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  663. uint32_t page_offset;
  664. if (!plat_priv)
  665. return -ENODEV;
  666. if (!plat_priv->audio_iommu_domain)
  667. return -EINVAL;
  668. if (plat_priv->is_audio_shared_iommu_group)
  669. return 0;
  670. page_offset = iova & (PAGE_SIZE - 1);
  671. if (page_offset + size > PAGE_SIZE)
  672. size += PAGE_SIZE;
  673. iova -= page_offset;
  674. paddr -= page_offset;
  675. return cnss_iommu_map(plat_priv->audio_iommu_domain, iova, paddr,
  676. roundup(size, PAGE_SIZE), IOMMU_READ |
  677. IOMMU_WRITE | IOMMU_CACHE);
  678. }
  679. EXPORT_SYMBOL(cnss_audio_smmu_map);
  680. void cnss_audio_smmu_unmap(struct device *dev, dma_addr_t iova, size_t size)
  681. {
  682. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  683. uint32_t page_offset;
  684. if (!plat_priv || !plat_priv->audio_iommu_domain ||
  685. plat_priv->is_audio_shared_iommu_group)
  686. return;
  687. page_offset = iova & (PAGE_SIZE - 1);
  688. if (page_offset + size > PAGE_SIZE)
  689. size += PAGE_SIZE;
  690. iova -= page_offset;
  691. iommu_unmap(plat_priv->audio_iommu_domain, iova,
  692. roundup(size, PAGE_SIZE));
  693. }
  694. EXPORT_SYMBOL(cnss_audio_smmu_unmap);
  695. int cnss_get_fw_lpass_shared_mem(struct device *dev, dma_addr_t *iova,
  696. size_t *size)
  697. {
  698. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  699. uint8_t i;
  700. if (!plat_priv)
  701. return -EINVAL;
  702. for (i = 0; i < plat_priv->fw_mem_seg_len; i++) {
  703. if (plat_priv->fw_mem[i].type ==
  704. QMI_WLFW_MEM_LPASS_SHARED_V01) {
  705. *iova = plat_priv->fw_mem[i].pa;
  706. *size = plat_priv->fw_mem[i].size;
  707. return 0;
  708. }
  709. }
  710. return -EINVAL;
  711. }
  712. EXPORT_SYMBOL(cnss_get_fw_lpass_shared_mem);
  713. int cnss_athdiag_read(struct device *dev, u32 offset, u32 mem_type,
  714. u32 data_len, u8 *output)
  715. {
  716. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  717. int ret = 0;
  718. if (!plat_priv) {
  719. cnss_pr_err("plat_priv is NULL!\n");
  720. return -EINVAL;
  721. }
  722. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  723. return 0;
  724. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  725. cnss_pr_err("Invalid state for athdiag read: 0x%lx\n",
  726. plat_priv->driver_state);
  727. ret = -EINVAL;
  728. goto out;
  729. }
  730. ret = cnss_wlfw_athdiag_read_send_sync(plat_priv, offset, mem_type,
  731. data_len, output);
  732. out:
  733. return ret;
  734. }
  735. EXPORT_SYMBOL(cnss_athdiag_read);
  736. int cnss_athdiag_write(struct device *dev, u32 offset, u32 mem_type,
  737. u32 data_len, u8 *input)
  738. {
  739. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  740. int ret = 0;
  741. if (!plat_priv) {
  742. cnss_pr_err("plat_priv is NULL!\n");
  743. return -EINVAL;
  744. }
  745. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  746. return 0;
  747. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  748. cnss_pr_err("Invalid state for athdiag write: 0x%lx\n",
  749. plat_priv->driver_state);
  750. ret = -EINVAL;
  751. goto out;
  752. }
  753. ret = cnss_wlfw_athdiag_write_send_sync(plat_priv, offset, mem_type,
  754. data_len, input);
  755. out:
  756. return ret;
  757. }
  758. EXPORT_SYMBOL(cnss_athdiag_write);
  759. int cnss_set_fw_log_mode(struct device *dev, u8 fw_log_mode)
  760. {
  761. struct cnss_plat_data *plat_priv;
  762. if (!dev) {
  763. cnss_pr_err("Invalid dev pointer\n");
  764. return -EINVAL;
  765. }
  766. plat_priv = cnss_bus_dev_to_plat_priv(dev);
  767. if (!plat_priv)
  768. return -ENODEV;
  769. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  770. return 0;
  771. return cnss_wlfw_ini_send_sync(plat_priv, fw_log_mode);
  772. }
  773. EXPORT_SYMBOL(cnss_set_fw_log_mode);
  774. int cnss_set_pcie_gen_speed(struct device *dev, u8 pcie_gen_speed)
  775. {
  776. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  777. if (!plat_priv)
  778. return -EINVAL;
  779. if (!plat_priv->fw_pcie_gen_switch) {
  780. cnss_pr_err("Firmware does not support PCIe gen switch\n");
  781. return -EOPNOTSUPP;
  782. }
  783. if (pcie_gen_speed < QMI_PCIE_GEN_SPEED_1_V01 ||
  784. pcie_gen_speed > QMI_PCIE_GEN_SPEED_3_V01)
  785. return -EINVAL;
  786. cnss_pr_dbg("WLAN provided PCIE gen speed: %d\n", pcie_gen_speed);
  787. plat_priv->pcie_gen_speed = pcie_gen_speed;
  788. return 0;
  789. }
  790. EXPORT_SYMBOL(cnss_set_pcie_gen_speed);
  791. static bool cnss_is_aux_support_enabled(struct cnss_plat_data *plat_priv)
  792. {
  793. switch (plat_priv->device_id) {
  794. case PEACH_DEVICE_ID:
  795. if (!plat_priv->fw_aux_uc_support) {
  796. cnss_pr_dbg("FW does not support aux uc capability\n");
  797. return false;
  798. }
  799. break;
  800. default:
  801. cnss_pr_dbg("Host does not support aux uc capability\n");
  802. return false;
  803. }
  804. return true;
  805. }
  806. static int cnss_fw_mem_ready_hdlr(struct cnss_plat_data *plat_priv)
  807. {
  808. int ret = 0;
  809. if (!plat_priv)
  810. return -ENODEV;
  811. set_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  812. ret = cnss_wlfw_tgt_cap_send_sync(plat_priv);
  813. if (ret)
  814. goto out;
  815. cnss_bus_load_tme_patch(plat_priv);
  816. cnss_wlfw_tme_patch_dnld_send_sync(plat_priv,
  817. WLFW_TME_LITE_PATCH_FILE_V01);
  818. if (plat_priv->hds_enabled)
  819. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_HDS);
  820. cnss_wlfw_bdf_dnld_send_sync(plat_priv, CNSS_BDF_REGDB);
  821. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  822. plat_priv->ctrl_params.bdf_type = CNSS_BDF_BIN;
  823. ret = cnss_wlfw_bdf_dnld_send_sync(plat_priv,
  824. plat_priv->ctrl_params.bdf_type);
  825. if (ret)
  826. goto out;
  827. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  828. return 0;
  829. ret = cnss_bus_load_m3(plat_priv);
  830. if (ret)
  831. goto out;
  832. ret = cnss_wlfw_m3_dnld_send_sync(plat_priv);
  833. if (ret)
  834. goto out;
  835. if (cnss_is_aux_support_enabled(plat_priv)) {
  836. ret = cnss_bus_load_aux(plat_priv);
  837. if (ret)
  838. goto out;
  839. ret = cnss_wlfw_aux_dnld_send_sync(plat_priv);
  840. if (ret)
  841. goto out;
  842. }
  843. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  844. return 0;
  845. out:
  846. return ret;
  847. }
  848. static int cnss_request_antenna_sharing(struct cnss_plat_data *plat_priv)
  849. {
  850. int ret = 0;
  851. if (!plat_priv->antenna) {
  852. ret = cnss_wlfw_antenna_switch_send_sync(plat_priv);
  853. if (ret)
  854. goto out;
  855. }
  856. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state)) {
  857. ret = coex_antenna_switch_to_wlan_send_sync_msg(plat_priv);
  858. if (ret)
  859. goto out;
  860. }
  861. ret = cnss_wlfw_antenna_grant_send_sync(plat_priv);
  862. if (ret)
  863. goto out;
  864. return 0;
  865. out:
  866. return ret;
  867. }
  868. static void cnss_release_antenna_sharing(struct cnss_plat_data *plat_priv)
  869. {
  870. if (test_bit(CNSS_COEX_CONNECTED, &plat_priv->driver_state))
  871. coex_antenna_switch_to_mdm_send_sync_msg(plat_priv);
  872. }
  873. static int cnss_setup_dms_mac(struct cnss_plat_data *plat_priv)
  874. {
  875. u32 i;
  876. int ret = 0;
  877. struct cnss_plat_ipc_daemon_config *cfg;
  878. ret = cnss_qmi_get_dms_mac(plat_priv);
  879. if (ret == 0 && plat_priv->dms.mac_valid)
  880. goto qmi_send;
  881. /* DTSI property use-nv-mac is used to force DMS MAC address for WLAN.
  882. * Thus assert on failure to get MAC from DMS even after retries
  883. */
  884. if (plat_priv->use_nv_mac) {
  885. /* Check if Daemon says platform support DMS MAC provisioning */
  886. cfg = cnss_plat_ipc_qmi_daemon_config();
  887. if (cfg) {
  888. if (!cfg->dms_mac_addr_supported) {
  889. cnss_pr_err("DMS MAC address not supported\n");
  890. CNSS_ASSERT(0);
  891. return -EINVAL;
  892. }
  893. }
  894. for (i = 0; i < CNSS_DMS_QMI_CONNECTION_WAIT_RETRY; i++) {
  895. if (plat_priv->dms.mac_valid)
  896. break;
  897. ret = cnss_qmi_get_dms_mac(plat_priv);
  898. if (ret == 0)
  899. break;
  900. msleep(CNSS_DMS_QMI_CONNECTION_WAIT_MS);
  901. }
  902. if (!plat_priv->dms.mac_valid) {
  903. cnss_pr_err("Unable to get MAC from DMS after retries\n");
  904. CNSS_ASSERT(0);
  905. return -EINVAL;
  906. }
  907. }
  908. qmi_send:
  909. if (plat_priv->dms.mac_valid)
  910. ret =
  911. cnss_wlfw_wlan_mac_req_send_sync(plat_priv, plat_priv->dms.mac,
  912. ARRAY_SIZE(plat_priv->dms.mac));
  913. return ret;
  914. }
  915. static int cnss_cal_db_mem_update(struct cnss_plat_data *plat_priv,
  916. enum cnss_cal_db_op op, u32 *size)
  917. {
  918. int ret = 0;
  919. u32 timeout = cnss_get_timeout(plat_priv,
  920. CNSS_TIMEOUT_DAEMON_CONNECTION);
  921. enum cnss_plat_ipc_qmi_client_id_v01 client_id =
  922. CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01;
  923. if (op >= CNSS_CAL_DB_INVALID_OP)
  924. return -EINVAL;
  925. if (!plat_priv->cbc_file_download) {
  926. cnss_pr_info("CAL DB file not required as per BDF\n");
  927. return 0;
  928. }
  929. if (*size == 0) {
  930. cnss_pr_err("Invalid cal file size\n");
  931. return -EINVAL;
  932. }
  933. if (!test_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state)) {
  934. cnss_pr_info("Waiting for CNSS Daemon connection\n");
  935. ret = wait_for_completion_timeout(&plat_priv->daemon_connected,
  936. msecs_to_jiffies(timeout));
  937. if (!ret) {
  938. cnss_pr_err("Daemon not yet connected\n");
  939. CNSS_ASSERT(0);
  940. return ret;
  941. }
  942. }
  943. if (!plat_priv->cal_mem->va) {
  944. cnss_pr_err("CAL DB Memory not setup for FW\n");
  945. return -EINVAL;
  946. }
  947. /* Copy CAL DB file contents to/from CAL_TYPE_DDR mem allocated to FW */
  948. if (op == CNSS_CAL_DB_DOWNLOAD) {
  949. cnss_pr_dbg("Initiating Calibration file download to mem\n");
  950. ret = cnss_plat_ipc_qmi_file_download(client_id,
  951. CNSS_CAL_DB_FILE_NAME,
  952. plat_priv->cal_mem->va,
  953. size);
  954. } else {
  955. cnss_pr_dbg("Initiating Calibration mem upload to file\n");
  956. ret = cnss_plat_ipc_qmi_file_upload(client_id,
  957. CNSS_CAL_DB_FILE_NAME,
  958. plat_priv->cal_mem->va,
  959. *size);
  960. }
  961. if (ret)
  962. cnss_pr_err("Cal DB file %s %s failure\n",
  963. CNSS_CAL_DB_FILE_NAME,
  964. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload");
  965. else
  966. cnss_pr_dbg("Cal DB file %s %s size %d done\n",
  967. CNSS_CAL_DB_FILE_NAME,
  968. op == CNSS_CAL_DB_DOWNLOAD ? "download" : "upload",
  969. *size);
  970. return ret;
  971. }
  972. static int cnss_cal_mem_upload_to_file(struct cnss_plat_data *plat_priv)
  973. {
  974. if (plat_priv->cal_file_size > plat_priv->cal_mem->size) {
  975. cnss_pr_err("Cal file size is larger than Cal DB Mem size\n");
  976. return -EINVAL;
  977. }
  978. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_UPLOAD,
  979. &plat_priv->cal_file_size);
  980. }
  981. static int cnss_cal_file_download_to_mem(struct cnss_plat_data *plat_priv,
  982. u32 *cal_file_size)
  983. {
  984. /* To download pass the total size of cal DB mem allocated.
  985. * After cal file is download to mem, its size is updated in
  986. * return pointer
  987. */
  988. *cal_file_size = plat_priv->cal_mem->size;
  989. return cnss_cal_db_mem_update(plat_priv, CNSS_CAL_DB_DOWNLOAD,
  990. cal_file_size);
  991. }
  992. static int cnss_fw_ready_hdlr(struct cnss_plat_data *plat_priv)
  993. {
  994. int ret = 0;
  995. u32 cal_file_size = 0;
  996. if (!plat_priv)
  997. return -ENODEV;
  998. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  999. cnss_pr_err("Reboot is in progress, ignore FW ready\n");
  1000. return -EINVAL;
  1001. }
  1002. cnss_pr_dbg("Processing FW Init Done..\n");
  1003. del_timer(&plat_priv->fw_boot_timer);
  1004. set_bit(CNSS_FW_READY, &plat_priv->driver_state);
  1005. clear_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state);
  1006. cnss_wlfw_send_pcie_gen_speed_sync(plat_priv);
  1007. cnss_send_subsys_restart_level_msg(plat_priv);
  1008. if (test_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state)) {
  1009. clear_bit(CNSS_FW_BOOT_RECOVERY, &plat_priv->driver_state);
  1010. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1011. }
  1012. if (test_bit(ENABLE_WALTEST, &plat_priv->ctrl_params.quirks)) {
  1013. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  1014. CNSS_WALTEST);
  1015. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  1016. cnss_request_antenna_sharing(plat_priv);
  1017. cnss_cal_file_download_to_mem(plat_priv, &cal_file_size);
  1018. cnss_wlfw_cal_report_req_send_sync(plat_priv, cal_file_size);
  1019. plat_priv->cal_time = jiffies;
  1020. ret = cnss_wlfw_wlan_mode_send_sync(plat_priv,
  1021. CNSS_CALIBRATION);
  1022. } else {
  1023. ret = cnss_setup_dms_mac(plat_priv);
  1024. ret = cnss_bus_call_driver_probe(plat_priv);
  1025. }
  1026. if (ret && test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1027. goto out;
  1028. else if (ret)
  1029. goto shutdown;
  1030. cnss_vreg_unvote_type(plat_priv, CNSS_VREG_PRIM);
  1031. return 0;
  1032. shutdown:
  1033. cnss_bus_dev_shutdown(plat_priv);
  1034. clear_bit(CNSS_FW_READY, &plat_priv->driver_state);
  1035. clear_bit(CNSS_FW_MEM_READY, &plat_priv->driver_state);
  1036. out:
  1037. return ret;
  1038. }
  1039. static char *cnss_driver_event_to_str(enum cnss_driver_event_type type)
  1040. {
  1041. switch (type) {
  1042. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  1043. return "SERVER_ARRIVE";
  1044. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  1045. return "SERVER_EXIT";
  1046. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  1047. return "REQUEST_MEM";
  1048. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  1049. return "FW_MEM_READY";
  1050. case CNSS_DRIVER_EVENT_FW_READY:
  1051. return "FW_READY";
  1052. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  1053. return "COLD_BOOT_CAL_START";
  1054. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  1055. return "COLD_BOOT_CAL_DONE";
  1056. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  1057. return "REGISTER_DRIVER";
  1058. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  1059. return "UNREGISTER_DRIVER";
  1060. case CNSS_DRIVER_EVENT_RECOVERY:
  1061. return "RECOVERY";
  1062. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  1063. return "FORCE_FW_ASSERT";
  1064. case CNSS_DRIVER_EVENT_POWER_UP:
  1065. return "POWER_UP";
  1066. case CNSS_DRIVER_EVENT_POWER_DOWN:
  1067. return "POWER_DOWN";
  1068. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  1069. return "IDLE_RESTART";
  1070. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  1071. return "IDLE_SHUTDOWN";
  1072. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  1073. return "IMS_WFC_CALL_IND";
  1074. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  1075. return "WLFW_TWC_CFG_IND";
  1076. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  1077. return "QDSS_TRACE_REQ_MEM";
  1078. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  1079. return "FW_MEM_FILE_SAVE";
  1080. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  1081. return "QDSS_TRACE_FREE";
  1082. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  1083. return "QDSS_TRACE_REQ_DATA";
  1084. case CNSS_DRIVER_EVENT_MAX:
  1085. return "EVENT_MAX";
  1086. }
  1087. return "UNKNOWN";
  1088. };
  1089. int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
  1090. enum cnss_driver_event_type type,
  1091. u32 flags, void *data)
  1092. {
  1093. struct cnss_driver_event *event;
  1094. unsigned long irq_flags;
  1095. int gfp = GFP_KERNEL;
  1096. int ret = 0;
  1097. if (!plat_priv)
  1098. return -ENODEV;
  1099. cnss_pr_dbg("Posting event: %s(%d)%s, state: 0x%lx flags: 0x%0x\n",
  1100. cnss_driver_event_to_str(type), type,
  1101. flags ? "-sync" : "", plat_priv->driver_state, flags);
  1102. if (type >= CNSS_DRIVER_EVENT_MAX) {
  1103. cnss_pr_err("Invalid Event type: %d, can't post", type);
  1104. return -EINVAL;
  1105. }
  1106. if (in_interrupt() || irqs_disabled())
  1107. gfp = GFP_ATOMIC;
  1108. event = kzalloc(sizeof(*event), gfp);
  1109. if (!event)
  1110. return -ENOMEM;
  1111. cnss_pm_stay_awake(plat_priv);
  1112. event->type = type;
  1113. event->data = data;
  1114. init_completion(&event->complete);
  1115. event->ret = CNSS_EVENT_PENDING;
  1116. event->sync = !!(flags & CNSS_EVENT_SYNC);
  1117. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1118. list_add_tail(&event->list, &plat_priv->event_list);
  1119. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1120. queue_work(plat_priv->event_wq, &plat_priv->event_work);
  1121. if (!(flags & CNSS_EVENT_SYNC))
  1122. goto out;
  1123. if (flags & CNSS_EVENT_UNKILLABLE)
  1124. wait_for_completion(&event->complete);
  1125. else if (flags & CNSS_EVENT_UNINTERRUPTIBLE)
  1126. ret = wait_for_completion_killable(&event->complete);
  1127. else
  1128. ret = wait_for_completion_interruptible(&event->complete);
  1129. cnss_pr_dbg("Completed event: %s(%d), state: 0x%lx, ret: %d/%d\n",
  1130. cnss_driver_event_to_str(type), type,
  1131. plat_priv->driver_state, ret, event->ret);
  1132. spin_lock_irqsave(&plat_priv->event_lock, irq_flags);
  1133. if (ret == -ERESTARTSYS && event->ret == CNSS_EVENT_PENDING) {
  1134. event->sync = false;
  1135. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1136. ret = -EINTR;
  1137. goto out;
  1138. }
  1139. spin_unlock_irqrestore(&plat_priv->event_lock, irq_flags);
  1140. ret = event->ret;
  1141. kfree(event);
  1142. out:
  1143. cnss_pm_relax(plat_priv);
  1144. return ret;
  1145. }
  1146. /**
  1147. * cnss_get_timeout - Get timeout for corresponding type.
  1148. * @plat_priv: Pointer to platform driver context.
  1149. * @cnss_timeout_type: Timeout type.
  1150. *
  1151. * Return: Timeout in milliseconds.
  1152. */
  1153. unsigned int cnss_get_timeout(struct cnss_plat_data *plat_priv,
  1154. enum cnss_timeout_type timeout_type)
  1155. {
  1156. unsigned int qmi_timeout = cnss_get_qmi_timeout(plat_priv);
  1157. switch (timeout_type) {
  1158. case CNSS_TIMEOUT_QMI:
  1159. return qmi_timeout;
  1160. case CNSS_TIMEOUT_POWER_UP:
  1161. return (qmi_timeout << 2);
  1162. case CNSS_TIMEOUT_IDLE_RESTART:
  1163. /* In idle restart power up sequence, we have fw_boot_timer to
  1164. * handle FW initialization failure.
  1165. * It uses WLAN_MISSION_MODE_TIMEOUT, so setup 3x that time to
  1166. * account for FW dump collection and FW re-initialization on
  1167. * retry.
  1168. */
  1169. return (qmi_timeout + WLAN_MISSION_MODE_TIMEOUT * 3);
  1170. case CNSS_TIMEOUT_CALIBRATION:
  1171. /* Similar to mission mode, in CBC if FW init fails
  1172. * fw recovery is tried. Thus return 2x the CBC timeout.
  1173. */
  1174. return (qmi_timeout + WLAN_COLD_BOOT_CAL_TIMEOUT * 2);
  1175. case CNSS_TIMEOUT_WLAN_WATCHDOG:
  1176. return ((qmi_timeout << 1) + WLAN_WD_TIMEOUT_MS);
  1177. case CNSS_TIMEOUT_RDDM:
  1178. return CNSS_RDDM_TIMEOUT_MS;
  1179. case CNSS_TIMEOUT_RECOVERY:
  1180. return RECOVERY_TIMEOUT;
  1181. case CNSS_TIMEOUT_DAEMON_CONNECTION:
  1182. return qmi_timeout + CNSS_DAEMON_CONNECT_TIMEOUT_MS;
  1183. default:
  1184. return qmi_timeout;
  1185. }
  1186. }
  1187. unsigned int cnss_get_boot_timeout(struct device *dev)
  1188. {
  1189. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1190. if (!plat_priv) {
  1191. cnss_pr_err("plat_priv is NULL\n");
  1192. return 0;
  1193. }
  1194. return cnss_get_timeout(plat_priv, CNSS_TIMEOUT_QMI);
  1195. }
  1196. EXPORT_SYMBOL(cnss_get_boot_timeout);
  1197. int cnss_power_up(struct device *dev)
  1198. {
  1199. int ret = 0;
  1200. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1201. unsigned int timeout;
  1202. if (!plat_priv) {
  1203. cnss_pr_err("plat_priv is NULL\n");
  1204. return -ENODEV;
  1205. }
  1206. cnss_pr_dbg("Powering up device\n");
  1207. ret = cnss_driver_event_post(plat_priv,
  1208. CNSS_DRIVER_EVENT_POWER_UP,
  1209. CNSS_EVENT_SYNC, NULL);
  1210. if (ret)
  1211. goto out;
  1212. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1213. goto out;
  1214. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_POWER_UP);
  1215. reinit_completion(&plat_priv->power_up_complete);
  1216. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1217. msecs_to_jiffies(timeout));
  1218. if (!ret) {
  1219. cnss_pr_err("Timeout (%ums) waiting for power up to complete\n",
  1220. timeout);
  1221. ret = -EAGAIN;
  1222. goto out;
  1223. }
  1224. return 0;
  1225. out:
  1226. return ret;
  1227. }
  1228. EXPORT_SYMBOL(cnss_power_up);
  1229. int cnss_power_down(struct device *dev)
  1230. {
  1231. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1232. if (!plat_priv) {
  1233. cnss_pr_err("plat_priv is NULL\n");
  1234. return -ENODEV;
  1235. }
  1236. cnss_pr_dbg("Powering down device\n");
  1237. return cnss_driver_event_post(plat_priv,
  1238. CNSS_DRIVER_EVENT_POWER_DOWN,
  1239. CNSS_EVENT_SYNC, NULL);
  1240. }
  1241. EXPORT_SYMBOL(cnss_power_down);
  1242. int cnss_idle_restart(struct device *dev)
  1243. {
  1244. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1245. unsigned int timeout;
  1246. int ret = 0;
  1247. if (!plat_priv) {
  1248. cnss_pr_err("plat_priv is NULL\n");
  1249. return -ENODEV;
  1250. }
  1251. if (!mutex_trylock(&plat_priv->driver_ops_lock)) {
  1252. cnss_pr_dbg("Another driver operation is in progress, ignore idle restart\n");
  1253. return -EBUSY;
  1254. }
  1255. cnss_pr_dbg("Doing idle restart\n");
  1256. reinit_completion(&plat_priv->power_up_complete);
  1257. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1258. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1259. ret = -EINVAL;
  1260. goto out;
  1261. }
  1262. ret = cnss_driver_event_post(plat_priv,
  1263. CNSS_DRIVER_EVENT_IDLE_RESTART,
  1264. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1265. if (ret == -EINTR && plat_priv->device_id != QCA6174_DEVICE_ID)
  1266. cnss_pr_err("Idle restart has been interrupted but device power up is still in progress");
  1267. else if (ret)
  1268. goto out;
  1269. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1270. ret = cnss_bus_call_driver_probe(plat_priv);
  1271. goto out;
  1272. }
  1273. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_IDLE_RESTART);
  1274. ret = wait_for_completion_timeout(&plat_priv->power_up_complete,
  1275. msecs_to_jiffies(timeout));
  1276. if (plat_priv->power_up_error) {
  1277. ret = plat_priv->power_up_error;
  1278. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  1279. cnss_pr_dbg("Power up error:%d, exiting\n",
  1280. plat_priv->power_up_error);
  1281. goto out;
  1282. }
  1283. if (!ret) {
  1284. /* This exception occurs after attempting retry of FW recovery.
  1285. * Thus we can safely power off the device.
  1286. */
  1287. cnss_fatal_err("Timeout (%ums) waiting for idle restart to complete\n",
  1288. timeout);
  1289. ret = -ETIMEDOUT;
  1290. cnss_power_down(dev);
  1291. CNSS_ASSERT(0);
  1292. goto out;
  1293. }
  1294. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1295. cnss_pr_dbg("Reboot or shutdown is in progress, ignore idle restart\n");
  1296. del_timer(&plat_priv->fw_boot_timer);
  1297. ret = -EINVAL;
  1298. goto out;
  1299. }
  1300. /* In non-DRV mode, remove MHI satellite configuration. Switching to
  1301. * non-DRV is supported only once after device reboots and before wifi
  1302. * is turned on. We do not allow switching back to DRV.
  1303. * To bring device back into DRV, user needs to reboot device.
  1304. */
  1305. if (test_bit(DISABLE_DRV, &plat_priv->ctrl_params.quirks)) {
  1306. cnss_pr_dbg("DRV is disabled\n");
  1307. cnss_bus_disable_mhi_satellite_cfg(plat_priv);
  1308. }
  1309. mutex_unlock(&plat_priv->driver_ops_lock);
  1310. return 0;
  1311. out:
  1312. mutex_unlock(&plat_priv->driver_ops_lock);
  1313. return ret;
  1314. }
  1315. EXPORT_SYMBOL(cnss_idle_restart);
  1316. int cnss_idle_shutdown(struct device *dev)
  1317. {
  1318. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1319. if (!plat_priv) {
  1320. cnss_pr_err("plat_priv is NULL\n");
  1321. return -ENODEV;
  1322. }
  1323. if (test_bit(CNSS_IN_SUSPEND_RESUME, &plat_priv->driver_state)) {
  1324. cnss_pr_dbg("System suspend or resume in progress, ignore idle shutdown\n");
  1325. return -EAGAIN;
  1326. }
  1327. cnss_pr_dbg("Doing idle shutdown\n");
  1328. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state) ||
  1329. test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state)) {
  1330. cnss_pr_dbg("Recovery in progress. Ignore IDLE Shutdown\n");
  1331. return -EBUSY;
  1332. }
  1333. return cnss_driver_event_post(plat_priv,
  1334. CNSS_DRIVER_EVENT_IDLE_SHUTDOWN,
  1335. CNSS_EVENT_SYNC_UNINTERRUPTIBLE, NULL);
  1336. }
  1337. EXPORT_SYMBOL(cnss_idle_shutdown);
  1338. static int cnss_get_resources(struct cnss_plat_data *plat_priv)
  1339. {
  1340. int ret = 0;
  1341. ret = cnss_get_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1342. if (ret < 0) {
  1343. cnss_pr_err("Failed to get vreg, err = %d\n", ret);
  1344. goto out;
  1345. }
  1346. ret = cnss_get_clk(plat_priv);
  1347. if (ret) {
  1348. cnss_pr_err("Failed to get clocks, err = %d\n", ret);
  1349. goto put_vreg;
  1350. }
  1351. ret = cnss_get_pinctrl(plat_priv);
  1352. if (ret) {
  1353. cnss_pr_err("Failed to get pinctrl, err = %d\n", ret);
  1354. goto put_clk;
  1355. }
  1356. return 0;
  1357. put_clk:
  1358. cnss_put_clk(plat_priv);
  1359. put_vreg:
  1360. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1361. out:
  1362. return ret;
  1363. }
  1364. static void cnss_put_resources(struct cnss_plat_data *plat_priv)
  1365. {
  1366. cnss_put_clk(plat_priv);
  1367. cnss_put_vreg_type(plat_priv, CNSS_VREG_PRIM);
  1368. }
  1369. #if IS_ENABLED(CONFIG_ESOC) && IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1370. static int cnss_modem_notifier_nb(struct notifier_block *nb,
  1371. unsigned long code,
  1372. void *ss_handle)
  1373. {
  1374. struct cnss_plat_data *plat_priv =
  1375. container_of(nb, struct cnss_plat_data, modem_nb);
  1376. struct cnss_esoc_info *esoc_info;
  1377. cnss_pr_dbg("Modem notifier: event %lu\n", code);
  1378. if (!plat_priv)
  1379. return NOTIFY_DONE;
  1380. esoc_info = &plat_priv->esoc_info;
  1381. if (code == SUBSYS_AFTER_POWERUP)
  1382. esoc_info->modem_current_status = 1;
  1383. else if (code == SUBSYS_BEFORE_SHUTDOWN)
  1384. esoc_info->modem_current_status = 0;
  1385. else
  1386. return NOTIFY_DONE;
  1387. if (!cnss_bus_call_driver_modem_status(plat_priv,
  1388. esoc_info->modem_current_status))
  1389. return NOTIFY_DONE;
  1390. return NOTIFY_OK;
  1391. }
  1392. static int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1393. {
  1394. int ret = 0;
  1395. struct device *dev;
  1396. struct cnss_esoc_info *esoc_info;
  1397. struct esoc_desc *esoc_desc;
  1398. const char *client_desc;
  1399. dev = &plat_priv->plat_dev->dev;
  1400. esoc_info = &plat_priv->esoc_info;
  1401. esoc_info->notify_modem_status =
  1402. of_property_read_bool(dev->of_node,
  1403. "qcom,notify-modem-status");
  1404. if (!esoc_info->notify_modem_status)
  1405. goto out;
  1406. ret = of_property_read_string_index(dev->of_node, "esoc-names", 0,
  1407. &client_desc);
  1408. if (ret) {
  1409. cnss_pr_dbg("esoc-names is not defined in DT, skip!\n");
  1410. } else {
  1411. esoc_desc = devm_register_esoc_client(dev, client_desc);
  1412. if (IS_ERR_OR_NULL(esoc_desc)) {
  1413. ret = PTR_RET(esoc_desc);
  1414. cnss_pr_err("Failed to register esoc_desc, err = %d\n",
  1415. ret);
  1416. goto out;
  1417. }
  1418. esoc_info->esoc_desc = esoc_desc;
  1419. }
  1420. plat_priv->modem_nb.notifier_call = cnss_modem_notifier_nb;
  1421. esoc_info->modem_current_status = 0;
  1422. esoc_info->modem_notify_handler =
  1423. subsys_notif_register_notifier(esoc_info->esoc_desc ?
  1424. esoc_info->esoc_desc->name :
  1425. "modem", &plat_priv->modem_nb);
  1426. if (IS_ERR(esoc_info->modem_notify_handler)) {
  1427. ret = PTR_ERR(esoc_info->modem_notify_handler);
  1428. cnss_pr_err("Failed to register esoc notifier, err = %d\n",
  1429. ret);
  1430. goto unreg_esoc;
  1431. }
  1432. return 0;
  1433. unreg_esoc:
  1434. if (esoc_info->esoc_desc)
  1435. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1436. out:
  1437. return ret;
  1438. }
  1439. static void cnss_unregister_esoc(struct cnss_plat_data *plat_priv)
  1440. {
  1441. struct device *dev;
  1442. struct cnss_esoc_info *esoc_info;
  1443. dev = &plat_priv->plat_dev->dev;
  1444. esoc_info = &plat_priv->esoc_info;
  1445. if (esoc_info->notify_modem_status)
  1446. subsys_notif_unregister_notifier
  1447. (esoc_info->modem_notify_handler,
  1448. &plat_priv->modem_nb);
  1449. if (esoc_info->esoc_desc)
  1450. devm_unregister_esoc_client(dev, esoc_info->esoc_desc);
  1451. }
  1452. #else
  1453. static inline int cnss_register_esoc(struct cnss_plat_data *plat_priv)
  1454. {
  1455. return 0;
  1456. }
  1457. static inline void cnss_unregister_esoc(struct cnss_plat_data *plat_priv) {}
  1458. #endif
  1459. int cnss_enable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1460. {
  1461. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1462. int ret = 0;
  1463. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1464. return 0;
  1465. ret = enable_irq_wake(sol_gpio->dev_sol_irq);
  1466. if (ret)
  1467. cnss_pr_err("Failed to enable device SOL as wake IRQ, err = %d\n",
  1468. ret);
  1469. return ret;
  1470. }
  1471. int cnss_disable_dev_sol_irq(struct cnss_plat_data *plat_priv)
  1472. {
  1473. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1474. int ret = 0;
  1475. if (sol_gpio->dev_sol_gpio < 0 || sol_gpio->dev_sol_irq <= 0)
  1476. return 0;
  1477. ret = disable_irq_wake(sol_gpio->dev_sol_irq);
  1478. if (ret)
  1479. cnss_pr_err("Failed to disable device SOL as wake IRQ, err = %d\n",
  1480. ret);
  1481. return ret;
  1482. }
  1483. int cnss_get_dev_sol_value(struct cnss_plat_data *plat_priv)
  1484. {
  1485. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1486. if (sol_gpio->dev_sol_gpio < 0)
  1487. return -EINVAL;
  1488. return gpio_get_value(sol_gpio->dev_sol_gpio);
  1489. }
  1490. static irqreturn_t cnss_dev_sol_handler(int irq, void *data)
  1491. {
  1492. struct cnss_plat_data *plat_priv = data;
  1493. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1494. if (test_bit(CNSS_POWER_OFF, &plat_priv->driver_state)) {
  1495. cnss_pr_dbg("Ignore Dev SOL during device power off");
  1496. return IRQ_HANDLED;
  1497. }
  1498. sol_gpio->dev_sol_counter++;
  1499. cnss_pr_dbg("WLAN device SOL IRQ (%u) is asserted #%u, dev_sol_val: %d\n",
  1500. irq, sol_gpio->dev_sol_counter,
  1501. cnss_get_dev_sol_value(plat_priv));
  1502. /* Make sure abort current suspend */
  1503. cnss_pm_stay_awake(plat_priv);
  1504. cnss_pm_relax(plat_priv);
  1505. pm_system_wakeup();
  1506. cnss_bus_handle_dev_sol_irq(plat_priv);
  1507. return IRQ_HANDLED;
  1508. }
  1509. static int cnss_init_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1510. {
  1511. struct device *dev = &plat_priv->plat_dev->dev;
  1512. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1513. int ret = 0;
  1514. sol_gpio->dev_sol_gpio = of_get_named_gpio(dev->of_node,
  1515. "wlan-dev-sol-gpio", 0);
  1516. if (sol_gpio->dev_sol_gpio < 0)
  1517. goto out;
  1518. cnss_pr_dbg("Get device SOL GPIO (%d) from device node\n",
  1519. sol_gpio->dev_sol_gpio);
  1520. ret = gpio_request(sol_gpio->dev_sol_gpio, "wlan_dev_sol_gpio");
  1521. if (ret) {
  1522. cnss_pr_err("Failed to request device SOL GPIO, err = %d\n",
  1523. ret);
  1524. goto out;
  1525. }
  1526. gpio_direction_input(sol_gpio->dev_sol_gpio);
  1527. sol_gpio->dev_sol_irq = gpio_to_irq(sol_gpio->dev_sol_gpio);
  1528. ret = request_irq(sol_gpio->dev_sol_irq, cnss_dev_sol_handler,
  1529. IRQF_TRIGGER_FALLING, "wlan_dev_sol_irq", plat_priv);
  1530. if (ret) {
  1531. cnss_pr_err("Failed to request device SOL IRQ, err = %d\n", ret);
  1532. goto free_gpio;
  1533. }
  1534. return 0;
  1535. free_gpio:
  1536. gpio_free(sol_gpio->dev_sol_gpio);
  1537. out:
  1538. return ret;
  1539. }
  1540. static void cnss_deinit_dev_sol_gpio(struct cnss_plat_data *plat_priv)
  1541. {
  1542. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1543. if (sol_gpio->dev_sol_gpio < 0)
  1544. return;
  1545. free_irq(sol_gpio->dev_sol_irq, plat_priv);
  1546. gpio_free(sol_gpio->dev_sol_gpio);
  1547. }
  1548. int cnss_set_host_sol_value(struct cnss_plat_data *plat_priv, int value)
  1549. {
  1550. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1551. if (sol_gpio->host_sol_gpio < 0)
  1552. return -EINVAL;
  1553. if (value)
  1554. cnss_pr_dbg("Assert host SOL GPIO\n");
  1555. gpio_set_value(sol_gpio->host_sol_gpio, value);
  1556. return 0;
  1557. }
  1558. int cnss_get_host_sol_value(struct cnss_plat_data *plat_priv)
  1559. {
  1560. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1561. if (sol_gpio->host_sol_gpio < 0)
  1562. return -EINVAL;
  1563. return gpio_get_value(sol_gpio->host_sol_gpio);
  1564. }
  1565. static int cnss_init_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1566. {
  1567. struct device *dev = &plat_priv->plat_dev->dev;
  1568. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1569. int ret = 0;
  1570. sol_gpio->host_sol_gpio = of_get_named_gpio(dev->of_node,
  1571. "wlan-host-sol-gpio", 0);
  1572. if (sol_gpio->host_sol_gpio < 0)
  1573. goto out;
  1574. cnss_pr_dbg("Get host SOL GPIO (%d) from device node\n",
  1575. sol_gpio->host_sol_gpio);
  1576. ret = gpio_request(sol_gpio->host_sol_gpio, "wlan_host_sol_gpio");
  1577. if (ret) {
  1578. cnss_pr_err("Failed to request host SOL GPIO, err = %d\n",
  1579. ret);
  1580. goto out;
  1581. }
  1582. gpio_direction_output(sol_gpio->host_sol_gpio, 0);
  1583. return 0;
  1584. out:
  1585. return ret;
  1586. }
  1587. static void cnss_deinit_host_sol_gpio(struct cnss_plat_data *plat_priv)
  1588. {
  1589. struct cnss_sol_gpio *sol_gpio = &plat_priv->sol_gpio;
  1590. if (sol_gpio->host_sol_gpio < 0)
  1591. return;
  1592. gpio_free(sol_gpio->host_sol_gpio);
  1593. }
  1594. static int cnss_init_sol_gpio(struct cnss_plat_data *plat_priv)
  1595. {
  1596. int ret;
  1597. ret = cnss_init_dev_sol_gpio(plat_priv);
  1598. if (ret)
  1599. goto out;
  1600. ret = cnss_init_host_sol_gpio(plat_priv);
  1601. if (ret)
  1602. goto deinit_dev_sol;
  1603. return 0;
  1604. deinit_dev_sol:
  1605. cnss_deinit_dev_sol_gpio(plat_priv);
  1606. out:
  1607. return ret;
  1608. }
  1609. static void cnss_deinit_sol_gpio(struct cnss_plat_data *plat_priv)
  1610. {
  1611. cnss_deinit_host_sol_gpio(plat_priv);
  1612. cnss_deinit_dev_sol_gpio(plat_priv);
  1613. }
  1614. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  1615. static int cnss_subsys_powerup(const struct subsys_desc *subsys_desc)
  1616. {
  1617. struct cnss_plat_data *plat_priv;
  1618. int ret = 0;
  1619. if (!subsys_desc->dev) {
  1620. cnss_pr_err("dev from subsys_desc is NULL\n");
  1621. return -ENODEV;
  1622. }
  1623. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1624. if (!plat_priv) {
  1625. cnss_pr_err("plat_priv is NULL\n");
  1626. return -ENODEV;
  1627. }
  1628. if (!plat_priv->driver_state) {
  1629. cnss_pr_dbg("subsys powerup is ignored\n");
  1630. return 0;
  1631. }
  1632. ret = cnss_bus_dev_powerup(plat_priv);
  1633. if (ret)
  1634. __pm_relax(plat_priv->recovery_ws);
  1635. return ret;
  1636. }
  1637. static int cnss_subsys_shutdown(const struct subsys_desc *subsys_desc,
  1638. bool force_stop)
  1639. {
  1640. struct cnss_plat_data *plat_priv;
  1641. if (!subsys_desc->dev) {
  1642. cnss_pr_err("dev from subsys_desc is NULL\n");
  1643. return -ENODEV;
  1644. }
  1645. plat_priv = dev_get_drvdata(subsys_desc->dev);
  1646. if (!plat_priv) {
  1647. cnss_pr_err("plat_priv is NULL\n");
  1648. return -ENODEV;
  1649. }
  1650. if (!plat_priv->driver_state) {
  1651. cnss_pr_dbg("subsys shutdown is ignored\n");
  1652. return 0;
  1653. }
  1654. return cnss_bus_dev_shutdown(plat_priv);
  1655. }
  1656. void cnss_device_crashed(struct device *dev)
  1657. {
  1658. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1659. struct cnss_subsys_info *subsys_info;
  1660. if (!plat_priv)
  1661. return;
  1662. subsys_info = &plat_priv->subsys_info;
  1663. if (subsys_info->subsys_device) {
  1664. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1665. subsys_set_crash_status(subsys_info->subsys_device, true);
  1666. subsystem_restart_dev(subsys_info->subsys_device);
  1667. }
  1668. }
  1669. EXPORT_SYMBOL(cnss_device_crashed);
  1670. static void cnss_subsys_crash_shutdown(const struct subsys_desc *subsys_desc)
  1671. {
  1672. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1673. if (!plat_priv) {
  1674. cnss_pr_err("plat_priv is NULL\n");
  1675. return;
  1676. }
  1677. cnss_bus_dev_crash_shutdown(plat_priv);
  1678. }
  1679. static int cnss_subsys_ramdump(int enable,
  1680. const struct subsys_desc *subsys_desc)
  1681. {
  1682. struct cnss_plat_data *plat_priv = dev_get_drvdata(subsys_desc->dev);
  1683. if (!plat_priv) {
  1684. cnss_pr_err("plat_priv is NULL\n");
  1685. return -ENODEV;
  1686. }
  1687. if (!enable)
  1688. return 0;
  1689. return cnss_bus_dev_ramdump(plat_priv);
  1690. }
  1691. static void cnss_recovery_work_handler(struct work_struct *work)
  1692. {
  1693. }
  1694. #else
  1695. void cnss_recovery_handler(struct cnss_plat_data *plat_priv)
  1696. {
  1697. int ret;
  1698. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1699. if (!plat_priv->recovery_enabled)
  1700. panic("subsys-restart: Resetting the SoC wlan crashed\n");
  1701. cnss_bus_dev_shutdown(plat_priv);
  1702. cnss_bus_dev_ramdump(plat_priv);
  1703. /* If recovery is triggered before Host driver registration,
  1704. * avoid device power up because eventually device will be
  1705. * power up as part of driver registration.
  1706. */
  1707. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1708. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1709. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1710. plat_priv->driver_state);
  1711. return;
  1712. }
  1713. msleep(POWER_RESET_MIN_DELAY_MS);
  1714. ret = cnss_bus_dev_powerup(plat_priv);
  1715. if (ret) {
  1716. __pm_relax(plat_priv->recovery_ws);
  1717. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1718. }
  1719. return;
  1720. }
  1721. static void cnss_recovery_work_handler(struct work_struct *work)
  1722. {
  1723. struct cnss_plat_data *plat_priv =
  1724. container_of(work, struct cnss_plat_data, recovery_work);
  1725. cnss_recovery_handler(plat_priv);
  1726. }
  1727. void cnss_device_crashed(struct device *dev)
  1728. {
  1729. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1730. if (!plat_priv)
  1731. return;
  1732. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1733. schedule_work(&plat_priv->recovery_work);
  1734. }
  1735. EXPORT_SYMBOL(cnss_device_crashed);
  1736. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  1737. void *cnss_get_virt_ramdump_mem(struct device *dev, unsigned long *size)
  1738. {
  1739. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1740. struct cnss_ramdump_info *ramdump_info;
  1741. if (!plat_priv)
  1742. return NULL;
  1743. ramdump_info = &plat_priv->ramdump_info;
  1744. *size = ramdump_info->ramdump_size;
  1745. return ramdump_info->ramdump_va;
  1746. }
  1747. EXPORT_SYMBOL(cnss_get_virt_ramdump_mem);
  1748. static const char *cnss_recovery_reason_to_str(enum cnss_recovery_reason reason)
  1749. {
  1750. switch (reason) {
  1751. case CNSS_REASON_DEFAULT:
  1752. return "DEFAULT";
  1753. case CNSS_REASON_LINK_DOWN:
  1754. return "LINK_DOWN";
  1755. case CNSS_REASON_RDDM:
  1756. return "RDDM";
  1757. case CNSS_REASON_TIMEOUT:
  1758. return "TIMEOUT";
  1759. }
  1760. return "UNKNOWN";
  1761. };
  1762. static int cnss_do_recovery(struct cnss_plat_data *plat_priv,
  1763. enum cnss_recovery_reason reason)
  1764. {
  1765. int ret;
  1766. plat_priv->recovery_count++;
  1767. if (plat_priv->device_id == QCA6174_DEVICE_ID)
  1768. goto self_recovery;
  1769. if (test_bit(SKIP_RECOVERY, &plat_priv->ctrl_params.quirks)) {
  1770. cnss_pr_dbg("Skip device recovery\n");
  1771. return 0;
  1772. }
  1773. /* FW recovery sequence has multiple steps and firmware load requires
  1774. * linux PM in awake state. Thus hold the cnss wake source until
  1775. * WLAN MISSION enabled. CNSS_TIMEOUT_RECOVERY option should cover all
  1776. * time taken in this process.
  1777. */
  1778. pm_wakeup_ws_event(plat_priv->recovery_ws,
  1779. cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RECOVERY),
  1780. true);
  1781. switch (reason) {
  1782. case CNSS_REASON_LINK_DOWN:
  1783. if (!cnss_bus_check_link_status(plat_priv)) {
  1784. cnss_pr_dbg("Skip link down recovery as link is already up\n");
  1785. return 0;
  1786. }
  1787. if (test_bit(LINK_DOWN_SELF_RECOVERY,
  1788. &plat_priv->ctrl_params.quirks))
  1789. goto self_recovery;
  1790. if (!cnss_bus_recover_link_down(plat_priv)) {
  1791. /* clear recovery bit here to avoid skipping
  1792. * the recovery work for RDDM later
  1793. */
  1794. clear_bit(CNSS_DRIVER_RECOVERY,
  1795. &plat_priv->driver_state);
  1796. return 0;
  1797. }
  1798. break;
  1799. case CNSS_REASON_RDDM:
  1800. cnss_bus_collect_dump_info(plat_priv, false);
  1801. break;
  1802. case CNSS_REASON_DEFAULT:
  1803. case CNSS_REASON_TIMEOUT:
  1804. break;
  1805. default:
  1806. cnss_pr_err("Unsupported recovery reason: %s(%d)\n",
  1807. cnss_recovery_reason_to_str(reason), reason);
  1808. break;
  1809. }
  1810. cnss_bus_device_crashed(plat_priv);
  1811. return 0;
  1812. self_recovery:
  1813. cnss_pr_dbg("Going for self recovery\n");
  1814. cnss_bus_dev_shutdown(plat_priv);
  1815. if (test_bit(LINK_DOWN_SELF_RECOVERY, &plat_priv->ctrl_params.quirks))
  1816. clear_bit(LINK_DOWN_SELF_RECOVERY,
  1817. &plat_priv->ctrl_params.quirks);
  1818. /* If link down self recovery is triggered before Host driver
  1819. * registration, avoid device power up because eventually device
  1820. * will be power up as part of driver registration.
  1821. */
  1822. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state) ||
  1823. !test_bit(CNSS_DRIVER_REGISTERED, &plat_priv->driver_state)) {
  1824. cnss_pr_dbg("Host driver not registered yet, ignore Device Power Up, 0x%lx\n",
  1825. plat_priv->driver_state);
  1826. return 0;
  1827. }
  1828. ret = cnss_bus_dev_powerup(plat_priv);
  1829. if (ret)
  1830. clear_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1831. return 0;
  1832. }
  1833. static int cnss_driver_recovery_hdlr(struct cnss_plat_data *plat_priv,
  1834. void *data)
  1835. {
  1836. struct cnss_recovery_data *recovery_data = data;
  1837. int ret = 0;
  1838. cnss_pr_dbg("Driver recovery is triggered with reason: %s(%d)\n",
  1839. cnss_recovery_reason_to_str(recovery_data->reason),
  1840. recovery_data->reason);
  1841. if (!plat_priv->driver_state) {
  1842. cnss_pr_err("Improper driver state, ignore recovery\n");
  1843. ret = -EINVAL;
  1844. goto out;
  1845. }
  1846. if (test_bit(CNSS_IN_REBOOT, &plat_priv->driver_state)) {
  1847. cnss_pr_err("Reboot is in progress, ignore recovery\n");
  1848. ret = -EINVAL;
  1849. goto out;
  1850. }
  1851. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1852. cnss_pr_err("Recovery is already in progress\n");
  1853. CNSS_ASSERT(0);
  1854. ret = -EINVAL;
  1855. goto out;
  1856. }
  1857. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1858. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1859. cnss_pr_err("Driver unload or idle shutdown is in progress, ignore recovery\n");
  1860. ret = -EINVAL;
  1861. goto out;
  1862. }
  1863. switch (plat_priv->device_id) {
  1864. case QCA6174_DEVICE_ID:
  1865. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1866. test_bit(CNSS_DRIVER_IDLE_RESTART,
  1867. &plat_priv->driver_state)) {
  1868. cnss_pr_err("Driver load or idle restart is in progress, ignore recovery\n");
  1869. ret = -EINVAL;
  1870. goto out;
  1871. }
  1872. break;
  1873. default:
  1874. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  1875. set_bit(CNSS_FW_BOOT_RECOVERY,
  1876. &plat_priv->driver_state);
  1877. }
  1878. break;
  1879. }
  1880. set_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state);
  1881. ret = cnss_do_recovery(plat_priv, recovery_data->reason);
  1882. out:
  1883. kfree(data);
  1884. return ret;
  1885. }
  1886. int cnss_self_recovery(struct device *dev,
  1887. enum cnss_recovery_reason reason)
  1888. {
  1889. cnss_schedule_recovery(dev, reason);
  1890. return 0;
  1891. }
  1892. EXPORT_SYMBOL(cnss_self_recovery);
  1893. void cnss_schedule_recovery(struct device *dev,
  1894. enum cnss_recovery_reason reason)
  1895. {
  1896. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1897. struct cnss_recovery_data *data;
  1898. int gfp = GFP_KERNEL;
  1899. if (!test_bit(CNSS_DEV_ERR_NOTIFY, &plat_priv->driver_state))
  1900. cnss_bus_update_status(plat_priv, CNSS_FW_DOWN);
  1901. if (test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1902. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1903. cnss_pr_dbg("Driver unload or idle shutdown is in progress, ignore schedule recovery\n");
  1904. return;
  1905. }
  1906. if (in_interrupt() || irqs_disabled())
  1907. gfp = GFP_ATOMIC;
  1908. data = kzalloc(sizeof(*data), gfp);
  1909. if (!data)
  1910. return;
  1911. data->reason = reason;
  1912. cnss_driver_event_post(plat_priv,
  1913. CNSS_DRIVER_EVENT_RECOVERY,
  1914. 0, data);
  1915. }
  1916. EXPORT_SYMBOL(cnss_schedule_recovery);
  1917. int cnss_force_fw_assert(struct device *dev)
  1918. {
  1919. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1920. if (!plat_priv) {
  1921. cnss_pr_err("plat_priv is NULL\n");
  1922. return -ENODEV;
  1923. }
  1924. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1925. cnss_pr_info("Forced FW assert is not supported\n");
  1926. return -EOPNOTSUPP;
  1927. }
  1928. if (cnss_bus_is_device_down(plat_priv)) {
  1929. cnss_pr_info("Device is already in bad state, ignore force assert\n");
  1930. return 0;
  1931. }
  1932. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1933. cnss_pr_info("Recovery is already in progress, ignore forced FW assert\n");
  1934. return 0;
  1935. }
  1936. if (in_interrupt() || irqs_disabled())
  1937. cnss_driver_event_post(plat_priv,
  1938. CNSS_DRIVER_EVENT_FORCE_FW_ASSERT,
  1939. 0, NULL);
  1940. else
  1941. cnss_bus_force_fw_assert_hdlr(plat_priv);
  1942. return 0;
  1943. }
  1944. EXPORT_SYMBOL(cnss_force_fw_assert);
  1945. int cnss_force_collect_rddm(struct device *dev)
  1946. {
  1947. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1948. unsigned int timeout;
  1949. int ret = 0;
  1950. if (!plat_priv) {
  1951. cnss_pr_err("plat_priv is NULL\n");
  1952. return -ENODEV;
  1953. }
  1954. if (plat_priv->device_id == QCA6174_DEVICE_ID) {
  1955. cnss_pr_info("Force collect rddm is not supported\n");
  1956. return -EOPNOTSUPP;
  1957. }
  1958. if (cnss_bus_is_device_down(plat_priv)) {
  1959. cnss_pr_info("Device is already in bad state, wait to collect rddm\n");
  1960. goto wait_rddm;
  1961. }
  1962. if (test_bit(CNSS_DRIVER_RECOVERY, &plat_priv->driver_state)) {
  1963. cnss_pr_info("Recovery is already in progress, wait to collect rddm\n");
  1964. goto wait_rddm;
  1965. }
  1966. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  1967. test_bit(CNSS_DRIVER_UNLOADING, &plat_priv->driver_state) ||
  1968. test_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state) ||
  1969. test_bit(CNSS_DRIVER_IDLE_SHUTDOWN, &plat_priv->driver_state)) {
  1970. cnss_pr_info("Loading/Unloading/idle restart/shutdown is in progress, ignore forced collect rddm\n");
  1971. return 0;
  1972. }
  1973. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  1974. if (ret)
  1975. return ret;
  1976. wait_rddm:
  1977. reinit_completion(&plat_priv->rddm_complete);
  1978. timeout = cnss_get_timeout(plat_priv, CNSS_TIMEOUT_RDDM);
  1979. ret = wait_for_completion_timeout(&plat_priv->rddm_complete,
  1980. msecs_to_jiffies(timeout));
  1981. if (!ret) {
  1982. cnss_pr_err("Timeout (%ums) waiting for RDDM to complete\n",
  1983. timeout);
  1984. ret = -ETIMEDOUT;
  1985. } else if (ret > 0) {
  1986. ret = 0;
  1987. }
  1988. return ret;
  1989. }
  1990. EXPORT_SYMBOL(cnss_force_collect_rddm);
  1991. int cnss_qmi_send_get(struct device *dev)
  1992. {
  1993. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  1994. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  1995. return 0;
  1996. return cnss_bus_qmi_send_get(plat_priv);
  1997. }
  1998. EXPORT_SYMBOL(cnss_qmi_send_get);
  1999. int cnss_qmi_send_put(struct device *dev)
  2000. {
  2001. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  2002. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  2003. return 0;
  2004. return cnss_bus_qmi_send_put(plat_priv);
  2005. }
  2006. EXPORT_SYMBOL(cnss_qmi_send_put);
  2007. int cnss_qmi_send(struct device *dev, int type, void *cmd,
  2008. int cmd_len, void *cb_ctx,
  2009. int (*cb)(void *ctx, void *event, int event_len))
  2010. {
  2011. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  2012. int ret;
  2013. if (!plat_priv)
  2014. return -ENODEV;
  2015. if (!test_bit(CNSS_QMI_WLFW_CONNECTED, &plat_priv->driver_state))
  2016. return -EINVAL;
  2017. plat_priv->get_info_cb = cb;
  2018. plat_priv->get_info_cb_ctx = cb_ctx;
  2019. ret = cnss_wlfw_get_info_send_sync(plat_priv, type, cmd, cmd_len);
  2020. if (ret) {
  2021. plat_priv->get_info_cb = NULL;
  2022. plat_priv->get_info_cb_ctx = NULL;
  2023. }
  2024. return ret;
  2025. }
  2026. EXPORT_SYMBOL(cnss_qmi_send);
  2027. static int cnss_cold_boot_cal_start_hdlr(struct cnss_plat_data *plat_priv)
  2028. {
  2029. int ret = 0;
  2030. u32 retry = 0, timeout;
  2031. if (test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state)) {
  2032. cnss_pr_dbg("Calibration complete. Ignore calibration req\n");
  2033. goto out;
  2034. } else if (test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state)) {
  2035. cnss_pr_dbg("Calibration in progress. Ignore new calibration req\n");
  2036. goto out;
  2037. } else if (test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  2038. cnss_pr_dbg("Calibration deferred as WLAN device disabled\n");
  2039. goto out;
  2040. }
  2041. if (test_bit(CNSS_DRIVER_LOADING, &plat_priv->driver_state) ||
  2042. test_bit(CNSS_DRIVER_PROBED, &plat_priv->driver_state) ||
  2043. test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  2044. cnss_pr_err("WLAN in mission mode before cold boot calibration\n");
  2045. CNSS_ASSERT(0);
  2046. return -EINVAL;
  2047. }
  2048. while (retry++ < CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  2049. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  2050. break;
  2051. msleep(CNSS_CAL_START_PROBE_WAIT_MS);
  2052. if (retry == CNSS_CAL_START_PROBE_WAIT_RETRY_MAX) {
  2053. cnss_pr_err("Calibration start failed as PCI probe not complete\n");
  2054. CNSS_ASSERT(0);
  2055. ret = -EINVAL;
  2056. goto mark_cal_fail;
  2057. }
  2058. }
  2059. switch (plat_priv->device_id) {
  2060. case QCA6290_DEVICE_ID:
  2061. case QCA6390_DEVICE_ID:
  2062. case QCA6490_DEVICE_ID:
  2063. case KIWI_DEVICE_ID:
  2064. case MANGO_DEVICE_ID:
  2065. case PEACH_DEVICE_ID:
  2066. break;
  2067. default:
  2068. cnss_pr_err("Not supported for device ID 0x%lx\n",
  2069. plat_priv->device_id);
  2070. ret = -EINVAL;
  2071. goto mark_cal_fail;
  2072. }
  2073. set_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2074. if (test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state)) {
  2075. timeout = cnss_get_timeout(plat_priv,
  2076. CNSS_TIMEOUT_CALIBRATION);
  2077. cnss_pr_dbg("Restarting calibration %ds timeout\n",
  2078. timeout / 1000);
  2079. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2080. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2081. msecs_to_jiffies(timeout));
  2082. }
  2083. reinit_completion(&plat_priv->cal_complete);
  2084. ret = cnss_bus_dev_powerup(plat_priv);
  2085. mark_cal_fail:
  2086. if (ret) {
  2087. complete(&plat_priv->cal_complete);
  2088. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2089. /* Set CBC done in driver state to mark attempt and note error
  2090. * since calibration cannot be retried at boot.
  2091. */
  2092. plat_priv->cal_done = CNSS_CAL_FAILURE;
  2093. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2094. if (plat_priv->device_id == QCA6174_DEVICE_ID ||
  2095. plat_priv->device_id == QCN7605_DEVICE_ID) {
  2096. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2097. goto out;
  2098. cnss_pr_info("Schedule WLAN driver load\n");
  2099. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2100. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2101. 0);
  2102. }
  2103. }
  2104. out:
  2105. return ret;
  2106. }
  2107. static int cnss_cold_boot_cal_done_hdlr(struct cnss_plat_data *plat_priv,
  2108. void *data)
  2109. {
  2110. struct cnss_cal_info *cal_info = data;
  2111. if (!test_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state) ||
  2112. test_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state))
  2113. goto out;
  2114. switch (cal_info->cal_status) {
  2115. case CNSS_CAL_DONE:
  2116. cnss_pr_dbg("Calibration completed successfully\n");
  2117. plat_priv->cal_done = true;
  2118. break;
  2119. case CNSS_CAL_TIMEOUT:
  2120. case CNSS_CAL_FAILURE:
  2121. cnss_pr_dbg("Calibration failed. Status: %d, force shutdown\n",
  2122. cal_info->cal_status);
  2123. break;
  2124. default:
  2125. cnss_pr_err("Unknown calibration status: %u\n",
  2126. cal_info->cal_status);
  2127. break;
  2128. }
  2129. cnss_wlfw_wlan_mode_send_sync(plat_priv, CNSS_OFF);
  2130. cnss_bus_free_qdss_mem(plat_priv);
  2131. cnss_release_antenna_sharing(plat_priv);
  2132. if (plat_priv->device_id == QCN7605_DEVICE_ID)
  2133. goto skip_shutdown;
  2134. cnss_bus_dev_shutdown(plat_priv);
  2135. msleep(POWER_RESET_MIN_DELAY_MS);
  2136. skip_shutdown:
  2137. complete(&plat_priv->cal_complete);
  2138. clear_bit(CNSS_IN_COLD_BOOT_CAL, &plat_priv->driver_state);
  2139. set_bit(CNSS_COLD_BOOT_CAL_DONE, &plat_priv->driver_state);
  2140. if (cal_info->cal_status == CNSS_CAL_DONE) {
  2141. cnss_cal_mem_upload_to_file(plat_priv);
  2142. if (!test_bit(CNSS_DRIVER_REGISTER, &plat_priv->driver_state))
  2143. goto out;
  2144. cnss_pr_dbg("Schedule WLAN driver load\n");
  2145. if (cancel_delayed_work_sync(&plat_priv->wlan_reg_driver_work))
  2146. schedule_delayed_work(&plat_priv->wlan_reg_driver_work,
  2147. 0);
  2148. }
  2149. out:
  2150. kfree(data);
  2151. return 0;
  2152. }
  2153. static int cnss_power_up_hdlr(struct cnss_plat_data *plat_priv)
  2154. {
  2155. int ret;
  2156. ret = cnss_bus_dev_powerup(plat_priv);
  2157. if (ret)
  2158. clear_bit(CNSS_DRIVER_IDLE_RESTART, &plat_priv->driver_state);
  2159. return ret;
  2160. }
  2161. static int cnss_power_down_hdlr(struct cnss_plat_data *plat_priv)
  2162. {
  2163. cnss_bus_dev_shutdown(plat_priv);
  2164. return 0;
  2165. }
  2166. static int cnss_qdss_trace_req_mem_hdlr(struct cnss_plat_data *plat_priv)
  2167. {
  2168. int ret = 0;
  2169. ret = cnss_bus_alloc_qdss_mem(plat_priv);
  2170. if (ret < 0)
  2171. return ret;
  2172. return cnss_wlfw_qdss_trace_mem_info_send_sync(plat_priv);
  2173. }
  2174. static void *cnss_get_fw_mem_pa_to_va(struct cnss_fw_mem *fw_mem,
  2175. u32 mem_seg_len, u64 pa, u32 size)
  2176. {
  2177. int i = 0;
  2178. u64 offset = 0;
  2179. void *va = NULL;
  2180. u64 local_pa;
  2181. u32 local_size;
  2182. for (i = 0; i < mem_seg_len; i++) {
  2183. if (i == QMI_WLFW_MEM_LPASS_SHARED_V01)
  2184. continue;
  2185. local_pa = (u64)fw_mem[i].pa;
  2186. local_size = (u32)fw_mem[i].size;
  2187. if (pa == local_pa && size <= local_size) {
  2188. va = fw_mem[i].va;
  2189. break;
  2190. }
  2191. if (pa > local_pa &&
  2192. pa < local_pa + local_size &&
  2193. pa + size <= local_pa + local_size) {
  2194. offset = pa - local_pa;
  2195. va = fw_mem[i].va + offset;
  2196. break;
  2197. }
  2198. }
  2199. return va;
  2200. }
  2201. static int cnss_fw_mem_file_save_hdlr(struct cnss_plat_data *plat_priv,
  2202. void *data)
  2203. {
  2204. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2205. struct cnss_fw_mem *fw_mem_seg;
  2206. int ret = 0L;
  2207. void *va = NULL;
  2208. u32 i, fw_mem_seg_len;
  2209. switch (event_data->mem_type) {
  2210. case QMI_WLFW_MEM_TYPE_DDR_V01:
  2211. if (!plat_priv->fw_mem_seg_len)
  2212. goto invalid_mem_save;
  2213. fw_mem_seg = plat_priv->fw_mem;
  2214. fw_mem_seg_len = plat_priv->fw_mem_seg_len;
  2215. break;
  2216. case QMI_WLFW_MEM_QDSS_V01:
  2217. if (!plat_priv->qdss_mem_seg_len)
  2218. goto invalid_mem_save;
  2219. fw_mem_seg = plat_priv->qdss_mem;
  2220. fw_mem_seg_len = plat_priv->qdss_mem_seg_len;
  2221. break;
  2222. default:
  2223. goto invalid_mem_save;
  2224. }
  2225. for (i = 0; i < event_data->mem_seg_len; i++) {
  2226. va = cnss_get_fw_mem_pa_to_va(fw_mem_seg, fw_mem_seg_len,
  2227. event_data->mem_seg[i].addr,
  2228. event_data->mem_seg[i].size);
  2229. if (!va) {
  2230. cnss_pr_err("Fail to find matching va of pa %pa for mem type: %d\n",
  2231. &event_data->mem_seg[i].addr,
  2232. event_data->mem_type);
  2233. ret = -EINVAL;
  2234. break;
  2235. }
  2236. ret = cnss_genl_send_msg(va, CNSS_GENL_MSG_TYPE_QDSS,
  2237. event_data->file_name,
  2238. event_data->mem_seg[i].size);
  2239. if (ret < 0) {
  2240. cnss_pr_err("Fail to save fw mem data: %d\n",
  2241. ret);
  2242. break;
  2243. }
  2244. }
  2245. kfree(data);
  2246. return ret;
  2247. invalid_mem_save:
  2248. cnss_pr_err("FW Mem type %d not allocated. Invalid save request\n",
  2249. event_data->mem_type);
  2250. kfree(data);
  2251. return -EINVAL;
  2252. }
  2253. static int cnss_qdss_trace_free_hdlr(struct cnss_plat_data *plat_priv)
  2254. {
  2255. cnss_bus_free_qdss_mem(plat_priv);
  2256. return 0;
  2257. }
  2258. static int cnss_qdss_trace_req_data_hdlr(struct cnss_plat_data *plat_priv,
  2259. void *data)
  2260. {
  2261. int ret = 0;
  2262. struct cnss_qmi_event_fw_mem_file_save_data *event_data = data;
  2263. if (!plat_priv)
  2264. return -ENODEV;
  2265. ret = cnss_wlfw_qdss_data_send_sync(plat_priv, event_data->file_name,
  2266. event_data->total_size);
  2267. kfree(data);
  2268. return ret;
  2269. }
  2270. static void cnss_driver_event_work(struct work_struct *work)
  2271. {
  2272. struct cnss_plat_data *plat_priv =
  2273. container_of(work, struct cnss_plat_data, event_work);
  2274. struct cnss_driver_event *event;
  2275. unsigned long flags;
  2276. int ret = 0;
  2277. if (!plat_priv) {
  2278. cnss_pr_err("plat_priv is NULL!\n");
  2279. return;
  2280. }
  2281. cnss_pm_stay_awake(plat_priv);
  2282. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2283. while (!list_empty(&plat_priv->event_list)) {
  2284. event = list_first_entry(&plat_priv->event_list,
  2285. struct cnss_driver_event, list);
  2286. list_del(&event->list);
  2287. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2288. cnss_pr_dbg("Processing driver event: %s%s(%d), state: 0x%lx\n",
  2289. cnss_driver_event_to_str(event->type),
  2290. event->sync ? "-sync" : "", event->type,
  2291. plat_priv->driver_state);
  2292. switch (event->type) {
  2293. case CNSS_DRIVER_EVENT_SERVER_ARRIVE:
  2294. ret = cnss_wlfw_server_arrive(plat_priv, event->data);
  2295. break;
  2296. case CNSS_DRIVER_EVENT_SERVER_EXIT:
  2297. ret = cnss_wlfw_server_exit(plat_priv);
  2298. break;
  2299. case CNSS_DRIVER_EVENT_REQUEST_MEM:
  2300. ret = cnss_bus_alloc_fw_mem(plat_priv);
  2301. if (ret)
  2302. break;
  2303. ret = cnss_wlfw_respond_mem_send_sync(plat_priv);
  2304. break;
  2305. case CNSS_DRIVER_EVENT_FW_MEM_READY:
  2306. ret = cnss_fw_mem_ready_hdlr(plat_priv);
  2307. break;
  2308. case CNSS_DRIVER_EVENT_FW_READY:
  2309. ret = cnss_fw_ready_hdlr(plat_priv);
  2310. break;
  2311. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START:
  2312. ret = cnss_cold_boot_cal_start_hdlr(plat_priv);
  2313. break;
  2314. case CNSS_DRIVER_EVENT_COLD_BOOT_CAL_DONE:
  2315. ret = cnss_cold_boot_cal_done_hdlr(plat_priv,
  2316. event->data);
  2317. break;
  2318. case CNSS_DRIVER_EVENT_REGISTER_DRIVER:
  2319. ret = cnss_bus_register_driver_hdlr(plat_priv,
  2320. event->data);
  2321. break;
  2322. case CNSS_DRIVER_EVENT_UNREGISTER_DRIVER:
  2323. ret = cnss_bus_unregister_driver_hdlr(plat_priv);
  2324. break;
  2325. case CNSS_DRIVER_EVENT_RECOVERY:
  2326. ret = cnss_driver_recovery_hdlr(plat_priv,
  2327. event->data);
  2328. break;
  2329. case CNSS_DRIVER_EVENT_FORCE_FW_ASSERT:
  2330. ret = cnss_bus_force_fw_assert_hdlr(plat_priv);
  2331. break;
  2332. case CNSS_DRIVER_EVENT_IDLE_RESTART:
  2333. set_bit(CNSS_DRIVER_IDLE_RESTART,
  2334. &plat_priv->driver_state);
  2335. fallthrough;
  2336. case CNSS_DRIVER_EVENT_POWER_UP:
  2337. ret = cnss_power_up_hdlr(plat_priv);
  2338. break;
  2339. case CNSS_DRIVER_EVENT_IDLE_SHUTDOWN:
  2340. set_bit(CNSS_DRIVER_IDLE_SHUTDOWN,
  2341. &plat_priv->driver_state);
  2342. fallthrough;
  2343. case CNSS_DRIVER_EVENT_POWER_DOWN:
  2344. ret = cnss_power_down_hdlr(plat_priv);
  2345. break;
  2346. case CNSS_DRIVER_EVENT_IMS_WFC_CALL_IND:
  2347. ret = cnss_process_wfc_call_ind_event(plat_priv,
  2348. event->data);
  2349. break;
  2350. case CNSS_DRIVER_EVENT_WLFW_TWT_CFG_IND:
  2351. ret = cnss_process_twt_cfg_ind_event(plat_priv,
  2352. event->data);
  2353. break;
  2354. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_MEM:
  2355. ret = cnss_qdss_trace_req_mem_hdlr(plat_priv);
  2356. break;
  2357. case CNSS_DRIVER_EVENT_FW_MEM_FILE_SAVE:
  2358. ret = cnss_fw_mem_file_save_hdlr(plat_priv,
  2359. event->data);
  2360. break;
  2361. case CNSS_DRIVER_EVENT_QDSS_TRACE_FREE:
  2362. ret = cnss_qdss_trace_free_hdlr(plat_priv);
  2363. break;
  2364. case CNSS_DRIVER_EVENT_QDSS_TRACE_REQ_DATA:
  2365. ret = cnss_qdss_trace_req_data_hdlr(plat_priv,
  2366. event->data);
  2367. break;
  2368. default:
  2369. cnss_pr_err("Invalid driver event type: %d",
  2370. event->type);
  2371. kfree(event);
  2372. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2373. continue;
  2374. }
  2375. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2376. if (event->sync) {
  2377. event->ret = ret;
  2378. complete(&event->complete);
  2379. continue;
  2380. }
  2381. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2382. kfree(event);
  2383. spin_lock_irqsave(&plat_priv->event_lock, flags);
  2384. }
  2385. spin_unlock_irqrestore(&plat_priv->event_lock, flags);
  2386. cnss_pm_relax(plat_priv);
  2387. }
  2388. #if IS_ENABLED(CONFIG_MSM_SUBSYSTEM_RESTART)
  2389. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2390. {
  2391. int ret = 0;
  2392. struct cnss_subsys_info *subsys_info;
  2393. subsys_info = &plat_priv->subsys_info;
  2394. subsys_info->subsys_desc.name = plat_priv->device_name;
  2395. subsys_info->subsys_desc.owner = THIS_MODULE;
  2396. subsys_info->subsys_desc.powerup = cnss_subsys_powerup;
  2397. subsys_info->subsys_desc.shutdown = cnss_subsys_shutdown;
  2398. subsys_info->subsys_desc.ramdump = cnss_subsys_ramdump;
  2399. subsys_info->subsys_desc.crash_shutdown = cnss_subsys_crash_shutdown;
  2400. subsys_info->subsys_desc.dev = &plat_priv->plat_dev->dev;
  2401. subsys_info->subsys_device = subsys_register(&subsys_info->subsys_desc);
  2402. if (IS_ERR(subsys_info->subsys_device)) {
  2403. ret = PTR_ERR(subsys_info->subsys_device);
  2404. cnss_pr_err("Failed to register subsys, err = %d\n", ret);
  2405. goto out;
  2406. }
  2407. subsys_info->subsys_handle =
  2408. subsystem_get(subsys_info->subsys_desc.name);
  2409. if (!subsys_info->subsys_handle) {
  2410. cnss_pr_err("Failed to get subsys_handle!\n");
  2411. ret = -EINVAL;
  2412. goto unregister_subsys;
  2413. } else if (IS_ERR(subsys_info->subsys_handle)) {
  2414. ret = PTR_ERR(subsys_info->subsys_handle);
  2415. cnss_pr_err("Failed to do subsystem_get, err = %d\n", ret);
  2416. goto unregister_subsys;
  2417. }
  2418. return 0;
  2419. unregister_subsys:
  2420. subsys_unregister(subsys_info->subsys_device);
  2421. out:
  2422. return ret;
  2423. }
  2424. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2425. {
  2426. struct cnss_subsys_info *subsys_info;
  2427. subsys_info = &plat_priv->subsys_info;
  2428. subsystem_put(subsys_info->subsys_handle);
  2429. subsys_unregister(subsys_info->subsys_device);
  2430. }
  2431. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2432. {
  2433. struct cnss_subsys_info *subsys_info = &plat_priv->subsys_info;
  2434. return create_ramdump_device(subsys_info->subsys_desc.name,
  2435. subsys_info->subsys_desc.dev);
  2436. }
  2437. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2438. void *ramdump_dev)
  2439. {
  2440. destroy_ramdump_device(ramdump_dev);
  2441. }
  2442. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2443. {
  2444. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2445. struct ramdump_segment segment;
  2446. memset(&segment, 0, sizeof(segment));
  2447. segment.v_address = (void __iomem *)ramdump_info->ramdump_va;
  2448. segment.size = ramdump_info->ramdump_size;
  2449. return qcom_ramdump(ramdump_info->ramdump_dev, &segment, 1);
  2450. }
  2451. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2452. {
  2453. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2454. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2455. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2456. struct ramdump_segment *ramdump_segs, *s;
  2457. struct cnss_dump_meta_info meta_info = {0};
  2458. int i, ret = 0;
  2459. ramdump_segs = kcalloc(dump_data->nentries + 1,
  2460. sizeof(*ramdump_segs),
  2461. GFP_KERNEL);
  2462. if (!ramdump_segs)
  2463. return -ENOMEM;
  2464. s = ramdump_segs + 1;
  2465. for (i = 0; i < dump_data->nentries; i++) {
  2466. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2467. cnss_pr_err("Unsupported dump type: %d",
  2468. dump_seg->type);
  2469. continue;
  2470. }
  2471. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2472. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2473. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2474. }
  2475. meta_info.entry[dump_seg->type].entry_num++;
  2476. s->address = dump_seg->address;
  2477. s->v_address = (void __iomem *)dump_seg->v_address;
  2478. s->size = dump_seg->size;
  2479. s++;
  2480. dump_seg++;
  2481. }
  2482. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2483. meta_info.version = CNSS_RAMDUMP_VERSION;
  2484. meta_info.chipset = plat_priv->device_id;
  2485. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2486. ramdump_segs->v_address = (void __iomem *)(&meta_info);
  2487. ramdump_segs->size = sizeof(meta_info);
  2488. ret = qcom_elf_ramdump(info_v2->ramdump_dev, ramdump_segs,
  2489. dump_data->nentries + 1);
  2490. kfree(ramdump_segs);
  2491. return ret;
  2492. }
  2493. #else
  2494. static int cnss_panic_handler(struct notifier_block *nb, unsigned long action,
  2495. void *data)
  2496. {
  2497. struct cnss_plat_data *plat_priv =
  2498. container_of(nb, struct cnss_plat_data, panic_nb);
  2499. cnss_bus_dev_crash_shutdown(plat_priv);
  2500. return NOTIFY_DONE;
  2501. }
  2502. int cnss_register_subsys(struct cnss_plat_data *plat_priv)
  2503. {
  2504. int ret;
  2505. if (!plat_priv)
  2506. return -ENODEV;
  2507. plat_priv->panic_nb.notifier_call = cnss_panic_handler;
  2508. ret = atomic_notifier_chain_register(&panic_notifier_list,
  2509. &plat_priv->panic_nb);
  2510. if (ret) {
  2511. cnss_pr_err("Failed to register panic handler\n");
  2512. return -EINVAL;
  2513. }
  2514. return 0;
  2515. }
  2516. void cnss_unregister_subsys(struct cnss_plat_data *plat_priv)
  2517. {
  2518. int ret;
  2519. ret = atomic_notifier_chain_unregister(&panic_notifier_list,
  2520. &plat_priv->panic_nb);
  2521. if (ret)
  2522. cnss_pr_err("Failed to unregister panic handler\n");
  2523. }
  2524. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2525. static void *cnss_create_ramdump_device(struct cnss_plat_data *plat_priv)
  2526. {
  2527. return &plat_priv->plat_dev->dev;
  2528. }
  2529. static void cnss_destroy_ramdump_device(struct cnss_plat_data *plat_priv,
  2530. void *ramdump_dev)
  2531. {
  2532. }
  2533. #endif
  2534. #if IS_ENABLED(CONFIG_QCOM_RAMDUMP)
  2535. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2536. {
  2537. struct cnss_ramdump_info *ramdump_info = &plat_priv->ramdump_info;
  2538. struct qcom_dump_segment segment;
  2539. struct list_head head;
  2540. INIT_LIST_HEAD(&head);
  2541. memset(&segment, 0, sizeof(segment));
  2542. segment.va = ramdump_info->ramdump_va;
  2543. segment.size = ramdump_info->ramdump_size;
  2544. list_add(&segment.node, &head);
  2545. return qcom_dump(&head, ramdump_info->ramdump_dev);
  2546. }
  2547. #else
  2548. int cnss_do_ramdump(struct cnss_plat_data *plat_priv)
  2549. {
  2550. return 0;
  2551. }
  2552. /* Using completion event inside dynamically allocated ramdump_desc
  2553. * may result a race between freeing the event after setting it to
  2554. * complete inside dev coredump free callback and the thread that is
  2555. * waiting for completion.
  2556. */
  2557. DECLARE_COMPLETION(dump_done);
  2558. #define TIMEOUT_SAVE_DUMP_MS 30000
  2559. #define SIZEOF_ELF_STRUCT(__xhdr) \
  2560. static inline size_t sizeof_elf_##__xhdr(unsigned char class) \
  2561. { \
  2562. if (class == ELFCLASS32) \
  2563. return sizeof(struct elf32_##__xhdr); \
  2564. else \
  2565. return sizeof(struct elf64_##__xhdr); \
  2566. }
  2567. SIZEOF_ELF_STRUCT(phdr)
  2568. SIZEOF_ELF_STRUCT(hdr)
  2569. #define set_xhdr_property(__xhdr, arg, class, member, value) \
  2570. do { \
  2571. if (class == ELFCLASS32) \
  2572. ((struct elf32_##__xhdr *)arg)->member = value; \
  2573. else \
  2574. ((struct elf64_##__xhdr *)arg)->member = value; \
  2575. } while (0)
  2576. #define set_ehdr_property(arg, class, member, value) \
  2577. set_xhdr_property(hdr, arg, class, member, value)
  2578. #define set_phdr_property(arg, class, member, value) \
  2579. set_xhdr_property(phdr, arg, class, member, value)
  2580. /* These replace qcom_ramdump driver APIs called from common API
  2581. * cnss_do_elf_dump() by the ones defined here.
  2582. */
  2583. #define qcom_dump_segment cnss_qcom_dump_segment
  2584. #define qcom_elf_dump cnss_qcom_elf_dump
  2585. #define dump_enabled cnss_dump_enabled
  2586. struct cnss_qcom_dump_segment {
  2587. struct list_head node;
  2588. dma_addr_t da;
  2589. void *va;
  2590. size_t size;
  2591. };
  2592. struct cnss_qcom_ramdump_desc {
  2593. void *data;
  2594. struct completion dump_done;
  2595. };
  2596. static ssize_t cnss_qcom_devcd_readv(char *buffer, loff_t offset, size_t count,
  2597. void *data, size_t datalen)
  2598. {
  2599. struct cnss_qcom_ramdump_desc *desc = data;
  2600. return memory_read_from_buffer(buffer, count, &offset, desc->data,
  2601. datalen);
  2602. }
  2603. static void cnss_qcom_devcd_freev(void *data)
  2604. {
  2605. struct cnss_qcom_ramdump_desc *desc = data;
  2606. cnss_pr_dbg("Free dump data for dev coredump\n");
  2607. complete(&dump_done);
  2608. vfree(desc->data);
  2609. kfree(desc);
  2610. }
  2611. static int cnss_qcom_devcd_dump(struct device *dev, void *data, size_t datalen,
  2612. gfp_t gfp)
  2613. {
  2614. struct cnss_qcom_ramdump_desc *desc;
  2615. unsigned int timeout = TIMEOUT_SAVE_DUMP_MS;
  2616. int ret;
  2617. desc = kmalloc(sizeof(*desc), GFP_KERNEL);
  2618. if (!desc)
  2619. return -ENOMEM;
  2620. desc->data = data;
  2621. reinit_completion(&dump_done);
  2622. dev_coredumpm(dev, NULL, desc, datalen, gfp,
  2623. cnss_qcom_devcd_readv, cnss_qcom_devcd_freev);
  2624. ret = wait_for_completion_timeout(&dump_done,
  2625. msecs_to_jiffies(timeout));
  2626. if (!ret)
  2627. cnss_pr_err("Timeout waiting (%dms) for saving dump to file system\n",
  2628. timeout);
  2629. return ret ? 0 : -ETIMEDOUT;
  2630. }
  2631. /* Since the elf32 and elf64 identification is identical apart from
  2632. * the class, use elf32 by default.
  2633. */
  2634. static void init_elf_identification(struct elf32_hdr *ehdr, unsigned char class)
  2635. {
  2636. memcpy(ehdr->e_ident, ELFMAG, SELFMAG);
  2637. ehdr->e_ident[EI_CLASS] = class;
  2638. ehdr->e_ident[EI_DATA] = ELFDATA2LSB;
  2639. ehdr->e_ident[EI_VERSION] = EV_CURRENT;
  2640. ehdr->e_ident[EI_OSABI] = ELFOSABI_NONE;
  2641. }
  2642. int cnss_qcom_elf_dump(struct list_head *segs, struct device *dev,
  2643. unsigned char class)
  2644. {
  2645. struct cnss_qcom_dump_segment *segment;
  2646. void *phdr, *ehdr;
  2647. size_t data_size, offset;
  2648. int phnum = 0;
  2649. void *data;
  2650. void __iomem *ptr;
  2651. if (!segs || list_empty(segs))
  2652. return -EINVAL;
  2653. data_size = sizeof_elf_hdr(class);
  2654. list_for_each_entry(segment, segs, node) {
  2655. data_size += sizeof_elf_phdr(class) + segment->size;
  2656. phnum++;
  2657. }
  2658. data = vmalloc(data_size);
  2659. if (!data)
  2660. return -ENOMEM;
  2661. cnss_pr_dbg("Creating ELF file with size %d\n", data_size);
  2662. ehdr = data;
  2663. memset(ehdr, 0, sizeof_elf_hdr(class));
  2664. init_elf_identification(ehdr, class);
  2665. set_ehdr_property(ehdr, class, e_type, ET_CORE);
  2666. set_ehdr_property(ehdr, class, e_machine, EM_NONE);
  2667. set_ehdr_property(ehdr, class, e_version, EV_CURRENT);
  2668. set_ehdr_property(ehdr, class, e_phoff, sizeof_elf_hdr(class));
  2669. set_ehdr_property(ehdr, class, e_ehsize, sizeof_elf_hdr(class));
  2670. set_ehdr_property(ehdr, class, e_phentsize, sizeof_elf_phdr(class));
  2671. set_ehdr_property(ehdr, class, e_phnum, phnum);
  2672. phdr = data + sizeof_elf_hdr(class);
  2673. offset = sizeof_elf_hdr(class) + sizeof_elf_phdr(class) * phnum;
  2674. list_for_each_entry(segment, segs, node) {
  2675. memset(phdr, 0, sizeof_elf_phdr(class));
  2676. set_phdr_property(phdr, class, p_type, PT_LOAD);
  2677. set_phdr_property(phdr, class, p_offset, offset);
  2678. set_phdr_property(phdr, class, p_vaddr, segment->da);
  2679. set_phdr_property(phdr, class, p_paddr, segment->da);
  2680. set_phdr_property(phdr, class, p_filesz, segment->size);
  2681. set_phdr_property(phdr, class, p_memsz, segment->size);
  2682. set_phdr_property(phdr, class, p_flags, PF_R | PF_W | PF_X);
  2683. set_phdr_property(phdr, class, p_align, 0);
  2684. if (segment->va) {
  2685. memcpy(data + offset, segment->va, segment->size);
  2686. } else {
  2687. ptr = devm_ioremap(dev, segment->da, segment->size);
  2688. if (!ptr) {
  2689. cnss_pr_err("Invalid coredump segment (%pad, %zu)\n",
  2690. &segment->da, segment->size);
  2691. memset(data + offset, 0xff, segment->size);
  2692. } else {
  2693. memcpy_fromio(data + offset, ptr,
  2694. segment->size);
  2695. }
  2696. }
  2697. offset += segment->size;
  2698. phdr += sizeof_elf_phdr(class);
  2699. }
  2700. return cnss_qcom_devcd_dump(dev, data, data_size, GFP_KERNEL);
  2701. }
  2702. /* Saving dump to file system is always needed in this case. */
  2703. static bool cnss_dump_enabled(void)
  2704. {
  2705. return true;
  2706. }
  2707. #endif /* CONFIG_QCOM_RAMDUMP */
  2708. int cnss_do_elf_ramdump(struct cnss_plat_data *plat_priv)
  2709. {
  2710. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  2711. struct cnss_dump_data *dump_data = &info_v2->dump_data;
  2712. struct cnss_dump_seg *dump_seg = info_v2->dump_data_vaddr;
  2713. struct qcom_dump_segment *seg;
  2714. struct cnss_dump_meta_info meta_info = {0};
  2715. struct list_head head;
  2716. int i, ret = 0;
  2717. if (!dump_enabled()) {
  2718. cnss_pr_info("Dump collection is not enabled\n");
  2719. return ret;
  2720. }
  2721. INIT_LIST_HEAD(&head);
  2722. for (i = 0; i < dump_data->nentries; i++) {
  2723. if (dump_seg->type >= CNSS_FW_DUMP_TYPE_MAX) {
  2724. cnss_pr_err("Unsupported dump type: %d",
  2725. dump_seg->type);
  2726. continue;
  2727. }
  2728. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2729. if (!seg) {
  2730. cnss_pr_err("%s: Failed to allocate mem for seg %d\n",
  2731. __func__, i);
  2732. continue;
  2733. }
  2734. if (meta_info.entry[dump_seg->type].entry_start == 0) {
  2735. meta_info.entry[dump_seg->type].type = dump_seg->type;
  2736. meta_info.entry[dump_seg->type].entry_start = i + 1;
  2737. }
  2738. meta_info.entry[dump_seg->type].entry_num++;
  2739. seg->da = dump_seg->address;
  2740. seg->va = dump_seg->v_address;
  2741. seg->size = dump_seg->size;
  2742. list_add_tail(&seg->node, &head);
  2743. dump_seg++;
  2744. }
  2745. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2746. if (!seg) {
  2747. cnss_pr_err("%s: Failed to allocate mem for elf ramdump seg\n",
  2748. __func__);
  2749. goto skip_elf_dump;
  2750. }
  2751. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2752. meta_info.version = CNSS_RAMDUMP_VERSION;
  2753. meta_info.chipset = plat_priv->device_id;
  2754. meta_info.total_entries = CNSS_FW_DUMP_TYPE_MAX;
  2755. seg->va = &meta_info;
  2756. seg->size = sizeof(meta_info);
  2757. list_add(&seg->node, &head);
  2758. ret = qcom_elf_dump(&head, info_v2->ramdump_dev, ELF_CLASS);
  2759. skip_elf_dump:
  2760. while (!list_empty(&head)) {
  2761. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2762. list_del(&seg->node);
  2763. kfree(seg);
  2764. }
  2765. return ret;
  2766. }
  2767. #ifdef CONFIG_CNSS2_SSR_DRIVER_DUMP
  2768. /**
  2769. * cnss_host_ramdump_dev_release() - callback function for device release
  2770. * @dev: device to be released
  2771. *
  2772. * Return: None
  2773. */
  2774. static void cnss_host_ramdump_dev_release(struct device *dev)
  2775. {
  2776. cnss_pr_dbg("free host ramdump device\n");
  2777. kfree(dev);
  2778. }
  2779. int cnss_do_host_ramdump(struct cnss_plat_data *plat_priv,
  2780. struct cnss_ssr_driver_dump_entry *ssr_entry,
  2781. size_t num_entries_loaded)
  2782. {
  2783. struct qcom_dump_segment *seg;
  2784. struct cnss_host_dump_meta_info meta_info = {0};
  2785. struct list_head head;
  2786. int dev_ret = 0;
  2787. struct device *new_device;
  2788. static const char * const wlan_str[] = {
  2789. [CNSS_HOST_WLAN_LOGS] = "wlan_logs",
  2790. [CNSS_HOST_HTC_CREDIT] = "htc_credit",
  2791. [CNSS_HOST_WMI_TX_CMP] = "wmi_tx_cmp",
  2792. [CNSS_HOST_WMI_COMMAND_LOG] = "wmi_command_log",
  2793. [CNSS_HOST_WMI_EVENT_LOG] = "wmi_event_log",
  2794. [CNSS_HOST_WMI_RX_EVENT] = "wmi_rx_event",
  2795. [CNSS_HOST_HAL_SOC] = "hal_soc",
  2796. [CNSS_HOST_GWLAN_LOGGING] = "gwlan_logging",
  2797. [CNSS_HOST_WMI_DEBUG_LOG_INFO] = "wmi_debug_log_info",
  2798. [CNSS_HOST_HTC_CREDIT_IDX] = "htc_credit_history_idx",
  2799. [CNSS_HOST_HTC_CREDIT_LEN] = "htc_credit_history_length",
  2800. [CNSS_HOST_WMI_TX_CMP_IDX] = "wmi_tx_cmp_idx",
  2801. [CNSS_HOST_WMI_COMMAND_LOG_IDX] = "wmi_command_log_idx",
  2802. [CNSS_HOST_WMI_EVENT_LOG_IDX] = "wmi_event_log_idx",
  2803. [CNSS_HOST_WMI_RX_EVENT_IDX] = "wmi_rx_event_idx",
  2804. [CNSS_HOST_HIF_CE_DESC_HISTORY_BUFF] = "hif_ce_desc_history_buff",
  2805. [CNSS_HOST_HANG_EVENT_DATA] = "hang_event_data",
  2806. [CNSS_HOST_CE_DESC_HIST] = "hif_ce_desc_hist",
  2807. [CNSS_HOST_CE_COUNT_MAX] = "hif_ce_count_max",
  2808. [CNSS_HOST_CE_HISTORY_MAX] = "hif_ce_history_max",
  2809. [CNSS_HOST_ONLY_FOR_CRIT_CE] = "hif_ce_only_for_crit",
  2810. [CNSS_HOST_HIF_EVENT_HISTORY] = "hif_event_history",
  2811. [CNSS_HOST_HIF_EVENT_HIST_MAX] = "hif_event_hist_max",
  2812. [CNSS_HOST_DP_WBM_DESC_REL] = "wbm_desc_rel_ring",
  2813. [CNSS_HOST_DP_WBM_DESC_REL_HANDLE] = "wbm_desc_rel_ring_handle",
  2814. [CNSS_HOST_DP_TCL_CMD] = "tcl_cmd_ring",
  2815. [CNSS_HOST_DP_TCL_CMD_HANDLE] = "tcl_cmd_ring_handle",
  2816. [CNSS_HOST_DP_TCL_STATUS] = "tcl_status_ring",
  2817. [CNSS_HOST_DP_TCL_STATUS_HANDLE] = "tcl_status_ring_handle",
  2818. [CNSS_HOST_DP_REO_REINJ] = "reo_reinject_ring",
  2819. [CNSS_HOST_DP_REO_REINJ_HANDLE] = "reo_reinject_ring_handle",
  2820. [CNSS_HOST_DP_RX_REL] = "rx_rel_ring",
  2821. [CNSS_HOST_DP_RX_REL_HANDLE] = "rx_rel_ring_handle",
  2822. [CNSS_HOST_DP_REO_EXP] = "reo_exception_ring",
  2823. [CNSS_HOST_DP_REO_EXP_HANDLE] = "reo_exception_ring_handle",
  2824. [CNSS_HOST_DP_REO_CMD] = "reo_cmd_ring",
  2825. [CNSS_HOST_DP_REO_CMD_HANDLE] = "reo_cmd_ring_handle",
  2826. [CNSS_HOST_DP_REO_STATUS] = "reo_status_ring",
  2827. [CNSS_HOST_DP_REO_STATUS_HANDLE] = "reo_status_ring_handle",
  2828. [CNSS_HOST_DP_TCL_DATA_0] = "tcl_data_ring_0",
  2829. [CNSS_HOST_DP_TCL_DATA_0_HANDLE] = "tcl_data_ring_0_handle",
  2830. [CNSS_HOST_DP_TX_COMP_0] = "tx_comp_ring_0",
  2831. [CNSS_HOST_DP_TX_COMP_0_HANDLE] = "tx_comp_ring_0_handle",
  2832. [CNSS_HOST_DP_TCL_DATA_1] = "tcl_data_ring_1",
  2833. [CNSS_HOST_DP_TCL_DATA_1_HANDLE] = "tcl_data_ring_1_handle",
  2834. [CNSS_HOST_DP_TX_COMP_1] = "tx_comp_ring_1",
  2835. [CNSS_HOST_DP_TX_COMP_1_HANDLE] = "tx_comp_ring_1_handle",
  2836. [CNSS_HOST_DP_TCL_DATA_2] = "tcl_data_ring_2",
  2837. [CNSS_HOST_DP_TCL_DATA_2_HANDLE] = "tcl_data_ring_2_handle",
  2838. [CNSS_HOST_DP_TX_COMP_2] = "tx_comp_ring_2",
  2839. [CNSS_HOST_DP_TX_COMP_2_HANDLE] = "tx_comp_ring_2_handle",
  2840. [CNSS_HOST_DP_REO_DST_0] = "reo_dest_ring_0",
  2841. [CNSS_HOST_DP_REO_DST_0_HANDLE] = "reo_dest_ring_0_handle",
  2842. [CNSS_HOST_DP_REO_DST_1] = "reo_dest_ring_1",
  2843. [CNSS_HOST_DP_REO_DST_1_HANDLE] = "reo_dest_ring_1_handle",
  2844. [CNSS_HOST_DP_REO_DST_2] = "reo_dest_ring_2",
  2845. [CNSS_HOST_DP_REO_DST_2_HANDLE] = "reo_dest_ring_2_handle",
  2846. [CNSS_HOST_DP_REO_DST_3] = "reo_dest_ring_3",
  2847. [CNSS_HOST_DP_REO_DST_3_HANDLE] = "reo_dest_ring_3_handle",
  2848. [CNSS_HOST_DP_REO_DST_4] = "reo_dest_ring_4",
  2849. [CNSS_HOST_DP_REO_DST_4_HANDLE] = "reo_dest_ring_4_handle",
  2850. [CNSS_HOST_DP_REO_DST_5] = "reo_dest_ring_5",
  2851. [CNSS_HOST_DP_REO_DST_5_HANDLE] = "reo_dest_ring_5_handle",
  2852. [CNSS_HOST_DP_REO_DST_6] = "reo_dest_ring_6",
  2853. [CNSS_HOST_DP_REO_DST_6_HANDLE] = "reo_dest_ring_6_handle",
  2854. [CNSS_HOST_DP_REO_DST_7] = "reo_dest_ring_7",
  2855. [CNSS_HOST_DP_REO_DST_7_HANDLE] = "reo_dest_ring_7_handle",
  2856. [CNSS_HOST_DP_PDEV_0] = "dp_pdev_0",
  2857. [CNSS_HOST_DP_WLAN_CFG_CTX] = "wlan_cfg_ctx",
  2858. [CNSS_HOST_DP_SOC] = "dp_soc",
  2859. [CNSS_HOST_HAL_RX_FST] = "hal_rx_fst",
  2860. [CNSS_HOST_DP_FISA] = "dp_fisa",
  2861. [CNSS_HOST_DP_FISA_HW_FSE_TABLE] = "dp_fisa_hw_fse_table",
  2862. [CNSS_HOST_DP_FISA_SW_FSE_TABLE] = "dp_fisa_sw_fse_table",
  2863. [CNSS_HOST_HIF] = "hif",
  2864. [CNSS_HOST_QDF_NBUF_HIST] = "qdf_nbuf_history",
  2865. [CNSS_HOST_TCL_WBM_MAP] = "tcl_wbm_map_array",
  2866. [CNSS_HOST_RX_MAC_BUF_RING_0] = "rx_mac_buf_ring_0",
  2867. [CNSS_HOST_RX_MAC_BUF_RING_0_HANDLE] = "rx_mac_buf_ring_0_handle",
  2868. [CNSS_HOST_RX_MAC_BUF_RING_1] = "rx_mac_buf_ring_1",
  2869. [CNSS_HOST_RX_MAC_BUF_RING_1_HANDLE] = "rx_mac_buf_ring_1_handle",
  2870. [CNSS_HOST_RX_REFILL_0] = "rx_refill_buf_ring_0",
  2871. [CNSS_HOST_RX_REFILL_0_HANDLE] = "rx_refill_buf_ring_0_handle",
  2872. [CNSS_HOST_CE_0] = "ce_0",
  2873. [CNSS_HOST_CE_0_SRC_RING] = "ce_0_src_ring",
  2874. [CNSS_HOST_CE_0_SRC_RING_CTX] = "ce_0_src_ring_ctx",
  2875. [CNSS_HOST_CE_1] = "ce_1",
  2876. [CNSS_HOST_CE_1_STATUS_RING] = "ce_1_status_ring",
  2877. [CNSS_HOST_CE_1_STATUS_RING_CTX] = "ce_1_status_ring_ctx",
  2878. [CNSS_HOST_CE_1_DEST_RING] = "ce_1_dest_ring",
  2879. [CNSS_HOST_CE_1_DEST_RING_CTX] = "ce_1_dest_ring_ctx",
  2880. [CNSS_HOST_CE_2] = "ce_2",
  2881. [CNSS_HOST_CE_2_STATUS_RING] = "ce_2_status_ring",
  2882. [CNSS_HOST_CE_2_STATUS_RING_CTX] = "ce_2_status_ring_ctx",
  2883. [CNSS_HOST_CE_2_DEST_RING] = "ce_2_dest_ring",
  2884. [CNSS_HOST_CE_2_DEST_RING_CTX] = "ce_2_dest_ring_ctx",
  2885. [CNSS_HOST_CE_3] = "ce_3",
  2886. [CNSS_HOST_CE_3_SRC_RING] = "ce_3_src_ring",
  2887. [CNSS_HOST_CE_3_SRC_RING_CTX] = "ce_3_src_ring_ctx",
  2888. [CNSS_HOST_CE_4] = "ce_4",
  2889. [CNSS_HOST_CE_4_SRC_RING] = "ce_4_src_ring",
  2890. [CNSS_HOST_CE_4_SRC_RING_CTX] = "ce_4_src_ring_ctx",
  2891. [CNSS_HOST_CE_5] = "ce_5",
  2892. [CNSS_HOST_CE_6] = "ce_6",
  2893. [CNSS_HOST_CE_7] = "ce_7",
  2894. [CNSS_HOST_CE_7_STATUS_RING] = "ce_7_status_ring",
  2895. [CNSS_HOST_CE_7_STATUS_RING_CTX] = "ce_7_status_ring_ctx",
  2896. [CNSS_HOST_CE_7_DEST_RING] = "ce_7_dest_ring",
  2897. [CNSS_HOST_CE_7_DEST_RING_CTX] = "ce_7_dest_ring_ctx",
  2898. [CNSS_HOST_CE_8] = "ce_8",
  2899. [CNSS_HOST_DP_TCL_DATA_3] = "tcl_data_ring_3",
  2900. [CNSS_HOST_DP_TCL_DATA_3_HANDLE] = "tcl_data_ring_3_handle",
  2901. [CNSS_HOST_DP_TX_COMP_3] = "tx_comp_ring_3",
  2902. [CNSS_HOST_DP_TX_COMP_3_HANDLE] = "tx_comp_ring_3_handle"
  2903. };
  2904. int i;
  2905. int ret = 0;
  2906. enum cnss_host_dump_type j;
  2907. if (!dump_enabled()) {
  2908. cnss_pr_info("Dump collection is not enabled\n");
  2909. return ret;
  2910. }
  2911. new_device = kcalloc(1, sizeof(*new_device), GFP_KERNEL);
  2912. if (!new_device) {
  2913. cnss_pr_err("Failed to alloc device mem\n");
  2914. return -ENOMEM;
  2915. }
  2916. new_device->release = cnss_host_ramdump_dev_release;
  2917. device_initialize(new_device);
  2918. dev_set_name(new_device, "wlan_driver");
  2919. dev_ret = device_add(new_device);
  2920. if (dev_ret) {
  2921. cnss_pr_err("Failed to add new device\n");
  2922. goto put_device;
  2923. }
  2924. INIT_LIST_HEAD(&head);
  2925. for (i = 0; i < num_entries_loaded; i++) {
  2926. /* If region name registered by driver is not present in
  2927. * wlan_str. type for that entry will not be set, but entry will
  2928. * be added. Which will result in entry type being 0. Currently
  2929. * entry type 0 is for wlan_logs, which will result in parsing
  2930. * issue for wlan_logs as parsing is done based upon type field.
  2931. * So initialize type with -1(Invalid) to avoid such issues.
  2932. */
  2933. meta_info.entry[i].type = -1;
  2934. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2935. if (!seg) {
  2936. cnss_pr_err("Failed to alloc seg entry %d\n", i);
  2937. continue;
  2938. }
  2939. seg->va = ssr_entry[i].buffer_pointer;
  2940. seg->da = (dma_addr_t)ssr_entry[i].buffer_pointer;
  2941. seg->size = ssr_entry[i].buffer_size;
  2942. for (j = 0; j < CNSS_HOST_DUMP_TYPE_MAX; j++) {
  2943. if (strcmp(ssr_entry[i].region_name, wlan_str[j]) == 0) {
  2944. meta_info.entry[i].type = j;
  2945. }
  2946. }
  2947. meta_info.entry[i].entry_start = i + 1;
  2948. meta_info.entry[i].entry_num++;
  2949. list_add_tail(&seg->node, &head);
  2950. }
  2951. seg = kcalloc(1, sizeof(*seg), GFP_KERNEL);
  2952. if (!seg) {
  2953. cnss_pr_err("%s: Failed to allocate mem for host dump seg\n",
  2954. __func__);
  2955. goto skip_host_dump;
  2956. }
  2957. meta_info.magic = CNSS_RAMDUMP_MAGIC;
  2958. meta_info.version = CNSS_RAMDUMP_VERSION;
  2959. meta_info.chipset = plat_priv->device_id;
  2960. meta_info.total_entries = num_entries_loaded;
  2961. seg->va = &meta_info;
  2962. seg->da = (dma_addr_t)&meta_info;
  2963. seg->size = sizeof(meta_info);
  2964. list_add(&seg->node, &head);
  2965. ret = qcom_elf_dump(&head, new_device, ELF_CLASS);
  2966. skip_host_dump:
  2967. while (!list_empty(&head)) {
  2968. seg = list_first_entry(&head, struct qcom_dump_segment, node);
  2969. list_del(&seg->node);
  2970. kfree(seg);
  2971. }
  2972. device_del(new_device);
  2973. put_device:
  2974. put_device(new_device);
  2975. cnss_pr_dbg("host ramdump result %d\n", ret);
  2976. return ret;
  2977. }
  2978. #endif
  2979. #endif /* CONFIG_MSM_SUBSYSTEM_RESTART */
  2980. #if IS_ENABLED(CONFIG_QCOM_MEMORY_DUMP_V2)
  2981. static int cnss_init_dump_entry(struct cnss_plat_data *plat_priv)
  2982. {
  2983. struct cnss_ramdump_info *ramdump_info;
  2984. struct msm_dump_entry dump_entry;
  2985. ramdump_info = &plat_priv->ramdump_info;
  2986. ramdump_info->dump_data.addr = ramdump_info->ramdump_pa;
  2987. ramdump_info->dump_data.len = ramdump_info->ramdump_size;
  2988. ramdump_info->dump_data.version = CNSS_DUMP_FORMAT_VER;
  2989. ramdump_info->dump_data.magic = CNSS_DUMP_MAGIC_VER_V2;
  2990. strlcpy(ramdump_info->dump_data.name, CNSS_DUMP_NAME,
  2991. sizeof(ramdump_info->dump_data.name));
  2992. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  2993. dump_entry.addr = virt_to_phys(&ramdump_info->dump_data);
  2994. return msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  2995. &dump_entry);
  2996. }
  2997. static int cnss_register_ramdump_v1(struct cnss_plat_data *plat_priv)
  2998. {
  2999. int ret = 0;
  3000. struct device *dev;
  3001. struct cnss_ramdump_info *ramdump_info;
  3002. u32 ramdump_size = 0;
  3003. dev = &plat_priv->plat_dev->dev;
  3004. ramdump_info = &plat_priv->ramdump_info;
  3005. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  3006. /* dt type: legacy or converged */
  3007. ret = of_property_read_u32(dev->of_node,
  3008. "qcom,wlan-ramdump-dynamic",
  3009. &ramdump_size);
  3010. } else {
  3011. ret = of_property_read_u32(plat_priv->dev_node,
  3012. "qcom,wlan-ramdump-dynamic",
  3013. &ramdump_size);
  3014. }
  3015. if (ret == 0) {
  3016. ramdump_info->ramdump_va =
  3017. dma_alloc_coherent(dev, ramdump_size,
  3018. &ramdump_info->ramdump_pa,
  3019. GFP_KERNEL);
  3020. if (ramdump_info->ramdump_va)
  3021. ramdump_info->ramdump_size = ramdump_size;
  3022. }
  3023. cnss_pr_dbg("ramdump va: %pK, pa: %pa\n",
  3024. ramdump_info->ramdump_va, &ramdump_info->ramdump_pa);
  3025. if (ramdump_info->ramdump_size == 0) {
  3026. cnss_pr_info("Ramdump will not be collected");
  3027. goto out;
  3028. }
  3029. ret = cnss_init_dump_entry(plat_priv);
  3030. if (ret) {
  3031. cnss_pr_err("Failed to setup dump table, err = %d\n", ret);
  3032. goto free_ramdump;
  3033. }
  3034. ramdump_info->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  3035. if (!ramdump_info->ramdump_dev) {
  3036. cnss_pr_err("Failed to create ramdump device!");
  3037. ret = -ENOMEM;
  3038. goto free_ramdump;
  3039. }
  3040. return 0;
  3041. free_ramdump:
  3042. dma_free_coherent(dev, ramdump_info->ramdump_size,
  3043. ramdump_info->ramdump_va, ramdump_info->ramdump_pa);
  3044. out:
  3045. return ret;
  3046. }
  3047. static void cnss_unregister_ramdump_v1(struct cnss_plat_data *plat_priv)
  3048. {
  3049. struct device *dev;
  3050. struct cnss_ramdump_info *ramdump_info;
  3051. dev = &plat_priv->plat_dev->dev;
  3052. ramdump_info = &plat_priv->ramdump_info;
  3053. if (ramdump_info->ramdump_dev)
  3054. cnss_destroy_ramdump_device(plat_priv,
  3055. ramdump_info->ramdump_dev);
  3056. if (ramdump_info->ramdump_va)
  3057. dma_free_coherent(dev, ramdump_info->ramdump_size,
  3058. ramdump_info->ramdump_va,
  3059. ramdump_info->ramdump_pa);
  3060. }
  3061. /**
  3062. * cnss_ignore_dump_data_reg_fail - Ignore Ramdump table register failure
  3063. * @ret: Error returned by msm_dump_data_register_nominidump
  3064. *
  3065. * For Lahaina GKI boot, we dont have support for mem dump feature. So
  3066. * ignore failure.
  3067. *
  3068. * Return: Same given error code if mem dump feature enabled, 0 otherwise
  3069. */
  3070. static int cnss_ignore_dump_data_reg_fail(int ret)
  3071. {
  3072. return ret;
  3073. }
  3074. static int cnss_register_ramdump_v2(struct cnss_plat_data *plat_priv)
  3075. {
  3076. int ret = 0;
  3077. struct cnss_ramdump_info_v2 *info_v2;
  3078. struct cnss_dump_data *dump_data;
  3079. struct msm_dump_entry dump_entry;
  3080. struct device *dev = &plat_priv->plat_dev->dev;
  3081. u32 ramdump_size = 0;
  3082. info_v2 = &plat_priv->ramdump_info_v2;
  3083. dump_data = &info_v2->dump_data;
  3084. if (plat_priv->dt_type != CNSS_DTT_MULTIEXCHG) {
  3085. /* dt type: legacy or converged */
  3086. ret = of_property_read_u32(dev->of_node,
  3087. "qcom,wlan-ramdump-dynamic",
  3088. &ramdump_size);
  3089. } else {
  3090. ret = of_property_read_u32(plat_priv->dev_node,
  3091. "qcom,wlan-ramdump-dynamic",
  3092. &ramdump_size);
  3093. }
  3094. if (ret == 0)
  3095. info_v2->ramdump_size = ramdump_size;
  3096. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  3097. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  3098. if (!info_v2->dump_data_vaddr)
  3099. return -ENOMEM;
  3100. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  3101. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  3102. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  3103. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  3104. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  3105. sizeof(dump_data->name));
  3106. dump_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3107. dump_entry.addr = virt_to_phys(dump_data);
  3108. ret = msm_dump_data_register_nominidump(MSM_DUMP_TABLE_APPS,
  3109. &dump_entry);
  3110. if (ret) {
  3111. ret = cnss_ignore_dump_data_reg_fail(ret);
  3112. cnss_pr_err("Failed to setup dump table, %s (%d)\n",
  3113. ret ? "Error" : "Ignoring", ret);
  3114. goto free_ramdump;
  3115. }
  3116. info_v2->ramdump_dev = cnss_create_ramdump_device(plat_priv);
  3117. if (!info_v2->ramdump_dev) {
  3118. cnss_pr_err("Failed to create ramdump device!\n");
  3119. ret = -ENOMEM;
  3120. goto free_ramdump;
  3121. }
  3122. return 0;
  3123. free_ramdump:
  3124. kfree(info_v2->dump_data_vaddr);
  3125. info_v2->dump_data_vaddr = NULL;
  3126. return ret;
  3127. }
  3128. static void cnss_unregister_ramdump_v2(struct cnss_plat_data *plat_priv)
  3129. {
  3130. struct cnss_ramdump_info_v2 *info_v2;
  3131. info_v2 = &plat_priv->ramdump_info_v2;
  3132. if (info_v2->ramdump_dev)
  3133. cnss_destroy_ramdump_device(plat_priv, info_v2->ramdump_dev);
  3134. kfree(info_v2->dump_data_vaddr);
  3135. info_v2->dump_data_vaddr = NULL;
  3136. info_v2->dump_data_valid = false;
  3137. }
  3138. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  3139. {
  3140. int ret = 0;
  3141. switch (plat_priv->device_id) {
  3142. case QCA6174_DEVICE_ID:
  3143. ret = cnss_register_ramdump_v1(plat_priv);
  3144. break;
  3145. case QCA6290_DEVICE_ID:
  3146. case QCA6390_DEVICE_ID:
  3147. case QCN7605_DEVICE_ID:
  3148. case QCA6490_DEVICE_ID:
  3149. case KIWI_DEVICE_ID:
  3150. case MANGO_DEVICE_ID:
  3151. case PEACH_DEVICE_ID:
  3152. ret = cnss_register_ramdump_v2(plat_priv);
  3153. break;
  3154. default:
  3155. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  3156. ret = -ENODEV;
  3157. break;
  3158. }
  3159. return ret;
  3160. }
  3161. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  3162. {
  3163. switch (plat_priv->device_id) {
  3164. case QCA6174_DEVICE_ID:
  3165. cnss_unregister_ramdump_v1(plat_priv);
  3166. break;
  3167. case QCA6290_DEVICE_ID:
  3168. case QCA6390_DEVICE_ID:
  3169. case QCN7605_DEVICE_ID:
  3170. case QCA6490_DEVICE_ID:
  3171. case KIWI_DEVICE_ID:
  3172. case MANGO_DEVICE_ID:
  3173. case PEACH_DEVICE_ID:
  3174. cnss_unregister_ramdump_v2(plat_priv);
  3175. break;
  3176. default:
  3177. cnss_pr_err("Unknown device ID: 0x%lx\n", plat_priv->device_id);
  3178. break;
  3179. }
  3180. }
  3181. #else
  3182. int cnss_register_ramdump(struct cnss_plat_data *plat_priv)
  3183. {
  3184. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  3185. struct cnss_dump_data *dump_data = dump_data = &info_v2->dump_data;
  3186. struct device *dev = &plat_priv->plat_dev->dev;
  3187. u32 ramdump_size = 0;
  3188. if (of_property_read_u32(dev->of_node, "qcom,wlan-ramdump-dynamic",
  3189. &ramdump_size) == 0)
  3190. info_v2->ramdump_size = ramdump_size;
  3191. cnss_pr_dbg("Ramdump size 0x%lx\n", info_v2->ramdump_size);
  3192. info_v2->dump_data_vaddr = kzalloc(CNSS_DUMP_DESC_SIZE, GFP_KERNEL);
  3193. if (!info_v2->dump_data_vaddr)
  3194. return -ENOMEM;
  3195. dump_data->paddr = virt_to_phys(info_v2->dump_data_vaddr);
  3196. dump_data->version = CNSS_DUMP_FORMAT_VER_V2;
  3197. dump_data->magic = CNSS_DUMP_MAGIC_VER_V2;
  3198. dump_data->seg_version = CNSS_DUMP_SEG_VER;
  3199. strlcpy(dump_data->name, CNSS_DUMP_NAME,
  3200. sizeof(dump_data->name));
  3201. info_v2->ramdump_dev = dev;
  3202. return 0;
  3203. }
  3204. void cnss_unregister_ramdump(struct cnss_plat_data *plat_priv)
  3205. {
  3206. struct cnss_ramdump_info_v2 *info_v2 = &plat_priv->ramdump_info_v2;
  3207. info_v2->ramdump_dev = NULL;
  3208. kfree(info_v2->dump_data_vaddr);
  3209. info_v2->dump_data_vaddr = NULL;
  3210. info_v2->dump_data_valid = false;
  3211. }
  3212. #endif /* CONFIG_QCOM_MEMORY_DUMP_V2 */
  3213. int cnss_va_to_pa(struct device *dev, size_t size, void *va, dma_addr_t dma,
  3214. phys_addr_t *pa, unsigned long attrs)
  3215. {
  3216. struct sg_table sgt;
  3217. int ret;
  3218. ret = dma_get_sgtable_attrs(dev, &sgt, va, dma, size, attrs);
  3219. if (ret) {
  3220. cnss_pr_err("Failed to get sgtable for va: 0x%pK, dma: %pa, size: 0x%zx, attrs: 0x%x\n",
  3221. va, &dma, size, attrs);
  3222. return -EINVAL;
  3223. }
  3224. *pa = page_to_phys(sg_page(sgt.sgl));
  3225. sg_free_table(&sgt);
  3226. return 0;
  3227. }
  3228. #if IS_ENABLED(CONFIG_QCOM_MINIDUMP)
  3229. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3230. enum cnss_fw_dump_type type, int seg_no,
  3231. void *va, phys_addr_t pa, size_t size)
  3232. {
  3233. struct md_region md_entry;
  3234. int ret;
  3235. switch (type) {
  3236. case CNSS_FW_IMAGE:
  3237. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3238. seg_no);
  3239. break;
  3240. case CNSS_FW_RDDM:
  3241. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3242. seg_no);
  3243. break;
  3244. case CNSS_FW_REMOTE_HEAP:
  3245. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3246. seg_no);
  3247. break;
  3248. default:
  3249. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3250. return -EINVAL;
  3251. }
  3252. md_entry.phys_addr = pa;
  3253. md_entry.virt_addr = (uintptr_t)va;
  3254. md_entry.size = size;
  3255. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3256. cnss_pr_dbg("Mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3257. md_entry.name, va, &pa, size);
  3258. ret = msm_minidump_add_region(&md_entry);
  3259. if (ret < 0)
  3260. cnss_pr_err("Failed to add mini dump region, err = %d\n", ret);
  3261. return ret;
  3262. }
  3263. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3264. enum cnss_fw_dump_type type, int seg_no,
  3265. void *va, phys_addr_t pa, size_t size)
  3266. {
  3267. struct md_region md_entry;
  3268. int ret;
  3269. switch (type) {
  3270. case CNSS_FW_IMAGE:
  3271. snprintf(md_entry.name, sizeof(md_entry.name), "FBC_%X",
  3272. seg_no);
  3273. break;
  3274. case CNSS_FW_RDDM:
  3275. snprintf(md_entry.name, sizeof(md_entry.name), "RDDM_%X",
  3276. seg_no);
  3277. break;
  3278. case CNSS_FW_REMOTE_HEAP:
  3279. snprintf(md_entry.name, sizeof(md_entry.name), "RHEAP_%X",
  3280. seg_no);
  3281. break;
  3282. default:
  3283. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3284. return -EINVAL;
  3285. }
  3286. md_entry.phys_addr = pa;
  3287. md_entry.virt_addr = (uintptr_t)va;
  3288. md_entry.size = size;
  3289. md_entry.id = MSM_DUMP_DATA_CNSS_WLAN;
  3290. cnss_pr_vdbg("Remove mini dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3291. md_entry.name, va, &pa, size);
  3292. ret = msm_minidump_remove_region(&md_entry);
  3293. if (ret)
  3294. cnss_pr_err("Failed to remove mini dump region, err = %d\n",
  3295. ret);
  3296. return ret;
  3297. }
  3298. #else
  3299. int cnss_minidump_add_region(struct cnss_plat_data *plat_priv,
  3300. enum cnss_fw_dump_type type, int seg_no,
  3301. void *va, phys_addr_t pa, size_t size)
  3302. {
  3303. char name[MAX_NAME_LEN];
  3304. switch (type) {
  3305. case CNSS_FW_IMAGE:
  3306. snprintf(name, MAX_NAME_LEN, "FBC_%X", seg_no);
  3307. break;
  3308. case CNSS_FW_RDDM:
  3309. snprintf(name, MAX_NAME_LEN, "RDDM_%X", seg_no);
  3310. break;
  3311. case CNSS_FW_REMOTE_HEAP:
  3312. snprintf(name, MAX_NAME_LEN, "RHEAP_%X", seg_no);
  3313. break;
  3314. default:
  3315. cnss_pr_err("Unknown dump type ID: %d\n", type);
  3316. return -EINVAL;
  3317. }
  3318. cnss_pr_dbg("Dump region: %s, va: %pK, pa: %pa, size: 0x%zx\n",
  3319. name, va, &pa, size);
  3320. return 0;
  3321. }
  3322. int cnss_minidump_remove_region(struct cnss_plat_data *plat_priv,
  3323. enum cnss_fw_dump_type type, int seg_no,
  3324. void *va, phys_addr_t pa, size_t size)
  3325. {
  3326. return 0;
  3327. }
  3328. #endif /* CONFIG_QCOM_MINIDUMP */
  3329. int cnss_request_firmware_direct(struct cnss_plat_data *plat_priv,
  3330. const struct firmware **fw_entry,
  3331. const char *filename)
  3332. {
  3333. if (IS_ENABLED(CONFIG_CNSS_REQ_FW_DIRECT))
  3334. return request_firmware_direct(fw_entry, filename,
  3335. &plat_priv->plat_dev->dev);
  3336. else
  3337. return firmware_request_nowarn(fw_entry, filename,
  3338. &plat_priv->plat_dev->dev);
  3339. }
  3340. #if IS_ENABLED(CONFIG_INTERCONNECT)
  3341. /**
  3342. * cnss_register_bus_scale() - Setup interconnect voting data
  3343. * @plat_priv: Platform data structure
  3344. *
  3345. * For different interconnect path configured in device tree setup voting data
  3346. * for list of bandwidth requirements.
  3347. *
  3348. * Result: 0 for success. -EINVAL if not configured
  3349. */
  3350. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3351. {
  3352. int ret = -EINVAL;
  3353. u32 idx, i, j, cfg_arr_size, *cfg_arr = NULL;
  3354. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3355. struct device *dev = &plat_priv->plat_dev->dev;
  3356. INIT_LIST_HEAD(&plat_priv->icc.list_head);
  3357. ret = of_property_read_u32(dev->of_node,
  3358. "qcom,icc-path-count",
  3359. &plat_priv->icc.path_count);
  3360. if (ret) {
  3361. cnss_pr_dbg("Platform Bus Interconnect path not configured\n");
  3362. return 0;
  3363. }
  3364. ret = of_property_read_u32(plat_priv->plat_dev->dev.of_node,
  3365. "qcom,bus-bw-cfg-count",
  3366. &plat_priv->icc.bus_bw_cfg_count);
  3367. if (ret) {
  3368. cnss_pr_err("Failed to get Bus BW Config table size\n");
  3369. goto cleanup;
  3370. }
  3371. cfg_arr_size = plat_priv->icc.path_count *
  3372. plat_priv->icc.bus_bw_cfg_count * CNSS_ICC_VOTE_MAX;
  3373. cfg_arr = kcalloc(cfg_arr_size, sizeof(*cfg_arr), GFP_KERNEL);
  3374. if (!cfg_arr) {
  3375. cnss_pr_err("Failed to alloc cfg table mem\n");
  3376. ret = -ENOMEM;
  3377. goto cleanup;
  3378. }
  3379. ret = of_property_read_u32_array(plat_priv->plat_dev->dev.of_node,
  3380. "qcom,bus-bw-cfg", cfg_arr,
  3381. cfg_arr_size);
  3382. if (ret) {
  3383. cnss_pr_err("Invalid Bus BW Config Table\n");
  3384. goto cleanup;
  3385. }
  3386. cnss_pr_dbg("ICC Path_Count: %d BW_CFG_Count: %d\n",
  3387. plat_priv->icc.path_count, plat_priv->icc.bus_bw_cfg_count);
  3388. for (idx = 0; idx < plat_priv->icc.path_count; idx++) {
  3389. bus_bw_info = devm_kzalloc(dev, sizeof(*bus_bw_info),
  3390. GFP_KERNEL);
  3391. if (!bus_bw_info) {
  3392. ret = -ENOMEM;
  3393. goto out;
  3394. }
  3395. ret = of_property_read_string_index(dev->of_node,
  3396. "interconnect-names", idx,
  3397. &bus_bw_info->icc_name);
  3398. if (ret)
  3399. goto out;
  3400. bus_bw_info->icc_path =
  3401. of_icc_get(&plat_priv->plat_dev->dev,
  3402. bus_bw_info->icc_name);
  3403. if (IS_ERR(bus_bw_info->icc_path)) {
  3404. ret = PTR_ERR(bus_bw_info->icc_path);
  3405. if (ret != -EPROBE_DEFER) {
  3406. cnss_pr_err("Failed to get Interconnect path for %s. Err: %d\n",
  3407. bus_bw_info->icc_name, ret);
  3408. goto out;
  3409. }
  3410. }
  3411. bus_bw_info->cfg_table =
  3412. devm_kcalloc(dev, plat_priv->icc.bus_bw_cfg_count,
  3413. sizeof(*bus_bw_info->cfg_table),
  3414. GFP_KERNEL);
  3415. if (!bus_bw_info->cfg_table) {
  3416. ret = -ENOMEM;
  3417. goto out;
  3418. }
  3419. cnss_pr_dbg("ICC Vote CFG for path: %s\n",
  3420. bus_bw_info->icc_name);
  3421. for (i = 0, j = (idx * plat_priv->icc.bus_bw_cfg_count *
  3422. CNSS_ICC_VOTE_MAX);
  3423. i < plat_priv->icc.bus_bw_cfg_count;
  3424. i++, j += 2) {
  3425. bus_bw_info->cfg_table[i].avg_bw = cfg_arr[j];
  3426. bus_bw_info->cfg_table[i].peak_bw = cfg_arr[j + 1];
  3427. cnss_pr_dbg("ICC Vote BW: %d avg: %d peak: %d\n",
  3428. i, bus_bw_info->cfg_table[i].avg_bw,
  3429. bus_bw_info->cfg_table[i].peak_bw);
  3430. }
  3431. list_add_tail(&bus_bw_info->list,
  3432. &plat_priv->icc.list_head);
  3433. }
  3434. kfree(cfg_arr);
  3435. return 0;
  3436. out:
  3437. list_for_each_entry_safe(bus_bw_info, tmp,
  3438. &plat_priv->icc.list_head, list) {
  3439. list_del(&bus_bw_info->list);
  3440. }
  3441. cleanup:
  3442. kfree(cfg_arr);
  3443. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3444. return ret;
  3445. }
  3446. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv)
  3447. {
  3448. struct cnss_bus_bw_info *bus_bw_info, *tmp;
  3449. list_for_each_entry_safe(bus_bw_info, tmp,
  3450. &plat_priv->icc.list_head, list) {
  3451. list_del(&bus_bw_info->list);
  3452. if (bus_bw_info->icc_path)
  3453. icc_put(bus_bw_info->icc_path);
  3454. }
  3455. memset(&plat_priv->icc, 0, sizeof(plat_priv->icc));
  3456. }
  3457. #else
  3458. static int cnss_register_bus_scale(struct cnss_plat_data *plat_priv)
  3459. {
  3460. return 0;
  3461. }
  3462. static void cnss_unregister_bus_scale(struct cnss_plat_data *plat_priv) {}
  3463. #endif /* CONFIG_INTERCONNECT */
  3464. void cnss_daemon_connection_update_cb(void *cb_ctx, bool status)
  3465. {
  3466. struct cnss_plat_data *plat_priv = cb_ctx;
  3467. if (!plat_priv) {
  3468. cnss_pr_err("%s: Invalid context\n", __func__);
  3469. return;
  3470. }
  3471. if (status) {
  3472. cnss_pr_info("CNSS Daemon connected\n");
  3473. set_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3474. complete(&plat_priv->daemon_connected);
  3475. } else {
  3476. cnss_pr_info("CNSS Daemon disconnected\n");
  3477. reinit_completion(&plat_priv->daemon_connected);
  3478. clear_bit(CNSS_DAEMON_CONNECTED, &plat_priv->driver_state);
  3479. }
  3480. }
  3481. static ssize_t enable_hds_store(struct device *dev,
  3482. struct device_attribute *attr,
  3483. const char *buf, size_t count)
  3484. {
  3485. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3486. unsigned int enable_hds = 0;
  3487. if (!plat_priv)
  3488. return -ENODEV;
  3489. if (sscanf(buf, "%du", &enable_hds) != 1) {
  3490. cnss_pr_err("Invalid enable_hds sysfs command\n");
  3491. return -EINVAL;
  3492. }
  3493. if (enable_hds)
  3494. plat_priv->hds_enabled = true;
  3495. else
  3496. plat_priv->hds_enabled = false;
  3497. cnss_pr_dbg("%s HDS file download, count is %zu\n",
  3498. plat_priv->hds_enabled ? "Enable" : "Disable", count);
  3499. return count;
  3500. }
  3501. static ssize_t recovery_show(struct device *dev,
  3502. struct device_attribute *attr,
  3503. char *buf)
  3504. {
  3505. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3506. u32 buf_size = PAGE_SIZE;
  3507. u32 curr_len = 0;
  3508. u32 buf_written = 0;
  3509. if (!plat_priv)
  3510. return -ENODEV;
  3511. buf_written = scnprintf(buf, buf_size,
  3512. "Usage: echo [recovery_bitmap] > /sys/kernel/cnss/recovery\n"
  3513. "BIT0 -- wlan fw recovery\n"
  3514. "BIT1 -- wlan pcss recovery\n"
  3515. "---------------------------------\n");
  3516. curr_len += buf_written;
  3517. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3518. "WLAN recovery %s[%d]\n",
  3519. plat_priv->recovery_enabled ? "Enabled" : "Disabled",
  3520. plat_priv->recovery_enabled);
  3521. curr_len += buf_written;
  3522. buf_written = scnprintf(buf + curr_len, buf_size - curr_len,
  3523. "WLAN PCSS recovery %s[%d]\n",
  3524. plat_priv->recovery_pcss_enabled ? "Enabled" : "Disabled",
  3525. plat_priv->recovery_pcss_enabled);
  3526. curr_len += buf_written;
  3527. /*
  3528. * Now size of curr_len is not over page size for sure,
  3529. * later if new item or none-fixed size item added, need
  3530. * add check to make sure curr_len is not over page size.
  3531. */
  3532. return curr_len;
  3533. }
  3534. static ssize_t tme_opt_file_download_show(struct device *dev,
  3535. struct device_attribute *attr, char *buf)
  3536. {
  3537. u32 buf_size = PAGE_SIZE;
  3538. u32 curr_len = 0;
  3539. u32 buf_written = 0;
  3540. buf_written = scnprintf(buf, buf_size,
  3541. "Usage: echo [file_type] > /sys/kernel/cnss/tme_opt_file_download\n"
  3542. "file_type = sec -- For OEM_FUSE file\n"
  3543. "file_type = rpr -- For RPR file\n"
  3544. "file_type = dpr -- For DPR file\n");
  3545. curr_len += buf_written;
  3546. return curr_len;
  3547. }
  3548. static ssize_t time_sync_period_show(struct device *dev,
  3549. struct device_attribute *attr,
  3550. char *buf)
  3551. {
  3552. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3553. return scnprintf(buf, PAGE_SIZE, "%u ms\n",
  3554. plat_priv->ctrl_params.time_sync_period);
  3555. }
  3556. /**
  3557. * cnss_get_min_time_sync_period_by_vote() - Get minimum time sync period
  3558. * @plat_priv: Platform data structure
  3559. *
  3560. * Result: return minimum time sync period present in vote from wlan and sys
  3561. */
  3562. uint32_t cnss_get_min_time_sync_period_by_vote(struct cnss_plat_data *plat_priv)
  3563. {
  3564. unsigned int i, min_time_sync_period = CNSS_TIME_SYNC_PERIOD_INVALID;
  3565. unsigned int time_sync_period;
  3566. for (i = 0; i < TIME_SYNC_VOTE_MAX; i++) {
  3567. time_sync_period = plat_priv->ctrl_params.time_sync_period_vote[i];
  3568. if (min_time_sync_period > time_sync_period)
  3569. min_time_sync_period = time_sync_period;
  3570. }
  3571. return min_time_sync_period;
  3572. }
  3573. static ssize_t time_sync_period_store(struct device *dev,
  3574. struct device_attribute *attr,
  3575. const char *buf, size_t count)
  3576. {
  3577. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3578. unsigned int time_sync_period = 0;
  3579. if (!plat_priv)
  3580. return -ENODEV;
  3581. if (sscanf(buf, "%du", &time_sync_period) != 1) {
  3582. cnss_pr_err("Invalid time sync sysfs command\n");
  3583. return -EINVAL;
  3584. }
  3585. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3586. cnss_pr_err("Invalid time sync value\n");
  3587. return -EINVAL;
  3588. }
  3589. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  3590. time_sync_period;
  3591. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3592. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3593. cnss_pr_err("Invalid min time sync value\n");
  3594. return -EINVAL;
  3595. }
  3596. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3597. return count;
  3598. }
  3599. /**
  3600. * cnss_update_time_sync_period() - Set time sync period given by driver
  3601. * @dev: device structure
  3602. * @time_sync_period: time sync period value
  3603. *
  3604. * Update time sync period vote of driver and set minimum of time sync period
  3605. * from stored vote through wlan and sys config
  3606. * Result: return 0 for success, error in case of invalid value and no dev
  3607. */
  3608. int cnss_update_time_sync_period(struct device *dev, uint32_t time_sync_period)
  3609. {
  3610. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3611. if (!plat_priv)
  3612. return -ENODEV;
  3613. if (time_sync_period < CNSS_MIN_TIME_SYNC_PERIOD) {
  3614. cnss_pr_err("Invalid time sync value\n");
  3615. return -EINVAL;
  3616. }
  3617. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3618. time_sync_period;
  3619. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3620. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3621. cnss_pr_err("Invalid min time sync value\n");
  3622. return -EINVAL;
  3623. }
  3624. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3625. return 0;
  3626. }
  3627. EXPORT_SYMBOL(cnss_update_time_sync_period);
  3628. /**
  3629. * cnss_reset_time_sync_period() - Reset time sync period
  3630. * @dev: device structure
  3631. *
  3632. * Update time sync period vote of driver as invalid
  3633. * and reset minimum of time sync period from
  3634. * stored vote through wlan and sys config
  3635. * Result: return 0 for success, error in case of no dev
  3636. */
  3637. int cnss_reset_time_sync_period(struct device *dev)
  3638. {
  3639. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  3640. unsigned int time_sync_period = 0;
  3641. if (!plat_priv)
  3642. return -ENODEV;
  3643. /* Driver vote is set to invalid in case of reset
  3644. * In this case, only vote valid to check is sys config
  3645. */
  3646. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  3647. CNSS_TIME_SYNC_PERIOD_INVALID;
  3648. time_sync_period = cnss_get_min_time_sync_period_by_vote(plat_priv);
  3649. if (time_sync_period == CNSS_TIME_SYNC_PERIOD_INVALID) {
  3650. cnss_pr_err("Invalid min time sync value\n");
  3651. return -EINVAL;
  3652. }
  3653. cnss_bus_update_time_sync_period(plat_priv, time_sync_period);
  3654. return 0;
  3655. }
  3656. EXPORT_SYMBOL(cnss_reset_time_sync_period);
  3657. static ssize_t recovery_store(struct device *dev,
  3658. struct device_attribute *attr,
  3659. const char *buf, size_t count)
  3660. {
  3661. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3662. unsigned int recovery = 0;
  3663. if (!plat_priv)
  3664. return -ENODEV;
  3665. if (sscanf(buf, "%du", &recovery) != 1) {
  3666. cnss_pr_err("Invalid recovery sysfs command\n");
  3667. return -EINVAL;
  3668. }
  3669. plat_priv->recovery_enabled = !!(recovery & CNSS_WLAN_RECOVERY);
  3670. plat_priv->recovery_pcss_enabled = !!(recovery & CNSS_PCSS_RECOVERY);
  3671. cnss_pr_dbg("%s WLAN recovery, count is %zu\n",
  3672. plat_priv->recovery_enabled ? "Enable" : "Disable", count);
  3673. cnss_pr_dbg("%s PCSS recovery, count is %zu\n",
  3674. plat_priv->recovery_pcss_enabled ? "Enable" : "Disable", count);
  3675. cnss_send_subsys_restart_level_msg(plat_priv);
  3676. return count;
  3677. }
  3678. static ssize_t shutdown_store(struct device *dev,
  3679. struct device_attribute *attr,
  3680. const char *buf, size_t count)
  3681. {
  3682. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3683. cnss_pr_dbg("Received shutdown notification\n");
  3684. if (plat_priv) {
  3685. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3686. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3687. del_timer(&plat_priv->fw_boot_timer);
  3688. complete_all(&plat_priv->power_up_complete);
  3689. complete_all(&plat_priv->cal_complete);
  3690. cnss_pr_dbg("Shutdown notification handled\n");
  3691. }
  3692. return count;
  3693. }
  3694. static ssize_t fs_ready_store(struct device *dev,
  3695. struct device_attribute *attr,
  3696. const char *buf, size_t count)
  3697. {
  3698. int fs_ready = 0;
  3699. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3700. if (sscanf(buf, "%du", &fs_ready) != 1)
  3701. return -EINVAL;
  3702. cnss_pr_dbg("File system is ready, fs_ready is %d, count is %zu\n",
  3703. fs_ready, count);
  3704. if (!plat_priv) {
  3705. cnss_pr_err("plat_priv is NULL\n");
  3706. return count;
  3707. }
  3708. if (test_bit(QMI_BYPASS, &plat_priv->ctrl_params.quirks)) {
  3709. cnss_pr_dbg("QMI is bypassed\n");
  3710. return count;
  3711. }
  3712. set_bit(CNSS_FS_READY, &plat_priv->driver_state);
  3713. if (fs_ready == FILE_SYSTEM_READY && plat_priv->cbc_enabled) {
  3714. cnss_driver_event_post(plat_priv,
  3715. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  3716. 0, NULL);
  3717. }
  3718. return count;
  3719. }
  3720. static ssize_t qdss_trace_start_store(struct device *dev,
  3721. struct device_attribute *attr,
  3722. const char *buf, size_t count)
  3723. {
  3724. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3725. wlfw_qdss_trace_start(plat_priv);
  3726. cnss_pr_dbg("Received QDSS start command\n");
  3727. return count;
  3728. }
  3729. static ssize_t qdss_trace_stop_store(struct device *dev,
  3730. struct device_attribute *attr,
  3731. const char *buf, size_t count)
  3732. {
  3733. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3734. u32 option = 0;
  3735. if (sscanf(buf, "%du", &option) != 1)
  3736. return -EINVAL;
  3737. wlfw_qdss_trace_stop(plat_priv, option);
  3738. cnss_pr_dbg("Received QDSS stop command\n");
  3739. return count;
  3740. }
  3741. static ssize_t qdss_conf_download_store(struct device *dev,
  3742. struct device_attribute *attr,
  3743. const char *buf, size_t count)
  3744. {
  3745. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3746. cnss_wlfw_qdss_dnld_send_sync(plat_priv);
  3747. cnss_pr_dbg("Received QDSS download config command\n");
  3748. return count;
  3749. }
  3750. static ssize_t tme_opt_file_download_store(struct device *dev,
  3751. struct device_attribute *attr,
  3752. const char *buf, size_t count)
  3753. {
  3754. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3755. char cmd[5];
  3756. if (sscanf(buf, "%s", cmd) != 1)
  3757. return -EINVAL;
  3758. if (!test_bit(CNSS_FW_READY, &plat_priv->driver_state)) {
  3759. cnss_pr_err("Firmware is not ready yet\n");
  3760. return 0;
  3761. }
  3762. if (plat_priv->device_id == PEACH_DEVICE_ID &&
  3763. cnss_bus_runtime_pm_get_sync(plat_priv) < 0)
  3764. goto runtime_pm_put;
  3765. if (strcmp(cmd, "sec") == 0) {
  3766. cnss_bus_load_tme_opt_file(plat_priv, WLFW_TME_LITE_OEM_FUSE_FILE_V01);
  3767. cnss_wlfw_tme_opt_file_dnld_send_sync(plat_priv, WLFW_TME_LITE_OEM_FUSE_FILE_V01);
  3768. } else if (strcmp(cmd, "rpr") == 0) {
  3769. cnss_bus_load_tme_opt_file(plat_priv, WLFW_TME_LITE_RPR_FILE_V01);
  3770. cnss_wlfw_tme_opt_file_dnld_send_sync(plat_priv, WLFW_TME_LITE_RPR_FILE_V01);
  3771. } else if (strcmp(cmd, "dpr") == 0) {
  3772. cnss_bus_load_tme_opt_file(plat_priv, WLFW_TME_LITE_DPR_FILE_V01);
  3773. cnss_wlfw_tme_opt_file_dnld_send_sync(plat_priv, WLFW_TME_LITE_DPR_FILE_V01);
  3774. }
  3775. cnss_pr_dbg("Received tme_opt_file_download indication cmd: %s\n", cmd);
  3776. runtime_pm_put:
  3777. if (plat_priv->device_id == PEACH_DEVICE_ID)
  3778. cnss_bus_runtime_pm_put(plat_priv);
  3779. return count;
  3780. }
  3781. static ssize_t hw_trace_override_store(struct device *dev,
  3782. struct device_attribute *attr,
  3783. const char *buf, size_t count)
  3784. {
  3785. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3786. int tmp = 0;
  3787. if (sscanf(buf, "%du", &tmp) != 1)
  3788. return -EINVAL;
  3789. plat_priv->hw_trc_override = tmp;
  3790. cnss_pr_dbg("Received QDSS hw_trc_override indication\n");
  3791. return count;
  3792. }
  3793. static ssize_t charger_mode_store(struct device *dev,
  3794. struct device_attribute *attr,
  3795. const char *buf, size_t count)
  3796. {
  3797. struct cnss_plat_data *plat_priv = dev_get_drvdata(dev);
  3798. int tmp = 0;
  3799. if (sscanf(buf, "%du", &tmp) != 1)
  3800. return -EINVAL;
  3801. plat_priv->charger_mode = tmp;
  3802. cnss_pr_dbg("Received Charger Mode: %d\n", tmp);
  3803. return count;
  3804. }
  3805. static DEVICE_ATTR_WO(fs_ready);
  3806. static DEVICE_ATTR_WO(shutdown);
  3807. static DEVICE_ATTR_RW(recovery);
  3808. static DEVICE_ATTR_WO(enable_hds);
  3809. static DEVICE_ATTR_WO(qdss_trace_start);
  3810. static DEVICE_ATTR_WO(qdss_trace_stop);
  3811. static DEVICE_ATTR_WO(qdss_conf_download);
  3812. static DEVICE_ATTR_RW(tme_opt_file_download);
  3813. static DEVICE_ATTR_WO(hw_trace_override);
  3814. static DEVICE_ATTR_WO(charger_mode);
  3815. static DEVICE_ATTR_RW(time_sync_period);
  3816. static struct attribute *cnss_attrs[] = {
  3817. &dev_attr_fs_ready.attr,
  3818. &dev_attr_shutdown.attr,
  3819. &dev_attr_recovery.attr,
  3820. &dev_attr_enable_hds.attr,
  3821. &dev_attr_qdss_trace_start.attr,
  3822. &dev_attr_qdss_trace_stop.attr,
  3823. &dev_attr_qdss_conf_download.attr,
  3824. &dev_attr_tme_opt_file_download.attr,
  3825. &dev_attr_hw_trace_override.attr,
  3826. &dev_attr_charger_mode.attr,
  3827. &dev_attr_time_sync_period.attr,
  3828. NULL,
  3829. };
  3830. static struct attribute_group cnss_attr_group = {
  3831. .attrs = cnss_attrs,
  3832. };
  3833. static int cnss_create_sysfs_link(struct cnss_plat_data *plat_priv)
  3834. {
  3835. struct device *dev = &plat_priv->plat_dev->dev;
  3836. int ret;
  3837. char cnss_name[CNSS_FS_NAME_SIZE];
  3838. char shutdown_name[32];
  3839. if (cnss_is_dual_wlan_enabled()) {
  3840. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3841. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3842. snprintf(shutdown_name, sizeof(shutdown_name),
  3843. "shutdown_wlan_%d", plat_priv->plat_idx);
  3844. } else {
  3845. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3846. snprintf(shutdown_name, sizeof(shutdown_name),
  3847. "shutdown_wlan");
  3848. }
  3849. ret = sysfs_create_link(kernel_kobj, &dev->kobj, cnss_name);
  3850. if (ret) {
  3851. cnss_pr_err("Failed to create cnss link, err = %d\n",
  3852. ret);
  3853. goto out;
  3854. }
  3855. /* This is only for backward compatibility. */
  3856. ret = sysfs_create_link(kernel_kobj, &dev->kobj, shutdown_name);
  3857. if (ret) {
  3858. cnss_pr_err("Failed to create shutdown_wlan link, err = %d\n",
  3859. ret);
  3860. goto rm_cnss_link;
  3861. }
  3862. return 0;
  3863. rm_cnss_link:
  3864. sysfs_remove_link(kernel_kobj, cnss_name);
  3865. out:
  3866. return ret;
  3867. }
  3868. static void cnss_remove_sysfs_link(struct cnss_plat_data *plat_priv)
  3869. {
  3870. char cnss_name[CNSS_FS_NAME_SIZE];
  3871. char shutdown_name[32];
  3872. if (cnss_is_dual_wlan_enabled()) {
  3873. snprintf(cnss_name, CNSS_FS_NAME_SIZE,
  3874. CNSS_FS_NAME "_%d", plat_priv->plat_idx);
  3875. snprintf(shutdown_name, sizeof(shutdown_name),
  3876. "shutdown_wlan_%d", plat_priv->plat_idx);
  3877. } else {
  3878. snprintf(cnss_name, CNSS_FS_NAME_SIZE, CNSS_FS_NAME);
  3879. snprintf(shutdown_name, sizeof(shutdown_name),
  3880. "shutdown_wlan");
  3881. }
  3882. sysfs_remove_link(kernel_kobj, shutdown_name);
  3883. sysfs_remove_link(kernel_kobj, cnss_name);
  3884. }
  3885. static int cnss_create_sysfs(struct cnss_plat_data *plat_priv)
  3886. {
  3887. int ret = 0;
  3888. ret = devm_device_add_group(&plat_priv->plat_dev->dev,
  3889. &cnss_attr_group);
  3890. if (ret) {
  3891. cnss_pr_err("Failed to create cnss device group, err = %d\n",
  3892. ret);
  3893. goto out;
  3894. }
  3895. cnss_create_sysfs_link(plat_priv);
  3896. return 0;
  3897. out:
  3898. return ret;
  3899. }
  3900. #if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 2, 0))
  3901. union cnss_device_group_devres {
  3902. const struct attribute_group *group;
  3903. };
  3904. static void devm_cnss_group_remove(struct device *dev, void *res)
  3905. {
  3906. union cnss_device_group_devres *devres = res;
  3907. const struct attribute_group *group = devres->group;
  3908. cnss_pr_dbg("%s: removing group %p\n", __func__, group);
  3909. sysfs_remove_group(&dev->kobj, group);
  3910. }
  3911. static int devm_cnss_group_match(struct device *dev, void *res, void *data)
  3912. {
  3913. return ((union cnss_device_group_devres *)res) == data;
  3914. }
  3915. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3916. {
  3917. cnss_remove_sysfs_link(plat_priv);
  3918. WARN_ON(devres_release(&plat_priv->plat_dev->dev,
  3919. devm_cnss_group_remove, devm_cnss_group_match,
  3920. (void *)&cnss_attr_group));
  3921. }
  3922. #else
  3923. static void cnss_remove_sysfs(struct cnss_plat_data *plat_priv)
  3924. {
  3925. cnss_remove_sysfs_link(plat_priv);
  3926. devm_device_remove_group(&plat_priv->plat_dev->dev, &cnss_attr_group);
  3927. }
  3928. #endif
  3929. static int cnss_event_work_init(struct cnss_plat_data *plat_priv)
  3930. {
  3931. spin_lock_init(&plat_priv->event_lock);
  3932. plat_priv->event_wq = alloc_workqueue("cnss_driver_event",
  3933. WQ_UNBOUND, 1);
  3934. if (!plat_priv->event_wq) {
  3935. cnss_pr_err("Failed to create event workqueue!\n");
  3936. return -EFAULT;
  3937. }
  3938. INIT_WORK(&plat_priv->event_work, cnss_driver_event_work);
  3939. INIT_LIST_HEAD(&plat_priv->event_list);
  3940. return 0;
  3941. }
  3942. static void cnss_event_work_deinit(struct cnss_plat_data *plat_priv)
  3943. {
  3944. destroy_workqueue(plat_priv->event_wq);
  3945. }
  3946. static int cnss_reboot_notifier(struct notifier_block *nb,
  3947. unsigned long action,
  3948. void *data)
  3949. {
  3950. struct cnss_plat_data *plat_priv =
  3951. container_of(nb, struct cnss_plat_data, reboot_nb);
  3952. set_bit(CNSS_IN_REBOOT, &plat_priv->driver_state);
  3953. cnss_bus_update_status(plat_priv, CNSS_SYS_REBOOT);
  3954. del_timer(&plat_priv->fw_boot_timer);
  3955. complete_all(&plat_priv->power_up_complete);
  3956. complete_all(&plat_priv->cal_complete);
  3957. cnss_pr_dbg("Reboot is in progress with action %d\n", action);
  3958. return NOTIFY_DONE;
  3959. }
  3960. #ifdef CONFIG_CNSS_HW_SECURE_DISABLE
  3961. #ifdef CONFIG_CNSS_HW_SECURE_SMEM
  3962. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3963. {
  3964. uint32_t *peripheralStateInfo = NULL;
  3965. size_t size = 0;
  3966. /* Once this flag is set, secure peripheral feature
  3967. * will not be supported till next reboot
  3968. */
  3969. if (plat_priv->sec_peri_feature_disable)
  3970. return 0;
  3971. peripheralStateInfo = qcom_smem_get(QCOM_SMEM_HOST_ANY, PERISEC_SMEM_ID, &size);
  3972. if (IS_ERR_OR_NULL(peripheralStateInfo)) {
  3973. if (PTR_ERR(peripheralStateInfo) != -ENOENT)
  3974. CNSS_ASSERT(0);
  3975. cnss_pr_dbg("Secure HW feature not enabled. ret = %d\n",
  3976. PTR_ERR(peripheralStateInfo));
  3977. plat_priv->sec_peri_feature_disable = true;
  3978. return 0;
  3979. }
  3980. cnss_pr_dbg("Secure HW state: %d\n", *peripheralStateInfo);
  3981. if ((*peripheralStateInfo >> (HW_WIFI_UID - 0x500)) & 0x1)
  3982. set_bit(CNSS_WLAN_HW_DISABLED,
  3983. &plat_priv->driver_state);
  3984. else
  3985. clear_bit(CNSS_WLAN_HW_DISABLED,
  3986. &plat_priv->driver_state);
  3987. return 0;
  3988. }
  3989. #else
  3990. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  3991. {
  3992. struct Object client_env;
  3993. struct Object app_object;
  3994. u32 wifi_uid = HW_WIFI_UID;
  3995. union ObjectArg obj_arg[2] = {{{0, 0}}};
  3996. int ret;
  3997. u8 state = 0;
  3998. /* Once this flag is set, secure peripheral feature
  3999. * will not be supported till next reboot
  4000. */
  4001. if (plat_priv->sec_peri_feature_disable)
  4002. return 0;
  4003. /* get rootObj */
  4004. ret = get_client_env_object(&client_env);
  4005. if (ret) {
  4006. cnss_pr_dbg("Failed to get client_env_object, ret: %d\n", ret);
  4007. goto end;
  4008. }
  4009. ret = IClientEnv_open(client_env, HW_STATE_UID, &app_object);
  4010. if (ret) {
  4011. cnss_pr_dbg("Failed to get app_object, ret: %d\n", ret);
  4012. if (ret == FEATURE_NOT_SUPPORTED) {
  4013. ret = 0; /* Do not Assert */
  4014. plat_priv->sec_peri_feature_disable = true;
  4015. cnss_pr_dbg("Secure HW feature not supported\n");
  4016. }
  4017. goto exit_release_clientenv;
  4018. }
  4019. obj_arg[0].b = (struct ObjectBuf) {&wifi_uid, sizeof(u32)};
  4020. obj_arg[1].b = (struct ObjectBuf) {&state, sizeof(u8)};
  4021. ret = Object_invoke(app_object, HW_OP_GET_STATE, obj_arg,
  4022. ObjectCounts_pack(1, 1, 0, 0));
  4023. cnss_pr_dbg("SMC invoke ret: %d state: %d\n", ret, state);
  4024. if (ret) {
  4025. if (ret == PERIPHERAL_NOT_FOUND) {
  4026. ret = 0; /* Do not Assert */
  4027. plat_priv->sec_peri_feature_disable = true;
  4028. cnss_pr_dbg("Secure HW mode is not updated. Peripheral not found\n");
  4029. }
  4030. goto exit_release_app_obj;
  4031. }
  4032. if (state == 1)
  4033. set_bit(CNSS_WLAN_HW_DISABLED,
  4034. &plat_priv->driver_state);
  4035. else
  4036. clear_bit(CNSS_WLAN_HW_DISABLED,
  4037. &plat_priv->driver_state);
  4038. exit_release_app_obj:
  4039. Object_release(app_object);
  4040. exit_release_clientenv:
  4041. Object_release(client_env);
  4042. end:
  4043. if (ret) {
  4044. cnss_pr_err("Unable to get HW disable status\n");
  4045. CNSS_ASSERT(0);
  4046. }
  4047. return ret;
  4048. }
  4049. #endif
  4050. #else
  4051. int cnss_wlan_hw_disable_check(struct cnss_plat_data *plat_priv)
  4052. {
  4053. return 0;
  4054. }
  4055. #endif
  4056. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  4057. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  4058. {
  4059. }
  4060. #else
  4061. static void cnss_sram_dump_init(struct cnss_plat_data *plat_priv)
  4062. {
  4063. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  4064. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  4065. plat_priv->sram_dump = kcalloc(SRAM_DUMP_SIZE, 1, GFP_KERNEL);
  4066. }
  4067. #endif
  4068. #if IS_ENABLED(CONFIG_WCNSS_MEM_PRE_ALLOC)
  4069. static void cnss_initialize_mem_pool(unsigned long device_id)
  4070. {
  4071. cnss_initialize_prealloc_pool(device_id);
  4072. }
  4073. static void cnss_deinitialize_mem_pool(void)
  4074. {
  4075. cnss_deinitialize_prealloc_pool();
  4076. }
  4077. #else
  4078. static void cnss_initialize_mem_pool(unsigned long device_id)
  4079. {
  4080. }
  4081. static void cnss_deinitialize_mem_pool(void)
  4082. {
  4083. }
  4084. #endif
  4085. static int cnss_misc_init(struct cnss_plat_data *plat_priv)
  4086. {
  4087. int ret;
  4088. ret = cnss_init_sol_gpio(plat_priv);
  4089. if (ret)
  4090. return ret;
  4091. timer_setup(&plat_priv->fw_boot_timer,
  4092. cnss_bus_fw_boot_timeout_hdlr, 0);
  4093. ret = device_init_wakeup(&plat_priv->plat_dev->dev, true);
  4094. if (ret)
  4095. cnss_pr_err("Failed to init platform device wakeup source, err = %d\n",
  4096. ret);
  4097. INIT_WORK(&plat_priv->recovery_work, cnss_recovery_work_handler);
  4098. init_completion(&plat_priv->power_up_complete);
  4099. init_completion(&plat_priv->cal_complete);
  4100. init_completion(&plat_priv->rddm_complete);
  4101. init_completion(&plat_priv->recovery_complete);
  4102. init_completion(&plat_priv->daemon_connected);
  4103. mutex_init(&plat_priv->dev_lock);
  4104. mutex_init(&plat_priv->driver_ops_lock);
  4105. plat_priv->reboot_nb.notifier_call = cnss_reboot_notifier;
  4106. ret = register_reboot_notifier(&plat_priv->reboot_nb);
  4107. if (ret)
  4108. cnss_pr_err("Failed to register reboot notifier, err = %d\n",
  4109. ret);
  4110. plat_priv->recovery_ws =
  4111. wakeup_source_register(&plat_priv->plat_dev->dev,
  4112. "CNSS_FW_RECOVERY");
  4113. if (!plat_priv->recovery_ws)
  4114. cnss_pr_err("Failed to setup FW recovery wake source\n");
  4115. ret = cnss_plat_ipc_register(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  4116. cnss_daemon_connection_update_cb,
  4117. plat_priv);
  4118. if (ret)
  4119. cnss_pr_err("QMI IPC connection call back register failed, err = %d\n",
  4120. ret);
  4121. cnss_sram_dump_init(plat_priv);
  4122. if (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4123. "qcom,rc-ep-short-channel"))
  4124. cnss_set_feature_list(plat_priv, CNSS_RC_EP_ULTRASHORT_CHANNEL_V01);
  4125. if (plat_priv->device_id == PEACH_DEVICE_ID)
  4126. cnss_set_feature_list(plat_priv, CNSS_AUX_UC_SUPPORT_V01);
  4127. return 0;
  4128. }
  4129. #ifdef CONFIG_DISABLE_CNSS_SRAM_DUMP
  4130. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  4131. {
  4132. }
  4133. #else
  4134. static void cnss_sram_dump_deinit(struct cnss_plat_data *plat_priv)
  4135. {
  4136. if (plat_priv->device_id == QCA6490_DEVICE_ID &&
  4137. cnss_get_host_build_type() == QMI_HOST_BUILD_TYPE_PRIMARY_V01)
  4138. kfree(plat_priv->sram_dump);
  4139. }
  4140. #endif
  4141. static void cnss_misc_deinit(struct cnss_plat_data *plat_priv)
  4142. {
  4143. cnss_plat_ipc_unregister(CNSS_PLAT_IPC_DAEMON_QMI_CLIENT_V01,
  4144. plat_priv);
  4145. complete_all(&plat_priv->recovery_complete);
  4146. complete_all(&plat_priv->rddm_complete);
  4147. complete_all(&plat_priv->cal_complete);
  4148. complete_all(&plat_priv->power_up_complete);
  4149. complete_all(&plat_priv->daemon_connected);
  4150. device_init_wakeup(&plat_priv->plat_dev->dev, false);
  4151. unregister_reboot_notifier(&plat_priv->reboot_nb);
  4152. del_timer(&plat_priv->fw_boot_timer);
  4153. wakeup_source_unregister(plat_priv->recovery_ws);
  4154. cnss_deinit_sol_gpio(plat_priv);
  4155. cnss_sram_dump_deinit(plat_priv);
  4156. kfree(plat_priv->on_chip_pmic_board_ids);
  4157. }
  4158. static void cnss_init_time_sync_period_default(struct cnss_plat_data *plat_priv)
  4159. {
  4160. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_WLAN] =
  4161. CNSS_TIME_SYNC_PERIOD_INVALID;
  4162. plat_priv->ctrl_params.time_sync_period_vote[TIME_SYNC_VOTE_CNSS] =
  4163. CNSS_TIME_SYNC_PERIOD_DEFAULT;
  4164. }
  4165. static void cnss_init_control_params(struct cnss_plat_data *plat_priv)
  4166. {
  4167. plat_priv->ctrl_params.quirks = CNSS_QUIRKS_DEFAULT;
  4168. plat_priv->cbc_enabled = !IS_ENABLED(CONFIG_CNSS_EMULATION) &&
  4169. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4170. "qcom,wlan-cbc-enabled");
  4171. plat_priv->ctrl_params.mhi_timeout = CNSS_MHI_TIMEOUT_DEFAULT;
  4172. plat_priv->ctrl_params.mhi_m2_timeout = CNSS_MHI_M2_TIMEOUT_DEFAULT;
  4173. plat_priv->ctrl_params.qmi_timeout = CNSS_QMI_TIMEOUT_DEFAULT;
  4174. plat_priv->ctrl_params.bdf_type = CNSS_BDF_TYPE_DEFAULT;
  4175. plat_priv->ctrl_params.time_sync_period = CNSS_TIME_SYNC_PERIOD_DEFAULT;
  4176. cnss_init_time_sync_period_default(plat_priv);
  4177. /* Set adsp_pc_enabled default value to true as ADSP pc is always
  4178. * enabled by default
  4179. */
  4180. plat_priv->adsp_pc_enabled = true;
  4181. }
  4182. static void cnss_get_pm_domain_info(struct cnss_plat_data *plat_priv)
  4183. {
  4184. struct device *dev = &plat_priv->plat_dev->dev;
  4185. plat_priv->use_pm_domain =
  4186. of_property_read_bool(dev->of_node, "use-pm-domain");
  4187. cnss_pr_dbg("use-pm-domain is %d\n", plat_priv->use_pm_domain);
  4188. }
  4189. static void cnss_get_wlaon_pwr_ctrl_info(struct cnss_plat_data *plat_priv)
  4190. {
  4191. struct device *dev = &plat_priv->plat_dev->dev;
  4192. plat_priv->set_wlaon_pwr_ctrl =
  4193. of_property_read_bool(dev->of_node, "qcom,set-wlaon-pwr-ctrl");
  4194. cnss_pr_dbg("set_wlaon_pwr_ctrl is %d\n",
  4195. plat_priv->set_wlaon_pwr_ctrl);
  4196. }
  4197. static bool cnss_use_fw_path_with_prefix(struct cnss_plat_data *plat_priv)
  4198. {
  4199. return (of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4200. "qcom,converged-dt") ||
  4201. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4202. "qcom,same-dt-multi-dev") ||
  4203. of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4204. "qcom,multi-wlan-exchg"));
  4205. }
  4206. static const struct platform_device_id cnss_platform_id_table[] = {
  4207. { .name = "qca6174", .driver_data = QCA6174_DEVICE_ID, },
  4208. { .name = "qca6290", .driver_data = QCA6290_DEVICE_ID, },
  4209. { .name = "qca6390", .driver_data = QCA6390_DEVICE_ID, },
  4210. { .name = "qca6490", .driver_data = QCA6490_DEVICE_ID, },
  4211. { .name = "kiwi", .driver_data = KIWI_DEVICE_ID, },
  4212. { .name = "mango", .driver_data = MANGO_DEVICE_ID, },
  4213. { .name = "peach", .driver_data = PEACH_DEVICE_ID, },
  4214. { .name = "qcaconv", .driver_data = 0, },
  4215. { },
  4216. };
  4217. static const struct of_device_id cnss_of_match_table[] = {
  4218. {
  4219. .compatible = "qcom,cnss",
  4220. .data = (void *)&cnss_platform_id_table[0]},
  4221. {
  4222. .compatible = "qcom,cnss-qca6290",
  4223. .data = (void *)&cnss_platform_id_table[1]},
  4224. {
  4225. .compatible = "qcom,cnss-qca6390",
  4226. .data = (void *)&cnss_platform_id_table[2]},
  4227. {
  4228. .compatible = "qcom,cnss-qca6490",
  4229. .data = (void *)&cnss_platform_id_table[3]},
  4230. {
  4231. .compatible = "qcom,cnss-kiwi",
  4232. .data = (void *)&cnss_platform_id_table[4]},
  4233. {
  4234. .compatible = "qcom,cnss-mango",
  4235. .data = (void *)&cnss_platform_id_table[5]},
  4236. {
  4237. .compatible = "qcom,cnss-peach",
  4238. .data = (void *)&cnss_platform_id_table[6]},
  4239. {
  4240. .compatible = "qcom,cnss-qca-converged",
  4241. .data = (void *)&cnss_platform_id_table[7]},
  4242. { },
  4243. };
  4244. MODULE_DEVICE_TABLE(of, cnss_of_match_table);
  4245. static inline bool
  4246. cnss_use_nv_mac(struct cnss_plat_data *plat_priv)
  4247. {
  4248. return of_property_read_bool(plat_priv->plat_dev->dev.of_node,
  4249. "use-nv-mac");
  4250. }
  4251. static int cnss_get_dev_cfg_node(struct cnss_plat_data *plat_priv)
  4252. {
  4253. struct device_node *child;
  4254. u32 id, i;
  4255. int id_n, device_identifier_gpio, ret;
  4256. u8 gpio_value;
  4257. if (plat_priv->dt_type != CNSS_DTT_CONVERGED)
  4258. return 0;
  4259. /* Parses the wlan_sw_ctrl gpio which is used to identify device */
  4260. ret = cnss_get_wlan_sw_ctrl(plat_priv);
  4261. if (ret) {
  4262. cnss_pr_dbg("Failed to parse wlan_sw_ctrl gpio, error:%d", ret);
  4263. return ret;
  4264. }
  4265. device_identifier_gpio = plat_priv->pinctrl_info.wlan_sw_ctrl_gpio;
  4266. gpio_value = gpio_get_value(device_identifier_gpio);
  4267. cnss_pr_dbg("Value of Device Identifier GPIO: %d\n", gpio_value);
  4268. for_each_available_child_of_node(plat_priv->plat_dev->dev.of_node,
  4269. child) {
  4270. if (strcmp(child->name, "chip_cfg"))
  4271. continue;
  4272. id_n = of_property_count_u32_elems(child, "supported-ids");
  4273. if (id_n <= 0) {
  4274. cnss_pr_err("Device id is NOT set\n");
  4275. return -EINVAL;
  4276. }
  4277. for (i = 0; i < id_n; i++) {
  4278. ret = of_property_read_u32_index(child,
  4279. "supported-ids",
  4280. i, &id);
  4281. if (ret) {
  4282. cnss_pr_err("Failed to read supported ids\n");
  4283. return -EINVAL;
  4284. }
  4285. if (gpio_value && id == QCA6490_DEVICE_ID) {
  4286. plat_priv->plat_dev->dev.of_node = child;
  4287. plat_priv->device_id = QCA6490_DEVICE_ID;
  4288. cnss_utils_update_device_type(CNSS_HSP_DEVICE_TYPE);
  4289. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  4290. child->name, i, id);
  4291. return 0;
  4292. } else if (!gpio_value && id == KIWI_DEVICE_ID) {
  4293. plat_priv->plat_dev->dev.of_node = child;
  4294. plat_priv->device_id = KIWI_DEVICE_ID;
  4295. cnss_utils_update_device_type(CNSS_HMT_DEVICE_TYPE);
  4296. cnss_pr_dbg("got node[%s@%d] for device[0x%x]\n",
  4297. child->name, i, id);
  4298. return 0;
  4299. }
  4300. }
  4301. }
  4302. return -EINVAL;
  4303. }
  4304. static inline u32
  4305. cnss_dt_type(struct cnss_plat_data *plat_priv)
  4306. {
  4307. bool is_converged_dt = of_property_read_bool(
  4308. plat_priv->plat_dev->dev.of_node, "qcom,converged-dt");
  4309. bool is_multi_wlan_xchg;
  4310. if (is_converged_dt)
  4311. return CNSS_DTT_CONVERGED;
  4312. is_multi_wlan_xchg = of_property_read_bool(
  4313. plat_priv->plat_dev->dev.of_node, "qcom,multi-wlan-exchg");
  4314. if (is_multi_wlan_xchg)
  4315. return CNSS_DTT_MULTIEXCHG;
  4316. return CNSS_DTT_LEGACY;
  4317. }
  4318. static int cnss_wlan_device_init(struct cnss_plat_data *plat_priv)
  4319. {
  4320. int ret = 0;
  4321. int retry = 0;
  4322. if (test_bit(SKIP_DEVICE_BOOT, &plat_priv->ctrl_params.quirks))
  4323. return 0;
  4324. retry:
  4325. ret = cnss_power_on_device(plat_priv, true);
  4326. if (ret)
  4327. goto end;
  4328. ret = cnss_bus_init(plat_priv);
  4329. if (ret) {
  4330. if ((ret != -EPROBE_DEFER) &&
  4331. retry++ < POWER_ON_RETRY_MAX_TIMES) {
  4332. cnss_power_off_device(plat_priv);
  4333. cnss_pr_dbg("Retry cnss_bus_init #%d\n", retry);
  4334. msleep(POWER_ON_RETRY_DELAY_MS * retry);
  4335. goto retry;
  4336. }
  4337. goto power_off;
  4338. }
  4339. return 0;
  4340. power_off:
  4341. cnss_power_off_device(plat_priv);
  4342. end:
  4343. return ret;
  4344. }
  4345. int cnss_wlan_hw_enable(void)
  4346. {
  4347. struct cnss_plat_data *plat_priv;
  4348. int ret = 0;
  4349. if (cnss_is_dual_wlan_enabled())
  4350. plat_priv = cnss_get_first_plat_priv(NULL);
  4351. else
  4352. plat_priv = cnss_get_plat_priv(NULL);
  4353. if (!plat_priv)
  4354. return -ENODEV;
  4355. clear_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state);
  4356. if (test_bit(CNSS_PCI_PROBE_DONE, &plat_priv->driver_state))
  4357. goto register_driver;
  4358. ret = cnss_wlan_device_init(plat_priv);
  4359. if (ret) {
  4360. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state))
  4361. CNSS_ASSERT(0);
  4362. return ret;
  4363. }
  4364. if (test_bit(CNSS_FS_READY, &plat_priv->driver_state))
  4365. cnss_driver_event_post(plat_priv,
  4366. CNSS_DRIVER_EVENT_COLD_BOOT_CAL_START,
  4367. 0, NULL);
  4368. register_driver:
  4369. if (plat_priv->driver_ops)
  4370. ret = cnss_wlan_register_driver(plat_priv->driver_ops);
  4371. return ret;
  4372. }
  4373. EXPORT_SYMBOL(cnss_wlan_hw_enable);
  4374. int cnss_set_wfc_mode(struct device *dev, struct cnss_wfc_cfg cfg)
  4375. {
  4376. struct cnss_plat_data *plat_priv = cnss_bus_dev_to_plat_priv(dev);
  4377. int ret = 0;
  4378. if (!plat_priv)
  4379. return -ENODEV;
  4380. /* If IMS server is connected, return success without QMI send */
  4381. if (test_bit(CNSS_IMS_CONNECTED, &plat_priv->driver_state)) {
  4382. cnss_pr_dbg("Ignore host request as IMS server is connected");
  4383. return ret;
  4384. }
  4385. ret = cnss_wlfw_send_host_wfc_call_status(plat_priv, cfg);
  4386. return ret;
  4387. }
  4388. EXPORT_SYMBOL(cnss_set_wfc_mode);
  4389. static int cnss_tcdev_get_max_state(struct thermal_cooling_device *tcdev,
  4390. unsigned long *thermal_state)
  4391. {
  4392. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4393. if (!tcdev || !tcdev->devdata) {
  4394. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4395. return -EINVAL;
  4396. }
  4397. cnss_tcdev = tcdev->devdata;
  4398. *thermal_state = cnss_tcdev->max_thermal_state;
  4399. return 0;
  4400. }
  4401. static int cnss_tcdev_get_cur_state(struct thermal_cooling_device *tcdev,
  4402. unsigned long *thermal_state)
  4403. {
  4404. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4405. if (!tcdev || !tcdev->devdata) {
  4406. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4407. return -EINVAL;
  4408. }
  4409. cnss_tcdev = tcdev->devdata;
  4410. *thermal_state = cnss_tcdev->curr_thermal_state;
  4411. return 0;
  4412. }
  4413. static int cnss_tcdev_set_cur_state(struct thermal_cooling_device *tcdev,
  4414. unsigned long thermal_state)
  4415. {
  4416. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4417. struct cnss_plat_data *plat_priv = cnss_get_plat_priv(NULL);
  4418. int ret = 0;
  4419. if (!tcdev || !tcdev->devdata) {
  4420. cnss_pr_err("tcdev or tcdev->devdata is null!\n");
  4421. return -EINVAL;
  4422. }
  4423. cnss_tcdev = tcdev->devdata;
  4424. if (thermal_state > cnss_tcdev->max_thermal_state)
  4425. return -EINVAL;
  4426. cnss_pr_vdbg("Cooling device set current state: %ld,for cdev id %d",
  4427. thermal_state, cnss_tcdev->tcdev_id);
  4428. mutex_lock(&plat_priv->tcdev_lock);
  4429. ret = cnss_bus_set_therm_cdev_state(plat_priv,
  4430. thermal_state,
  4431. cnss_tcdev->tcdev_id);
  4432. if (!ret)
  4433. cnss_tcdev->curr_thermal_state = thermal_state;
  4434. mutex_unlock(&plat_priv->tcdev_lock);
  4435. if (ret) {
  4436. cnss_pr_err("Setting Current Thermal State Failed: %d,for cdev id %d",
  4437. ret, cnss_tcdev->tcdev_id);
  4438. return ret;
  4439. }
  4440. return 0;
  4441. }
  4442. static struct thermal_cooling_device_ops cnss_cooling_ops = {
  4443. .get_max_state = cnss_tcdev_get_max_state,
  4444. .get_cur_state = cnss_tcdev_get_cur_state,
  4445. .set_cur_state = cnss_tcdev_set_cur_state,
  4446. };
  4447. int cnss_thermal_cdev_register(struct device *dev, unsigned long max_state,
  4448. int tcdev_id)
  4449. {
  4450. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4451. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4452. char cdev_node_name[THERMAL_NAME_LENGTH] = "";
  4453. struct device_node *dev_node;
  4454. int ret = 0;
  4455. if (!priv) {
  4456. cnss_pr_err("Platform driver is not initialized!\n");
  4457. return -ENODEV;
  4458. }
  4459. cnss_tcdev = kzalloc(sizeof(*cnss_tcdev), GFP_KERNEL);
  4460. if (!cnss_tcdev) {
  4461. cnss_pr_err("Failed to allocate cnss_tcdev object!\n");
  4462. return -ENOMEM;
  4463. }
  4464. cnss_tcdev->tcdev_id = tcdev_id;
  4465. cnss_tcdev->max_thermal_state = max_state;
  4466. snprintf(cdev_node_name, THERMAL_NAME_LENGTH,
  4467. "qcom,cnss_cdev%d", tcdev_id);
  4468. dev_node = of_find_node_by_name(NULL, cdev_node_name);
  4469. if (!dev_node) {
  4470. cnss_pr_err("Failed to get cooling device node\n");
  4471. kfree(cnss_tcdev);
  4472. return -EINVAL;
  4473. }
  4474. cnss_pr_dbg("tcdev node->name=%s\n", dev_node->name);
  4475. if (of_find_property(dev_node, "#cooling-cells", NULL)) {
  4476. cnss_tcdev->tcdev = thermal_of_cooling_device_register(dev_node,
  4477. cdev_node_name,
  4478. cnss_tcdev,
  4479. &cnss_cooling_ops);
  4480. if (IS_ERR_OR_NULL(cnss_tcdev->tcdev)) {
  4481. ret = PTR_ERR(cnss_tcdev->tcdev);
  4482. cnss_pr_err("Cooling device register failed: %d, for cdev id %d\n",
  4483. ret, cnss_tcdev->tcdev_id);
  4484. kfree(cnss_tcdev);
  4485. } else {
  4486. cnss_pr_dbg("Cooling device registered for cdev id %d",
  4487. cnss_tcdev->tcdev_id);
  4488. mutex_lock(&priv->tcdev_lock);
  4489. list_add(&cnss_tcdev->tcdev_list,
  4490. &priv->cnss_tcdev_list);
  4491. mutex_unlock(&priv->tcdev_lock);
  4492. }
  4493. } else {
  4494. cnss_pr_dbg("Cooling device registration not supported");
  4495. kfree(cnss_tcdev);
  4496. ret = -EOPNOTSUPP;
  4497. }
  4498. return ret;
  4499. }
  4500. EXPORT_SYMBOL(cnss_thermal_cdev_register);
  4501. void cnss_thermal_cdev_unregister(struct device *dev, int tcdev_id)
  4502. {
  4503. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4504. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4505. if (!priv) {
  4506. cnss_pr_err("Platform driver is not initialized!\n");
  4507. return;
  4508. }
  4509. mutex_lock(&priv->tcdev_lock);
  4510. while (!list_empty(&priv->cnss_tcdev_list)) {
  4511. cnss_tcdev = list_first_entry(&priv->cnss_tcdev_list,
  4512. struct cnss_thermal_cdev,
  4513. tcdev_list);
  4514. thermal_cooling_device_unregister(cnss_tcdev->tcdev);
  4515. list_del(&cnss_tcdev->tcdev_list);
  4516. kfree(cnss_tcdev);
  4517. }
  4518. mutex_unlock(&priv->tcdev_lock);
  4519. }
  4520. EXPORT_SYMBOL(cnss_thermal_cdev_unregister);
  4521. int cnss_get_curr_therm_cdev_state(struct device *dev,
  4522. unsigned long *thermal_state,
  4523. int tcdev_id)
  4524. {
  4525. struct cnss_plat_data *priv = cnss_get_plat_priv(NULL);
  4526. struct cnss_thermal_cdev *cnss_tcdev = NULL;
  4527. if (!priv) {
  4528. cnss_pr_err("Platform driver is not initialized!\n");
  4529. return -ENODEV;
  4530. }
  4531. mutex_lock(&priv->tcdev_lock);
  4532. list_for_each_entry(cnss_tcdev, &priv->cnss_tcdev_list, tcdev_list) {
  4533. if (cnss_tcdev->tcdev_id != tcdev_id)
  4534. continue;
  4535. *thermal_state = cnss_tcdev->curr_thermal_state;
  4536. mutex_unlock(&priv->tcdev_lock);
  4537. cnss_pr_dbg("Cooling device current state: %ld, for cdev id %d",
  4538. cnss_tcdev->curr_thermal_state, tcdev_id);
  4539. return 0;
  4540. }
  4541. mutex_unlock(&priv->tcdev_lock);
  4542. cnss_pr_dbg("Cooling device ID not found: %d", tcdev_id);
  4543. return -EINVAL;
  4544. }
  4545. EXPORT_SYMBOL(cnss_get_curr_therm_cdev_state);
  4546. static int cnss_probe(struct platform_device *plat_dev)
  4547. {
  4548. int ret = 0;
  4549. struct cnss_plat_data *plat_priv;
  4550. const struct of_device_id *of_id;
  4551. const struct platform_device_id *device_id;
  4552. if (cnss_get_plat_priv(plat_dev)) {
  4553. cnss_pr_err("Driver is already initialized!\n");
  4554. ret = -EEXIST;
  4555. goto out;
  4556. }
  4557. ret = cnss_plat_env_available();
  4558. if (ret)
  4559. goto out;
  4560. of_id = of_match_device(cnss_of_match_table, &plat_dev->dev);
  4561. if (!of_id || !of_id->data) {
  4562. cnss_pr_err("Failed to find of match device!\n");
  4563. ret = -ENODEV;
  4564. goto out;
  4565. }
  4566. device_id = of_id->data;
  4567. plat_priv = devm_kzalloc(&plat_dev->dev, sizeof(*plat_priv),
  4568. GFP_KERNEL);
  4569. if (!plat_priv) {
  4570. ret = -ENOMEM;
  4571. goto out;
  4572. }
  4573. plat_priv->plat_dev = plat_dev;
  4574. plat_priv->dev_node = NULL;
  4575. plat_priv->device_id = device_id->driver_data;
  4576. plat_priv->dt_type = cnss_dt_type(plat_priv);
  4577. cnss_pr_dbg("Probing platform driver from dt type: %d\n",
  4578. plat_priv->dt_type);
  4579. plat_priv->use_fw_path_with_prefix =
  4580. cnss_use_fw_path_with_prefix(plat_priv);
  4581. ret = cnss_get_dev_cfg_node(plat_priv);
  4582. if (ret) {
  4583. cnss_pr_err("Failed to get device cfg node, err = %d\n", ret);
  4584. goto reset_plat_dev;
  4585. }
  4586. cnss_initialize_mem_pool(plat_priv->device_id);
  4587. ret = cnss_get_pld_bus_ops_name(plat_priv);
  4588. if (ret)
  4589. cnss_pr_vdbg("Failed to find bus ops name, err = %d\n",
  4590. ret);
  4591. ret = cnss_get_rc_num(plat_priv);
  4592. if (ret)
  4593. cnss_pr_err("Failed to find PCIe RC number, err = %d\n", ret);
  4594. cnss_pr_dbg("rc_num=%d\n", plat_priv->rc_num);
  4595. plat_priv->bus_type = cnss_get_bus_type(plat_priv);
  4596. plat_priv->use_nv_mac = cnss_use_nv_mac(plat_priv);
  4597. cnss_set_plat_priv(plat_dev, plat_priv);
  4598. cnss_set_device_name(plat_priv);
  4599. platform_set_drvdata(plat_dev, plat_priv);
  4600. INIT_LIST_HEAD(&plat_priv->vreg_list);
  4601. INIT_LIST_HEAD(&plat_priv->clk_list);
  4602. cnss_get_pm_domain_info(plat_priv);
  4603. cnss_get_wlaon_pwr_ctrl_info(plat_priv);
  4604. cnss_power_misc_params_init(plat_priv);
  4605. cnss_get_tcs_info(plat_priv);
  4606. cnss_get_cpr_info(plat_priv);
  4607. cnss_aop_interface_init(plat_priv);
  4608. cnss_init_control_params(plat_priv);
  4609. ret = cnss_get_resources(plat_priv);
  4610. if (ret)
  4611. goto reset_ctx;
  4612. ret = cnss_register_esoc(plat_priv);
  4613. if (ret)
  4614. goto free_res;
  4615. ret = cnss_register_bus_scale(plat_priv);
  4616. if (ret)
  4617. goto unreg_esoc;
  4618. ret = cnss_create_sysfs(plat_priv);
  4619. if (ret)
  4620. goto unreg_bus_scale;
  4621. ret = cnss_event_work_init(plat_priv);
  4622. if (ret)
  4623. goto remove_sysfs;
  4624. ret = cnss_dms_init(plat_priv);
  4625. if (ret)
  4626. goto deinit_event_work;
  4627. ret = cnss_debugfs_create(plat_priv);
  4628. if (ret)
  4629. goto deinit_dms;
  4630. ret = cnss_misc_init(plat_priv);
  4631. if (ret)
  4632. goto destroy_debugfs;
  4633. ret = cnss_wlan_hw_disable_check(plat_priv);
  4634. if (ret)
  4635. goto deinit_misc;
  4636. /* Make sure all platform related init are done before
  4637. * device power on and bus init.
  4638. */
  4639. if (!test_bit(CNSS_WLAN_HW_DISABLED, &plat_priv->driver_state)) {
  4640. ret = cnss_wlan_device_init(plat_priv);
  4641. if (ret)
  4642. goto deinit_misc;
  4643. } else {
  4644. cnss_pr_info("WLAN HW Disabled. Defer PCI enumeration\n");
  4645. }
  4646. cnss_register_coex_service(plat_priv);
  4647. cnss_register_ims_service(plat_priv);
  4648. mutex_init(&plat_priv->tcdev_lock);
  4649. INIT_LIST_HEAD(&plat_priv->cnss_tcdev_list);
  4650. cnss_pr_info("Platform driver probed successfully.\n");
  4651. return 0;
  4652. deinit_misc:
  4653. cnss_misc_deinit(plat_priv);
  4654. destroy_debugfs:
  4655. cnss_debugfs_destroy(plat_priv);
  4656. deinit_dms:
  4657. cnss_dms_deinit(plat_priv);
  4658. deinit_event_work:
  4659. cnss_event_work_deinit(plat_priv);
  4660. remove_sysfs:
  4661. cnss_remove_sysfs(plat_priv);
  4662. unreg_bus_scale:
  4663. cnss_unregister_bus_scale(plat_priv);
  4664. unreg_esoc:
  4665. cnss_unregister_esoc(plat_priv);
  4666. free_res:
  4667. cnss_put_resources(plat_priv);
  4668. reset_ctx:
  4669. cnss_aop_interface_deinit(plat_priv);
  4670. platform_set_drvdata(plat_dev, NULL);
  4671. cnss_deinitialize_mem_pool();
  4672. reset_plat_dev:
  4673. cnss_clear_plat_priv(plat_priv);
  4674. out:
  4675. return ret;
  4676. }
  4677. static int cnss_remove(struct platform_device *plat_dev)
  4678. {
  4679. struct cnss_plat_data *plat_priv = platform_get_drvdata(plat_dev);
  4680. plat_priv->audio_iommu_domain = NULL;
  4681. cnss_genl_exit();
  4682. cnss_unregister_ims_service(plat_priv);
  4683. cnss_unregister_coex_service(plat_priv);
  4684. cnss_bus_deinit(plat_priv);
  4685. cnss_misc_deinit(plat_priv);
  4686. cnss_debugfs_destroy(plat_priv);
  4687. cnss_dms_deinit(plat_priv);
  4688. cnss_qmi_deinit(plat_priv);
  4689. cnss_event_work_deinit(plat_priv);
  4690. cnss_cancel_dms_work();
  4691. cnss_remove_sysfs(plat_priv);
  4692. cnss_unregister_bus_scale(plat_priv);
  4693. cnss_unregister_esoc(plat_priv);
  4694. cnss_put_resources(plat_priv);
  4695. cnss_aop_interface_deinit(plat_priv);
  4696. cnss_deinitialize_mem_pool();
  4697. platform_set_drvdata(plat_dev, NULL);
  4698. cnss_clear_plat_priv(plat_priv);
  4699. return 0;
  4700. }
  4701. static struct platform_driver cnss_platform_driver = {
  4702. .probe = cnss_probe,
  4703. .remove = cnss_remove,
  4704. .driver = {
  4705. .name = "cnss2",
  4706. .of_match_table = cnss_of_match_table,
  4707. #ifdef CONFIG_CNSS_ASYNC
  4708. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  4709. #endif
  4710. },
  4711. };
  4712. static bool cnss_check_compatible_node(void)
  4713. {
  4714. struct device_node *dn = NULL;
  4715. for_each_matching_node(dn, cnss_of_match_table) {
  4716. if (of_device_is_available(dn)) {
  4717. cnss_allow_driver_loading = true;
  4718. return true;
  4719. }
  4720. }
  4721. return false;
  4722. }
  4723. /**
  4724. * cnss_is_valid_dt_node_found - Check if valid device tree node present
  4725. *
  4726. * Valid device tree node means a node with "compatible" property from the
  4727. * device match table and "status" property is not disabled.
  4728. *
  4729. * Return: true if valid device tree node found, false if not found
  4730. */
  4731. static bool cnss_is_valid_dt_node_found(void)
  4732. {
  4733. struct device_node *dn = NULL;
  4734. for_each_matching_node(dn, cnss_of_match_table) {
  4735. if (of_device_is_available(dn))
  4736. break;
  4737. }
  4738. if (dn)
  4739. return true;
  4740. return false;
  4741. }
  4742. static int __init cnss_initialize(void)
  4743. {
  4744. int ret = 0;
  4745. if (!cnss_is_valid_dt_node_found())
  4746. return -ENODEV;
  4747. if (!cnss_check_compatible_node())
  4748. return ret;
  4749. cnss_debug_init();
  4750. ret = platform_driver_register(&cnss_platform_driver);
  4751. if (ret)
  4752. cnss_debug_deinit();
  4753. ret = cnss_genl_init();
  4754. if (ret < 0)
  4755. cnss_pr_err("CNSS genl init failed %d\n", ret);
  4756. return ret;
  4757. }
  4758. static void __exit cnss_exit(void)
  4759. {
  4760. cnss_genl_exit();
  4761. platform_driver_unregister(&cnss_platform_driver);
  4762. cnss_debug_deinit();
  4763. }
  4764. module_init(cnss_initialize);
  4765. module_exit(cnss_exit);
  4766. MODULE_LICENSE("GPL v2");
  4767. MODULE_DESCRIPTION("CNSS2 Platform Driver");