dp_rx_err.c 36 KB

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  1. /*
  2. * Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "dp_internal.h"
  22. #include "hal_api.h"
  23. #include "qdf_trace.h"
  24. #include "qdf_nbuf.h"
  25. #ifdef CONFIG_MCL
  26. #include <cds_ieee80211_common.h>
  27. #else
  28. #include <linux/ieee80211.h>
  29. #endif
  30. #include "dp_rx_defrag.h"
  31. #include <enet.h> /* LLC_SNAP_HDR_LEN */
  32. #ifdef RX_DESC_DEBUG_CHECK
  33. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  34. {
  35. if (qdf_unlikely(rx_desc->magic != DP_RX_DESC_MAGIC)) {
  36. return false;
  37. }
  38. rx_desc->magic = 0;
  39. return true;
  40. }
  41. #else
  42. static inline bool dp_rx_desc_check_magic(struct dp_rx_desc *rx_desc)
  43. {
  44. return true;
  45. }
  46. #endif
  47. /**
  48. * dp_rx_link_desc_return() - Return a MPDU link descriptor to HW
  49. * (WBM), following error handling
  50. *
  51. * @soc: core DP main context
  52. * @ring_desc: opaque pointer to the REO error ring descriptor
  53. *
  54. * Return: QDF_STATUS
  55. */
  56. static QDF_STATUS
  57. dp_rx_link_desc_return(struct dp_soc *soc, void *ring_desc, uint8_t bm_action)
  58. {
  59. void *buf_addr_info = HAL_RX_REO_BUF_ADDR_INFO_GET(ring_desc);
  60. struct dp_srng *wbm_desc_rel_ring = &soc->wbm_desc_rel_ring;
  61. void *wbm_rel_srng = wbm_desc_rel_ring->hal_srng;
  62. void *hal_soc = soc->hal_soc;
  63. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  64. void *src_srng_desc;
  65. if (!wbm_rel_srng) {
  66. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  67. "WBM RELEASE RING not initialized");
  68. return status;
  69. }
  70. if (qdf_unlikely(hal_srng_access_start(hal_soc, wbm_rel_srng))) {
  71. /* TODO */
  72. /*
  73. * Need API to convert from hal_ring pointer to
  74. * Ring Type / Ring Id combo
  75. */
  76. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  77. FL("HAL RING Access For WBM Release SRNG Failed - %pK"),
  78. wbm_rel_srng);
  79. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  80. goto done;
  81. }
  82. src_srng_desc = hal_srng_src_get_next(hal_soc, wbm_rel_srng);
  83. if (qdf_likely(src_srng_desc)) {
  84. /* Return link descriptor through WBM ring (SW2WBM)*/
  85. hal_rx_msdu_link_desc_set(hal_soc,
  86. src_srng_desc, buf_addr_info, bm_action);
  87. status = QDF_STATUS_SUCCESS;
  88. } else {
  89. struct hal_srng *srng = (struct hal_srng *)wbm_rel_srng;
  90. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  91. FL("WBM Release Ring (Id %d) Full"), srng->ring_id);
  92. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  93. "HP 0x%x Reap HP 0x%x TP 0x%x Cached TP 0x%x",
  94. *srng->u.src_ring.hp_addr, srng->u.src_ring.reap_hp,
  95. *srng->u.src_ring.tp_addr, srng->u.src_ring.cached_tp);
  96. }
  97. done:
  98. hal_srng_access_end(hal_soc, wbm_rel_srng);
  99. return status;
  100. }
  101. /**
  102. * dp_rx_msdus_drop() - Drops all MSDU's per MPDU
  103. *
  104. * @soc: core txrx main context
  105. * @ring_desc: opaque pointer to the REO error ring descriptor
  106. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  107. * @head: head of the local descriptor free-list
  108. * @tail: tail of the local descriptor free-list
  109. * @quota: No. of units (packets) that can be serviced in one shot.
  110. *
  111. * This function is used to drop all MSDU in an MPDU
  112. *
  113. * Return: uint32_t: No. of elements processed
  114. */
  115. static uint32_t dp_rx_msdus_drop(struct dp_soc *soc, void *ring_desc,
  116. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  117. union dp_rx_desc_list_elem_t **head,
  118. union dp_rx_desc_list_elem_t **tail,
  119. uint32_t quota)
  120. {
  121. uint32_t rx_bufs_used = 0;
  122. void *link_desc_va;
  123. struct hal_buf_info buf_info;
  124. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  125. int i;
  126. uint8_t *rx_tlv_hdr;
  127. uint32_t tid;
  128. hal_rx_reo_buf_paddr_get(ring_desc, &buf_info);
  129. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  130. /* No UNMAP required -- this is "malloc_consistent" memory */
  131. hal_rx_msdu_list_get(link_desc_va, &msdu_list,
  132. &mpdu_desc_info->msdu_count);
  133. for (i = 0; (i < mpdu_desc_info->msdu_count) && quota--; i++) {
  134. struct dp_rx_desc *rx_desc =
  135. dp_rx_cookie_2_va_rxdma_buf(soc,
  136. msdu_list.sw_cookie[i]);
  137. qdf_assert(rx_desc);
  138. if (!dp_rx_desc_check_magic(rx_desc)) {
  139. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  140. FL("Invalid rx_desc cookie=%d"),
  141. msdu_list.sw_cookie[i]);
  142. return rx_bufs_used;
  143. }
  144. rx_bufs_used++;
  145. tid = hal_rx_mpdu_start_tid_get(rx_desc->rx_buf_start);
  146. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  147. "Packet received with PN error for tid :%d", tid);
  148. rx_tlv_hdr = qdf_nbuf_data(rx_desc->nbuf);
  149. if (hal_rx_encryption_info_valid(rx_tlv_hdr))
  150. hal_rx_print_pn(rx_tlv_hdr);
  151. /* Just free the buffers */
  152. qdf_nbuf_free(rx_desc->nbuf);
  153. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  154. }
  155. /* Return link descriptor through WBM ring (SW2WBM)*/
  156. dp_rx_link_desc_return(soc, ring_desc, HAL_BM_ACTION_PUT_IN_IDLE_LIST);
  157. return rx_bufs_used;
  158. }
  159. /**
  160. * dp_rx_pn_error_handle() - Handles PN check errors
  161. *
  162. * @soc: core txrx main context
  163. * @ring_desc: opaque pointer to the REO error ring descriptor
  164. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  165. * @head: head of the local descriptor free-list
  166. * @tail: tail of the local descriptor free-list
  167. * @quota: No. of units (packets) that can be serviced in one shot.
  168. *
  169. * This function implements PN error handling
  170. * If the peer is configured to ignore the PN check errors
  171. * or if DP feels, that this frame is still OK, the frame can be
  172. * re-injected back to REO to use some of the other features
  173. * of REO e.g. duplicate detection/routing to other cores
  174. *
  175. * Return: uint32_t: No. of elements processed
  176. */
  177. static uint32_t
  178. dp_rx_pn_error_handle(struct dp_soc *soc, void *ring_desc,
  179. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  180. union dp_rx_desc_list_elem_t **head,
  181. union dp_rx_desc_list_elem_t **tail,
  182. uint32_t quota)
  183. {
  184. uint16_t peer_id;
  185. uint32_t rx_bufs_used = 0;
  186. struct dp_peer *peer;
  187. bool peer_pn_policy = false;
  188. peer_id = DP_PEER_METADATA_PEER_ID_GET(
  189. mpdu_desc_info->peer_meta_data);
  190. peer = dp_peer_find_by_id(soc, peer_id);
  191. if (qdf_likely(peer)) {
  192. /*
  193. * TODO: Check for peer specific policies & set peer_pn_policy
  194. */
  195. }
  196. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  197. "Packet received with PN error");
  198. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  199. "discard rx due to PN error for peer %pK "
  200. "(%02x:%02x:%02x:%02x:%02x:%02x)\n",
  201. peer,
  202. peer->mac_addr.raw[0], peer->mac_addr.raw[1],
  203. peer->mac_addr.raw[2], peer->mac_addr.raw[3],
  204. peer->mac_addr.raw[4], peer->mac_addr.raw[5]);
  205. /* No peer PN policy -- definitely drop */
  206. if (!peer_pn_policy)
  207. rx_bufs_used = dp_rx_msdus_drop(soc, ring_desc,
  208. mpdu_desc_info,
  209. head, tail, quota);
  210. return rx_bufs_used;
  211. }
  212. /**
  213. * dp_rx_2k_jump_handle() - Handles Sequence Number Jump by 2K
  214. *
  215. * @soc: core txrx main context
  216. * @ring_desc: opaque pointer to the REO error ring descriptor
  217. * @mpdu_desc_info: MPDU descriptor information from ring descriptor
  218. * @head: head of the local descriptor free-list
  219. * @tail: tail of the local descriptor free-list
  220. * @quota: No. of units (packets) that can be serviced in one shot.
  221. *
  222. * This function implements the error handling when sequence number
  223. * of the MPDU jumps suddenly by 2K.Today there are 2 cases that
  224. * need to be handled:
  225. * A) CSN (Current Sequence Number) = Last Valid SN (LSN) + 2K
  226. * B) CSN = LSN + 2K, but falls within a "BA sized window" of the SSN
  227. * For case A) the protocol stack is invoked to generate DELBA/DEAUTH frame
  228. * For case B), the frame is normally dropped, no more action is taken
  229. *
  230. * Return: uint32_t: No. of elements processed
  231. */
  232. static uint32_t
  233. dp_rx_2k_jump_handle(struct dp_soc *soc, void *ring_desc,
  234. struct hal_rx_mpdu_desc_info *mpdu_desc_info,
  235. union dp_rx_desc_list_elem_t **head,
  236. union dp_rx_desc_list_elem_t **tail,
  237. uint32_t quota)
  238. {
  239. return dp_rx_msdus_drop(soc, ring_desc, mpdu_desc_info,
  240. head, tail, quota);
  241. }
  242. static bool
  243. dp_rx_chain_msdus(struct dp_soc *soc, qdf_nbuf_t nbuf,
  244. struct dp_rx_desc *rx_desc, uint8_t mac_id)
  245. {
  246. bool mpdu_done = false;
  247. /* TODO: Currently only single radio is supported, hence
  248. * pdev hard coded to '0' index
  249. */
  250. struct dp_pdev *dp_pdev = soc->pdev_list[mac_id];
  251. if (hal_rx_msdu_end_first_msdu_get(rx_desc->rx_buf_start)) {
  252. qdf_nbuf_set_rx_chfrag_start(rx_desc->nbuf, 1);
  253. dp_pdev->invalid_peer_head_msdu = NULL;
  254. dp_pdev->invalid_peer_tail_msdu = NULL;
  255. hal_rx_mon_hw_desc_get_mpdu_status(rx_desc->rx_buf_start,
  256. &(dp_pdev->ppdu_info.rx_status));
  257. }
  258. if (hal_rx_msdu_end_last_msdu_get(rx_desc->rx_buf_start)) {
  259. qdf_nbuf_set_rx_chfrag_end(rx_desc->nbuf, 1);
  260. mpdu_done = true;
  261. }
  262. DP_RX_LIST_APPEND(dp_pdev->invalid_peer_head_msdu,
  263. dp_pdev->invalid_peer_tail_msdu,
  264. nbuf);
  265. return mpdu_done;
  266. }
  267. /**
  268. * dp_rx_null_q_desc_handle() - Function to handle NULL Queue
  269. * descriptor violation on either a
  270. * REO or WBM ring
  271. *
  272. * @soc: core DP main context
  273. * @rx_desc : pointer to the sw rx descriptor
  274. * @head: pointer to head of rx descriptors to be added to free list
  275. * @tail: pointer to tail of rx descriptors to be added to free list
  276. * quota: upper limit of descriptors that can be reaped
  277. *
  278. * This function handles NULL queue descriptor violations arising out
  279. * a missing REO queue for a given peer or a given TID. This typically
  280. * may happen if a packet is received on a QOS enabled TID before the
  281. * ADDBA negotiation for that TID, when the TID queue is setup. Or
  282. * it may also happen for MC/BC frames if they are not routed to the
  283. * non-QOS TID queue, in the absence of any other default TID queue.
  284. * This error can show up both in a REO destination or WBM release ring.
  285. *
  286. * Return: uint32_t: No. of Rx buffers reaped
  287. */
  288. static uint32_t
  289. dp_rx_null_q_desc_handle(struct dp_soc *soc, struct dp_rx_desc *rx_desc,
  290. union dp_rx_desc_list_elem_t **head,
  291. union dp_rx_desc_list_elem_t **tail,
  292. uint32_t quota)
  293. {
  294. uint32_t rx_bufs_used = 0;
  295. uint32_t pkt_len, l2_hdr_offset;
  296. uint16_t msdu_len;
  297. qdf_nbuf_t nbuf;
  298. struct dp_vdev *vdev;
  299. uint16_t peer_id = 0xFFFF;
  300. struct dp_peer *peer = NULL;
  301. uint32_t sgi, rate_mcs, tid;
  302. struct dp_ast_entry *ase;
  303. uint16_t sa_idx;
  304. uint8_t *data;
  305. uint8_t pool_id;
  306. rx_bufs_used++;
  307. nbuf = rx_desc->nbuf;
  308. qdf_nbuf_unmap_single(soc->osdev, nbuf,
  309. QDF_DMA_BIDIRECTIONAL);
  310. rx_desc->rx_buf_start = qdf_nbuf_data(nbuf);
  311. pool_id = rx_desc->pool_id;
  312. qdf_nbuf_set_rx_chfrag_start(nbuf,
  313. hal_rx_msdu_end_first_msdu_get(rx_desc->rx_buf_start));
  314. qdf_nbuf_set_rx_chfrag_end(nbuf,
  315. hal_rx_msdu_end_last_msdu_get(rx_desc->rx_buf_start));
  316. l2_hdr_offset =
  317. hal_rx_msdu_end_l3_hdr_padding_get(rx_desc->rx_buf_start);
  318. msdu_len = hal_rx_msdu_start_msdu_len_get(rx_desc->rx_buf_start);
  319. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  320. /* Set length in nbuf */
  321. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  322. /*
  323. * Check if DMA completed -- msdu_done is the last bit
  324. * to be written
  325. */
  326. if (!hal_rx_attn_msdu_done_get(rx_desc->rx_buf_start)) {
  327. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  328. FL("MSDU DONE failure"));
  329. hal_rx_dump_pkt_tlvs(rx_desc->rx_buf_start,
  330. QDF_TRACE_LEVEL_INFO);
  331. qdf_assert(0);
  332. }
  333. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_desc->rx_buf_start);
  334. peer = dp_peer_find_by_id(soc, peer_id);
  335. if (!peer) {
  336. bool mpdu_done = false;
  337. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  338. FL("peer is NULL"));
  339. mpdu_done = dp_rx_chain_msdus(soc, nbuf, rx_desc, pool_id);
  340. if (mpdu_done)
  341. dp_rx_process_invalid_peer(soc, nbuf);
  342. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  343. return rx_bufs_used;
  344. }
  345. vdev = peer->vdev;
  346. if (!vdev) {
  347. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  348. FL("INVALID vdev %pK OR osif_rx"), vdev);
  349. /* Drop & free packet */
  350. qdf_nbuf_free(nbuf);
  351. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  352. goto fail;
  353. }
  354. sgi = hal_rx_msdu_start_sgi_get(rx_desc->rx_buf_start);
  355. rate_mcs = hal_rx_msdu_start_rate_mcs_get(rx_desc->rx_buf_start);
  356. tid = hal_rx_mpdu_start_tid_get(rx_desc->rx_buf_start);
  357. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  358. "%s: %d, SGI: %d, rate_mcs: %d, tid: %d",
  359. __func__, __LINE__, sgi, rate_mcs, tid);
  360. /*
  361. * Advance the packet start pointer by total size of
  362. * pre-header TLV's
  363. */
  364. qdf_nbuf_pull_head(nbuf, (l2_hdr_offset + RX_PKT_TLVS_LEN));
  365. /*
  366. * Multicast Echo Check is required only if vdev is STA and
  367. * received pkt is a multicast/broadcast pkt. otherwise
  368. * skip the MEC check.
  369. */
  370. if (vdev->opmode != wlan_op_mode_sta)
  371. goto skip_mec_check;
  372. if (!hal_rx_msdu_end_da_is_mcbc_get(rx_desc->rx_buf_start))
  373. goto skip_mec_check;
  374. data = qdf_nbuf_data(nbuf);
  375. /*
  376. * if the received pkts src mac addr matches with vdev
  377. * mac address then drop the pkt as it is looped back
  378. */
  379. if (!(memcmp(&data[DP_MAC_ADDR_LEN],
  380. vdev->mac_addr.raw,
  381. DP_MAC_ADDR_LEN))) {
  382. qdf_nbuf_free(nbuf);
  383. goto fail;
  384. }
  385. /* if the received pkts src mac addr matches with the
  386. * wired PCs MAC addr which is behind the STA or with
  387. * wireless STAs MAC addr which are behind the Repeater,
  388. * then drop the pkt as it is looped back
  389. */
  390. qdf_spin_lock_bh(&soc->ast_lock);
  391. if (hal_rx_msdu_end_sa_is_valid_get(rx_desc->rx_buf_start)) {
  392. sa_idx = hal_rx_msdu_end_sa_idx_get(rx_desc->rx_buf_start);
  393. if ((sa_idx < 0) || (sa_idx > (WLAN_UMAC_PSOC_MAX_PEERS * 2))) {
  394. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  395. "invalid sa_idx: %d", sa_idx);
  396. qdf_assert_always(0);
  397. }
  398. ase = soc->ast_table[sa_idx];
  399. } else
  400. ase = dp_peer_ast_hash_find(soc, &data[DP_MAC_ADDR_LEN], 0);
  401. if (ase) {
  402. if ((ase->type == CDP_TXRX_AST_TYPE_MEC) ||
  403. (ase->peer != peer)) {
  404. qdf_spin_unlock_bh(&soc->ast_lock);
  405. QDF_TRACE(QDF_MODULE_ID_DP,
  406. QDF_TRACE_LEVEL_INFO,
  407. "received pkt with same src mac %pM",
  408. &data[DP_MAC_ADDR_LEN]);
  409. qdf_nbuf_free(nbuf);
  410. goto fail;
  411. }
  412. }
  413. qdf_spin_unlock_bh(&soc->ast_lock);
  414. skip_mec_check:
  415. if (qdf_unlikely((peer->nawds_enabled == true) &&
  416. hal_rx_msdu_end_da_is_mcbc_get(rx_desc->rx_buf_start)
  417. )) {
  418. QDF_TRACE(QDF_MODULE_ID_DP,
  419. QDF_TRACE_LEVEL_DEBUG,
  420. "%s free buffer for multicast packet",
  421. __func__);
  422. DP_STATS_INC_PKT(peer, rx.nawds_mcast_drop,
  423. 1, qdf_nbuf_len(nbuf));
  424. qdf_nbuf_free(nbuf);
  425. goto fail;
  426. }
  427. if (!dp_wds_rx_policy_check(rx_desc->rx_buf_start, vdev, peer,
  428. hal_rx_msdu_end_da_is_mcbc_get(rx_desc->rx_buf_start))) {
  429. QDF_TRACE(QDF_MODULE_ID_DP,
  430. QDF_TRACE_LEVEL_ERROR,
  431. FL("mcast Policy Check Drop pkt"));
  432. /* Drop & free packet */
  433. qdf_nbuf_free(nbuf);
  434. goto fail;
  435. }
  436. /* WDS Source Port Learning */
  437. if (qdf_likely(vdev->rx_decap_type == htt_cmn_pkt_type_ethernet))
  438. dp_rx_wds_srcport_learn(soc, rx_desc->rx_buf_start, peer, nbuf);
  439. if (hal_rx_mpdu_start_mpdu_qos_control_valid_get(
  440. rx_desc->rx_buf_start)) {
  441. /* TODO: Assuming that qos_control_valid also indicates
  442. * unicast. Should we check this?
  443. */
  444. if (peer &&
  445. peer->rx_tid[tid].hw_qdesc_vaddr_unaligned == NULL) {
  446. /* IEEE80211_SEQ_MAX indicates invalid start_seq */
  447. dp_rx_tid_setup_wifi3(peer, tid, 1, IEEE80211_SEQ_MAX);
  448. }
  449. }
  450. #ifdef QCA_WIFI_NAPIER_EMULATION /* Debug code, remove later */
  451. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  452. "%s: p_id %d msdu_len %d hdr_off %d",
  453. __func__, peer_id, msdu_len, l2_hdr_offset);
  454. print_hex_dump(KERN_ERR,
  455. "\t Pkt Data:", DUMP_PREFIX_NONE, 32, 4,
  456. qdf_nbuf_data(nbuf), 128, false);
  457. #endif /* NAPIER_EMULATION */
  458. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  459. qdf_nbuf_set_next(nbuf, NULL);
  460. dp_rx_deliver_raw(vdev, nbuf, peer);
  461. } else {
  462. if (qdf_unlikely(peer->bss_peer)) {
  463. QDF_TRACE(QDF_MODULE_ID_DP,
  464. QDF_TRACE_LEVEL_INFO,
  465. FL("received pkt with same src MAC"));
  466. /* Drop & free packet */
  467. qdf_nbuf_free(nbuf);
  468. goto fail;
  469. }
  470. if (vdev->osif_rx) {
  471. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO,
  472. FL("vdev %pK osif_rx %pK"), vdev,
  473. vdev->osif_rx);
  474. qdf_nbuf_set_next(nbuf, NULL);
  475. vdev->osif_rx(vdev->osif_vdev, nbuf);
  476. DP_STATS_INC(vdev->pdev, rx.to_stack.num, 1);
  477. } else {
  478. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  479. FL("INVALID vdev %pK OR osif_rx"), vdev);
  480. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  481. }
  482. }
  483. fail:
  484. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  485. return rx_bufs_used;
  486. }
  487. /**
  488. * dp_rx_err_deliver() - Function to deliver error frames to OS
  489. *
  490. * @soc: core DP main context
  491. * @rx_desc : pointer to the sw rx descriptor
  492. * @head: pointer to head of rx descriptors to be added to free list
  493. * @tail: pointer to tail of rx descriptors to be added to free list
  494. * quota: upper limit of descriptors that can be reaped
  495. *
  496. * Return: uint32_t: No. of Rx buffers reaped
  497. */
  498. static uint32_t
  499. dp_rx_err_deliver(struct dp_soc *soc, struct dp_rx_desc *rx_desc,
  500. union dp_rx_desc_list_elem_t **head,
  501. union dp_rx_desc_list_elem_t **tail,
  502. uint32_t quota)
  503. {
  504. uint32_t rx_bufs_used = 0;
  505. uint32_t pkt_len, l2_hdr_offset;
  506. uint16_t msdu_len;
  507. qdf_nbuf_t nbuf;
  508. struct dp_vdev *vdev;
  509. uint16_t peer_id = 0xFFFF;
  510. struct dp_peer *peer = NULL;
  511. rx_bufs_used++;
  512. nbuf = rx_desc->nbuf;
  513. qdf_nbuf_unmap_single(soc->osdev, nbuf,
  514. QDF_DMA_BIDIRECTIONAL);
  515. rx_desc->rx_buf_start = qdf_nbuf_data(nbuf);
  516. /*
  517. * Check if DMA completed -- msdu_done is the last bit
  518. * to be written
  519. */
  520. if (!hal_rx_attn_msdu_done_get(rx_desc->rx_buf_start)) {
  521. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  522. FL("MSDU DONE failure"));
  523. hal_rx_dump_pkt_tlvs(rx_desc->rx_buf_start,
  524. QDF_TRACE_LEVEL_INFO);
  525. qdf_assert(0);
  526. }
  527. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_desc->rx_buf_start);
  528. peer = dp_peer_find_by_id(soc, peer_id);
  529. if (!peer) {
  530. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  531. FL("peer is NULL"));
  532. DP_STATS_INC_PKT(soc, rx.err.rx_invalid_peer, 1,
  533. qdf_nbuf_len(nbuf));
  534. /* Drop & free packet */
  535. qdf_nbuf_free(nbuf);
  536. goto fail;
  537. }
  538. vdev = peer->vdev;
  539. if (!vdev) {
  540. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  541. FL("INVALID vdev %pK OR osif_rx"), vdev);
  542. /* Drop & free packet */
  543. qdf_nbuf_free(nbuf);
  544. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  545. goto fail;
  546. }
  547. /* Drop & free packet if mesh mode not enabled */
  548. if (!vdev->mesh_vdev) {
  549. qdf_nbuf_free(nbuf);
  550. DP_STATS_INC(soc, rx.err.invalid_vdev, 1);
  551. goto fail;
  552. }
  553. l2_hdr_offset =
  554. hal_rx_msdu_end_l3_hdr_padding_get(rx_desc->rx_buf_start);
  555. msdu_len =
  556. hal_rx_msdu_start_msdu_len_get(rx_desc->rx_buf_start);
  557. pkt_len = msdu_len + l2_hdr_offset + RX_PKT_TLVS_LEN;
  558. /* Set length in nbuf */
  559. qdf_nbuf_set_pktlen(nbuf, pkt_len);
  560. qdf_nbuf_set_next(nbuf, NULL);
  561. /*
  562. * Advance the packet start pointer by total size of
  563. * pre-header TLV's
  564. */
  565. qdf_nbuf_pull_head(nbuf, (l2_hdr_offset + RX_PKT_TLVS_LEN));
  566. qdf_nbuf_set_rx_chfrag_start(nbuf, 1);
  567. qdf_nbuf_set_rx_chfrag_end(nbuf, 1);
  568. if (dp_rx_filter_mesh_packets(vdev, nbuf,
  569. rx_desc->rx_buf_start)
  570. == QDF_STATUS_SUCCESS) {
  571. QDF_TRACE(QDF_MODULE_ID_DP,
  572. QDF_TRACE_LEVEL_INFO_MED,
  573. FL("mesh pkt filtered"));
  574. DP_STATS_INC(vdev->pdev, dropped.mesh_filter,
  575. 1);
  576. qdf_nbuf_free(nbuf);
  577. goto fail;
  578. }
  579. dp_rx_fill_mesh_stats(vdev, nbuf, rx_desc->rx_buf_start, peer);
  580. if (qdf_unlikely(vdev->rx_decap_type == htt_cmn_pkt_type_raw)) {
  581. dp_rx_deliver_raw(vdev, nbuf, peer);
  582. } else {
  583. DP_STATS_INC(vdev->pdev, rx.to_stack.num, 1);
  584. vdev->osif_rx(vdev->osif_vdev, nbuf);
  585. }
  586. fail:
  587. dp_rx_add_to_free_desc_list(head, tail, rx_desc);
  588. return rx_bufs_used;
  589. }
  590. /**
  591. * dp_rx_process_mic_error(): Function to pass mic error indication to umac
  592. * @soc: DP SOC handle
  593. * @rx_desc : pointer to the sw rx descriptor
  594. * @head: pointer to head of rx descriptors to be added to free list
  595. * @tail: pointer to tail of rx descriptors to be added to free list
  596. *
  597. * return: void
  598. */
  599. static void
  600. dp_rx_process_mic_error(struct dp_soc *soc, struct dp_rx_desc *rx_desc,
  601. union dp_rx_desc_list_elem_t **head,
  602. union dp_rx_desc_list_elem_t **tail)
  603. {
  604. struct dp_vdev *vdev = NULL;
  605. struct dp_pdev *pdev = NULL;
  606. struct ol_if_ops *tops = NULL;
  607. qdf_nbuf_t nbuf;
  608. struct ieee80211_frame *wh;
  609. uint8_t *rx_pkt_hdr;
  610. uint8_t *rx_tlv_hdr;
  611. struct dp_peer *peer;
  612. uint16_t peer_id;
  613. nbuf = rx_desc->nbuf;
  614. qdf_nbuf_unmap_single(soc->osdev, nbuf, QDF_DMA_BIDIRECTIONAL);
  615. rx_tlv_hdr = qdf_nbuf_data(nbuf);
  616. if (!hal_rx_msdu_end_first_msdu_get(rx_tlv_hdr))
  617. goto fail;
  618. rx_pkt_hdr = hal_rx_pkt_hdr_get(qdf_nbuf_data(nbuf));
  619. wh = (struct ieee80211_frame *)rx_pkt_hdr;
  620. peer_id = hal_rx_mpdu_start_sw_peer_id_get(rx_tlv_hdr);
  621. peer = dp_peer_find_by_id(soc, peer_id);
  622. if (!peer) {
  623. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  624. "peer not found");
  625. goto fail;
  626. }
  627. vdev = peer->vdev;
  628. if (!vdev) {
  629. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  630. "VDEV not found");
  631. goto fail;
  632. }
  633. pdev = vdev->pdev;
  634. if (!pdev) {
  635. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  636. "PDEV not found");
  637. goto fail;
  638. }
  639. tops = pdev->soc->cdp_soc.ol_ops;
  640. if (tops->rx_mic_error)
  641. tops->rx_mic_error(pdev->osif_pdev, vdev->vdev_id, wh);
  642. fail:
  643. qdf_nbuf_free(rx_desc->nbuf);
  644. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  645. &tail[rx_desc->pool_id], rx_desc);
  646. return;
  647. }
  648. /**
  649. * dp_rx_err_process() - Processes error frames routed to REO error ring
  650. *
  651. * @soc: core txrx main context
  652. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  653. * @quota: No. of units (packets) that can be serviced in one shot.
  654. *
  655. * This function implements error processing and top level demultiplexer
  656. * for all the frames routed to REO error ring.
  657. *
  658. * Return: uint32_t: No. of elements processed
  659. */
  660. uint32_t
  661. dp_rx_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  662. {
  663. void *hal_soc;
  664. void *ring_desc;
  665. union dp_rx_desc_list_elem_t *head = NULL;
  666. union dp_rx_desc_list_elem_t *tail = NULL;
  667. uint32_t rx_bufs_used = 0;
  668. uint8_t buf_type;
  669. uint8_t error, rbm;
  670. struct hal_rx_mpdu_desc_info mpdu_desc_info;
  671. struct hal_buf_info hbi;
  672. struct dp_pdev *dp_pdev;
  673. struct dp_srng *dp_rxdma_srng;
  674. struct rx_desc_pool *rx_desc_pool;
  675. uint32_t cookie = 0;
  676. void *link_desc_va;
  677. struct hal_rx_msdu_list msdu_list; /* MSDU's per MPDU */
  678. uint16_t num_msdus;
  679. /* Debug -- Remove later */
  680. qdf_assert(soc && hal_ring);
  681. hal_soc = soc->hal_soc;
  682. /* Debug -- Remove later */
  683. qdf_assert(hal_soc);
  684. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  685. /* TODO */
  686. /*
  687. * Need API to convert from hal_ring pointer to
  688. * Ring Type / Ring Id combo
  689. */
  690. DP_STATS_INC(soc, rx.err.hal_ring_access_fail, 1);
  691. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  692. FL("HAL RING Access Failed -- %pK"), hal_ring);
  693. goto done;
  694. }
  695. while (qdf_likely(quota-- && (ring_desc =
  696. hal_srng_dst_get_next(hal_soc, hal_ring)))) {
  697. DP_STATS_INC(soc, rx.err_ring_pkts, 1);
  698. error = HAL_RX_ERROR_STATUS_GET(ring_desc);
  699. qdf_assert(error == HAL_REO_ERROR_DETECTED);
  700. buf_type = HAL_RX_REO_BUF_TYPE_GET(ring_desc);
  701. /*
  702. * For REO error ring, expect only MSDU LINK DESC
  703. */
  704. qdf_assert_always(buf_type == HAL_RX_REO_MSDU_LINK_DESC_TYPE);
  705. cookie = HAL_RX_REO_BUF_COOKIE_GET(ring_desc);
  706. /*
  707. * check for the magic number in the sw cookie
  708. */
  709. qdf_assert_always((cookie >> LINK_DESC_ID_SHIFT) &
  710. LINK_DESC_ID_START);
  711. /*
  712. * Check if the buffer is to be processed on this processor
  713. */
  714. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  715. hal_rx_reo_buf_paddr_get(ring_desc, &hbi);
  716. link_desc_va = dp_rx_cookie_2_link_desc_va(soc, &hbi);
  717. hal_rx_msdu_list_get(link_desc_va, &msdu_list, &num_msdus);
  718. if (qdf_unlikely(msdu_list.rbm[0] != HAL_RX_BUF_RBM_SW3_BM)) {
  719. /* TODO */
  720. /* Call appropriate handler */
  721. DP_STATS_INC(soc, rx.err.invalid_rbm, 1);
  722. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  723. FL("Invalid RBM %d"), rbm);
  724. /* Return link descriptor through WBM ring (SW2WBM)*/
  725. dp_rx_link_desc_return(soc, ring_desc,
  726. HAL_BM_ACTION_RELEASE_MSDU_LIST);
  727. continue;
  728. }
  729. /* Get the MPDU DESC info */
  730. hal_rx_mpdu_desc_info_get(ring_desc, &mpdu_desc_info);
  731. if (mpdu_desc_info.mpdu_flags & HAL_MPDU_F_FRAGMENT) {
  732. /* TODO */
  733. rx_bufs_used += dp_rx_frag_handle(soc,
  734. ring_desc, &mpdu_desc_info,
  735. &head, &tail, quota);
  736. DP_STATS_INC(soc, rx.rx_frags, 1);
  737. continue;
  738. }
  739. if (hal_rx_reo_is_pn_error(ring_desc)) {
  740. /* TOD0 */
  741. DP_STATS_INC(soc,
  742. rx.err.
  743. reo_error[HAL_REO_ERR_PN_CHECK_FAILED],
  744. 1);
  745. rx_bufs_used += dp_rx_pn_error_handle(soc,
  746. ring_desc, &mpdu_desc_info,
  747. &head, &tail, quota);
  748. continue;
  749. }
  750. if (hal_rx_reo_is_2k_jump(ring_desc)) {
  751. /* TOD0 */
  752. DP_STATS_INC(soc,
  753. rx.err.
  754. reo_error[HAL_REO_ERR_REGULAR_FRAME_2K_JUMP],
  755. 1);
  756. rx_bufs_used += dp_rx_2k_jump_handle(soc,
  757. ring_desc, &mpdu_desc_info,
  758. &head, &tail, quota);
  759. continue;
  760. }
  761. }
  762. done:
  763. hal_srng_access_end(hal_soc, hal_ring);
  764. /* Assume MAC id = 0, owner = 0 */
  765. if (rx_bufs_used) {
  766. dp_pdev = soc->pdev_list[0];
  767. dp_rxdma_srng = &dp_pdev->rx_refill_buf_ring;
  768. rx_desc_pool = &soc->rx_desc_buf[0];
  769. dp_rx_buffers_replenish(soc, 0, dp_rxdma_srng, rx_desc_pool,
  770. rx_bufs_used, &head, &tail, HAL_RX_BUF_RBM_SW3_BM);
  771. }
  772. return rx_bufs_used; /* Assume no scale factor for now */
  773. }
  774. /**
  775. * dp_rx_wbm_err_process() - Processes error frames routed to WBM release ring
  776. *
  777. * @soc: core txrx main context
  778. * @hal_ring: opaque pointer to the HAL Rx Error Ring, which will be serviced
  779. * @quota: No. of units (packets) that can be serviced in one shot.
  780. *
  781. * This function implements error processing and top level demultiplexer
  782. * for all the frames routed to WBM2HOST sw release ring.
  783. *
  784. * Return: uint32_t: No. of elements processed
  785. */
  786. uint32_t
  787. dp_rx_wbm_err_process(struct dp_soc *soc, void *hal_ring, uint32_t quota)
  788. {
  789. void *hal_soc;
  790. void *ring_desc;
  791. struct dp_rx_desc *rx_desc;
  792. union dp_rx_desc_list_elem_t *head[MAX_PDEV_CNT] = { NULL };
  793. union dp_rx_desc_list_elem_t *tail[MAX_PDEV_CNT] = { NULL };
  794. uint32_t rx_bufs_used[MAX_PDEV_CNT] = { 0 };
  795. uint32_t rx_bufs_reaped = 0;
  796. uint8_t buf_type, rbm;
  797. uint8_t wbm_err_src;
  798. uint32_t rx_buf_cookie;
  799. uint8_t mac_id;
  800. struct dp_pdev *dp_pdev;
  801. struct dp_srng *dp_rxdma_srng;
  802. struct rx_desc_pool *rx_desc_pool;
  803. uint8_t pool_id;
  804. /* Debug -- Remove later */
  805. qdf_assert(soc && hal_ring);
  806. hal_soc = soc->hal_soc;
  807. /* Debug -- Remove later */
  808. qdf_assert(hal_soc);
  809. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring))) {
  810. /* TODO */
  811. /*
  812. * Need API to convert from hal_ring pointer to
  813. * Ring Type / Ring Id combo
  814. */
  815. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  816. FL("HAL RING Access Failed -- %pK"), hal_ring);
  817. goto done;
  818. }
  819. while (qdf_likely(quota-- && (ring_desc =
  820. hal_srng_dst_get_next(hal_soc, hal_ring)))) {
  821. /* XXX */
  822. wbm_err_src = HAL_RX_WBM_ERR_SRC_GET(ring_desc);
  823. qdf_assert((wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) ||
  824. (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO));
  825. /*
  826. * Check if the buffer is to be processed on this processor
  827. */
  828. rbm = hal_rx_ret_buf_manager_get(ring_desc);
  829. if (qdf_unlikely(rbm != HAL_RX_BUF_RBM_SW3_BM)) {
  830. /* TODO */
  831. /* Call appropriate handler */
  832. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  833. FL("Invalid RBM %d"), rbm);
  834. continue;
  835. }
  836. rx_buf_cookie = HAL_RX_WBM_BUF_COOKIE_GET(ring_desc);
  837. rx_desc = dp_rx_cookie_2_va_rxdma_buf(soc, rx_buf_cookie);
  838. qdf_assert(rx_desc);
  839. if (!dp_rx_desc_check_magic(rx_desc)) {
  840. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  841. FL("Invalid rx_desc cookie=%d"),
  842. rx_buf_cookie);
  843. continue;
  844. }
  845. pool_id = rx_desc->pool_id;
  846. /* XXX */
  847. buf_type = HAL_RX_WBM_BUF_TYPE_GET(ring_desc);
  848. /*
  849. * For WBM ring, expect only MSDU buffers
  850. */
  851. qdf_assert_always(buf_type == HAL_RX_WBM_BUF_TYPE_REL_BUF);
  852. if (wbm_err_src == HAL_RX_WBM_ERR_SRC_REO) {
  853. uint8_t push_reason =
  854. HAL_RX_WBM_REO_PUSH_REASON_GET(ring_desc);
  855. if (push_reason == HAL_RX_WBM_REO_PSH_RSN_ERROR) {
  856. uint8_t reo_error_code =
  857. HAL_RX_WBM_REO_ERROR_CODE_GET(ring_desc);
  858. DP_STATS_INC(soc, rx.err.reo_error[
  859. reo_error_code], 1);
  860. switch (reo_error_code) {
  861. /*
  862. * Handling for packets which have NULL REO
  863. * queue descriptor
  864. */
  865. case HAL_REO_ERR_QUEUE_DESC_ADDR_0:
  866. QDF_TRACE(QDF_MODULE_ID_DP,
  867. QDF_TRACE_LEVEL_WARN,
  868. "Got pkt with REO ERROR: %d",
  869. reo_error_code);
  870. rx_bufs_used[pool_id] +=
  871. dp_rx_null_q_desc_handle(soc,
  872. rx_desc,
  873. &head[pool_id],
  874. &tail[pool_id], quota);
  875. continue;
  876. /* TODO */
  877. /* Add per error code accounting */
  878. default:
  879. QDF_TRACE(QDF_MODULE_ID_DP,
  880. QDF_TRACE_LEVEL_DEBUG,
  881. "REO error %d detected",
  882. reo_error_code);
  883. }
  884. }
  885. } else if (wbm_err_src == HAL_RX_WBM_ERR_SRC_RXDMA) {
  886. uint8_t push_reason =
  887. HAL_RX_WBM_RXDMA_PUSH_REASON_GET(ring_desc);
  888. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  889. uint8_t rxdma_error_code =
  890. HAL_RX_WBM_RXDMA_ERROR_CODE_GET(ring_desc);
  891. DP_STATS_INC(soc, rx.err.rxdma_error[
  892. rxdma_error_code], 1);
  893. switch (rxdma_error_code) {
  894. case HAL_RXDMA_ERR_UNENCRYPTED:
  895. rx_bufs_used[pool_id] +=
  896. dp_rx_err_deliver(soc,
  897. rx_desc,
  898. &head[pool_id],
  899. &tail[pool_id],
  900. quota);
  901. continue;
  902. case HAL_RXDMA_ERR_TKIP_MIC:
  903. dp_rx_process_mic_error(soc,
  904. rx_desc,
  905. &head[pool_id],
  906. &tail[pool_id]);
  907. rx_bufs_used[pool_id]++;
  908. continue;
  909. case HAL_RXDMA_ERR_DECRYPT:
  910. QDF_TRACE(QDF_MODULE_ID_DP,
  911. QDF_TRACE_LEVEL_DEBUG,
  912. "Packet received with Decrypt error");
  913. break;
  914. default:
  915. QDF_TRACE(QDF_MODULE_ID_DP,
  916. QDF_TRACE_LEVEL_DEBUG,
  917. "RXDMA error %d",
  918. rxdma_error_code);
  919. }
  920. }
  921. } else {
  922. /* Should not come here */
  923. qdf_assert(0);
  924. }
  925. rx_bufs_used[rx_desc->pool_id]++;
  926. qdf_nbuf_unmap_single(soc->osdev, rx_desc->nbuf,
  927. QDF_DMA_BIDIRECTIONAL);
  928. rx_desc->rx_buf_start = qdf_nbuf_data(rx_desc->nbuf);
  929. hal_rx_dump_pkt_tlvs(rx_desc->rx_buf_start,
  930. QDF_TRACE_LEVEL_DEBUG);
  931. qdf_nbuf_free(rx_desc->nbuf);
  932. dp_rx_add_to_free_desc_list(&head[rx_desc->pool_id],
  933. &tail[rx_desc->pool_id], rx_desc);
  934. }
  935. done:
  936. hal_srng_access_end(hal_soc, hal_ring);
  937. for (mac_id = 0; mac_id < MAX_PDEV_CNT; mac_id++) {
  938. if (rx_bufs_used[mac_id]) {
  939. dp_pdev = soc->pdev_list[mac_id];
  940. dp_rxdma_srng = &dp_pdev->rx_refill_buf_ring;
  941. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  942. dp_rx_buffers_replenish(soc, mac_id, dp_rxdma_srng,
  943. rx_desc_pool, rx_bufs_used[mac_id],
  944. &head[mac_id], &tail[mac_id],
  945. HAL_RX_BUF_RBM_SW3_BM);
  946. rx_bufs_reaped += rx_bufs_used[mac_id];
  947. }
  948. }
  949. return rx_bufs_reaped; /* Assume no scale factor for now */
  950. }
  951. /**
  952. * dp_rx_err_mpdu_pop() - extract the MSDU's from link descs
  953. *
  954. * @soc: core DP main context
  955. * @mac_id: mac id which is one of 3 mac_ids
  956. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  957. * @head: head of descs list to be freed
  958. * @tail: tail of decs list to be freed
  959. * Return: number of msdu in MPDU to be popped
  960. */
  961. static inline uint32_t
  962. dp_rx_err_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  963. void *rxdma_dst_ring_desc,
  964. union dp_rx_desc_list_elem_t **head,
  965. union dp_rx_desc_list_elem_t **tail)
  966. {
  967. void *rx_msdu_link_desc;
  968. qdf_nbuf_t msdu;
  969. qdf_nbuf_t last;
  970. struct hal_rx_msdu_list msdu_list;
  971. uint16_t num_msdus;
  972. struct hal_buf_info buf_info;
  973. void *p_buf_addr_info;
  974. void *p_last_buf_addr_info;
  975. uint32_t rx_bufs_used = 0;
  976. uint32_t msdu_cnt;
  977. uint32_t i;
  978. uint8_t push_reason;
  979. uint8_t rxdma_error_code = 0;
  980. uint8_t bm_action = HAL_BM_ACTION_PUT_IN_IDLE_LIST;
  981. struct dp_pdev *pdev = soc->pdev_list[mac_id];
  982. msdu = 0;
  983. last = NULL;
  984. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  985. &p_last_buf_addr_info, &msdu_cnt);
  986. push_reason =
  987. hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc);
  988. if (push_reason == HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) {
  989. rxdma_error_code =
  990. hal_rx_reo_ent_rxdma_error_code_get(rxdma_dst_ring_desc);
  991. }
  992. do {
  993. rx_msdu_link_desc =
  994. dp_rx_cookie_2_link_desc_va(soc, &buf_info);
  995. qdf_assert(rx_msdu_link_desc);
  996. hal_rx_msdu_list_get(rx_msdu_link_desc, &msdu_list, &num_msdus);
  997. if (msdu_list.sw_cookie[0] != HAL_RX_COOKIE_SPECIAL) {
  998. /* if the msdus belongs to NSS offloaded radio &&
  999. * the rbm is not SW3_BM then return the msdu_link
  1000. * descriptor without freeing the msdus (nbufs). let
  1001. * these buffers be given to NSS completion ring for
  1002. * NSS to free them.
  1003. * else iterate through the msdu link desc list and
  1004. * free each msdu in the list.
  1005. */
  1006. if (msdu_list.rbm[0] != HAL_RX_BUF_RBM_SW3_BM &&
  1007. wlan_cfg_get_dp_pdev_nss_enabled(
  1008. pdev->wlan_cfg_ctx))
  1009. bm_action = HAL_BM_ACTION_RELEASE_MSDU_LIST;
  1010. else {
  1011. for (i = 0; i < num_msdus; i++) {
  1012. struct dp_rx_desc *rx_desc =
  1013. dp_rx_cookie_2_va_rxdma_buf(soc,
  1014. msdu_list.sw_cookie[i]);
  1015. qdf_assert(rx_desc);
  1016. msdu = rx_desc->nbuf;
  1017. qdf_nbuf_unmap_single(soc->osdev, msdu,
  1018. QDF_DMA_FROM_DEVICE);
  1019. QDF_TRACE(QDF_MODULE_ID_DP,
  1020. QDF_TRACE_LEVEL_DEBUG,
  1021. "[%s][%d] msdu_nbuf=%pK \n",
  1022. __func__, __LINE__, msdu);
  1023. qdf_nbuf_free(msdu);
  1024. rx_bufs_used++;
  1025. dp_rx_add_to_free_desc_list(head,
  1026. tail, rx_desc);
  1027. }
  1028. }
  1029. } else {
  1030. rxdma_error_code = HAL_RXDMA_ERR_WAR;
  1031. }
  1032. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  1033. &p_buf_addr_info);
  1034. dp_rx_link_desc_return(soc, p_last_buf_addr_info, bm_action);
  1035. p_last_buf_addr_info = p_buf_addr_info;
  1036. } while (buf_info.paddr);
  1037. DP_STATS_INC(soc, rx.err.rxdma_error[rxdma_error_code], 1);
  1038. if (rxdma_error_code == HAL_RXDMA_ERR_DECRYPT) {
  1039. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1040. "Packet received with Decrypt error");
  1041. }
  1042. return rx_bufs_used;
  1043. }
  1044. /**
  1045. * dp_rxdma_err_process() - RxDMA error processing functionality
  1046. *
  1047. * @soc: core txrx main contex
  1048. * @mac_id: mac id which is one of 3 mac_ids
  1049. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  1050. * @quota: No. of units (packets) that can be serviced in one shot.
  1051. * Return: num of buffers processed
  1052. */
  1053. uint32_t
  1054. dp_rxdma_err_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  1055. {
  1056. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  1057. int ring_idx = dp_get_ring_id_for_mac_id(soc, mac_id);
  1058. uint8_t pdev_id;
  1059. void *hal_soc;
  1060. void *rxdma_dst_ring_desc;
  1061. void *err_dst_srng;
  1062. union dp_rx_desc_list_elem_t *head = NULL;
  1063. union dp_rx_desc_list_elem_t *tail = NULL;
  1064. struct dp_srng *dp_rxdma_srng;
  1065. struct rx_desc_pool *rx_desc_pool;
  1066. uint32_t work_done = 0;
  1067. uint32_t rx_bufs_used = 0;
  1068. #ifdef DP_INTR_POLL_BASED
  1069. if (!pdev)
  1070. return 0;
  1071. #endif
  1072. pdev_id = pdev->pdev_id;
  1073. err_dst_srng = pdev->rxdma_err_dst_ring[ring_idx].hal_srng;
  1074. if (!err_dst_srng) {
  1075. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1076. "%s %d : HAL Monitor Destination Ring Init \
  1077. Failed -- %pK\n",
  1078. __func__, __LINE__, err_dst_srng);
  1079. return 0;
  1080. }
  1081. hal_soc = soc->hal_soc;
  1082. qdf_assert(hal_soc);
  1083. if (qdf_unlikely(hal_srng_access_start(hal_soc, err_dst_srng))) {
  1084. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  1085. "%s %d : HAL Monitor Destination Ring Init \
  1086. Failed -- %pK\n",
  1087. __func__, __LINE__, err_dst_srng);
  1088. return 0;
  1089. }
  1090. while (qdf_likely(quota-- && (rxdma_dst_ring_desc =
  1091. hal_srng_dst_get_next(hal_soc, err_dst_srng)))) {
  1092. rx_bufs_used += dp_rx_err_mpdu_pop(soc, mac_id,
  1093. rxdma_dst_ring_desc,
  1094. &head, &tail);
  1095. }
  1096. hal_srng_access_end(hal_soc, err_dst_srng);
  1097. if (rx_bufs_used) {
  1098. dp_rxdma_srng = &pdev->rx_refill_buf_ring;
  1099. rx_desc_pool = &soc->rx_desc_buf[mac_id];
  1100. dp_rx_buffers_replenish(soc, pdev_id, dp_rxdma_srng,
  1101. rx_desc_pool, rx_bufs_used, &head, &tail,
  1102. HAL_RX_BUF_RBM_SW3_BM);
  1103. work_done += rx_bufs_used;
  1104. }
  1105. return work_done;
  1106. }