dp_rx_mon_dest.c 47 KB

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  1. /*
  2. * Copyright (c) 2017-2020 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "hal_hw_headers.h"
  19. #include "dp_types.h"
  20. #include "dp_rx.h"
  21. #include "dp_peer.h"
  22. #include "hal_rx.h"
  23. #include "hal_api.h"
  24. #include "qdf_trace.h"
  25. #include "qdf_nbuf.h"
  26. #include "hal_api_mon.h"
  27. #include "dp_rx_mon.h"
  28. #include "wlan_cfg.h"
  29. #include "dp_internal.h"
  30. /* The maxinum buffer length allocated for radio tap */
  31. #define MAX_MONITOR_HEADER (512)
  32. /*
  33. * PPDU id is from 0 to 64k-1. PPDU id read from status ring and PPDU id
  34. * read from destination ring shall track each other. If the distance of
  35. * two ppdu id is less than 20000. It is assume no wrap around. Otherwise,
  36. * It is assume wrap around.
  37. */
  38. #define NOT_PPDU_ID_WRAP_AROUND 20000
  39. /*
  40. * The destination ring processing is stuck if the destrination is not
  41. * moving while status ring moves 16 ppdu. the destination ring processing
  42. * skips this destination ring ppdu as walkaround
  43. */
  44. #define MON_DEST_RING_STUCK_MAX_CNT 16
  45. /**
  46. * dp_rx_mon_link_desc_return() - Return a MPDU link descriptor to HW
  47. * (WBM), following error handling
  48. *
  49. * @dp_pdev: core txrx pdev context
  50. * @buf_addr_info: void pointer to monitor link descriptor buf addr info
  51. * Return: QDF_STATUS
  52. */
  53. static QDF_STATUS
  54. dp_rx_mon_link_desc_return(struct dp_pdev *dp_pdev,
  55. hal_buff_addrinfo_t buf_addr_info, int mac_id)
  56. {
  57. struct dp_srng *dp_srng;
  58. hal_ring_handle_t hal_ring_hdl;
  59. hal_soc_handle_t hal_soc;
  60. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  61. void *src_srng_desc;
  62. hal_soc = dp_pdev->soc->hal_soc;
  63. dp_srng = &dp_pdev->soc->rxdma_mon_desc_ring[mac_id];
  64. hal_ring_hdl = dp_srng->hal_srng;
  65. qdf_assert(hal_ring_hdl);
  66. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_ring_hdl))) {
  67. /* TODO */
  68. /*
  69. * Need API to convert from hal_ring pointer to
  70. * Ring Type / Ring Id combo
  71. */
  72. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  73. "%s %d : \
  74. HAL RING Access For WBM Release SRNG Failed -- %pK",
  75. __func__, __LINE__, hal_ring_hdl);
  76. goto done;
  77. }
  78. src_srng_desc = hal_srng_src_get_next(hal_soc, hal_ring_hdl);
  79. if (qdf_likely(src_srng_desc)) {
  80. /* Return link descriptor through WBM ring (SW2WBM)*/
  81. hal_rx_mon_msdu_link_desc_set(hal_soc,
  82. src_srng_desc, buf_addr_info);
  83. status = QDF_STATUS_SUCCESS;
  84. } else {
  85. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  86. "%s %d -- Monitor Link Desc WBM Release Ring Full",
  87. __func__, __LINE__);
  88. }
  89. done:
  90. hal_srng_access_end(hal_soc, hal_ring_hdl);
  91. return status;
  92. }
  93. /**
  94. * dp_mon_adjust_frag_len() - MPDU and MSDU may spread across
  95. * multiple nbufs. This function
  96. * is to return data length in
  97. * fragmented buffer
  98. *
  99. * @total_len: pointer to remaining data length.
  100. * @frag_len: pointer to data length in this fragment.
  101. */
  102. static inline void dp_mon_adjust_frag_len(uint32_t *total_len,
  103. uint32_t *frag_len)
  104. {
  105. if (*total_len >= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  106. *frag_len = RX_BUFFER_SIZE - RX_PKT_TLVS_LEN;
  107. *total_len -= *frag_len;
  108. } else {
  109. *frag_len = *total_len;
  110. *total_len = 0;
  111. }
  112. }
  113. /**
  114. * dp_rx_cookie_2_mon_link_desc() - Retrieve Link descriptor based on target
  115. * @pdev: core physical device context
  116. * @hal_buf_info: structure holding the buffer info
  117. * mac_id: mac number
  118. *
  119. * Return: link descriptor address
  120. */
  121. static inline
  122. void *dp_rx_cookie_2_mon_link_desc(struct dp_pdev *pdev,
  123. struct hal_buf_info buf_info,
  124. uint8_t mac_id)
  125. {
  126. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  127. return dp_rx_cookie_2_mon_link_desc_va(pdev, &buf_info,
  128. mac_id);
  129. return dp_rx_cookie_2_link_desc_va(pdev->soc, &buf_info);
  130. }
  131. /**
  132. * dp_rx_monitor_link_desc_return() - Return Link descriptor based on target
  133. * @pdev: core physical device context
  134. * @p_last_buf_addr_info: MPDU Link descriptor
  135. * mac_id: mac number
  136. *
  137. * Return: QDF_STATUS
  138. */
  139. static inline
  140. QDF_STATUS dp_rx_monitor_link_desc_return(struct dp_pdev *pdev,
  141. hal_buff_addrinfo_t
  142. p_last_buf_addr_info,
  143. uint8_t mac_id, uint8_t bm_action)
  144. {
  145. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  146. return dp_rx_mon_link_desc_return(pdev, p_last_buf_addr_info,
  147. mac_id);
  148. return dp_rx_link_desc_return_by_addr(pdev->soc, p_last_buf_addr_info,
  149. bm_action);
  150. }
  151. /**
  152. * dp_rxdma_get_mon_dst_ring() - Return the pointer to rxdma_err_dst_ring
  153. * or mon_dst_ring based on the target
  154. * @pdev: core physical device context
  155. * @mac_for_pdev: mac_id number
  156. *
  157. * Return: ring address
  158. */
  159. static inline
  160. void *dp_rxdma_get_mon_dst_ring(struct dp_pdev *pdev,
  161. uint8_t mac_for_pdev)
  162. {
  163. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  164. return pdev->soc->rxdma_mon_dst_ring[mac_for_pdev].hal_srng;
  165. return pdev->soc->rxdma_err_dst_ring[mac_for_pdev].hal_srng;
  166. }
  167. /**
  168. * dp_rxdma_get_mon_buf_ring() - Return monitor buf ring address
  169. * based on target
  170. * @pdev: core physical device context
  171. * @mac_for_pdev: mac id number
  172. *
  173. * Return: ring address
  174. */
  175. static inline
  176. struct dp_srng *dp_rxdma_get_mon_buf_ring(struct dp_pdev *pdev,
  177. uint8_t mac_for_pdev)
  178. {
  179. if (pdev->soc->wlan_cfg_ctx->rxdma1_enable)
  180. return &pdev->soc->rxdma_mon_buf_ring[mac_for_pdev];
  181. return &pdev->soc->rx_refill_buf_ring[mac_for_pdev];
  182. }
  183. /**
  184. * dp_rx_get_mon_desc_pool() - Return monitor descriptor pool
  185. * based on target
  186. * @soc: soc handle
  187. * @mac_id: mac id number
  188. * @pdev_id: pdev id number
  189. *
  190. * Return: descriptor pool address
  191. */
  192. static inline
  193. struct rx_desc_pool *dp_rx_get_mon_desc_pool(struct dp_soc *soc,
  194. uint8_t mac_id,
  195. uint8_t pdev_id)
  196. {
  197. if (soc->wlan_cfg_ctx->rxdma1_enable)
  198. return &soc->rx_desc_mon[mac_id];
  199. return &soc->rx_desc_buf[pdev_id];
  200. }
  201. /**
  202. * dp_rx_get_mon_desc() - Return Rx descriptor based on target
  203. * @soc: soc handle
  204. * @cookie: cookie value
  205. *
  206. * Return: Rx descriptor
  207. */
  208. static inline
  209. struct dp_rx_desc *dp_rx_get_mon_desc(struct dp_soc *soc,
  210. uint32_t cookie)
  211. {
  212. if (soc->wlan_cfg_ctx->rxdma1_enable)
  213. return dp_rx_cookie_2_va_mon_buf(soc, cookie);
  214. return dp_rx_cookie_2_va_rxdma_buf(soc, cookie);
  215. }
  216. /**
  217. * dp_rx_mon_mpdu_pop() - Return a MPDU link descriptor to HW
  218. * (WBM), following error handling
  219. *
  220. * @soc: core DP main context
  221. * @mac_id: mac id which is one of 3 mac_ids
  222. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  223. * @head_msdu: head of msdu to be popped
  224. * @tail_msdu: tail of msdu to be popped
  225. * @npackets: number of packet to be popped
  226. * @ppdu_id: ppdu id of processing ppdu
  227. * @head: head of descs list to be freed
  228. * @tail: tail of decs list to be freed
  229. *
  230. * Return: number of msdu in MPDU to be popped
  231. */
  232. static inline uint32_t
  233. dp_rx_mon_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  234. hal_rxdma_desc_t rxdma_dst_ring_desc, qdf_nbuf_t *head_msdu,
  235. qdf_nbuf_t *tail_msdu, uint32_t *npackets, uint32_t *ppdu_id,
  236. union dp_rx_desc_list_elem_t **head,
  237. union dp_rx_desc_list_elem_t **tail)
  238. {
  239. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  240. void *rx_desc_tlv;
  241. void *rx_msdu_link_desc;
  242. qdf_nbuf_t msdu;
  243. qdf_nbuf_t last;
  244. struct hal_rx_msdu_list msdu_list;
  245. uint16_t num_msdus;
  246. uint32_t rx_buf_size, rx_pkt_offset;
  247. struct hal_buf_info buf_info;
  248. uint32_t rx_bufs_used = 0;
  249. uint32_t msdu_ppdu_id, msdu_cnt;
  250. uint8_t *data;
  251. uint32_t i;
  252. uint32_t total_frag_len = 0, frag_len = 0;
  253. bool is_frag, is_first_msdu;
  254. bool drop_mpdu = false;
  255. uint8_t bm_action = HAL_BM_ACTION_PUT_IN_IDLE_LIST;
  256. uint64_t nbuf_paddr = 0;
  257. uint32_t rx_link_buf_info[HAL_RX_BUFFINFO_NUM_DWORDS];
  258. msdu = 0;
  259. last = NULL;
  260. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info, &msdu_cnt);
  261. if ((hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc) ==
  262. HAL_RX_WBM_RXDMA_PSH_RSN_ERROR)) {
  263. uint8_t rxdma_err =
  264. hal_rx_reo_ent_rxdma_error_code_get(
  265. rxdma_dst_ring_desc);
  266. if (qdf_unlikely((rxdma_err == HAL_RXDMA_ERR_FLUSH_REQUEST) ||
  267. (rxdma_err == HAL_RXDMA_ERR_MPDU_LENGTH) ||
  268. (rxdma_err == HAL_RXDMA_ERR_OVERFLOW))) {
  269. drop_mpdu = true;
  270. dp_pdev->rx_mon_stats.dest_mpdu_drop++;
  271. }
  272. }
  273. is_frag = false;
  274. is_first_msdu = true;
  275. do {
  276. /* WAR for duplicate link descriptors received from HW */
  277. if (qdf_unlikely(dp_pdev->mon_last_linkdesc_paddr ==
  278. buf_info.paddr)) {
  279. dp_pdev->rx_mon_stats.dup_mon_linkdesc_cnt++;
  280. return rx_bufs_used;
  281. }
  282. rx_msdu_link_desc =
  283. dp_rx_cookie_2_mon_link_desc(dp_pdev,
  284. buf_info, mac_id);
  285. qdf_assert(rx_msdu_link_desc);
  286. hal_rx_msdu_list_get(soc->hal_soc, rx_msdu_link_desc,
  287. &msdu_list, &num_msdus);
  288. for (i = 0; i < num_msdus; i++) {
  289. uint32_t l2_hdr_offset;
  290. struct dp_rx_desc *rx_desc = NULL;
  291. rx_desc = dp_rx_get_mon_desc(soc,
  292. msdu_list.sw_cookie[i]);
  293. qdf_assert_always(rx_desc);
  294. msdu = rx_desc->nbuf;
  295. if (msdu)
  296. nbuf_paddr = qdf_nbuf_get_frag_paddr(msdu, 0);
  297. /* WAR for duplicate buffers received from HW */
  298. if (qdf_unlikely(dp_pdev->mon_last_buf_cookie ==
  299. msdu_list.sw_cookie[i] ||
  300. !msdu ||
  301. msdu_list.paddr[i] != nbuf_paddr ||
  302. !rx_desc->in_use)) {
  303. /* Skip duplicate buffer and drop subsequent
  304. * buffers in this MPDU
  305. */
  306. drop_mpdu = true;
  307. dp_pdev->rx_mon_stats.dup_mon_buf_cnt++;
  308. dp_pdev->mon_last_linkdesc_paddr =
  309. buf_info.paddr;
  310. continue;
  311. }
  312. if (rx_desc->unmapped == 0) {
  313. qdf_nbuf_unmap_single(soc->osdev, msdu,
  314. QDF_DMA_FROM_DEVICE);
  315. rx_desc->unmapped = 1;
  316. }
  317. if (drop_mpdu) {
  318. dp_pdev->mon_last_linkdesc_paddr =
  319. buf_info.paddr;
  320. qdf_nbuf_free(msdu);
  321. msdu = NULL;
  322. goto next_msdu;
  323. }
  324. data = qdf_nbuf_data(msdu);
  325. rx_desc_tlv = HAL_RX_MON_DEST_GET_DESC(data);
  326. QDF_TRACE(QDF_MODULE_ID_DP,
  327. QDF_TRACE_LEVEL_DEBUG,
  328. "[%s] i=%d, ppdu_id=%x, num_msdus = %u",
  329. __func__, i, *ppdu_id, num_msdus);
  330. if (is_first_msdu) {
  331. if (!HAL_RX_HW_DESC_MPDU_VALID(
  332. rx_desc_tlv)) {
  333. drop_mpdu = true;
  334. qdf_nbuf_free(msdu);
  335. msdu = NULL;
  336. dp_pdev->mon_last_linkdesc_paddr =
  337. buf_info.paddr;
  338. goto next_msdu;
  339. }
  340. msdu_ppdu_id = hal_rx_hw_desc_get_ppduid_get(
  341. soc->hal_soc,
  342. rx_desc_tlv);
  343. is_first_msdu = false;
  344. QDF_TRACE(QDF_MODULE_ID_DP,
  345. QDF_TRACE_LEVEL_DEBUG,
  346. "[%s] msdu_ppdu_id=%x",
  347. __func__, msdu_ppdu_id);
  348. if (*ppdu_id > msdu_ppdu_id)
  349. QDF_TRACE(QDF_MODULE_ID_DP,
  350. QDF_TRACE_LEVEL_DEBUG,
  351. "[%s][%d] ppdu_id=%d "
  352. "msdu_ppdu_id=%d",
  353. __func__, __LINE__, *ppdu_id,
  354. msdu_ppdu_id);
  355. if ((*ppdu_id < msdu_ppdu_id) && (
  356. (msdu_ppdu_id - *ppdu_id) <
  357. NOT_PPDU_ID_WRAP_AROUND)) {
  358. *ppdu_id = msdu_ppdu_id;
  359. return rx_bufs_used;
  360. } else if ((*ppdu_id > msdu_ppdu_id) && (
  361. (*ppdu_id - msdu_ppdu_id) >
  362. NOT_PPDU_ID_WRAP_AROUND)) {
  363. *ppdu_id = msdu_ppdu_id;
  364. return rx_bufs_used;
  365. }
  366. dp_pdev->mon_last_linkdesc_paddr =
  367. buf_info.paddr;
  368. }
  369. if (hal_rx_desc_is_first_msdu(soc->hal_soc,
  370. rx_desc_tlv))
  371. hal_rx_mon_hw_desc_get_mpdu_status(soc->hal_soc,
  372. rx_desc_tlv,
  373. &(dp_pdev->ppdu_info.rx_status));
  374. if (msdu_list.msdu_info[i].msdu_flags &
  375. HAL_MSDU_F_MSDU_CONTINUATION) {
  376. if (!is_frag) {
  377. total_frag_len =
  378. msdu_list.msdu_info[i].msdu_len;
  379. is_frag = true;
  380. }
  381. dp_mon_adjust_frag_len(
  382. &total_frag_len, &frag_len);
  383. } else {
  384. if (is_frag) {
  385. dp_mon_adjust_frag_len(
  386. &total_frag_len, &frag_len);
  387. } else {
  388. frag_len =
  389. msdu_list.msdu_info[i].msdu_len;
  390. }
  391. is_frag = false;
  392. msdu_cnt--;
  393. }
  394. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  395. "%s total_len %u frag_len %u flags %u",
  396. __func__, total_frag_len, frag_len,
  397. msdu_list.msdu_info[i].msdu_flags);
  398. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  399. /*
  400. * HW structures call this L3 header padding
  401. * -- even though this is actually the offset
  402. * from the buffer beginning where the L2
  403. * header begins.
  404. */
  405. l2_hdr_offset =
  406. hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, data);
  407. rx_buf_size = rx_pkt_offset + l2_hdr_offset
  408. + frag_len;
  409. qdf_nbuf_set_pktlen(msdu, rx_buf_size);
  410. #if 0
  411. /* Disble it.see packet on msdu done set to 0 */
  412. /*
  413. * Check if DMA completed -- msdu_done is the
  414. * last bit to be written
  415. */
  416. if (!hal_rx_attn_msdu_done_get(rx_desc_tlv)) {
  417. QDF_TRACE(QDF_MODULE_ID_DP,
  418. QDF_TRACE_LEVEL_ERROR,
  419. "%s:%d: Pkt Desc",
  420. __func__, __LINE__);
  421. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP,
  422. QDF_TRACE_LEVEL_ERROR,
  423. rx_desc_tlv, 128);
  424. qdf_assert_always(0);
  425. }
  426. #endif
  427. QDF_TRACE(QDF_MODULE_ID_DP,
  428. QDF_TRACE_LEVEL_DEBUG,
  429. "%s: rx_pkt_offset=%d, l2_hdr_offset=%d, msdu_len=%d, addr=%pK skb->len %u",
  430. __func__, rx_pkt_offset, l2_hdr_offset,
  431. msdu_list.msdu_info[i].msdu_len,
  432. qdf_nbuf_data(msdu),
  433. (uint32_t)qdf_nbuf_len(msdu));
  434. if (head_msdu && !*head_msdu) {
  435. *head_msdu = msdu;
  436. } else {
  437. if (last)
  438. qdf_nbuf_set_next(last, msdu);
  439. }
  440. last = msdu;
  441. next_msdu:
  442. dp_pdev->mon_last_buf_cookie = msdu_list.sw_cookie[i];
  443. rx_bufs_used++;
  444. dp_rx_add_to_free_desc_list(head,
  445. tail, rx_desc);
  446. }
  447. /*
  448. * Store the current link buffer into to the local
  449. * structure to be used for release purpose.
  450. */
  451. hal_rxdma_buff_addr_info_set(rx_link_buf_info, buf_info.paddr,
  452. buf_info.sw_cookie, buf_info.rbm);
  453. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info);
  454. if (dp_rx_monitor_link_desc_return(dp_pdev,
  455. (hal_buff_addrinfo_t)
  456. rx_link_buf_info,
  457. mac_id,
  458. bm_action)
  459. != QDF_STATUS_SUCCESS)
  460. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  461. "dp_rx_monitor_link_desc_return failed");
  462. } while (buf_info.paddr && msdu_cnt);
  463. if (last)
  464. qdf_nbuf_set_next(last, NULL);
  465. *tail_msdu = msdu;
  466. return rx_bufs_used;
  467. }
  468. static inline
  469. void dp_rx_msdus_set_payload(struct dp_soc *soc, qdf_nbuf_t msdu)
  470. {
  471. uint8_t *data;
  472. uint32_t rx_pkt_offset, l2_hdr_offset;
  473. data = qdf_nbuf_data(msdu);
  474. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  475. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(soc->hal_soc, data);
  476. qdf_nbuf_pull_head(msdu, rx_pkt_offset + l2_hdr_offset);
  477. }
  478. static inline
  479. qdf_nbuf_t dp_rx_mon_restitch_mpdu_from_msdus(struct dp_soc *soc,
  480. uint32_t mac_id, qdf_nbuf_t head_msdu, qdf_nbuf_t last_msdu,
  481. struct cdp_mon_status *rx_status)
  482. {
  483. qdf_nbuf_t msdu, mpdu_buf, prev_buf, msdu_orig, head_frag_list;
  484. uint32_t decap_format, wifi_hdr_len, sec_hdr_len, msdu_llc_len,
  485. mpdu_buf_len, decap_hdr_pull_bytes, frag_list_sum_len, dir,
  486. is_amsdu, is_first_frag, amsdu_pad;
  487. void *rx_desc;
  488. char *hdr_desc;
  489. unsigned char *dest;
  490. struct ieee80211_frame *wh;
  491. struct ieee80211_qoscntl *qos;
  492. struct dp_pdev *dp_pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  493. head_frag_list = NULL;
  494. mpdu_buf = NULL;
  495. /* The nbuf has been pulled just beyond the status and points to the
  496. * payload
  497. */
  498. if (!head_msdu)
  499. goto mpdu_stitch_fail;
  500. msdu_orig = head_msdu;
  501. rx_desc = qdf_nbuf_data(msdu_orig);
  502. if (HAL_RX_DESC_GET_MPDU_LENGTH_ERR(rx_desc)) {
  503. /* It looks like there is some issue on MPDU len err */
  504. /* Need further investigate if drop the packet */
  505. DP_STATS_INC(dp_pdev, dropped.mon_rx_drop, 1);
  506. return NULL;
  507. }
  508. rx_desc = qdf_nbuf_data(last_msdu);
  509. rx_status->cdp_rs_fcs_err = HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  510. dp_pdev->ppdu_info.rx_status.rs_fcs_err =
  511. HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  512. /* Fill out the rx_status from the PPDU start and end fields */
  513. /* HAL_RX_GET_PPDU_STATUS(soc, mac_id, rx_status); */
  514. rx_desc = qdf_nbuf_data(head_msdu);
  515. decap_format = HAL_RX_DESC_GET_DECAP_FORMAT(rx_desc);
  516. /* Easy case - The MSDU status indicates that this is a non-decapped
  517. * packet in RAW mode.
  518. */
  519. if (decap_format == HAL_HW_RX_DECAP_FORMAT_RAW) {
  520. /* Note that this path might suffer from headroom unavailabilty
  521. * - but the RX status is usually enough
  522. */
  523. dp_rx_msdus_set_payload(soc, head_msdu);
  524. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  525. "[%s][%d] decap format raw head %pK head->next %pK last_msdu %pK last_msdu->next %pK",
  526. __func__, __LINE__, head_msdu, head_msdu->next,
  527. last_msdu, last_msdu->next);
  528. mpdu_buf = head_msdu;
  529. prev_buf = mpdu_buf;
  530. frag_list_sum_len = 0;
  531. msdu = qdf_nbuf_next(head_msdu);
  532. is_first_frag = 1;
  533. while (msdu) {
  534. dp_rx_msdus_set_payload(soc, msdu);
  535. if (is_first_frag) {
  536. is_first_frag = 0;
  537. head_frag_list = msdu;
  538. }
  539. frag_list_sum_len += qdf_nbuf_len(msdu);
  540. /* Maintain the linking of the cloned MSDUS */
  541. qdf_nbuf_set_next_ext(prev_buf, msdu);
  542. /* Move to the next */
  543. prev_buf = msdu;
  544. msdu = qdf_nbuf_next(msdu);
  545. }
  546. qdf_nbuf_trim_tail(prev_buf, HAL_RX_FCS_LEN);
  547. /* If there were more fragments to this RAW frame */
  548. if (head_frag_list) {
  549. if (frag_list_sum_len <
  550. sizeof(struct ieee80211_frame_min_one)) {
  551. DP_STATS_INC(dp_pdev, dropped.mon_rx_drop, 1);
  552. return NULL;
  553. }
  554. frag_list_sum_len -= HAL_RX_FCS_LEN;
  555. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  556. frag_list_sum_len);
  557. qdf_nbuf_set_next(mpdu_buf, NULL);
  558. }
  559. goto mpdu_stitch_done;
  560. }
  561. /* Decap mode:
  562. * Calculate the amount of header in decapped packet to knock off based
  563. * on the decap type and the corresponding number of raw bytes to copy
  564. * status header
  565. */
  566. rx_desc = qdf_nbuf_data(head_msdu);
  567. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  568. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  569. "[%s][%d] decap format not raw",
  570. __func__, __LINE__);
  571. /* Base size */
  572. wifi_hdr_len = sizeof(struct ieee80211_frame);
  573. wh = (struct ieee80211_frame *)hdr_desc;
  574. dir = wh->i_fc[1] & IEEE80211_FC1_DIR_MASK;
  575. if (dir == IEEE80211_FC1_DIR_DSTODS)
  576. wifi_hdr_len += 6;
  577. is_amsdu = 0;
  578. if (wh->i_fc[0] & QDF_IEEE80211_FC0_SUBTYPE_QOS) {
  579. qos = (struct ieee80211_qoscntl *)
  580. (hdr_desc + wifi_hdr_len);
  581. wifi_hdr_len += 2;
  582. is_amsdu = (qos->i_qos[0] & IEEE80211_QOS_AMSDU);
  583. }
  584. /*Calculate security header length based on 'Protected'
  585. * and 'EXT_IV' flag
  586. * */
  587. if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
  588. char *iv = (char *)wh + wifi_hdr_len;
  589. if (iv[3] & KEY_EXTIV)
  590. sec_hdr_len = 8;
  591. else
  592. sec_hdr_len = 4;
  593. } else {
  594. sec_hdr_len = 0;
  595. }
  596. wifi_hdr_len += sec_hdr_len;
  597. /* MSDU related stuff LLC - AMSDU subframe header etc */
  598. msdu_llc_len = is_amsdu ? (14 + 8) : 8;
  599. mpdu_buf_len = wifi_hdr_len + msdu_llc_len;
  600. /* "Decap" header to remove from MSDU buffer */
  601. decap_hdr_pull_bytes = 14;
  602. /* Allocate a new nbuf for holding the 802.11 header retrieved from the
  603. * status of the now decapped first msdu. Leave enough headroom for
  604. * accomodating any radio-tap /prism like PHY header
  605. */
  606. mpdu_buf = qdf_nbuf_alloc(soc->osdev,
  607. MAX_MONITOR_HEADER + mpdu_buf_len,
  608. MAX_MONITOR_HEADER, 4, FALSE);
  609. if (!mpdu_buf)
  610. goto mpdu_stitch_done;
  611. /* Copy the MPDU related header and enc headers into the first buffer
  612. * - Note that there can be a 2 byte pad between heaader and enc header
  613. */
  614. prev_buf = mpdu_buf;
  615. dest = qdf_nbuf_put_tail(prev_buf, wifi_hdr_len);
  616. if (!dest)
  617. goto mpdu_stitch_fail;
  618. qdf_mem_copy(dest, hdr_desc, wifi_hdr_len);
  619. hdr_desc += wifi_hdr_len;
  620. #if 0
  621. dest = qdf_nbuf_put_tail(prev_buf, sec_hdr_len);
  622. adf_os_mem_copy(dest, hdr_desc, sec_hdr_len);
  623. hdr_desc += sec_hdr_len;
  624. #endif
  625. /* The first LLC len is copied into the MPDU buffer */
  626. frag_list_sum_len = 0;
  627. msdu_orig = head_msdu;
  628. is_first_frag = 1;
  629. amsdu_pad = 0;
  630. while (msdu_orig) {
  631. /* TODO: intra AMSDU padding - do we need it ??? */
  632. msdu = msdu_orig;
  633. if (is_first_frag) {
  634. head_frag_list = msdu;
  635. } else {
  636. /* Reload the hdr ptr only on non-first MSDUs */
  637. rx_desc = qdf_nbuf_data(msdu_orig);
  638. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  639. }
  640. /* Copy this buffers MSDU related status into the prev buffer */
  641. if (is_first_frag) {
  642. is_first_frag = 0;
  643. }
  644. /* Update protocol and flow tag for MSDU */
  645. dp_rx_mon_update_protocol_flow_tag(soc, dp_pdev,
  646. msdu_orig, rx_desc);
  647. dest = qdf_nbuf_put_tail(prev_buf,
  648. msdu_llc_len + amsdu_pad);
  649. if (!dest)
  650. goto mpdu_stitch_fail;
  651. dest += amsdu_pad;
  652. qdf_mem_copy(dest, hdr_desc, msdu_llc_len);
  653. dp_rx_msdus_set_payload(soc, msdu);
  654. /* Push the MSDU buffer beyond the decap header */
  655. qdf_nbuf_pull_head(msdu, decap_hdr_pull_bytes);
  656. frag_list_sum_len += msdu_llc_len + qdf_nbuf_len(msdu)
  657. + amsdu_pad;
  658. /* Set up intra-AMSDU pad to be added to start of next buffer -
  659. * AMSDU pad is 4 byte pad on AMSDU subframe */
  660. amsdu_pad = (msdu_llc_len + qdf_nbuf_len(msdu)) & 0x3;
  661. amsdu_pad = amsdu_pad ? (4 - amsdu_pad) : 0;
  662. /* TODO FIXME How do we handle MSDUs that have fraglist - Should
  663. * probably iterate all the frags cloning them along the way and
  664. * and also updating the prev_buf pointer
  665. */
  666. /* Move to the next */
  667. prev_buf = msdu;
  668. msdu_orig = qdf_nbuf_next(msdu_orig);
  669. }
  670. #if 0
  671. /* Add in the trailer section - encryption trailer + FCS */
  672. qdf_nbuf_put_tail(prev_buf, HAL_RX_FCS_LEN);
  673. frag_list_sum_len += HAL_RX_FCS_LEN;
  674. #endif
  675. frag_list_sum_len -= msdu_llc_len;
  676. /* TODO: Convert this to suitable adf routines */
  677. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  678. frag_list_sum_len);
  679. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  680. "%s %d mpdu_buf %pK mpdu_buf->len %u",
  681. __func__, __LINE__,
  682. mpdu_buf, mpdu_buf->len);
  683. mpdu_stitch_done:
  684. /* Check if this buffer contains the PPDU end status for TSF */
  685. /* Need revist this code to see where we can get tsf timestamp */
  686. #if 0
  687. /* PPDU end TLV will be retrieved from monitor status ring */
  688. last_mpdu =
  689. (*(((u_int32_t *)&rx_desc->attention)) &
  690. RX_ATTENTION_0_LAST_MPDU_MASK) >>
  691. RX_ATTENTION_0_LAST_MPDU_LSB;
  692. if (last_mpdu)
  693. rx_status->rs_tstamp.tsf = rx_desc->ppdu_end.tsf_timestamp;
  694. #endif
  695. return mpdu_buf;
  696. mpdu_stitch_fail:
  697. if ((mpdu_buf) && (decap_format != HAL_HW_RX_DECAP_FORMAT_RAW)) {
  698. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  699. "%s mpdu_stitch_fail mpdu_buf %pK",
  700. __func__, mpdu_buf);
  701. /* Free the head buffer */
  702. qdf_nbuf_free(mpdu_buf);
  703. }
  704. return NULL;
  705. }
  706. /**
  707. * dp_send_mgmt_packet_to_stack(): send indicataion to upper layers
  708. *
  709. * @soc: soc handle
  710. * @nbuf: Mgmt packet
  711. * @pdev: pdev handle
  712. *
  713. * Return: QDF_STATUS_SUCCESS on success
  714. * QDF_STATUS_E_INVAL in error
  715. */
  716. #ifdef FEATURE_PERPKT_INFO
  717. static inline QDF_STATUS dp_send_mgmt_packet_to_stack(struct dp_soc *soc,
  718. qdf_nbuf_t nbuf,
  719. struct dp_pdev *pdev)
  720. {
  721. uint32_t *nbuf_data;
  722. struct ieee80211_frame *wh;
  723. if (!nbuf)
  724. return QDF_STATUS_E_INVAL;
  725. /*check if this is not a mgmt packet*/
  726. wh = (struct ieee80211_frame *)qdf_nbuf_data(nbuf);
  727. if (((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) !=
  728. IEEE80211_FC0_TYPE_MGT) &&
  729. ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) !=
  730. IEEE80211_FC0_TYPE_CTL)) {
  731. qdf_nbuf_free(nbuf);
  732. return QDF_STATUS_E_INVAL;
  733. }
  734. nbuf_data = (uint32_t *)qdf_nbuf_push_head(nbuf, 4);
  735. if (!nbuf_data) {
  736. QDF_TRACE(QDF_MODULE_ID_DP,
  737. QDF_TRACE_LEVEL_ERROR,
  738. FL("No headroom"));
  739. qdf_nbuf_free(nbuf);
  740. return QDF_STATUS_E_INVAL;
  741. }
  742. *nbuf_data = pdev->ppdu_info.com_info.ppdu_id;
  743. dp_wdi_event_handler(WDI_EVENT_RX_MGMT_CTRL, soc, nbuf,
  744. HTT_INVALID_PEER,
  745. WDI_NO_VAL, pdev->pdev_id);
  746. return QDF_STATUS_SUCCESS;
  747. }
  748. #else
  749. static inline QDF_STATUS dp_send_mgmt_packet_to_stack(struct dp_soc *soc,
  750. qdf_nbuf_t nbuf,
  751. struct dp_pdev *pdev)
  752. {
  753. return QDF_STATUS_SUCCESS;
  754. }
  755. #endif
  756. /**
  757. * dp_rx_extract_radiotap_info(): Extract and populate information in
  758. * struct mon_rx_status type
  759. * @rx_status: Receive status
  760. * @mon_rx_status: Monitor mode status
  761. *
  762. * Returns: None
  763. */
  764. static inline
  765. void dp_rx_extract_radiotap_info(struct cdp_mon_status *rx_status,
  766. struct mon_rx_status *rx_mon_status)
  767. {
  768. rx_mon_status->tsft = rx_status->cdp_rs_tstamp.cdp_tsf;
  769. rx_mon_status->chan_freq = rx_status->rs_freq;
  770. rx_mon_status->chan_num = rx_status->rs_channel;
  771. rx_mon_status->chan_flags = rx_status->rs_flags;
  772. rx_mon_status->rate = rx_status->rs_datarate;
  773. /* TODO: rx_mon_status->ant_signal_db */
  774. /* TODO: rx_mon_status->nr_ant */
  775. rx_mon_status->mcs = rx_status->cdf_rs_rate_mcs;
  776. rx_mon_status->is_stbc = rx_status->cdp_rs_stbc;
  777. rx_mon_status->sgi = rx_status->cdp_rs_sgi;
  778. /* TODO: rx_mon_status->ldpc */
  779. /* TODO: rx_mon_status->beamformed */
  780. /* TODO: rx_mon_status->vht_flags */
  781. /* TODO: rx_mon_status->vht_flag_values1 */
  782. }
  783. /*
  784. * dp_rx_mon_deliver(): function to deliver packets to stack
  785. * @soc: DP soc
  786. * @mac_id: MAC ID
  787. * @head_msdu: head of msdu list
  788. * @tail_msdu: tail of msdu list
  789. *
  790. * Return: status: 0 - Success, non-zero: Failure
  791. */
  792. QDF_STATUS dp_rx_mon_deliver(struct dp_soc *soc, uint32_t mac_id,
  793. qdf_nbuf_t head_msdu, qdf_nbuf_t tail_msdu)
  794. {
  795. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  796. struct cdp_mon_status *rs = &pdev->rx_mon_recv_status;
  797. qdf_nbuf_t mon_skb, skb_next;
  798. qdf_nbuf_t mon_mpdu = NULL;
  799. if (!pdev->monitor_vdev && !pdev->mcopy_mode)
  800. goto mon_deliver_fail;
  801. /* restitch mon MPDU for delivery via monitor interface */
  802. mon_mpdu = dp_rx_mon_restitch_mpdu_from_msdus(soc, mac_id, head_msdu,
  803. tail_msdu, rs);
  804. /* monitor vap cannot be present when mcopy is enabled
  805. * hence same skb can be consumed
  806. */
  807. if (pdev->mcopy_mode)
  808. return dp_send_mgmt_packet_to_stack(soc, mon_mpdu, pdev);
  809. if (mon_mpdu && pdev->monitor_vdev && pdev->monitor_vdev->osif_vdev &&
  810. pdev->monitor_vdev->osif_rx_mon) {
  811. pdev->ppdu_info.rx_status.ppdu_id =
  812. pdev->ppdu_info.com_info.ppdu_id;
  813. pdev->ppdu_info.rx_status.device_id = soc->device_id;
  814. pdev->ppdu_info.rx_status.chan_noise_floor =
  815. pdev->chan_noise_floor;
  816. if (!qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status,
  817. mon_mpdu,
  818. qdf_nbuf_headroom(mon_mpdu))) {
  819. DP_STATS_INC(pdev, dropped.mon_radiotap_update_err, 1);
  820. goto mon_deliver_fail;
  821. }
  822. pdev->monitor_vdev->osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  823. mon_mpdu,
  824. &pdev->ppdu_info.rx_status);
  825. } else {
  826. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  827. "[%s][%d] mon_mpdu=%pK monitor_vdev %pK osif_vdev %pK"
  828. , __func__, __LINE__, mon_mpdu, pdev->monitor_vdev,
  829. (pdev->monitor_vdev ? pdev->monitor_vdev->osif_vdev
  830. : NULL));
  831. goto mon_deliver_fail;
  832. }
  833. return QDF_STATUS_SUCCESS;
  834. mon_deliver_fail:
  835. mon_skb = head_msdu;
  836. while (mon_skb) {
  837. skb_next = qdf_nbuf_next(mon_skb);
  838. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  839. "[%s][%d] mon_skb=%pK len %u", __func__,
  840. __LINE__, mon_skb, mon_skb->len);
  841. qdf_nbuf_free(mon_skb);
  842. mon_skb = skb_next;
  843. }
  844. return QDF_STATUS_E_INVAL;
  845. }
  846. /**
  847. * dp_rx_mon_deliver_non_std()
  848. * @soc: core txrx main contex
  849. * @mac_id: MAC ID
  850. *
  851. * This function delivers the radio tap and dummy MSDU
  852. * into user layer application for preamble only PPDU.
  853. *
  854. * Return: QDF_STATUS
  855. */
  856. QDF_STATUS dp_rx_mon_deliver_non_std(struct dp_soc *soc,
  857. uint32_t mac_id)
  858. {
  859. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  860. ol_txrx_rx_mon_fp osif_rx_mon;
  861. qdf_nbuf_t dummy_msdu;
  862. /* Sanity checking */
  863. if ((!pdev->monitor_vdev) || (!pdev->monitor_vdev->osif_rx_mon))
  864. goto mon_deliver_non_std_fail;
  865. /* Generate a dummy skb_buff */
  866. osif_rx_mon = pdev->monitor_vdev->osif_rx_mon;
  867. dummy_msdu = qdf_nbuf_alloc(soc->osdev, MAX_MONITOR_HEADER,
  868. MAX_MONITOR_HEADER, 4, FALSE);
  869. if (!dummy_msdu)
  870. goto allocate_dummy_msdu_fail;
  871. qdf_nbuf_set_pktlen(dummy_msdu, 0);
  872. qdf_nbuf_set_next(dummy_msdu, NULL);
  873. pdev->ppdu_info.rx_status.ppdu_id =
  874. pdev->ppdu_info.com_info.ppdu_id;
  875. /* Apply the radio header to this dummy skb */
  876. if (!qdf_nbuf_update_radiotap(&pdev->ppdu_info.rx_status, dummy_msdu,
  877. qdf_nbuf_headroom(dummy_msdu))) {
  878. DP_STATS_INC(pdev, dropped.mon_radiotap_update_err, 1);
  879. qdf_nbuf_free(dummy_msdu);
  880. goto mon_deliver_non_std_fail;
  881. }
  882. /* deliver to the user layer application */
  883. osif_rx_mon(pdev->monitor_vdev->osif_vdev,
  884. dummy_msdu, NULL);
  885. /* Clear rx_status*/
  886. qdf_mem_zero(&pdev->ppdu_info.rx_status,
  887. sizeof(pdev->ppdu_info.rx_status));
  888. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  889. return QDF_STATUS_SUCCESS;
  890. allocate_dummy_msdu_fail:
  891. QDF_TRACE_DEBUG_RL(QDF_MODULE_ID_DP, "[%s][%d] mon_skb=%pK ",
  892. __func__, __LINE__, dummy_msdu);
  893. mon_deliver_non_std_fail:
  894. return QDF_STATUS_E_INVAL;
  895. }
  896. /**
  897. * dp_rx_mon_dest_process() - Brain of the Rx processing functionality
  898. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  899. * @soc: core txrx main contex
  900. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  901. * @quota: No. of units (packets) that can be serviced in one shot.
  902. *
  903. * This function implements the core of Rx functionality. This is
  904. * expected to handle only non-error frames.
  905. *
  906. * Return: none
  907. */
  908. void dp_rx_mon_dest_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  909. {
  910. struct dp_pdev *pdev = dp_get_pdev_for_lmac_id(soc, mac_id);
  911. uint8_t pdev_id;
  912. hal_rxdma_desc_t rxdma_dst_ring_desc;
  913. hal_soc_handle_t hal_soc;
  914. void *mon_dst_srng;
  915. union dp_rx_desc_list_elem_t *head = NULL;
  916. union dp_rx_desc_list_elem_t *tail = NULL;
  917. uint32_t ppdu_id;
  918. uint32_t rx_bufs_used;
  919. uint32_t mpdu_rx_bufs_used;
  920. int mac_for_pdev = mac_id;
  921. struct cdp_pdev_mon_stats *rx_mon_stats;
  922. mon_dst_srng = dp_rxdma_get_mon_dst_ring(pdev, mac_for_pdev);
  923. if (!mon_dst_srng || !hal_srng_initialized(mon_dst_srng)) {
  924. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  925. "%s %d : HAL Monitor Destination Ring Init Failed -- %pK",
  926. __func__, __LINE__, mon_dst_srng);
  927. return;
  928. }
  929. hal_soc = soc->hal_soc;
  930. qdf_assert((hal_soc && pdev));
  931. qdf_spin_lock_bh(&pdev->mon_lock);
  932. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_dst_srng))) {
  933. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  934. "%s %d : HAL Monitor Destination Ring access Failed -- %pK",
  935. __func__, __LINE__, mon_dst_srng);
  936. return;
  937. }
  938. pdev_id = pdev->pdev_id;
  939. ppdu_id = pdev->ppdu_info.com_info.ppdu_id;
  940. rx_bufs_used = 0;
  941. rx_mon_stats = &pdev->rx_mon_stats;
  942. while (qdf_likely(rxdma_dst_ring_desc =
  943. hal_srng_dst_peek(hal_soc, mon_dst_srng))) {
  944. qdf_nbuf_t head_msdu, tail_msdu;
  945. uint32_t npackets;
  946. head_msdu = (qdf_nbuf_t) NULL;
  947. tail_msdu = (qdf_nbuf_t) NULL;
  948. mpdu_rx_bufs_used =
  949. dp_rx_mon_mpdu_pop(soc, mac_id,
  950. rxdma_dst_ring_desc,
  951. &head_msdu, &tail_msdu,
  952. &npackets, &ppdu_id,
  953. &head, &tail);
  954. rx_bufs_used += mpdu_rx_bufs_used;
  955. if (mpdu_rx_bufs_used)
  956. pdev->mon_dest_ring_stuck_cnt = 0;
  957. else
  958. pdev->mon_dest_ring_stuck_cnt++;
  959. if (pdev->mon_dest_ring_stuck_cnt >
  960. MON_DEST_RING_STUCK_MAX_CNT) {
  961. dp_info("destination ring stuck");
  962. dp_info("ppdu_id status=%d dest=%d",
  963. pdev->ppdu_info.com_info.ppdu_id, ppdu_id);
  964. rx_mon_stats->mon_rx_dest_stuck++;
  965. pdev->ppdu_info.com_info.ppdu_id = ppdu_id;
  966. continue;
  967. }
  968. if (ppdu_id != pdev->ppdu_info.com_info.ppdu_id) {
  969. rx_mon_stats->stat_ring_ppdu_id_hist[
  970. rx_mon_stats->ppdu_id_hist_idx] =
  971. pdev->ppdu_info.com_info.ppdu_id;
  972. rx_mon_stats->dest_ring_ppdu_id_hist[
  973. rx_mon_stats->ppdu_id_hist_idx] = ppdu_id;
  974. rx_mon_stats->ppdu_id_hist_idx =
  975. (rx_mon_stats->ppdu_id_hist_idx + 1) &
  976. (MAX_PPDU_ID_HIST - 1);
  977. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  978. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  979. sizeof(pdev->ppdu_info.rx_status));
  980. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  981. "%s %d ppdu_id %x != ppdu_info.com_info .ppdu_id %x",
  982. __func__, __LINE__,
  983. ppdu_id, pdev->ppdu_info.com_info.ppdu_id);
  984. break;
  985. }
  986. if (qdf_likely((head_msdu) && (tail_msdu))) {
  987. rx_mon_stats->dest_mpdu_done++;
  988. dp_rx_mon_deliver(soc, mac_id, head_msdu, tail_msdu);
  989. }
  990. rxdma_dst_ring_desc = hal_srng_dst_get_next(hal_soc,
  991. mon_dst_srng);
  992. }
  993. hal_srng_access_end(hal_soc, mon_dst_srng);
  994. qdf_spin_unlock_bh(&pdev->mon_lock);
  995. if (rx_bufs_used) {
  996. rx_mon_stats->dest_ppdu_done++;
  997. dp_rx_buffers_replenish(soc, mac_id,
  998. dp_rxdma_get_mon_buf_ring(pdev,
  999. mac_for_pdev),
  1000. dp_rx_get_mon_desc_pool(soc, mac_id,
  1001. pdev_id),
  1002. rx_bufs_used, &head, &tail);
  1003. }
  1004. }
  1005. #ifndef DISABLE_MON_CONFIG
  1006. #if !defined(QCA_WIFI_QCA6390) && !defined(QCA_WIFI_QCA6490) && \
  1007. !defined(QCA_WIFI_QCA6750)
  1008. /**
  1009. * dp_rx_pdev_mon_buf_attach() - Allocate the monitor descriptor pool
  1010. *
  1011. * @pdev: physical device handle
  1012. * @mac_id: mac id
  1013. *
  1014. * Return: QDF_STATUS
  1015. */
  1016. #define MON_BUF_MIN_ALLOC_ENTRIES 128
  1017. static QDF_STATUS
  1018. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev, int mac_id) {
  1019. uint8_t pdev_id = pdev->pdev_id;
  1020. struct dp_soc *soc = pdev->soc;
  1021. struct dp_srng *mon_buf_ring;
  1022. uint32_t num_entries;
  1023. struct rx_desc_pool *rx_desc_pool;
  1024. QDF_STATUS status = QDF_STATUS_SUCCESS;
  1025. uint32_t rx_desc_pool_size, replenish_size;
  1026. mon_buf_ring = &soc->rxdma_mon_buf_ring[mac_id];
  1027. num_entries = mon_buf_ring->num_entries;
  1028. rx_desc_pool = &soc->rx_desc_mon[mac_id];
  1029. dp_debug("Mon RX Desc Pool[%d] entries=%u",
  1030. pdev_id, num_entries);
  1031. rx_desc_pool_size = wlan_cfg_get_dp_soc_rx_sw_desc_weight(soc->wlan_cfg_ctx) * num_entries;
  1032. status = dp_rx_desc_pool_alloc(soc, mac_id, rx_desc_pool_size,
  1033. rx_desc_pool);
  1034. if (!QDF_IS_STATUS_SUCCESS(status))
  1035. return status;
  1036. rx_desc_pool->owner = HAL_RX_BUF_RBM_SW3_BM;
  1037. replenish_size = ((num_entries - 1) < MON_BUF_MIN_ALLOC_ENTRIES) ?
  1038. (num_entries - 1) : MON_BUF_MIN_ALLOC_ENTRIES;
  1039. status = dp_pdev_rx_buffers_attach(soc, mac_id, mon_buf_ring,
  1040. rx_desc_pool, replenish_size);
  1041. return status;
  1042. }
  1043. static QDF_STATUS
  1044. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev, int mac_id)
  1045. {
  1046. struct dp_soc *soc = pdev->soc;
  1047. struct rx_desc_pool *rx_desc_pool;
  1048. rx_desc_pool = &soc->rx_desc_mon[mac_id];
  1049. if (rx_desc_pool->pool_size != 0) {
  1050. if (!dp_is_soc_reinit(soc))
  1051. dp_rx_desc_nbuf_and_pool_free(soc, mac_id,
  1052. rx_desc_pool);
  1053. else
  1054. dp_rx_desc_nbuf_free(soc, rx_desc_pool);
  1055. }
  1056. return QDF_STATUS_SUCCESS;
  1057. }
  1058. /**
  1059. * dp_mon_link_desc_pool_setup(): Allocate and setup link descriptor pool
  1060. * that will be used by HW for various link
  1061. * and queue descriptorsand managed by WBM
  1062. *
  1063. * @soc: soc handle
  1064. * @mac_id: mac id
  1065. *
  1066. * Return: QDF_STATUS
  1067. */
  1068. static
  1069. QDF_STATUS dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  1070. {
  1071. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  1072. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  1073. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  1074. uint32_t total_link_descs, total_mem_size;
  1075. uint32_t num_link_desc_banks;
  1076. uint32_t last_bank_size = 0;
  1077. uint32_t entry_size, num_entries;
  1078. void *mon_desc_srng;
  1079. uint32_t num_replenish_buf;
  1080. struct dp_srng *dp_srng;
  1081. int i;
  1082. qdf_dma_addr_t *baseaddr = NULL;
  1083. dp_srng = &soc->rxdma_mon_desc_ring[mac_id];
  1084. num_entries = dp_srng->alloc_size/hal_srng_get_entrysize(
  1085. soc->hal_soc, RXDMA_MONITOR_DESC);
  1086. /* Round up to power of 2 */
  1087. total_link_descs = 1;
  1088. while (total_link_descs < num_entries)
  1089. total_link_descs <<= 1;
  1090. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  1091. "%s: total_link_descs: %u, link_desc_size: %d",
  1092. __func__, total_link_descs, link_desc_size);
  1093. total_mem_size = total_link_descs * link_desc_size;
  1094. total_mem_size += link_desc_align;
  1095. if (total_mem_size <= max_alloc_size) {
  1096. num_link_desc_banks = 0;
  1097. last_bank_size = total_mem_size;
  1098. } else {
  1099. num_link_desc_banks = (total_mem_size) /
  1100. (max_alloc_size - link_desc_align);
  1101. last_bank_size = total_mem_size %
  1102. (max_alloc_size - link_desc_align);
  1103. }
  1104. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  1105. "%s: total_mem_size: %d, num_link_desc_banks: %u",
  1106. __func__, total_mem_size, num_link_desc_banks);
  1107. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  1108. "%s: max_alloc_size: %d last_bank_size: %d",
  1109. __func__, max_alloc_size, last_bank_size);
  1110. for (i = 0; i < num_link_desc_banks; i++) {
  1111. baseaddr = &soc->mon_link_desc_banks[mac_id][i].
  1112. base_paddr_unaligned;
  1113. if (!dp_is_soc_reinit(soc)) {
  1114. soc->mon_link_desc_banks[mac_id][i].
  1115. base_vaddr_unaligned =
  1116. qdf_mem_alloc_consistent(soc->osdev,
  1117. soc->osdev->dev,
  1118. max_alloc_size,
  1119. baseaddr);
  1120. if (!soc->mon_link_desc_banks[mac_id][i].
  1121. base_vaddr_unaligned) {
  1122. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1123. QDF_TRACE_LEVEL_ERROR,
  1124. "%s: Link desc mem alloc failed",
  1125. __func__);
  1126. goto fail;
  1127. }
  1128. }
  1129. soc->mon_link_desc_banks[mac_id][i].size = max_alloc_size;
  1130. soc->mon_link_desc_banks[mac_id][i].base_vaddr =
  1131. (void *)((unsigned long)
  1132. (soc->mon_link_desc_banks[mac_id][i].
  1133. base_vaddr_unaligned) +
  1134. ((unsigned long)
  1135. (soc->mon_link_desc_banks[mac_id][i].
  1136. base_vaddr_unaligned) %
  1137. link_desc_align));
  1138. soc->mon_link_desc_banks[mac_id][i].base_paddr =
  1139. (unsigned long)
  1140. (soc->mon_link_desc_banks[mac_id][i].
  1141. base_paddr_unaligned) +
  1142. ((unsigned long)
  1143. (soc->mon_link_desc_banks[mac_id][i].base_vaddr) -
  1144. (unsigned long)
  1145. (soc->mon_link_desc_banks[mac_id][i].
  1146. base_vaddr_unaligned));
  1147. }
  1148. if (last_bank_size) {
  1149. /* Allocate last bank in case total memory required is not exact
  1150. * multiple of max_alloc_size
  1151. */
  1152. baseaddr = &soc->mon_link_desc_banks[mac_id][i].
  1153. base_paddr_unaligned;
  1154. if (!dp_is_soc_reinit(soc)) {
  1155. soc->mon_link_desc_banks[mac_id][i].
  1156. base_vaddr_unaligned =
  1157. qdf_mem_alloc_consistent(soc->osdev,
  1158. soc->osdev->dev,
  1159. last_bank_size,
  1160. baseaddr);
  1161. if (!soc->mon_link_desc_banks[mac_id][i].
  1162. base_vaddr_unaligned) {
  1163. QDF_TRACE(QDF_MODULE_ID_TXRX,
  1164. QDF_TRACE_LEVEL_ERROR,
  1165. "%s: alloc fail:mon link desc pool",
  1166. __func__);
  1167. goto fail;
  1168. }
  1169. }
  1170. soc->mon_link_desc_banks[mac_id][i].size =
  1171. last_bank_size;
  1172. soc->mon_link_desc_banks[mac_id][i].base_vaddr =
  1173. (void *)((unsigned long)
  1174. (soc->mon_link_desc_banks[mac_id][i].
  1175. base_vaddr_unaligned) +
  1176. ((unsigned long)
  1177. (soc->mon_link_desc_banks[mac_id][i].
  1178. base_vaddr_unaligned) %
  1179. link_desc_align));
  1180. soc->mon_link_desc_banks[mac_id][i].base_paddr =
  1181. (unsigned long)
  1182. (soc->mon_link_desc_banks[mac_id][i].
  1183. base_paddr_unaligned) +
  1184. ((unsigned long)
  1185. (soc->mon_link_desc_banks[mac_id][i].base_vaddr) -
  1186. (unsigned long)
  1187. (soc->mon_link_desc_banks[mac_id][i].
  1188. base_vaddr_unaligned));
  1189. }
  1190. /* Allocate and setup link descriptor idle list for HW internal use */
  1191. entry_size = hal_srng_get_entrysize(soc->hal_soc, RXDMA_MONITOR_DESC);
  1192. total_mem_size = entry_size * total_link_descs;
  1193. mon_desc_srng = soc->rxdma_mon_desc_ring[mac_id].hal_srng;
  1194. num_replenish_buf = 0;
  1195. if (total_mem_size <= max_alloc_size) {
  1196. void *desc;
  1197. for (i = 0;
  1198. i < MAX_MON_LINK_DESC_BANKS &&
  1199. soc->mon_link_desc_banks[mac_id][i].base_paddr;
  1200. i++) {
  1201. uint32_t num_entries =
  1202. (soc->mon_link_desc_banks[mac_id][i].size -
  1203. (unsigned long)
  1204. (soc->mon_link_desc_banks[mac_id][i].base_vaddr) -
  1205. (unsigned long)
  1206. (soc->mon_link_desc_banks[mac_id][i].
  1207. base_vaddr_unaligned)) / link_desc_size;
  1208. unsigned long paddr =
  1209. (unsigned long)
  1210. (soc->mon_link_desc_banks[mac_id][i].base_paddr);
  1211. unsigned long vaddr =
  1212. (unsigned long)
  1213. (soc->mon_link_desc_banks[mac_id][i].base_vaddr);
  1214. hal_srng_access_start_unlocked(soc->hal_soc,
  1215. mon_desc_srng);
  1216. while (num_entries && (desc =
  1217. hal_srng_src_get_next(soc->hal_soc,
  1218. mon_desc_srng))) {
  1219. hal_set_link_desc_addr(desc, i, paddr);
  1220. num_entries--;
  1221. num_replenish_buf++;
  1222. paddr += link_desc_size;
  1223. vaddr += link_desc_size;
  1224. }
  1225. hal_srng_access_end_unlocked(soc->hal_soc,
  1226. mon_desc_srng);
  1227. }
  1228. } else {
  1229. qdf_assert(0);
  1230. }
  1231. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  1232. "%s: successfully replenished %d buffer",
  1233. __func__, num_replenish_buf);
  1234. return QDF_STATUS_SUCCESS;
  1235. fail:
  1236. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  1237. if (soc->mon_link_desc_banks[mac_id][i].
  1238. base_vaddr_unaligned) {
  1239. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1240. soc->mon_link_desc_banks[mac_id][i].
  1241. size,
  1242. soc->mon_link_desc_banks[mac_id][i].
  1243. base_vaddr_unaligned,
  1244. soc->mon_link_desc_banks[mac_id][i].
  1245. base_paddr_unaligned, 0);
  1246. soc->mon_link_desc_banks[mac_id][i].
  1247. base_vaddr_unaligned = NULL;
  1248. }
  1249. }
  1250. return QDF_STATUS_E_FAILURE;
  1251. }
  1252. /*
  1253. * Free link descriptor pool that was setup HW
  1254. */
  1255. static
  1256. void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  1257. {
  1258. int i;
  1259. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  1260. if (soc->mon_link_desc_banks[mac_id][i].
  1261. base_vaddr_unaligned) {
  1262. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  1263. soc->mon_link_desc_banks[mac_id][i].
  1264. size,
  1265. soc->mon_link_desc_banks[mac_id][i].
  1266. base_vaddr_unaligned,
  1267. soc->mon_link_desc_banks[mac_id][i].
  1268. base_paddr_unaligned, 0);
  1269. soc->mon_link_desc_banks[mac_id][i].
  1270. base_vaddr_unaligned = NULL;
  1271. }
  1272. }
  1273. }
  1274. /**
  1275. * dp_mon_buf_delayed_replenish() - Helper routine to replenish monitor dest buf
  1276. * @pdev: DP pdev object
  1277. *
  1278. * Return: None
  1279. */
  1280. void dp_mon_buf_delayed_replenish(struct dp_pdev *pdev)
  1281. {
  1282. struct dp_soc *soc;
  1283. uint32_t mac_for_pdev;
  1284. union dp_rx_desc_list_elem_t *tail = NULL;
  1285. union dp_rx_desc_list_elem_t *desc_list = NULL;
  1286. uint32_t num_entries;
  1287. uint32_t id;
  1288. soc = pdev->soc;
  1289. num_entries = wlan_cfg_get_dma_mon_buf_ring_size(pdev->wlan_cfg_ctx);
  1290. for (id = 0; id < NUM_RXDMA_RINGS_PER_PDEV; id++) {
  1291. /*
  1292. * Get mac_for_pdev appropriately for both MCL & WIN,
  1293. * since MCL have multiple mon buf rings and WIN just
  1294. * has one mon buffer ring mapped per pdev, below API
  1295. * helps identify accurate buffer_ring for both cases
  1296. *
  1297. */
  1298. mac_for_pdev =
  1299. dp_get_lmac_id_for_pdev_id(soc, id, pdev->pdev_id);
  1300. dp_rx_buffers_replenish(soc, mac_for_pdev,
  1301. dp_rxdma_get_mon_buf_ring(pdev,
  1302. mac_for_pdev),
  1303. dp_rx_get_mon_desc_pool(soc,
  1304. mac_for_pdev,
  1305. pdev->pdev_id),
  1306. num_entries, &desc_list, &tail);
  1307. }
  1308. }
  1309. #else
  1310. static
  1311. QDF_STATUS dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  1312. {
  1313. return QDF_STATUS_SUCCESS;
  1314. }
  1315. static QDF_STATUS
  1316. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev, int mac_id)
  1317. {
  1318. return QDF_STATUS_SUCCESS;
  1319. }
  1320. static
  1321. void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  1322. {
  1323. }
  1324. static QDF_STATUS
  1325. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev, int mac_id)
  1326. {
  1327. return QDF_STATUS_SUCCESS;
  1328. }
  1329. void dp_mon_buf_delayed_replenish(struct dp_pdev *pdev)
  1330. {}
  1331. #endif
  1332. /**
  1333. * dp_rx_pdev_mon_cmn_detach() - detach dp rx for monitor mode
  1334. * @pdev: core txrx pdev context
  1335. * @mac_id: mac_id for which deinit is to be done
  1336. *
  1337. * This function will free DP Rx resources for
  1338. * monitor mode
  1339. *
  1340. * Return: QDF_STATUS_SUCCESS: success
  1341. * QDF_STATUS_E_RESOURCES: Error return
  1342. */
  1343. static QDF_STATUS
  1344. dp_rx_pdev_mon_cmn_detach(struct dp_pdev *pdev, int mac_id) {
  1345. struct dp_soc *soc = pdev->soc;
  1346. uint8_t pdev_id = pdev->pdev_id;
  1347. int mac_for_pdev = dp_get_lmac_id_for_pdev_id(soc, mac_id, pdev_id);
  1348. dp_mon_link_desc_pool_cleanup(soc, mac_for_pdev);
  1349. dp_rx_pdev_mon_status_detach(pdev, mac_for_pdev);
  1350. dp_rx_pdev_mon_buf_detach(pdev, mac_for_pdev);
  1351. return QDF_STATUS_SUCCESS;
  1352. }
  1353. /**
  1354. * dp_rx_pdev_mon_cmn_attach() - attach DP RX for monitor mode
  1355. * @pdev: core txrx pdev context
  1356. * @mac_id: mac_id for which init is to be done
  1357. *
  1358. * This function Will allocate dp rx resource and
  1359. * initialize resources for monitor mode.
  1360. *
  1361. * Return: QDF_STATUS_SUCCESS: success
  1362. * QDF_STATUS_E_RESOURCES: Error return
  1363. */
  1364. static QDF_STATUS
  1365. dp_rx_pdev_mon_cmn_attach(struct dp_pdev *pdev, int mac_id) {
  1366. struct dp_soc *soc = pdev->soc;
  1367. uint8_t pdev_id = pdev->pdev_id;
  1368. int mac_for_pdev = dp_get_lmac_id_for_pdev_id(soc, mac_id, pdev_id);
  1369. QDF_STATUS status;
  1370. status = dp_rx_pdev_mon_buf_attach(pdev, mac_for_pdev);
  1371. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1372. dp_err("%s: dp_rx_pdev_mon_buf_attach() failed\n", __func__);
  1373. goto fail;
  1374. }
  1375. status = dp_rx_pdev_mon_status_attach(pdev, mac_for_pdev);
  1376. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1377. dp_err("%s: dp_rx_pdev_mon_status_attach() failed", __func__);
  1378. goto mon_buf_detach;
  1379. }
  1380. status = dp_mon_link_desc_pool_setup(soc, mac_for_pdev);
  1381. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1382. dp_err("%s: dp_mon_link_desc_pool_setup() failed", __func__);
  1383. goto mon_status_detach;
  1384. }
  1385. return status;
  1386. mon_status_detach:
  1387. dp_rx_pdev_mon_status_detach(pdev, mac_for_pdev);
  1388. mon_buf_detach:
  1389. dp_rx_pdev_mon_buf_detach(pdev, mac_for_pdev);
  1390. fail:
  1391. return status;
  1392. }
  1393. /**
  1394. * dp_rx_pdev_mon_attach() - attach DP RX for monitor mode
  1395. * @pdev: core txrx pdev context
  1396. *
  1397. * This function will attach a DP RX for monitor mode instance into
  1398. * the main device (SOC) context. Will allocate dp rx resource and
  1399. * initialize resources.
  1400. *
  1401. * Return: QDF_STATUS_SUCCESS: success
  1402. * QDF_STATUS_E_RESOURCES: Error return
  1403. */
  1404. QDF_STATUS
  1405. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  1406. QDF_STATUS status;
  1407. uint8_t pdev_id = pdev->pdev_id;
  1408. int mac_id;
  1409. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  1410. "%s: pdev attach id=%d", __func__, pdev_id);
  1411. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1412. status = dp_rx_pdev_mon_cmn_attach(pdev, mac_id);
  1413. if (!QDF_IS_STATUS_SUCCESS(status)) {
  1414. QDF_TRACE(QDF_MODULE_ID_DP,
  1415. QDF_TRACE_LEVEL_ERROR,
  1416. "%s: dp_rx_pdev_mon_cmn_attach(%d) failed\n",
  1417. __func__, mac_id);
  1418. goto fail;
  1419. }
  1420. }
  1421. pdev->mon_last_linkdesc_paddr = 0;
  1422. pdev->mon_last_buf_cookie = DP_RX_DESC_COOKIE_MAX + 1;
  1423. qdf_spinlock_create(&pdev->mon_lock);
  1424. return QDF_STATUS_SUCCESS;
  1425. fail:
  1426. for (mac_id = mac_id - 1; mac_id >= 0; mac_id--)
  1427. dp_rx_pdev_mon_cmn_detach(pdev, mac_id);
  1428. return status;
  1429. }
  1430. QDF_STATUS
  1431. dp_mon_link_free(struct dp_pdev *pdev) {
  1432. uint8_t pdev_id = pdev->pdev_id;
  1433. struct dp_soc *soc = pdev->soc;
  1434. int mac_id;
  1435. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1436. int mac_for_pdev = dp_get_lmac_id_for_pdev_id(soc,
  1437. mac_id, pdev_id);
  1438. dp_mon_link_desc_pool_cleanup(soc, mac_for_pdev);
  1439. }
  1440. return QDF_STATUS_SUCCESS;
  1441. }
  1442. /**
  1443. * dp_rx_pdev_mon_detach() - detach dp rx for monitor mode
  1444. * @pdev: core txrx pdev context
  1445. *
  1446. * This function will detach DP RX for monitor mode from
  1447. * main device context. will free DP Rx resources for
  1448. * monitor mode
  1449. *
  1450. * Return: QDF_STATUS_SUCCESS: success
  1451. * QDF_STATUS_E_RESOURCES: Error return
  1452. */
  1453. QDF_STATUS
  1454. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  1455. uint8_t pdev_id = pdev->pdev_id;
  1456. int mac_id;
  1457. qdf_spinlock_destroy(&pdev->mon_lock);
  1458. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  1459. int mac_for_pdev = dp_get_lmac_id_for_pdev_id(pdev->soc,
  1460. mac_id, pdev_id);
  1461. dp_rx_pdev_mon_status_detach(pdev, mac_for_pdev);
  1462. dp_rx_pdev_mon_buf_detach(pdev, mac_for_pdev);
  1463. }
  1464. return QDF_STATUS_SUCCESS;
  1465. }
  1466. #else
  1467. QDF_STATUS
  1468. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  1469. return QDF_STATUS_SUCCESS;
  1470. }
  1471. QDF_STATUS
  1472. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  1473. return QDF_STATUS_SUCCESS;
  1474. }
  1475. QDF_STATUS
  1476. dp_mon_link_free(struct dp_pdev *pdev) {
  1477. return QDF_STATUS_SUCCESS;
  1478. }
  1479. void dp_mon_buf_delayed_replenish(struct dp_pdev *pdev)
  1480. {}
  1481. #endif /* DISABLE_MON_CONFIG */