cam_cdm_intf.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  4. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/io.h>
  8. #include <linux/of.h>
  9. #include <linux/module.h>
  10. #include <linux/timer.h>
  11. #include <linux/kernel.h>
  12. #include "cam_cdm_intf_api.h"
  13. #include "cam_cdm.h"
  14. #include "cam_cdm_virtual.h"
  15. #include "cam_soc_util.h"
  16. #include "cam_cdm_soc.h"
  17. #include "cam_cdm_core_common.h"
  18. #include "camera_main.h"
  19. static struct cam_cdm_intf_mgr cdm_mgr;
  20. static DEFINE_MUTEX(cam_cdm_mgr_lock);
  21. static const struct of_device_id msm_cam_cdm_intf_dt_match[] = {
  22. { .compatible = "qcom,cam-cdm-intf", },
  23. {}
  24. };
  25. static int get_cdm_mgr_refcount(void)
  26. {
  27. int rc = 0;
  28. mutex_lock(&cam_cdm_mgr_lock);
  29. if (cdm_mgr.probe_done == false) {
  30. CAM_ERR(CAM_CDM, "CDM intf mgr not probed yet");
  31. rc = -EPERM;
  32. } else {
  33. CAM_DBG(CAM_CDM, "CDM intf mgr get refcount=%d",
  34. cdm_mgr.refcount);
  35. cdm_mgr.refcount++;
  36. }
  37. mutex_unlock(&cam_cdm_mgr_lock);
  38. return rc;
  39. }
  40. static void put_cdm_mgr_refcount(void)
  41. {
  42. mutex_lock(&cam_cdm_mgr_lock);
  43. if (cdm_mgr.probe_done == false) {
  44. CAM_ERR(CAM_CDM, "CDM intf mgr not probed yet");
  45. } else {
  46. CAM_DBG(CAM_CDM, "CDM intf mgr put refcount=%d",
  47. cdm_mgr.refcount);
  48. if (cdm_mgr.refcount > 0) {
  49. cdm_mgr.refcount--;
  50. } else {
  51. CAM_ERR(CAM_CDM, "Refcount put when zero");
  52. WARN_ON(1);
  53. }
  54. }
  55. mutex_unlock(&cam_cdm_mgr_lock);
  56. }
  57. static int get_cdm_iommu_handle(struct cam_iommu_handle *cdm_handles,
  58. uint32_t hw_idx)
  59. {
  60. int rc = -EPERM;
  61. struct cam_hw_intf *hw = cdm_mgr.nodes[hw_idx].device;
  62. if (hw->hw_ops.get_hw_caps) {
  63. rc = hw->hw_ops.get_hw_caps(hw->hw_priv, cdm_handles,
  64. sizeof(struct cam_iommu_handle));
  65. }
  66. return rc;
  67. }
  68. static int get_cdm_index_by_id(char *identifier,
  69. uint32_t cell_index, uint32_t *hw_index)
  70. {
  71. int rc = -EPERM, i, j;
  72. char client_name[128], name_index[160];
  73. snprintf(client_name, sizeof(client_name), "%s", identifier);
  74. snprintf(name_index, sizeof(name_index), "%s%d",
  75. identifier, cell_index);
  76. CAM_DBG(CAM_CDM,
  77. "Looking for HW id of =%s or %s and index=%d cdm_count %d",
  78. identifier, name_index, cell_index, cdm_mgr.cdm_count);
  79. mutex_lock(&cam_cdm_mgr_lock);
  80. for (i = 0; i < cdm_mgr.cdm_count; i++) {
  81. mutex_lock(&cdm_mgr.nodes[i].lock);
  82. CAM_DBG(CAM_CDM, "dt_num_supported_clients=%d",
  83. cdm_mgr.nodes[i].data->dt_num_supported_clients);
  84. for (j = 0; j <
  85. cdm_mgr.nodes[i].data->dt_num_supported_clients; j++) {
  86. CAM_DBG(CAM_CDM, "client name:%s dev Index: %d",
  87. cdm_mgr.nodes[i].data->dt_cdm_client_name[j],
  88. i);
  89. if (!strcmp(
  90. cdm_mgr.nodes[i].data->dt_cdm_client_name[j],
  91. client_name) || !strcmp(
  92. cdm_mgr.nodes[i].data->dt_cdm_client_name[j],
  93. name_index)) {
  94. rc = 0;
  95. *hw_index = i;
  96. break;
  97. }
  98. }
  99. mutex_unlock(&cdm_mgr.nodes[i].lock);
  100. if (rc == 0)
  101. break;
  102. }
  103. mutex_unlock(&cam_cdm_mgr_lock);
  104. return rc;
  105. }
  106. int cam_cdm_get_iommu_handle(char *identifier,
  107. struct cam_iommu_handle *cdm_handles)
  108. {
  109. int i, j, rc = -EPERM;
  110. if ((!identifier) || (!cdm_handles))
  111. return -EINVAL;
  112. if (get_cdm_mgr_refcount()) {
  113. CAM_ERR(CAM_CDM, "CDM intf mgr get refcount failed");
  114. return rc;
  115. }
  116. CAM_DBG(CAM_CDM, "Looking for Iommu handle of %s", identifier);
  117. for (i = 0; i < cdm_mgr.cdm_count; i++) {
  118. mutex_lock(&cdm_mgr.nodes[i].lock);
  119. if (!cdm_mgr.nodes[i].data) {
  120. mutex_unlock(&cdm_mgr.nodes[i].lock);
  121. continue;
  122. }
  123. CAM_DBG(CAM_CDM, "dt_num_supported_clients=%d",
  124. cdm_mgr.nodes[i].data->dt_num_supported_clients);
  125. for (j = 0; j <
  126. cdm_mgr.nodes[i].data->dt_num_supported_clients;
  127. j++) {
  128. CAM_DBG(CAM_CDM, "client name:%s dev Index: %d",
  129. cdm_mgr.nodes[i].data->dt_cdm_client_name[j],
  130. i);
  131. if (!strcmp(
  132. cdm_mgr.nodes[i].data->dt_cdm_client_name[j],
  133. identifier)) {
  134. rc = get_cdm_iommu_handle(cdm_handles, i);
  135. break;
  136. }
  137. }
  138. mutex_unlock(&cdm_mgr.nodes[i].lock);
  139. if (rc == 0)
  140. break;
  141. }
  142. put_cdm_mgr_refcount();
  143. return rc;
  144. }
  145. EXPORT_SYMBOL(cam_cdm_get_iommu_handle);
  146. int cam_cdm_acquire(struct cam_cdm_acquire_data *data)
  147. {
  148. int rc = -EPERM;
  149. struct cam_hw_intf *hw;
  150. struct cam_hw_info *cdm_hw;
  151. struct cam_cdm *core = NULL;
  152. uint32_t hw_index = 0;
  153. if ((!data) || (!data->base_array_cnt))
  154. return -EINVAL;
  155. if (get_cdm_mgr_refcount()) {
  156. CAM_ERR(CAM_CDM, "CDM intf mgr get refcount failed");
  157. return rc;
  158. }
  159. if (data->id > CAM_CDM_HW_ANY) {
  160. CAM_ERR(CAM_CDM,
  161. "only CAM_CDM_VIRTUAL/CAM_CDM_HW_ANY is supported");
  162. rc = -EPERM;
  163. goto end;
  164. }
  165. rc = get_cdm_index_by_id(data->identifier, data->cell_index,
  166. &hw_index);
  167. if ((rc < 0) && (hw_index < CAM_CDM_INTF_MGR_MAX_SUPPORTED_CDM)) {
  168. CAM_ERR(CAM_CDM, "Failed to identify associated hw id");
  169. goto end;
  170. } else {
  171. hw = cdm_mgr.nodes[hw_index].device;
  172. if (hw && hw->hw_ops.process_cmd) {
  173. cdm_hw = hw->hw_priv;
  174. core = (struct cam_cdm *)cdm_hw->core_info;
  175. data->id = core->id;
  176. data->hw_idx = hw->hw_idx;
  177. CAM_DBG(CAM_CDM,
  178. "Device = %s, hw_index = %d, CDM id = %d",
  179. data->identifier, hw_index, data->id);
  180. rc = hw->hw_ops.process_cmd(hw->hw_priv,
  181. CAM_CDM_HW_INTF_CMD_ACQUIRE, data,
  182. sizeof(struct cam_cdm_acquire_data));
  183. if (rc < 0) {
  184. CAM_ERR(CAM_CDM, "CDM hw acquire failed");
  185. goto end;
  186. }
  187. } else {
  188. CAM_ERR(CAM_CDM, "idx %d doesn't have acquire ops",
  189. hw_index);
  190. rc = -EPERM;
  191. }
  192. }
  193. end:
  194. if (rc < 0) {
  195. CAM_ERR(CAM_CDM, "CDM acquire failed for id=%d name=%s, idx=%d",
  196. data->id, data->identifier, data->cell_index);
  197. put_cdm_mgr_refcount();
  198. }
  199. return rc;
  200. }
  201. EXPORT_SYMBOL(cam_cdm_acquire);
  202. struct cam_cdm_utils_ops *cam_cdm_publish_ops(void)
  203. {
  204. struct cam_hw_version cdm_version;
  205. cdm_version.major = 1;
  206. cdm_version.minor = 0;
  207. cdm_version.incr = 0;
  208. cdm_version.reserved = 0;
  209. return cam_cdm_get_ops(0, &cdm_version, true);
  210. }
  211. EXPORT_SYMBOL(cam_cdm_publish_ops);
  212. int cam_cdm_release(uint32_t handle)
  213. {
  214. uint32_t hw_index;
  215. int rc = -EPERM;
  216. struct cam_hw_intf *hw;
  217. if (get_cdm_mgr_refcount()) {
  218. CAM_ERR(CAM_CDM, "CDM intf mgr get refcount failed");
  219. return rc;
  220. }
  221. hw_index = CAM_CDM_GET_HW_IDX(handle);
  222. if (hw_index < CAM_CDM_INTF_MGR_MAX_SUPPORTED_CDM) {
  223. hw = cdm_mgr.nodes[hw_index].device;
  224. if (hw && hw->hw_ops.process_cmd) {
  225. rc = hw->hw_ops.process_cmd(hw->hw_priv,
  226. CAM_CDM_HW_INTF_CMD_RELEASE, &handle,
  227. sizeof(handle));
  228. if (rc < 0)
  229. CAM_ERR(CAM_CDM,
  230. "hw release failed for handle=%x",
  231. handle);
  232. } else
  233. CAM_ERR(CAM_CDM, "hw idx %d doesn't have release ops",
  234. hw_index);
  235. }
  236. put_cdm_mgr_refcount();
  237. if (rc == 0)
  238. put_cdm_mgr_refcount();
  239. return rc;
  240. }
  241. EXPORT_SYMBOL(cam_cdm_release);
  242. int cam_cdm_submit_bls(uint32_t handle, struct cam_cdm_bl_request *data)
  243. {
  244. uint32_t hw_index;
  245. int rc = -EINVAL;
  246. struct cam_hw_intf *hw;
  247. if (!data)
  248. return rc;
  249. if (get_cdm_mgr_refcount()) {
  250. CAM_ERR(CAM_CDM, "CDM intf mgr get refcount failed");
  251. rc = -EPERM;
  252. return rc;
  253. }
  254. hw_index = CAM_CDM_GET_HW_IDX(handle);
  255. if (hw_index < CAM_CDM_INTF_MGR_MAX_SUPPORTED_CDM) {
  256. struct cam_cdm_hw_intf_cmd_submit_bl req;
  257. hw = cdm_mgr.nodes[hw_index].device;
  258. if (hw && hw->hw_ops.process_cmd) {
  259. req.data = data;
  260. req.handle = handle;
  261. rc = hw->hw_ops.process_cmd(hw->hw_priv,
  262. CAM_CDM_HW_INTF_CMD_SUBMIT_BL, &req,
  263. sizeof(struct cam_cdm_hw_intf_cmd_submit_bl));
  264. if (rc < 0)
  265. CAM_ERR(CAM_CDM,
  266. "hw submit bl failed for handle=%x",
  267. handle);
  268. } else {
  269. CAM_ERR(CAM_CDM, "hw idx %d doesn't have submit ops",
  270. hw_index);
  271. }
  272. }
  273. put_cdm_mgr_refcount();
  274. return rc;
  275. }
  276. EXPORT_SYMBOL(cam_cdm_submit_bls);
  277. int cam_cdm_stream_on(uint32_t handle)
  278. {
  279. uint32_t hw_index;
  280. int rc = -EINVAL;
  281. struct cam_hw_intf *hw;
  282. if (get_cdm_mgr_refcount()) {
  283. CAM_ERR(CAM_CDM, "CDM intf mgr get refcount failed");
  284. rc = -EPERM;
  285. return rc;
  286. }
  287. hw_index = CAM_CDM_GET_HW_IDX(handle);
  288. if (hw_index < CAM_CDM_INTF_MGR_MAX_SUPPORTED_CDM) {
  289. hw = cdm_mgr.nodes[hw_index].device;
  290. if (hw && hw->hw_ops.start) {
  291. rc = hw->hw_ops.start(hw->hw_priv, &handle,
  292. sizeof(uint32_t));
  293. if (rc < 0)
  294. CAM_ERR(CAM_CDM,
  295. "hw start failed handle=%x",
  296. handle);
  297. } else {
  298. CAM_ERR(CAM_CDM,
  299. "hw idx %d doesn't have start ops",
  300. hw_index);
  301. }
  302. }
  303. put_cdm_mgr_refcount();
  304. return rc;
  305. }
  306. EXPORT_SYMBOL(cam_cdm_stream_on);
  307. int cam_cdm_stream_off(uint32_t handle)
  308. {
  309. uint32_t hw_index;
  310. int rc = -EINVAL;
  311. struct cam_hw_intf *hw;
  312. if (get_cdm_mgr_refcount()) {
  313. CAM_ERR(CAM_CDM, "CDM intf mgr get refcount failed");
  314. rc = -EPERM;
  315. return rc;
  316. }
  317. hw_index = CAM_CDM_GET_HW_IDX(handle);
  318. if (hw_index < CAM_CDM_INTF_MGR_MAX_SUPPORTED_CDM) {
  319. hw = cdm_mgr.nodes[hw_index].device;
  320. if (hw && hw->hw_ops.stop) {
  321. rc = hw->hw_ops.stop(hw->hw_priv, &handle,
  322. sizeof(uint32_t));
  323. if (rc < 0)
  324. CAM_ERR(CAM_CDM, "hw stop failed handle=%x",
  325. handle);
  326. } else {
  327. CAM_ERR(CAM_CDM, "hw idx %d doesn't have stop ops",
  328. hw_index);
  329. }
  330. }
  331. put_cdm_mgr_refcount();
  332. return rc;
  333. }
  334. EXPORT_SYMBOL(cam_cdm_stream_off);
  335. int cam_cdm_reset_hw(uint32_t handle)
  336. {
  337. uint32_t hw_index;
  338. int rc = -EINVAL;
  339. struct cam_hw_intf *hw;
  340. if (get_cdm_mgr_refcount()) {
  341. CAM_ERR(CAM_CDM, "CDM intf mgr get refcount failed");
  342. rc = -EPERM;
  343. return rc;
  344. }
  345. hw_index = CAM_CDM_GET_HW_IDX(handle);
  346. if (hw_index < CAM_CDM_INTF_MGR_MAX_SUPPORTED_CDM) {
  347. hw = cdm_mgr.nodes[hw_index].device;
  348. if (hw && hw->hw_ops.process_cmd) {
  349. rc = hw->hw_ops.process_cmd(hw->hw_priv,
  350. CAM_CDM_HW_INTF_CMD_RESET_HW, &handle,
  351. sizeof(handle));
  352. if (rc < 0)
  353. CAM_ERR(CAM_CDM,
  354. "CDM hw release failed for handle=%x",
  355. handle);
  356. } else {
  357. CAM_ERR(CAM_CDM, "hw idx %d doesn't have release ops",
  358. hw_index);
  359. }
  360. }
  361. put_cdm_mgr_refcount();
  362. return rc;
  363. }
  364. EXPORT_SYMBOL(cam_cdm_reset_hw);
  365. int cam_cdm_flush_hw(uint32_t handle)
  366. {
  367. uint32_t hw_index;
  368. int rc = -EINVAL;
  369. struct cam_hw_intf *hw;
  370. if (get_cdm_mgr_refcount()) {
  371. CAM_ERR(CAM_CDM, "CDM intf mgr get refcount failed");
  372. rc = -EPERM;
  373. return rc;
  374. }
  375. hw_index = CAM_CDM_GET_HW_IDX(handle);
  376. if (hw_index < CAM_CDM_INTF_MGR_MAX_SUPPORTED_CDM) {
  377. hw = cdm_mgr.nodes[hw_index].device;
  378. if (hw && hw->hw_ops.process_cmd) {
  379. rc = hw->hw_ops.process_cmd(hw->hw_priv,
  380. CAM_CDM_HW_INTF_CMD_FLUSH_HW, &handle,
  381. sizeof(handle));
  382. if (rc < 0)
  383. CAM_ERR(CAM_CDM,
  384. "CDM hw release failed for handle=%x",
  385. handle);
  386. } else {
  387. CAM_ERR(CAM_CDM, "hw idx %d doesn't have release ops",
  388. hw_index);
  389. }
  390. }
  391. put_cdm_mgr_refcount();
  392. return rc;
  393. }
  394. EXPORT_SYMBOL(cam_cdm_flush_hw);
  395. int cam_cdm_handle_error(uint32_t handle)
  396. {
  397. uint32_t hw_index;
  398. int rc = -EINVAL;
  399. struct cam_hw_intf *hw;
  400. if (get_cdm_mgr_refcount()) {
  401. CAM_ERR(CAM_CDM, "CDM intf mgr get refcount failed");
  402. rc = -EPERM;
  403. return rc;
  404. }
  405. hw_index = CAM_CDM_GET_HW_IDX(handle);
  406. if (hw_index < CAM_CDM_INTF_MGR_MAX_SUPPORTED_CDM) {
  407. hw = cdm_mgr.nodes[hw_index].device;
  408. if (hw && hw->hw_ops.process_cmd) {
  409. rc = hw->hw_ops.process_cmd(hw->hw_priv,
  410. CAM_CDM_HW_INTF_CMD_HANDLE_ERROR,
  411. &handle,
  412. sizeof(handle));
  413. if (rc < 0)
  414. CAM_ERR(CAM_CDM,
  415. "CDM hw release failed for handle=%x",
  416. handle);
  417. } else {
  418. CAM_ERR(CAM_CDM, "hw idx %d doesn't have release ops",
  419. hw_index);
  420. }
  421. }
  422. put_cdm_mgr_refcount();
  423. return rc;
  424. }
  425. EXPORT_SYMBOL(cam_cdm_handle_error);
  426. int cam_cdm_detect_hang_error(uint32_t handle)
  427. {
  428. uint32_t hw_index;
  429. int rc = -EINVAL;
  430. struct cam_hw_intf *hw;
  431. if (get_cdm_mgr_refcount()) {
  432. CAM_ERR(CAM_CDM, "CDM intf mgr get refcount failed");
  433. rc = -EPERM;
  434. return rc;
  435. }
  436. hw_index = CAM_CDM_GET_HW_IDX(handle);
  437. if (hw_index < CAM_CDM_INTF_MGR_MAX_SUPPORTED_CDM) {
  438. hw = cdm_mgr.nodes[hw_index].device;
  439. if (hw && hw->hw_ops.process_cmd)
  440. rc = hw->hw_ops.process_cmd(hw->hw_priv,
  441. CAM_CDM_HW_INTF_CMD_HANG_DETECT,
  442. &handle,
  443. sizeof(handle));
  444. }
  445. put_cdm_mgr_refcount();
  446. return rc;
  447. }
  448. EXPORT_SYMBOL(cam_cdm_detect_hang_error);
  449. int cam_cdm_dump_debug_registers(uint32_t handle)
  450. {
  451. uint32_t hw_index;
  452. int rc = -EINVAL;
  453. struct cam_hw_intf *hw;
  454. if (get_cdm_mgr_refcount()) {
  455. CAM_ERR(CAM_CDM, "CDM intf mgr get refcount failed");
  456. rc = -EPERM;
  457. return rc;
  458. }
  459. hw_index = CAM_CDM_GET_HW_IDX(handle);
  460. if (hw_index < CAM_CDM_INTF_MGR_MAX_SUPPORTED_CDM) {
  461. hw = cdm_mgr.nodes[hw_index].device;
  462. if (hw && hw->hw_ops.process_cmd)
  463. rc = hw->hw_ops.process_cmd(hw->hw_priv,
  464. CAM_CDM_HW_INTF_DUMP_DBG_REGS,
  465. &handle,
  466. sizeof(handle));
  467. }
  468. put_cdm_mgr_refcount();
  469. return rc;
  470. }
  471. int cam_cdm_intf_register_hw_cdm(struct cam_hw_intf *hw,
  472. struct cam_cdm_private_dt_data *data, enum cam_cdm_type type,
  473. uint32_t *index)
  474. {
  475. int rc = -EINVAL;
  476. if ((!hw) || (!data) || (!index))
  477. return rc;
  478. if (get_cdm_mgr_refcount()) {
  479. CAM_ERR(CAM_CDM, "CDM intf mgr get refcount failed");
  480. return rc;
  481. }
  482. mutex_lock(&cam_cdm_mgr_lock);
  483. if ((type == CAM_VIRTUAL_CDM) &&
  484. (!cdm_mgr.nodes[CAM_SW_CDM_INDEX].device)) {
  485. mutex_lock(&cdm_mgr.nodes[CAM_SW_CDM_INDEX].lock);
  486. cdm_mgr.nodes[CAM_SW_CDM_INDEX].device = hw;
  487. cdm_mgr.nodes[CAM_SW_CDM_INDEX].data = data;
  488. *index = cdm_mgr.cdm_count;
  489. mutex_unlock(&cdm_mgr.nodes[CAM_SW_CDM_INDEX].lock);
  490. cdm_mgr.cdm_count++;
  491. rc = 0;
  492. } else if ((type == CAM_HW_CDM) && (cdm_mgr.cdm_count > 0)) {
  493. mutex_lock(&cdm_mgr.nodes[cdm_mgr.cdm_count].lock);
  494. cdm_mgr.nodes[cdm_mgr.cdm_count].device = hw;
  495. cdm_mgr.nodes[cdm_mgr.cdm_count].data = data;
  496. *index = cdm_mgr.cdm_count;
  497. mutex_unlock(&cdm_mgr.nodes[cdm_mgr.cdm_count].lock);
  498. cdm_mgr.cdm_count++;
  499. rc = 0;
  500. } else {
  501. CAM_ERR(CAM_CDM, "CDM registration failed type=%d count=%d",
  502. type, cdm_mgr.cdm_count);
  503. }
  504. mutex_unlock(&cam_cdm_mgr_lock);
  505. put_cdm_mgr_refcount();
  506. return rc;
  507. }
  508. int cam_cdm_intf_deregister_hw_cdm(struct cam_hw_intf *hw,
  509. struct cam_cdm_private_dt_data *data, enum cam_cdm_type type,
  510. uint32_t index)
  511. {
  512. int rc = -EINVAL;
  513. if ((!hw) || (!data))
  514. return rc;
  515. if (get_cdm_mgr_refcount()) {
  516. CAM_ERR(CAM_CDM, "CDM intf mgr get refcount failed");
  517. rc = -EPERM;
  518. return rc;
  519. }
  520. mutex_lock(&cam_cdm_mgr_lock);
  521. if ((type == CAM_VIRTUAL_CDM) &&
  522. (hw == cdm_mgr.nodes[CAM_SW_CDM_INDEX].device) &&
  523. (index == CAM_SW_CDM_INDEX)) {
  524. mutex_lock(&cdm_mgr.nodes[cdm_mgr.cdm_count].lock);
  525. cdm_mgr.nodes[CAM_SW_CDM_INDEX].device = NULL;
  526. cdm_mgr.nodes[CAM_SW_CDM_INDEX].data = NULL;
  527. mutex_unlock(&cdm_mgr.nodes[cdm_mgr.cdm_count].lock);
  528. rc = 0;
  529. } else if ((type == CAM_HW_CDM) &&
  530. (hw == cdm_mgr.nodes[index].device)) {
  531. mutex_lock(&cdm_mgr.nodes[index].lock);
  532. cdm_mgr.nodes[index].device = NULL;
  533. cdm_mgr.nodes[index].data = NULL;
  534. mutex_unlock(&cdm_mgr.nodes[index].lock);
  535. cdm_mgr.cdm_count--;
  536. rc = 0;
  537. } else {
  538. CAM_ERR(CAM_CDM, "CDM Deregistration failed type=%d index=%d",
  539. type, index);
  540. }
  541. mutex_unlock(&cam_cdm_mgr_lock);
  542. put_cdm_mgr_refcount();
  543. return rc;
  544. }
  545. static int cam_cdm_set_irq_line_test(void *data, u64 val)
  546. {
  547. int i, rc = 0;
  548. struct cam_hw_intf *hw_intf;
  549. if (get_cdm_mgr_refcount()) {
  550. CAM_ERR(CAM_CDM, "CDM intf mgr get refcount failed");
  551. return rc;
  552. }
  553. mutex_lock(&cam_cdm_mgr_lock);
  554. for (i = 0 ; i < cdm_mgr.cdm_count; i++) {
  555. if (!cdm_mgr.nodes[i].device || !cdm_mgr.nodes[i].data) {
  556. CAM_ERR(CAM_CDM, "invalid node present in index=%d", i);
  557. continue;
  558. }
  559. hw_intf = cdm_mgr.nodes[i].device;
  560. if (hw_intf->hw_ops.test_irq_line) {
  561. CAM_DBG(CAM_CDM, "Testing irq line for CDM at index %d", i);
  562. rc = hw_intf->hw_ops.test_irq_line(hw_intf->hw_priv);
  563. if (rc)
  564. CAM_ERR(CAM_CDM,
  565. "[%d] : CDM%d type %d - irq line test failed rc %d",
  566. i, hw_intf->hw_idx, hw_intf->hw_type, rc);
  567. else
  568. CAM_INFO(CAM_CDM,
  569. "[%d] : CDM%d type %d - irq line test passed",
  570. i, hw_intf->hw_idx, hw_intf->hw_type);
  571. } else {
  572. CAM_WARN(CAM_CDM, "test irq line interface not present for cdm at index %d",
  573. i);
  574. }
  575. }
  576. mutex_unlock(&cam_cdm_mgr_lock);
  577. put_cdm_mgr_refcount();
  578. return rc;
  579. }
  580. static int cam_cdm_get_irq_line_test(void *data, u64 *val)
  581. {
  582. return 0;
  583. }
  584. DEFINE_DEBUGFS_ATTRIBUTE(cam_cdm_irq_line_test, cam_cdm_get_irq_line_test,
  585. cam_cdm_set_irq_line_test, "%16llu");
  586. int cam_cdm_debugfs_init(struct cam_cdm_intf_mgr *mgr)
  587. {
  588. struct dentry *dbgfileptr = NULL;
  589. int rc;
  590. if (!cam_debugfs_available())
  591. return 0;
  592. rc = cam_debugfs_create_subdir("cdm", &dbgfileptr);
  593. if (rc) {
  594. CAM_ERR(CAM_CDM, "DebugFS could not create directory!");
  595. return rc;
  596. }
  597. mgr->dentry = dbgfileptr;
  598. debugfs_create_file("test_irq_line", 0644,
  599. mgr->dentry, NULL, &cam_cdm_irq_line_test);
  600. return 0;
  601. }
  602. static int cam_cdm_intf_component_bind(struct device *dev,
  603. struct device *master_dev, void *data)
  604. {
  605. int i, rc;
  606. struct platform_device *pdev = to_platform_device(dev);
  607. rc = cam_cdm_intf_mgr_soc_get_dt_properties(pdev, &cdm_mgr);
  608. if (rc) {
  609. CAM_ERR(CAM_CDM, "Failed to get dt properties");
  610. return rc;
  611. }
  612. mutex_lock(&cam_cdm_mgr_lock);
  613. for (i = 0 ; i < CAM_CDM_INTF_MGR_MAX_SUPPORTED_CDM; i++) {
  614. mutex_init(&cdm_mgr.nodes[i].lock);
  615. cdm_mgr.nodes[i].device = NULL;
  616. cdm_mgr.nodes[i].data = NULL;
  617. cdm_mgr.nodes[i].refcount = 0;
  618. }
  619. cdm_mgr.probe_done = true;
  620. cdm_mgr.refcount = 0;
  621. mutex_unlock(&cam_cdm_mgr_lock);
  622. rc = cam_virtual_cdm_probe(pdev);
  623. if (rc) {
  624. mutex_lock(&cam_cdm_mgr_lock);
  625. cdm_mgr.probe_done = false;
  626. for (i = 0 ; i < CAM_CDM_INTF_MGR_MAX_SUPPORTED_CDM; i++) {
  627. if (cdm_mgr.nodes[i].device || cdm_mgr.nodes[i].data ||
  628. (cdm_mgr.nodes[i].refcount != 0))
  629. CAM_ERR(CAM_CDM,
  630. "Valid node present in index=%d", i);
  631. mutex_destroy(&cdm_mgr.nodes[i].lock);
  632. cdm_mgr.nodes[i].device = NULL;
  633. cdm_mgr.nodes[i].data = NULL;
  634. cdm_mgr.nodes[i].refcount = 0;
  635. }
  636. mutex_unlock(&cam_cdm_mgr_lock);
  637. }
  638. cam_cdm_debugfs_init(&cdm_mgr);
  639. CAM_DBG(CAM_CDM, "CDM Intf component bound successfully");
  640. return rc;
  641. }
  642. static void cam_cdm_intf_component_unbind(struct device *dev,
  643. struct device *master_dev, void *data)
  644. {
  645. int i;
  646. struct platform_device *pdev = to_platform_device(dev);
  647. if (get_cdm_mgr_refcount()) {
  648. CAM_ERR(CAM_CDM, "CDM intf mgr get refcount failed");
  649. return;
  650. }
  651. if (cam_virtual_cdm_remove(pdev)) {
  652. CAM_ERR(CAM_CDM, "Virtual CDM remove failed");
  653. return;
  654. }
  655. put_cdm_mgr_refcount();
  656. mutex_lock(&cam_cdm_mgr_lock);
  657. if (cdm_mgr.refcount != 0) {
  658. CAM_ERR(CAM_CDM, "cdm manger refcount not zero %d",
  659. cdm_mgr.refcount);
  660. goto end;
  661. }
  662. for (i = 0 ; i < CAM_CDM_INTF_MGR_MAX_SUPPORTED_CDM; i++) {
  663. if (cdm_mgr.nodes[i].device || cdm_mgr.nodes[i].data ||
  664. (cdm_mgr.nodes[i].refcount != 0)) {
  665. CAM_ERR(CAM_CDM, "Valid node present in index=%d", i);
  666. goto end;
  667. }
  668. mutex_lock(&cdm_mgr.nodes[i].lock);
  669. cdm_mgr.nodes[i].device = NULL;
  670. cdm_mgr.nodes[i].data = NULL;
  671. cdm_mgr.nodes[i].refcount = 0;
  672. mutex_unlock(&cdm_mgr.nodes[i].lock);
  673. mutex_destroy(&cdm_mgr.nodes[i].lock);
  674. }
  675. cdm_mgr.probe_done = false;
  676. end:
  677. mutex_unlock(&cam_cdm_mgr_lock);
  678. }
  679. const static struct component_ops cam_cdm_intf_component_ops = {
  680. .bind = cam_cdm_intf_component_bind,
  681. .unbind = cam_cdm_intf_component_unbind,
  682. };
  683. static int cam_cdm_intf_probe(struct platform_device *pdev)
  684. {
  685. int rc = 0;
  686. CAM_DBG(CAM_CDM, "Adding CDM INTF component");
  687. rc = component_add(&pdev->dev, &cam_cdm_intf_component_ops);
  688. if (rc)
  689. CAM_ERR(CAM_CDM, "failed to add component rc: %d", rc);
  690. return rc;
  691. }
  692. static int cam_cdm_intf_remove(struct platform_device *pdev)
  693. {
  694. component_del(&pdev->dev, &cam_cdm_intf_component_ops);
  695. return 0;
  696. }
  697. struct platform_driver cam_cdm_intf_driver = {
  698. .probe = cam_cdm_intf_probe,
  699. .remove = cam_cdm_intf_remove,
  700. .driver = {
  701. .name = "msm_cam_cdm_intf",
  702. .owner = THIS_MODULE,
  703. .of_match_table = msm_cam_cdm_intf_dt_match,
  704. .suppress_bind_attrs = true,
  705. },
  706. };
  707. int cam_cdm_intf_init_module(void)
  708. {
  709. return platform_driver_register(&cam_cdm_intf_driver);
  710. }
  711. void cam_cdm_intf_exit_module(void)
  712. {
  713. platform_driver_unregister(&cam_cdm_intf_driver);
  714. }
  715. MODULE_DESCRIPTION("MSM Camera CDM Intf driver");
  716. MODULE_LICENSE("GPL v2");