dp_rx_mon_dest.c 33 KB

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  1. /*
  2. * Copyright (c) 2017-2018 The Linux Foundation. All rights reserved.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for
  5. * any purpose with or without fee is hereby granted, provided that the
  6. * above copyright notice and this permission notice appear in all
  7. * copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
  10. * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
  11. * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
  12. * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
  13. * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
  14. * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
  15. * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
  16. * PERFORMANCE OF THIS SOFTWARE.
  17. */
  18. #include "dp_types.h"
  19. #include "dp_rx.h"
  20. #include "dp_peer.h"
  21. #include "hal_rx.h"
  22. #include "hal_api.h"
  23. #include "qdf_trace.h"
  24. #include "qdf_nbuf.h"
  25. #include "hal_api_mon.h"
  26. #include "dp_rx_mon.h"
  27. #include "wlan_cfg.h"
  28. #include "dp_internal.h"
  29. /**
  30. * dp_rx_mon_link_desc_return() - Return a MPDU link descriptor to HW
  31. * (WBM), following error handling
  32. *
  33. * @dp_pdev: core txrx pdev context
  34. * @buf_addr_info: void pointer to monitor link descriptor buf addr info
  35. * Return: QDF_STATUS
  36. */
  37. static QDF_STATUS
  38. dp_rx_mon_link_desc_return(struct dp_pdev *dp_pdev,
  39. void *buf_addr_info, int mac_id)
  40. {
  41. struct dp_srng *dp_srng;
  42. void *hal_srng;
  43. void *hal_soc;
  44. QDF_STATUS status = QDF_STATUS_E_FAILURE;
  45. void *src_srng_desc;
  46. int mac_for_pdev = dp_get_mac_id_for_mac(dp_pdev->soc, mac_id);
  47. hal_soc = dp_pdev->soc->hal_soc;
  48. dp_srng = &dp_pdev->rxdma_mon_desc_ring[mac_for_pdev];
  49. hal_srng = dp_srng->hal_srng;
  50. qdf_assert(hal_srng);
  51. if (qdf_unlikely(hal_srng_access_start(hal_soc, hal_srng))) {
  52. /* TODO */
  53. /*
  54. * Need API to convert from hal_ring pointer to
  55. * Ring Type / Ring Id combo
  56. */
  57. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  58. "%s %d : \
  59. HAL RING Access For WBM Release SRNG Failed -- %pK\n",
  60. __func__, __LINE__, hal_srng);
  61. goto done;
  62. }
  63. src_srng_desc = hal_srng_src_get_next(hal_soc, hal_srng);
  64. if (qdf_likely(src_srng_desc)) {
  65. /* Return link descriptor through WBM ring (SW2WBM)*/
  66. hal_rx_mon_msdu_link_desc_set(hal_soc,
  67. src_srng_desc, buf_addr_info);
  68. status = QDF_STATUS_SUCCESS;
  69. } else {
  70. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  71. "%s %d -- Monitor Link Desc WBM Release Ring Full\n",
  72. __func__, __LINE__);
  73. }
  74. done:
  75. hal_srng_access_end(hal_soc, hal_srng);
  76. return status;
  77. }
  78. /**
  79. * dp_mon_adjust_frag_len() - MPDU and MSDU may spread across
  80. * multiple nbufs. This function
  81. * is to return data length in
  82. * fragmented buffer
  83. *
  84. * @total_len: pointer to remaining data length.
  85. * @frag_len: poiter to data length in this fragment.
  86. */
  87. static inline void dp_mon_adjust_frag_len(uint32_t *total_len,
  88. uint32_t *frag_len)
  89. {
  90. if (*total_len >= (RX_BUFFER_SIZE - RX_PKT_TLVS_LEN)) {
  91. *frag_len = RX_BUFFER_SIZE - RX_PKT_TLVS_LEN;
  92. *total_len -= *frag_len;
  93. } else {
  94. *frag_len = *total_len;
  95. *total_len = 0;
  96. }
  97. }
  98. /**
  99. * dp_rx_mon_mpdu_pop() - Return a MPDU link descriptor to HW
  100. * (WBM), following error handling
  101. *
  102. * @soc: core DP main context
  103. * @mac_id: mac id which is one of 3 mac_ids
  104. * @rxdma_dst_ring_desc: void pointer to monitor link descriptor buf addr info
  105. * @head_msdu: head of msdu to be popped
  106. * @tail_msdu: tail of msdu to be popped
  107. * @npackets: number of packet to be popped
  108. * @ppdu_id: ppdu id of processing ppdu
  109. * @head: head of descs list to be freed
  110. * @tail: tail of decs list to be freed
  111. * Return: number of msdu in MPDU to be popped
  112. */
  113. static inline uint32_t
  114. dp_rx_mon_mpdu_pop(struct dp_soc *soc, uint32_t mac_id,
  115. void *rxdma_dst_ring_desc, qdf_nbuf_t *head_msdu,
  116. qdf_nbuf_t *tail_msdu, uint32_t *npackets, uint32_t *ppdu_id,
  117. union dp_rx_desc_list_elem_t **head,
  118. union dp_rx_desc_list_elem_t **tail)
  119. {
  120. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  121. void *rx_desc_tlv;
  122. void *rx_msdu_link_desc;
  123. qdf_nbuf_t msdu;
  124. qdf_nbuf_t last;
  125. struct hal_rx_msdu_list msdu_list;
  126. uint16_t num_msdus;
  127. uint32_t rx_buf_size, rx_pkt_offset;
  128. struct hal_buf_info buf_info;
  129. void *p_buf_addr_info;
  130. void *p_last_buf_addr_info;
  131. uint32_t rx_bufs_used = 0;
  132. uint32_t msdu_ppdu_id, msdu_cnt, last_ppdu_id;
  133. uint8_t *data;
  134. uint32_t i;
  135. uint32_t total_frag_len = 0, frag_len = 0;
  136. bool is_frag, is_first_msdu;
  137. bool check_ppdu_id = true;
  138. msdu = 0;
  139. last_ppdu_id = dp_pdev->ppdu_info.com_info.last_ppdu_id;
  140. last = NULL;
  141. hal_rx_reo_ent_buf_paddr_get(rxdma_dst_ring_desc, &buf_info,
  142. &p_last_buf_addr_info, &msdu_cnt);
  143. if ((hal_rx_reo_ent_rxdma_push_reason_get(rxdma_dst_ring_desc) ==
  144. HAL_RX_WBM_RXDMA_PSH_RSN_ERROR) &&
  145. qdf_unlikely(hal_rx_reo_ent_rxdma_error_code_get(
  146. rxdma_dst_ring_desc) == HAL_RXDMA_ERR_FLUSH_REQUEST)) {
  147. check_ppdu_id = false;
  148. }
  149. is_frag = false;
  150. is_first_msdu = true;
  151. do {
  152. rx_msdu_link_desc =
  153. dp_rx_cookie_2_mon_link_desc_va(dp_pdev, &buf_info,
  154. mac_id);
  155. qdf_assert(rx_msdu_link_desc);
  156. hal_rx_msdu_list_get(rx_msdu_link_desc, &msdu_list, &num_msdus);
  157. for (i = 0; i < num_msdus; i++) {
  158. uint32_t l2_hdr_offset;
  159. struct dp_rx_desc *rx_desc =
  160. dp_rx_cookie_2_va_mon_buf(soc,
  161. msdu_list.sw_cookie[i]);
  162. qdf_assert(rx_desc);
  163. msdu = rx_desc->nbuf;
  164. if (rx_desc->unmapped == 0) {
  165. qdf_nbuf_unmap_single(soc->osdev, msdu,
  166. QDF_DMA_FROM_DEVICE);
  167. rx_desc->unmapped = 1;
  168. }
  169. data = qdf_nbuf_data(msdu);
  170. rx_desc_tlv = HAL_RX_MON_DEST_GET_DESC(data);
  171. QDF_TRACE(QDF_MODULE_ID_DP,
  172. QDF_TRACE_LEVEL_DEBUG,
  173. "[%s] i=%d, ppdu_id=%x, "
  174. "last_ppdu_id=%x num_msdus = %u\n",
  175. __func__, i, *ppdu_id,
  176. last_ppdu_id, num_msdus);
  177. if (qdf_likely(check_ppdu_id)) {
  178. if (is_first_msdu) {
  179. msdu_ppdu_id =
  180. HAL_RX_HW_DESC_GET_PPDUID_GET(
  181. rx_desc_tlv);
  182. is_first_msdu = false;
  183. }
  184. QDF_TRACE(QDF_MODULE_ID_DP,
  185. QDF_TRACE_LEVEL_DEBUG,
  186. "[%s] msdu_ppdu_id=%x\n",
  187. __func__, msdu_ppdu_id);
  188. if (*ppdu_id > msdu_ppdu_id)
  189. QDF_TRACE(QDF_MODULE_ID_DP,
  190. QDF_TRACE_LEVEL_WARN,
  191. "[%s][%d] ppdu_id=%d "
  192. "msdu_ppdu_id=%d\n",
  193. __func__, __LINE__, *ppdu_id,
  194. msdu_ppdu_id);
  195. if ((*ppdu_id < msdu_ppdu_id) && (*ppdu_id >
  196. last_ppdu_id)) {
  197. *ppdu_id = msdu_ppdu_id;
  198. return rx_bufs_used;
  199. }
  200. }
  201. if (hal_rx_desc_is_first_msdu(rx_desc_tlv))
  202. hal_rx_mon_hw_desc_get_mpdu_status(rx_desc_tlv,
  203. &(dp_pdev->ppdu_info.rx_status));
  204. if (msdu_list.msdu_info[i].msdu_flags &
  205. HAL_MSDU_F_MSDU_CONTINUATION) {
  206. if (!is_frag) {
  207. total_frag_len =
  208. msdu_list.msdu_info[i].msdu_len;
  209. is_frag = true;
  210. }
  211. dp_mon_adjust_frag_len(
  212. &total_frag_len, &frag_len);
  213. } else {
  214. if (is_frag) {
  215. dp_mon_adjust_frag_len(
  216. &total_frag_len, &frag_len);
  217. } else {
  218. frag_len =
  219. msdu_list.msdu_info[i].msdu_len;
  220. }
  221. is_frag = false;
  222. msdu_cnt--;
  223. }
  224. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  225. "%s total_len %u frag_len %u flags %u",
  226. __func__, total_frag_len, frag_len,
  227. msdu_list.msdu_info[i].msdu_flags);
  228. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  229. /*
  230. * HW structures call this L3 header padding
  231. * -- even though this is actually the offset
  232. * from the buffer beginning where the L2
  233. * header begins.
  234. */
  235. l2_hdr_offset =
  236. hal_rx_msdu_end_l3_hdr_padding_get(data);
  237. rx_buf_size = rx_pkt_offset + l2_hdr_offset
  238. + frag_len;
  239. qdf_nbuf_set_pktlen(msdu, rx_buf_size);
  240. #if 0
  241. /* Disble it.see packet on msdu done set to 0 */
  242. /*
  243. * Check if DMA completed -- msdu_done is the
  244. * last bit to be written
  245. */
  246. if (!hal_rx_attn_msdu_done_get(rx_desc_tlv)) {
  247. QDF_TRACE(QDF_MODULE_ID_DP,
  248. QDF_TRACE_LEVEL_ERROR,
  249. "%s:%d: Pkt Desc\n",
  250. __func__, __LINE__);
  251. QDF_TRACE_HEX_DUMP(QDF_MODULE_ID_DP,
  252. QDF_TRACE_LEVEL_ERROR,
  253. rx_desc_tlv, 128);
  254. qdf_assert_always(0);
  255. }
  256. #endif
  257. rx_bufs_used++;
  258. QDF_TRACE(QDF_MODULE_ID_DP,
  259. QDF_TRACE_LEVEL_DEBUG,
  260. "%s: rx_pkt_offset=%d, l2_hdr_offset=%d, msdu_len=%d, addr=%p skb->len %lu",
  261. __func__, rx_pkt_offset, l2_hdr_offset,
  262. msdu_list.msdu_info[i].msdu_len,
  263. qdf_nbuf_data(msdu), qdf_nbuf_len(msdu));
  264. if (head_msdu && *head_msdu == NULL) {
  265. *head_msdu = msdu;
  266. } else {
  267. if (last)
  268. qdf_nbuf_set_next(last, msdu);
  269. }
  270. last = msdu;
  271. dp_rx_add_to_free_desc_list(head,
  272. tail, rx_desc);
  273. }
  274. hal_rx_mon_next_link_desc_get(rx_msdu_link_desc, &buf_info,
  275. &p_buf_addr_info);
  276. if (dp_rx_mon_link_desc_return(dp_pdev, p_last_buf_addr_info,
  277. mac_id) != QDF_STATUS_SUCCESS)
  278. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  279. "dp_rx_mon_link_desc_return failed\n");
  280. p_last_buf_addr_info = p_buf_addr_info;
  281. } while (buf_info.paddr && msdu_cnt);
  282. if (last)
  283. qdf_nbuf_set_next(last, NULL);
  284. *tail_msdu = msdu;
  285. return rx_bufs_used;
  286. }
  287. static inline
  288. void dp_rx_msdus_set_payload(qdf_nbuf_t msdu)
  289. {
  290. uint8_t *data;
  291. uint32_t rx_pkt_offset, l2_hdr_offset;
  292. data = qdf_nbuf_data(msdu);
  293. rx_pkt_offset = HAL_RX_MON_HW_RX_DESC_SIZE();
  294. l2_hdr_offset = hal_rx_msdu_end_l3_hdr_padding_get(data);
  295. qdf_nbuf_pull_head(msdu, rx_pkt_offset + l2_hdr_offset);
  296. }
  297. static inline
  298. qdf_nbuf_t dp_rx_mon_restitch_mpdu_from_msdus(struct dp_soc *soc,
  299. uint32_t mac_id, qdf_nbuf_t head_msdu, qdf_nbuf_t last_msdu,
  300. struct cdp_mon_status *rx_status)
  301. {
  302. qdf_nbuf_t msdu, mpdu_buf, prev_buf, msdu_orig, head_frag_list;
  303. uint32_t decap_format, wifi_hdr_len, sec_hdr_len, msdu_llc_len,
  304. mpdu_buf_len, decap_hdr_pull_bytes, frag_list_sum_len, dir,
  305. is_amsdu, is_first_frag, amsdu_pad;
  306. void *rx_desc;
  307. char *hdr_desc;
  308. unsigned char *dest;
  309. struct ieee80211_frame *wh;
  310. struct ieee80211_qoscntl *qos;
  311. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  312. head_frag_list = NULL;
  313. mpdu_buf = NULL;
  314. /* The nbuf has been pulled just beyond the status and points to the
  315. * payload
  316. */
  317. if (!head_msdu)
  318. goto mpdu_stitch_fail;
  319. msdu_orig = head_msdu;
  320. rx_desc = qdf_nbuf_data(msdu_orig);
  321. if (HAL_RX_DESC_GET_MPDU_LENGTH_ERR(rx_desc)) {
  322. /* It looks like there is some issue on MPDU len err */
  323. /* Need further investigate if drop the packet */
  324. DP_STATS_INC(dp_pdev, dropped.mon_rx_drop, 1);
  325. return NULL;
  326. }
  327. rx_desc = qdf_nbuf_data(last_msdu);
  328. rx_status->cdp_rs_fcs_err = HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  329. dp_pdev->ppdu_info.rx_status.rs_fcs_err =
  330. HAL_RX_DESC_GET_MPDU_FCS_ERR(rx_desc);
  331. /* Fill out the rx_status from the PPDU start and end fields */
  332. /* HAL_RX_GET_PPDU_STATUS(soc, mac_id, rx_status); */
  333. rx_desc = qdf_nbuf_data(head_msdu);
  334. decap_format = HAL_RX_DESC_GET_DECAP_FORMAT(rx_desc);
  335. /* Easy case - The MSDU status indicates that this is a non-decapped
  336. * packet in RAW mode.
  337. */
  338. if (decap_format == HAL_HW_RX_DECAP_FORMAT_RAW) {
  339. /* Note that this path might suffer from headroom unavailabilty
  340. * - but the RX status is usually enough
  341. */
  342. dp_rx_msdus_set_payload(head_msdu);
  343. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  344. "[%s][%d] decap format raw head %pK head->next %pK last_msdu %pK last_msdu->next %pK",
  345. __func__, __LINE__, head_msdu, head_msdu->next,
  346. last_msdu, last_msdu->next);
  347. mpdu_buf = head_msdu;
  348. prev_buf = mpdu_buf;
  349. frag_list_sum_len = 0;
  350. msdu = qdf_nbuf_next(head_msdu);
  351. is_first_frag = 1;
  352. while (msdu) {
  353. dp_rx_msdus_set_payload(msdu);
  354. if (is_first_frag) {
  355. is_first_frag = 0;
  356. head_frag_list = msdu;
  357. }
  358. frag_list_sum_len += qdf_nbuf_len(msdu);
  359. /* Maintain the linking of the cloned MSDUS */
  360. qdf_nbuf_set_next_ext(prev_buf, msdu);
  361. /* Move to the next */
  362. prev_buf = msdu;
  363. msdu = qdf_nbuf_next(msdu);
  364. }
  365. qdf_nbuf_trim_tail(prev_buf, HAL_RX_FCS_LEN);
  366. /* If there were more fragments to this RAW frame */
  367. if (head_frag_list) {
  368. if (frag_list_sum_len <
  369. sizeof(struct ieee80211_frame_min_one)) {
  370. DP_STATS_INC(dp_pdev, dropped.mon_rx_drop, 1);
  371. return NULL;
  372. }
  373. frag_list_sum_len -= HAL_RX_FCS_LEN;
  374. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  375. frag_list_sum_len);
  376. qdf_nbuf_set_next(mpdu_buf, NULL);
  377. }
  378. goto mpdu_stitch_done;
  379. }
  380. /* Decap mode:
  381. * Calculate the amount of header in decapped packet to knock off based
  382. * on the decap type and the corresponding number of raw bytes to copy
  383. * status header
  384. */
  385. rx_desc = qdf_nbuf_data(head_msdu);
  386. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  387. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  388. "[%s][%d] decap format not raw",
  389. __func__, __LINE__);
  390. /* Base size */
  391. wifi_hdr_len = sizeof(struct ieee80211_frame);
  392. wh = (struct ieee80211_frame *)hdr_desc;
  393. dir = wh->i_fc[1] & IEEE80211_FC1_DIR_MASK;
  394. if (dir == IEEE80211_FC1_DIR_DSTODS)
  395. wifi_hdr_len += 6;
  396. is_amsdu = 0;
  397. if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
  398. qos = (struct ieee80211_qoscntl *)
  399. (hdr_desc + wifi_hdr_len);
  400. wifi_hdr_len += 2;
  401. is_amsdu = (qos->i_qos[0] & IEEE80211_QOS_AMSDU);
  402. }
  403. /*Calculate security header length based on 'Protected'
  404. * and 'EXT_IV' flag
  405. * */
  406. if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
  407. char *iv = (char *)wh + wifi_hdr_len;
  408. if (iv[3] & KEY_EXTIV)
  409. sec_hdr_len = 8;
  410. else
  411. sec_hdr_len = 4;
  412. } else {
  413. sec_hdr_len = 0;
  414. }
  415. wifi_hdr_len += sec_hdr_len;
  416. /* MSDU related stuff LLC - AMSDU subframe header etc */
  417. msdu_llc_len = is_amsdu ? (14 + 8) : 8;
  418. mpdu_buf_len = wifi_hdr_len + msdu_llc_len;
  419. /* "Decap" header to remove from MSDU buffer */
  420. decap_hdr_pull_bytes = 14;
  421. /* Allocate a new nbuf for holding the 802.11 header retrieved from the
  422. * status of the now decapped first msdu. Leave enough headroom for
  423. * accomodating any radio-tap /prism like PHY header
  424. */
  425. #define MAX_MONITOR_HEADER (512)
  426. mpdu_buf = qdf_nbuf_alloc(soc->osdev,
  427. MAX_MONITOR_HEADER + mpdu_buf_len,
  428. MAX_MONITOR_HEADER, 4, FALSE);
  429. if (!mpdu_buf)
  430. goto mpdu_stitch_done;
  431. /* Copy the MPDU related header and enc headers into the first buffer
  432. * - Note that there can be a 2 byte pad between heaader and enc header
  433. */
  434. prev_buf = mpdu_buf;
  435. dest = qdf_nbuf_put_tail(prev_buf, wifi_hdr_len);
  436. if (!dest)
  437. goto mpdu_stitch_fail;
  438. qdf_mem_copy(dest, hdr_desc, wifi_hdr_len);
  439. hdr_desc += wifi_hdr_len;
  440. #if 0
  441. dest = qdf_nbuf_put_tail(prev_buf, sec_hdr_len);
  442. adf_os_mem_copy(dest, hdr_desc, sec_hdr_len);
  443. hdr_desc += sec_hdr_len;
  444. #endif
  445. /* The first LLC len is copied into the MPDU buffer */
  446. frag_list_sum_len = 0;
  447. msdu_orig = head_msdu;
  448. is_first_frag = 1;
  449. amsdu_pad = 0;
  450. while (msdu_orig) {
  451. /* TODO: intra AMSDU padding - do we need it ??? */
  452. msdu = msdu_orig;
  453. if (is_first_frag) {
  454. head_frag_list = msdu;
  455. } else {
  456. /* Reload the hdr ptr only on non-first MSDUs */
  457. rx_desc = qdf_nbuf_data(msdu_orig);
  458. hdr_desc = HAL_RX_DESC_GET_80211_HDR(rx_desc);
  459. }
  460. /* Copy this buffers MSDU related status into the prev buffer */
  461. if (is_first_frag) {
  462. is_first_frag = 0;
  463. }
  464. dest = qdf_nbuf_put_tail(prev_buf,
  465. msdu_llc_len + amsdu_pad);
  466. if (!dest)
  467. goto mpdu_stitch_fail;
  468. dest += amsdu_pad;
  469. qdf_mem_copy(dest, hdr_desc, msdu_llc_len);
  470. dp_rx_msdus_set_payload(msdu);
  471. /* Push the MSDU buffer beyond the decap header */
  472. qdf_nbuf_pull_head(msdu, decap_hdr_pull_bytes);
  473. frag_list_sum_len += msdu_llc_len + qdf_nbuf_len(msdu)
  474. + amsdu_pad;
  475. /* Set up intra-AMSDU pad to be added to start of next buffer -
  476. * AMSDU pad is 4 byte pad on AMSDU subframe */
  477. amsdu_pad = (msdu_llc_len + qdf_nbuf_len(msdu)) & 0x3;
  478. amsdu_pad = amsdu_pad ? (4 - amsdu_pad) : 0;
  479. /* TODO FIXME How do we handle MSDUs that have fraglist - Should
  480. * probably iterate all the frags cloning them along the way and
  481. * and also updating the prev_buf pointer
  482. */
  483. /* Move to the next */
  484. prev_buf = msdu;
  485. msdu_orig = qdf_nbuf_next(msdu_orig);
  486. }
  487. #if 0
  488. /* Add in the trailer section - encryption trailer + FCS */
  489. qdf_nbuf_put_tail(prev_buf, HAL_RX_FCS_LEN);
  490. frag_list_sum_len += HAL_RX_FCS_LEN;
  491. #endif
  492. frag_list_sum_len -= msdu_llc_len;
  493. /* TODO: Convert this to suitable adf routines */
  494. qdf_nbuf_append_ext_list(mpdu_buf, head_frag_list,
  495. frag_list_sum_len);
  496. mpdu_stitch_done:
  497. /* Check if this buffer contains the PPDU end status for TSF */
  498. /* Need revist this code to see where we can get tsf timestamp */
  499. #if 0
  500. /* PPDU end TLV will be retrived from monitor status ring */
  501. last_mpdu =
  502. (*(((u_int32_t *)&rx_desc->attention)) &
  503. RX_ATTENTION_0_LAST_MPDU_MASK) >>
  504. RX_ATTENTION_0_LAST_MPDU_LSB;
  505. if (last_mpdu)
  506. rx_status->rs_tstamp.tsf = rx_desc->ppdu_end.tsf_timestamp;
  507. #endif
  508. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  509. "%s %d mpdu_buf %pK mpdu_buf->len %u",
  510. __func__, __LINE__,
  511. mpdu_buf, mpdu_buf->len);
  512. return mpdu_buf;
  513. mpdu_stitch_fail:
  514. if ((mpdu_buf) && (decap_format != HAL_HW_RX_DECAP_FORMAT_RAW)) {
  515. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  516. "%s mpdu_stitch_fail mpdu_buf %pK",
  517. __func__, mpdu_buf);
  518. /* Free the head buffer */
  519. qdf_nbuf_free(mpdu_buf);
  520. }
  521. return NULL;
  522. }
  523. /**
  524. * dp_rx_extract_radiotap_info(): Extract and populate information in
  525. * struct mon_rx_status type
  526. * @rx_status: Receive status
  527. * @mon_rx_status: Monitor mode status
  528. *
  529. * Returns: None
  530. */
  531. static inline
  532. void dp_rx_extract_radiotap_info(struct cdp_mon_status *rx_status,
  533. struct mon_rx_status *rx_mon_status)
  534. {
  535. rx_mon_status->tsft = rx_status->cdp_rs_tstamp.cdp_tsf;
  536. rx_mon_status->chan_freq = rx_status->rs_freq;
  537. rx_mon_status->chan_num = rx_status->rs_channel;
  538. rx_mon_status->chan_flags = rx_status->rs_flags;
  539. rx_mon_status->rate = rx_status->rs_datarate;
  540. /* TODO: rx_mon_status->ant_signal_db */
  541. /* TODO: rx_mon_status->nr_ant */
  542. rx_mon_status->mcs = rx_status->cdf_rs_rate_mcs;
  543. rx_mon_status->is_stbc = rx_status->cdp_rs_stbc;
  544. rx_mon_status->sgi = rx_status->cdp_rs_sgi;
  545. /* TODO: rx_mon_status->ldpc */
  546. /* TODO: rx_mon_status->beamformed */
  547. /* TODO: rx_mon_status->vht_flags */
  548. /* TODO: rx_mon_status->vht_flag_values1 */
  549. }
  550. QDF_STATUS dp_rx_mon_deliver(struct dp_soc *soc, uint32_t mac_id,
  551. qdf_nbuf_t head_msdu, qdf_nbuf_t tail_msdu)
  552. {
  553. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  554. struct cdp_mon_status *rs = &pdev->rx_mon_recv_status;
  555. qdf_nbuf_t mon_skb, skb_next;
  556. qdf_nbuf_t mon_mpdu = NULL;
  557. if ((pdev->monitor_vdev == NULL) ||
  558. (pdev->monitor_vdev->osif_rx_mon == NULL)) {
  559. goto mon_deliver_fail;
  560. }
  561. /* restitch mon MPDU for delivery via monitor interface */
  562. mon_mpdu = dp_rx_mon_restitch_mpdu_from_msdus(soc, mac_id, head_msdu,
  563. tail_msdu, rs);
  564. if (mon_mpdu && pdev->monitor_vdev && pdev->monitor_vdev->osif_vdev) {
  565. pdev->ppdu_info.rx_status.ppdu_id =
  566. pdev->ppdu_info.com_info.ppdu_id;
  567. qdf_nbuf_update_radiotap(&(pdev->ppdu_info.rx_status),
  568. mon_mpdu, sizeof(struct rx_pkt_tlvs));
  569. pdev->monitor_vdev->osif_rx_mon(
  570. pdev->monitor_vdev->osif_vdev, mon_mpdu, NULL);
  571. } else {
  572. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  573. "[%s][%d] mon_mpdu=%p pdev->monitor_vdev %p osif_vdev %p",
  574. __func__, __LINE__, mon_mpdu, pdev->monitor_vdev,
  575. pdev->monitor_vdev->osif_vdev);
  576. goto mon_deliver_fail;
  577. }
  578. return QDF_STATUS_SUCCESS;
  579. mon_deliver_fail:
  580. mon_skb = head_msdu;
  581. while (mon_skb) {
  582. skb_next = qdf_nbuf_next(mon_skb);
  583. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  584. "[%s][%d] mon_skb=%p len %u", __func__, __LINE__,
  585. mon_skb, mon_skb->len);
  586. qdf_nbuf_free(mon_skb);
  587. mon_skb = skb_next;
  588. }
  589. return QDF_STATUS_E_INVAL;
  590. }
  591. /**
  592. * dp_rx_mon_dest_process() - Brain of the Rx processing functionality
  593. * Called from the bottom half (tasklet/NET_RX_SOFTIRQ)
  594. * @soc: core txrx main contex
  595. * @hal_ring: opaque pointer to the HAL Rx Ring, which will be serviced
  596. * @quota: No. of units (packets) that can be serviced in one shot.
  597. *
  598. * This function implements the core of Rx functionality. This is
  599. * expected to handle only non-error frames.
  600. *
  601. * Return: none
  602. */
  603. void dp_rx_mon_dest_process(struct dp_soc *soc, uint32_t mac_id, uint32_t quota)
  604. {
  605. struct dp_pdev *pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  606. void *hal_soc;
  607. void *rxdma_dst_ring_desc;
  608. void *mon_dst_srng;
  609. union dp_rx_desc_list_elem_t *head = NULL;
  610. union dp_rx_desc_list_elem_t *tail = NULL;
  611. uint32_t ppdu_id;
  612. uint32_t rx_bufs_used;
  613. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  614. struct cdp_pdev_mon_stats *rx_mon_stats;
  615. mon_dst_srng = pdev->rxdma_mon_dst_ring[mac_for_pdev].hal_srng;
  616. if (!mon_dst_srng || !hal_srng_initialized(mon_dst_srng)) {
  617. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  618. "%s %d : HAL Monitor Destination Ring Init Failed -- %pK\n",
  619. __func__, __LINE__, mon_dst_srng);
  620. return;
  621. }
  622. hal_soc = soc->hal_soc;
  623. qdf_assert(hal_soc);
  624. qdf_spin_lock_bh(&pdev->mon_lock);
  625. if (pdev->monitor_vdev == NULL) {
  626. qdf_spin_unlock(&pdev->mon_lock);
  627. return;
  628. }
  629. if (qdf_unlikely(hal_srng_access_start(hal_soc, mon_dst_srng))) {
  630. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  631. "%s %d : HAL Monitor Destination Ring access Failed -- %pK\n",
  632. __func__, __LINE__, mon_dst_srng);
  633. return;
  634. }
  635. ppdu_id = pdev->ppdu_info.com_info.ppdu_id;
  636. rx_bufs_used = 0;
  637. rx_mon_stats = &pdev->rx_mon_stats;
  638. while (qdf_likely(rxdma_dst_ring_desc =
  639. hal_srng_dst_peek(hal_soc, mon_dst_srng))) {
  640. qdf_nbuf_t head_msdu, tail_msdu;
  641. uint32_t npackets;
  642. head_msdu = (qdf_nbuf_t) NULL;
  643. tail_msdu = (qdf_nbuf_t) NULL;
  644. rx_bufs_used += dp_rx_mon_mpdu_pop(soc, mac_id,
  645. rxdma_dst_ring_desc,
  646. &head_msdu, &tail_msdu,
  647. &npackets, &ppdu_id,
  648. &head, &tail);
  649. if (ppdu_id != pdev->ppdu_info.com_info.ppdu_id) {
  650. pdev->mon_ppdu_status = DP_PPDU_STATUS_START;
  651. qdf_mem_zero(&(pdev->ppdu_info.rx_status),
  652. sizeof(pdev->ppdu_info.rx_status));
  653. pdev->ppdu_info.com_info.last_ppdu_id =
  654. pdev->ppdu_info.com_info.ppdu_id;
  655. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_DEBUG,
  656. "%s %d ppdu_id %x != ppdu_info.com_info .ppdu_id %x",
  657. __func__, __LINE__,
  658. ppdu_id, pdev->ppdu_info.com_info.ppdu_id);
  659. break;
  660. }
  661. if (qdf_unlikely(head_msdu == NULL) ||
  662. qdf_unlikely(tail_msdu == NULL)) {
  663. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  664. "%s %d : Head_msdu or Tail_msdu is NULL !!\n",
  665. __func__, __LINE__);
  666. break;
  667. }
  668. rx_mon_stats->dest_mpdu_done++;
  669. dp_rx_mon_deliver(soc, mac_id, head_msdu, tail_msdu);
  670. rxdma_dst_ring_desc = hal_srng_dst_get_next(hal_soc,
  671. mon_dst_srng);
  672. }
  673. hal_srng_access_end(hal_soc, mon_dst_srng);
  674. qdf_spin_unlock_bh(&pdev->mon_lock);
  675. if (rx_bufs_used) {
  676. rx_mon_stats->dest_ppdu_done++;
  677. dp_rx_buffers_replenish(soc, mac_id,
  678. &pdev->rxdma_mon_buf_ring[mac_for_pdev],
  679. &soc->rx_desc_mon[mac_id], rx_bufs_used, &head, &tail);
  680. }
  681. }
  682. static QDF_STATUS
  683. dp_rx_pdev_mon_buf_attach(struct dp_pdev *pdev, int mac_id) {
  684. uint8_t pdev_id = pdev->pdev_id;
  685. struct dp_soc *soc = pdev->soc;
  686. union dp_rx_desc_list_elem_t *desc_list = NULL;
  687. union dp_rx_desc_list_elem_t *tail = NULL;
  688. struct dp_srng *rxdma_srng;
  689. uint32_t rxdma_entries;
  690. struct rx_desc_pool *rx_desc_pool;
  691. QDF_STATUS status;
  692. uint8_t mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  693. rxdma_srng = &pdev->rxdma_mon_buf_ring[mac_for_pdev];
  694. rxdma_entries = rxdma_srng->alloc_size/hal_srng_get_entrysize(
  695. soc->hal_soc,
  696. RXDMA_MONITOR_BUF);
  697. rx_desc_pool = &soc->rx_desc_mon[mac_id];
  698. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  699. "%s: Mon RX Desc Pool[%d] allocation size=%d"
  700. , __func__, pdev_id, rxdma_entries*3);
  701. status = dp_rx_desc_pool_alloc(soc, mac_id,
  702. rxdma_entries*3, rx_desc_pool);
  703. if (!QDF_IS_STATUS_SUCCESS(status)) {
  704. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  705. "%s: dp_rx_desc_pool_alloc() failed \n", __func__);
  706. return status;
  707. }
  708. rx_desc_pool->owner = HAL_RX_BUF_RBM_SW3_BM;
  709. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_INFO_LOW,
  710. "%s: Mon RX Buffers Replenish pdev_id=%d",
  711. __func__, pdev_id);
  712. status = dp_rx_buffers_replenish(soc, mac_id, rxdma_srng, rx_desc_pool,
  713. rxdma_entries, &desc_list, &tail);
  714. if (!QDF_IS_STATUS_SUCCESS(status)) {
  715. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  716. "%s: dp_rx_buffers_replenish() failed",
  717. __func__);
  718. return status;
  719. }
  720. return QDF_STATUS_SUCCESS;
  721. }
  722. static QDF_STATUS
  723. dp_rx_pdev_mon_buf_detach(struct dp_pdev *pdev, int mac_id)
  724. {
  725. struct dp_soc *soc = pdev->soc;
  726. struct rx_desc_pool *rx_desc_pool;
  727. rx_desc_pool = &soc->rx_desc_mon[mac_id];
  728. if (rx_desc_pool->pool_size != 0)
  729. dp_rx_desc_pool_free(soc, mac_id, rx_desc_pool);
  730. return QDF_STATUS_SUCCESS;
  731. }
  732. /*
  733. * Allocate and setup link descriptor pool that will be used by HW for
  734. * various link and queue descriptors and managed by WBM
  735. */
  736. static int dp_mon_link_desc_pool_setup(struct dp_soc *soc, uint32_t mac_id)
  737. {
  738. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  739. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  740. int link_desc_size = hal_get_link_desc_size(soc->hal_soc);
  741. int link_desc_align = hal_get_link_desc_align(soc->hal_soc);
  742. uint32_t max_alloc_size = wlan_cfg_max_alloc_size(soc->wlan_cfg_ctx);
  743. uint32_t total_link_descs, total_mem_size;
  744. uint32_t num_link_desc_banks;
  745. uint32_t last_bank_size = 0;
  746. uint32_t entry_size, num_entries;
  747. void *mon_desc_srng;
  748. uint32_t num_replenish_buf;
  749. struct dp_srng *dp_srng;
  750. int i;
  751. dp_srng = &dp_pdev->rxdma_mon_desc_ring[mac_for_pdev];
  752. num_entries = dp_srng->alloc_size/hal_srng_get_entrysize(
  753. soc->hal_soc, RXDMA_MONITOR_DESC);
  754. /* Round up to power of 2 */
  755. total_link_descs = 1;
  756. while (total_link_descs < num_entries)
  757. total_link_descs <<= 1;
  758. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_INFO_HIGH,
  759. "%s: total_link_descs: %u, link_desc_size: %d\n",
  760. __func__, total_link_descs, link_desc_size);
  761. total_mem_size = total_link_descs * link_desc_size;
  762. total_mem_size += link_desc_align;
  763. if (total_mem_size <= max_alloc_size) {
  764. num_link_desc_banks = 0;
  765. last_bank_size = total_mem_size;
  766. } else {
  767. num_link_desc_banks = (total_mem_size) /
  768. (max_alloc_size - link_desc_align);
  769. last_bank_size = total_mem_size %
  770. (max_alloc_size - link_desc_align);
  771. }
  772. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  773. "%s: total_mem_size: %d, num_link_desc_banks: %u, \
  774. max_alloc_size: %d last_bank_size: %d\n",
  775. __func__, total_mem_size, num_link_desc_banks, max_alloc_size,
  776. last_bank_size);
  777. for (i = 0; i < num_link_desc_banks; i++) {
  778. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr_unaligned =
  779. qdf_mem_alloc_consistent(soc->osdev, soc->osdev->dev,
  780. max_alloc_size,
  781. &(dp_pdev->link_desc_banks[mac_for_pdev][i].
  782. base_paddr_unaligned));
  783. if (!dp_pdev->link_desc_banks[mac_for_pdev][i].
  784. base_vaddr_unaligned) {
  785. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  786. "%s: Link desc memory allocation failed\n",
  787. __func__);
  788. goto fail;
  789. }
  790. dp_pdev->link_desc_banks[mac_for_pdev][i].size = max_alloc_size;
  791. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr =
  792. (void *)((unsigned long)
  793. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  794. base_vaddr_unaligned) +
  795. ((unsigned long)
  796. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  797. base_vaddr_unaligned) %
  798. link_desc_align));
  799. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr =
  800. (unsigned long)
  801. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  802. base_paddr_unaligned) +
  803. ((unsigned long)
  804. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  805. (unsigned long)
  806. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  807. base_vaddr_unaligned));
  808. }
  809. if (last_bank_size) {
  810. /* Allocate last bank in case total memory required is not exact
  811. * multiple of max_alloc_size
  812. */
  813. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr_unaligned =
  814. qdf_mem_alloc_consistent(soc->osdev,
  815. soc->osdev->dev, last_bank_size,
  816. &(dp_pdev->link_desc_banks[mac_for_pdev][i].
  817. base_paddr_unaligned));
  818. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  819. base_vaddr_unaligned == NULL) {
  820. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
  821. "%s: allocation failed for mon link desc pool\n",
  822. __func__);
  823. goto fail;
  824. }
  825. dp_pdev->link_desc_banks[mac_for_pdev][i].size = last_bank_size;
  826. dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr =
  827. (void *)((unsigned long)
  828. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  829. base_vaddr_unaligned) +
  830. ((unsigned long)
  831. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  832. base_vaddr_unaligned) %
  833. link_desc_align));
  834. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr =
  835. (unsigned long)
  836. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  837. base_paddr_unaligned) +
  838. ((unsigned long)
  839. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  840. (unsigned long)
  841. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  842. base_vaddr_unaligned));
  843. }
  844. /* Allocate and setup link descriptor idle list for HW internal use */
  845. entry_size = hal_srng_get_entrysize(soc->hal_soc, RXDMA_MONITOR_DESC);
  846. total_mem_size = entry_size * total_link_descs;
  847. mon_desc_srng = dp_pdev->rxdma_mon_desc_ring[mac_for_pdev].hal_srng;
  848. num_replenish_buf = 0;
  849. if (total_mem_size <= max_alloc_size) {
  850. void *desc;
  851. for (i = 0;
  852. i < MAX_MON_LINK_DESC_BANKS &&
  853. dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr;
  854. i++) {
  855. uint32_t num_entries =
  856. (dp_pdev->link_desc_banks[mac_for_pdev][i].size -
  857. (unsigned long)
  858. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr) -
  859. (unsigned long)
  860. (dp_pdev->link_desc_banks[mac_for_pdev][i].
  861. base_vaddr_unaligned)) / link_desc_size;
  862. unsigned long paddr =
  863. (unsigned long)
  864. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_paddr);
  865. unsigned long vaddr =
  866. (unsigned long)
  867. (dp_pdev->link_desc_banks[mac_for_pdev][i].base_vaddr);
  868. hal_srng_access_start_unlocked(soc->hal_soc,
  869. mon_desc_srng);
  870. while (num_entries && (desc =
  871. hal_srng_src_get_next(soc->hal_soc,
  872. mon_desc_srng))) {
  873. hal_set_link_desc_addr(desc, i, paddr);
  874. num_entries--;
  875. num_replenish_buf++;
  876. paddr += link_desc_size;
  877. vaddr += link_desc_size;
  878. }
  879. hal_srng_access_end_unlocked(soc->hal_soc,
  880. mon_desc_srng);
  881. }
  882. } else {
  883. qdf_assert(0);
  884. }
  885. QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_WARN,
  886. "%s: successfully replenished %d buffer\n",
  887. __func__, num_replenish_buf);
  888. return 0;
  889. fail:
  890. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  891. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  892. base_vaddr_unaligned) {
  893. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  894. dp_pdev->link_desc_banks[mac_for_pdev][i].size,
  895. dp_pdev->link_desc_banks[mac_for_pdev][i].
  896. base_vaddr_unaligned,
  897. dp_pdev->link_desc_banks[mac_for_pdev][i].
  898. base_paddr_unaligned, 0);
  899. dp_pdev->link_desc_banks[mac_for_pdev][i].
  900. base_vaddr_unaligned = NULL;
  901. }
  902. }
  903. return QDF_STATUS_E_FAILURE;
  904. }
  905. /*
  906. * Free link descriptor pool that was setup HW
  907. */
  908. static void dp_mon_link_desc_pool_cleanup(struct dp_soc *soc, uint32_t mac_id)
  909. {
  910. struct dp_pdev *dp_pdev = dp_get_pdev_for_mac_id(soc, mac_id);
  911. int mac_for_pdev = dp_get_mac_id_for_mac(soc, mac_id);
  912. int i;
  913. for (i = 0; i < MAX_MON_LINK_DESC_BANKS; i++) {
  914. if (dp_pdev->link_desc_banks[mac_for_pdev][i].
  915. base_vaddr_unaligned) {
  916. qdf_mem_free_consistent(soc->osdev, soc->osdev->dev,
  917. dp_pdev->link_desc_banks[mac_for_pdev][i].size,
  918. dp_pdev->link_desc_banks[mac_for_pdev][i].
  919. base_vaddr_unaligned,
  920. dp_pdev->link_desc_banks[mac_for_pdev][i].
  921. base_paddr_unaligned, 0);
  922. dp_pdev->link_desc_banks[mac_for_pdev][i].
  923. base_vaddr_unaligned = NULL;
  924. }
  925. }
  926. }
  927. /**
  928. * dp_rx_pdev_mon_attach() - attach DP RX for monitor mode
  929. * @pdev: core txrx pdev context
  930. *
  931. * This function will attach a DP RX for monitor mode instance into
  932. * the main device (SOC) context. Will allocate dp rx resource and
  933. * initialize resources.
  934. *
  935. * Return: QDF_STATUS_SUCCESS: success
  936. * QDF_STATUS_E_RESOURCES: Error return
  937. */
  938. QDF_STATUS
  939. dp_rx_pdev_mon_attach(struct dp_pdev *pdev) {
  940. struct dp_soc *soc = pdev->soc;
  941. QDF_STATUS status;
  942. uint8_t pdev_id = pdev->pdev_id;
  943. int mac_id;
  944. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_WARN,
  945. "%s: pdev attach id=%d\n", __func__, pdev_id);
  946. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  947. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  948. status = dp_rx_pdev_mon_buf_attach(pdev, mac_for_pdev);
  949. if (!QDF_IS_STATUS_SUCCESS(status)) {
  950. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  951. "%s: dp_rx_pdev_mon_buf_attach() failed\n",
  952. __func__);
  953. return status;
  954. }
  955. status = dp_rx_pdev_mon_status_attach(pdev, mac_for_pdev);
  956. if (!QDF_IS_STATUS_SUCCESS(status)) {
  957. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  958. "%s: dp_rx_pdev_mon_status_attach() failed\n",
  959. __func__);
  960. return status;
  961. }
  962. status = dp_mon_link_desc_pool_setup(soc, mac_for_pdev);
  963. if (!QDF_IS_STATUS_SUCCESS(status)) {
  964. QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
  965. "%s: dp_mon_link_desc_pool_setup() failed\n",
  966. __func__);
  967. return status;
  968. }
  969. }
  970. qdf_spinlock_create(&pdev->mon_lock);
  971. return QDF_STATUS_SUCCESS;
  972. }
  973. /**
  974. * dp_rx_pdev_mon_detach() - detach dp rx for monitor mode
  975. * @pdev: core txrx pdev context
  976. *
  977. * This function will detach DP RX for monitor mode from
  978. * main device context. will free DP Rx resources for
  979. * monitor mode
  980. *
  981. * Return: QDF_STATUS_SUCCESS: success
  982. * QDF_STATUS_E_RESOURCES: Error return
  983. */
  984. QDF_STATUS
  985. dp_rx_pdev_mon_detach(struct dp_pdev *pdev) {
  986. uint8_t pdev_id = pdev->pdev_id;
  987. struct dp_soc *soc = pdev->soc;
  988. int mac_id;
  989. for (mac_id = 0; mac_id < NUM_RXDMA_RINGS_PER_PDEV; mac_id++) {
  990. int mac_for_pdev = dp_get_mac_id_for_pdev(mac_id, pdev_id);
  991. qdf_spinlock_destroy(&pdev->mon_lock);
  992. dp_mon_link_desc_pool_cleanup(soc, mac_for_pdev);
  993. dp_rx_pdev_mon_status_detach(pdev, mac_for_pdev);
  994. dp_rx_pdev_mon_buf_detach(pdev, mac_for_pdev);
  995. }
  996. return QDF_STATUS_SUCCESS;
  997. }