internal.h 4.5 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
  4. */
  5. #ifndef _WCD938X_INTERNAL_H
  6. #define _WCD938X_INTERNAL_H
  7. #include <asoc/wcd-mbhc-v2.h>
  8. #include <asoc/wcd-irq.h>
  9. #include <asoc/wcd-clsh.h>
  10. #include "wcd938x-mbhc.h"
  11. #define SWR_SCP_CONTROL 0x44
  12. #define SWR_SCP_HOST_CLK_DIV2_CTL_BANK 0xE0
  13. #define WCD938X_MAX_MICBIAS 4
  14. /* Convert from vout ctl to micbias voltage in mV */
  15. #define WCD_VOUT_CTL_TO_MICB(v) (1000 + v * 50)
  16. #define MAX_PORT 8
  17. #define MAX_CH_PER_PORT 8
  18. #define TX_ADC_MAX 4
  19. enum {
  20. TX_HDR12 = 0,
  21. TX_HDR34,
  22. TX_HDR_MAX,
  23. };
  24. extern struct regmap_config wcd938x_regmap_config;
  25. struct codec_port_info {
  26. u32 slave_port_type;
  27. u32 master_port_type;
  28. u32 ch_mask;
  29. u32 num_ch;
  30. u32 ch_rate;
  31. };
  32. struct wcd938x_priv {
  33. struct device *dev;
  34. int variant;
  35. struct snd_soc_component *component;
  36. struct device_node *rst_np;
  37. struct regmap *regmap;
  38. struct swr_device *rx_swr_dev;
  39. struct swr_device *tx_swr_dev;
  40. s32 micb_ref[WCD938X_MAX_MICBIAS];
  41. s32 pullup_ref[WCD938X_MAX_MICBIAS];
  42. struct fw_info *fw_data;
  43. struct device_node *wcd_rst_np;
  44. struct mutex micb_lock;
  45. s32 dmic_0_1_clk_cnt;
  46. s32 dmic_2_3_clk_cnt;
  47. s32 dmic_4_5_clk_cnt;
  48. s32 dmic_6_7_clk_cnt;
  49. int hdr_en[TX_HDR_MAX];
  50. /* class h specific info */
  51. struct wcd_clsh_cdc_info clsh_info;
  52. /* mbhc module */
  53. struct wcd938x_mbhc *mbhc;
  54. u32 hph_mode;
  55. u32 tx_mode[TX_ADC_MAX];
  56. bool comp1_enable;
  57. bool comp2_enable;
  58. bool ldoh;
  59. struct irq_domain *virq;
  60. struct wcd_irq_info irq_info;
  61. u32 rx_clk_cnt;
  62. int num_irq_regs;
  63. /* to track the status */
  64. unsigned long status_mask;
  65. u8 num_tx_ports;
  66. u8 num_rx_ports;
  67. struct codec_port_info
  68. tx_port_mapping[MAX_PORT][MAX_CH_PER_PORT];
  69. struct codec_port_info
  70. rx_port_mapping[MAX_PORT][MAX_CH_PER_PORT];
  71. struct regulator_bulk_data *supplies;
  72. struct notifier_block nblock;
  73. /* wcd callback to bolero */
  74. void *handle;
  75. int (*update_wcd_event)(void *handle, u16 event, u32 data);
  76. int (*register_notifier)(void *handle,
  77. struct notifier_block *nblock,
  78. bool enable);
  79. int (*wakeup)(void *handle, bool enable);
  80. u32 version;
  81. /* Entry for version info */
  82. struct snd_info_entry *entry;
  83. struct snd_info_entry *version_entry;
  84. struct snd_info_entry *variant_entry;
  85. int flyback_cur_det_disable;
  86. int ear_rx_path;
  87. bool dev_up;
  88. };
  89. struct wcd938x_micbias_setting {
  90. u8 ldoh_v;
  91. u32 cfilt1_mv;
  92. u32 micb1_mv;
  93. u32 micb2_mv;
  94. u32 micb3_mv;
  95. u32 micb4_mv;
  96. u8 bias1_cfilt_sel;
  97. };
  98. struct wcd938x_pdata {
  99. struct device_node *rst_np;
  100. struct device_node *rx_slave;
  101. struct device_node *tx_slave;
  102. struct wcd938x_micbias_setting micbias;
  103. struct cdc_regulator *regulator;
  104. int num_supplies;
  105. };
  106. struct wcd_ctrl_platform_data {
  107. void *handle;
  108. int (*update_wcd_event)(void *handle, u16 event, u32 data);
  109. int (*register_notifier)(void *handle,
  110. struct notifier_block *nblock,
  111. bool enable);
  112. };
  113. enum {
  114. WCD_RX1,
  115. WCD_RX2,
  116. WCD_RX3
  117. };
  118. enum {
  119. BOLERO_WCD_EVT_TX_CH_HOLD_CLEAR = 1,
  120. BOLERO_WCD_EVT_PA_OFF_PRE_SSR,
  121. BOLERO_WCD_EVT_SSR_DOWN,
  122. BOLERO_WCD_EVT_SSR_UP,
  123. BOLERO_WCD_EVT_CLK_NOTIFY,
  124. };
  125. enum {
  126. WCD_BOLERO_EVT_RX_MUTE = 1, /* for RX mute/unmute */
  127. WCD_BOLERO_EVT_IMPED_TRUE, /* for imped true */
  128. WCD_BOLERO_EVT_IMPED_FALSE, /* for imped false */
  129. WCD_BOLERO_EVT_RX_COMPANDER_SOFT_RST,
  130. WCD_BOLERO_EVT_BCS_CLK_OFF,
  131. };
  132. enum {
  133. /* INTR_CTRL_INT_MASK_0 */
  134. WCD938X_IRQ_MBHC_BUTTON_RELEASE_DET = 0,
  135. WCD938X_IRQ_MBHC_BUTTON_PRESS_DET,
  136. WCD938X_IRQ_MBHC_ELECT_INS_REM_DET,
  137. WCD938X_IRQ_MBHC_ELECT_INS_REM_LEG_DET,
  138. WCD938X_IRQ_MBHC_SW_DET,
  139. WCD938X_IRQ_HPHR_OCP_INT,
  140. WCD938X_IRQ_HPHR_CNP_INT,
  141. WCD938X_IRQ_HPHL_OCP_INT,
  142. /* INTR_CTRL_INT_MASK_1 */
  143. WCD938X_IRQ_HPHL_CNP_INT,
  144. WCD938X_IRQ_EAR_CNP_INT,
  145. WCD938X_IRQ_EAR_SCD_INT,
  146. WCD938X_IRQ_AUX_CNP_INT,
  147. WCD938X_IRQ_AUX_SCD_INT,
  148. WCD938X_IRQ_HPHL_PDM_WD_INT,
  149. WCD938X_IRQ_HPHR_PDM_WD_INT,
  150. WCD938X_IRQ_AUX_PDM_WD_INT,
  151. /* INTR_CTRL_INT_MASK_2 */
  152. WCD938X_IRQ_LDORT_SCD_INT,
  153. WCD938X_IRQ_MBHC_MOISTURE_INT,
  154. WCD938X_IRQ_HPHL_SURGE_DET_INT,
  155. WCD938X_IRQ_HPHR_SURGE_DET_INT,
  156. WCD938X_NUM_IRQS,
  157. };
  158. extern struct wcd938x_mbhc *wcd938x_soc_get_mbhc(
  159. struct snd_soc_component *component);
  160. extern void wcd938x_disable_bcs_before_slow_insert(
  161. struct snd_soc_component *component,
  162. bool bcs_disable);
  163. extern int wcd938x_mbhc_micb_adjust_voltage(struct snd_soc_component *component,
  164. int volt, int micb_num);
  165. extern int wcd938x_get_micb_vout_ctl_val(u32 micb_mv);
  166. extern int wcd938x_micbias_control(struct snd_soc_component *component,
  167. int micb_num, int req, bool is_dapm);
  168. #endif /* _WCD938X_INTERNAL_H */