62206deed6
Added ipq9574 target header files under qca9574 to make fw-api project compatible to host. Change-Id: I6a3b43861772a98bb185ee3101b3942dd30abc77 Signed-off-by: Basamma Yakkanahalli <ybasamma@codeaurora.org>
87 rindas
2.4 KiB
C
87 rindas
2.4 KiB
C
/*
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* Copyright (c) 2021 The Linux Foundation. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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// $ATH_LICENSE_HW_HDR_C$
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//
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// DO NOT EDIT! This file is automatically generated
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// These definitions are tied to a particular hardware layout
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#ifndef _HE_SIG_B1_MU_INFO_H_
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#define _HE_SIG_B1_MU_INFO_H_
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#if !defined(__ASSEMBLER__)
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#endif
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// ################ START SUMMARY #################
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//
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// Dword Fields
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// 0 ru_allocation[7:0], reserved_0[31:8]
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//
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// ################ END SUMMARY #################
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#define NUM_OF_DWORDS_HE_SIG_B1_MU_INFO 1
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struct he_sig_b1_mu_info {
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uint32_t ru_allocation : 8, //[7:0]
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reserved_0 : 24; //[31:8]
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};
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/*
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ru_allocation
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RU allocation for the user(s) following this common
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portion of the SIG
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For details, refer to RU_TYPE description
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<legal all>
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reserved_0
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<legal 0>
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*/
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/* Description HE_SIG_B1_MU_INFO_0_RU_ALLOCATION
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RU allocation for the user(s) following this common
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portion of the SIG
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For details, refer to RU_TYPE description
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<legal all>
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*/
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#define HE_SIG_B1_MU_INFO_0_RU_ALLOCATION_OFFSET 0x00000000
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#define HE_SIG_B1_MU_INFO_0_RU_ALLOCATION_LSB 0
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#define HE_SIG_B1_MU_INFO_0_RU_ALLOCATION_MASK 0x000000ff
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/* Description HE_SIG_B1_MU_INFO_0_RESERVED_0
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<legal 0>
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*/
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#define HE_SIG_B1_MU_INFO_0_RESERVED_0_OFFSET 0x00000000
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#define HE_SIG_B1_MU_INFO_0_RESERVED_0_LSB 8
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#define HE_SIG_B1_MU_INFO_0_RESERVED_0_MASK 0xffffff00
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#endif // _HE_SIG_B1_MU_INFO_H_
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