cvp_hfi.c 123 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  4. */
  5. #include <asm/memory.h>
  6. #include <linux/coresight-stm.h>
  7. #include <linux/delay.h>
  8. #include <linux/devfreq.h>
  9. #include <linux/hash.h>
  10. #include <linux/io.h>
  11. #include <linux/iommu.h>
  12. #include <linux/iopoll.h>
  13. #include <linux/of.h>
  14. #include <linux/pm_qos.h>
  15. #include <linux/regulator/consumer.h>
  16. #include <linux/slab.h>
  17. #include <linux/workqueue.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/soc/qcom/llcc-qcom.h>
  20. #include <linux/qcom_scm.h>
  21. #include <linux/soc/qcom/smem.h>
  22. #include <linux/dma-mapping.h>
  23. #include <linux/reset.h>
  24. #include <linux/pm_wakeup.h>
  25. #include "hfi_packetization.h"
  26. #include "msm_cvp_debug.h"
  27. #include "cvp_core_hfi.h"
  28. #include "cvp_hfi_helper.h"
  29. #include "cvp_hfi_io.h"
  30. #include "msm_cvp_dsp.h"
  31. #include "msm_cvp_clocks.h"
  32. #include "vm/cvp_vm.h"
  33. #include "cvp_dump.h"
  34. #define REG_ADDR_OFFSET_BITMASK 0x000FFFFF
  35. #define QDSS_IOVA_START 0x80001000
  36. #define MIN_PAYLOAD_SIZE 3
  37. struct cvp_tzbsp_memprot {
  38. u32 cp_start;
  39. u32 cp_size;
  40. u32 cp_nonpixel_start;
  41. u32 cp_nonpixel_size;
  42. };
  43. #define TZBSP_PIL_SET_STATE 0xA
  44. #define TZBSP_CVP_PAS_ID 26
  45. /* Poll interval in uS */
  46. #define POLL_INTERVAL_US 50
  47. enum tzbsp_subsys_state {
  48. TZ_SUBSYS_STATE_SUSPEND = 0,
  49. TZ_SUBSYS_STATE_RESUME = 1,
  50. TZ_SUBSYS_STATE_RESTORE_THRESHOLD = 2,
  51. };
  52. const struct msm_cvp_gov_data CVP_DEFAULT_BUS_VOTE = {
  53. .data = NULL,
  54. .data_count = 0,
  55. };
  56. const int cvp_max_packets = 32;
  57. static void iris_hfi_pm_handler(struct work_struct *work);
  58. static DECLARE_DELAYED_WORK(iris_hfi_pm_work, iris_hfi_pm_handler);
  59. static inline int __resume(struct iris_hfi_device *device);
  60. static inline int __suspend(struct iris_hfi_device *device);
  61. static int __disable_regulator(struct iris_hfi_device *device,
  62. const char *name);
  63. static int __enable_regulator(struct iris_hfi_device *device,
  64. const char *name);
  65. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet);
  66. static int __initialize_packetization(struct iris_hfi_device *device);
  67. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  68. u32 session_id);
  69. static bool __is_session_valid(struct iris_hfi_device *device,
  70. struct cvp_hal_session *session, const char *func);
  71. static int __iface_cmdq_write(struct iris_hfi_device *device,
  72. void *pkt);
  73. static int __load_fw(struct iris_hfi_device *device);
  74. static void __unload_fw(struct iris_hfi_device *device);
  75. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state);
  76. static int __enable_subcaches(struct iris_hfi_device *device);
  77. static int __set_subcaches(struct iris_hfi_device *device);
  78. static int __release_subcaches(struct iris_hfi_device *device);
  79. static int __disable_subcaches(struct iris_hfi_device *device);
  80. static int __power_collapse(struct iris_hfi_device *device, bool force);
  81. static int iris_hfi_noc_error_info(void *dev);
  82. static void interrupt_init_iris2(struct iris_hfi_device *device);
  83. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device);
  84. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device);
  85. static int reset_ahb2axi_bridge(struct iris_hfi_device *device);
  86. static void power_off_iris2(struct iris_hfi_device *device);
  87. static int __set_ubwc_config(struct iris_hfi_device *device);
  88. static void __noc_error_info_iris2(struct iris_hfi_device *device);
  89. static int __enable_hw_power_collapse(struct iris_hfi_device *device);
  90. static int __power_off_controller(struct iris_hfi_device *device);
  91. static int __hwfence_regs_map(struct iris_hfi_device *device);
  92. static int __hwfence_regs_unmap(struct iris_hfi_device *device);
  93. static struct iris_hfi_vpu_ops iris2_ops = {
  94. .interrupt_init = interrupt_init_iris2,
  95. .setup_dsp_uc_memmap = setup_dsp_uc_memmap_vpu5,
  96. .clock_config_on_enable = clock_config_on_enable_vpu5,
  97. .reset_ahb2axi_bridge = reset_ahb2axi_bridge,
  98. .power_off = power_off_iris2,
  99. .noc_error_info = __noc_error_info_iris2,
  100. };
  101. /**
  102. * Utility function to enforce some of our assumptions. Spam calls to this
  103. * in hotspots in code to double check some of the assumptions that we hold.
  104. */
  105. static inline void __strict_check(struct iris_hfi_device *device)
  106. {
  107. msm_cvp_res_handle_fatal_hw_error(device->res,
  108. !mutex_is_locked(&device->lock));
  109. }
  110. static inline void __set_state(struct iris_hfi_device *device,
  111. enum iris_hfi_state state)
  112. {
  113. device->state = state;
  114. }
  115. static inline bool __core_in_valid_state(struct iris_hfi_device *device)
  116. {
  117. return device->state != IRIS_STATE_DEINIT;
  118. }
  119. static inline bool is_sys_cache_present(struct iris_hfi_device *device)
  120. {
  121. return device->res->sys_cache_present;
  122. }
  123. static int cvp_synx_recover(void)
  124. {
  125. #ifdef CVP_SYNX_ENABLED
  126. return synx_recover(SYNX_CLIENT_EVA_CTX0);
  127. #else
  128. return 0;
  129. #endif /* End of CVP_SYNX_ENABLED */
  130. }
  131. #define ROW_SIZE 32
  132. int get_hfi_version(void)
  133. {
  134. struct msm_cvp_core *core;
  135. struct iris_hfi_device *hfi;
  136. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  137. hfi = (struct iris_hfi_device *)core->device->hfi_device_data;
  138. return hfi->version;
  139. }
  140. unsigned int get_msg_size(struct cvp_hfi_msg_session_hdr *hdr)
  141. {
  142. struct msm_cvp_core *core;
  143. struct iris_hfi_device *device;
  144. u32 minor_ver;
  145. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  146. if (core)
  147. device = core->device->hfi_device_data;
  148. else
  149. return 0;
  150. if (!device) {
  151. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  152. return 0;
  153. }
  154. minor_ver = (device->version & HFI_VERSION_MINOR_MASK) >>
  155. HFI_VERSION_MINOR_SHIFT;
  156. if (minor_ver < 2)
  157. return sizeof(struct cvp_hfi_msg_session_hdr);
  158. if (hdr->packet_type == HFI_MSG_SESSION_CVP_FD)
  159. return sizeof(struct cvp_hfi_msg_session_hdr_ext);
  160. else
  161. return sizeof(struct cvp_hfi_msg_session_hdr);
  162. }
  163. unsigned int get_msg_session_id(void *msg)
  164. {
  165. struct cvp_hfi_msg_session_hdr *hdr =
  166. (struct cvp_hfi_msg_session_hdr *)msg;
  167. return hdr->session_id;
  168. }
  169. unsigned int get_msg_errorcode(void *msg)
  170. {
  171. struct cvp_hfi_msg_session_hdr *hdr =
  172. (struct cvp_hfi_msg_session_hdr *)msg;
  173. return hdr->error_type;
  174. }
  175. int get_msg_opconfigs(void *msg, unsigned int *session_id,
  176. unsigned int *error_type, unsigned int *config_id)
  177. {
  178. struct cvp_hfi_msg_session_op_cfg_packet *cfg =
  179. (struct cvp_hfi_msg_session_op_cfg_packet *)msg;
  180. *session_id = cfg->session_id;
  181. *error_type = cfg->error_type;
  182. *config_id = cfg->op_conf_id;
  183. return 0;
  184. }
  185. static void __dump_packet(u8 *packet, enum cvp_msg_prio log_level)
  186. {
  187. u32 c = 0, packet_size = *(u32 *)packet;
  188. /*
  189. * row must contain enough for 0xdeadbaad * 8 to be converted into
  190. * "de ad ba ab " * 8 + '\0'
  191. */
  192. char row[3 * ROW_SIZE];
  193. for (c = 0; c * ROW_SIZE < packet_size; ++c) {
  194. int bytes_to_read = ((c + 1) * ROW_SIZE > packet_size) ?
  195. packet_size % ROW_SIZE : ROW_SIZE;
  196. hex_dump_to_buffer(packet + c * ROW_SIZE, bytes_to_read,
  197. ROW_SIZE, 4, row, sizeof(row), false);
  198. dprintk(log_level, "%s\n", row);
  199. }
  200. }
  201. static int __dsp_suspend(struct iris_hfi_device *device, bool force, u32 flags)
  202. {
  203. int rc;
  204. struct cvp_hal_session *temp;
  205. if (msm_cvp_dsp_disable)
  206. return 0;
  207. list_for_each_entry(temp, &device->sess_head, list) {
  208. /* if forceful suspend, don't check session pause info */
  209. if (force)
  210. continue;
  211. /* don't suspend if cvp session is not paused */
  212. if (!(temp->flags & SESSION_PAUSE)) {
  213. dprintk(CVP_DSP,
  214. "%s: cvp session %x not paused %d\n",
  215. __func__, hash32_ptr(temp), gfa_cv.state);
  216. return -EBUSY;
  217. }
  218. }
  219. dprintk(CVP_DSP, "%s: suspend dsp\n", __func__);
  220. rc = cvp_dsp_suspend(flags);
  221. if (rc) {
  222. dprintk(CVP_ERR, "%s: dsp suspend failed with error %d\n",
  223. __func__, rc);
  224. return -EINVAL;
  225. }
  226. dprintk(CVP_DSP, "%s: dsp suspended\n", __func__);
  227. return 0;
  228. }
  229. static int __dsp_resume(struct iris_hfi_device *device, u32 flags)
  230. {
  231. int rc;
  232. if (msm_cvp_dsp_disable)
  233. return 0;
  234. dprintk(CVP_DSP, "%s: resume dsp\n", __func__);
  235. rc = cvp_dsp_resume(flags);
  236. if (rc) {
  237. dprintk(CVP_ERR,
  238. "%s: dsp resume failed with error %d\n",
  239. __func__, rc);
  240. return rc;
  241. }
  242. dprintk(CVP_DSP, "%s: dsp resumed\n", __func__);
  243. return rc;
  244. }
  245. static int __dsp_shutdown(struct iris_hfi_device *device, u32 flags)
  246. {
  247. int rc;
  248. if (msm_cvp_dsp_disable)
  249. return 0;
  250. dprintk(CVP_DSP, "%s: shutdown dsp\n", __func__);
  251. rc = cvp_dsp_shutdown(flags);
  252. if (rc) {
  253. dprintk(CVP_ERR,
  254. "%s: dsp shutdown failed with error %d\n",
  255. __func__, rc);
  256. WARN_ON(1);
  257. }
  258. dprintk(CVP_DSP, "%s: dsp shutdown successful\n", __func__);
  259. return rc;
  260. }
  261. static int __acquire_regulator(struct regulator_info *rinfo,
  262. struct iris_hfi_device *device)
  263. {
  264. int rc = 0;
  265. if (rinfo->has_hw_power_collapse) {
  266. rc = regulator_set_mode(rinfo->regulator,
  267. REGULATOR_MODE_NORMAL);
  268. if (rc) {
  269. /*
  270. * This is somewhat fatal, but nothing we can do
  271. * about it. We can't disable the regulator w/o
  272. * getting it back under s/w control
  273. */
  274. dprintk(CVP_WARN,
  275. "Failed to acquire regulator control: %s\n",
  276. rinfo->name);
  277. } else {
  278. dprintk(CVP_PWR,
  279. "Acquire regulator control from HW: %s\n",
  280. rinfo->name);
  281. }
  282. }
  283. if (!regulator_is_enabled(rinfo->regulator)) {
  284. dprintk(CVP_WARN, "Regulator is not enabled %s\n",
  285. rinfo->name);
  286. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  287. }
  288. return rc;
  289. }
  290. static int __hand_off_regulator(struct regulator_info *rinfo)
  291. {
  292. int rc = 0;
  293. if (rinfo->has_hw_power_collapse) {
  294. rc = regulator_set_mode(rinfo->regulator,
  295. REGULATOR_MODE_FAST);
  296. if (rc) {
  297. dprintk(CVP_WARN,
  298. "Failed to hand off regulator control: %s\n",
  299. rinfo->name);
  300. } else {
  301. dprintk(CVP_PWR,
  302. "Hand off regulator control to HW: %s\n",
  303. rinfo->name);
  304. }
  305. }
  306. return rc;
  307. }
  308. static int __hand_off_regulators(struct iris_hfi_device *device)
  309. {
  310. struct regulator_info *rinfo;
  311. int rc = 0, c = 0;
  312. iris_hfi_for_each_regulator(device, rinfo) {
  313. rc = __hand_off_regulator(rinfo);
  314. /*
  315. * If one regulator hand off failed, driver should take
  316. * the control for other regulators back.
  317. */
  318. if (rc)
  319. goto err_reg_handoff_failed;
  320. c++;
  321. }
  322. return rc;
  323. err_reg_handoff_failed:
  324. iris_hfi_for_each_regulator_reverse_continue(device, rinfo, c)
  325. __acquire_regulator(rinfo, device);
  326. return rc;
  327. }
  328. static int __write_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  329. bool *rx_req_is_set)
  330. {
  331. struct cvp_hfi_queue_header *queue;
  332. u32 packet_size_in_words, new_write_idx;
  333. u32 empty_space, read_idx, write_idx;
  334. u32 *write_ptr;
  335. if (!qinfo || !packet) {
  336. dprintk(CVP_ERR, "Invalid Params\n");
  337. return -EINVAL;
  338. } else if (!qinfo->q_array.align_virtual_addr) {
  339. dprintk(CVP_WARN, "Queues have already been freed\n");
  340. return -EINVAL;
  341. }
  342. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  343. if (!queue) {
  344. dprintk(CVP_ERR, "queue not present\n");
  345. return -ENOENT;
  346. }
  347. if (msm_cvp_debug & CVP_PKT) {
  348. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  349. __dump_packet(packet, CVP_PKT);
  350. }
  351. packet_size_in_words = (*(u32 *)packet) >> 2;
  352. if (!packet_size_in_words || packet_size_in_words >
  353. qinfo->q_array.mem_size>>2) {
  354. dprintk(CVP_ERR, "Invalid packet size\n");
  355. return -ENODATA;
  356. }
  357. spin_lock(&qinfo->hfi_lock);
  358. read_idx = queue->qhdr_read_idx;
  359. write_idx = queue->qhdr_write_idx;
  360. empty_space = (write_idx >= read_idx) ?
  361. ((qinfo->q_array.mem_size>>2) - (write_idx - read_idx)) :
  362. (read_idx - write_idx);
  363. if (empty_space <= packet_size_in_words) {
  364. queue->qhdr_tx_req = 1;
  365. spin_unlock(&qinfo->hfi_lock);
  366. dprintk(CVP_ERR, "Insufficient size (%d) to write (%d)\n",
  367. empty_space, packet_size_in_words);
  368. return -ENOTEMPTY;
  369. }
  370. queue->qhdr_tx_req = 0;
  371. new_write_idx = write_idx + packet_size_in_words;
  372. write_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  373. (write_idx << 2));
  374. if (write_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  375. write_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  376. qinfo->q_array.mem_size)) {
  377. spin_unlock(&qinfo->hfi_lock);
  378. dprintk(CVP_ERR, "Invalid write index\n");
  379. return -ENODATA;
  380. }
  381. if (new_write_idx < (qinfo->q_array.mem_size >> 2)) {
  382. memcpy(write_ptr, packet, packet_size_in_words << 2);
  383. } else {
  384. new_write_idx -= qinfo->q_array.mem_size >> 2;
  385. memcpy(write_ptr, packet, (packet_size_in_words -
  386. new_write_idx) << 2);
  387. memcpy((void *)qinfo->q_array.align_virtual_addr,
  388. packet + ((packet_size_in_words - new_write_idx) << 2),
  389. new_write_idx << 2);
  390. }
  391. /*
  392. * Memory barrier to make sure packet is written before updating the
  393. * write index
  394. */
  395. mb();
  396. queue->qhdr_write_idx = new_write_idx;
  397. if (rx_req_is_set)
  398. *rx_req_is_set = queue->qhdr_rx_req == 1;
  399. /*
  400. * Memory barrier to make sure write index is updated before an
  401. * interrupt is raised.
  402. */
  403. mb();
  404. spin_unlock(&qinfo->hfi_lock);
  405. return 0;
  406. }
  407. static int __read_queue(struct cvp_iface_q_info *qinfo, u8 *packet,
  408. u32 *pb_tx_req_is_set)
  409. {
  410. struct cvp_hfi_queue_header *queue;
  411. u32 packet_size_in_words, new_read_idx;
  412. u32 *read_ptr;
  413. u32 receive_request = 0;
  414. u32 read_idx, write_idx;
  415. int rc = 0;
  416. if (!qinfo || !packet || !pb_tx_req_is_set) {
  417. dprintk(CVP_ERR, "Invalid Params\n");
  418. return -EINVAL;
  419. } else if (!qinfo->q_array.align_virtual_addr) {
  420. dprintk(CVP_WARN, "Queues have already been freed\n");
  421. return -EINVAL;
  422. }
  423. /*
  424. * Memory barrier to make sure data is valid before
  425. *reading it
  426. */
  427. mb();
  428. queue = (struct cvp_hfi_queue_header *) qinfo->q_hdr;
  429. if (!queue) {
  430. dprintk(CVP_ERR, "Queue memory is not allocated\n");
  431. return -ENOMEM;
  432. }
  433. /*
  434. * Do not set receive request for debug queue, if set,
  435. * Iris generates interrupt for debug messages even
  436. * when there is no response message available.
  437. * In general debug queue will not become full as it
  438. * is being emptied out for every interrupt from Iris.
  439. * Iris will anyway generates interrupt if it is full.
  440. */
  441. spin_lock(&qinfo->hfi_lock);
  442. if (queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_MSG_Q)
  443. receive_request = 1;
  444. read_idx = queue->qhdr_read_idx;
  445. write_idx = queue->qhdr_write_idx;
  446. if (read_idx == write_idx) {
  447. queue->qhdr_rx_req = receive_request;
  448. /*
  449. * mb() to ensure qhdr is updated in main memory
  450. * so that iris reads the updated header values
  451. */
  452. mb();
  453. *pb_tx_req_is_set = 0;
  454. if (write_idx != queue->qhdr_write_idx) {
  455. queue->qhdr_rx_req = 0;
  456. } else {
  457. spin_unlock(&qinfo->hfi_lock);
  458. dprintk(CVP_HFI,
  459. "%s queue is empty, rx_req = %u, tx_req = %u, read_idx = %u\n",
  460. receive_request ? "message" : "debug",
  461. queue->qhdr_rx_req, queue->qhdr_tx_req,
  462. queue->qhdr_read_idx);
  463. return -ENODATA;
  464. }
  465. }
  466. read_ptr = (u32 *)((qinfo->q_array.align_virtual_addr) +
  467. (read_idx << 2));
  468. if (read_ptr < (u32 *)qinfo->q_array.align_virtual_addr ||
  469. read_ptr > (u32 *)(qinfo->q_array.align_virtual_addr +
  470. qinfo->q_array.mem_size - sizeof(*read_ptr))) {
  471. spin_unlock(&qinfo->hfi_lock);
  472. dprintk(CVP_ERR, "Invalid read index\n");
  473. return -ENODATA;
  474. }
  475. packet_size_in_words = (*read_ptr) >> 2;
  476. if (!packet_size_in_words) {
  477. spin_unlock(&qinfo->hfi_lock);
  478. dprintk(CVP_ERR, "Zero packet size\n");
  479. return -ENODATA;
  480. }
  481. new_read_idx = read_idx + packet_size_in_words;
  482. if (((packet_size_in_words << 2) <= CVP_IFACEQ_VAR_HUGE_PKT_SIZE)
  483. && read_idx <= (qinfo->q_array.mem_size >> 2)) {
  484. if (new_read_idx < (qinfo->q_array.mem_size >> 2)) {
  485. memcpy(packet, read_ptr,
  486. packet_size_in_words << 2);
  487. } else {
  488. new_read_idx -= (qinfo->q_array.mem_size >> 2);
  489. memcpy(packet, read_ptr,
  490. (packet_size_in_words - new_read_idx) << 2);
  491. memcpy(packet + ((packet_size_in_words -
  492. new_read_idx) << 2),
  493. (u8 *)qinfo->q_array.align_virtual_addr,
  494. new_read_idx << 2);
  495. }
  496. } else {
  497. dprintk(CVP_WARN,
  498. "BAD packet received, read_idx: %#x, pkt_size: %d\n",
  499. read_idx, packet_size_in_words << 2);
  500. dprintk(CVP_WARN, "Dropping this packet\n");
  501. new_read_idx = write_idx;
  502. rc = -ENODATA;
  503. }
  504. if (new_read_idx != queue->qhdr_write_idx)
  505. queue->qhdr_rx_req = 0;
  506. else
  507. queue->qhdr_rx_req = receive_request;
  508. queue->qhdr_read_idx = new_read_idx;
  509. /*
  510. * mb() to ensure qhdr is updated in main memory
  511. * so that iris reads the updated header values
  512. */
  513. mb();
  514. *pb_tx_req_is_set = (queue->qhdr_tx_req == 1) ? 1 : 0;
  515. spin_unlock(&qinfo->hfi_lock);
  516. if ((msm_cvp_debug & CVP_PKT) &&
  517. !(queue->qhdr_type & HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q)) {
  518. dprintk(CVP_PKT, "%s: %pK\n", __func__, qinfo);
  519. __dump_packet(packet, CVP_PKT);
  520. }
  521. return rc;
  522. }
  523. static int __smem_alloc(struct iris_hfi_device *dev, struct cvp_mem_addr *mem,
  524. u32 size, u32 align, u32 flags)
  525. {
  526. struct msm_cvp_smem *alloc = &mem->mem_data;
  527. int rc = 0;
  528. if (!dev || !mem || !size) {
  529. dprintk(CVP_ERR, "Invalid Params\n");
  530. return -EINVAL;
  531. }
  532. dprintk(CVP_INFO, "start to alloc size: %d, flags: %d\n", size, flags);
  533. alloc->flags = flags;
  534. rc = msm_cvp_smem_alloc(size, align, 1, (void *)dev->res, alloc);
  535. if (rc) {
  536. dprintk(CVP_ERR, "Alloc failed\n");
  537. rc = -ENOMEM;
  538. goto fail_smem_alloc;
  539. }
  540. dprintk(CVP_MEM, "%s: ptr = %pK, size = %d\n", __func__,
  541. alloc->kvaddr, size);
  542. mem->mem_size = alloc->size;
  543. mem->align_virtual_addr = alloc->kvaddr;
  544. mem->align_device_addr = alloc->device_addr;
  545. alloc->pkt_type = 0;
  546. alloc->buf_idx = 0;
  547. return rc;
  548. fail_smem_alloc:
  549. return rc;
  550. }
  551. static void __smem_free(struct iris_hfi_device *dev, struct msm_cvp_smem *mem)
  552. {
  553. if (!dev || !mem) {
  554. dprintk(CVP_ERR, "invalid param %pK %pK\n", dev, mem);
  555. return;
  556. }
  557. msm_cvp_smem_free(mem);
  558. }
  559. static void __write_register(struct iris_hfi_device *device,
  560. u32 reg, u32 value)
  561. {
  562. u32 hwiosymaddr = reg;
  563. u8 *base_addr;
  564. if (!device) {
  565. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  566. return;
  567. }
  568. __strict_check(device);
  569. if (!device->power_enabled) {
  570. dprintk(CVP_WARN,
  571. "HFI Write register failed : Power is OFF\n");
  572. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  573. return;
  574. }
  575. base_addr = device->cvp_hal_data->register_base;
  576. dprintk(CVP_REG, "Base addr: %pK, written to: %#x, Value: %#x...\n",
  577. base_addr, hwiosymaddr, value);
  578. base_addr += hwiosymaddr;
  579. writel_relaxed(value, base_addr);
  580. /*
  581. * Memory barrier to make sure value is written into the register.
  582. */
  583. wmb();
  584. }
  585. static int __read_gcc_register(struct iris_hfi_device *device, u32 reg)
  586. {
  587. int rc = 0;
  588. u8 *base_addr;
  589. if (!device) {
  590. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  591. return -EINVAL;
  592. }
  593. __strict_check(device);
  594. if (!device->power_enabled) {
  595. dprintk(CVP_WARN,
  596. "%s HFI Read register failed : Power is OFF\n",
  597. __func__);
  598. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  599. return -EINVAL;
  600. }
  601. base_addr = device->cvp_hal_data->gcc_reg_base;
  602. rc = readl_relaxed(base_addr + reg);
  603. /*
  604. * Memory barrier to make sure value is read correctly from the
  605. * register.
  606. */
  607. rmb();
  608. dprintk(CVP_REG,
  609. "GCC Base addr: %pK, read from: %#x, value: %#x...\n",
  610. base_addr, reg, rc);
  611. return rc;
  612. }
  613. static int __read_register(struct iris_hfi_device *device, u32 reg)
  614. {
  615. int rc = 0;
  616. u8 *base_addr;
  617. if (!device) {
  618. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  619. return -EINVAL;
  620. }
  621. __strict_check(device);
  622. if (!device->power_enabled) {
  623. dprintk(CVP_WARN,
  624. "HFI Read register failed : Power is OFF\n");
  625. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  626. return -EINVAL;
  627. }
  628. base_addr = device->cvp_hal_data->register_base;
  629. rc = readl_relaxed(base_addr + reg);
  630. /*
  631. * Memory barrier to make sure value is read correctly from the
  632. * register.
  633. */
  634. rmb();
  635. dprintk(CVP_REG, "Base addr: %pK, read from: %#x, value: %#x...\n",
  636. base_addr, reg, rc);
  637. return rc;
  638. }
  639. static void __set_registers(struct iris_hfi_device *device)
  640. {
  641. struct msm_cvp_core *core;
  642. struct msm_cvp_platform_data *pdata;
  643. struct reg_set *reg_set;
  644. int i;
  645. if (!device->res) {
  646. dprintk(CVP_ERR,
  647. "device resources null, cannot set registers\n");
  648. return;
  649. }
  650. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  651. pdata = core->platform_data;
  652. reg_set = &device->res->reg_set;
  653. for (i = 0; i < reg_set->count; i++) {
  654. __write_register(device, reg_set->reg_tbl[i].reg,
  655. reg_set->reg_tbl[i].value);
  656. dprintk(CVP_REG, "write_reg offset=%x, val=%x\n",
  657. reg_set->reg_tbl[i].reg,
  658. reg_set->reg_tbl[i].value);
  659. }
  660. __write_register(device, CVP_CPU_CS_AXI4_QOS,
  661. pdata->noc_qos->axi_qos);
  662. __write_register(device, CVP_NOC_PRIORITYLUT_LOW,
  663. pdata->noc_qos->prioritylut_low);
  664. __write_register(device, CVP_NOC_PRIORITYLUT_HIGH,
  665. pdata->noc_qos->prioritylut_high);
  666. __write_register(device, CVP_NOC_URGENCY_LOW,
  667. pdata->noc_qos->urgency_low);
  668. __write_register(device, CVP_NOC_DANGERLUT_LOW,
  669. pdata->noc_qos->dangerlut_low);
  670. __write_register(device, CVP_NOC_SAFELUT_LOW,
  671. pdata->noc_qos->safelut_low);
  672. }
  673. /*
  674. * The existence of this function is a hack for 8996 (or certain Iris versions)
  675. * to overcome a hardware bug. Whenever the GDSCs momentarily power collapse
  676. * (after calling __hand_off_regulators()), the values of the threshold
  677. * registers (typically programmed by TZ) are incorrectly reset. As a result
  678. * reprogram these registers at certain agreed upon points.
  679. */
  680. static void __set_threshold_registers(struct iris_hfi_device *device)
  681. {
  682. u32 version = __read_register(device, CVP_WRAPPER_HW_VERSION);
  683. version &= ~GENMASK(15, 0);
  684. if (version != (0x3 << 28 | 0x43 << 16))
  685. return;
  686. if (__tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESTORE_THRESHOLD))
  687. dprintk(CVP_ERR, "Failed to restore threshold values\n");
  688. }
  689. static int __unvote_buses(struct iris_hfi_device *device)
  690. {
  691. int rc = 0;
  692. struct bus_info *bus = NULL;
  693. kfree(device->bus_vote.data);
  694. device->bus_vote.data = NULL;
  695. device->bus_vote.data_count = 0;
  696. iris_hfi_for_each_bus(device, bus) {
  697. rc = msm_cvp_set_bw(bus, 0);
  698. if (rc) {
  699. dprintk(CVP_ERR,
  700. "%s: Failed unvoting bus\n", __func__);
  701. goto err_unknown_device;
  702. }
  703. }
  704. err_unknown_device:
  705. return rc;
  706. }
  707. static int __vote_buses(struct iris_hfi_device *device,
  708. struct cvp_bus_vote_data *data, int num_data)
  709. {
  710. int rc = 0;
  711. struct bus_info *bus = NULL;
  712. struct cvp_bus_vote_data *new_data = NULL;
  713. if (!num_data) {
  714. dprintk(CVP_PWR, "No vote data available\n");
  715. goto no_data_count;
  716. } else if (!data) {
  717. dprintk(CVP_ERR, "Invalid voting data\n");
  718. return -EINVAL;
  719. }
  720. new_data = kmemdup(data, num_data * sizeof(*new_data), GFP_KERNEL);
  721. if (!new_data) {
  722. dprintk(CVP_ERR, "Can't alloc memory to cache bus votes\n");
  723. rc = -ENOMEM;
  724. goto err_no_mem;
  725. }
  726. no_data_count:
  727. kfree(device->bus_vote.data);
  728. device->bus_vote.data = new_data;
  729. device->bus_vote.data_count = num_data;
  730. iris_hfi_for_each_bus(device, bus) {
  731. if (bus) {
  732. rc = msm_cvp_set_bw(bus, bus->range[1]);
  733. if (rc)
  734. dprintk(CVP_ERR,
  735. "Failed voting bus %s to ab %u\n",
  736. bus->name, bus->range[1]*1000);
  737. }
  738. }
  739. err_no_mem:
  740. return rc;
  741. }
  742. static int iris_hfi_vote_buses(void *dev, struct cvp_bus_vote_data *d, int n)
  743. {
  744. int rc = 0;
  745. struct iris_hfi_device *device = dev;
  746. if (!device)
  747. return -EINVAL;
  748. mutex_lock(&device->lock);
  749. rc = __vote_buses(device, d, n);
  750. mutex_unlock(&device->lock);
  751. return rc;
  752. }
  753. static int __core_set_resource(struct iris_hfi_device *device,
  754. struct cvp_resource_hdr *resource_hdr, void *resource_value)
  755. {
  756. struct cvp_hfi_cmd_sys_set_resource_packet *pkt;
  757. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  758. int rc = 0;
  759. if (!device || !resource_hdr || !resource_value) {
  760. dprintk(CVP_ERR, "set_res: Invalid Params\n");
  761. return -EINVAL;
  762. }
  763. pkt = (struct cvp_hfi_cmd_sys_set_resource_packet *) packet;
  764. rc = call_hfi_pkt_op(device, sys_set_resource,
  765. pkt, resource_hdr, resource_value);
  766. if (rc) {
  767. dprintk(CVP_ERR, "set_res: failed to create packet\n");
  768. goto err_create_pkt;
  769. }
  770. rc = __iface_cmdq_write(device, pkt);
  771. if (rc)
  772. rc = -ENOTEMPTY;
  773. err_create_pkt:
  774. return rc;
  775. }
  776. static int __core_release_resource(struct iris_hfi_device *device,
  777. struct cvp_resource_hdr *resource_hdr)
  778. {
  779. struct cvp_hfi_cmd_sys_release_resource_packet *pkt;
  780. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  781. int rc = 0;
  782. if (!device || !resource_hdr) {
  783. dprintk(CVP_ERR, "release_res: Invalid Params\n");
  784. return -EINVAL;
  785. }
  786. pkt = (struct cvp_hfi_cmd_sys_release_resource_packet *) packet;
  787. rc = call_hfi_pkt_op(device, sys_release_resource,
  788. pkt, resource_hdr);
  789. if (rc) {
  790. dprintk(CVP_ERR, "release_res: failed to create packet\n");
  791. goto err_create_pkt;
  792. }
  793. rc = __iface_cmdq_write(device, pkt);
  794. if (rc)
  795. rc = -ENOTEMPTY;
  796. err_create_pkt:
  797. return rc;
  798. }
  799. static int __tzbsp_set_cvp_state(enum tzbsp_subsys_state state)
  800. {
  801. int rc = 0;
  802. rc = qcom_scm_set_remote_state(state, TZBSP_CVP_PAS_ID);
  803. dprintk(CVP_CORE, "Set state %d, resp %d\n", state, rc);
  804. if (rc) {
  805. dprintk(CVP_ERR, "Failed qcom_scm_set_remote_state %d\n", rc);
  806. return rc;
  807. }
  808. return 0;
  809. }
  810. /*
  811. * Based on fal10_veto, X2RPMh, core_pwr_on and PWAitMode value, infer
  812. * value of xtss_sw_reset. xtss_sw_reset is a TZ register bit. Driver
  813. * cannot access it directly.
  814. *
  815. * In __boot_firmware() function, the caller of this function. It checks
  816. * "core_pwr_on" == false, basically core powered off. So this function
  817. * doesn't check core_pwr_on. Assume core_pwr_on = false.
  818. *
  819. * fal10_veto = VPU_CPU_CS_X2RPMh[2] |
  820. * ( ~VPU_CPU_CS_X2RPMh[1] & core_pwr_on ) |
  821. * ( ~VPU_CPU_CS_X2RPMh[0] & ~( xtss_sw_reset | PWaitMode ) ) ;
  822. */
  823. static inline void check_tensilica_in_reset(struct iris_hfi_device *device)
  824. {
  825. u32 X2RPMh, fal10_veto, wait_mode;
  826. X2RPMh = __read_register(device, CVP_CPU_CS_X2RPMh);
  827. X2RPMh = X2RPMh & 0x7;
  828. /* wait_mode = 1: Tensilica is in WFI mode (PWaitMode = true) */
  829. wait_mode = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  830. wait_mode = wait_mode & 0x1;
  831. fal10_veto = __read_register(device, CVP_CPU_CS_X2RPMh_STATUS);
  832. fal10_veto = fal10_veto & 0x1;
  833. dprintk(CVP_WARN, "tensilica reset check %#x %#x %#x\n",
  834. X2RPMh, wait_mode, fal10_veto);
  835. }
  836. static inline int __boot_firmware(struct iris_hfi_device *device)
  837. {
  838. int rc = 0, loop = 10;
  839. u32 ctrl_init_val = 0, ctrl_status = 0, count = 0, max_tries = 1000;
  840. u32 reg_gdsc;
  841. /*
  842. * Hand off control of regulators to h/w _after_ enabling clocks.
  843. * Note that the GDSC will turn off when switching from normal
  844. * (s/w triggered) to fast (HW triggered) unless the h/w vote is
  845. * present. Since Iris isn't up yet, the GDSC will be off briefly.
  846. */
  847. if (__enable_hw_power_collapse(device))
  848. dprintk(CVP_ERR, "Failed to enabled inter-frame PC\n");
  849. while (loop) {
  850. reg_gdsc = __read_register(device, CVP_CC_MVS1_GDSCR);
  851. if (reg_gdsc & 0x80000000) {
  852. usleep_range(100, 200);
  853. loop--;
  854. } else {
  855. break;
  856. }
  857. }
  858. if (!loop)
  859. dprintk(CVP_ERR, "fail to power off CORE during resume\n");
  860. ctrl_init_val = BIT(0);
  861. __write_register(device, CVP_CTRL_INIT, ctrl_init_val);
  862. while (!ctrl_status && count < max_tries) {
  863. ctrl_status = __read_register(device, CVP_CTRL_STATUS);
  864. if ((ctrl_status & CVP_CTRL_ERROR_STATUS__M) == 0x4) {
  865. dprintk(CVP_ERR, "invalid setting for UC_REGION\n");
  866. rc = -ENODATA;
  867. break;
  868. }
  869. /* Reduce to 500, 1000 on silicon */
  870. usleep_range(50000, 100000);
  871. count++;
  872. }
  873. if (!(ctrl_status & CVP_CTRL_INIT_STATUS__M)) {
  874. ctrl_init_val = __read_register(device, CVP_CTRL_INIT);
  875. dprintk(CVP_ERR,
  876. "Failed to boot FW status: %x %x\n",
  877. ctrl_status, ctrl_init_val);
  878. check_tensilica_in_reset(device);
  879. rc = -ENODEV;
  880. }
  881. /* Enable interrupt before sending commands to tensilica */
  882. __write_register(device, CVP_CPU_CS_H2XSOFTINTEN, 0x1);
  883. __write_register(device, CVP_CPU_CS_X2RPMh, 0x0);
  884. return rc;
  885. }
  886. static int iris_hfi_resume(void *dev)
  887. {
  888. int rc = 0;
  889. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  890. if (!device) {
  891. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  892. return -EINVAL;
  893. }
  894. dprintk(CVP_CORE, "Resuming Iris\n");
  895. mutex_lock(&device->lock);
  896. rc = __resume(device);
  897. mutex_unlock(&device->lock);
  898. return rc;
  899. }
  900. static int iris_hfi_suspend(void *dev)
  901. {
  902. int rc = 0;
  903. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  904. if (!device) {
  905. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  906. return -EINVAL;
  907. } else if (!device->res->sw_power_collapsible) {
  908. return -ENOTSUPP;
  909. }
  910. dprintk(CVP_CORE, "Suspending Iris\n");
  911. mutex_lock(&device->lock);
  912. rc = __power_collapse(device, true);
  913. if (rc) {
  914. dprintk(CVP_WARN, "%s: Iris is busy\n", __func__);
  915. rc = -EBUSY;
  916. }
  917. mutex_unlock(&device->lock);
  918. /* Cancel pending delayed works if any */
  919. if (!rc)
  920. cancel_delayed_work(&iris_hfi_pm_work);
  921. return rc;
  922. }
  923. static void cvp_dump_csr(struct iris_hfi_device *dev)
  924. {
  925. u32 reg;
  926. if (!dev)
  927. return;
  928. if (!dev->power_enabled || dev->reg_dumped)
  929. return;
  930. reg = __read_register(dev, CVP_WRAPPER_CPU_STATUS);
  931. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_STATUS: %x\n", reg);
  932. reg = __read_register(dev, CVP_CPU_CS_SCIACMDARG0);
  933. dprintk(CVP_ERR, "CVP_CPU_CS_SCIACMDARG0: %x\n", reg);
  934. reg = __read_register(dev, CVP_WRAPPER_CPU_CLOCK_CONFIG);
  935. dprintk(CVP_ERR, "CVP_WRAPPER_CPU_CLOCK_CONFIG: %x\n", reg);
  936. reg = __read_register(dev, CVP_WRAPPER_CORE_CLOCK_CONFIG);
  937. dprintk(CVP_ERR, "CVP_WRAPPER_CORE_CLOCK_CONFIG: %x\n", reg);
  938. reg = __read_register(dev, CVP_WRAPPER_INTR_STATUS);
  939. dprintk(CVP_ERR, "CVP_WRAPPER_INTR_STATUS: %x\n", reg);
  940. reg = __read_register(dev, CVP_CPU_CS_H2ASOFTINT);
  941. dprintk(CVP_ERR, "CVP_CPU_CS_H2ASOFTINT: %x\n", reg);
  942. reg = __read_register(dev, CVP_CPU_CS_A2HSOFTINT);
  943. dprintk(CVP_ERR, "CVP_CPU_CS_A2HSOFTINT: %x\n", reg);
  944. reg = __read_register(dev, CVP_CC_MVS1C_GDSCR);
  945. dprintk(CVP_ERR, "CVP_CC_MVS1C_GDSCR: %x\n", reg);
  946. reg = __read_register(dev, CVP_CC_MVS1C_CBCR);
  947. dprintk(CVP_ERR, "CVP_CC_MVS1C_CBCR: %x\n", reg);
  948. dev->reg_dumped = true;
  949. }
  950. static int iris_hfi_flush_debug_queue(void *dev)
  951. {
  952. int rc = 0;
  953. struct iris_hfi_device *device = (struct iris_hfi_device *) dev;
  954. if (!device) {
  955. dprintk(CVP_ERR, "%s invalid device\n", __func__);
  956. return -EINVAL;
  957. }
  958. mutex_lock(&device->lock);
  959. if (!device->power_enabled) {
  960. dprintk(CVP_WARN, "%s: iris power off\n", __func__);
  961. rc = -EINVAL;
  962. goto exit;
  963. }
  964. cvp_dump_csr(device);
  965. __flush_debug_queue(device, NULL);
  966. exit:
  967. mutex_unlock(&device->lock);
  968. return rc;
  969. }
  970. static int iris_hfi_scale_clocks(void *dev, u32 freq)
  971. {
  972. int rc = 0;
  973. struct iris_hfi_device *device = dev;
  974. if (!device) {
  975. dprintk(CVP_ERR, "Invalid args: %pK\n", device);
  976. return -EINVAL;
  977. }
  978. mutex_lock(&device->lock);
  979. if (__resume(device)) {
  980. dprintk(CVP_ERR, "Resume from power collapse failed\n");
  981. rc = -ENODEV;
  982. goto exit;
  983. }
  984. rc = msm_cvp_set_clocks_impl(device, freq);
  985. exit:
  986. mutex_unlock(&device->lock);
  987. return rc;
  988. }
  989. /* Writes into cmdq without raising an interrupt */
  990. static int __iface_cmdq_write_relaxed(struct iris_hfi_device *device,
  991. void *pkt, bool *requires_interrupt)
  992. {
  993. struct cvp_iface_q_info *q_info;
  994. struct cvp_hal_cmd_pkt_hdr *cmd_packet;
  995. int result = -E2BIG;
  996. if (!device || !pkt) {
  997. dprintk(CVP_ERR, "Invalid Params\n");
  998. return -EINVAL;
  999. }
  1000. __strict_check(device);
  1001. if (!__core_in_valid_state(device)) {
  1002. dprintk(CVP_ERR, "%s - fw not in init state\n", __func__);
  1003. result = -EINVAL;
  1004. goto err_q_null;
  1005. }
  1006. cmd_packet = (struct cvp_hal_cmd_pkt_hdr *)pkt;
  1007. device->last_packet_type = cmd_packet->packet_type;
  1008. q_info = &device->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  1009. if (!q_info) {
  1010. dprintk(CVP_ERR, "cannot write to shared Q's\n");
  1011. goto err_q_null;
  1012. }
  1013. if (!q_info->q_array.align_virtual_addr) {
  1014. dprintk(CVP_ERR, "cannot write to shared CMD Q's\n");
  1015. result = -ENODATA;
  1016. goto err_q_null;
  1017. }
  1018. if (__resume(device)) {
  1019. dprintk(CVP_ERR, "%s: Power on failed\n", __func__);
  1020. goto err_q_write;
  1021. }
  1022. if (!__write_queue(q_info, (u8 *)pkt, requires_interrupt)) {
  1023. if (device->res->sw_power_collapsible) {
  1024. cancel_delayed_work(&iris_hfi_pm_work);
  1025. if (!queue_delayed_work(device->iris_pm_workq,
  1026. &iris_hfi_pm_work,
  1027. msecs_to_jiffies(
  1028. device->res->msm_cvp_pwr_collapse_delay))) {
  1029. dprintk(CVP_PWR,
  1030. "PM work already scheduled\n");
  1031. }
  1032. }
  1033. result = 0;
  1034. } else {
  1035. dprintk(CVP_ERR, "__iface_cmdq_write: queue full\n");
  1036. }
  1037. err_q_write:
  1038. err_q_null:
  1039. return result;
  1040. }
  1041. static int __iface_cmdq_write(struct iris_hfi_device *device, void *pkt)
  1042. {
  1043. bool needs_interrupt = false;
  1044. int rc = __iface_cmdq_write_relaxed(device, pkt, &needs_interrupt);
  1045. if (!rc && needs_interrupt) {
  1046. /* Consumer of cmdq prefers that we raise an interrupt */
  1047. rc = 0;
  1048. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1049. }
  1050. return rc;
  1051. }
  1052. static int __iface_msgq_read(struct iris_hfi_device *device, void *pkt)
  1053. {
  1054. u32 tx_req_is_set = 0;
  1055. int rc = 0;
  1056. struct cvp_iface_q_info *q_info;
  1057. if (!pkt) {
  1058. dprintk(CVP_ERR, "Invalid Params\n");
  1059. return -EINVAL;
  1060. }
  1061. __strict_check(device);
  1062. if (!__core_in_valid_state(device)) {
  1063. dprintk(CVP_WARN, "%s - fw not in init state\n", __func__);
  1064. rc = -EINVAL;
  1065. goto read_error_null;
  1066. }
  1067. q_info = &device->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1068. if (q_info->q_array.align_virtual_addr == NULL) {
  1069. dprintk(CVP_ERR, "cannot read from shared MSG Q's\n");
  1070. rc = -ENODATA;
  1071. goto read_error_null;
  1072. }
  1073. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1074. if (tx_req_is_set)
  1075. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1076. rc = 0;
  1077. } else
  1078. rc = -ENODATA;
  1079. read_error_null:
  1080. return rc;
  1081. }
  1082. static int __iface_dbgq_read(struct iris_hfi_device *device, void *pkt)
  1083. {
  1084. u32 tx_req_is_set = 0;
  1085. int rc = 0;
  1086. struct cvp_iface_q_info *q_info;
  1087. if (!pkt) {
  1088. dprintk(CVP_ERR, "Invalid Params\n");
  1089. return -EINVAL;
  1090. }
  1091. __strict_check(device);
  1092. q_info = &device->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1093. if (q_info->q_array.align_virtual_addr == NULL) {
  1094. dprintk(CVP_ERR, "cannot read from shared DBG Q's\n");
  1095. rc = -ENODATA;
  1096. goto dbg_error_null;
  1097. }
  1098. if (!__read_queue(q_info, (u8 *)pkt, &tx_req_is_set)) {
  1099. if (tx_req_is_set)
  1100. __write_register(device, CVP_CPU_CS_H2ASOFTINT, 1);
  1101. rc = 0;
  1102. } else
  1103. rc = -ENODATA;
  1104. dbg_error_null:
  1105. return rc;
  1106. }
  1107. static void __set_queue_hdr_defaults(struct cvp_hfi_queue_header *q_hdr)
  1108. {
  1109. q_hdr->qhdr_status = 0x1;
  1110. q_hdr->qhdr_type = CVP_IFACEQ_DFLT_QHDR;
  1111. q_hdr->qhdr_q_size = CVP_IFACEQ_QUEUE_SIZE / 4;
  1112. q_hdr->qhdr_pkt_size = 0;
  1113. q_hdr->qhdr_rx_wm = 0x1;
  1114. q_hdr->qhdr_tx_wm = 0x1;
  1115. q_hdr->qhdr_rx_req = 0x1;
  1116. q_hdr->qhdr_tx_req = 0x0;
  1117. q_hdr->qhdr_rx_irq_status = 0x0;
  1118. q_hdr->qhdr_tx_irq_status = 0x0;
  1119. q_hdr->qhdr_read_idx = 0x0;
  1120. q_hdr->qhdr_write_idx = 0x0;
  1121. }
  1122. /*
  1123. *Unused, keep for reference
  1124. */
  1125. /*
  1126. static void __interface_dsp_queues_release(struct iris_hfi_device *device)
  1127. {
  1128. int i;
  1129. struct msm_cvp_smem *mem_data = &device->dsp_iface_q_table.mem_data;
  1130. struct context_bank_info *cb = mem_data->mapping_info.cb_info;
  1131. if (!device->dsp_iface_q_table.align_virtual_addr) {
  1132. dprintk(CVP_ERR, "%s: already released\n", __func__);
  1133. return;
  1134. }
  1135. dma_unmap_single_attrs(cb->dev, mem_data->device_addr,
  1136. mem_data->size, DMA_BIDIRECTIONAL, 0);
  1137. dma_free_coherent(device->res->mem_cdsp.dev, mem_data->size,
  1138. mem_data->kvaddr, mem_data->dma_handle);
  1139. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1140. device->dsp_iface_queues[i].q_hdr = NULL;
  1141. device->dsp_iface_queues[i].q_array.align_virtual_addr = NULL;
  1142. device->dsp_iface_queues[i].q_array.align_device_addr = 0;
  1143. }
  1144. device->dsp_iface_q_table.align_virtual_addr = NULL;
  1145. device->dsp_iface_q_table.align_device_addr = 0;
  1146. }
  1147. */
  1148. static int __interface_dsp_queues_init(struct iris_hfi_device *dev)
  1149. {
  1150. int rc = 0;
  1151. u32 i;
  1152. struct cvp_iface_q_info *iface_q;
  1153. int offset = 0;
  1154. phys_addr_t fw_bias = 0;
  1155. size_t q_size;
  1156. struct msm_cvp_smem *mem_data;
  1157. void *kvaddr;
  1158. dma_addr_t dma_handle;
  1159. dma_addr_t iova;
  1160. struct context_bank_info *cb;
  1161. q_size = ALIGN(QUEUE_SIZE, SZ_1M);
  1162. mem_data = &dev->dsp_iface_q_table.mem_data;
  1163. if (mem_data->kvaddr) {
  1164. memset((void *)mem_data->kvaddr, 0, q_size);
  1165. cvp_dsp_init_hfi_queue_hdr(dev);
  1166. return 0;
  1167. }
  1168. /* Allocate dsp queues from CDSP device memory */
  1169. kvaddr = dma_alloc_coherent(dev->res->mem_cdsp.dev, q_size,
  1170. &dma_handle, GFP_KERNEL);
  1171. if (IS_ERR_OR_NULL(kvaddr)) {
  1172. dprintk(CVP_ERR, "%s: failed dma allocation\n", __func__);
  1173. goto fail_dma_alloc;
  1174. }
  1175. cb = msm_cvp_smem_get_context_bank(dev->res, 0);
  1176. if (!cb) {
  1177. dprintk(CVP_ERR,
  1178. "%s: failed to get context bank\n", __func__);
  1179. goto fail_dma_map;
  1180. }
  1181. iova = dma_map_single_attrs(cb->dev, phys_to_virt(dma_handle),
  1182. q_size, DMA_BIDIRECTIONAL, 0);
  1183. if (dma_mapping_error(cb->dev, iova)) {
  1184. dprintk(CVP_ERR, "%s: failed dma mapping\n", __func__);
  1185. goto fail_dma_map;
  1186. }
  1187. dprintk(CVP_DSP,
  1188. "%s: kvaddr %pK dma_handle %#llx iova %#llx size %zd\n",
  1189. __func__, kvaddr, dma_handle, iova, q_size);
  1190. memset(mem_data, 0, sizeof(struct msm_cvp_smem));
  1191. mem_data->kvaddr = kvaddr;
  1192. mem_data->device_addr = iova;
  1193. mem_data->dma_handle = dma_handle;
  1194. mem_data->size = q_size;
  1195. mem_data->mapping_info.cb_info = cb;
  1196. if (!is_iommu_present(dev->res))
  1197. fw_bias = dev->cvp_hal_data->firmware_base;
  1198. dev->dsp_iface_q_table.align_virtual_addr = kvaddr;
  1199. dev->dsp_iface_q_table.align_device_addr = iova - fw_bias;
  1200. dev->dsp_iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1201. offset = dev->dsp_iface_q_table.mem_size;
  1202. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1203. iface_q = &dev->dsp_iface_queues[i];
  1204. iface_q->q_array.align_device_addr = iova + offset - fw_bias;
  1205. iface_q->q_array.align_virtual_addr = kvaddr + offset;
  1206. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1207. offset += iface_q->q_array.mem_size;
  1208. spin_lock_init(&iface_q->hfi_lock);
  1209. }
  1210. cvp_dsp_init_hfi_queue_hdr(dev);
  1211. return rc;
  1212. fail_dma_map:
  1213. dma_free_coherent(dev->res->mem_cdsp.dev, q_size, kvaddr, dma_handle);
  1214. fail_dma_alloc:
  1215. return -ENOMEM;
  1216. }
  1217. static void __interface_queues_release(struct iris_hfi_device *device)
  1218. {
  1219. #ifdef CONFIG_EVA_TVM
  1220. int i;
  1221. struct cvp_hfi_mem_map_table *qdss;
  1222. struct cvp_hfi_mem_map *mem_map;
  1223. int num_entries = device->res->qdss_addr_set.count;
  1224. unsigned long mem_map_table_base_addr;
  1225. struct context_bank_info *cb;
  1226. if (device->qdss.align_virtual_addr) {
  1227. qdss = (struct cvp_hfi_mem_map_table *)
  1228. device->qdss.align_virtual_addr;
  1229. qdss->mem_map_num_entries = num_entries;
  1230. mem_map_table_base_addr =
  1231. device->qdss.align_device_addr +
  1232. sizeof(struct cvp_hfi_mem_map_table);
  1233. qdss->mem_map_table_base_addr =
  1234. (u32)mem_map_table_base_addr;
  1235. if ((unsigned long)qdss->mem_map_table_base_addr !=
  1236. mem_map_table_base_addr) {
  1237. dprintk(CVP_ERR,
  1238. "Invalid mem_map_table_base_addr %#lx",
  1239. mem_map_table_base_addr);
  1240. }
  1241. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1242. cb = msm_cvp_smem_get_context_bank(device->res, 0);
  1243. for (i = 0; cb && i < num_entries; i++) {
  1244. iommu_unmap(cb->domain,
  1245. mem_map[i].virtual_addr,
  1246. mem_map[i].size);
  1247. }
  1248. __smem_free(device, &device->qdss.mem_data);
  1249. }
  1250. __smem_free(device, &device->iface_q_table.mem_data);
  1251. __smem_free(device, &device->sfr.mem_data);
  1252. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1253. device->iface_queues[i].q_hdr = NULL;
  1254. device->iface_queues[i].q_array.align_virtual_addr = NULL;
  1255. device->iface_queues[i].q_array.align_device_addr = 0;
  1256. }
  1257. device->iface_q_table.align_virtual_addr = NULL;
  1258. device->iface_q_table.align_device_addr = 0;
  1259. device->qdss.align_virtual_addr = NULL;
  1260. device->qdss.align_device_addr = 0;
  1261. device->sfr.align_virtual_addr = NULL;
  1262. device->sfr.align_device_addr = 0;
  1263. device->mem_addr.align_virtual_addr = NULL;
  1264. device->mem_addr.align_device_addr = 0;
  1265. #endif
  1266. }
  1267. static int __get_qdss_iommu_virtual_addr(struct iris_hfi_device *dev,
  1268. struct cvp_hfi_mem_map *mem_map,
  1269. struct iommu_domain *domain)
  1270. {
  1271. int i;
  1272. int rc = 0;
  1273. dma_addr_t iova = QDSS_IOVA_START;
  1274. int num_entries = dev->res->qdss_addr_set.count;
  1275. struct addr_range *qdss_addr_tbl = dev->res->qdss_addr_set.addr_tbl;
  1276. if (!num_entries)
  1277. return -ENODATA;
  1278. for (i = 0; i < num_entries; i++) {
  1279. if (domain) {
  1280. rc = iommu_map(domain, iova,
  1281. qdss_addr_tbl[i].start,
  1282. qdss_addr_tbl[i].size,
  1283. IOMMU_READ | IOMMU_WRITE);
  1284. if (rc) {
  1285. dprintk(CVP_ERR,
  1286. "IOMMU QDSS mapping failed for addr %#x\n",
  1287. qdss_addr_tbl[i].start);
  1288. rc = -ENOMEM;
  1289. break;
  1290. }
  1291. } else {
  1292. iova = qdss_addr_tbl[i].start;
  1293. }
  1294. mem_map[i].virtual_addr = (u32)iova;
  1295. mem_map[i].physical_addr = qdss_addr_tbl[i].start;
  1296. mem_map[i].size = qdss_addr_tbl[i].size;
  1297. mem_map[i].attr = 0x0;
  1298. iova += mem_map[i].size;
  1299. }
  1300. if (i < num_entries) {
  1301. dprintk(CVP_ERR,
  1302. "QDSS mapping failed, Freeing other entries %d\n", i);
  1303. for (--i; domain && i >= 0; i--) {
  1304. iommu_unmap(domain,
  1305. mem_map[i].virtual_addr,
  1306. mem_map[i].size);
  1307. }
  1308. }
  1309. return rc;
  1310. }
  1311. static void __setup_ucregion_memory_map(struct iris_hfi_device *device)
  1312. {
  1313. __write_register(device, CVP_UC_REGION_ADDR,
  1314. (u32)device->iface_q_table.align_device_addr);
  1315. __write_register(device, CVP_UC_REGION_SIZE, SHARED_QSIZE);
  1316. __write_register(device, CVP_QTBL_ADDR,
  1317. (u32)device->iface_q_table.align_device_addr);
  1318. __write_register(device, CVP_QTBL_INFO, 0x01);
  1319. if (device->sfr.align_device_addr)
  1320. __write_register(device, CVP_SFR_ADDR,
  1321. (u32)device->sfr.align_device_addr);
  1322. if (device->qdss.align_device_addr)
  1323. __write_register(device, CVP_MMAP_ADDR,
  1324. (u32)device->qdss.align_device_addr);
  1325. call_iris_op(device, setup_dsp_uc_memmap, device);
  1326. }
  1327. static void __hfi_queue_init(struct iris_hfi_device *dev)
  1328. {
  1329. int i, offset = 0;
  1330. struct cvp_hfi_queue_table_header *q_tbl_hdr;
  1331. struct cvp_iface_q_info *iface_q;
  1332. struct cvp_hfi_queue_header *q_hdr;
  1333. if (!dev)
  1334. return;
  1335. offset += dev->iface_q_table.mem_size;
  1336. for (i = 0; i < CVP_IFACEQ_NUMQ; i++) {
  1337. iface_q = &dev->iface_queues[i];
  1338. iface_q->q_array.align_device_addr =
  1339. dev->iface_q_table.align_device_addr + offset;
  1340. iface_q->q_array.align_virtual_addr =
  1341. dev->iface_q_table.align_virtual_addr + offset;
  1342. iface_q->q_array.mem_size = CVP_IFACEQ_QUEUE_SIZE;
  1343. offset += iface_q->q_array.mem_size;
  1344. iface_q->q_hdr = CVP_IFACEQ_GET_QHDR_START_ADDR(
  1345. dev->iface_q_table.align_virtual_addr, i);
  1346. __set_queue_hdr_defaults(iface_q->q_hdr);
  1347. spin_lock_init(&iface_q->hfi_lock);
  1348. }
  1349. q_tbl_hdr = (struct cvp_hfi_queue_table_header *)
  1350. dev->iface_q_table.align_virtual_addr;
  1351. q_tbl_hdr->qtbl_version = 0;
  1352. q_tbl_hdr->device_addr = (void *)dev;
  1353. strlcpy(q_tbl_hdr->name, "msm_cvp", sizeof(q_tbl_hdr->name));
  1354. q_tbl_hdr->qtbl_size = CVP_IFACEQ_TABLE_SIZE;
  1355. q_tbl_hdr->qtbl_qhdr0_offset =
  1356. sizeof(struct cvp_hfi_queue_table_header);
  1357. q_tbl_hdr->qtbl_qhdr_size = sizeof(struct cvp_hfi_queue_header);
  1358. q_tbl_hdr->qtbl_num_q = CVP_IFACEQ_NUMQ;
  1359. q_tbl_hdr->qtbl_num_active_q = CVP_IFACEQ_NUMQ;
  1360. iface_q = &dev->iface_queues[CVP_IFACEQ_CMDQ_IDX];
  1361. q_hdr = iface_q->q_hdr;
  1362. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1363. q_hdr->qhdr_type |= HFI_Q_ID_HOST_TO_CTRL_CMD_Q;
  1364. iface_q = &dev->iface_queues[CVP_IFACEQ_MSGQ_IDX];
  1365. q_hdr = iface_q->q_hdr;
  1366. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1367. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_MSG_Q;
  1368. iface_q = &dev->iface_queues[CVP_IFACEQ_DBGQ_IDX];
  1369. q_hdr = iface_q->q_hdr;
  1370. q_hdr->qhdr_start_addr = iface_q->q_array.align_device_addr;
  1371. q_hdr->qhdr_type |= HFI_Q_ID_CTRL_TO_HOST_DEBUG_Q;
  1372. /*
  1373. * Set receive request to zero on debug queue as there is no
  1374. * need of interrupt from cvp hardware for debug messages
  1375. */
  1376. q_hdr->qhdr_rx_req = 0;
  1377. }
  1378. static void __sfr_init(struct iris_hfi_device *dev)
  1379. {
  1380. struct cvp_hfi_sfr_struct *vsfr;
  1381. if (!dev)
  1382. return;
  1383. vsfr = (struct cvp_hfi_sfr_struct *) dev->sfr.align_virtual_addr;
  1384. if (vsfr)
  1385. vsfr->bufSize = ALIGNED_SFR_SIZE;
  1386. }
  1387. static int __interface_queues_init(struct iris_hfi_device *dev)
  1388. {
  1389. int rc = 0;
  1390. struct cvp_hfi_mem_map_table *qdss;
  1391. struct cvp_hfi_mem_map *mem_map;
  1392. struct cvp_mem_addr *mem_addr;
  1393. int num_entries = dev->res->qdss_addr_set.count;
  1394. phys_addr_t fw_bias = 0;
  1395. size_t q_size;
  1396. unsigned long mem_map_table_base_addr;
  1397. struct context_bank_info *cb;
  1398. q_size = SHARED_QSIZE - ALIGNED_SFR_SIZE - ALIGNED_QDSS_SIZE;
  1399. mem_addr = &dev->mem_addr;
  1400. if (!is_iommu_present(dev->res))
  1401. fw_bias = dev->cvp_hal_data->firmware_base;
  1402. if (dev->iface_q_table.align_virtual_addr) {
  1403. memset((void *)dev->iface_q_table.align_virtual_addr,
  1404. 0, q_size);
  1405. goto hfi_queue_init;
  1406. }
  1407. rc = __smem_alloc(dev, mem_addr, q_size, 1, SMEM_UNCACHED);
  1408. if (rc) {
  1409. dprintk(CVP_ERR, "iface_q_table_alloc_fail\n");
  1410. goto fail_alloc_queue;
  1411. }
  1412. dev->iface_q_table.align_virtual_addr = mem_addr->align_virtual_addr;
  1413. dev->iface_q_table.align_device_addr = mem_addr->align_device_addr -
  1414. fw_bias;
  1415. dev->iface_q_table.mem_size = CVP_IFACEQ_TABLE_SIZE;
  1416. dev->iface_q_table.mem_data = mem_addr->mem_data;
  1417. hfi_queue_init:
  1418. __hfi_queue_init(dev);
  1419. if (dev->sfr.align_virtual_addr) {
  1420. memset((void *)dev->sfr.align_virtual_addr,
  1421. 0, ALIGNED_SFR_SIZE);
  1422. goto sfr_init;
  1423. }
  1424. rc = __smem_alloc(dev, mem_addr, ALIGNED_SFR_SIZE, 1, SMEM_UNCACHED);
  1425. if (rc) {
  1426. dprintk(CVP_WARN, "sfr_alloc_fail: SFR not will work\n");
  1427. dev->sfr.align_device_addr = 0;
  1428. } else {
  1429. dev->sfr.align_device_addr = mem_addr->align_device_addr -
  1430. fw_bias;
  1431. dev->sfr.align_virtual_addr = mem_addr->align_virtual_addr;
  1432. dev->sfr.mem_size = ALIGNED_SFR_SIZE;
  1433. dev->sfr.mem_data = mem_addr->mem_data;
  1434. }
  1435. sfr_init:
  1436. __sfr_init(dev);
  1437. if (dev->qdss.align_virtual_addr)
  1438. goto dsp_hfi_queue_init;
  1439. if ((msm_cvp_fw_debug_mode & HFI_DEBUG_MODE_QDSS) && num_entries) {
  1440. rc = __smem_alloc(dev, mem_addr, ALIGNED_QDSS_SIZE, 1,
  1441. SMEM_UNCACHED);
  1442. if (rc) {
  1443. dprintk(CVP_WARN,
  1444. "qdss_alloc_fail: QDSS messages logging will not work\n");
  1445. dev->qdss.align_device_addr = 0;
  1446. } else {
  1447. dev->qdss.align_device_addr =
  1448. mem_addr->align_device_addr - fw_bias;
  1449. dev->qdss.align_virtual_addr =
  1450. mem_addr->align_virtual_addr;
  1451. dev->qdss.mem_size = ALIGNED_QDSS_SIZE;
  1452. dev->qdss.mem_data = mem_addr->mem_data;
  1453. }
  1454. }
  1455. if (dev->qdss.align_virtual_addr) {
  1456. qdss =
  1457. (struct cvp_hfi_mem_map_table *)dev->qdss.align_virtual_addr;
  1458. qdss->mem_map_num_entries = num_entries;
  1459. mem_map_table_base_addr = dev->qdss.align_device_addr +
  1460. sizeof(struct cvp_hfi_mem_map_table);
  1461. qdss->mem_map_table_base_addr = mem_map_table_base_addr;
  1462. mem_map = (struct cvp_hfi_mem_map *)(qdss + 1);
  1463. cb = msm_cvp_smem_get_context_bank(dev->res, 0);
  1464. if (!cb) {
  1465. dprintk(CVP_ERR,
  1466. "%s: failed to get context bank\n", __func__);
  1467. return -EINVAL;
  1468. }
  1469. rc = __get_qdss_iommu_virtual_addr(dev, mem_map, cb->domain);
  1470. if (rc) {
  1471. dprintk(CVP_ERR,
  1472. "IOMMU mapping failed, Freeing qdss memdata\n");
  1473. __smem_free(dev, &dev->qdss.mem_data);
  1474. dev->qdss.align_virtual_addr = NULL;
  1475. dev->qdss.align_device_addr = 0;
  1476. }
  1477. }
  1478. dsp_hfi_queue_init:
  1479. rc = __interface_dsp_queues_init(dev);
  1480. if (rc) {
  1481. dprintk(CVP_ERR, "dsp_queues_init failed\n");
  1482. goto fail_alloc_queue;
  1483. }
  1484. __setup_ucregion_memory_map(dev);
  1485. return 0;
  1486. fail_alloc_queue:
  1487. return -ENOMEM;
  1488. }
  1489. static int __sys_set_debug(struct iris_hfi_device *device, u32 debug)
  1490. {
  1491. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1492. int rc = 0;
  1493. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1494. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1495. rc = call_hfi_pkt_op(device, sys_debug_config, pkt, debug);
  1496. if (rc) {
  1497. dprintk(CVP_WARN,
  1498. "Debug mode setting to FW failed\n");
  1499. return -ENOTEMPTY;
  1500. }
  1501. if (__iface_cmdq_write(device, pkt))
  1502. return -ENOTEMPTY;
  1503. return 0;
  1504. }
  1505. static int __sys_set_idle_indicator(struct iris_hfi_device *device,
  1506. bool enable)
  1507. {
  1508. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1509. int rc = 0;
  1510. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1511. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1512. rc = call_hfi_pkt_op(device, sys_set_idle_indicator, pkt, enable);
  1513. if (__iface_cmdq_write(device, pkt))
  1514. return -ENOTEMPTY;
  1515. return 0;
  1516. }
  1517. static int __sys_set_coverage(struct iris_hfi_device *device, u32 mode)
  1518. {
  1519. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1520. int rc = 0;
  1521. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1522. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1523. rc = call_hfi_pkt_op(device, sys_coverage_config,
  1524. pkt, mode);
  1525. if (rc) {
  1526. dprintk(CVP_WARN,
  1527. "Coverage mode setting to FW failed\n");
  1528. return -ENOTEMPTY;
  1529. }
  1530. if (__iface_cmdq_write(device, pkt)) {
  1531. dprintk(CVP_WARN, "Failed to send coverage pkt to f/w\n");
  1532. return -ENOTEMPTY;
  1533. }
  1534. return 0;
  1535. }
  1536. static int __sys_set_power_control(struct iris_hfi_device *device,
  1537. bool enable)
  1538. {
  1539. struct regulator_info *rinfo;
  1540. bool supported = false;
  1541. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  1542. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  1543. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  1544. iris_hfi_for_each_regulator(device, rinfo) {
  1545. if (rinfo->has_hw_power_collapse) {
  1546. supported = true;
  1547. break;
  1548. }
  1549. }
  1550. if (!supported)
  1551. return 0;
  1552. call_hfi_pkt_op(device, sys_power_control, pkt, enable);
  1553. if (__iface_cmdq_write(device, pkt))
  1554. return -ENOTEMPTY;
  1555. return 0;
  1556. }
  1557. static void cvp_pm_qos_update(struct iris_hfi_device *device, bool vote_on)
  1558. {
  1559. u32 latency, off_vote_cnt;
  1560. int i, err = 0;
  1561. spin_lock(&device->res->pm_qos.lock);
  1562. off_vote_cnt = device->res->pm_qos.off_vote_cnt;
  1563. spin_unlock(&device->res->pm_qos.lock);
  1564. if (vote_on && off_vote_cnt)
  1565. return;
  1566. latency = vote_on ? device->res->pm_qos.latency_us :
  1567. PM_QOS_RESUME_LATENCY_DEFAULT_VALUE;
  1568. if (device->res->pm_qos.latency_us && device->res->pm_qos.pm_qos_hdls)
  1569. for (i = 0; i < device->res->pm_qos.silver_count; i++) {
  1570. err = dev_pm_qos_update_request(
  1571. &device->res->pm_qos.pm_qos_hdls[i],
  1572. latency);
  1573. if (err < 0) {
  1574. if (vote_on) {
  1575. dprintk(CVP_WARN,
  1576. "pm qos on failed %d\n", err);
  1577. } else {
  1578. dprintk(CVP_WARN,
  1579. "pm qos off failed %d\n", err);
  1580. }
  1581. }
  1582. }
  1583. }
  1584. static int iris_pm_qos_update(void *device)
  1585. {
  1586. struct iris_hfi_device *dev;
  1587. if (!device) {
  1588. dprintk(CVP_ERR, "%s Invalid device\n", __func__);
  1589. return -ENODEV;
  1590. }
  1591. dev = device;
  1592. mutex_lock(&dev->lock);
  1593. cvp_pm_qos_update(dev, true);
  1594. mutex_unlock(&dev->lock);
  1595. return 0;
  1596. }
  1597. static int __hwfence_regs_map(struct iris_hfi_device *device)
  1598. {
  1599. int rc = 0;
  1600. struct context_bank_info *cb;
  1601. cb = msm_cvp_smem_get_context_bank(device->res, 0);
  1602. if (!cb) {
  1603. dprintk(CVP_ERR, "%s: fail to get cb\n", __func__);
  1604. return -EINVAL;
  1605. }
  1606. rc = iommu_map(cb->domain, device->res->ipclite_iova,
  1607. device->res->ipclite_phyaddr,
  1608. device->res->ipclite_size,
  1609. IOMMU_READ | IOMMU_WRITE);
  1610. if (rc) {
  1611. dprintk(CVP_ERR, "map ipclite fail %d %#x %#x %#x\n",
  1612. rc, device->res->ipclite_iova,
  1613. device->res->ipclite_phyaddr,
  1614. device->res->ipclite_size);
  1615. return rc;
  1616. }
  1617. rc = iommu_map(cb->domain, device->res->hwmutex_iova,
  1618. device->res->hwmutex_phyaddr,
  1619. device->res->hwmutex_size,
  1620. IOMMU_MMIO | IOMMU_READ | IOMMU_WRITE);
  1621. if (rc) {
  1622. dprintk(CVP_ERR, "map hwmutex fail %d %#x %#x %#x\n",
  1623. rc, device->res->hwmutex_iova,
  1624. device->res->hwmutex_phyaddr,
  1625. device->res->hwmutex_size);
  1626. return rc;
  1627. }
  1628. return rc;
  1629. }
  1630. static int __hwfence_regs_unmap(struct iris_hfi_device *device)
  1631. {
  1632. int rc = 0;
  1633. struct context_bank_info *cb;
  1634. cb = msm_cvp_smem_get_context_bank(device->res, 0);
  1635. if (!cb) {
  1636. dprintk(CVP_ERR, "%s: fail to get cb\n", __func__);
  1637. return -EINVAL;
  1638. }
  1639. iommu_unmap(cb->domain, device->res->ipclite_iova,
  1640. device->res->ipclite_size);
  1641. iommu_unmap(cb->domain, device->res->hwmutex_iova,
  1642. device->res->hwmutex_size);
  1643. return rc;
  1644. }
  1645. static int iris_hfi_core_init(void *device)
  1646. {
  1647. int rc = 0;
  1648. u32 ipcc_iova;
  1649. struct cvp_hfi_cmd_sys_init_packet pkt;
  1650. struct cvp_hfi_cmd_sys_get_property_packet version_pkt;
  1651. struct iris_hfi_device *dev;
  1652. if (!device) {
  1653. dprintk(CVP_ERR, "Invalid device\n");
  1654. return -ENODEV;
  1655. }
  1656. dev = device;
  1657. dprintk(CVP_CORE, "Core initializing\n");
  1658. pm_stay_awake(dev->res->pdev->dev.parent);
  1659. mutex_lock(&dev->lock);
  1660. dev->bus_vote.data =
  1661. kzalloc(sizeof(struct cvp_bus_vote_data), GFP_KERNEL);
  1662. if (!dev->bus_vote.data) {
  1663. dprintk(CVP_ERR, "Bus vote data memory is not allocated\n");
  1664. rc = -ENOMEM;
  1665. goto err_no_mem;
  1666. }
  1667. dev->bus_vote.data_count = 1;
  1668. dev->bus_vote.data->power_mode = CVP_POWER_TURBO;
  1669. __hwfence_regs_map(dev);
  1670. rc = __load_fw(dev);
  1671. if (rc) {
  1672. dprintk(CVP_ERR, "Failed to load Iris FW\n");
  1673. goto err_load_fw;
  1674. }
  1675. /* mmrm registration */
  1676. if (msm_cvp_mmrm_enabled) {
  1677. rc = msm_cvp_mmrm_register(device);
  1678. if (rc) {
  1679. dprintk(CVP_ERR, "Failed to register mmrm client\n");
  1680. goto err_core_init;
  1681. }
  1682. }
  1683. __set_state(dev, IRIS_STATE_INIT);
  1684. dev->reg_dumped = false;
  1685. dprintk(CVP_CORE, "Dev_Virt: %pa, Reg_Virt: %pK\n",
  1686. &dev->cvp_hal_data->firmware_base,
  1687. dev->cvp_hal_data->register_base);
  1688. rc = __interface_queues_init(dev);
  1689. if (rc) {
  1690. dprintk(CVP_ERR, "failed to init queues\n");
  1691. rc = -ENOMEM;
  1692. goto err_core_init;
  1693. }
  1694. cvp_register_va_md_region();
  1695. // Add node for dev struct
  1696. add_va_node_to_list(CVP_QUEUE_DUMP, dev,
  1697. sizeof(struct iris_hfi_device),
  1698. "iris_hfi_device-dev", false);
  1699. add_queue_header_to_va_md_list((void*)dev);
  1700. add_hfi_queue_to_va_md_list((void*)dev);
  1701. rc = msm_cvp_map_ipcc_regs(&ipcc_iova);
  1702. if (!rc) {
  1703. dprintk(CVP_CORE, "IPCC iova 0x%x\n", ipcc_iova);
  1704. __write_register(dev, CVP_MMAP_ADDR, ipcc_iova);
  1705. }
  1706. rc = __boot_firmware(dev);
  1707. if (rc) {
  1708. dprintk(CVP_ERR, "Failed to start core\n");
  1709. rc = -ENODEV;
  1710. goto err_core_init;
  1711. }
  1712. dev->version = __read_register(dev, CVP_VERSION_INFO);
  1713. rc = call_hfi_pkt_op(dev, sys_init, &pkt, 0);
  1714. if (rc) {
  1715. dprintk(CVP_ERR, "Failed to create sys init pkt\n");
  1716. goto err_core_init;
  1717. }
  1718. if (__iface_cmdq_write(dev, &pkt)) {
  1719. rc = -ENOTEMPTY;
  1720. goto err_core_init;
  1721. }
  1722. rc = call_hfi_pkt_op(dev, sys_image_version, &version_pkt);
  1723. if (rc || __iface_cmdq_write(dev, &version_pkt))
  1724. dprintk(CVP_WARN, "Failed to send image version pkt to f/w\n");
  1725. __sys_set_debug(device, msm_cvp_fw_debug);
  1726. __enable_subcaches(device);
  1727. __set_subcaches(device);
  1728. __set_ubwc_config(device);
  1729. __sys_set_idle_indicator(device, true);
  1730. #ifdef CVP_CONFIG_SYNX_V2
  1731. rc = cvp_synx_recover();
  1732. if (rc) {
  1733. dprintk(CVP_ERR, "Failed to recover synx\n");
  1734. goto err_core_init;
  1735. }
  1736. #endif
  1737. if (dev->res->pm_qos.latency_us) {
  1738. int err = 0;
  1739. u32 i, cpu;
  1740. dev->res->pm_qos.pm_qos_hdls = kcalloc(
  1741. dev->res->pm_qos.silver_count,
  1742. sizeof(struct dev_pm_qos_request),
  1743. GFP_KERNEL);
  1744. if (!dev->res->pm_qos.pm_qos_hdls) {
  1745. dprintk(CVP_WARN, "Failed allocate pm_qos_hdls\n");
  1746. goto pm_qos_bail;
  1747. }
  1748. for (i = 0; i < dev->res->pm_qos.silver_count; i++) {
  1749. cpu = dev->res->pm_qos.silver_cores[i];
  1750. err = dev_pm_qos_add_request(
  1751. get_cpu_device(cpu),
  1752. &dev->res->pm_qos.pm_qos_hdls[i],
  1753. DEV_PM_QOS_RESUME_LATENCY,
  1754. dev->res->pm_qos.latency_us);
  1755. if (err < 0)
  1756. dprintk(CVP_WARN,
  1757. "%s pm_qos_add_req %d failed\n",
  1758. __func__, i);
  1759. }
  1760. }
  1761. pm_qos_bail:
  1762. mutex_unlock(&dev->lock);
  1763. cvp_dsp_send_hfi_queue();
  1764. pm_relax(dev->res->pdev->dev.parent);
  1765. dprintk(CVP_CORE, "Core inited successfully\n");
  1766. return 0;
  1767. err_core_init:
  1768. __set_state(dev, IRIS_STATE_DEINIT);
  1769. __unload_fw(dev);
  1770. if (dev->mmrm_cvp)
  1771. {
  1772. msm_cvp_mmrm_deregister(dev);
  1773. }
  1774. err_load_fw:
  1775. err_no_mem:
  1776. dprintk(CVP_ERR, "Core init failed\n");
  1777. mutex_unlock(&dev->lock);
  1778. pm_relax(dev->res->pdev->dev.parent);
  1779. return rc;
  1780. }
  1781. static int iris_hfi_core_release(void *dev)
  1782. {
  1783. int rc = 0, i;
  1784. struct iris_hfi_device *device = dev;
  1785. struct cvp_hal_session *session, *next;
  1786. struct dev_pm_qos_request *qos_hdl;
  1787. if (!device) {
  1788. dprintk(CVP_ERR, "invalid device\n");
  1789. return -ENODEV;
  1790. }
  1791. mutex_lock(&device->lock);
  1792. dprintk(CVP_WARN, "Core releasing\n");
  1793. if (device->res->pm_qos.latency_us &&
  1794. device->res->pm_qos.pm_qos_hdls) {
  1795. for (i = 0; i < device->res->pm_qos.silver_count; i++) {
  1796. qos_hdl = &device->res->pm_qos.pm_qos_hdls[i];
  1797. if ((qos_hdl != NULL) && dev_pm_qos_request_active(qos_hdl))
  1798. dev_pm_qos_remove_request(qos_hdl);
  1799. }
  1800. kfree(device->res->pm_qos.pm_qos_hdls);
  1801. device->res->pm_qos.pm_qos_hdls = NULL;
  1802. }
  1803. __resume(device);
  1804. __set_state(device, IRIS_STATE_DEINIT);
  1805. __dsp_shutdown(device, 0);
  1806. __disable_subcaches(device);
  1807. __unload_fw(device);
  1808. __hwfence_regs_unmap(device);
  1809. if (msm_cvp_mmrm_enabled) {
  1810. rc = msm_cvp_mmrm_deregister(device);
  1811. if (rc) {
  1812. dprintk(CVP_ERR,
  1813. "%s: Failed msm_cvp_mmrm_deregister:%d\n",
  1814. __func__, rc);
  1815. }
  1816. }
  1817. /* unlink all sessions from device */
  1818. list_for_each_entry_safe(session, next, &device->sess_head, list) {
  1819. list_del(&session->list);
  1820. session->device = NULL;
  1821. }
  1822. dprintk(CVP_CORE, "Core released successfully\n");
  1823. mutex_unlock(&device->lock);
  1824. return rc;
  1825. }
  1826. static void __core_clear_interrupt(struct iris_hfi_device *device)
  1827. {
  1828. u32 intr_status = 0, mask = 0;
  1829. if (!device) {
  1830. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  1831. return;
  1832. }
  1833. intr_status = __read_register(device, CVP_WRAPPER_INTR_STATUS);
  1834. mask = (CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK | CVP_FATAL_INTR_BMSK);
  1835. if (intr_status & mask) {
  1836. device->intr_status |= intr_status;
  1837. device->reg_count++;
  1838. dprintk(CVP_CORE,
  1839. "INTERRUPT for device: %pK: times: %d status: %d\n",
  1840. device, device->reg_count, intr_status);
  1841. } else {
  1842. device->spur_count++;
  1843. }
  1844. __write_register(device, CVP_CPU_CS_A2HSOFTINTCLR, 1);
  1845. }
  1846. static int iris_hfi_core_trigger_ssr(void *device,
  1847. enum hal_ssr_trigger_type type)
  1848. {
  1849. struct cvp_hfi_cmd_sys_test_ssr_packet pkt;
  1850. int rc = 0;
  1851. struct iris_hfi_device *dev;
  1852. cvp_free_va_md_list();
  1853. if (!device) {
  1854. dprintk(CVP_ERR, "invalid device\n");
  1855. return -ENODEV;
  1856. }
  1857. dev = device;
  1858. if (mutex_trylock(&dev->lock)) {
  1859. rc = call_hfi_pkt_op(dev, ssr_cmd, type, &pkt);
  1860. if (rc) {
  1861. dprintk(CVP_ERR, "%s: failed to create packet\n",
  1862. __func__);
  1863. goto err_create_pkt;
  1864. }
  1865. if (__iface_cmdq_write(dev, &pkt))
  1866. rc = -ENOTEMPTY;
  1867. } else {
  1868. return -EAGAIN;
  1869. }
  1870. err_create_pkt:
  1871. mutex_unlock(&dev->lock);
  1872. return rc;
  1873. }
  1874. static void __set_default_sys_properties(struct iris_hfi_device *device)
  1875. {
  1876. if (__sys_set_debug(device, msm_cvp_fw_debug))
  1877. dprintk(CVP_WARN, "Setting fw_debug msg ON failed\n");
  1878. if (__sys_set_power_control(device, msm_cvp_fw_low_power_mode))
  1879. dprintk(CVP_WARN, "Setting h/w power collapse ON failed\n");
  1880. }
  1881. static void __session_clean(struct cvp_hal_session *session)
  1882. {
  1883. struct cvp_hal_session *temp, *next;
  1884. struct iris_hfi_device *device;
  1885. if (!session || !session->device) {
  1886. dprintk(CVP_WARN, "%s: invalid params\n", __func__);
  1887. return;
  1888. }
  1889. device = session->device;
  1890. dprintk(CVP_SESS, "deleted the session: %pK\n", session);
  1891. /*
  1892. * session might have been removed from the device list in
  1893. * core_release, so check and remove if it is in the list
  1894. */
  1895. list_for_each_entry_safe(temp, next, &device->sess_head, list) {
  1896. if (session == temp) {
  1897. list_del(&session->list);
  1898. break;
  1899. }
  1900. }
  1901. /* Poison the session handle with zeros */
  1902. *session = (struct cvp_hal_session){ {0} };
  1903. kfree(session);
  1904. }
  1905. static int iris_hfi_session_clean(void *session)
  1906. {
  1907. struct cvp_hal_session *sess_close;
  1908. struct iris_hfi_device *device;
  1909. if (!session) {
  1910. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  1911. return -EINVAL;
  1912. }
  1913. sess_close = session;
  1914. device = sess_close->device;
  1915. if (!device) {
  1916. dprintk(CVP_ERR, "Invalid device handle %s\n", __func__);
  1917. return -EINVAL;
  1918. }
  1919. mutex_lock(&device->lock);
  1920. __session_clean(sess_close);
  1921. mutex_unlock(&device->lock);
  1922. return 0;
  1923. }
  1924. static int iris_debug_hook(void *device)
  1925. {
  1926. struct iris_hfi_device *dev = device;
  1927. u32 val;
  1928. if (!device) {
  1929. dprintk(CVP_ERR, "%s Invalid device\n", __func__);
  1930. return -ENODEV;
  1931. }
  1932. #define CVP0_CVP_SS_FDU_SECURE_ENABLE 0x90
  1933. #define CVP0_CVP_SS_MPU_SECURE_ENABLE 0x94
  1934. #define CVP0_CVP_SS_ARP_THREAD_0_SECURE_ENABLE 0xA0
  1935. #define CVP0_CVP_SS_ARP_THREAD_1_SECURE_ENABLE 0xA4
  1936. #define CVP0_CVP_SS_ARP_THREAD_2_SECURE_ENABLE 0xA8
  1937. #define CVP0_CVP_SS_ARP_THREAD_3_SECURE_ENABLE 0xAC
  1938. val = __read_register(dev, CVP0_CVP_SS_FDU_SECURE_ENABLE);
  1939. dprintk(CVP_ERR, "FDU_SECURE_ENABLE %#x\n", val);
  1940. val = __read_register(dev, CVP0_CVP_SS_MPU_SECURE_ENABLE);
  1941. dprintk(CVP_ERR, "MPU_SECURE_ENABLE %#x\n", val);
  1942. val = __read_register(dev, CVP0_CVP_SS_ARP_THREAD_0_SECURE_ENABLE);
  1943. dprintk(CVP_ERR, "ARP_THREAD_0_SECURE_ENABLE %#x\n", val);
  1944. val = __read_register(dev, CVP0_CVP_SS_ARP_THREAD_1_SECURE_ENABLE);
  1945. dprintk(CVP_ERR, "ARP_THREAD_1_SECURE_ENABLE %#x\n", val);
  1946. val = __read_register(dev, CVP0_CVP_SS_ARP_THREAD_2_SECURE_ENABLE);
  1947. dprintk(CVP_ERR, "ARP_THREAD_2_SECURE_ENABLE %#x\n", val);
  1948. val = __read_register(dev, CVP0_CVP_SS_ARP_THREAD_3_SECURE_ENABLE);
  1949. dprintk(CVP_ERR, "ARP_THREAD_3_SECURE_ENABLE %#x\n", val);
  1950. return 0;
  1951. }
  1952. static int iris_hfi_session_init(void *device, void *session_id,
  1953. void **new_session)
  1954. {
  1955. struct cvp_hfi_cmd_sys_session_init_packet pkt;
  1956. struct iris_hfi_device *dev;
  1957. struct cvp_hal_session *s;
  1958. if (!device || !new_session) {
  1959. dprintk(CVP_ERR, "%s - invalid input\n", __func__);
  1960. return -EINVAL;
  1961. }
  1962. dev = device;
  1963. mutex_lock(&dev->lock);
  1964. s = kzalloc(sizeof(*s), GFP_KERNEL);
  1965. if (!s) {
  1966. dprintk(CVP_ERR, "new session fail: Out of memory\n");
  1967. goto err_session_init_fail;
  1968. }
  1969. s->session_id = session_id;
  1970. s->device = dev;
  1971. dprintk(CVP_SESS,
  1972. "%s: inst %pK, session %pK\n", __func__, session_id, s);
  1973. list_add_tail(&s->list, &dev->sess_head);
  1974. __set_default_sys_properties(device);
  1975. if (call_hfi_pkt_op(dev, session_init, &pkt, s)) {
  1976. dprintk(CVP_ERR, "session_init: failed to create packet\n");
  1977. goto err_session_init_fail;
  1978. }
  1979. *new_session = s;
  1980. if (__iface_cmdq_write(dev, &pkt))
  1981. goto err_session_init_fail;
  1982. mutex_unlock(&dev->lock);
  1983. return 0;
  1984. err_session_init_fail:
  1985. if (s)
  1986. __session_clean(s);
  1987. *new_session = NULL;
  1988. mutex_unlock(&dev->lock);
  1989. return -EINVAL;
  1990. }
  1991. static int __send_session_cmd(struct cvp_hal_session *session, int pkt_type)
  1992. {
  1993. struct cvp_hal_session_cmd_pkt pkt;
  1994. int rc = 0;
  1995. struct iris_hfi_device *device = session->device;
  1996. if (!__is_session_valid(device, session, __func__))
  1997. return -ECONNRESET;
  1998. rc = call_hfi_pkt_op(device, session_cmd,
  1999. &pkt, pkt_type, session);
  2000. if (rc == -EPERM)
  2001. return 0;
  2002. if (rc) {
  2003. dprintk(CVP_ERR, "send session cmd: create pkt failed\n");
  2004. goto err_create_pkt;
  2005. }
  2006. if (__iface_cmdq_write(session->device, &pkt))
  2007. rc = -ENOTEMPTY;
  2008. err_create_pkt:
  2009. return rc;
  2010. }
  2011. static int iris_hfi_session_end(void *session)
  2012. {
  2013. struct cvp_hal_session *sess;
  2014. struct iris_hfi_device *device;
  2015. int rc = 0;
  2016. if (!session) {
  2017. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  2018. return -EINVAL;
  2019. }
  2020. sess = session;
  2021. device = sess->device;
  2022. if (!device) {
  2023. dprintk(CVP_ERR, "Invalid session %s\n", __func__);
  2024. return -EINVAL;
  2025. }
  2026. mutex_lock(&device->lock);
  2027. if (msm_cvp_fw_coverage) {
  2028. if (__sys_set_coverage(sess->device, msm_cvp_fw_coverage))
  2029. dprintk(CVP_WARN, "Fw_coverage msg ON failed\n");
  2030. }
  2031. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_END);
  2032. mutex_unlock(&device->lock);
  2033. return rc;
  2034. }
  2035. static int iris_hfi_session_abort(void *sess)
  2036. {
  2037. struct cvp_hal_session *session = sess;
  2038. struct iris_hfi_device *device;
  2039. int rc = 0;
  2040. if (!session || !session->device) {
  2041. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  2042. return -EINVAL;
  2043. }
  2044. device = session->device;
  2045. mutex_lock(&device->lock);
  2046. rc = __send_session_cmd(session, HFI_CMD_SYS_SESSION_ABORT);
  2047. mutex_unlock(&device->lock);
  2048. return rc;
  2049. }
  2050. static int iris_hfi_session_set_buffers(void *sess, u32 iova, u32 size)
  2051. {
  2052. struct cvp_hfi_cmd_session_set_buffers_packet pkt;
  2053. int rc = 0;
  2054. struct cvp_hal_session *session = sess;
  2055. struct iris_hfi_device *device;
  2056. if (!session || !session->device || !iova || !size) {
  2057. dprintk(CVP_ERR, "Invalid Params\n");
  2058. return -EINVAL;
  2059. }
  2060. device = session->device;
  2061. mutex_lock(&device->lock);
  2062. if (!__is_session_valid(device, session, __func__)) {
  2063. rc = -ECONNRESET;
  2064. goto err_create_pkt;
  2065. }
  2066. rc = call_hfi_pkt_op(device, session_set_buffers,
  2067. &pkt, session, iova, size);
  2068. if (rc) {
  2069. dprintk(CVP_ERR, "set buffers: failed to create packet\n");
  2070. goto err_create_pkt;
  2071. }
  2072. if (__iface_cmdq_write(session->device, &pkt))
  2073. rc = -ENOTEMPTY;
  2074. err_create_pkt:
  2075. mutex_unlock(&device->lock);
  2076. return rc;
  2077. }
  2078. static int iris_hfi_session_release_buffers(void *sess)
  2079. {
  2080. struct cvp_session_release_buffers_packet pkt;
  2081. int rc = 0;
  2082. struct cvp_hal_session *session = sess;
  2083. struct iris_hfi_device *device;
  2084. if (!session || !session->device) {
  2085. dprintk(CVP_ERR, "Invalid Params\n");
  2086. return -EINVAL;
  2087. }
  2088. device = session->device;
  2089. mutex_lock(&device->lock);
  2090. if (!__is_session_valid(device, session, __func__)) {
  2091. rc = -ECONNRESET;
  2092. goto err_create_pkt;
  2093. }
  2094. rc = call_hfi_pkt_op(device, session_release_buffers, &pkt, session);
  2095. if (rc) {
  2096. dprintk(CVP_ERR, "release buffers: failed to create packet\n");
  2097. goto err_create_pkt;
  2098. }
  2099. if (__iface_cmdq_write(session->device, &pkt))
  2100. rc = -ENOTEMPTY;
  2101. err_create_pkt:
  2102. mutex_unlock(&device->lock);
  2103. return rc;
  2104. }
  2105. static int iris_hfi_session_send(void *sess,
  2106. struct eva_kmd_hfi_packet *in_pkt)
  2107. {
  2108. int rc = 0;
  2109. struct eva_kmd_hfi_packet pkt;
  2110. struct cvp_hal_session *session = sess;
  2111. struct iris_hfi_device *device;
  2112. if (!session || !session->device) {
  2113. dprintk(CVP_ERR, "invalid session");
  2114. return -ENODEV;
  2115. }
  2116. device = session->device;
  2117. mutex_lock(&device->lock);
  2118. if (!__is_session_valid(device, session, __func__)) {
  2119. rc = -ECONNRESET;
  2120. goto err_send_pkt;
  2121. }
  2122. rc = call_hfi_pkt_op(device, session_send,
  2123. &pkt, session, in_pkt);
  2124. if (rc) {
  2125. dprintk(CVP_ERR,
  2126. "failed to create pkt\n");
  2127. goto err_send_pkt;
  2128. }
  2129. if (__iface_cmdq_write(session->device, &pkt))
  2130. rc = -ENOTEMPTY;
  2131. err_send_pkt:
  2132. mutex_unlock(&device->lock);
  2133. return rc;
  2134. return rc;
  2135. }
  2136. static int iris_hfi_session_flush(void *sess)
  2137. {
  2138. struct cvp_hal_session *session = sess;
  2139. struct iris_hfi_device *device;
  2140. int rc = 0;
  2141. if (!session || !session->device) {
  2142. dprintk(CVP_ERR, "Invalid Params %s\n", __func__);
  2143. return -EINVAL;
  2144. }
  2145. device = session->device;
  2146. mutex_lock(&device->lock);
  2147. rc = __send_session_cmd(session, HFI_CMD_SESSION_CVP_FLUSH);
  2148. mutex_unlock(&device->lock);
  2149. return rc;
  2150. }
  2151. static void __process_fatal_error(
  2152. struct iris_hfi_device *device)
  2153. {
  2154. struct msm_cvp_cb_cmd_done cmd_done = {0};
  2155. cmd_done.device_id = device->device_id;
  2156. device->callback(HAL_SYS_ERROR, &cmd_done);
  2157. }
  2158. static int __prepare_pc(struct iris_hfi_device *device)
  2159. {
  2160. int rc = 0;
  2161. struct cvp_hfi_cmd_sys_pc_prep_packet pkt;
  2162. rc = call_hfi_pkt_op(device, sys_pc_prep, &pkt);
  2163. if (rc) {
  2164. dprintk(CVP_ERR, "Failed to create sys pc prep pkt\n");
  2165. goto err_pc_prep;
  2166. }
  2167. if (__iface_cmdq_write(device, &pkt))
  2168. rc = -ENOTEMPTY;
  2169. if (rc)
  2170. dprintk(CVP_ERR, "Failed to prepare iris for power off");
  2171. err_pc_prep:
  2172. return rc;
  2173. }
  2174. static void iris_hfi_pm_handler(struct work_struct *work)
  2175. {
  2176. int rc = 0;
  2177. struct msm_cvp_core *core;
  2178. struct iris_hfi_device *device;
  2179. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2180. if (core)
  2181. device = core->device->hfi_device_data;
  2182. else
  2183. return;
  2184. if (!device) {
  2185. dprintk(CVP_ERR, "%s: NULL device\n", __func__);
  2186. return;
  2187. }
  2188. dprintk(CVP_PWR,
  2189. "Entering %s\n", __func__);
  2190. /*
  2191. * It is ok to check this variable outside the lock since
  2192. * it is being updated in this context only
  2193. */
  2194. if (device->skip_pc_count >= CVP_MAX_PC_SKIP_COUNT) {
  2195. dprintk(CVP_WARN, "Failed to PC for %d times\n",
  2196. device->skip_pc_count);
  2197. device->skip_pc_count = 0;
  2198. __process_fatal_error(device);
  2199. return;
  2200. }
  2201. mutex_lock(&device->lock);
  2202. if (gfa_cv.state == DSP_SUSPEND)
  2203. rc = __power_collapse(device, true);
  2204. else
  2205. rc = __power_collapse(device, false);
  2206. mutex_unlock(&device->lock);
  2207. switch (rc) {
  2208. case 0:
  2209. device->skip_pc_count = 0;
  2210. /* Cancel pending delayed works if any */
  2211. cancel_delayed_work(&iris_hfi_pm_work);
  2212. dprintk(CVP_PWR, "%s: power collapse successful!\n",
  2213. __func__);
  2214. break;
  2215. case -EBUSY:
  2216. device->skip_pc_count = 0;
  2217. dprintk(CVP_PWR, "%s: retry PC as cvp is busy\n", __func__);
  2218. queue_delayed_work(device->iris_pm_workq,
  2219. &iris_hfi_pm_work, msecs_to_jiffies(
  2220. device->res->msm_cvp_pwr_collapse_delay));
  2221. break;
  2222. case -EAGAIN:
  2223. device->skip_pc_count++;
  2224. dprintk(CVP_WARN, "%s: retry power collapse (count %d)\n",
  2225. __func__, device->skip_pc_count);
  2226. queue_delayed_work(device->iris_pm_workq,
  2227. &iris_hfi_pm_work, msecs_to_jiffies(
  2228. device->res->msm_cvp_pwr_collapse_delay));
  2229. break;
  2230. default:
  2231. dprintk(CVP_ERR, "%s: power collapse failed\n", __func__);
  2232. break;
  2233. }
  2234. }
  2235. static int __power_collapse(struct iris_hfi_device *device, bool force)
  2236. {
  2237. int rc = 0;
  2238. u32 wfi_status = 0, idle_status = 0, pc_ready = 0;
  2239. u32 flags = 0;
  2240. int count = 0;
  2241. const int max_tries = 150;
  2242. if (!device) {
  2243. dprintk(CVP_ERR, "%s: invalid params\n", __func__);
  2244. return -EINVAL;
  2245. }
  2246. if (!device->power_enabled) {
  2247. dprintk(CVP_PWR, "%s: Power already disabled\n",
  2248. __func__);
  2249. goto exit;
  2250. }
  2251. rc = __core_in_valid_state(device);
  2252. if (!rc) {
  2253. dprintk(CVP_WARN,
  2254. "Core is in bad state, Skipping power collapse\n");
  2255. return -EINVAL;
  2256. }
  2257. rc = __dsp_suspend(device, force, flags);
  2258. if (rc == -EBUSY)
  2259. goto exit;
  2260. else if (rc)
  2261. goto skip_power_off;
  2262. __flush_debug_queue(device, device->raw_packet);
  2263. pc_ready = __read_register(device, CVP_CTRL_STATUS) &
  2264. CVP_CTRL_STATUS_PC_READY;
  2265. if (!pc_ready) {
  2266. wfi_status = __read_register(device,
  2267. CVP_WRAPPER_CPU_STATUS);
  2268. idle_status = __read_register(device,
  2269. CVP_CTRL_STATUS);
  2270. if (!(wfi_status & BIT(0))) {
  2271. dprintk(CVP_WARN,
  2272. "Skipping PC as wfi_status (%#x) bit not set\n",
  2273. wfi_status);
  2274. goto skip_power_off;
  2275. }
  2276. if (!(idle_status & BIT(30))) {
  2277. dprintk(CVP_WARN,
  2278. "Skipping PC as idle_status (%#x) bit not set\n",
  2279. idle_status);
  2280. goto skip_power_off;
  2281. }
  2282. rc = __prepare_pc(device);
  2283. if (rc) {
  2284. dprintk(CVP_WARN, "Failed PC %d\n", rc);
  2285. goto skip_power_off;
  2286. }
  2287. while (count < max_tries) {
  2288. wfi_status = __read_register(device,
  2289. CVP_WRAPPER_CPU_STATUS);
  2290. pc_ready = __read_register(device,
  2291. CVP_CTRL_STATUS);
  2292. if ((wfi_status & BIT(0)) && (pc_ready &
  2293. CVP_CTRL_STATUS_PC_READY))
  2294. break;
  2295. usleep_range(150, 250);
  2296. count++;
  2297. }
  2298. if (count == max_tries) {
  2299. dprintk(CVP_ERR,
  2300. "Skip PC. Core is not ready (%#x, %#x)\n",
  2301. wfi_status, pc_ready);
  2302. goto skip_power_off;
  2303. }
  2304. } else {
  2305. wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  2306. if (!(wfi_status & BIT(0))) {
  2307. dprintk(CVP_WARN,
  2308. "Skip PC as wfi_status (%#x) bit not set\n",
  2309. wfi_status);
  2310. goto skip_power_off;
  2311. }
  2312. }
  2313. rc = __suspend(device);
  2314. if (rc)
  2315. dprintk(CVP_ERR, "Failed __suspend\n");
  2316. exit:
  2317. return rc;
  2318. skip_power_off:
  2319. dprintk(CVP_PWR, "Skip PC(%#x, %#x, %#x)\n",
  2320. wfi_status, idle_status, pc_ready);
  2321. __flush_debug_queue(device, device->raw_packet);
  2322. return -EAGAIN;
  2323. }
  2324. static void __process_sys_error(struct iris_hfi_device *device)
  2325. {
  2326. struct cvp_hfi_sfr_struct *vsfr = NULL;
  2327. vsfr = (struct cvp_hfi_sfr_struct *)device->sfr.align_virtual_addr;
  2328. if (vsfr) {
  2329. void *p = memchr(vsfr->rg_data, '\0', vsfr->bufSize);
  2330. /*
  2331. * SFR isn't guaranteed to be NULL terminated
  2332. * since SYS_ERROR indicates that Iris is in the
  2333. * process of crashing.
  2334. */
  2335. if (p == NULL)
  2336. vsfr->rg_data[vsfr->bufSize - 1] = '\0';
  2337. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2338. vsfr->rg_data);
  2339. }
  2340. }
  2341. static void __flush_debug_queue(struct iris_hfi_device *device, u8 *packet)
  2342. {
  2343. bool local_packet = false;
  2344. enum cvp_msg_prio log_level = CVP_FW;
  2345. if (!device) {
  2346. dprintk(CVP_ERR, "%s: Invalid params\n", __func__);
  2347. return;
  2348. }
  2349. if (!packet) {
  2350. packet = kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  2351. if (!packet) {
  2352. dprintk(CVP_ERR, "In %s() Fail to allocate mem\n",
  2353. __func__);
  2354. return;
  2355. }
  2356. local_packet = true;
  2357. /*
  2358. * Local packek is used when something FATAL occurred.
  2359. * It is good to print these logs by default.
  2360. */
  2361. log_level = CVP_ERR;
  2362. }
  2363. #define SKIP_INVALID_PKT(pkt_size, payload_size, pkt_hdr_size) ({ \
  2364. if (pkt_size < pkt_hdr_size || \
  2365. payload_size < MIN_PAYLOAD_SIZE || \
  2366. payload_size > \
  2367. (pkt_size - pkt_hdr_size + sizeof(u8))) { \
  2368. dprintk(CVP_ERR, \
  2369. "%s: invalid msg size - %d\n", \
  2370. __func__, pkt->msg_size); \
  2371. continue; \
  2372. } \
  2373. })
  2374. while (!__iface_dbgq_read(device, packet)) {
  2375. struct cvp_hfi_packet_header *pkt =
  2376. (struct cvp_hfi_packet_header *) packet;
  2377. if (pkt->size < sizeof(struct cvp_hfi_packet_header)) {
  2378. dprintk(CVP_ERR, "Invalid pkt size - %s\n",
  2379. __func__);
  2380. continue;
  2381. }
  2382. if (pkt->packet_type == HFI_MSG_SYS_DEBUG) {
  2383. struct cvp_hfi_msg_sys_debug_packet *pkt =
  2384. (struct cvp_hfi_msg_sys_debug_packet *) packet;
  2385. SKIP_INVALID_PKT(pkt->size,
  2386. pkt->msg_size, sizeof(*pkt));
  2387. /*
  2388. * All fw messages starts with new line character. This
  2389. * causes dprintk to print this message in two lines
  2390. * in the kernel log. Ignoring the first character
  2391. * from the message fixes this to print it in a single
  2392. * line.
  2393. */
  2394. pkt->rg_msg_data[pkt->msg_size-1] = '\0';
  2395. dprintk(log_level, "%s", &pkt->rg_msg_data[1]);
  2396. }
  2397. }
  2398. #undef SKIP_INVALID_PKT
  2399. if (local_packet)
  2400. kfree(packet);
  2401. }
  2402. static bool __is_session_valid(struct iris_hfi_device *device,
  2403. struct cvp_hal_session *session, const char *func)
  2404. {
  2405. struct cvp_hal_session *temp = NULL;
  2406. if (!device || !session)
  2407. goto invalid;
  2408. list_for_each_entry(temp, &device->sess_head, list)
  2409. if (session == temp)
  2410. return true;
  2411. invalid:
  2412. dprintk(CVP_WARN, "%s: device %pK, invalid session %pK\n",
  2413. func, device, session);
  2414. return false;
  2415. }
  2416. static struct cvp_hal_session *__get_session(struct iris_hfi_device *device,
  2417. u32 session_id)
  2418. {
  2419. struct cvp_hal_session *temp = NULL;
  2420. list_for_each_entry(temp, &device->sess_head, list) {
  2421. if (session_id == hash32_ptr(temp))
  2422. return temp;
  2423. }
  2424. return NULL;
  2425. }
  2426. #define _INVALID_MSG_ "Unrecognized MSG (%#x) session (%pK), discarding\n"
  2427. #define _INVALID_STATE_ "Ignore responses from %d to %d invalid state\n"
  2428. #define _DEVFREQ_FAIL_ "Failed to add devfreq device bus %s governor %s: %d\n"
  2429. static void process_system_msg(struct msm_cvp_cb_info *info,
  2430. struct iris_hfi_device *device,
  2431. void *raw_packet)
  2432. {
  2433. struct cvp_hal_sys_init_done sys_init_done = {0};
  2434. switch (info->response_type) {
  2435. case HAL_SYS_ERROR:
  2436. __process_sys_error(device);
  2437. break;
  2438. case HAL_SYS_RELEASE_RESOURCE_DONE:
  2439. dprintk(CVP_CORE, "Received SYS_RELEASE_RESOURCE\n");
  2440. break;
  2441. case HAL_SYS_INIT_DONE:
  2442. dprintk(CVP_CORE, "Received SYS_INIT_DONE\n");
  2443. sys_init_done.capabilities =
  2444. device->sys_init_capabilities;
  2445. cvp_hfi_process_sys_init_done_prop_read(
  2446. (struct cvp_hfi_msg_sys_init_done_packet *)
  2447. raw_packet, &sys_init_done);
  2448. info->response.cmd.data.sys_init_done = sys_init_done;
  2449. break;
  2450. default:
  2451. break;
  2452. }
  2453. }
  2454. static void **get_session_id(struct msm_cvp_cb_info *info)
  2455. {
  2456. void **session_id = NULL;
  2457. /* For session-related packets, validate session */
  2458. switch (info->response_type) {
  2459. case HAL_SESSION_INIT_DONE:
  2460. case HAL_SESSION_END_DONE:
  2461. case HAL_SESSION_ABORT_DONE:
  2462. case HAL_SESSION_STOP_DONE:
  2463. case HAL_SESSION_FLUSH_DONE:
  2464. case HAL_SESSION_SET_BUFFER_DONE:
  2465. case HAL_SESSION_SUSPEND_DONE:
  2466. case HAL_SESSION_RESUME_DONE:
  2467. case HAL_SESSION_SET_PROP_DONE:
  2468. case HAL_SESSION_GET_PROP_DONE:
  2469. case HAL_SESSION_RELEASE_BUFFER_DONE:
  2470. case HAL_SESSION_REGISTER_BUFFER_DONE:
  2471. case HAL_SESSION_UNREGISTER_BUFFER_DONE:
  2472. case HAL_SESSION_PROPERTY_INFO:
  2473. case HAL_SESSION_EVENT_CHANGE:
  2474. case HAL_SESSION_DUMP_NOTIFY:
  2475. session_id = &info->response.cmd.session_id;
  2476. break;
  2477. case HAL_SESSION_ERROR:
  2478. session_id = &info->response.data.session_id;
  2479. break;
  2480. case HAL_RESPONSE_UNUSED:
  2481. default:
  2482. session_id = NULL;
  2483. break;
  2484. }
  2485. return session_id;
  2486. }
  2487. static void print_msg_hdr(void *hdr)
  2488. {
  2489. struct cvp_hfi_msg_session_hdr *new_hdr =
  2490. (struct cvp_hfi_msg_session_hdr *)hdr;
  2491. dprintk(CVP_HFI, "HFI MSG received: %x %x %x %x %x %x %x %#llx\n",
  2492. new_hdr->size, new_hdr->packet_type,
  2493. new_hdr->session_id,
  2494. new_hdr->client_data.transaction_id,
  2495. new_hdr->client_data.data1,
  2496. new_hdr->client_data.data2,
  2497. new_hdr->error_type,
  2498. new_hdr->client_data.kdata);
  2499. }
  2500. static int __response_handler(struct iris_hfi_device *device)
  2501. {
  2502. struct msm_cvp_cb_info *packets;
  2503. int packet_count = 0;
  2504. u8 *raw_packet = NULL;
  2505. bool requeue_pm_work = true;
  2506. if (!device || device->state != IRIS_STATE_INIT)
  2507. return 0;
  2508. packets = device->response_pkt;
  2509. raw_packet = device->raw_packet;
  2510. if (!raw_packet || !packets) {
  2511. dprintk(CVP_ERR,
  2512. "%s: Invalid args : Res pkt = %pK, Raw pkt = %pK\n",
  2513. __func__, packets, raw_packet);
  2514. return 0;
  2515. }
  2516. if (device->intr_status & CVP_FATAL_INTR_BMSK) {
  2517. struct cvp_hfi_sfr_struct *vsfr = (struct cvp_hfi_sfr_struct *)
  2518. device->sfr.align_virtual_addr;
  2519. struct msm_cvp_cb_info info = {
  2520. .response_type = HAL_SYS_WATCHDOG_TIMEOUT,
  2521. .response.cmd = {
  2522. .device_id = device->device_id,
  2523. }
  2524. };
  2525. if (vsfr)
  2526. dprintk(CVP_ERR, "SFR Message from FW: %s\n",
  2527. vsfr->rg_data);
  2528. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CPU_NOC_BMSK)
  2529. dprintk(CVP_ERR, "Received Xtensa NOC error\n");
  2530. if (device->intr_status & CVP_WRAPPER_INTR_MASK_CORE_NOC_BMSK)
  2531. dprintk(CVP_ERR, "Received CVP core NOC error\n");
  2532. if (device->intr_status & CVP_WRAPPER_INTR_MASK_A2HWD_BMSK)
  2533. dprintk(CVP_ERR, "Received CVP watchdog timeout\n");
  2534. packets[packet_count++] = info;
  2535. goto exit;
  2536. }
  2537. /* Bleed the msg queue dry of packets */
  2538. while (!__iface_msgq_read(device, raw_packet)) {
  2539. void **session_id = NULL;
  2540. struct msm_cvp_cb_info *info = &packets[packet_count++];
  2541. struct cvp_hfi_msg_session_hdr *hdr =
  2542. (struct cvp_hfi_msg_session_hdr *)raw_packet;
  2543. int rc = 0;
  2544. print_msg_hdr(hdr);
  2545. rc = cvp_hfi_process_msg_packet(device->device_id,
  2546. raw_packet, info);
  2547. if (rc) {
  2548. dprintk(CVP_WARN,
  2549. "Corrupt/unknown packet found, discarding\n");
  2550. --packet_count;
  2551. continue;
  2552. } else if (info->response_type == HAL_NO_RESP) {
  2553. --packet_count;
  2554. continue;
  2555. }
  2556. /* Process the packet types that we're interested in */
  2557. process_system_msg(info, device, raw_packet);
  2558. session_id = get_session_id(info);
  2559. /*
  2560. * hfi_process_msg_packet provides a session_id that's a hashed
  2561. * value of struct cvp_hal_session, we need to coerce the hashed
  2562. * value back to pointer that we can use. Ideally, hfi_process\
  2563. * _msg_packet should take care of this, but it doesn't have
  2564. * required information for it
  2565. */
  2566. if (session_id) {
  2567. struct cvp_hal_session *session = NULL;
  2568. if (upper_32_bits((uintptr_t)*session_id) != 0) {
  2569. dprintk(CVP_ERR,
  2570. "Upper 32-bits != 0 for sess_id=%pK\n",
  2571. *session_id);
  2572. }
  2573. session = __get_session(device,
  2574. (u32)(uintptr_t)*session_id);
  2575. if (!session) {
  2576. dprintk(CVP_ERR, _INVALID_MSG_,
  2577. info->response_type,
  2578. *session_id);
  2579. --packet_count;
  2580. continue;
  2581. }
  2582. *session_id = session->session_id;
  2583. }
  2584. if (packet_count >= cvp_max_packets) {
  2585. dprintk(CVP_WARN,
  2586. "Too many packets in message queue!\n");
  2587. break;
  2588. }
  2589. /* do not read packets after sys error packet */
  2590. if (info->response_type == HAL_SYS_ERROR)
  2591. break;
  2592. }
  2593. if (requeue_pm_work && device->res->sw_power_collapsible) {
  2594. cancel_delayed_work(&iris_hfi_pm_work);
  2595. if (!queue_delayed_work(device->iris_pm_workq,
  2596. &iris_hfi_pm_work,
  2597. msecs_to_jiffies(
  2598. device->res->msm_cvp_pwr_collapse_delay))) {
  2599. dprintk(CVP_ERR, "PM work already scheduled\n");
  2600. }
  2601. }
  2602. exit:
  2603. __flush_debug_queue(device, raw_packet);
  2604. return packet_count;
  2605. }
  2606. static void iris_hfi_core_work_handler(struct work_struct *work)
  2607. {
  2608. struct msm_cvp_core *core;
  2609. struct iris_hfi_device *device;
  2610. int num_responses = 0, i = 0;
  2611. u32 intr_status;
  2612. static bool warning_on = true;
  2613. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  2614. if (core)
  2615. device = core->device->hfi_device_data;
  2616. else
  2617. return;
  2618. mutex_lock(&device->lock);
  2619. if (!__core_in_valid_state(device)) {
  2620. if (warning_on) {
  2621. dprintk(CVP_WARN, "%s Core not in init state\n",
  2622. __func__);
  2623. warning_on = false;
  2624. }
  2625. goto err_no_work;
  2626. }
  2627. warning_on = true;
  2628. if (!device->callback) {
  2629. dprintk(CVP_ERR, "No interrupt callback function: %pK\n",
  2630. device);
  2631. goto err_no_work;
  2632. }
  2633. if (__resume(device)) {
  2634. dprintk(CVP_ERR, "%s: Power enable failed\n", __func__);
  2635. goto err_no_work;
  2636. }
  2637. __core_clear_interrupt(device);
  2638. num_responses = __response_handler(device);
  2639. dprintk(CVP_HFI, "%s:: cvp_driver_debug num_responses = %d ",
  2640. __func__, num_responses);
  2641. err_no_work:
  2642. /* Keep the interrupt status before releasing device lock */
  2643. intr_status = device->intr_status;
  2644. mutex_unlock(&device->lock);
  2645. /*
  2646. * Issue the callbacks outside of the locked contex to preserve
  2647. * re-entrancy.
  2648. */
  2649. for (i = 0; !IS_ERR_OR_NULL(device->response_pkt) &&
  2650. i < num_responses; ++i) {
  2651. struct msm_cvp_cb_info *r = &device->response_pkt[i];
  2652. void *rsp = (void *)&r->response;
  2653. if (!__core_in_valid_state(device)) {
  2654. dprintk(CVP_ERR,
  2655. _INVALID_STATE_, (i + 1), num_responses);
  2656. break;
  2657. }
  2658. dprintk(CVP_HFI, "Processing response %d of %d, type %d\n",
  2659. (i + 1), num_responses, r->response_type);
  2660. device->callback(r->response_type, rsp);
  2661. }
  2662. /* We need re-enable the irq which was disabled in ISR handler */
  2663. if (!(intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  2664. enable_irq(device->cvp_hal_data->irq);
  2665. /*
  2666. * XXX: Don't add any code beyond here. Reacquiring locks after release
  2667. * it above doesn't guarantee the atomicity that we're aiming for.
  2668. */
  2669. }
  2670. static DECLARE_WORK(iris_hfi_work, iris_hfi_core_work_handler);
  2671. irqreturn_t cvp_hfi_isr(int irq, void *dev)
  2672. {
  2673. struct iris_hfi_device *device = dev;
  2674. disable_irq_nosync(irq);
  2675. queue_work(device->cvp_workq, &iris_hfi_work);
  2676. return IRQ_HANDLED;
  2677. }
  2678. static int __handle_reset_clk(struct msm_cvp_platform_resources *res,
  2679. int reset_index, enum reset_state state,
  2680. enum power_state pwr_state)
  2681. {
  2682. int rc = 0;
  2683. struct reset_control *rst;
  2684. struct reset_info rst_info;
  2685. struct reset_set *rst_set = &res->reset_set;
  2686. if (!rst_set->reset_tbl)
  2687. return 0;
  2688. rst_info = rst_set->reset_tbl[reset_index];
  2689. rst = rst_info.rst;
  2690. dprintk(CVP_PWR, "reset_clk: name %s reset_state %d rst %pK ps=%d\n",
  2691. rst_set->reset_tbl[reset_index].name, state, rst, pwr_state);
  2692. switch (state) {
  2693. case INIT:
  2694. if (rst)
  2695. goto skip_reset_init;
  2696. rst = devm_reset_control_get(&res->pdev->dev,
  2697. rst_set->reset_tbl[reset_index].name);
  2698. if (IS_ERR(rst))
  2699. rc = PTR_ERR(rst);
  2700. rst_set->reset_tbl[reset_index].rst = rst;
  2701. break;
  2702. case ASSERT:
  2703. if (!rst) {
  2704. rc = PTR_ERR(rst);
  2705. goto failed_to_reset;
  2706. }
  2707. if (pwr_state != CVP_POWER_IGNORED &&
  2708. pwr_state != rst_info.required_state)
  2709. break;
  2710. rc = reset_control_assert(rst);
  2711. break;
  2712. case DEASSERT:
  2713. if (!rst) {
  2714. rc = PTR_ERR(rst);
  2715. goto failed_to_reset;
  2716. }
  2717. if (pwr_state != CVP_POWER_IGNORED &&
  2718. pwr_state != rst_info.required_state)
  2719. break;
  2720. rc = reset_control_deassert(rst);
  2721. break;
  2722. default:
  2723. dprintk(CVP_ERR, "Invalid reset request\n");
  2724. if (rc)
  2725. goto failed_to_reset;
  2726. }
  2727. return 0;
  2728. skip_reset_init:
  2729. failed_to_reset:
  2730. return rc;
  2731. }
  2732. static int reset_ahb2axi_bridge(struct iris_hfi_device *device)
  2733. {
  2734. int rc, i;
  2735. enum power_state s;
  2736. if (!device) {
  2737. dprintk(CVP_ERR, "NULL device\n");
  2738. rc = -EINVAL;
  2739. goto failed_to_reset;
  2740. }
  2741. if (device->power_enabled)
  2742. s = CVP_POWER_ON;
  2743. else
  2744. s = CVP_POWER_OFF;
  2745. #ifdef CONFIG_EVA_WAIPIO
  2746. s = CVP_POWER_IGNORED;
  2747. #endif
  2748. for (i = 0; i < device->res->reset_set.count; i++) {
  2749. rc = __handle_reset_clk(device->res, i, ASSERT, s);
  2750. if (rc) {
  2751. dprintk(CVP_ERR,
  2752. "failed to assert reset clocks\n");
  2753. goto failed_to_reset;
  2754. }
  2755. }
  2756. /* wait for deassert */
  2757. usleep_range(1000, 1050);
  2758. for (i = 0; i < device->res->reset_set.count; i++) {
  2759. rc = __handle_reset_clk(device->res, i, DEASSERT, s);
  2760. if (rc) {
  2761. dprintk(CVP_ERR,
  2762. "failed to deassert reset clocks\n");
  2763. goto failed_to_reset;
  2764. }
  2765. }
  2766. return 0;
  2767. failed_to_reset:
  2768. return rc;
  2769. }
  2770. static void __deinit_bus(struct iris_hfi_device *device)
  2771. {
  2772. struct bus_info *bus = NULL;
  2773. if (!device)
  2774. return;
  2775. kfree(device->bus_vote.data);
  2776. device->bus_vote = CVP_DEFAULT_BUS_VOTE;
  2777. iris_hfi_for_each_bus_reverse(device, bus) {
  2778. dev_set_drvdata(bus->dev, NULL);
  2779. icc_put(bus->client);
  2780. bus->client = NULL;
  2781. }
  2782. }
  2783. static int __init_bus(struct iris_hfi_device *device)
  2784. {
  2785. struct bus_info *bus = NULL;
  2786. int rc = 0;
  2787. if (!device)
  2788. return -EINVAL;
  2789. iris_hfi_for_each_bus(device, bus) {
  2790. /*
  2791. * This is stupid, but there's no other easy way to ahold
  2792. * of struct bus_info in iris_hfi_devfreq_*()
  2793. */
  2794. WARN(dev_get_drvdata(bus->dev), "%s's drvdata already set\n",
  2795. dev_name(bus->dev));
  2796. dev_set_drvdata(bus->dev, device);
  2797. bus->client = icc_get(&device->res->pdev->dev,
  2798. bus->master, bus->slave);
  2799. if (IS_ERR_OR_NULL(bus->client)) {
  2800. rc = PTR_ERR(bus->client) ?: -EBADHANDLE;
  2801. dprintk(CVP_ERR, "Failed to register bus %s: %d\n",
  2802. bus->name, rc);
  2803. bus->client = NULL;
  2804. goto err_add_dev;
  2805. }
  2806. }
  2807. return 0;
  2808. err_add_dev:
  2809. __deinit_bus(device);
  2810. return rc;
  2811. }
  2812. static void __deinit_regulators(struct iris_hfi_device *device)
  2813. {
  2814. struct regulator_info *rinfo = NULL;
  2815. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  2816. if (rinfo->regulator) {
  2817. regulator_put(rinfo->regulator);
  2818. rinfo->regulator = NULL;
  2819. }
  2820. }
  2821. }
  2822. static int __init_regulators(struct iris_hfi_device *device)
  2823. {
  2824. int rc = 0;
  2825. struct regulator_info *rinfo = NULL;
  2826. iris_hfi_for_each_regulator(device, rinfo) {
  2827. rinfo->regulator = regulator_get(&device->res->pdev->dev,
  2828. rinfo->name);
  2829. if (IS_ERR_OR_NULL(rinfo->regulator)) {
  2830. rc = PTR_ERR(rinfo->regulator) ?: -EBADHANDLE;
  2831. dprintk(CVP_ERR, "Failed to get regulator: %s\n",
  2832. rinfo->name);
  2833. rinfo->regulator = NULL;
  2834. goto err_reg_get;
  2835. }
  2836. }
  2837. return 0;
  2838. err_reg_get:
  2839. __deinit_regulators(device);
  2840. return rc;
  2841. }
  2842. static void __deinit_subcaches(struct iris_hfi_device *device)
  2843. {
  2844. struct subcache_info *sinfo = NULL;
  2845. if (!device) {
  2846. dprintk(CVP_ERR, "deinit_subcaches: invalid device %pK\n",
  2847. device);
  2848. goto exit;
  2849. }
  2850. if (!is_sys_cache_present(device))
  2851. goto exit;
  2852. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  2853. if (sinfo->subcache) {
  2854. dprintk(CVP_CORE, "deinit_subcaches: %s\n",
  2855. sinfo->name);
  2856. llcc_slice_putd(sinfo->subcache);
  2857. sinfo->subcache = NULL;
  2858. }
  2859. }
  2860. exit:
  2861. return;
  2862. }
  2863. static int __init_subcaches(struct iris_hfi_device *device)
  2864. {
  2865. int rc = 0;
  2866. struct subcache_info *sinfo = NULL;
  2867. if (!device) {
  2868. dprintk(CVP_ERR, "init_subcaches: invalid device %pK\n",
  2869. device);
  2870. return -EINVAL;
  2871. }
  2872. if (!is_sys_cache_present(device))
  2873. return 0;
  2874. iris_hfi_for_each_subcache(device, sinfo) {
  2875. if (!strcmp("cvp", sinfo->name)) {
  2876. sinfo->subcache = llcc_slice_getd(LLCC_CVP);
  2877. } else if (!strcmp("cvpfw", sinfo->name)) {
  2878. sinfo->subcache = llcc_slice_getd(LLCC_CVPFW);
  2879. } else {
  2880. dprintk(CVP_ERR, "Invalid subcache name %s\n",
  2881. sinfo->name);
  2882. }
  2883. if (IS_ERR_OR_NULL(sinfo->subcache)) {
  2884. rc = PTR_ERR(sinfo->subcache) ?
  2885. PTR_ERR(sinfo->subcache) : -EBADHANDLE;
  2886. dprintk(CVP_ERR,
  2887. "init_subcaches: invalid subcache: %s rc %d\n",
  2888. sinfo->name, rc);
  2889. sinfo->subcache = NULL;
  2890. goto err_subcache_get;
  2891. }
  2892. dprintk(CVP_CORE, "init_subcaches: %s\n",
  2893. sinfo->name);
  2894. }
  2895. return 0;
  2896. err_subcache_get:
  2897. __deinit_subcaches(device);
  2898. return rc;
  2899. }
  2900. static int __init_resources(struct iris_hfi_device *device,
  2901. struct msm_cvp_platform_resources *res)
  2902. {
  2903. int i, rc = 0;
  2904. rc = __init_regulators(device);
  2905. if (rc) {
  2906. dprintk(CVP_ERR, "Failed to get all regulators\n");
  2907. return -ENODEV;
  2908. }
  2909. rc = msm_cvp_init_clocks(device);
  2910. if (rc) {
  2911. dprintk(CVP_ERR, "Failed to init clocks\n");
  2912. rc = -ENODEV;
  2913. goto err_init_clocks;
  2914. }
  2915. for (i = 0; i < device->res->reset_set.count; i++) {
  2916. rc = __handle_reset_clk(res, i, INIT, 0);
  2917. if (rc) {
  2918. dprintk(CVP_ERR, "Failed to init reset clocks\n");
  2919. rc = -ENODEV;
  2920. goto err_init_reset_clk;
  2921. }
  2922. }
  2923. rc = __init_bus(device);
  2924. if (rc) {
  2925. dprintk(CVP_ERR, "Failed to init bus: %d\n", rc);
  2926. goto err_init_bus;
  2927. }
  2928. rc = __init_subcaches(device);
  2929. if (rc)
  2930. dprintk(CVP_WARN, "Failed to init subcaches: %d\n", rc);
  2931. device->sys_init_capabilities =
  2932. kzalloc(sizeof(struct msm_cvp_capability)
  2933. * CVP_MAX_SESSIONS, GFP_KERNEL);
  2934. return rc;
  2935. err_init_reset_clk:
  2936. err_init_bus:
  2937. msm_cvp_deinit_clocks(device);
  2938. err_init_clocks:
  2939. __deinit_regulators(device);
  2940. return rc;
  2941. }
  2942. static void __deinit_resources(struct iris_hfi_device *device)
  2943. {
  2944. __deinit_subcaches(device);
  2945. __deinit_bus(device);
  2946. msm_cvp_deinit_clocks(device);
  2947. __deinit_regulators(device);
  2948. kfree(device->sys_init_capabilities);
  2949. device->sys_init_capabilities = NULL;
  2950. }
  2951. static int __disable_regulator_impl(struct regulator_info *rinfo,
  2952. struct iris_hfi_device *device)
  2953. {
  2954. int rc = 0;
  2955. dprintk(CVP_PWR, "Disabling regulator %s\n", rinfo->name);
  2956. /*
  2957. * This call is needed. Driver needs to acquire the control back
  2958. * from HW in order to disable the regualtor. Else the behavior
  2959. * is unknown.
  2960. */
  2961. rc = __acquire_regulator(rinfo, device);
  2962. if (rc) {
  2963. /*
  2964. * This is somewhat fatal, but nothing we can do
  2965. * about it. We can't disable the regulator w/o
  2966. * getting it back under s/w control
  2967. */
  2968. dprintk(CVP_WARN,
  2969. "Failed to acquire control on %s\n",
  2970. rinfo->name);
  2971. goto disable_regulator_failed;
  2972. }
  2973. rc = regulator_disable(rinfo->regulator);
  2974. if (rc) {
  2975. dprintk(CVP_WARN,
  2976. "Failed to disable %s: %d\n",
  2977. rinfo->name, rc);
  2978. goto disable_regulator_failed;
  2979. }
  2980. return 0;
  2981. disable_regulator_failed:
  2982. /* Bring attention to this issue */
  2983. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  2984. return rc;
  2985. }
  2986. static int __enable_hw_power_collapse(struct iris_hfi_device *device)
  2987. {
  2988. int rc = 0;
  2989. if (!msm_cvp_fw_low_power_mode) {
  2990. dprintk(CVP_PWR, "Not enabling hardware power collapse\n");
  2991. return 0;
  2992. }
  2993. rc = __hand_off_regulators(device);
  2994. if (rc)
  2995. dprintk(CVP_WARN,
  2996. "%s : Failed to enable HW power collapse %d\n",
  2997. __func__, rc);
  2998. return rc;
  2999. }
  3000. static int __enable_regulator(struct iris_hfi_device *device,
  3001. const char *name)
  3002. {
  3003. int rc = 0;
  3004. struct regulator_info *rinfo;
  3005. iris_hfi_for_each_regulator(device, rinfo) {
  3006. if (strcmp(rinfo->name, name))
  3007. continue;
  3008. rc = regulator_enable(rinfo->regulator);
  3009. if (rc) {
  3010. dprintk(CVP_ERR, "Failed to enable %s: %d\n",
  3011. rinfo->name, rc);
  3012. return rc;
  3013. }
  3014. if (!regulator_is_enabled(rinfo->regulator)) {
  3015. dprintk(CVP_ERR,"%s: regulator %s not enabled\n",
  3016. __func__, rinfo->name);
  3017. regulator_disable(rinfo->regulator);
  3018. return -EINVAL;
  3019. }
  3020. dprintk(CVP_PWR, "Enabled regulator %s\n", rinfo->name);
  3021. return 0;
  3022. }
  3023. dprintk(CVP_ERR, "regulator %s not found\n", name);
  3024. return -EINVAL;
  3025. }
  3026. static int __disable_regulator(struct iris_hfi_device *device,
  3027. const char *name)
  3028. {
  3029. struct regulator_info *rinfo;
  3030. iris_hfi_for_each_regulator_reverse(device, rinfo) {
  3031. if (strcmp(rinfo->name, name))
  3032. continue;
  3033. __disable_regulator_impl(rinfo, device);
  3034. dprintk(CVP_PWR, "%s Disabled regulator %s\n", __func__, name);
  3035. return 0;
  3036. }
  3037. dprintk(CVP_ERR, "%s regulator %s not found\n", __func__, name);
  3038. return -EINVAL;
  3039. }
  3040. static int __enable_subcaches(struct iris_hfi_device *device)
  3041. {
  3042. int rc = 0;
  3043. u32 c = 0;
  3044. struct subcache_info *sinfo;
  3045. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3046. return 0;
  3047. /* Activate subcaches */
  3048. iris_hfi_for_each_subcache(device, sinfo) {
  3049. rc = llcc_slice_activate(sinfo->subcache);
  3050. if (rc) {
  3051. dprintk(CVP_WARN, "Failed to activate %s: %d\n",
  3052. sinfo->name, rc);
  3053. msm_cvp_res_handle_fatal_hw_error(device->res, true);
  3054. goto err_activate_fail;
  3055. }
  3056. sinfo->isactive = true;
  3057. dprintk(CVP_CORE, "Activated subcache %s\n", sinfo->name);
  3058. c++;
  3059. }
  3060. dprintk(CVP_CORE, "Activated %d Subcaches to CVP\n", c);
  3061. return 0;
  3062. err_activate_fail:
  3063. __release_subcaches(device);
  3064. __disable_subcaches(device);
  3065. return 0;
  3066. }
  3067. static int __set_subcaches(struct iris_hfi_device *device)
  3068. {
  3069. int rc = 0;
  3070. u32 c = 0;
  3071. struct subcache_info *sinfo;
  3072. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  3073. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  3074. struct cvp_hfi_resource_subcache_type *sc_res;
  3075. struct cvp_resource_hdr rhdr;
  3076. if (device->res->sys_cache_res_set || msm_cvp_syscache_disable) {
  3077. dprintk(CVP_CORE, "Subcaches already set or disabled\n");
  3078. return 0;
  3079. }
  3080. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  3081. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  3082. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  3083. iris_hfi_for_each_subcache(device, sinfo) {
  3084. if (sinfo->isactive) {
  3085. sc_res[c].size = sinfo->subcache->slice_size;
  3086. sc_res[c].sc_id = sinfo->subcache->slice_id;
  3087. c++;
  3088. }
  3089. }
  3090. /* Set resource to CVP for activated subcaches */
  3091. if (c) {
  3092. dprintk(CVP_CORE, "Setting %d Subcaches\n", c);
  3093. rhdr.resource_handle = sc_res_info; /* cookie */
  3094. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  3095. sc_res_info->num_entries = c;
  3096. rc = __core_set_resource(device, &rhdr, (void *)sc_res_info);
  3097. if (rc) {
  3098. dprintk(CVP_WARN, "Failed to set subcaches %d\n", rc);
  3099. goto err_fail_set_subacaches;
  3100. }
  3101. iris_hfi_for_each_subcache(device, sinfo) {
  3102. if (sinfo->isactive)
  3103. sinfo->isset = true;
  3104. }
  3105. dprintk(CVP_CORE, "Set Subcaches done to CVP\n");
  3106. device->res->sys_cache_res_set = true;
  3107. }
  3108. return 0;
  3109. err_fail_set_subacaches:
  3110. __disable_subcaches(device);
  3111. return 0;
  3112. }
  3113. static int __release_subcaches(struct iris_hfi_device *device)
  3114. {
  3115. struct subcache_info *sinfo;
  3116. int rc = 0;
  3117. u32 c = 0;
  3118. u32 resource[CVP_MAX_SUBCACHE_SIZE];
  3119. struct cvp_hfi_resource_syscache_info_type *sc_res_info;
  3120. struct cvp_hfi_resource_subcache_type *sc_res;
  3121. struct cvp_resource_hdr rhdr;
  3122. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3123. return 0;
  3124. memset((void *)resource, 0x0, (sizeof(u32) * CVP_MAX_SUBCACHE_SIZE));
  3125. sc_res_info = (struct cvp_hfi_resource_syscache_info_type *)resource;
  3126. sc_res = &(sc_res_info->rg_subcache_entries[0]);
  3127. /* Release resource command to Iris */
  3128. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  3129. if (sinfo->isset) {
  3130. /* Update the entry */
  3131. sc_res[c].size = sinfo->subcache->slice_size;
  3132. sc_res[c].sc_id = sinfo->subcache->slice_id;
  3133. c++;
  3134. sinfo->isset = false;
  3135. }
  3136. }
  3137. if (c > 0) {
  3138. dprintk(CVP_CORE, "Releasing %d subcaches\n", c);
  3139. rhdr.resource_handle = sc_res_info; /* cookie */
  3140. rhdr.resource_id = CVP_RESOURCE_SYSCACHE;
  3141. rc = __core_release_resource(device, &rhdr);
  3142. if (rc)
  3143. dprintk(CVP_WARN,
  3144. "Failed to release %d subcaches\n", c);
  3145. }
  3146. device->res->sys_cache_res_set = false;
  3147. return 0;
  3148. }
  3149. static int __disable_subcaches(struct iris_hfi_device *device)
  3150. {
  3151. struct subcache_info *sinfo;
  3152. int rc = 0;
  3153. if (msm_cvp_syscache_disable || !is_sys_cache_present(device))
  3154. return 0;
  3155. /* De-activate subcaches */
  3156. iris_hfi_for_each_subcache_reverse(device, sinfo) {
  3157. if (sinfo->isactive) {
  3158. dprintk(CVP_CORE, "De-activate subcache %s\n",
  3159. sinfo->name);
  3160. rc = llcc_slice_deactivate(sinfo->subcache);
  3161. if (rc) {
  3162. dprintk(CVP_WARN,
  3163. "Failed to de-activate %s: %d\n",
  3164. sinfo->name, rc);
  3165. }
  3166. sinfo->isactive = false;
  3167. }
  3168. }
  3169. return 0;
  3170. }
  3171. static void interrupt_init_iris2(struct iris_hfi_device *device)
  3172. {
  3173. u32 mask_val = 0;
  3174. /* All interrupts should be disabled initially 0x1F6 : Reset value */
  3175. mask_val = __read_register(device, CVP_WRAPPER_INTR_MASK);
  3176. /* Write 0 to unmask CPU and WD interrupts */
  3177. mask_val &= ~(CVP_FATAL_INTR_BMSK | CVP_WRAPPER_INTR_MASK_A2HCPU_BMSK);
  3178. __write_register(device, CVP_WRAPPER_INTR_MASK, mask_val);
  3179. dprintk(CVP_REG, "Init irq: reg: %x, mask value %x\n",
  3180. CVP_WRAPPER_INTR_MASK, mask_val);
  3181. }
  3182. static void setup_dsp_uc_memmap_vpu5(struct iris_hfi_device *device)
  3183. {
  3184. /* initialize DSP QTBL & UCREGION with CPU queues */
  3185. __write_register(device, HFI_DSP_QTBL_ADDR,
  3186. (u32)device->dsp_iface_q_table.align_device_addr);
  3187. __write_register(device, HFI_DSP_UC_REGION_ADDR,
  3188. (u32)device->dsp_iface_q_table.align_device_addr);
  3189. __write_register(device, HFI_DSP_UC_REGION_SIZE,
  3190. device->dsp_iface_q_table.mem_data.size);
  3191. }
  3192. static void clock_config_on_enable_vpu5(struct iris_hfi_device *device)
  3193. {
  3194. __write_register(device, CVP_WRAPPER_CPU_CLOCK_CONFIG, 0);
  3195. }
  3196. static int __set_ubwc_config(struct iris_hfi_device *device)
  3197. {
  3198. u8 packet[CVP_IFACEQ_VAR_SMALL_PKT_SIZE];
  3199. int rc = 0;
  3200. struct cvp_hfi_cmd_sys_set_property_packet *pkt =
  3201. (struct cvp_hfi_cmd_sys_set_property_packet *) &packet;
  3202. if (!device->res->ubwc_config)
  3203. return 0;
  3204. rc = call_hfi_pkt_op(device, sys_ubwc_config, pkt,
  3205. device->res->ubwc_config);
  3206. if (rc) {
  3207. dprintk(CVP_WARN,
  3208. "ubwc config setting to FW failed\n");
  3209. rc = -ENOTEMPTY;
  3210. goto fail_to_set_ubwc_config;
  3211. }
  3212. if (__iface_cmdq_write(device, pkt)) {
  3213. rc = -ENOTEMPTY;
  3214. goto fail_to_set_ubwc_config;
  3215. }
  3216. fail_to_set_ubwc_config:
  3217. return rc;
  3218. }
  3219. static int __power_on_controller(struct iris_hfi_device *device)
  3220. {
  3221. int rc = 0;
  3222. rc = __enable_regulator(device, "cvp");
  3223. if (rc) {
  3224. dprintk(CVP_ERR, "Failed to enable ctrler: %d\n", rc);
  3225. return rc;
  3226. }
  3227. rc = call_iris_op(device, reset_ahb2axi_bridge, device);
  3228. if (rc) {
  3229. dprintk(CVP_ERR, "Failed to reset ahb2axi: %d\n", rc);
  3230. goto fail_reset_clks;
  3231. }
  3232. rc = msm_cvp_prepare_enable_clk(device, "gcc_video_axi1");
  3233. if (rc) {
  3234. dprintk(CVP_ERR, "Failed to enable axi1 clk: %d\n", rc);
  3235. goto fail_reset_clks;
  3236. }
  3237. rc = msm_cvp_prepare_enable_clk(device, "cvp_clk");
  3238. if (rc) {
  3239. dprintk(CVP_ERR, "Failed to enable cvp_clk: %d\n", rc);
  3240. goto fail_enable_clk;
  3241. }
  3242. dprintk(CVP_PWR, "EVA controller powered on\n");
  3243. return 0;
  3244. fail_enable_clk:
  3245. msm_cvp_disable_unprepare_clk(device, "gcc_video_axi1");
  3246. fail_reset_clks:
  3247. __disable_regulator(device, "cvp");
  3248. return rc;
  3249. }
  3250. static int __power_on_core(struct iris_hfi_device *device)
  3251. {
  3252. int rc = 0;
  3253. rc = __enable_regulator(device, "cvp-core");
  3254. if (rc) {
  3255. dprintk(CVP_ERR, "Failed to enable core: %d\n", rc);
  3256. return rc;
  3257. }
  3258. rc = msm_cvp_prepare_enable_clk(device, "video_cc_mvs1_clk_src");
  3259. if (rc) {
  3260. dprintk(CVP_ERR, "Failed to enable video_cc_mvs1_clk_src:%d\n",
  3261. rc);
  3262. __disable_regulator(device, "cvp-core");
  3263. return rc;
  3264. }
  3265. rc = msm_cvp_prepare_enable_clk(device, "core_clk");
  3266. if (rc) {
  3267. dprintk(CVP_ERR, "Failed to enable core_clk: %d\n", rc);
  3268. __disable_regulator(device, "cvp-core");
  3269. return rc;
  3270. }
  3271. #ifdef CONFIG_EVA_PINEAPPLE
  3272. __write_register(device, CVP_AON_WRAPPER_CVP_NOC_ARCG_CONTROL, 0);
  3273. __write_register(device, CVP_NOC_RCGCONTROLLER_HYSTERESIS_LOW, 0x2f);
  3274. __write_register(device, CVP_NOC_RCG_VNOC_NOC_CLK_FORCECLOCKON_LOW, 1);
  3275. __write_register(device, CVP_NOC_RCGCONTROLLER_MAINCTL_LOW, 1);
  3276. usleep_range(50, 100);
  3277. __write_register(device, CVP_NOC_RCG_VNOC_NOC_CLK_FORCECLOCKON_LOW, 0);
  3278. #endif
  3279. dprintk(CVP_PWR, "EVA core powered on\n");
  3280. return 0;
  3281. }
  3282. static int __iris_power_on(struct iris_hfi_device *device)
  3283. {
  3284. int rc = 0;
  3285. if (device->power_enabled)
  3286. return 0;
  3287. /* Vote for all hardware resources */
  3288. rc = __vote_buses(device, device->bus_vote.data,
  3289. device->bus_vote.data_count);
  3290. if (rc) {
  3291. dprintk(CVP_ERR, "Failed to vote buses, err: %d\n", rc);
  3292. goto fail_vote_buses;
  3293. }
  3294. rc = __power_on_controller(device);
  3295. if (rc)
  3296. goto fail_enable_controller;
  3297. rc = __power_on_core(device);
  3298. if (rc)
  3299. goto fail_enable_core;
  3300. rc = msm_cvp_scale_clocks(device);
  3301. if (rc) {
  3302. dprintk(CVP_WARN,
  3303. "Failed to scale clocks, perf may regress\n");
  3304. rc = 0;
  3305. } else {
  3306. dprintk(CVP_PWR, "Done with scaling\n");
  3307. }
  3308. /*Do not access registers before this point!*/
  3309. device->power_enabled = true;
  3310. /*
  3311. * Re-program all of the registers that get reset as a result of
  3312. * regulator_disable() and _enable()
  3313. */
  3314. __set_registers(device);
  3315. dprintk(CVP_CORE, "Done with register set\n");
  3316. call_iris_op(device, interrupt_init, device);
  3317. dprintk(CVP_CORE, "Done with interrupt enabling\n");
  3318. device->intr_status = 0;
  3319. enable_irq(device->cvp_hal_data->irq);
  3320. __write_register(device,
  3321. CVP_WRAPPER_DEBUG_BRIDGE_LPI_CONTROL, 0x7);
  3322. pr_info_ratelimited(CVP_DBG_TAG "cvp (eva) powered on\n", "pwr");
  3323. return 0;
  3324. fail_enable_core:
  3325. __power_off_controller(device);
  3326. fail_enable_controller:
  3327. __unvote_buses(device);
  3328. fail_vote_buses:
  3329. device->power_enabled = false;
  3330. return rc;
  3331. }
  3332. static inline int __suspend(struct iris_hfi_device *device)
  3333. {
  3334. int rc = 0;
  3335. if (!device) {
  3336. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3337. return -EINVAL;
  3338. } else if (!device->power_enabled) {
  3339. dprintk(CVP_PWR, "Power already disabled\n");
  3340. return 0;
  3341. }
  3342. dprintk(CVP_PWR, "Entering suspend\n");
  3343. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3344. if (rc) {
  3345. dprintk(CVP_WARN, "Failed to suspend cvp core %d\n", rc);
  3346. goto err_tzbsp_suspend;
  3347. }
  3348. __disable_subcaches(device);
  3349. call_iris_op(device, power_off, device);
  3350. if (device->res->pm_qos.latency_us && device->res->pm_qos.pm_qos_hdls)
  3351. cvp_pm_qos_update(device, false);
  3352. return rc;
  3353. err_tzbsp_suspend:
  3354. return rc;
  3355. }
  3356. static void __print_sidebandmanager_regs(struct iris_hfi_device *device)
  3357. {
  3358. u32 sbm_ln0_low, axi_cbcr;
  3359. u32 main_sbm_ln0_low = 0xdeadbeef, main_sbm_ln0_high = 0xdeadbeef;
  3360. u32 main_sbm_ln1_high = 0xdeadbeef, cpu_cs_x2rpmh;
  3361. sbm_ln0_low =
  3362. __read_register(device, CVP_NOC_SBM_SENSELN0_LOW);
  3363. cpu_cs_x2rpmh = __read_register(device, CVP_CPU_CS_X2RPMh);
  3364. __write_register(device, CVP_CPU_CS_X2RPMh,
  3365. (cpu_cs_x2rpmh | CVP_CPU_CS_X2RPMh_SWOVERRIDE_BMSK));
  3366. usleep_range(500, 1000);
  3367. cpu_cs_x2rpmh = __read_register(device, CVP_CPU_CS_X2RPMh);
  3368. if (!(cpu_cs_x2rpmh & CVP_CPU_CS_X2RPMh_SWOVERRIDE_BMSK)) {
  3369. dprintk(CVP_WARN,
  3370. "failed set CVP_CPU_CS_X2RPMH mask %x\n",
  3371. cpu_cs_x2rpmh);
  3372. goto exit;
  3373. }
  3374. axi_cbcr = __read_gcc_register(device, CVP_GCC_VIDEO_AXI1_CBCR);
  3375. if (axi_cbcr & 0x80000000) {
  3376. dprintk(CVP_WARN, "failed to turn on AXI clock %x\n",
  3377. axi_cbcr);
  3378. goto exit;
  3379. }
  3380. main_sbm_ln0_low = __read_register(device,
  3381. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_LOW);
  3382. main_sbm_ln0_high = __read_register(device,
  3383. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_HIGH);
  3384. main_sbm_ln1_high = __read_register(device,
  3385. CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN1_HIGH);
  3386. exit:
  3387. cpu_cs_x2rpmh = cpu_cs_x2rpmh & (~CVP_CPU_CS_X2RPMh_SWOVERRIDE_BMSK);
  3388. __write_register(device, CVP_CPU_CS_X2RPMh, cpu_cs_x2rpmh);
  3389. dprintk(CVP_WARN, "Sidebandmanager regs %x %x %x %x %x\n",
  3390. sbm_ln0_low, main_sbm_ln0_low,
  3391. main_sbm_ln0_high, main_sbm_ln1_high,
  3392. cpu_cs_x2rpmh);
  3393. }
  3394. static int __power_off_controller(struct iris_hfi_device *device)
  3395. {
  3396. u32 lpi_status, reg_status = 0, count = 0, max_count = 1000;
  3397. u32 sbm_ln0_low;
  3398. int rc;
  3399. /* HPG 6.2.2 Step 1 */
  3400. __write_register(device, CVP_CPU_CS_X2RPMh, 0x3);
  3401. /* HPG 6.2.2 Step 2, noc to low power */
  3402. #ifndef CONFIG_EVA_PINEAPPLE
  3403. __write_register(device, CVP_AON_WRAPPER_CVP_NOC_LPI_CONTROL, 0x1);
  3404. while (!reg_status && count < max_count) {
  3405. lpi_status =
  3406. __read_register(device,
  3407. CVP_AON_WRAPPER_CVP_NOC_LPI_STATUS);
  3408. reg_status = lpi_status & BIT(0);
  3409. /* Wait for Core noc lpi status to be set */
  3410. usleep_range(50, 100);
  3411. count++;
  3412. }
  3413. dprintk(CVP_PWR,
  3414. "Core Noc: lpi_status %x noc_status %x (count %d)\n",
  3415. lpi_status, reg_status, count);
  3416. if (count == max_count) {
  3417. u32 pc_ready, wfi_status;
  3418. wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  3419. pc_ready = __read_register(device, CVP_CTRL_STATUS);
  3420. dprintk(CVP_WARN,
  3421. "Core NOC not in qaccept status %x %x %x %x\n",
  3422. reg_status, lpi_status, wfi_status, pc_ready);
  3423. __print_sidebandmanager_regs(device);
  3424. }
  3425. #endif
  3426. /* New addition to put CPU/Tensilica to low power */
  3427. reg_status = 0;
  3428. count = 0;
  3429. __write_register(device, CVP_WRAPPER_CPU_NOC_LPI_CONTROL, 0x1);
  3430. while (!reg_status && count < max_count) {
  3431. lpi_status =
  3432. __read_register(device,
  3433. CVP_WRAPPER_CPU_NOC_LPI_STATUS);
  3434. reg_status = lpi_status & BIT(0);
  3435. /* Wait for CPU noc lpi status to be set */
  3436. usleep_range(50, 100);
  3437. count++;
  3438. }
  3439. sbm_ln0_low = __read_register(device, CVP_NOC_SBM_SENSELN0_LOW);
  3440. dprintk(CVP_PWR,
  3441. "CPU Noc: lpi_status %x noc_status %x (count %d) 0x%x\n",
  3442. lpi_status, reg_status, count, sbm_ln0_low);
  3443. if (count == max_count) {
  3444. u32 pc_ready, wfi_status;
  3445. wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  3446. pc_ready = __read_register(device, CVP_CTRL_STATUS);
  3447. dprintk(CVP_WARN,
  3448. "CPU NOC not in qaccept status %x %x %x %x\n",
  3449. reg_status, lpi_status, wfi_status, pc_ready);
  3450. __print_sidebandmanager_regs(device);
  3451. }
  3452. /* HPG 6.2.2 Step 3, debug bridge to low power BYPASSED */
  3453. /* HPG 6.2.2 Step 4, debug bridge to lpi release */
  3454. __write_register(device,
  3455. CVP_WRAPPER_DEBUG_BRIDGE_LPI_CONTROL, 0x0);
  3456. lpi_status = 0x1;
  3457. count = 0;
  3458. while (lpi_status && count < max_count) {
  3459. lpi_status = __read_register(device,
  3460. CVP_WRAPPER_DEBUG_BRIDGE_LPI_STATUS);
  3461. usleep_range(50, 100);
  3462. count++;
  3463. }
  3464. dprintk(CVP_PWR,
  3465. "DBLP Release: lpi_status %d(count %d)\n",
  3466. lpi_status, count);
  3467. if (count == max_count) {
  3468. dprintk(CVP_WARN,
  3469. "DBLP Release: lpi_status %x\n", lpi_status);
  3470. }
  3471. /* PDXFIFO reset: addition for Kailua */
  3472. #ifdef CONFIG_EVA_KALAMA
  3473. __write_register(device, CVP_WRAPPER_AXI_CLOCK_CONFIG, 0x3);
  3474. __write_register(device, CVP_WRAPPER_QNS4PDXFIFO_RESET, 0x1);
  3475. __write_register(device, CVP_WRAPPER_QNS4PDXFIFO_RESET, 0x0);
  3476. __write_register(device, CVP_WRAPPER_AXI_CLOCK_CONFIG, 0x0);
  3477. #endif
  3478. /* HPG 6.2.2 Step 5 */
  3479. msm_cvp_disable_unprepare_clk(device, "cvp_clk");
  3480. /* HPG 6.2.2 Step 7 */
  3481. msm_cvp_disable_unprepare_clk(device, "gcc_video_axi1");
  3482. /* Added to avoid pending transaction after power off */
  3483. rc = call_iris_op(device, reset_ahb2axi_bridge, device);
  3484. if (rc)
  3485. dprintk(CVP_ERR, "Off: Failed to reset ahb2axi: %d\n", rc);
  3486. /* HPG 6.2.2 Step 6 */
  3487. __disable_regulator(device, "cvp");
  3488. return 0;
  3489. }
  3490. static int __power_off_core(struct iris_hfi_device *device)
  3491. {
  3492. u32 reg_status = 0, lpi_status, config, value = 0, count = 0;
  3493. u32 warn_flag = 0, max_count = 10;
  3494. value = __read_register(device, CVP_CC_MVS1_GDSCR);
  3495. if (!(value & 0x80000000)) {
  3496. /*
  3497. * Core has been powered off by f/w.
  3498. * Check NOC reset registers to ensure
  3499. * NO outstanding NoC transactions
  3500. */
  3501. value = __read_register(device, CVP_NOC_RESET_ACK);
  3502. if (value) {
  3503. dprintk(CVP_WARN,
  3504. "Core off with NOC RESET ACK non-zero %x\n",
  3505. value);
  3506. __print_sidebandmanager_regs(device);
  3507. }
  3508. __disable_regulator(device, "cvp-core");
  3509. msm_cvp_disable_unprepare_clk(device, "core_clk");
  3510. msm_cvp_disable_unprepare_clk(device, "video_cc_mvs1_clk_src");
  3511. return 0;
  3512. }
  3513. dprintk(CVP_PWR, "Driver controls Core power off now\n");
  3514. /*
  3515. * check to make sure core clock branch enabled else
  3516. * we cannot read core idle register
  3517. */
  3518. config = __read_register(device, CVP_WRAPPER_CORE_CLOCK_CONFIG);
  3519. if (config) {
  3520. dprintk(CVP_PWR,
  3521. "core clock config not enabled, enable it to access core\n");
  3522. __write_register(device, CVP_WRAPPER_CORE_CLOCK_CONFIG, 0);
  3523. }
  3524. /*
  3525. * add MNoC idle check before collapsing MVS1 per HPG update
  3526. * poll for NoC DMA idle -> HPG 6.2.1
  3527. *
  3528. */
  3529. do {
  3530. value = __read_register(device, CVP_SS_IDLE_STATUS);
  3531. if (value & 0x400000)
  3532. break;
  3533. else
  3534. usleep_range(1000, 2000);
  3535. count++;
  3536. } while (count < max_count);
  3537. if (count == max_count) {
  3538. dprintk(CVP_WARN, "Core fail to go idle %x\n", value);
  3539. warn_flag = 1;
  3540. }
  3541. #ifndef CONFIG_EVA_PINEAPPLE
  3542. /* Apply partial reset on MSF interface and wait for ACK */
  3543. __write_register(device, CVP_NOC_RESET_REQ, 0x7);
  3544. count = 0;
  3545. do {
  3546. value = __read_register(device, CVP_NOC_RESET_ACK);
  3547. if ((value & 0x7) == 0x7)
  3548. break;
  3549. else
  3550. usleep_range(100, 200);
  3551. count++;
  3552. } while (count < max_count);
  3553. if (count == max_count) {
  3554. dprintk(CVP_WARN, "Core NoC reset assert failed %x\n", value);
  3555. warn_flag = 1;
  3556. }
  3557. /* De-assert partial reset on MSF interface and wait for ACK */
  3558. __write_register(device, CVP_NOC_RESET_REQ, 0x0);
  3559. count = 0;
  3560. do {
  3561. value = __read_register(device, CVP_NOC_RESET_ACK);
  3562. if ((value & 0x1) == 0x0)
  3563. break;
  3564. else
  3565. usleep_range(100, 200);
  3566. count++;
  3567. } while (count < max_count);
  3568. if (count == max_count) {
  3569. dprintk(CVP_WARN, "Core NoC reset de-assert failed\n");
  3570. warn_flag = 1;
  3571. }
  3572. #else
  3573. count = 0;
  3574. max_count = 1000;
  3575. __write_register(device, CVP_AON_WRAPPER_CVP_NOC_LPI_CONTROL, 0x1);
  3576. while (!reg_status && count < max_count) {
  3577. lpi_status =
  3578. __read_register(device,
  3579. CVP_AON_WRAPPER_CVP_NOC_LPI_STATUS);
  3580. reg_status = lpi_status & BIT(0);
  3581. /* Wait for Core noc lpi status to be set */
  3582. usleep_range(50, 100);
  3583. count++;
  3584. }
  3585. dprintk(CVP_PWR,
  3586. "Core Noc: lpi_status %x noc_status %x (count %d)\n",
  3587. lpi_status, reg_status, count);
  3588. if (count == max_count) {
  3589. u32 pc_ready, wfi_status;
  3590. wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
  3591. pc_ready = __read_register(device, CVP_CTRL_STATUS);
  3592. dprintk(CVP_WARN,
  3593. "Core NOC not in qaccept status %x %x %x %x\n",
  3594. reg_status, lpi_status, wfi_status, pc_ready);
  3595. __print_sidebandmanager_regs(device);
  3596. }
  3597. #endif
  3598. if (warn_flag)
  3599. __print_sidebandmanager_regs(device);
  3600. /* Reset both sides of 2 ahb2ahb_bridges (TZ and non-TZ) */
  3601. __write_register(device, CVP_AHB_BRIDGE_SYNC_RESET, 0x3);
  3602. __write_register(device, CVP_AHB_BRIDGE_SYNC_RESET, 0x2);
  3603. __write_register(device, CVP_AHB_BRIDGE_SYNC_RESET, 0x0);
  3604. __write_register(device, CVP_WRAPPER_CORE_CLOCK_CONFIG, config);
  3605. __disable_regulator(device, "cvp-core");
  3606. msm_cvp_disable_unprepare_clk(device, "core_clk");
  3607. msm_cvp_disable_unprepare_clk(device, "video_cc_mvs1_clk_src");
  3608. return 0;
  3609. }
  3610. static void power_off_iris2(struct iris_hfi_device *device)
  3611. {
  3612. if (!device->power_enabled || !device->res->sw_power_collapsible)
  3613. return;
  3614. if (!(device->intr_status & CVP_WRAPPER_INTR_STATUS_A2HWD_BMSK))
  3615. disable_irq_nosync(device->cvp_hal_data->irq);
  3616. device->intr_status = 0;
  3617. __power_off_core(device);
  3618. __power_off_controller(device);
  3619. if (__unvote_buses(device))
  3620. dprintk(CVP_WARN, "Failed to unvote for buses\n");
  3621. /*Do not access registers after this point!*/
  3622. device->power_enabled = false;
  3623. pr_info(CVP_DBG_TAG "cvp (eva) power collapsed\n", "pwr");
  3624. }
  3625. static inline int __resume(struct iris_hfi_device *device)
  3626. {
  3627. int rc = 0;
  3628. u32 flags = 0, reg_gdsc, reg_cbcr;
  3629. struct msm_cvp_core *core;
  3630. if (!device) {
  3631. dprintk(CVP_ERR, "Invalid params: %pK\n", device);
  3632. return -EINVAL;
  3633. } else if (device->power_enabled) {
  3634. goto exit;
  3635. } else if (!__core_in_valid_state(device)) {
  3636. dprintk(CVP_PWR, "iris_hfi_device in deinit state.");
  3637. return -EINVAL;
  3638. }
  3639. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  3640. dprintk(CVP_PWR, "Resuming from power collapse\n");
  3641. rc = __iris_power_on(device);
  3642. if (rc) {
  3643. dprintk(CVP_ERR, "Failed to power on cvp\n");
  3644. goto err_iris_power_on;
  3645. }
  3646. reg_gdsc = __read_register(device, CVP_CC_MVS1C_GDSCR);
  3647. reg_cbcr = __read_register(device, CVP_CC_MVS1C_CBCR);
  3648. if (!(reg_gdsc & 0x80000000) || (reg_cbcr & 0x80000000))
  3649. dprintk(CVP_ERR, "CVP power on failed gdsc %x cbcr %x\n",
  3650. reg_gdsc, reg_cbcr);
  3651. /* Reboot the firmware */
  3652. rc = __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_RESUME);
  3653. if (rc) {
  3654. dprintk(CVP_ERR, "Failed to resume cvp core %d\n", rc);
  3655. goto err_set_cvp_state;
  3656. }
  3657. __setup_ucregion_memory_map(device);
  3658. /* Wait for boot completion */
  3659. rc = __boot_firmware(device);
  3660. if (rc) {
  3661. dprintk(CVP_ERR, "Failed to reset cvp core\n");
  3662. msm_cvp_trigger_ssr(core, SSR_ERR_FATAL);
  3663. goto err_reset_core;
  3664. }
  3665. /*
  3666. * Work around for H/W bug, need to reprogram these registers once
  3667. * firmware is out reset
  3668. */
  3669. __set_threshold_registers(device);
  3670. if (device->res->pm_qos.latency_us && device->res->pm_qos.pm_qos_hdls)
  3671. cvp_pm_qos_update(device, true);
  3672. __sys_set_debug(device, msm_cvp_fw_debug);
  3673. __enable_subcaches(device);
  3674. __set_subcaches(device);
  3675. __dsp_resume(device, flags);
  3676. dprintk(CVP_PWR, "Resumed from power collapse\n");
  3677. exit:
  3678. /* Don't reset skip_pc_count for SYS_PC_PREP cmd */
  3679. if (device->last_packet_type != HFI_CMD_SYS_PC_PREP)
  3680. device->skip_pc_count = 0;
  3681. return rc;
  3682. err_reset_core:
  3683. __tzbsp_set_cvp_state(TZ_SUBSYS_STATE_SUSPEND);
  3684. err_set_cvp_state:
  3685. call_iris_op(device, power_off, device);
  3686. err_iris_power_on:
  3687. dprintk(CVP_ERR, "Failed to resume from power collapse\n");
  3688. return rc;
  3689. }
  3690. static int __load_fw(struct iris_hfi_device *device)
  3691. {
  3692. int rc = 0;
  3693. /* Initialize resources */
  3694. rc = __init_resources(device, device->res);
  3695. if (rc) {
  3696. dprintk(CVP_ERR, "Failed to init resources: %d\n", rc);
  3697. goto fail_init_res;
  3698. }
  3699. rc = __initialize_packetization(device);
  3700. if (rc) {
  3701. dprintk(CVP_ERR, "Failed to initialize packetization\n");
  3702. goto fail_init_pkt;
  3703. }
  3704. rc = __iris_power_on(device);
  3705. if (rc) {
  3706. dprintk(CVP_ERR, "Failed to power on iris in in load_fw\n");
  3707. goto fail_iris_power_on;
  3708. }
  3709. if ((!device->res->use_non_secure_pil && !device->res->firmware_base)
  3710. || device->res->use_non_secure_pil) {
  3711. rc = load_cvp_fw_impl(device);
  3712. if (rc)
  3713. goto fail_load_fw;
  3714. }
  3715. return rc;
  3716. fail_load_fw:
  3717. call_iris_op(device, power_off, device);
  3718. fail_iris_power_on:
  3719. fail_init_pkt:
  3720. __deinit_resources(device);
  3721. fail_init_res:
  3722. return rc;
  3723. }
  3724. static void __unload_fw(struct iris_hfi_device *device)
  3725. {
  3726. if (!device->resources.fw.cookie)
  3727. return;
  3728. cancel_delayed_work(&iris_hfi_pm_work);
  3729. if (device->state != IRIS_STATE_DEINIT)
  3730. flush_workqueue(device->iris_pm_workq);
  3731. unload_cvp_fw_impl(device);
  3732. __interface_queues_release(device);
  3733. call_iris_op(device, power_off, device);
  3734. __deinit_resources(device);
  3735. dprintk(CVP_WARN, "Firmware unloaded\n");
  3736. }
  3737. static int iris_hfi_get_fw_info(void *dev, struct cvp_hal_fw_info *fw_info)
  3738. {
  3739. int i = 0;
  3740. struct iris_hfi_device *device = dev;
  3741. if (!device || !fw_info) {
  3742. dprintk(CVP_ERR,
  3743. "%s Invalid parameter: device = %pK fw_info = %pK\n",
  3744. __func__, device, fw_info);
  3745. return -EINVAL;
  3746. }
  3747. mutex_lock(&device->lock);
  3748. while (cvp_driver->fw_version[i++] != 'V' && i < CVP_VERSION_LENGTH)
  3749. ;
  3750. if (i == CVP_VERSION_LENGTH - 1) {
  3751. dprintk(CVP_WARN, "Iris version string is not proper\n");
  3752. fw_info->version[0] = '\0';
  3753. goto fail_version_string;
  3754. }
  3755. memcpy(&fw_info->version[0], &cvp_driver->fw_version[0],
  3756. CVP_VERSION_LENGTH);
  3757. fw_info->version[CVP_VERSION_LENGTH - 1] = '\0';
  3758. fail_version_string:
  3759. dprintk(CVP_CORE, "F/W version retrieved : %s\n", fw_info->version);
  3760. fw_info->base_addr = device->cvp_hal_data->firmware_base;
  3761. fw_info->register_base = device->res->register_base;
  3762. fw_info->register_size = device->cvp_hal_data->register_size;
  3763. fw_info->irq = device->cvp_hal_data->irq;
  3764. mutex_unlock(&device->lock);
  3765. return 0;
  3766. }
  3767. static int iris_hfi_get_core_capabilities(void *dev)
  3768. {
  3769. dprintk(CVP_CORE, "%s not supported yet!\n", __func__);
  3770. return 0;
  3771. }
  3772. static const char * const mid_names[16] = {
  3773. "CVP_FW",
  3774. "ARP_DATA",
  3775. "CVP_OD_NON_PIXEL",
  3776. "CVP_OD_ORIG_PIXEL",
  3777. "CVP_OD_WR_PIXEL",
  3778. "CVP_MPU_ORIG_PIXEL",
  3779. "CVP_MPU_REF_PIXEL",
  3780. "CVP_MPU_NON_PIXEL",
  3781. "CVP_MPU_DFS",
  3782. "CVP_FDU_NON_PIXEL",
  3783. "CVP_FDU_PIXEL",
  3784. "CVP_ICA_PIXEL",
  3785. "Invalid",
  3786. "Invalid",
  3787. "Invalid",
  3788. "Invalid"
  3789. };
  3790. static void __print_reg_details(u32 val)
  3791. {
  3792. u32 mid, sid;
  3793. mid = (val >> 5) & 0xF;
  3794. sid = (val >> 2) & 0x7;
  3795. dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_LOW: %#x\n", val);
  3796. dprintk(CVP_ERR, "Sub-client:%s, SID: %d\n", mid_names[mid], sid);
  3797. }
  3798. static void __err_log(bool logging, u32 *data, const char *name, u32 val)
  3799. {
  3800. if (logging)
  3801. *data = val;
  3802. dprintk(CVP_ERR, "%s: %#x\n", name, val);
  3803. }
  3804. static void __noc_error_info_iris2(struct iris_hfi_device *device)
  3805. {
  3806. struct msm_cvp_core *core;
  3807. struct cvp_noc_log *noc_log;
  3808. u32 val = 0, regi, i;
  3809. bool log_required = false;
  3810. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  3811. if (!core->ssr_count && core->resources.max_ssr_allowed > 1)
  3812. log_required = true;
  3813. noc_log = &core->log.noc_log;
  3814. if (noc_log->used) {
  3815. dprintk(CVP_WARN, "Data already in NoC log, skip logging\n");
  3816. return;
  3817. }
  3818. noc_log->used = 1;
  3819. val = __read_register(device, CVP_NOC_ERR_SWID_LOW_OFFS);
  3820. __err_log(log_required, &noc_log->err_ctrl_swid_low,
  3821. "CVP_NOC_ERL_MAIN_SWID_LOW", val);
  3822. val = __read_register(device, CVP_NOC_ERR_SWID_HIGH_OFFS);
  3823. __err_log(log_required, &noc_log->err_ctrl_swid_high,
  3824. "CVP_NOC_ERL_MAIN_SWID_HIGH", val);
  3825. val = __read_register(device, CVP_NOC_ERR_MAINCTL_LOW_OFFS);
  3826. __err_log(log_required, &noc_log->err_ctrl_mainctl_low,
  3827. "CVP_NOC_ERL_MAIN_MAINCTL_LOW", val);
  3828. val = __read_register(device, CVP_NOC_ERR_ERRVLD_LOW_OFFS);
  3829. __err_log(log_required, &noc_log->err_ctrl_errvld_low,
  3830. "CVP_NOC_ERL_MAIN_ERRVLD_LOW", val);
  3831. val = __read_register(device, CVP_NOC_ERR_ERRCLR_LOW_OFFS);
  3832. __err_log(log_required, &noc_log->err_ctrl_errclr_low,
  3833. "CVP_NOC_ERL_MAIN_ERRCLR_LOW", val);
  3834. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_LOW_OFFS);
  3835. __err_log(log_required, &noc_log->err_ctrl_errlog0_low,
  3836. "CVP_NOC_ERL_MAIN_ERRLOG0_LOW", val);
  3837. val = __read_register(device, CVP_NOC_ERR_ERRLOG0_HIGH_OFFS);
  3838. __err_log(log_required, &noc_log->err_ctrl_errlog0_high,
  3839. "CVP_NOC_ERL_MAIN_ERRLOG0_HIGH", val);
  3840. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_LOW_OFFS);
  3841. __err_log(log_required, &noc_log->err_ctrl_errlog1_low,
  3842. "CVP_NOC_ERL_MAIN_ERRLOG1_LOW", val);
  3843. val = __read_register(device, CVP_NOC_ERR_ERRLOG1_HIGH_OFFS);
  3844. __err_log(log_required, &noc_log->err_ctrl_errlog1_high,
  3845. "CVP_NOC_ERL_MAIN_ERRLOG1_HIGH", val);
  3846. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_LOW_OFFS);
  3847. __err_log(log_required, &noc_log->err_ctrl_errlog2_low,
  3848. "CVP_NOC_ERL_MAIN_ERRLOG2_LOW", val);
  3849. val = __read_register(device, CVP_NOC_ERR_ERRLOG2_HIGH_OFFS);
  3850. __err_log(log_required, &noc_log->err_ctrl_errlog2_high,
  3851. "CVP_NOC_ERL_MAIN_ERRLOG2_HIGH", val);
  3852. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_LOW_OFFS);
  3853. __err_log(log_required, &noc_log->err_ctrl_errlog3_low,
  3854. "CVP_NOC_ERL_MAIN_ERRLOG3_LOW", val);
  3855. val = __read_register(device, CVP_NOC_ERR_ERRLOG3_HIGH_OFFS);
  3856. __err_log(log_required, &noc_log->err_ctrl_errlog3_high,
  3857. "CVP_NOC_ERL_MAIN_ERRLOG3_HIGH", val);
  3858. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_LOW_OFFS);
  3859. __err_log(log_required, &noc_log->err_core_swid_low,
  3860. "CVP_NOC__CORE_ERL_MAIN_SWID_LOW", val);
  3861. val = __read_register(device, CVP_NOC_CORE_ERR_SWID_HIGH_OFFS);
  3862. __err_log(log_required, &noc_log->err_core_swid_high,
  3863. "CVP_NOC_CORE_ERL_MAIN_SWID_HIGH", val);
  3864. val = __read_register(device, CVP_NOC_CORE_ERR_MAINCTL_LOW_OFFS);
  3865. __err_log(log_required, &noc_log->err_core_mainctl_low,
  3866. "CVP_NOC_CORE_ERL_MAIN_MAINCTL_LOW", val);
  3867. val = __read_register(device, CVP_NOC_CORE_ERR_ERRVLD_LOW_OFFS);
  3868. __err_log(log_required, &noc_log->err_core_errvld_low,
  3869. "CVP_NOC_CORE_ERL_MAIN_ERRVLD_LOW", val);
  3870. val = __read_register(device, CVP_NOC_CORE_ERR_ERRCLR_LOW_OFFS);
  3871. __err_log(log_required, &noc_log->err_core_errclr_low,
  3872. "CVP_NOC_CORE_ERL_MAIN_ERRCLR_LOW", val);
  3873. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_LOW_OFFS);
  3874. __err_log(log_required, &noc_log->err_core_errlog0_low,
  3875. "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_LOW", val);
  3876. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_HIGH_OFFS);
  3877. __err_log(log_required, &noc_log->err_core_errlog0_high,
  3878. "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_HIGH", val);
  3879. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_LOW_OFFS);
  3880. __err_log(log_required, &noc_log->err_core_errlog1_low,
  3881. "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_LOW", val);
  3882. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_HIGH_OFFS);
  3883. __err_log(log_required, &noc_log->err_core_errlog1_high,
  3884. "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_HIGH", val);
  3885. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_LOW_OFFS);
  3886. __err_log(log_required, &noc_log->err_core_errlog2_low,
  3887. "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_LOW", val);
  3888. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_HIGH_OFFS);
  3889. __err_log(log_required, &noc_log->err_core_errlog2_high,
  3890. "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_HIGH", val);
  3891. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_LOW_OFFS);
  3892. __err_log(log_required, &noc_log->err_core_errlog3_low,
  3893. "CORE ERRLOG3_LOW, below details", val);
  3894. __print_reg_details(val);
  3895. val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_HIGH_OFFS);
  3896. __err_log(log_required, &noc_log->err_core_errlog3_high,
  3897. "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_HIGH", val);
  3898. #define CVP_SS_CLK_HALT 0x8
  3899. #define CVP_SS_CLK_EN 0xC
  3900. #define CVP_SS_ARP_TEST_BUS_CONTROL 0x700
  3901. #define CVP_SS_ARP_TEST_BUS_REGISTER 0x704
  3902. #define CVP_DMA_TEST_BUS_CONTROL 0x66A0
  3903. #define CVP_DMA_TEST_BUS_REGISTER 0x66A4
  3904. #define CVP_VPU_WRAPPER_CORE_CONFIG 0xB0088
  3905. __write_register(device, CVP_SS_CLK_HALT, 0);
  3906. __write_register(device, CVP_SS_CLK_EN, 0x3f);
  3907. __write_register(device, CVP_VPU_WRAPPER_CORE_CONFIG, 0);
  3908. for (i = 0; i < 15; i++) {
  3909. regi = 0xC0000000 + i;
  3910. __write_register(device, CVP_SS_ARP_TEST_BUS_CONTROL, regi);
  3911. val = __read_register(device, CVP_SS_ARP_TEST_BUS_REGISTER);
  3912. noc_log->arp_test_bus[i] = val;
  3913. }
  3914. for (i = 0; i < 512; i++) {
  3915. regi = 0x40000000 + i;
  3916. __write_register(device, CVP_DMA_TEST_BUS_CONTROL, regi);
  3917. val = __read_register(device, CVP_DMA_TEST_BUS_REGISTER);
  3918. noc_log->dma_test_bus[i] = val;
  3919. }
  3920. }
  3921. static int iris_hfi_noc_error_info(void *dev)
  3922. {
  3923. struct iris_hfi_device *device;
  3924. if (!dev) {
  3925. dprintk(CVP_ERR, "%s: null device\n", __func__);
  3926. return -EINVAL;
  3927. }
  3928. device = dev;
  3929. mutex_lock(&device->lock);
  3930. dprintk(CVP_ERR, "%s: non error information\n", __func__);
  3931. call_iris_op(device, noc_error_info, device);
  3932. mutex_unlock(&device->lock);
  3933. return 0;
  3934. }
  3935. static int __initialize_packetization(struct iris_hfi_device *device)
  3936. {
  3937. int rc = 0;
  3938. if (!device || !device->res) {
  3939. dprintk(CVP_ERR, "%s - invalid param\n", __func__);
  3940. return -EINVAL;
  3941. }
  3942. device->packetization_type = HFI_PACKETIZATION_4XX;
  3943. device->pkt_ops = cvp_hfi_get_pkt_ops_handle(
  3944. device->packetization_type);
  3945. if (!device->pkt_ops) {
  3946. rc = -EINVAL;
  3947. dprintk(CVP_ERR, "Failed to get pkt_ops handle\n");
  3948. }
  3949. return rc;
  3950. }
  3951. void __init_cvp_ops(struct iris_hfi_device *device)
  3952. {
  3953. device->vpu_ops = &iris2_ops;
  3954. }
  3955. static struct iris_hfi_device *__add_device(u32 device_id,
  3956. struct msm_cvp_platform_resources *res,
  3957. hfi_cmd_response_callback callback)
  3958. {
  3959. struct iris_hfi_device *hdevice = NULL;
  3960. int rc = 0;
  3961. if (!res || !callback) {
  3962. dprintk(CVP_ERR, "Invalid Parameters\n");
  3963. return NULL;
  3964. }
  3965. dprintk(CVP_INFO, "%s: device_id: %d\n", __func__, device_id);
  3966. hdevice = kzalloc(sizeof(*hdevice), GFP_KERNEL);
  3967. if (!hdevice) {
  3968. dprintk(CVP_ERR, "failed to allocate new device\n");
  3969. goto exit;
  3970. }
  3971. hdevice->response_pkt = kmalloc_array(cvp_max_packets,
  3972. sizeof(*hdevice->response_pkt), GFP_KERNEL);
  3973. if (!hdevice->response_pkt) {
  3974. dprintk(CVP_ERR, "failed to allocate response_pkt\n");
  3975. goto err_cleanup;
  3976. }
  3977. hdevice->raw_packet =
  3978. kzalloc(CVP_IFACEQ_VAR_HUGE_PKT_SIZE, GFP_KERNEL);
  3979. if (!hdevice->raw_packet) {
  3980. dprintk(CVP_ERR, "failed to allocate raw packet\n");
  3981. goto err_cleanup;
  3982. }
  3983. rc = vm_manager.vm_ops->vm_init_reg_and_irq(hdevice, res);
  3984. if (rc)
  3985. goto err_cleanup;
  3986. hdevice->res = res;
  3987. hdevice->device_id = device_id;
  3988. hdevice->callback = callback;
  3989. __init_cvp_ops(hdevice);
  3990. hdevice->cvp_workq = create_singlethread_workqueue(
  3991. "msm_cvp_workerq_iris");
  3992. if (!hdevice->cvp_workq) {
  3993. dprintk(CVP_ERR, ": create cvp workq failed\n");
  3994. goto err_cleanup;
  3995. }
  3996. hdevice->iris_pm_workq = create_singlethread_workqueue(
  3997. "pm_workerq_iris");
  3998. if (!hdevice->iris_pm_workq) {
  3999. dprintk(CVP_ERR, ": create pm workq failed\n");
  4000. goto err_cleanup;
  4001. }
  4002. mutex_init(&hdevice->lock);
  4003. INIT_LIST_HEAD(&hdevice->sess_head);
  4004. return hdevice;
  4005. err_cleanup:
  4006. if (hdevice->iris_pm_workq)
  4007. destroy_workqueue(hdevice->iris_pm_workq);
  4008. if (hdevice->cvp_workq)
  4009. destroy_workqueue(hdevice->cvp_workq);
  4010. kfree(hdevice->response_pkt);
  4011. kfree(hdevice->raw_packet);
  4012. kfree(hdevice);
  4013. exit:
  4014. return NULL;
  4015. }
  4016. static struct iris_hfi_device *__get_device(u32 device_id,
  4017. struct msm_cvp_platform_resources *res,
  4018. hfi_cmd_response_callback callback)
  4019. {
  4020. if (!res || !callback) {
  4021. dprintk(CVP_ERR, "Invalid params: %pK %pK\n", res, callback);
  4022. return NULL;
  4023. }
  4024. return __add_device(device_id, res, callback);
  4025. }
  4026. void cvp_iris_hfi_delete_device(void *device)
  4027. {
  4028. struct msm_cvp_core *core;
  4029. struct iris_hfi_device *dev = NULL;
  4030. if (!device)
  4031. return;
  4032. core = list_first_entry(&cvp_driver->cores, struct msm_cvp_core, list);
  4033. if (core)
  4034. dev = core->device->hfi_device_data;
  4035. if (!dev)
  4036. return;
  4037. mutex_destroy(&dev->lock);
  4038. destroy_workqueue(dev->cvp_workq);
  4039. destroy_workqueue(dev->iris_pm_workq);
  4040. free_irq(dev->cvp_hal_data->irq, dev);
  4041. iounmap(dev->cvp_hal_data->register_base);
  4042. iounmap(dev->cvp_hal_data->gcc_reg_base);
  4043. kfree(dev->cvp_hal_data);
  4044. kfree(dev->response_pkt);
  4045. kfree(dev->raw_packet);
  4046. kfree(dev);
  4047. }
  4048. static int iris_hfi_validate_session(void *sess, const char *func)
  4049. {
  4050. struct cvp_hal_session *session = sess;
  4051. int rc = 0;
  4052. struct iris_hfi_device *device;
  4053. if (!session || !session->device) {
  4054. dprintk(CVP_ERR, " %s Invalid Params %pK\n", __func__, session);
  4055. return -EINVAL;
  4056. }
  4057. device = session->device;
  4058. mutex_lock(&device->lock);
  4059. if (!__is_session_valid(device, session, func))
  4060. rc = -ECONNRESET;
  4061. mutex_unlock(&device->lock);
  4062. return rc;
  4063. }
  4064. static void iris_init_hfi_callbacks(struct cvp_hfi_device *hdev)
  4065. {
  4066. hdev->core_init = iris_hfi_core_init;
  4067. hdev->core_release = iris_hfi_core_release;
  4068. hdev->core_trigger_ssr = iris_hfi_core_trigger_ssr;
  4069. hdev->session_init = iris_hfi_session_init;
  4070. hdev->session_end = iris_hfi_session_end;
  4071. hdev->session_abort = iris_hfi_session_abort;
  4072. hdev->session_clean = iris_hfi_session_clean;
  4073. hdev->session_set_buffers = iris_hfi_session_set_buffers;
  4074. hdev->session_release_buffers = iris_hfi_session_release_buffers;
  4075. hdev->session_send = iris_hfi_session_send;
  4076. hdev->session_flush = iris_hfi_session_flush;
  4077. hdev->scale_clocks = iris_hfi_scale_clocks;
  4078. hdev->vote_bus = iris_hfi_vote_buses;
  4079. hdev->get_fw_info = iris_hfi_get_fw_info;
  4080. hdev->get_core_capabilities = iris_hfi_get_core_capabilities;
  4081. hdev->suspend = iris_hfi_suspend;
  4082. hdev->resume = iris_hfi_resume;
  4083. hdev->flush_debug_queue = iris_hfi_flush_debug_queue;
  4084. hdev->noc_error_info = iris_hfi_noc_error_info;
  4085. hdev->validate_session = iris_hfi_validate_session;
  4086. hdev->pm_qos_update = iris_pm_qos_update;
  4087. hdev->debug_hook = iris_debug_hook;
  4088. }
  4089. int cvp_iris_hfi_initialize(struct cvp_hfi_device *hdev, u32 device_id,
  4090. struct msm_cvp_platform_resources *res,
  4091. hfi_cmd_response_callback callback)
  4092. {
  4093. int rc = 0;
  4094. if (!hdev || !res || !callback) {
  4095. dprintk(CVP_ERR, "Invalid params: %pK %pK %pK\n",
  4096. hdev, res, callback);
  4097. rc = -EINVAL;
  4098. goto err_iris_hfi_init;
  4099. }
  4100. hdev->hfi_device_data = __get_device(device_id, res, callback);
  4101. if (IS_ERR_OR_NULL(hdev->hfi_device_data)) {
  4102. rc = PTR_ERR(hdev->hfi_device_data) ?: -EINVAL;
  4103. goto err_iris_hfi_init;
  4104. }
  4105. iris_init_hfi_callbacks(hdev);
  4106. err_iris_hfi_init:
  4107. return rc;
  4108. }