872c22a405
Added QCA5424 target header files based on E2R38 under QCA5424 to make fw-api project compatible to host. Update the CE base address for QCA5424. patch_3: updated the E3R42 hw header files Change-Id: I2c0d42d37faa2082199c8b1f97bac31f1d5ddea5 CRs-Fixed: 3822334
592 lines
29 KiB
C
592 lines
29 KiB
C
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/*
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* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
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* SPDX-License-Identifier: ISC
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*/
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#ifndef _PDG_RESPONSE_RATE_SETTING_H_
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#define _PDG_RESPONSE_RATE_SETTING_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#include "mlo_sta_id_details.h"
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#define NUM_OF_DWORDS_PDG_RESPONSE_RATE_SETTING 7
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struct pdg_response_rate_setting {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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uint32_t reserved_0a : 1,
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tx_antenna_sector_ctrl : 24,
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pkt_type : 4,
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smoothing : 1,
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ldpc : 1,
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stbc : 1;
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uint32_t alt_tx_pwr : 8,
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alt_min_tx_pwr : 8,
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alt_nss : 3,
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alt_tx_chain_mask : 8,
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alt_bw : 3,
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stf_ltf_3db_boost : 1,
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force_extra_symbol : 1;
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uint32_t alt_rate_mcs : 4,
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nss : 3,
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dpd_enable : 1,
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tx_pwr : 8,
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min_tx_pwr : 8,
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tx_chain_mask : 8;
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uint32_t reserved_3a : 8,
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sgi : 2,
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rate_mcs : 4,
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reserved_3b : 2,
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tx_pwr_1 : 8,
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alt_tx_pwr_1 : 8;
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uint32_t aggregation : 1,
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dot11ax_bss_color_id : 6,
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dot11ax_spatial_reuse : 4,
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dot11ax_cp_ltf_size : 2,
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dot11ax_dcm : 1,
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dot11ax_doppler_indication : 1,
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dot11ax_su_extended : 1,
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dot11ax_min_packet_extension : 2,
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dot11ax_pe_nss : 3,
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dot11ax_pe_content : 1,
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dot11ax_pe_ltf_size : 2,
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dot11ax_chain_csd_en : 1,
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dot11ax_pe_chain_csd_en : 1,
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dot11ax_dl_ul_flag : 1,
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reserved_4a : 5;
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uint32_t dot11ax_ext_ru_start_index : 4,
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dot11ax_ext_ru_size : 4,
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eht_duplicate_mode : 2,
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he_sigb_dcm : 1,
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he_sigb_0_mcs : 3,
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num_he_sigb_sym : 5,
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required_response_time_source : 1,
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reserved_5a : 6,
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u_sig_puncture_pattern_encoding : 6;
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struct mlo_sta_id_details mlo_sta_id_details_rx;
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uint16_t required_response_time : 12,
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dot11be_params_placeholder : 4;
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#else
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uint32_t stbc : 1,
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ldpc : 1,
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smoothing : 1,
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pkt_type : 4,
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tx_antenna_sector_ctrl : 24,
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reserved_0a : 1;
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uint32_t force_extra_symbol : 1,
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stf_ltf_3db_boost : 1,
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alt_bw : 3,
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alt_tx_chain_mask : 8,
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alt_nss : 3,
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alt_min_tx_pwr : 8,
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alt_tx_pwr : 8;
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uint32_t tx_chain_mask : 8,
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min_tx_pwr : 8,
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tx_pwr : 8,
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dpd_enable : 1,
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nss : 3,
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alt_rate_mcs : 4;
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uint32_t alt_tx_pwr_1 : 8,
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tx_pwr_1 : 8,
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reserved_3b : 2,
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rate_mcs : 4,
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sgi : 2,
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reserved_3a : 8;
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uint32_t reserved_4a : 5,
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dot11ax_dl_ul_flag : 1,
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dot11ax_pe_chain_csd_en : 1,
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dot11ax_chain_csd_en : 1,
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dot11ax_pe_ltf_size : 2,
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dot11ax_pe_content : 1,
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dot11ax_pe_nss : 3,
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dot11ax_min_packet_extension : 2,
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dot11ax_su_extended : 1,
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dot11ax_doppler_indication : 1,
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dot11ax_dcm : 1,
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dot11ax_cp_ltf_size : 2,
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dot11ax_spatial_reuse : 4,
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dot11ax_bss_color_id : 6,
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aggregation : 1;
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uint32_t u_sig_puncture_pattern_encoding : 6,
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reserved_5a : 6,
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required_response_time_source : 1,
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num_he_sigb_sym : 5,
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he_sigb_0_mcs : 3,
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he_sigb_dcm : 1,
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eht_duplicate_mode : 2,
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dot11ax_ext_ru_size : 4,
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dot11ax_ext_ru_start_index : 4;
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uint32_t dot11be_params_placeholder : 4,
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required_response_time : 12;
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struct mlo_sta_id_details mlo_sta_id_details_rx;
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#endif
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};
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_0A_OFFSET 0x00000000
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_0A_LSB 0
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_0A_MSB 0
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_0A_MASK 0x00000001
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#define PDG_RESPONSE_RATE_SETTING_TX_ANTENNA_SECTOR_CTRL_OFFSET 0x00000000
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#define PDG_RESPONSE_RATE_SETTING_TX_ANTENNA_SECTOR_CTRL_LSB 1
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#define PDG_RESPONSE_RATE_SETTING_TX_ANTENNA_SECTOR_CTRL_MSB 24
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#define PDG_RESPONSE_RATE_SETTING_TX_ANTENNA_SECTOR_CTRL_MASK 0x01fffffe
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#define PDG_RESPONSE_RATE_SETTING_PKT_TYPE_OFFSET 0x00000000
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#define PDG_RESPONSE_RATE_SETTING_PKT_TYPE_LSB 25
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#define PDG_RESPONSE_RATE_SETTING_PKT_TYPE_MSB 28
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#define PDG_RESPONSE_RATE_SETTING_PKT_TYPE_MASK 0x1e000000
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#define PDG_RESPONSE_RATE_SETTING_SMOOTHING_OFFSET 0x00000000
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#define PDG_RESPONSE_RATE_SETTING_SMOOTHING_LSB 29
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#define PDG_RESPONSE_RATE_SETTING_SMOOTHING_MSB 29
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#define PDG_RESPONSE_RATE_SETTING_SMOOTHING_MASK 0x20000000
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#define PDG_RESPONSE_RATE_SETTING_LDPC_OFFSET 0x00000000
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#define PDG_RESPONSE_RATE_SETTING_LDPC_LSB 30
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#define PDG_RESPONSE_RATE_SETTING_LDPC_MSB 30
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#define PDG_RESPONSE_RATE_SETTING_LDPC_MASK 0x40000000
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#define PDG_RESPONSE_RATE_SETTING_STBC_OFFSET 0x00000000
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#define PDG_RESPONSE_RATE_SETTING_STBC_LSB 31
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#define PDG_RESPONSE_RATE_SETTING_STBC_MSB 31
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#define PDG_RESPONSE_RATE_SETTING_STBC_MASK 0x80000000
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#define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_OFFSET 0x00000004
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#define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_LSB 0
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#define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_MSB 7
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#define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_MASK 0x000000ff
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#define PDG_RESPONSE_RATE_SETTING_ALT_MIN_TX_PWR_OFFSET 0x00000004
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#define PDG_RESPONSE_RATE_SETTING_ALT_MIN_TX_PWR_LSB 8
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#define PDG_RESPONSE_RATE_SETTING_ALT_MIN_TX_PWR_MSB 15
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#define PDG_RESPONSE_RATE_SETTING_ALT_MIN_TX_PWR_MASK 0x0000ff00
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#define PDG_RESPONSE_RATE_SETTING_ALT_NSS_OFFSET 0x00000004
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#define PDG_RESPONSE_RATE_SETTING_ALT_NSS_LSB 16
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#define PDG_RESPONSE_RATE_SETTING_ALT_NSS_MSB 18
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#define PDG_RESPONSE_RATE_SETTING_ALT_NSS_MASK 0x00070000
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#define PDG_RESPONSE_RATE_SETTING_ALT_TX_CHAIN_MASK_OFFSET 0x00000004
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#define PDG_RESPONSE_RATE_SETTING_ALT_TX_CHAIN_MASK_LSB 19
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#define PDG_RESPONSE_RATE_SETTING_ALT_TX_CHAIN_MASK_MSB 26
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#define PDG_RESPONSE_RATE_SETTING_ALT_TX_CHAIN_MASK_MASK 0x07f80000
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#define PDG_RESPONSE_RATE_SETTING_ALT_BW_OFFSET 0x00000004
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#define PDG_RESPONSE_RATE_SETTING_ALT_BW_LSB 27
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#define PDG_RESPONSE_RATE_SETTING_ALT_BW_MSB 29
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#define PDG_RESPONSE_RATE_SETTING_ALT_BW_MASK 0x38000000
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#define PDG_RESPONSE_RATE_SETTING_STF_LTF_3DB_BOOST_OFFSET 0x00000004
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#define PDG_RESPONSE_RATE_SETTING_STF_LTF_3DB_BOOST_LSB 30
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#define PDG_RESPONSE_RATE_SETTING_STF_LTF_3DB_BOOST_MSB 30
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#define PDG_RESPONSE_RATE_SETTING_STF_LTF_3DB_BOOST_MASK 0x40000000
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#define PDG_RESPONSE_RATE_SETTING_FORCE_EXTRA_SYMBOL_OFFSET 0x00000004
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#define PDG_RESPONSE_RATE_SETTING_FORCE_EXTRA_SYMBOL_LSB 31
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#define PDG_RESPONSE_RATE_SETTING_FORCE_EXTRA_SYMBOL_MSB 31
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#define PDG_RESPONSE_RATE_SETTING_FORCE_EXTRA_SYMBOL_MASK 0x80000000
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#define PDG_RESPONSE_RATE_SETTING_ALT_RATE_MCS_OFFSET 0x00000008
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#define PDG_RESPONSE_RATE_SETTING_ALT_RATE_MCS_LSB 0
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#define PDG_RESPONSE_RATE_SETTING_ALT_RATE_MCS_MSB 3
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#define PDG_RESPONSE_RATE_SETTING_ALT_RATE_MCS_MASK 0x0000000f
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#define PDG_RESPONSE_RATE_SETTING_NSS_OFFSET 0x00000008
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#define PDG_RESPONSE_RATE_SETTING_NSS_LSB 4
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#define PDG_RESPONSE_RATE_SETTING_NSS_MSB 6
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#define PDG_RESPONSE_RATE_SETTING_NSS_MASK 0x00000070
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#define PDG_RESPONSE_RATE_SETTING_DPD_ENABLE_OFFSET 0x00000008
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#define PDG_RESPONSE_RATE_SETTING_DPD_ENABLE_LSB 7
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#define PDG_RESPONSE_RATE_SETTING_DPD_ENABLE_MSB 7
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#define PDG_RESPONSE_RATE_SETTING_DPD_ENABLE_MASK 0x00000080
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#define PDG_RESPONSE_RATE_SETTING_TX_PWR_OFFSET 0x00000008
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#define PDG_RESPONSE_RATE_SETTING_TX_PWR_LSB 8
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#define PDG_RESPONSE_RATE_SETTING_TX_PWR_MSB 15
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#define PDG_RESPONSE_RATE_SETTING_TX_PWR_MASK 0x0000ff00
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#define PDG_RESPONSE_RATE_SETTING_MIN_TX_PWR_OFFSET 0x00000008
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#define PDG_RESPONSE_RATE_SETTING_MIN_TX_PWR_LSB 16
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#define PDG_RESPONSE_RATE_SETTING_MIN_TX_PWR_MSB 23
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#define PDG_RESPONSE_RATE_SETTING_MIN_TX_PWR_MASK 0x00ff0000
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#define PDG_RESPONSE_RATE_SETTING_TX_CHAIN_MASK_OFFSET 0x00000008
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#define PDG_RESPONSE_RATE_SETTING_TX_CHAIN_MASK_LSB 24
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#define PDG_RESPONSE_RATE_SETTING_TX_CHAIN_MASK_MSB 31
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#define PDG_RESPONSE_RATE_SETTING_TX_CHAIN_MASK_MASK 0xff000000
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_3A_OFFSET 0x0000000c
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_3A_LSB 0
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_3A_MSB 7
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_3A_MASK 0x000000ff
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#define PDG_RESPONSE_RATE_SETTING_SGI_OFFSET 0x0000000c
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#define PDG_RESPONSE_RATE_SETTING_SGI_LSB 8
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#define PDG_RESPONSE_RATE_SETTING_SGI_MSB 9
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#define PDG_RESPONSE_RATE_SETTING_SGI_MASK 0x00000300
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#define PDG_RESPONSE_RATE_SETTING_RATE_MCS_OFFSET 0x0000000c
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#define PDG_RESPONSE_RATE_SETTING_RATE_MCS_LSB 10
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#define PDG_RESPONSE_RATE_SETTING_RATE_MCS_MSB 13
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#define PDG_RESPONSE_RATE_SETTING_RATE_MCS_MASK 0x00003c00
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_3B_OFFSET 0x0000000c
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_3B_LSB 14
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_3B_MSB 15
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_3B_MASK 0x0000c000
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#define PDG_RESPONSE_RATE_SETTING_TX_PWR_1_OFFSET 0x0000000c
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#define PDG_RESPONSE_RATE_SETTING_TX_PWR_1_LSB 16
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#define PDG_RESPONSE_RATE_SETTING_TX_PWR_1_MSB 23
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#define PDG_RESPONSE_RATE_SETTING_TX_PWR_1_MASK 0x00ff0000
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#define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_1_OFFSET 0x0000000c
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#define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_1_LSB 24
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#define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_1_MSB 31
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#define PDG_RESPONSE_RATE_SETTING_ALT_TX_PWR_1_MASK 0xff000000
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#define PDG_RESPONSE_RATE_SETTING_AGGREGATION_OFFSET 0x00000010
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#define PDG_RESPONSE_RATE_SETTING_AGGREGATION_LSB 0
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#define PDG_RESPONSE_RATE_SETTING_AGGREGATION_MSB 0
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#define PDG_RESPONSE_RATE_SETTING_AGGREGATION_MASK 0x00000001
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_BSS_COLOR_ID_OFFSET 0x00000010
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_BSS_COLOR_ID_LSB 1
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_BSS_COLOR_ID_MSB 6
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_BSS_COLOR_ID_MASK 0x0000007e
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_SPATIAL_REUSE_OFFSET 0x00000010
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_SPATIAL_REUSE_LSB 7
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_SPATIAL_REUSE_MSB 10
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_SPATIAL_REUSE_MASK 0x00000780
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_CP_LTF_SIZE_OFFSET 0x00000010
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_CP_LTF_SIZE_LSB 11
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_CP_LTF_SIZE_MSB 12
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_CP_LTF_SIZE_MASK 0x00001800
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_DCM_OFFSET 0x00000010
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_DCM_LSB 13
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_DCM_MSB 13
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_DCM_MASK 0x00002000
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_DOPPLER_INDICATION_OFFSET 0x00000010
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_DOPPLER_INDICATION_LSB 14
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_DOPPLER_INDICATION_MSB 14
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_DOPPLER_INDICATION_MASK 0x00004000
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_SU_EXTENDED_OFFSET 0x00000010
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_SU_EXTENDED_LSB 15
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_SU_EXTENDED_MSB 15
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_SU_EXTENDED_MASK 0x00008000
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_MIN_PACKET_EXTENSION_OFFSET 0x00000010
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_MIN_PACKET_EXTENSION_LSB 16
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_MIN_PACKET_EXTENSION_MSB 17
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_MIN_PACKET_EXTENSION_MASK 0x00030000
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_NSS_OFFSET 0x00000010
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_NSS_LSB 18
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_NSS_MSB 20
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_NSS_MASK 0x001c0000
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CONTENT_OFFSET 0x00000010
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CONTENT_LSB 21
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CONTENT_MSB 21
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CONTENT_MASK 0x00200000
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_LTF_SIZE_OFFSET 0x00000010
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_LTF_SIZE_LSB 22
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_LTF_SIZE_MSB 23
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_LTF_SIZE_MASK 0x00c00000
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_CHAIN_CSD_EN_OFFSET 0x00000010
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_CHAIN_CSD_EN_LSB 24
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_CHAIN_CSD_EN_MSB 24
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_CHAIN_CSD_EN_MASK 0x01000000
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CHAIN_CSD_EN_OFFSET 0x00000010
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CHAIN_CSD_EN_LSB 25
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CHAIN_CSD_EN_MSB 25
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_PE_CHAIN_CSD_EN_MASK 0x02000000
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_DL_UL_FLAG_OFFSET 0x00000010
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_DL_UL_FLAG_LSB 26
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_DL_UL_FLAG_MSB 26
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_DL_UL_FLAG_MASK 0x04000000
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_4A_OFFSET 0x00000010
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_4A_LSB 27
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_4A_MSB 31
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_4A_MASK 0xf8000000
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_START_INDEX_OFFSET 0x00000014
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_START_INDEX_LSB 0
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_START_INDEX_MSB 3
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_START_INDEX_MASK 0x0000000f
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_SIZE_OFFSET 0x00000014
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_SIZE_LSB 4
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_SIZE_MSB 7
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#define PDG_RESPONSE_RATE_SETTING_DOT11AX_EXT_RU_SIZE_MASK 0x000000f0
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#define PDG_RESPONSE_RATE_SETTING_EHT_DUPLICATE_MODE_OFFSET 0x00000014
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#define PDG_RESPONSE_RATE_SETTING_EHT_DUPLICATE_MODE_LSB 8
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#define PDG_RESPONSE_RATE_SETTING_EHT_DUPLICATE_MODE_MSB 9
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#define PDG_RESPONSE_RATE_SETTING_EHT_DUPLICATE_MODE_MASK 0x00000300
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#define PDG_RESPONSE_RATE_SETTING_HE_SIGB_DCM_OFFSET 0x00000014
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#define PDG_RESPONSE_RATE_SETTING_HE_SIGB_DCM_LSB 10
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#define PDG_RESPONSE_RATE_SETTING_HE_SIGB_DCM_MSB 10
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#define PDG_RESPONSE_RATE_SETTING_HE_SIGB_DCM_MASK 0x00000400
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#define PDG_RESPONSE_RATE_SETTING_HE_SIGB_0_MCS_OFFSET 0x00000014
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#define PDG_RESPONSE_RATE_SETTING_HE_SIGB_0_MCS_LSB 11
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#define PDG_RESPONSE_RATE_SETTING_HE_SIGB_0_MCS_MSB 13
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#define PDG_RESPONSE_RATE_SETTING_HE_SIGB_0_MCS_MASK 0x00003800
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#define PDG_RESPONSE_RATE_SETTING_NUM_HE_SIGB_SYM_OFFSET 0x00000014
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#define PDG_RESPONSE_RATE_SETTING_NUM_HE_SIGB_SYM_LSB 14
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#define PDG_RESPONSE_RATE_SETTING_NUM_HE_SIGB_SYM_MSB 18
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#define PDG_RESPONSE_RATE_SETTING_NUM_HE_SIGB_SYM_MASK 0x0007c000
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#define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_SOURCE_OFFSET 0x00000014
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#define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_SOURCE_LSB 19
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#define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_SOURCE_MSB 19
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#define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_SOURCE_MASK 0x00080000
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_5A_OFFSET 0x00000014
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_5A_LSB 20
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_5A_MSB 25
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#define PDG_RESPONSE_RATE_SETTING_RESERVED_5A_MASK 0x03f00000
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#define PDG_RESPONSE_RATE_SETTING_U_SIG_PUNCTURE_PATTERN_ENCODING_OFFSET 0x00000014
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#define PDG_RESPONSE_RATE_SETTING_U_SIG_PUNCTURE_PATTERN_ENCODING_LSB 26
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#define PDG_RESPONSE_RATE_SETTING_U_SIG_PUNCTURE_PATTERN_ENCODING_MSB 31
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#define PDG_RESPONSE_RATE_SETTING_U_SIG_PUNCTURE_PATTERN_ENCODING_MASK 0xfc000000
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_OFFSET 0x00000018
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_LSB 0
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MSB 9
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_MASK 0x000003ff
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_OFFSET 0x00000018
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_LSB 10
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MSB 10
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_SELF_ML_SYNC_MASK 0x00000400
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_OFFSET 0x00000018
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_LSB 11
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MSB 11
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_BLOCK_PARTNER_ML_SYNC_MASK 0x00000800
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_OFFSET 0x00000018
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_LSB 12
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MSB 12
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_NSTR_MLO_STA_ID_VALID_MASK 0x00001000
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_RESERVED_0A_OFFSET 0x00000018
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_RESERVED_0A_LSB 13
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MSB 15
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#define PDG_RESPONSE_RATE_SETTING_MLO_STA_ID_DETAILS_RX_RESERVED_0A_MASK 0x0000e000
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#define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_OFFSET 0x00000018
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#define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_LSB 16
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#define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_MSB 27
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#define PDG_RESPONSE_RATE_SETTING_REQUIRED_RESPONSE_TIME_MASK 0x0fff0000
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#define PDG_RESPONSE_RATE_SETTING_DOT11BE_PARAMS_PLACEHOLDER_OFFSET 0x00000018
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#define PDG_RESPONSE_RATE_SETTING_DOT11BE_PARAMS_PLACEHOLDER_LSB 28
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#define PDG_RESPONSE_RATE_SETTING_DOT11BE_PARAMS_PLACEHOLDER_MSB 31
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#define PDG_RESPONSE_RATE_SETTING_DOT11BE_PARAMS_PLACEHOLDER_MASK 0xf0000000
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#endif
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