872c22a405
Added QCA5424 target header files based on E2R38 under QCA5424 to make fw-api project compatible to host. Update the CE base address for QCA5424. patch_3: updated the E3R42 hw header files Change-Id: I2c0d42d37faa2082199c8b1f97bac31f1d5ddea5 CRs-Fixed: 3822334
76 lines
2.5 KiB
C
76 lines
2.5 KiB
C
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/*
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* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
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* SPDX-License-Identifier: ISC
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*/
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#ifndef _L_SIG_B_INFO_H_
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#define _L_SIG_B_INFO_H_
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#if !defined(__ASSEMBLER__)
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#endif
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#define NUM_OF_DWORDS_L_SIG_B_INFO 1
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struct l_sig_b_info {
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#ifndef WIFI_BIT_ORDER_BIG_ENDIAN
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uint32_t rate : 4,
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length : 12,
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reserved : 15,
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rx_integrity_check_passed : 1;
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#else
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uint32_t rx_integrity_check_passed : 1,
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reserved : 15,
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length : 12,
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rate : 4;
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#endif
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};
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#define L_SIG_B_INFO_RATE_OFFSET 0x00000000
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#define L_SIG_B_INFO_RATE_LSB 0
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#define L_SIG_B_INFO_RATE_MSB 3
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#define L_SIG_B_INFO_RATE_MASK 0x0000000f
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#define L_SIG_B_INFO_LENGTH_OFFSET 0x00000000
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#define L_SIG_B_INFO_LENGTH_LSB 4
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#define L_SIG_B_INFO_LENGTH_MSB 15
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#define L_SIG_B_INFO_LENGTH_MASK 0x0000fff0
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#define L_SIG_B_INFO_RESERVED_OFFSET 0x00000000
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#define L_SIG_B_INFO_RESERVED_LSB 16
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#define L_SIG_B_INFO_RESERVED_MSB 30
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#define L_SIG_B_INFO_RESERVED_MASK 0x7fff0000
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#define L_SIG_B_INFO_RX_INTEGRITY_CHECK_PASSED_OFFSET 0x00000000
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#define L_SIG_B_INFO_RX_INTEGRITY_CHECK_PASSED_LSB 31
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#define L_SIG_B_INFO_RX_INTEGRITY_CHECK_PASSED_MSB 31
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#define L_SIG_B_INFO_RX_INTEGRITY_CHECK_PASSED_MASK 0x80000000
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#endif
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