72a6ff4b6e
Fix tlv processing code for monitor mode in Big endian mode. Changed all the 64bit tlv extraction apis and used 32 bit extraction apis. This is needed in big endian mode since HW supports word swap option and TLV has to be intepretted using 32bit extraction APIs. TLV tag, userid and TLV len falls on the first 32 bit and hence using both 32bit or 64 bit extraction APIs give same result. Change-Id: I9b9ff78c79f21888964d405016c58c3b5988b254 CRs-Fixed: 3551002
137 lines
5.7 KiB
C
137 lines
5.7 KiB
C
/*
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* Copyright (c) 2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021,2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Permission to use, copy, modify, and/or distribute this software for
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* any purpose with or without fee is hereby granted, provided that the
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* above copyright notice and this permission notice appear in all
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* copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
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* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
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* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
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* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifndef _HAL_RX_HW_DEFINES_H_
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#define _HAL_RX_HW_DEFINES_H_
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/* Unified 32-bit desc fields */
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#define HAL_RX_USER_TLV32_TYPE_OFFSET 0x00000000
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#define HAL_RX_USER_TLV32_TYPE_LSB 1
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#define HAL_RX_USER_TLV32_TYPE_MASK 0x000003FE
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#define HAL_RX_USER_TLV32_LEN_OFFSET 0x00000000
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#define HAL_RX_USER_TLV32_LEN_LSB 10
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#define HAL_RX_USER_TLV32_LEN_MASK 0x003FFC00
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#define HAL_RX_USER_TLV32_USERID_OFFSET 0x00000000
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#define HAL_RX_USER_TLV32_USERID_LSB 26
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#define HAL_RX_USER_TLV32_USERID_MASK 0xFC000000
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/* rx mpdu desc info */
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#define HAL_RX_MPDU_DESC_INFO_MSDU_COUNT_OFFSET 0x0
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#define HAL_RX_MPDU_DESC_INFO_MSDU_COUNT_LSB 0
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#define HAL_RX_MPDU_DESC_INFO_MSDU_COUNT_MASK 0x000000ff
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/* reo entrance ring */
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#define HAL_REO_ENTRANCE_RING_LOOPING_COUNT_OFFSET 0x1c
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#define HAL_REO_ENTRANCE_RING_LOOPING_COUNT_LSB 28
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#define HAL_REO_ENTRANCE_RING_LOOPING_COUNT_MASK 0xf0000000
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#define HAL_REO_ENTRANCE_RING_RXDMA_PUSH_REASON_OFFSET 0x18
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#define HAL_REO_ENTRANCE_RING_RXDMA_PUSH_REASON_LSB 0
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#define HAL_REO_ENTRANCE_RING_RXDMA_PUSH_REASON_MASK 0x00000003
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#define HAL_REO_ENTRANCE_RING_RXDMA_ERROR_CODE_OFFSET 0x18
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#define HAL_REO_ENTRANCE_RING_RXDMA_ERROR_CODE_LSB 2
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#define HAL_REO_ENTRANCE_RING_RXDMA_ERROR_CODE_MASK 0x0000007c
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#define HAL_SW2WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_OFFSET 0x8
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#define HAL_SW2WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_LSB 0
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#define HAL_SW2WBM_RELEASE_RING_RELEASE_SOURCE_MODULE_MASK 0x00000007
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#define HAL_SW2WBM_RELEASE_RING_BM_ACTION_OFFSET 0x8
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#define HAL_SW2WBM_RELEASE_RING_BM_ACTION_LSB 3
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#define HAL_SW2WBM_RELEASE_RING_BM_ACTION_MASK 0x00000038
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#define HAL_SW2WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_OFFSET 0x8
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#define HAL_SW2WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_LSB 6
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#define HAL_SW2WBM_RELEASE_RING_BUFFER_OR_DESC_TYPE_MASK 0x000001c0
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/* REO CMD entry offsets */
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#define HAL_UNIFORM_REO_CMD_HEADER_REO_CMD_NUMBER_OFFSET 0x0
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#define HAL_UNIFORM_REO_CMD_HEADER_REO_CMD_NUMBER_LSB 0
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#define HAL_UNIFORM_REO_CMD_HEADER_REO_CMD_NUMBER_MASK 0x0000ffff
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#define HAL_UNIFORM_DESCRIPTOR_HEADER_OWNER_OFFSET 0x00000000
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#define HAL_UNIFORM_DESCRIPTOR_HEADER_OWNER_LSB 0
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#define HAL_UNIFORM_DESCRIPTOR_HEADER_OWNER_MASK 0x0000000f
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#define HAL_UNIFORM_DESCRIPTOR_HEADER_BUFFER_TYPE_OFFSET 0x00000000
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#define HAL_UNIFORM_DESCRIPTOR_HEADER_BUFFER_TYPE_LSB 4
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#define HAL_UNIFORM_DESCRIPTOR_HEADER_BUFFER_TYPE_MASK 0x000000f0
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#define HAL_WBM_INTERNAL_ERROR_OFFSET 0x8
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#define HAL_WBM_INTERNAL_ERROR_LSB 31
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#define HAL_WBM_INTERNAL_ERROR_MASK 0x80000000
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#define WBM_ERR_RING_BUFFER_OR_DESC_TYPE_OFFSET 0x8
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#define WBM_ERR_RING_BUFFER_OR_DESC_TYPE_LSB 6
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#define WBM_ERR_RING_BUFFER_OR_DESC_TYPE_MASK 0x000001c0
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/* RX Flow search entry MACROS */
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#define HAL_RX_FLOW_SEARCH_ENTRY_VALID_OFFSET 0x00000024
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#define HAL_RX_FLOW_SEARCH_ENTRY_VALID_LSB 8
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#define HAL_RX_FLOW_SEARCH_ENTRY_VALID_MASK 0x00000100
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_127_96_OFFSET 0x00000000
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_127_96_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_127_96_MASK 0xffffffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_95_64_OFFSET 0x00000004
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_95_64_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_95_64_MASK 0xffffffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_63_32_OFFSET 0x00000008
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_63_32_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_63_32_MASK 0xffffffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_31_0_OFFSET 0x0000000c
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_31_0_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_IP_31_0_MASK 0xffffffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_127_96_OFFSET 0x00000010
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_127_96_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_127_96_MASK 0xffffffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_95_64_OFFSET 0x00000014
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_95_64_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_95_64_MASK 0xffffffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_63_32_OFFSET 0x00000018
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_63_32_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_63_32_MASK 0xffffffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_31_0_OFFSET 0x0000001c
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_31_0_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_IP_31_0_MASK 0xffffffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_PORT_OFFSET 0x00000020
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_PORT_LSB 16
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#define HAL_RX_FLOW_SEARCH_ENTRY_DEST_PORT_MASK 0xffff0000
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_PORT_OFFSET 0x00000020
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_PORT_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_SRC_PORT_MASK 0x0000ffff
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#define HAL_RX_FLOW_SEARCH_ENTRY_L4_PROTOCOL_OFFSET 0x00000024
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#define HAL_RX_FLOW_SEARCH_ENTRY_L4_PROTOCOL_LSB 0
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#define HAL_RX_FLOW_SEARCH_ENTRY_L4_PROTOCOL_MASK 0x000000ff
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#endif /* _HAL_RX_HW_DEFINES_H_ */
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